arch/m68k/coldfire/device.c

589

.clk_src = 1,

drivers/clk/clk-nomadik.c

166

#define to_src(_hw) container_of(_hw, struct clk_src, hw)

drivers/clk/clk-nomadik.c

306

struct clk_src *sclk = to_src(hw);

drivers/clk/clk-nomadik.c

319

struct clk_src *sclk = to_src(hw);

drivers/clk/clk-nomadik.c

331

struct clk_src *sclk = to_src(hw);

drivers/clk/clk-nomadik.c

357

struct clk_src *sclk;

drivers/clk/socfpga/clk-periph-a10.c

42

u32 clk_src;

drivers/clk/socfpga/clk-periph-a10.c

45

clk_src = readl(socfpgaclk->hw.reg);

drivers/clk/socfpga/clk-periph-a10.c

49

return (clk_src >> CLK_MGR_FREE_SHIFT) &

drivers/clk/socfpga/clk-periph-s10.c

66

u32 clk_src, mask;

drivers/clk/socfpga/clk-periph-s10.c

79

clk_src = readl(socfpgaclk->hw.reg);

drivers/clk/socfpga/clk-periph-s10.c

80

parent = (clk_src >> CLK_MGR_FREE_SHIFT) &

drivers/clk/socfpga/clk-periph.c

39

u32 clk_src;

drivers/clk/socfpga/clk-periph.c

41

clk_src = readl(clk_mgr_base_addr + CLKMGR_DBCTRL);

drivers/clk/socfpga/clk-periph.c

42

return clk_src & 0x1;

drivers/comedi/drivers/addi_apci_1500.c

47

unsigned int clk_src;

drivers/comedi/drivers/addi_apci_1500.c

670

devpriv->clk_src = data[1];

drivers/comedi/drivers/addi_apci_1500.c

671

if (devpriv->clk_src == 2)

drivers/comedi/drivers/addi_apci_1500.c

672

devpriv->clk_src = 3;

drivers/comedi/drivers/addi_apci_1500.c

673

outw(devpriv->clk_src, devpriv->addon + APCI1500_CLK_SEL_REG);

drivers/comedi/drivers/addi_apci_1500.c

676

switch (devpriv->clk_src) {

drivers/comedi/drivers/amplc_pci230.c

660

unsigned int clk_src, cnt;

drivers/comedi/drivers/amplc_pci230.c

662

for (clk_src = CLK_10MHZ;; clk_src++) {

drivers/comedi/drivers/amplc_pci230.c

663

cnt = pci230_divide_ns(ns, pci230_timebase[clk_src], flags);

drivers/comedi/drivers/amplc_pci230.c

664

if (cnt <= 65536 || clk_src == CLK_1KHZ)

drivers/comedi/drivers/amplc_pci230.c

668

return clk_src;

drivers/comedi/drivers/amplc_pci230.c

674

unsigned int clk_src;

drivers/comedi/drivers/amplc_pci230.c

676

clk_src = pci230_choose_clk_count(*ns, &count, flags);

drivers/comedi/drivers/amplc_pci230.c

677

*ns = count * pci230_timebase[clk_src];

drivers/comedi/drivers/amplc_pci230.c

684

unsigned int clk_src;

drivers/comedi/drivers/amplc_pci230.c

690

clk_src = pci230_choose_clk_count(ns, &count, flags);

drivers/comedi/drivers/amplc_pci230.c

692

outb(pci230_clk_config(ct, clk_src), dev->iobase + PCI230_ZCLK_SCE);

drivers/comedi/drivers/ni_tio.c

304

unsigned int *clk_src)

drivers/comedi/drivers/ni_tio.c

366

*clk_src = clock_source;

drivers/comedi/drivers/ni_tio.c

371

unsigned int *clk_src)

drivers/comedi/drivers/ni_tio.c

424

*clk_src = clock_source;

drivers/comedi/drivers/ni_tio.c

429

unsigned int *clk_src)

drivers/comedi/drivers/ni_tio.c

435

return ni_m_series_clock_src_select(counter, clk_src);

drivers/comedi/drivers/ni_tio.c

437

return ni_660x_clock_src_select(counter, clk_src);

drivers/comedi/drivers/ni_tio.c

450

unsigned int clk_src = 0;

drivers/comedi/drivers/ni_tio.c

482

ret = ni_tio_generic_clock_src_select(counter, &clk_src);

drivers/comedi/drivers/ni_tio.c

485

ret = ni_tio_clock_period_ps(counter, clk_src, &ps);

drivers/comedi/drivers/ni_tio.c

617

unsigned int clk_src = clock_source & NI_GPCT_CLOCK_SRC_SELECT_MASK;

drivers/comedi/drivers/ni_tio.c

621

switch (clk_src) {

drivers/comedi/drivers/ni_tio.c

645

if (clk_src == NI_GPCT_RTSI_CLOCK_SRC_BITS(i)) {

drivers/comedi/drivers/ni_tio.c

653

if (clk_src == NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(i)) {

drivers/comedi/drivers/ni_tio.c

668

unsigned int clk_src = clock_source & NI_GPCT_CLOCK_SRC_SELECT_MASK;

drivers/comedi/drivers/ni_tio.c

672

switch (clk_src) {

drivers/comedi/drivers/ni_tio.c

702

if (clk_src == NI_GPCT_RTSI_CLOCK_SRC_BITS(i)) {

drivers/comedi/drivers/ni_tio.c

710

if (clk_src == NI_GPCT_PFI_CLOCK_SRC_BITS(i)) {

drivers/dma/qcom/gpi.c

1728

tre->dword[2] |= u32_encode_bits(spi->clk_src, TRE_C0_CLK_SRC);

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

526

u32 freq, u8 clk_type, u8 clk_src)

drivers/gpu/drm/amd/amdgpu/atombios_crtc.c

546

args.v2_1.asParam.ucDCEClkSrc = clk_src;

drivers/gpu/drm/amd/amdgpu/atombios_crtc.h

41

u32 freq, u8 clk_type, u8 clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

446

enum physymclk_clock_source clk_src,

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

457

PHYASYMCLK_FORCE_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

474

PHYBSYMCLK_FORCE_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

491

PHYCSYMCLK_FORCE_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

508

PHYDSYMCLK_FORCE_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

525

PHYESYMCLK_FORCE_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.h

199

enum physymclk_clock_source clk_src,

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1583

enum physymclk_clock_source clk_src,

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1594

PHYASYMCLK_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1605

PHYBSYMCLK_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1616

PHYCSYMCLK_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1627

PHYDSYMCLK_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1638

PHYESYMCLK_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

1650

__func__, phy_inst, force_enable ? 1 : 0, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

2249

enum physymclk_clock_source clk_src,

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

2254

dccg35_enable_physymclk_new(dccg, inst, (enum physymclk_source)clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

271

enum physymclk_clock_source clk_src,

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

282

PHYASYMCLK_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

299

PHYBSYMCLK_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

316

PHYCSYMCLK_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

333

PHYDSYMCLK_SRC_SEL, clk_src);

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

659

dccg401_set_dtbclk_p_src(dccg, params->clk_src, params->otg_inst);

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.h

246

enum physymclk_clock_source clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1011

if (clk_src->cs_mask->PIPE0_DTO_SRC_SEL)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1053

if (clk_src->bios->funcs->set_pixel_clock(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1054

clk_src->bios, &bp_pc_params) != BP_RESULT_OK)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1058

dce112_program_pixel_clk_resync(clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1073

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1089

dto_params.clk_src = DPREFCLK;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1155

if (clk_src->bios->funcs->set_pixel_clock(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1156

clk_src->bios, &bp_pc_params) != BP_RESULT_OK)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1160

dce112_program_pixel_clk_resync(clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1170

struct clock_source *clk_src)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1172

struct dce110_clk_src *dce110_clk_src = TO_DCE110_CLK_SRC(clk_src);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1176

if (clk_src->dp_clk_src)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1181

bp_pixel_clock_params.pll_id = clk_src->id;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1197

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1287

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1310

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1333

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1351

if (clk_src->cs_mask->PIPE0_DTO_SRC_SEL)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1371

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(cs);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1446

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1472

*ss_entries_num = clk_src->bios->funcs->get_ss_entry_number(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1473

clk_src->bios,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1492

bp_result = clk_src->bios->funcs->get_spread_spectrum_info(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1493

clk_src->bios,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1563

struct dce110_clk_src *clk_src)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1566

clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1568

&clk_src->dp_ss_params,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1569

&clk_src->dp_ss_params_cnt);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1571

clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1573

&clk_src->hdmi_ss_params,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1574

&clk_src->hdmi_ss_params_cnt);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1576

clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1578

&clk_src->dvi_ss_params,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1579

&clk_src->dvi_ss_params_cnt);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1581

clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1583

&clk_src->lvds_ss_params,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1584

&clk_src->lvds_ss_params_cnt);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1665

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1676

clk_src->base.ctx = ctx;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1677

clk_src->bios = bios;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1678

clk_src->base.id = id;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1679

clk_src->base.funcs = &dce110_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1681

clk_src->regs = regs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1682

clk_src->cs_shift = cs_shift;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1683

clk_src->cs_mask = cs_mask;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1685

if (!clk_src->bios->fw_info_valid) {

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1690

clk_src->ext_clk_khz = clk_src->bios->fw_info.external_clock_source_frequency_for_dp;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1696

clk_src->cs_mask->PLL_POST_DIV_PIXCLK;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1698

calc_pll_cs_init_data.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1715

clk_src->cs_mask->PLL_POST_DIV_PIXCLK;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1717

calc_pll_cs_init_data_hdmi.max_pll_ref_divider = clk_src->cs_mask->PLL_REF_DIV;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1730

clk_src->ref_freq_khz = clk_src->bios->fw_info.pll_info.crystal_frequency;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1732

if (clk_src->base.id == CLOCK_SOURCE_ID_EXTERNAL)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1736

ss_info_from_atombios_create(clk_src);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1739

&clk_src->calc_pll,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1747

min_override_input_pxl_clk_pll_freq_khz = clk_src->ref_freq_khz/2;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1749

max_override_input_pxl_clk_pll_freq_khz = clk_src->ref_freq_khz;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1753

&clk_src->calc_pll_hdmi, &calc_pll_cs_init_data_hdmi)) {

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1765

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1773

clk_src->base.ctx = ctx;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1774

clk_src->bios = bios;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1775

clk_src->base.id = id;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1776

clk_src->base.funcs = &dce112_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1778

clk_src->regs = regs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1779

clk_src->cs_shift = cs_shift;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1780

clk_src->cs_mask = cs_mask;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1782

if (!clk_src->bios->fw_info_valid) {

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1787

clk_src->ext_clk_khz = clk_src->bios->fw_info.external_clock_source_frequency_for_dp;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1793

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1801

bool ret = dce112_clk_src_construct(clk_src, ctx, bios, id, regs, cs_shift, cs_mask);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1803

clk_src->base.funcs = &dcn20_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1809

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1817

bool ret = dce112_clk_src_construct(clk_src, ctx, bios, id, regs, cs_shift, cs_mask);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1819

clk_src->base.funcs = &dcn3_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1825

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1833

bool ret = dce112_clk_src_construct(clk_src, ctx, bios, id, regs, cs_shift, cs_mask);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1835

clk_src->base.funcs = &dcn31_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1841

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1849

bool ret = dce112_clk_src_construct(clk_src, ctx, bios, id, regs, cs_shift, cs_mask);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1851

clk_src->base.funcs = &dcn401_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1856

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1864

bool ret = dce112_clk_src_construct(clk_src, ctx, bios, id, regs, cs_shift, cs_mask);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

1866

clk_src->base.funcs = &dcn3_clk_src_funcs;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

397

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

42

(clk_src->regs->reg)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

447

bp_result = clk_src->bios->funcs->adjust_pixel_clock(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

448

clk_src->bios, &bp_adjust_pixel_clock_params);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

45

clk_src->base.ctx

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

476

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

497

clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

50

struct calc_pll_clock_source *calc_pll_cs = &clk_src->calc_pll

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

506

if (!pll_adjust_pix_clk(clk_src, pix_clk_params, pll_settings)) {

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

525

&clk_src->calc_pll_hdmi,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

531

&clk_src->calc_pll,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

538

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

54

clk_src->cs_shift->field_name, clk_src->cs_mask->field_name

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

573

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(cs);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

588

pll_settings->adjusted_pix_clk_100hz = clk_src->ext_clk_khz * 10;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

589

pll_settings->calculated_pix_clk_100hz = clk_src->ext_clk_khz * 10;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

595

pll_calc_error = dce110_get_pix_clk_dividers_helper(clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

606

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(cs);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

620

pll_settings->adjusted_pix_clk_100hz = clk_src->ext_clk_khz * 10;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

621

pll_settings->calculated_pix_clk_100hz = clk_src->ext_clk_khz * 10;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

627

dce112_get_pix_clk_dividers_helper(clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

63

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

633

static bool disable_spread_spectrum(struct dce110_clk_src *clk_src)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

638

bp_ss_params.pll_id = clk_src->base.id;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

641

result = clk_src->bios->funcs->enable_spread_spectrum_on_ppll(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

642

clk_src->bios,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

715

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

723

clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

740

bp_params.pll_id = clk_src->base.id;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

748

clk_src->bios->funcs->

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

750

clk_src->bios,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

76

ss_parm = clk_src->dvi_ss_params;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

761

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

77

entrys_num = clk_src->dvi_ss_params_cnt;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

799

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

81

ss_parm = clk_src->hdmi_ss_params;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

82

entrys_num = clk_src->hdmi_ss_params_cnt;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

834

if (clk_src->cs_mask->PHYPLLA_PIXCLK_DOUBLE_RATE_ENABLE)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

850

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

86

ss_parm = clk_src->lvds_ss_params;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

860

disable_spread_spectrum(clk_src);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

87

entrys_num = clk_src->lvds_ss_params_cnt;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

892

if (clk_src->bios->funcs->set_pixel_clock(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

893

clk_src->bios, &bp_pc_params) != BP_RESULT_OK)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

904

if (!enable_spread_spectrum(clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

910

dce110_program_pixel_clk_resync(clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

924

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

934

disable_spread_spectrum(clk_src);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

94

ss_parm = clk_src->dp_ss_params;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

95

entrys_num = clk_src->dp_ss_params_cnt;

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

952

if (clk_src->bios->funcs->set_pixel_clock(

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

953

clk_src->bios, &bp_pc_params) != BP_RESULT_OK)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

957

dce112_program_pixel_clk_resync(clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

971

struct dce110_clk_src *clk_src = TO_DCE110_CLK_SRC(clock_source);

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c

997

if (clk_src->cs_mask->PIPE0_DTO_SRC_SEL)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

257

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

266

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

275

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

284

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

293

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

30

#define TO_DCE110_CLK_SRC(clk_src)\

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

302

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

31

container_of(clk_src, struct dce110_clk_src, base)

drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h

311

struct dce110_clk_src *clk_src,

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

176

struct clock_source *clk_src,

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

179

if (clk_src->id == CLOCK_SOURCE_ID_DP_DTO || clk_src->dp_clk_src) {

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

183

} else if (clk_src->id >= CLOCK_SOURCE_COMBO_PHY_PLL0) {

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

184

uint32_t rate_source = clk_src->id - CLOCK_SOURCE_COMBO_PHY_PLL0;

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

193

} else if (clk_src->id <= CLOCK_SOURCE_ID_PLL2) {

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

194

uint32_t rate_source = clk_src->id - CLOCK_SOURCE_ID_PLL0;

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.c

205

clk_src->id, tg_inst);

drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h

1299

struct clock_source *clk_src,

drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h

268

enum physymclk_clock_source clk_src,

drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h

62

enum streamclk_source clk_src;

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c

77

uint8_t clk_src = 0xC4;

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c

81

const uint8_t vendor_lttpr_write_data_pg1[4] = {0x1, 0x50, 0x50, clk_src};

drivers/gpu/drm/amd/display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.c

82

const uint8_t vendor_lttpr_write_data_pg2[4] = {0x1, 0x51, 0x50, clk_src};

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

758

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

761

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

764

if (dce110_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

766

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

767

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

770

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

775

static void dce100_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

777

kfree(TO_DCE110_CLK_SRC(*clk_src));

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

778

*clk_src = NULL;

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

782

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

785

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

788

if (dce110_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

790

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

791

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

794

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

799

static void dce110_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

803

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

806

dce110_clk_src = TO_DCE110_CLK_SRC(*clk_src);

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

813

*clk_src = NULL;

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

758

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

761

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

764

if (dce112_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

766

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

767

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

770

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

775

static void dce112_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

777

kfree(TO_DCE110_CLK_SRC(*clk_src));

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

778

*clk_src = NULL;

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

544

struct dce110_clk_src *clk_src = kzalloc_obj(*clk_src);

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

546

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

549

if (dce112_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

551

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

552

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

555

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

560

static void dce120_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

562

kfree(TO_DCE110_CLK_SRC(*clk_src));

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

563

*clk_src = NULL;

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

786

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

789

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

792

if (dce110_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

794

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

795

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

798

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

803

static void dce60_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

805

kfree(TO_DCE110_CLK_SRC(*clk_src));

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

806

*clk_src = NULL;

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

792

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

795

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

798

if (dce110_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

800

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

801

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

804

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

809

static void dce80_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

811

kfree(TO_DCE110_CLK_SRC(*clk_src));

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

812

*clk_src = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

813

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

816

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

819

if (dce112_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

821

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

822

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

825

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

912

static void dcn10_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

914

kfree(TO_DCE110_CLK_SRC(*clk_src));

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

915

*clk_src = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1001

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1002

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1005

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1082

void dcn20_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1084

kfree(TO_DCE110_CLK_SRC(*clk_src));

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1085

*clk_src = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

993

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

996

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

999

if (dcn20_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

99

void dcn20_clock_source_destroy(struct clock_source **clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

852

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

855

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

858

if (dce112_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

860

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

861

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

863

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

933

static void dcn201_clock_source_destroy(struct clock_source **clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

935

kfree(TO_DCE110_CLK_SRC(*clk_src));

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

936

*clk_src = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

1000

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

988

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

991

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

994

if (dcn20_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

996

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

997

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1335

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1338

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1341

if (dcn3_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1343

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1344

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1347

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1290

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1293

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1296

if (dcn301_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1298

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1299

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1302

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

476

struct dce110_clk_src *clk_src = kzalloc_obj(struct dce110_clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

478

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

481

if (dcn3_clk_src_construct(clk_src, ctx, bios, id, regs, &cs_shift, &cs_mask)) {

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

482

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

483

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

486

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

460

struct dce110_clk_src *clk_src = kzalloc_obj(struct dce110_clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

462

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

465

if (dcn3_clk_src_construct(clk_src, ctx, bios, id, regs, &cs_shift, &cs_mask)) {

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

466

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

467

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

470

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1625

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1628

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1631

if (dcn3_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1633

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1634

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1637

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1896

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1899

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1902

if (dcn31_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1904

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1905

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1908

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1683

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1686

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1689

if (dcn31_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1691

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1692

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1695

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1827

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1830

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1833

if (dcn31_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1835

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1836

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1839

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1626

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1629

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1632

if (dcn31_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1634

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1635

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1638

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1618

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1621

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1624

if (dcn31_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1626

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1627

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1630

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

833

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

836

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

839

if (dcn31_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

841

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

842

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

845

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

827

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

830

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

833

if (dcn31_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

835

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

836

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

839

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1743

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1746

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1749

if (dcn31_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1751

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1752

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1755

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1723

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1726

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1729

if (dcn31_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1731

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1732

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1735

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1730

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1733

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1736

if (dcn31_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1738

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1739

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1742

kfree(clk_src);

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

829

struct dce110_clk_src *clk_src =

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

832

if (!clk_src)

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

835

if (dcn401_clk_src_construct(clk_src, ctx, bios, id,

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

837

clk_src->base.dp_clk_src = dp_clk_src;

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

838

return &clk_src->base;

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

841

kfree(clk_src);

drivers/gpu/drm/omapdrm/dss/dpi.c

227

ctx->clkout_idx = dss_pll_get_clkout_idx_for_src(dpi->clk_src);

drivers/gpu/drm/omapdrm/dss/dpi.c

304

dpi->clk_src);

drivers/gpu/drm/omapdrm/dss/dpi.c

37

enum dss_clk_source clk_src;

drivers/gpu/drm/omapdrm/dss/dpi.c

404

dpi->clk_src = dpi_get_clk_src(dpi);

drivers/gpu/drm/omapdrm/dss/dpi.c

406

pll = dss_pll_find_by_src(dpi->dss, dpi->clk_src);

drivers/gpu/drm/omapdrm/dss/dss.c

178

enum dss_clk_source clk_src,

drivers/gpu/drm/omapdrm/dss/dss.c

190

switch (clk_src) {

drivers/gpu/drm/omapdrm/dss/dss.c

204

switch (clk_src) {

drivers/gpu/drm/omapdrm/dss/dss.c

220

switch (clk_src) {

drivers/gpu/drm/omapdrm/dss/dss.c

331

const char *dss_get_clk_source_name(enum dss_clk_source clk_src)

drivers/gpu/drm/omapdrm/dss/dss.c

333

return dss_generic_clk_source_names[clk_src];

drivers/gpu/drm/omapdrm/dss/dss.c

406

enum dss_clk_source clk_src)

drivers/gpu/drm/omapdrm/dss/dss.c

414

if (WARN_ON(dss->feat->has_lcd_clk_src && clk_src != DSS_CLK_SRC_FCK))

drivers/gpu/drm/omapdrm/dss/dss.c

417

switch (clk_src) {

drivers/gpu/drm/omapdrm/dss/dss.c

436

dss->dispc_clk_source = clk_src;

drivers/gpu/drm/omapdrm/dss/dss.c

440

enum dss_clk_source clk_src)

drivers/gpu/drm/omapdrm/dss/dss.c

444

switch (clk_src) {

drivers/gpu/drm/omapdrm/dss/dss.c

464

dss->dsi_clk_source[dsi_module] = clk_src;

drivers/gpu/drm/omapdrm/dss/dss.c

469

enum dss_clk_source clk_src)

drivers/gpu/drm/omapdrm/dss/dss.c

480

if (clk_src == DSS_CLK_SRC_FCK) {

drivers/gpu/drm/omapdrm/dss/dss.c

486

r = dss_ctrl_pll_set_control_mux(dss, clk_src, channel);

drivers/gpu/drm/omapdrm/dss/dss.c

497

enum dss_clk_source clk_src)

drivers/gpu/drm/omapdrm/dss/dss.c

512

if (clk_src == DSS_CLK_SRC_FCK) {

drivers/gpu/drm/omapdrm/dss/dss.c

518

if (WARN_ON(allowed_plls[channel] != clk_src))

drivers/gpu/drm/omapdrm/dss/dss.c

528

enum dss_clk_source clk_src)

drivers/gpu/drm/omapdrm/dss/dss.c

541

if (clk_src == DSS_CLK_SRC_FCK) {

drivers/gpu/drm/omapdrm/dss/dss.c

547

if (WARN_ON(allowed_plls[channel] != clk_src))

drivers/gpu/drm/omapdrm/dss/dss.c

557

enum dss_clk_source clk_src)

drivers/gpu/drm/omapdrm/dss/dss.c

563

dss_select_dispc_clk_source(dss, clk_src);

drivers/gpu/drm/omapdrm/dss/dss.c

564

dss->lcd_clk_source[idx] = clk_src;

drivers/gpu/drm/omapdrm/dss/dss.c

568

r = dss->feat->ops->select_lcd_source(dss, channel, clk_src);

drivers/gpu/drm/omapdrm/dss/dss.c

572

dss->lcd_clk_source[idx] = clk_src;

drivers/gpu/drm/omapdrm/dss/dss.c

67

enum dss_clk_source clk_src);

drivers/gpu/drm/omapdrm/dss/dss.h

311

const char *dss_get_clk_source_name(enum dss_clk_source clk_src);

drivers/gpu/drm/omapdrm/dss/dss.h

326

enum dss_clk_source clk_src);

drivers/gpu/drm/omapdrm/dss/dss.h

329

enum dss_clk_source clk_src);

drivers/i2c/busses/i2c-mt65xx.c

698

unsigned int clk_src,

drivers/i2c/busses/i2c-mt65xx.c

716

sample_ns = div_u64(1ULL * HZ_PER_GHZ * (sample_cnt + 1), clk_src);

drivers/i2c/busses/i2c-mt65xx.c

718

clk_ns = HZ_PER_GHZ / clk_src;

drivers/i2c/busses/i2c-mt65xx.c

799

static int mtk_i2c_calculate_speed(struct mtk_i2c *i2c, unsigned int clk_src,

drivers/i2c/busses/i2c-mt65xx.c

821

opt_div = DIV_ROUND_UP(clk_src >> 1, target_speed);

drivers/i2c/busses/i2c-mt65xx.c

838

ret = mtk_i2c_check_ac_timing(i2c, clk_src,

drivers/i2c/busses/i2c-mt65xx.c

857

if ((clk_src / (2 * (sample_cnt * step_cnt - clk_div_restri))) >

drivers/i2c/busses/i2c-mt65xx.c

874

unsigned int clk_src;

drivers/i2c/busses/i2c-mt65xx.c

895

clk_src = parent_clk / clk_div;

drivers/i2c/busses/i2c-mt65xx.c

900

ret = mtk_i2c_calculate_speed(i2c, clk_src,

drivers/i2c/busses/i2c-mt65xx.c

910

ret = mtk_i2c_calculate_speed(i2c, clk_src,

drivers/i2c/busses/i2c-mt65xx.c

924

ret = mtk_i2c_calculate_speed(i2c, clk_src,

drivers/iio/adc/stm32-dfsdm-core.c

143

unsigned int clk_div = priv->spi_clk_out_div, clk_src;

drivers/iio/adc/stm32-dfsdm-core.c

152

clk_src = priv->aclk ? 1 : 0;

drivers/iio/adc/stm32-dfsdm-core.c

155

DFSDM_CHCFGR1_CKOUTSRC(clk_src));

drivers/mmc/host/alcor.c

657

u16 clk_src = 0;

drivers/mmc/host/alcor.c

678

clk_src = cfg->clk_src_reg;

drivers/mmc/host/alcor.c

683

clk_src |= ((clk_div - 1) << 8);

drivers/mmc/host/alcor.c

684

clk_src |= AU6601_CLK_ENABLE;

drivers/mmc/host/alcor.c

687

clock, tmp_clock, clk_div, clk_src);

drivers/mmc/host/alcor.c

689

alcor_write16(priv, clk_src, AU6601_CLK_SELECT);

drivers/net/can/flexcan/flexcan-core.c

1888

if (priv->clk_src)

drivers/net/can/flexcan/flexcan-core.c

2098

u8 clk_src = 1;

drivers/net/can/flexcan/flexcan-core.c

2118

"fsl,clk-source", &clk_src);

drivers/net/can/flexcan/flexcan-core.c

2123

clk_src = pdata->clk_src;

drivers/net/can/flexcan/flexcan-core.c

2209

priv->clk_src = clk_src;

drivers/net/can/flexcan/flexcan.h

99

u8 clk_src; /* clock source of CAN Protocol Engine */

drivers/net/ethernet/intel/ice/ice_common.c

2592

info->clk_src = ((number & ICE_TS_CLK_SRC_M) != 0);

drivers/net/ethernet/intel/ice/ice_common.c

2595

info->clk_src = ICE_CLK_SRC_TIME_REF;

drivers/net/ethernet/intel/ice/ice_common.c

2623

info->clk_src);

drivers/net/ethernet/intel/ice/ice_sched.c

1404

u32 val, clk_src;

drivers/net/ethernet/intel/ice/ice_sched.c

1407

clk_src = FIELD_GET(GLGEN_CLKSTAT_SRC_PSM_CLK_SRC_M, val);

drivers/net/ethernet/intel/ice/ice_sched.c

1414

switch (clk_src) {

drivers/net/ethernet/intel/ice/ice_sched.c

1429

clk_src);

drivers/net/ethernet/intel/ice/ice_tspll.c

102

enum ice_clk_src clk_src)

drivers/net/ethernet/intel/ice/ice_tspll.c

110

if (clk_src >= NUM_ICE_CLK_SRC) {

drivers/net/ethernet/intel/ice/ice_tspll.c

112

clk_src);

drivers/net/ethernet/intel/ice/ice_tspll.c

117

clk_src == ICE_CLK_SRC_TCXO) &&

drivers/net/ethernet/intel/ice/ice_tspll.c

132

static const char *ice_tspll_clk_src_str(enum ice_clk_src clk_src)

drivers/net/ethernet/intel/ice/ice_tspll.c

134

switch (clk_src) {

drivers/net/ethernet/intel/ice/ice_tspll.c

153

static void ice_tspll_log_cfg(struct ice_hw *hw, bool enable, u8 clk_src,

drivers/net/ethernet/intel/ice/ice_tspll.c

159

ice_tspll_clk_src_str((enum ice_clk_src)clk_src),

drivers/net/ethernet/intel/ice/ice_tspll.c

180

enum ice_clk_src clk_src)

drivers/net/ethernet/intel/ice/ice_tspll.c

258

r24 |= FIELD_PREP(ICE_CGU_R23_R24_TIME_REF_SEL, clk_src);

drivers/net/ethernet/intel/ice/ice_tspll.c

341

enum ice_clk_src clk_src)

drivers/net/ethernet/intel/ice/ice_tspll.c

385

if (clk_src == ICE_CLK_SRC_TCXO)

drivers/net/ethernet/intel/ice/ice_tspll.c

440

r23 |= FIELD_PREP(ICE_CGU_R23_R24_TIME_REF_SEL, clk_src);

drivers/net/ethernet/intel/ice/ice_tspll.c

547

enum ice_clk_src clk_src)

drivers/net/ethernet/intel/ice/ice_tspll.c

551

return ice_tspll_cfg_e82x(hw, clk_freq, clk_src);

drivers/net/ethernet/intel/ice/ice_tspll.c

553

return ice_tspll_cfg_e825c(hw, clk_freq, clk_src);

drivers/net/ethernet/intel/ice/ice_tspll.c

592

enum ice_clk_src clk_src;

drivers/net/ethernet/intel/ice/ice_tspll.c

601

clk_src = (enum ice_clk_src)ts_info->clk_src;

drivers/net/ethernet/intel/ice/ice_tspll.c

602

if (!ice_tspll_check_params(hw, tspll_freq, clk_src))

drivers/net/ethernet/intel/ice/ice_tspll.c

613

err = ice_tspll_cfg(hw, tspll_freq, clk_src);

drivers/net/ethernet/intel/ice/ice_tspll.c

619

clk_src = ICE_CLK_SRC_TCXO;

drivers/net/ethernet/intel/ice/ice_tspll.c

620

err = ice_tspll_cfg(hw, tspll_freq, clk_src);

drivers/net/ethernet/intel/ice/ice_type.h

362

u8 clk_src;

drivers/ptp/ptp_qoriq.c

377

static u32 ptp_qoriq_nominal_freq(u32 clk_src)

drivers/ptp/ptp_qoriq.c

381

clk_src /= 1000000;

drivers/ptp/ptp_qoriq.c

382

remainder = clk_src % 100;

drivers/ptp/ptp_qoriq.c

384

clk_src -= remainder;

drivers/ptp/ptp_qoriq.c

385

clk_src += 100;

drivers/ptp/ptp_qoriq.c

389

clk_src -= 100;

drivers/ptp/ptp_qoriq.c

391

} while (1000 % clk_src);

drivers/ptp/ptp_qoriq.c

393

return clk_src * 1000000;

drivers/ptp/ptp_qoriq.c

422

u32 clk_src = 0;

drivers/ptp/ptp_qoriq.c

428

clk_src = clk_get_rate(clk);

drivers/ptp/ptp_qoriq.c

432

if (clk_src <= 100000000UL) {

drivers/ptp/ptp_qoriq.c

437

nominal_freq = ptp_qoriq_nominal_freq(clk_src);

drivers/ptp/ptp_qoriq.c

449

freq_comp = div_u64_rem(freq_comp, clk_src, &remainder);

drivers/ptp/ptp_qoriq.c

461

max_adj = 1000000000ULL * (clk_src - nominal_freq);

drivers/rtc/rtc-s32g.c

254

priv->clk_src = devm_clk_get_enabled(dev, rtc_clk_src[i]);

drivers/rtc/rtc-s32g.c

255

if (!IS_ERR(priv->clk_src)) {

drivers/rtc/rtc-s32g.c

261

if (IS_ERR(priv->clk_src))

drivers/rtc/rtc-s32g.c

262

return dev_err_probe(dev, PTR_ERR(priv->clk_src),

drivers/rtc/rtc-s32g.c

307

rtc_hz = clk_get_rate(priv->clk_src);

drivers/rtc/rtc-s32g.c

61

struct clk *clk_src;

drivers/spi/spi-geni-qcom.c

437

&peripheral.clk_src, &peripheral.clk_div);

drivers/video/fbdev/omap2/omapfb/dss/dss.c

347

const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src)

drivers/video/fbdev/omap2/omapfb/dss/dss.c

349

return dss_generic_clk_source_names[clk_src];

drivers/video/fbdev/omap2/omapfb/dss/dss.c

396

static void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src)

drivers/video/fbdev/omap2/omapfb/dss/dss.c

401

switch (clk_src) {

drivers/video/fbdev/omap2/omapfb/dss/dss.c

420

dss.dispc_clk_source = clk_src;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

424

enum omap_dss_clk_source clk_src)

drivers/video/fbdev/omap2/omapfb/dss/dss.c

428

switch (clk_src) {

drivers/video/fbdev/omap2/omapfb/dss/dss.c

448

dss.dsi_clk_source[dsi_module] = clk_src;

drivers/video/fbdev/omap2/omapfb/dss/dss.c

452

enum omap_dss_clk_source clk_src)

drivers/video/fbdev/omap2/omapfb/dss/dss.c

457

dss_select_dispc_clk_source(clk_src);

drivers/video/fbdev/omap2/omapfb/dss/dss.c

461

switch (clk_src) {

drivers/video/fbdev/omap2/omapfb/dss/dss.c

485

dss.lcd_clk_source[ix] = clk_src;

drivers/video/fbdev/omap2/omapfb/dss/dss.h

258

const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);

drivers/video/fbdev/omap2/omapfb/dss/dss.h

283

enum omap_dss_clk_source clk_src);

drivers/video/fbdev/omap2/omapfb/dss/dss.h

285

enum omap_dss_clk_source clk_src);

include/linux/can/platform/flexcan.h

20

u8 clk_src;

include/linux/dma/qcom-gpi-dma.h

44

u32 clk_src;

sound/firewire/bebob/bebob_maudio.c

171

avc_maudio_set_special_clk(struct snd_bebob *bebob, unsigned int clk_src,

sound/firewire/bebob/bebob_maudio.c

193

buf[6] = 0xff & clk_src; /* clock source */

sound/firewire/bebob/bebob_maudio.c

213

params->clk_src = buf[6];

sound/firewire/bebob/bebob_maudio.c

350

*id = params->clk_src;

sound/firewire/bebob/bebob_maudio.c

370

uval->value.enumerated.item[0] = params->clk_src;

sound/firewire/bebob/bebob_maudio.c

494

params->clk_src,

sound/firewire/bebob/bebob_maudio.c

558

params->clk_src,

sound/firewire/bebob/bebob_maudio.c

80

unsigned int clk_src;

sound/soc/codecs/adau1373.c

1191

adau1373_dai->clk_src = clk_id;

sound/soc/codecs/adau1373.c

28

unsigned int clk_src;

sound/soc/codecs/adau1373.c

852

if (adau1373->dais[dai].clk_src == ADAU1373_CLK_SRC_PLL1)

sound/soc/codecs/adau17x1.c

1068

adau->clk_src = ADAU17X1_CLK_SRC_PLL_AUTO;

sound/soc/codecs/adau17x1.c

406

switch (adau->clk_src) {

sound/soc/codecs/adau17x1.c

430

adau->clk_src = clk_id;

sound/soc/codecs/adau17x1.c

477

switch (adau->clk_src) {

sound/soc/codecs/adau17x1.c

978

if (adau->clk_src != ADAU17X1_CLK_SRC_MCLK)

sound/soc/codecs/adau17x1.h

40

enum adau17x1_clk_src clk_src;

sound/soc/codecs/adau1977.c

798

unsigned int clk_src;

sound/soc/codecs/adau1977.c

809

clk_src = 0;

sound/soc/codecs/adau1977.c

812

clk_src = ADAU1977_PLL_CLK_S;

sound/soc/codecs/adau1977.c

836

ADAU1977_PLL_CLK_S, clk_src);

sound/soc/codecs/adav80x.c

144

enum adav80x_clk_src clk_src;

sound/soc/codecs/adav80x.c

218

switch (adav80x->clk_src) {

sound/soc/codecs/adav80x.c

558

if (adav80x->clk_src != clk_id) {

sound/soc/codecs/adav80x.c

561

adav80x->clk_src = clk_id;

sound/soc/codecs/cs40l50-codec.c

105

(cfg << CS40L50_PLL_REFCLK_FREQ_SHIFT) | clk_src);

sound/soc/codecs/cs40l50-codec.c

77

static int cs40l50_swap_ext_clk(struct cs40l50_codec *codec, const unsigned int clk_src)

sound/soc/codecs/cs40l50-codec.c

82

switch (clk_src) {

sound/soc/codecs/da7213.c

1556

if ((da7213->clk_src == clk_id) && (da7213->mclk_rate == freq))

sound/soc/codecs/da7213.c

1584

da7213->clk_src = clk_id;

sound/soc/codecs/da7213.h

605

int clk_src;

sound/soc/codecs/da7219.c

1172

if ((da7219->clk_src == clk_id) && (da7219->mclk_rate == freq)) {

sound/soc/codecs/da7219.c

1200

da7219->clk_src = clk_id;

sound/soc/codecs/da7219.h

827

int clk_src;

sound/soc/codecs/nau8325.c

520

osr->clk_src << NAU8325_CLK_DAC_SRC_SFT);

sound/soc/codecs/nau8325.h

388

unsigned int clk_src;

sound/soc/codecs/nau8540.c

453

osr->clk_src << NAU8540_CLK_ADC_SRC_SFT);

sound/soc/codecs/nau8540.h

261

unsigned int clk_src;

sound/soc/codecs/nau8821.c

102

unsigned int clk_src;

sound/soc/codecs/nau8821.c

865

osr->clk_src << NAU8821_CLK_DAC_SRC_SFT);

sound/soc/codecs/nau8821.c

869

osr->clk_src << NAU8821_CLK_ADC_SRC_SFT);

sound/soc/codecs/nau8824.c

1100

osr->clk_src << NAU8824_CLK_DAC_SRC_SFT);

sound/soc/codecs/nau8824.c

1104

osr->clk_src << NAU8824_CLK_ADC_SRC_SFT);

sound/soc/codecs/nau8824.h

469

unsigned int clk_src;

sound/soc/codecs/nau8825.c

104

unsigned int clk_src;

sound/soc/codecs/nau8825.c

1300

osr->clk_src << NAU8825_CLK_DAC_SRC_SFT);

sound/soc/codecs/nau8825.c

1304

osr->clk_src << NAU8825_CLK_ADC_SRC_SFT);

sound/soc/codecs/rt274.c

808

unsigned int clk_src, mclk_en;

sound/soc/codecs/rt274.c

815

clk_src = RT274_CLK_SRC_MCLK;

sound/soc/codecs/rt274.c

819

clk_src = RT274_CLK_SRC_MCLK;

sound/soc/codecs/rt274.c

823

clk_src = RT274_CLK_SRC_PLL2;

sound/soc/codecs/rt274.c

827

clk_src = RT274_CLK_SRC_MCLK;

sound/soc/codecs/rt274.c

834

RT274_CLK_SRC_MASK, clk_src);

sound/soc/codecs/rt5640.c

2031

unsigned int filter_mask, unsigned int clk_src)

sound/soc/codecs/rt5640.c

2037

switch (clk_src) {

sound/soc/codecs/rt5640.c

2052

| (clk_src << RT5640_STO_DAC_M_SFT);

sound/soc/codecs/rt5640.c

2058

| (clk_src << RT5640_MDA_L_M_SFT);

sound/soc/codecs/rt5640.c

2064

| (clk_src << RT5640_MDA_R_M_SFT);

sound/soc/codecs/rt5640.c

2070

| (clk_src << RT5640_ADC_M_SFT);

sound/soc/codecs/rt5640.c

2076

| (clk_src << RT5640_MAD_L_M_SFT);

sound/soc/codecs/rt5640.c

2082

| (clk_src << RT5640_MAD_R_M_SFT);

sound/soc/codecs/rt5640.h

2186

unsigned int filter_mask, unsigned int clk_src);

sound/soc/codecs/rt5645.c

1010

| (clk_src << RT5645_DA_STO_CLK_SEL_SFT);

sound/soc/codecs/rt5645.c

1016

| (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);

sound/soc/codecs/rt5645.c

1022

| (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);

sound/soc/codecs/rt5645.c

1028

| (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);

sound/soc/codecs/rt5645.c

1034

| (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);

sound/soc/codecs/rt5645.c

1040

| (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);

sound/soc/codecs/rt5645.c

989

unsigned int filter_mask, unsigned int clk_src)

sound/soc/codecs/rt5645.c

996

switch (clk_src) {

sound/soc/codecs/rt5645.h

2205

unsigned int filter_mask, unsigned int clk_src);

sound/soc/codecs/rt5663.c

2174

unsigned int filter_mask, unsigned int clk_src)

sound/soc/codecs/rt5663.c

2182

switch (clk_src) {

sound/soc/codecs/rt5663.c

2193

asrc2_value |= clk_src << RT5663_DA_STO1_TRACK_SHIFT;

sound/soc/codecs/rt5663.c

2200

asrc3_value |= clk_src << RT5663_V2_AD_STO1_TRACK_SHIFT;

sound/soc/codecs/rt5663.c

2204

asrc2_value |= clk_src << RT5663_AD_STO1_TRACK_SHIFT;

sound/soc/codecs/rt5663.h

1126

unsigned int filter_mask, unsigned int clk_src);

sound/soc/codecs/rt5670.c

854

unsigned int filter_mask, unsigned int clk_src)

sound/soc/codecs/rt5670.c

859

if (clk_src > RT5670_CLK_SEL_SYS3)

sound/soc/codecs/rt5670.c

865

| (clk_src << RT5670_DA_STO_CLK_SEL_SFT);

sound/soc/codecs/rt5670.c

871

| (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT);

sound/soc/codecs/rt5670.c

877

| (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT);

sound/soc/codecs/rt5670.c

883

| (clk_src << RT5670_AD_STO1_CLK_SEL_SFT);

sound/soc/codecs/rt5670.c

889

| (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT);

sound/soc/codecs/rt5670.c

895

| (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT);

sound/soc/codecs/rt5670.c

901

| (clk_src << RT5670_UP_CLK_SEL_SFT);

sound/soc/codecs/rt5670.c

907

| (clk_src << RT5670_DOWN_CLK_SEL_SFT);

sound/soc/codecs/rt5670.h

1981

unsigned int filter_mask, unsigned int clk_src);

sound/soc/codecs/rt5677.c

1227

unsigned int filter_mask, unsigned int clk_src)

sound/soc/codecs/rt5677.c

1237

switch (clk_src) {

sound/soc/codecs/rt5677.c

1261

| (clk_src << RT5677_DA_STO_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1267

| (clk_src << RT5677_DA_MONO2L_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1273

| (clk_src << RT5677_DA_MONO2R_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1284

| (clk_src << RT5677_DA_MONO3L_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1290

| (clk_src << RT5677_DA_MONO3R_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1296

| (clk_src << RT5677_DA_MONO4L_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1302

| (clk_src << RT5677_DA_MONO4R_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1313

| (clk_src << RT5677_AD_STO1_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1319

| (clk_src << RT5677_AD_STO2_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1325

| (clk_src << RT5677_AD_STO3_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1331

| (clk_src << RT5677_AD_STO4_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1342

| (clk_src << RT5677_AD_MONOL_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1348

| (clk_src << RT5677_AD_MONOR_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1359

| (clk_src << RT5677_DSP_OB_0_3_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1365

| (clk_src << RT5677_DSP_OB_4_7_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1376

| ((clk_src - 1) << RT5677_I2S1_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1382

| ((clk_src - 1) << RT5677_I2S2_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1388

| ((clk_src - 1) << RT5677_I2S3_CLK_SEL_SFT);

sound/soc/codecs/rt5677.c

1394

| ((clk_src - 1) << RT5677_I2S4_CLK_SEL_SFT);

sound/soc/codecs/rt5677.h

1806

unsigned int filter_mask, unsigned int clk_src);

sound/soc/codecs/rt5682.c

840

unsigned int filter_mask, unsigned int clk_src)

sound/soc/codecs/rt5682.c

842

switch (clk_src) {

sound/soc/codecs/rt5682.c

855

clk_src << RT5682_FILTER_CLK_SEL_SFT);

sound/soc/codecs/rt5682.c

861

clk_src << RT5682_FILTER_CLK_SEL_SFT);

sound/soc/codecs/rt5682.h

1475

unsigned int filter_mask, unsigned int clk_src);

sound/soc/codecs/rt5682s.c

1056

unsigned int filter_mask, unsigned int clk_src)

sound/soc/codecs/rt5682s.c

1058

switch (clk_src) {

sound/soc/codecs/rt5682s.c

1070

RT5682S_FILTER_CLK_SEL_MASK, clk_src << RT5682S_FILTER_CLK_SEL_SFT);

sound/soc/codecs/rt5682s.c

1075

RT5682S_FILTER_CLK_SEL_MASK, clk_src << RT5682S_FILTER_CLK_SEL_SFT);

sound/soc/codecs/rt5682s.h

1490

unsigned int filter_mask, unsigned int clk_src);

sound/soc/fsl/fsl_micfil.c

1406

micfil->clk_src[MICFIL_AUDIO_PLL1] = micfil->pll8k_clk;

sound/soc/fsl/fsl_micfil.c

1407

micfil->clk_src[MICFIL_AUDIO_PLL2] = micfil->pll11k_clk;

sound/soc/fsl/fsl_micfil.c

1408

micfil->clk_src[MICFIL_CLK_EXT3] = devm_clk_get(&pdev->dev, "clkext3");

sound/soc/fsl/fsl_micfil.c

1409

if (IS_ERR(micfil->clk_src[MICFIL_CLK_EXT3]))

sound/soc/fsl/fsl_micfil.c

1410

micfil->clk_src[MICFIL_CLK_EXT3] = NULL;

sound/soc/fsl/fsl_micfil.c

1414

micfil->clk_src[MICFIL_AUDIO_PLL1],

sound/soc/fsl/fsl_micfil.c

1415

micfil->clk_src[MICFIL_AUDIO_PLL2],

sound/soc/fsl/fsl_micfil.c

1416

micfil->clk_src[MICFIL_CLK_EXT3],

sound/soc/fsl/fsl_micfil.c

66

struct clk *clk_src[MICFIL_CLK_SRC_NUM];

sound/soc/qcom/qdsp6/q6afe.c

1212

int clk_src, int clk_root,

sound/soc/qcom/qdsp6/q6afe.c

1230

ccfg.clk_src = clk_src;

sound/soc/qcom/qdsp6/q6afe.c

1239

ccfg.clk_src = clk_src;

sound/soc/qcom/qdsp6/q6afe.c

1251

cset.clk_attri = clk_src;

sound/soc/qcom/qdsp6/q6afe.c

474

u16 clk_src;

sound/soc/qcom/qdsp6/q6afe.h

266

int clk_src, int clk_root,

sound/soc/rockchip/rockchip_pdm.c

104

*clk_src = clk;

sound/soc/rockchip/rockchip_pdm.c

202

unsigned int clk_src, clk_out = 0;

sound/soc/rockchip/rockchip_pdm.c

211

clk_rate = get_pdm_clk(pdm, samplerate, &clk_src, &clk_out);

sound/soc/rockchip/rockchip_pdm.c

215

ret = clk_set_rate(pdm->clk, clk_src);

sound/soc/rockchip/rockchip_pdm.c

221

rational_best_approximation(clk_out, clk_src,

sound/soc/rockchip/rockchip_pdm.c

78

unsigned int *clk_src, unsigned int *clk_out)

sound/soc/rockchip/rockchip_pdm.c

97

*clk_src = clkref[i].clk;