arch/mips/ath25/ar2315.c

208

unsigned int clk_div;

arch/mips/ath25/ar2315.c

221

clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKM_DIV);

arch/mips/ath25/ar2315.c

222

clk_div = pllc_divide_table[clk_div];

arch/mips/ath25/ar2315.c

225

clk_div = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_CLKC_DIV);

arch/mips/ath25/ar2315.c

226

clk_div = pllc_divide_table[clk_div];

arch/mips/ath25/ar2315.c

230

clk_div = 1;

arch/mips/ath25/ar2315.c

237

return pllc_out / (clk_div * cpu_div);

arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c

63

jtgc.s.clk_div = clock_div;

arch/mips/include/asm/octeon/cvmx-ciu-defs.h

118

__BITFIELD_FIELD(uint64_t clk_div:3,

drivers/bus/sunxi-rsb.c

653

int clk_div, ret;

drivers/bus/sunxi-rsb.c

680

clk_div = p_clk_freq / rsb->clk_freq / 2;

drivers/bus/sunxi-rsb.c

681

if (!clk_div)

drivers/bus/sunxi-rsb.c

682

clk_div = 1;

drivers/bus/sunxi-rsb.c

683

else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1)

drivers/bus/sunxi-rsb.c

684

clk_div = RSB_CCR_MAX_CLK_DIV + 1;

drivers/bus/sunxi-rsb.c

686

clk_delay = clk_div >> 1;

drivers/bus/sunxi-rsb.c

690

dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2);

drivers/bus/sunxi-rsb.c

691

writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),

drivers/clk/berlin/berlin2-div.c

203

divider = clk_div[reg];

drivers/clk/berlin/berlin2-div.c

63

static u8 clk_div[] = { 1, 2, 4, 6, 8, 12, 1, 1 };

drivers/clk/clk-versaclock3.c

1075

for (i = 0; i < ARRAY_SIZE(clk_div); i++) {

drivers/clk/clk-versaclock3.c

1076

clk_div[i].regmap = regmap;

drivers/clk/clk-versaclock3.c

1077

ret = devm_clk_hw_register(dev, &clk_div[i].hw);

drivers/clk/clk-versaclock3.c

1080

clk_div[i].hw.init->name);

drivers/clk/clk-versaclock3.c

602

static struct vc3_hw_data clk_div[5];

drivers/clk/clk-versaclock3.c

606

{ .hw = &clk_div[VC3_DIV2].hw }

drivers/clk/clk-versaclock3.c

808

static struct vc3_hw_data clk_div[] = {

drivers/clk/clk-versaclock3.c

911

&clk_div[VC3_DIV5].hw,

drivers/clk/clk-versaclock3.c

912

&clk_div[VC3_DIV4].hw

drivers/clk/clk-versaclock3.c

926

&clk_div[VC3_DIV5].hw,

drivers/clk/clk-versaclock3.c

927

&clk_div[VC3_DIV4].hw

drivers/clk/clk-versaclock3.c

942

&clk_div[VC3_DIV2].hw,

drivers/clk/clk-versaclock3.c

943

&clk_div[VC3_DIV4].hw

drivers/clk/clk-versaclock3.c

958

&clk_div[VC3_DIV1].hw,

drivers/clk/clk-versaclock3.c

959

&clk_div[VC3_DIV3].hw

drivers/clk/clk-versaclock3.c

974

&clk_div[VC3_DIV1].hw,

drivers/clk/clk-versaclock3.c

975

&clk_div[VC3_DIV3].hw

drivers/clk/mxs/clk-div.c

28

static inline struct clk_div *to_clk_div(struct clk_hw *hw)

drivers/clk/mxs/clk-div.c

32

return container_of(divider, struct clk_div, divider);

drivers/clk/mxs/clk-div.c

38

struct clk_div *div = to_clk_div(hw);

drivers/clk/mxs/clk-div.c

46

struct clk_div *div = to_clk_div(hw);

drivers/clk/mxs/clk-div.c

54

struct clk_div *div = to_clk_div(hw);

drivers/clk/mxs/clk-div.c

73

struct clk_div *div;

drivers/clk/samsung/clk-cpu.c

441

struct clk_hw *clk_div, *clk_divp;

drivers/clk/samsung/clk-cpu.c

446

clk_div = clk_hw_get_parent(alt_parent);

drivers/clk/samsung/clk-cpu.c

447

if (!clk_div)

drivers/clk/samsung/clk-cpu.c

450

clk_divp = clk_hw_get_parent(clk_div);

drivers/dma/qcom/gpi.c

1647

tre->dword[2] = u32_encode_bits(i2c->clk_div, TRE_C0_CLK_DIV);

drivers/dma/qcom/gpi.c

1727

tre->dword[2] = u32_encode_bits(spi->clk_div, TRE_C0_CLK_DIV);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2280

struct dpll *clk_div)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2289

if (!bxt_find_best_dpll(crtc_state, clk_div))

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2292

drm_WARN_ON(display->drm, clk_div->m1 != 2);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2298

struct dpll *clk_div)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2303

*clk_div = bxt_dp_clk_val[0];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2306

*clk_div = bxt_dp_clk_val[i];

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2311

chv_calc_dpll_params(display->dpll.ref_clks.nssc, clk_div);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2313

drm_WARN_ON(display->drm, clk_div->vco == 0 ||

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2314

clk_div->dot != crtc_state->port_clock);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2318

const struct dpll *clk_div)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2323

int vco = clk_div->vco;

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2359

hw_state->ebb0 = PORT_PLL_P1(clk_div->p1) | PORT_PLL_P2(clk_div->p2);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2360

hw_state->pll0 = PORT_PLL_M2_INT(clk_div->m2 >> 22);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2361

hw_state->pll1 = PORT_PLL_N(clk_div->n);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2362

hw_state->pll2 = PORT_PLL_M2_FRAC(clk_div->m2 & 0x3fffff);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2364

if (clk_div->m2 & 0x3fffff)

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2407

struct dpll clk_div = {};

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2409

bxt_ddi_dp_pll_dividers(crtc_state, &clk_div);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2411

return bxt_ddi_set_dpll_hw_state(crtc_state, &clk_div);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2418

struct dpll clk_div = {};

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2421

bxt_ddi_hdmi_pll_dividers(crtc_state, &clk_div);

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

2423

ret = bxt_ddi_set_dpll_hw_state(crtc_state, &clk_div);

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

196

int clk_div;

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

208

clk_div = DIV_ROUND_CLOSEST_ULL(clk_get_rate(lcdc->clk_per),

drivers/gpu/drm/imx/lcdc/imx-lcdc.c

212

writel(FIELD_PREP(IMX21LCDC_LPCR_PCD, clk_div - 1) |

drivers/gpu/drm/pl111/pl111_display.c

492

container_of(hw, struct pl111_drm_dev_private, clk_div);

drivers/gpu/drm/pl111/pl111_display.c

511

container_of(hw, struct pl111_drm_dev_private, clk_div);

drivers/gpu/drm/pl111/pl111_display.c

544

struct clk_hw *div = &priv->clk_div;

drivers/gpu/drm/pl111/pl111_drm.h

147

struct clk_hw clk_div;

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

205

unsigned int clk_div = sdev->config.clk_div;

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

227

if (clk_div) {

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

232

lcdc_write(sdev, LDDCKPAT2R, (1 << (clk_div / 2)) - 1);

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

234

if (clk_div == 1)

drivers/gpu/drm/renesas/shmobile/shmob_drm_crtc.c

237

value |= clk_div;

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

213

sdev->config.clk_div = pdata->iface.clk_div;

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.c

273

.clk_div = 5,

drivers/gpu/drm/renesas/shmobile/shmob_drm_drv.h

25

unsigned int clk_div;

drivers/hwmon/g762.c

172

u8 clk_div, u8 gear_mult)

drivers/hwmon/g762.c

177

return (clk_freq * 30 * gear_mult) / ((cnt ? cnt : 1) * p * clk_div);

drivers/hwmon/g762.c

185

u8 clk_div, u8 gear_mult)

drivers/hwmon/g762.c

188

unsigned long f2 = p * clk_div;

drivers/i2c/busses/i2c-imx.c

204

struct imx_i2c_clk_pair *clk_div;

drivers/i2c/busses/i2c-imx.c

273

.clk_div = imx_i2c_clk_div,

drivers/i2c/busses/i2c-imx.c

283

.clk_div = imx_i2c_clk_div,

drivers/i2c/busses/i2c-imx.c

293

.clk_div = imx_i2c_clk_div,

drivers/i2c/busses/i2c-imx.c

303

.clk_div = vf610_i2c_clk_div,

drivers/i2c/busses/i2c-imx.c

312

.clk_div = s32g2_i2c_clk_div,

drivers/i2c/busses/i2c-imx.c

629

struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div;

drivers/i2c/busses/i2c-mt65xx.c

880

unsigned int clk_div;

drivers/i2c/busses/i2c-mt65xx.c

894

for (clk_div = 1; clk_div <= max_clk_div; clk_div++) {

drivers/i2c/busses/i2c-mt65xx.c

895

clk_src = parent_clk / clk_div;

drivers/i2c/busses/i2c-mt65xx.c

896

i2c->ac_timing.inter_clk_div = clk_div - 1;

drivers/i2c/busses/i2c-mt7621.c

259

i2c->clk_div = clk_get_rate(i2c->clk) / i2c->bus_freq - 1;

drivers/i2c/busses/i2c-mt7621.c

260

if (i2c->clk_div < 99)

drivers/i2c/busses/i2c-mt7621.c

261

i2c->clk_div = 99;

drivers/i2c/busses/i2c-mt7621.c

262

if (i2c->clk_div > SM0CTL0_CLK_DIV_MAX)

drivers/i2c/busses/i2c-mt7621.c

263

i2c->clk_div = SM0CTL0_CLK_DIV_MAX;

drivers/i2c/busses/i2c-mt7621.c

65

u32 clk_div;

drivers/i2c/busses/i2c-mt7621.c

96

iowrite32(((i2c->clk_div << 16) & SM0CTL0_CLK_DIV_MASK) | SM0CTL0_EN |

drivers/i2c/busses/i2c-pasemi-core.c

82

u32 val = (CTL_MTR | CTL_MRR | CTL_UJM | (smbus->clk_div & CTL_CLK_M));

drivers/i2c/busses/i2c-pasemi-core.h

18

unsigned int clk_div;

drivers/i2c/busses/i2c-pasemi-pci.c

43

smbus->clk_div = CLK_100K_DIV;

drivers/i2c/busses/i2c-pasemi-platform.c

32

data->smbus.clk_div = DIV_ROUND_UP(clk_rate, 16 * frequency);

drivers/i2c/busses/i2c-pasemi-platform.c

33

if (data->smbus.clk_div < 4)

drivers/i2c/busses/i2c-pasemi-platform.c

37

if (data->smbus.clk_div > 0xff)

drivers/i2c/busses/i2c-qcom-geni.c

154

u8 clk_div;

drivers/i2c/busses/i2c-qcom-geni.c

213

val = (itr->clk_div << CLK_DIV_SHFT) | SER_CLK_EN;

drivers/i2c/busses/i2c-qcom-geni.c

770

peripheral.clk_div = itr->clk_div;

drivers/i2c/busses/i2c-sun6i-p2wi.c

192

int clk_div;

drivers/i2c/busses/i2c-sun6i-p2wi.c

286

clk_div = parent_clk_freq / clk_freq;

drivers/i2c/busses/i2c-sun6i-p2wi.c

287

if (!clk_div) {

drivers/i2c/busses/i2c-sun6i-p2wi.c

291

clk_div = 1;

drivers/i2c/busses/i2c-sun6i-p2wi.c

292

} else if (clk_div > P2WI_CCR_MAX_CLK_DIV) {

drivers/i2c/busses/i2c-sun6i-p2wi.c

296

clk_div = P2WI_CCR_MAX_CLK_DIV;

drivers/i2c/busses/i2c-sun6i-p2wi.c

299

writel(P2WI_CCR_SDA_OUT_DELAY(1) | P2WI_CCR_CLK_DIV(clk_div),

drivers/iio/adc/meson_saradc.c

352

struct clk_divider clk_div;

drivers/iio/adc/meson_saradc.c

755

priv->clk_div.reg = base + MESON_SAR_ADC_REG3;

drivers/iio/adc/meson_saradc.c

756

priv->clk_div.shift = MESON_SAR_ADC_REG3_ADC_CLK_DIV_SHIFT;

drivers/iio/adc/meson_saradc.c

757

priv->clk_div.width = MESON_SAR_ADC_REG3_ADC_CLK_DIV_WIDTH;

drivers/iio/adc/meson_saradc.c

758

priv->clk_div.hw.init = &init;

drivers/iio/adc/meson_saradc.c

759

priv->clk_div.flags = 0;

drivers/iio/adc/meson_saradc.c

761

priv->adc_div_clk = devm_clk_register(dev, &priv->clk_div.hw);

drivers/iio/adc/sophgo-cv1800b-adc.c

127

unsigned int clk_div = (1 + FIELD_GET(CV1800B_MASK_CLKDIV, status_reg));

drivers/iio/adc/sophgo-cv1800b-adc.c

128

unsigned int freq = clk_get_rate(saradc->clk) / clk_div;

drivers/iio/adc/stm32-dfsdm-core.c

143

unsigned int clk_div = priv->spi_clk_out_div, clk_src;

drivers/iio/adc/stm32-dfsdm-core.c

162

DFSDM_CHCFGR1_CKOUTDIV(clk_div));

drivers/iio/adc/vf610_adc.c

143

int clk_div;

drivers/iio/adc/vf610_adc.c

197

adc_feature->clk_div = 1 << fls(divisor + 1);

drivers/iio/adc/vf610_adc.c

200

adc_feature->clk_div = 8;

drivers/iio/adc/vf610_adc.c

203

adck_rate = ipg_rate / adc_feature->clk_div;

drivers/iio/adc/vf610_adc.c

368

switch (adc_feature->clk_div) {

drivers/leds/leds-bcm6358.c

153

u32 clk_div;

drivers/leds/leds-bcm6358.c

169

of_property_read_u32(np, "brcm,clk-div", &clk_div);

drivers/leds/leds-bcm6358.c

170

switch (clk_div) {

drivers/media/dvb-frontends/stv6110.c

214

priv->regs[RSTV6110_CTRL2] |= (priv->clk_div << 6);

drivers/media/dvb-frontends/stv6110.c

29

u8 clk_div;

drivers/media/dvb-frontends/stv6110.c

398

reg0[2] |= (config->clk_div << 6);

drivers/media/dvb-frontends/stv6110.c

418

priv->clk_div = config->clk_div;

drivers/media/dvb-frontends/stv6110.h

31

u8 clk_div; /* divisor value for the output clock */

drivers/media/dvb-frontends/stv6110x.c

345

switch (stv6110x->config->clk_div) {

drivers/media/dvb-frontends/stv6110x.h

17

u8 clk_div; /* divisor value for the output clock */

drivers/media/i2c/mt9p031.c

135

unsigned int clk_div;

drivers/media/i2c/mt9p031.c

206

MT9P031_PIXEL_CLOCK_DIVIDE(mt9p031->clk_div));

drivers/media/i2c/mt9p031.c

256

mt9p031->clk_div = min_t(unsigned int, div, 64);

drivers/media/i2c/rj54n1cb0c.c

1339

rj54n1->clk_div = clk_div;

drivers/media/i2c/rj54n1cb0c.c

1349

(clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1);

drivers/media/i2c/rj54n1cb0c.c

157

struct rj54n1_clock_div clk_div;

drivers/media/i2c/rj54n1cb0c.c

417

static const struct rj54n1_clock_div clk_div = {

drivers/media/i2c/rj54n1cb0c.c

839

rj54n1->clk_div.ratio_tg);

drivers/media/i2c/rj54n1cb0c.c

842

rj54n1->clk_div.ratio_t);

drivers/media/i2c/rj54n1cb0c.c

845

rj54n1->clk_div.ratio_r);

drivers/media/i2c/rj54n1cb0c.c

858

rj54n1->clk_div.ratio_op);

drivers/media/i2c/rj54n1cb0c.c

861

rj54n1->clk_div.ratio_o);

drivers/media/pci/cx23885/cx23885-dvb.c

484

.clk_div = 1,

drivers/media/pci/cx23885/cx23885-dvb.c

491

.clk_div = 1,

drivers/media/pci/ddbridge/ddbridge-core.c

1102

.clk_div = 1,

drivers/media/pci/ddbridge/ddbridge-core.c

1108

.clk_div = 1,

drivers/media/pci/ngene/ngene-cards.c

1016

.clk_div = 1,

drivers/media/pci/ngene/ngene-cards.c

1022

.clk_div = 1,

drivers/media/pci/solo6x10/solo6x10-g723.c

55

int clk_div;

drivers/media/pci/solo6x10/solo6x10-g723.c

57

clk_div = (solo_dev->clock_mhz * 1000000)

drivers/media/pci/solo6x10/solo6x10-g723.c

62

| SOLO_AUDIO_CLK_DIV(clk_div));

drivers/media/pci/ttpci/budget.c

477

.clk_div = 2,

drivers/media/usb/dvb-usb-v2/anysee.c

349

.clk_div = 1,

drivers/media/usb/dvb-usb/dw2102.c

1174

.clk_div = 1,

drivers/media/usb/dvb-usb/technisat-usb2.c

515

.clk_div = 2,

drivers/mfd/fsl-imx25-tsadc.c

101

unsigned clk_div;

drivers/mfd/fsl-imx25-tsadc.c

113

clk_div = DIV_ROUND_UP(clk_get_rate(tsadc->clk), 1750000);

drivers/mfd/fsl-imx25-tsadc.c

114

dev_dbg(&pdev->dev, "Setting up ADC clock divider to %u\n", clk_div);

drivers/mfd/fsl-imx25-tsadc.c

117

clk_div -= 2;

drivers/mfd/fsl-imx25-tsadc.c

118

clk_div /= 2;

drivers/mfd/fsl-imx25-tsadc.c

124

clk_div = max_t(unsigned, 4, clk_div);

drivers/mfd/fsl-imx25-tsadc.c

127

clk_get_rate(tsadc->clk) / (2 * clk_div + 2));

drivers/mfd/fsl-imx25-tsadc.c

131

MX25_TGCR_ADCCLKCFG(clk_div));

drivers/mfd/ti_am335x_tscadc.c

237

tscadc->clk_div = (clk_get_rate(clk) / tscadc->data->target_clk_rate) - 1;

drivers/mfd/ti_am335x_tscadc.c

238

regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);

drivers/mfd/ti_am335x_tscadc.c

340

regmap_write(tscadc->regmap, REG_CLKDIV, tscadc->clk_div);

drivers/mmc/host/alcor.c

658

u8 clk_div = 0;

drivers/mmc/host/alcor.c

679

clk_div = tmp_div;

drivers/mmc/host/alcor.c

683

clk_src |= ((clk_div - 1) << 8);

drivers/mmc/host/alcor.c

687

clock, tmp_clock, clk_div, clk_src);

drivers/mmc/host/dw_mmc-exynos.c

580

u32 clk_div, tmout;

drivers/mmc/host/dw_mmc-exynos.c

584

clk_div = (mci_readl(host, CLKDIV) & 0xFF) * 2;

drivers/mmc/host/dw_mmc-exynos.c

585

if (clk_div == 0)

drivers/mmc/host/dw_mmc-exynos.c

586

clk_div = 1;

drivers/mmc/host/dw_mmc-exynos.c

589

tmp = DIV_ROUND_UP_ULL(tmp, clk_div);

drivers/mmc/host/dw_mmc.c

1289

u32 clk_div, tmout;

drivers/mmc/host/dw_mmc.c

1295

clk_div = (mci_readl(host, CLKDIV) & 0xFF) * 2;

drivers/mmc/host/dw_mmc.c

1296

if (clk_div == 0)

drivers/mmc/host/dw_mmc.c

1297

clk_div = 1;

drivers/mmc/host/dw_mmc.c

1300

tmp = DIV_ROUND_UP_ULL(tmp, clk_div);

drivers/mmc/host/tifm_sd.c

595

((1000000000UL / host->clk_freq) * host->clk_div);

drivers/mmc/host/tifm_sd.c

827

host->clk_div = clk_div1;

drivers/mmc/host/tifm_sd.c

833

host->clk_div = clk_div2;

drivers/mmc/host/tifm_sd.c

839

host->clk_div = 0;

drivers/mmc/host/tifm_sd.c

841

host->clk_div &= TIFM_MMCSD_CLKMASK;

drivers/mmc/host/tifm_sd.c

842

writel(host->clk_div

drivers/mmc/host/tifm_sd.c

883

host->clk_div = 61;

drivers/mmc/host/tifm_sd.c

886

writel(host->clk_div | TIFM_MMCSD_POWER,

drivers/mmc/host/tifm_sd.c

905

writel(host->clk_div | TIFM_MMCSD_POWER,

drivers/mmc/host/tifm_sd.c

98

unsigned int clk_div;

drivers/mtd/devices/st_spi_fsm.c

1899

uint32_t clk_div;

drivers/mtd/devices/st_spi_fsm.c

1907

clk_div = 2 * DIV_ROUND_UP(emi_freq, 2 * spi_freq);

drivers/mtd/devices/st_spi_fsm.c

1908

if (clk_div < 2)

drivers/mtd/devices/st_spi_fsm.c

1909

clk_div = 2;

drivers/mtd/devices/st_spi_fsm.c

1910

else if (clk_div > 128)

drivers/mtd/devices/st_spi_fsm.c

1911

clk_div = 128;

drivers/mtd/devices/st_spi_fsm.c

1919

if (clk_div <= 4)

drivers/mtd/devices/st_spi_fsm.c

1921

else if (clk_div <= 10)

drivers/mtd/devices/st_spi_fsm.c

1924

fsm->fifo_dir_delay = DIV_ROUND_UP(clk_div, 10);

drivers/mtd/devices/st_spi_fsm.c

1927

emi_freq, spi_freq, clk_div);

drivers/mtd/devices/st_spi_fsm.c

1929

writel(clk_div, fsm->base + SPI_CLOCKDIV);

drivers/net/ethernet/microchip/sparx5/sparx5_main.c

483

u32 clk_div, clk_period, pol_upd_int, idx;

drivers/net/ethernet/microchip/sparx5/sparx5_main.c

546

clk_div = 10;

drivers/net/ethernet/microchip/sparx5/sparx5_main.c

550

clk_div = 5;

drivers/net/ethernet/microchip/sparx5/sparx5_main.c

554

clk_div = 4;

drivers/net/ethernet/microchip/sparx5/sparx5_main.c

565

spx5_rmw(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_DIV_SET(clk_div) |

drivers/net/ethernet/ti/davinci_mdio.c

106

u32 clk_div;

drivers/net/ethernet/ti/davinci_mdio.c

119

data->clk_div = div;

drivers/net/ethernet/ti/davinci_mdio.c

143

writel(data->clk_div | CONTROL_ENABLE, &data->regs->control);

drivers/net/ethernet/ti/davinci_mdio.c

154

reg |= data->clk_div;

drivers/net/ethernet/xilinx/ll_temac_mdio.c

70

int clk_div;

drivers/net/ethernet/xilinx/ll_temac_mdio.c

82

clk_div = 0x3f; /* worst-case default setting */

drivers/net/ethernet/xilinx/ll_temac_mdio.c

84

clk_div = bus_hz / (2500 * 1000 * 2) - 1;

drivers/net/ethernet/xilinx/ll_temac_mdio.c

85

if (clk_div < 1)

drivers/net/ethernet/xilinx/ll_temac_mdio.c

86

clk_div = 1;

drivers/net/ethernet/xilinx/ll_temac_mdio.c

87

if (clk_div > 0x3f)

drivers/net/ethernet/xilinx/ll_temac_mdio.c

88

clk_div = 0x3f;

drivers/net/ethernet/xilinx/ll_temac_mdio.c

94

temac_indirect_out32(lp, XTE_MC_OFFSET, 1 << 6 | clk_div);

drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c

179

u32 clk_div;

drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c

240

clk_div = (host_clock / (mdio_freq * 2)) - 1;

drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c

247

clk_div++;

drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c

250

if (clk_div & ~XAE_MDIO_MC_CLOCK_DIVIDE_MAX) {

drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c

254

lp->mii_clk_div = (u8)clk_div;

drivers/pwm/pwm-crc.c

100

int clk_div = crc_pwm_calc_clk_div(state->period);

drivers/pwm/pwm-crc.c

104

clk_div | pwm_output_enable);

drivers/pwm/pwm-crc.c

127

unsigned int clk_div, clk_div_reg, duty_cycle_reg;

drivers/pwm/pwm-crc.c

142

clk_div = (clk_div_reg & ~PWM_OUTPUT_ENABLE) + 1;

drivers/pwm/pwm-crc.c

145

DIV_ROUND_UP(clk_div * NSEC_PER_USEC * 256, PWM_BASE_CLK_MHZ);

drivers/pwm/pwm-crc.c

42

int clk_div;

drivers/pwm/pwm-crc.c

44

clk_div = PWM_BASE_CLK_MHZ * period_ns / (256 * NSEC_PER_USEC);

drivers/pwm/pwm-crc.c

46

if (clk_div > 0)

drivers/pwm/pwm-crc.c

47

clk_div--;

drivers/pwm/pwm-crc.c

49

return clk_div;

drivers/pwm/pwm-mtk-disp.c

118

clk_div = mul_u64_u64_div_u64(state->period, rate, NSEC_PER_SEC) >>

drivers/pwm/pwm-mtk-disp.c

120

if (clk_div > PWM_CLKDIV_MAX) {

drivers/pwm/pwm-mtk-disp.c

128

div = NSEC_PER_SEC * (clk_div + 1);

drivers/pwm/pwm-mtk-disp.c

151

clk_div << PWM_CLKDIV_SHIFT);

drivers/pwm/pwm-mtk-disp.c

178

u32 clk_div, pwm_en, con0, con1;

drivers/pwm/pwm-mtk-disp.c

209

clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0);

drivers/pwm/pwm-mtk-disp.c

215

state->period = DIV64_U64_ROUND_UP(period * (clk_div + 1) * NSEC_PER_SEC, rate);

drivers/pwm/pwm-mtk-disp.c

217

state->duty_cycle = DIV64_U64_ROUND_UP(high_width * (clk_div + 1) * NSEC_PER_SEC,

drivers/pwm/pwm-mtk-disp.c

73

u32 clk_div, period, high_width, value;

drivers/rtc/rtc-s32g.c

204

switch (priv->rtc_data->clk_div) {

drivers/rtc/rtc-s32g.c

314

priv->rtc_hz = DIV_ROUND_UP(rtc_hz, priv->rtc_data->clk_div);

drivers/rtc/rtc-s32g.c

70

u32 clk_div;

drivers/rtc/rtc-s32g.c

75

.clk_div = DIV512_32,

drivers/spi/spi-aspeed-smc.c

863

u32 clk_div = data->get_clk_div(chip, spi->max_speed_hz);

drivers/spi/spi-aspeed-smc.c

867

ctrl_val |= clk_div;

drivers/spi/spi-axi-spi-engine.c

306

unsigned int clk_div, max_hz = msg->spi->controller->max_speed_hz;

drivers/spi/spi-axi-spi-engine.c

317

clk_div = DIV_ROUND_UP(max_hz, xfer->speed_hz);

drivers/spi/spi-axi-spi-engine.c

318

xfer->effective_speed_hz = max_hz / min(clk_div, 256U);

drivers/spi/spi-axi-spi-engine.c

375

int clk_div, new_clk_div, inst_ns;

drivers/spi/spi-axi-spi-engine.c

386

clk_div = 1;

drivers/spi/spi-axi-spi-engine.c

435

if (new_clk_div != clk_div) {

drivers/spi/spi-axi-spi-engine.c

436

clk_div = new_clk_div;

drivers/spi/spi-axi-spi-engine.c

440

clk_div - 1));

drivers/spi/spi-axi-spi-engine.c

481

if (clk_div != 1)

drivers/spi/spi-dw-core.c

321

u16 clk_div;

drivers/spi/spi-dw-core.c

343

clk_div = (DIV_ROUND_UP(dws->max_freq, cfg->freq) + 1) & 0xfffe;

drivers/spi/spi-dw-core.c

344

speed_hz = dws->max_freq / clk_div;

drivers/spi/spi-dw-core.c

347

dw_spi_set_clk(dws, clk_div);

drivers/spi/spi-geni-qcom.c

120

unsigned int *clk_div)

drivers/spi/spi-geni-qcom.c

135

*clk_div = DIV_ROUND_UP(sclk_freq, mas->oversampling * speed_hz);

drivers/spi/spi-geni-qcom.c

136

actual_hz = sclk_freq / (mas->oversampling * *clk_div);

drivers/spi/spi-geni-qcom.c

139

actual_hz, sclk_freq, *clk_idx, *clk_div);

drivers/spi/spi-geni-qcom.c

437

&peripheral.clk_src, &peripheral.clk_div);

drivers/spi/spi-hisi-kunpeng.c

117

u16 clk_div; /* baud rate divider */

drivers/spi/spi-hisi-kunpeng.c

278

if (chip->clk_div % chip->div_pre == 0)

drivers/spi/spi-hisi-kunpeng.c

284

if (chip->div_pre > chip->clk_div)

drivers/spi/spi-hisi-kunpeng.c

285

chip->div_pre = chip->clk_div;

drivers/spi/spi-hisi-kunpeng.c

287

chip->div_post = (chip->clk_div / chip->div_pre) - 1;

drivers/spi/spi-hisi-kunpeng.c

296

chip->clk_div = DIV_ROUND_UP(host->max_speed_hz, speed_hz) + 1;

drivers/spi/spi-hisi-kunpeng.c

297

chip->clk_div &= 0xfffe;

drivers/spi/spi-hisi-kunpeng.c

298

if (chip->clk_div > CLK_DIV_MAX)

drivers/spi/spi-hisi-kunpeng.c

299

chip->clk_div = CLK_DIV_MAX;

drivers/spi/spi-hisi-kunpeng.c

301

effective_speed = host->max_speed_hz / chip->clk_div;

drivers/spi/spi-kspi2.c

191

u8 clk_div;

drivers/spi/spi-kspi2.c

207

clk_div = kspi2_calc_minimal_divider(kspi, max_speed_hz);

drivers/spi/spi-kspi2.c

208

kspi2_write_control_reg(kspi, clk_div, KSPI2_CONTROL_CLK_DIV_MASK);

drivers/spi/spi-microchip-core-spi.c

231

u32 clk_div;

drivers/spi/spi-microchip-core-spi.c

242

clk_div = DIV_ROUND_UP(pclk_hz, 2 * target_hz) - 1;

drivers/spi/spi-microchip-core-spi.c

244

if (clk_div > 0xFF)

drivers/spi/spi-microchip-core-spi.c

247

spi_hz = pclk_hz / (2 * (clk_div + 1));

drivers/spi/spi-microchip-core-spi.c

252

writeb(clk_div, spi->regs + MCHP_CORESPI_REG_CLK_DIV);

drivers/spi/spi-pxa2xx.c

1013

cr0 = pxa2xx_configure_sscr0(drv_data, clk_div, bits);

drivers/spi/spi-pxa2xx.c

293

u32 clk_div, u8 bits)

drivers/spi/spi-pxa2xx.c

297

return clk_div

drivers/spi/spi-pxa2xx.c

301

return clk_div

drivers/spi/spi-pxa2xx.c

910

unsigned int clk_div;

drivers/spi/spi-pxa2xx.c

914

clk_div = quark_x1000_get_clk_div(rate, &chip->dds_rate);

drivers/spi/spi-pxa2xx.c

917

clk_div = ssp_get_clk_div(drv_data, rate);

drivers/spi/spi-pxa2xx.c

920

return clk_div << 8;

drivers/spi/spi-pxa2xx.c

942

u32 clk_div;

drivers/spi/spi-pxa2xx.c

972

clk_div = pxa2xx_ssp_get_clk_div(drv_data, speed);

drivers/spi/spi-s3c64xx.c

1010

div = sdd->port_conf->clk_div;

drivers/spi/spi-s3c64xx.c

1514

.clk_div = 2,

drivers/spi/spi-s3c64xx.c

1523

.clk_div = 2,

drivers/spi/spi-s3c64xx.c

1533

.clk_div = 2,

drivers/spi/spi-s3c64xx.c

1545

.clk_div = 2,

drivers/spi/spi-s3c64xx.c

1557

.clk_div = 2,

drivers/spi/spi-s3c64xx.c

1569

.clk_div = 4,

drivers/spi/spi-s3c64xx.c

1583

.clk_div = 4,

drivers/spi/spi-s3c64xx.c

1597

.clk_div = 2,

drivers/spi/spi-s3c64xx.c

1609

.clk_div = 4,

drivers/spi/spi-s3c64xx.c

172

int clk_div;

drivers/spi/spi-s3c64xx.c

700

int div = sdd->port_conf->clk_div;

drivers/spi/spi-sprd.c

657

u32 clk_div = DIV_ROUND_UP(ss->src_clk, speed_hz << 1) - 1;

drivers/spi/spi-sprd.c

660

ss->hw_speed_hz = (ss->src_clk >> 1) / (clk_div + 1);

drivers/spi/spi-sprd.c

661

writel_relaxed(clk_div, ss->base + SPRD_SPI_CLKD);

drivers/spi/spi-ti-qspi.c

173

int clk_div;

drivers/spi/spi-ti-qspi.c

177

clk_div = DIV_ROUND_UP(clk_rate, speed_hz) - 1;

drivers/spi/spi-ti-qspi.c

178

clk_div = clamp(clk_div, 0, QSPI_CLK_DIV_MAX);

drivers/spi/spi-ti-qspi.c

179

dev_dbg(qspi->dev, "hz: %d, clock divider %d\n", speed_hz, clk_div);

drivers/spi/spi-ti-qspi.c

183

clk_ctrl_new = QSPI_CLK_EN | clk_div;

drivers/tty/serial/qcom_geni_serial.c

1259

unsigned int clk_div;

drivers/tty/serial/qcom_geni_serial.c

1277

clk_div = DIV_ROUND_UP(clk_rate, baud * sampling_rate);

drivers/tty/serial/qcom_geni_serial.c

1279

if (clk_div > (CLK_DIV_MSK >> CLK_DIV_SHFT)) {

drivers/tty/serial/qcom_geni_serial.c

1280

dev_err(port->se.dev, "Calculated clock divider %u exceeds maximum\n", clk_div);

drivers/tty/serial/qcom_geni_serial.c

1285

baud * sampling_rate, clk_rate, clk_div, clk_idx);

drivers/tty/serial/qcom_geni_serial.c

1291

ser_clk_cfg |= clk_div << CLK_DIV_SHFT;

drivers/usb/dwc3/dwc3-octeon.c

250

static const uint8_t clk_div[] = { 1, 2, 4, 6, 8, 16, 24, 32 };

drivers/usb/dwc3/dwc3-octeon.c

253

while (div < ARRAY_SIZE(clk_div)) {

drivers/usb/dwc3/dwc3-octeon.c

254

uint64_t rate = octeon_get_io_clock_rate() / clk_div[div];

drivers/usb/serial/ch341.c

181

unsigned int fact, div, clk_div;

drivers/usb/serial/ch341.c

205

clk_div = CH341_CLK_DIV(ps, fact);

drivers/usb/serial/ch341.c

206

div = CH341_CLKRATE / (clk_div * speed);

drivers/usb/serial/ch341.c

215

clk_div *= 2;

drivers/usb/serial/ch341.c

226

if (16 * CH341_CLKRATE / (clk_div * div) - 16 * speed >=

drivers/usb/serial/ch341.c

227

16 * speed - 16 * CH341_CLKRATE / (clk_div * (div + 1)))

drivers/video/fbdev/omap/hwa742.c

654

t->clk_div = div;

drivers/video/fbdev/omap/hwa742.c

702

t->clk_div = div;

drivers/video/fbdev/omap/omapfb.h

103

int clk_div;

drivers/video/fbdev/omap/sossi.c

124

int div = t->clk_div;

drivers/video/fbdev/omap/sossi.c

175

int div = t->clk_div;

drivers/video/fbdev/omap/sossi.c

258

_set_timing(sossi.clk_div,

drivers/video/fbdev/omap/sossi.c

317

int div = t->clk_div;

drivers/video/fbdev/omap/sossi.c

348

sossi.clk_div = t->tim[4];

drivers/video/fbdev/omap/sossi.c

60

int clk_div;

include/linux/dma/qcom-gpi-dma.h

43

u32 clk_div;

include/linux/dma/qcom-gpi-dma.h

77

u16 clk_div;

include/linux/mfd/ti_am335x_tscadc.h

169

unsigned int clk_div;

include/linux/platform_data/shmob_drm.h

29

unsigned int clk_div;

sound/soc/codecs/lm49453.c

1111

u16 clk_div = 0;

sound/soc/codecs/lm49453.c

1120

clk_div = 256;

sound/soc/codecs/lm49453.c

1125

clk_div = 216;

sound/soc/codecs/lm49453.c

1128

clk_div = 127;

sound/soc/codecs/lm49453.c

1134

snd_soc_component_write(component, LM49453_P0_ADC_CLK_DIV_REG, clk_div);

sound/soc/codecs/lm49453.c

1135

snd_soc_component_write(component, LM49453_P0_DAC_HP_CLK_DIV_REG, clk_div);

sound/soc/codecs/lpass-va-macro.c

618

u8 clk_div;

sound/soc/codecs/lpass-va-macro.c

656

clk_div = va->dmic_clk_div;

sound/soc/codecs/lpass-va-macro.c

665

clk_div << CDC_VA_DMIC_CLK_SEL_SHFT);

sound/soc/codecs/lpass-va-macro.c

670

if (*dmic_clk_div > clk_div) {

sound/soc/codecs/lpass-va-macro.c

677

clk_div << CDC_VA_DMIC_CLK_SEL_SHFT);

sound/soc/codecs/lpass-va-macro.c

683

clk_div = *dmic_clk_div;

sound/soc/codecs/lpass-va-macro.c

686

*dmic_clk_div = clk_div;

sound/soc/codecs/lpass-va-macro.c

692

clk_div = 0;

sound/soc/codecs/lpass-va-macro.c

695

clk_div << CDC_VA_DMIC_CLK_SEL_SHFT);

sound/soc/codecs/lpass-va-macro.c

697

clk_div = va->dmic_clk_div;

sound/soc/codecs/lpass-va-macro.c

698

if (*dmic_clk_div > clk_div) {

sound/soc/codecs/lpass-va-macro.c

699

clk_div = va->dmic_clk_div;

sound/soc/codecs/lpass-va-macro.c

706

clk_div << CDC_VA_DMIC_CLK_SEL_SHFT);

sound/soc/codecs/lpass-va-macro.c

712

clk_div = *dmic_clk_div;

sound/soc/codecs/lpass-va-macro.c

715

*dmic_clk_div = clk_div;

sound/soc/codecs/nau8821.c

847

unsigned int val_len = 0, ctrl_val, bclk_fs, clk_div;

sound/soc/codecs/nau8821.c

878

clk_div = 3;

sound/soc/codecs/nau8821.c

880

clk_div = 2;

sound/soc/codecs/nau8821.c

882

clk_div = 1;

sound/soc/codecs/nau8821.c

888

(clk_div << NAU8821_I2S_LRC_DIV_SFT) | clk_div);

sound/soc/fsl/fsl_micfil.c

864

int clk_div = 8, mclk_rate, div_multiply_k;

sound/soc/fsl/fsl_micfil.c

889

div_multiply_k = clk_div >> 1;

sound/soc/fsl/fsl_micfil.c

893

div_multiply_k = clk_div << 1;

sound/soc/fsl/fsl_micfil.c

896

div_multiply_k = clk_div << 2;

sound/soc/fsl/fsl_micfil.c

901

div_multiply_k = clk_div;

sound/soc/fsl/fsl_micfil.c

915

mclk_rate = rate * clk_div * osr * 8;

sound/soc/fsl/fsl_micfil.c

932

FIELD_PREP(MICFIL_CTRL2_CLKDIV, clk_div) |

sound/soc/rockchip/rockchip_pdm.c

201

unsigned int clk_rate, clk_div, samplerate;

sound/soc/rockchip/rockchip_pdm.c

237

clk_div = n / m;

sound/soc/rockchip/rockchip_pdm.c

238

if (clk_div >= 40)

sound/soc/rockchip/rockchip_pdm.c

240

else if (clk_div <= 35)

sound/soc/sti/uniperif_player.c

316

int clk_div;

sound/soc/sti/uniperif_player.c

318

clk_div = player->mclk / runtime->rate;

sound/soc/sti/uniperif_player.c

321

if ((clk_div % 128) || (clk_div <= 0)) {

sound/soc/sti/uniperif_player.c

323

__func__, clk_div);

sound/soc/sti/uniperif_player.c

398

SET_UNIPERIF_CTRL_DIVIDER(player, clk_div / 128);

sound/soc/sti/uniperif_player.c

419

int output_frame_size, slot_width, clk_div;

sound/soc/sti/uniperif_player.c

430

clk_div = player->mclk / runtime->rate;

sound/soc/sti/uniperif_player.c

435

if ((slot_width == 32) && (clk_div % 128)) {

sound/soc/sti/uniperif_player.c

440

if ((slot_width == 16) && (clk_div % 64)) {

sound/soc/sti/uniperif_player.c

487

SET_UNIPERIF_CTRL_DIVIDER(player, clk_div / (2 * output_frame_size));

sound/soc/ti/davinci-i2s.c

159

int clk_div;

sound/soc/ti/davinci-i2s.c

452

dev->clk_div = div;

sound/soc/ti/davinci-i2s.c

463

unsigned int clk_div, freq, framesize;

sound/soc/ti/davinci-i2s.c

518

clk_div = 256;

sound/soc/ti/davinci-i2s.c

520

framesize = (freq / (--clk_div)) /

sound/soc/ti/davinci-i2s.c

524

(clk_div));

sound/soc/ti/davinci-i2s.c

525

clk_div--;

sound/soc/ti/davinci-i2s.c

529

clk_div = freq / (mcbsp_word_length * 16) /

sound/soc/ti/davinci-i2s.c

534

clk_div &= 0xFF;

sound/soc/ti/davinci-i2s.c

535

srgr |= clk_div;

sound/soc/ti/davinci-i2s.c

539

clk_div = dev->clk_div - 1;

sound/soc/ti/davinci-i2s.c

542

clk_div &= 0xFF;

sound/soc/ti/davinci-i2s.c

543

srgr |= clk_div;

sound/soc/ti/davinci-i2s.c

553

clk_div = freq / (params->rate_num * params->rate_den)

sound/soc/ti/davinci-i2s.c

556

clk_div = freq / (mcbsp_word_length * 16) /

sound/soc/ti/davinci-i2s.c

559

clk_div &= 0xFF;

sound/soc/ti/davinci-i2s.c

560

srgr |= clk_div;

sound/soc/ti/omap-dmic.c

194

dmic->clk_div = omap_dmic_select_divider(dmic, params_rate(params));

sound/soc/ti/omap-dmic.c

195

if (dmic->clk_div < 0) {

sound/soc/ti/omap-dmic.c

249

ctrl |= OMAP_DMIC_CLK_DIV(dmic->clk_div);

sound/soc/ti/omap-dmic.c

41

int clk_div;

sound/soc/ti/omap-mcbsp-priv.h

276

int clk_div;

sound/soc/ti/omap-mcbsp.c

1032

div = mcbsp->clk_div ? mcbsp->clk_div : 1;

sound/soc/ti/omap-mcbsp.c

1188

mcbsp->clk_div = div;

sound/soc/xilinx/xlnx_spdif.c

109

u32 val, clk_div, clk_cfg;

sound/soc/xilinx/xlnx_spdif.c

112

clk_div = DIV_ROUND_CLOSEST(ctx->aclk, MAX_CHANNELS * AES_SAMPLE_WIDTH *

sound/soc/xilinx/xlnx_spdif.c

115

switch (clk_div) {