arch/arm/mach-imx/avic.c

107

struct irq_chip_type *ct = gc->chip_types;

arch/arm/mach-imx/avic.c

135

ct = gc->chip_types;

arch/arm/mach-imx/avic.c

85

struct irq_chip_type *ct = gc->chip_types;

arch/arm/mach-imx/tzic.c

110

ct = gc->chip_types;

arch/arm/mach-omap1/irq.c

173

ct = gc->chip_types;

arch/arm/mach-omap2/prm_common.c

331

ct = gc->chip_types;

arch/arm/plat-orion/gpio.c

582

ct = gc->chip_types;

arch/arm/plat-orion/irq.c

34

ct = gc->chip_types;

arch/sh/boards/mach-se/7343/irq.c

81

ct = gc->chip_types;

arch/sh/boards/mach-se/7722/irq.c

79

ct = gc->chip_types;

drivers/gpio/gpio-ml-ioh.c

388

ct = gc->chip_types;

drivers/gpio/gpio-mvebu.c

1265

ct = &gc->chip_types[0];

drivers/gpio/gpio-mvebu.c

1272

ct = &gc->chip_types[1];

drivers/gpio/gpio-mxc.c

357

ct = gc->chip_types;

drivers/gpio/gpio-mxs.c

200

ct = &gc->chip_types[0];

drivers/gpio/gpio-mxs.c

212

ct = &gc->chip_types[1];

drivers/gpio/gpio-pch.c

338

ct = gc->chip_types;

drivers/gpio/gpio-rockchip.c

546

gc->chip_types[0].regs.mask = bank->gpio_regs->int_mask;

drivers/gpio/gpio-rockchip.c

547

gc->chip_types[0].regs.ack = bank->gpio_regs->port_eoi;

drivers/gpio/gpio-rockchip.c

548

gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;

drivers/gpio/gpio-rockchip.c

549

gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;

drivers/gpio/gpio-rockchip.c

550

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;

drivers/gpio/gpio-rockchip.c

551

gc->chip_types[0].chip.irq_enable = rockchip_irq_enable;

drivers/gpio/gpio-rockchip.c

552

gc->chip_types[0].chip.irq_disable = rockchip_irq_disable;

drivers/gpio/gpio-rockchip.c

553

gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake;

drivers/gpio/gpio-rockchip.c

554

gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend;

drivers/gpio/gpio-rockchip.c

555

gc->chip_types[0].chip.irq_resume = rockchip_irq_resume;

drivers/gpio/gpio-rockchip.c

556

gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type;

drivers/gpio/gpio-rockchip.c

557

gc->chip_types[0].chip.irq_request_resources = rockchip_irq_reqres;

drivers/gpio/gpio-rockchip.c

558

gc->chip_types[0].chip.irq_release_resources = rockchip_irq_relres;

drivers/gpio/gpio-sodaville.c

160

ct = sd->gc->chip_types;

drivers/gpio/gpio-tb10x.c

182

gc->chip_types[0].type = IRQ_TYPE_EDGE_BOTH;

drivers/gpio/gpio-tb10x.c

183

gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;

drivers/gpio/gpio-tb10x.c

184

gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/gpio/gpio-tb10x.c

185

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/gpio/gpio-tb10x.c

186

gc->chip_types[0].chip.irq_set_type = tb10x_gpio_irq_set_type;

drivers/gpio/gpio-tb10x.c

187

gc->chip_types[0].regs.ack = OFFSET_TO_REG_CHANGE;

drivers/gpio/gpio-tb10x.c

188

gc->chip_types[0].regs.mask = OFFSET_TO_REG_INT_EN;

drivers/gpu/drm/imx/dc/dc-ic.c

199

ct = gc->chip_types;

drivers/gpu/ipu-v3/ipu-common.c

1197

ct = gc->chip_types;

drivers/hwmon/w83795.c

324

enum chip_types chip_type;

drivers/irqchip/irq-al-fic.c

155

gc->chip_types->regs.mask = AL_FIC_MASK;

drivers/irqchip/irq-al-fic.c

156

gc->chip_types->regs.ack = AL_FIC_CAUSE;

drivers/irqchip/irq-al-fic.c

157

gc->chip_types->chip.irq_mask = irq_gc_mask_set_bit;

drivers/irqchip/irq-al-fic.c

158

gc->chip_types->chip.irq_unmask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-al-fic.c

159

gc->chip_types->chip.irq_ack = irq_gc_ack_clr_bit;

drivers/irqchip/irq-al-fic.c

160

gc->chip_types->chip.irq_set_type = al_fic_irq_set_type;

drivers/irqchip/irq-al-fic.c

161

gc->chip_types->chip.irq_retrigger = al_fic_irq_retrigger;

drivers/irqchip/irq-al-fic.c

162

gc->chip_types->chip.flags = IRQCHIP_SKIP_SET_WAKE;

drivers/irqchip/irq-al-fic.c

58

gc->chip_types->handler = handler;

drivers/irqchip/irq-atmel-aic-common.c

242

gc->chip_types[0].type = IRQ_TYPE_SENSE_MASK;

drivers/irqchip/irq-atmel-aic-common.c

243

gc->chip_types[0].chip.irq_eoi = irq_gc_eoi;

drivers/irqchip/irq-atmel-aic-common.c

244

gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake;

drivers/irqchip/irq-atmel-aic-common.c

245

gc->chip_types[0].chip.irq_shutdown = aic_common_shutdown;

drivers/irqchip/irq-atmel-aic.c

250

gc->chip_types[0].regs.eoi = AT91_AIC_EOICR;

drivers/irqchip/irq-atmel-aic.c

251

gc->chip_types[0].regs.enable = AT91_AIC_IECR;

drivers/irqchip/irq-atmel-aic.c

252

gc->chip_types[0].regs.disable = AT91_AIC_IDCR;

drivers/irqchip/irq-atmel-aic.c

253

gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;

drivers/irqchip/irq-atmel-aic.c

254

gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;

drivers/irqchip/irq-atmel-aic.c

255

gc->chip_types[0].chip.irq_retrigger = aic_retrigger;

drivers/irqchip/irq-atmel-aic.c

256

gc->chip_types[0].chip.irq_set_type = aic_set_type;

drivers/irqchip/irq-atmel-aic.c

257

gc->chip_types[0].chip.irq_suspend = aic_suspend;

drivers/irqchip/irq-atmel-aic.c

258

gc->chip_types[0].chip.irq_resume = aic_resume;

drivers/irqchip/irq-atmel-aic.c

259

gc->chip_types[0].chip.irq_pm_shutdown = aic_pm_shutdown;

drivers/irqchip/irq-atmel-aic5.c

339

gc->chip_types[0].regs.eoi = AT91_AIC5_EOICR;

drivers/irqchip/irq-atmel-aic5.c

340

gc->chip_types[0].chip.irq_mask = aic5_mask;

drivers/irqchip/irq-atmel-aic5.c

341

gc->chip_types[0].chip.irq_unmask = aic5_unmask;

drivers/irqchip/irq-atmel-aic5.c

342

gc->chip_types[0].chip.irq_retrigger = aic5_retrigger;

drivers/irqchip/irq-atmel-aic5.c

343

gc->chip_types[0].chip.irq_set_type = aic5_set_type;

drivers/irqchip/irq-atmel-aic5.c

344

gc->chip_types[0].chip.irq_suspend = aic5_suspend;

drivers/irqchip/irq-atmel-aic5.c

345

gc->chip_types[0].chip.irq_resume = aic5_resume;

drivers/irqchip/irq-atmel-aic5.c

346

gc->chip_types[0].chip.irq_pm_shutdown = aic5_pm_shutdown;

drivers/irqchip/irq-bcm7120-l2.c

280

ct = gc->chip_types;

drivers/irqchip/irq-bcm7120-l2.c

86

struct irq_chip_type *ct = gc->chip_types;

drivers/irqchip/irq-bcm7120-l2.c

95

struct irq_chip_type *ct = gc->chip_types;

drivers/irqchip/irq-brcmstb-l2.c

215

ct = data->gc->chip_types;

drivers/irqchip/irq-csky-apb-intc.c

66

gc->chip_types[0].regs.mask = mask_reg;

drivers/irqchip/irq-csky-apb-intc.c

67

gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-csky-apb-intc.c

68

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-csky-apb-intc.c

71

gc->chip_types[0].chip.irq_unmask = irq_ck_mask_set_bit;

drivers/irqchip/irq-digicolor.c

64

gc->chip_types[0].regs.ack = ack_reg;

drivers/irqchip/irq-digicolor.c

65

gc->chip_types[0].regs.mask = en_reg;

drivers/irqchip/irq-digicolor.c

66

gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;

drivers/irqchip/irq-digicolor.c

67

gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-digicolor.c

68

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-dw-apb-ictl.c

193

gc->chip_types[0].regs.mask = APB_INT_MASK_L;

drivers/irqchip/irq-dw-apb-ictl.c

194

gc->chip_types[0].regs.enable = APB_INT_ENABLE_L;

drivers/irqchip/irq-dw-apb-ictl.c

195

gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;

drivers/irqchip/irq-dw-apb-ictl.c

196

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-dw-apb-ictl.c

197

gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume;

drivers/irqchip/irq-goldfish-pic.c

95

ct = gc->chip_types;

drivers/irqchip/irq-idt3243x.c

94

ct = gc->chip_types;

drivers/irqchip/irq-imgpdc.c

402

gc->chip_types[0].regs.mask = PDC_IRQ_ROUTE;

drivers/irqchip/irq-imgpdc.c

403

gc->chip_types[0].chip.irq_mask = perip_irq_mask;

drivers/irqchip/irq-imgpdc.c

404

gc->chip_types[0].chip.irq_unmask = perip_irq_unmask;

drivers/irqchip/irq-imgpdc.c

405

gc->chip_types[0].chip.irq_set_wake = pdc_irq_set_wake;

drivers/irqchip/irq-imgpdc.c

414

gc->chip_types[0].type = IRQ_TYPE_EDGE_BOTH;

drivers/irqchip/irq-imgpdc.c

415

gc->chip_types[0].handler = handle_edge_irq;

drivers/irqchip/irq-imgpdc.c

416

gc->chip_types[0].regs.ack = PDC_IRQ_CLEAR;

drivers/irqchip/irq-imgpdc.c

417

gc->chip_types[0].regs.mask = PDC_IRQ_ENABLE;

drivers/irqchip/irq-imgpdc.c

418

gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;

drivers/irqchip/irq-imgpdc.c

419

gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-imgpdc.c

420

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-imgpdc.c

421

gc->chip_types[0].chip.irq_set_type = syswake_irq_set_type;

drivers/irqchip/irq-imgpdc.c

422

gc->chip_types[0].chip.irq_set_wake = pdc_irq_set_wake;

drivers/irqchip/irq-imgpdc.c

424

gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND;

drivers/irqchip/irq-imgpdc.c

427

gc->chip_types[1].type = IRQ_TYPE_LEVEL_MASK;

drivers/irqchip/irq-imgpdc.c

428

gc->chip_types[1].handler = handle_level_irq;

drivers/irqchip/irq-imgpdc.c

429

gc->chip_types[1].regs.ack = PDC_IRQ_CLEAR;

drivers/irqchip/irq-imgpdc.c

430

gc->chip_types[1].regs.mask = PDC_IRQ_ENABLE;

drivers/irqchip/irq-imgpdc.c

431

gc->chip_types[1].chip.irq_ack = irq_gc_ack_set_bit;

drivers/irqchip/irq-imgpdc.c

432

gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-imgpdc.c

433

gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-imgpdc.c

434

gc->chip_types[1].chip.irq_set_type = syswake_irq_set_type;

drivers/irqchip/irq-imgpdc.c

435

gc->chip_types[1].chip.irq_set_wake = pdc_irq_set_wake;

drivers/irqchip/irq-imgpdc.c

437

gc->chip_types[1].chip.flags = IRQCHIP_MASK_ON_SUSPEND;

drivers/irqchip/irq-ingenic-tcu.c

130

ct = gc->chip_types;

drivers/irqchip/irq-ingenic.c

114

ct = gc->chip_types;

drivers/irqchip/irq-lan966x-oic.c

172

gc->chip_types[0].regs.enable = chip_regs->reg_off_ena_set;

drivers/irqchip/irq-lan966x-oic.c

173

gc->chip_types[0].regs.disable = chip_regs->reg_off_ena_clr;

drivers/irqchip/irq-lan966x-oic.c

174

gc->chip_types[0].regs.ack = chip_regs->reg_off_sticky;

drivers/irqchip/irq-lan966x-oic.c

175

gc->chip_types[0].chip.irq_startup = lan966x_oic_irq_startup;

drivers/irqchip/irq-lan966x-oic.c

176

gc->chip_types[0].chip.irq_shutdown = lan966x_oic_irq_shutdown;

drivers/irqchip/irq-lan966x-oic.c

177

gc->chip_types[0].chip.irq_set_type = lan966x_oic_irq_set_type;

drivers/irqchip/irq-lan966x-oic.c

178

gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;

drivers/irqchip/irq-lan966x-oic.c

179

gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;

drivers/irqchip/irq-lan966x-oic.c

180

gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;

drivers/irqchip/irq-lan966x-oic.c

192

irq_reg_writel(gc, ~0U, gc->chip_types[0].regs.disable);

drivers/irqchip/irq-lan966x-oic.c

193

irq_reg_writel(gc, ~0U, gc->chip_types[0].regs.ack);

drivers/irqchip/irq-loongson-liointc.c

288

ct = gc->chip_types;

drivers/irqchip/irq-ls1x.c

159

ct = gc->chip_types;

drivers/irqchip/irq-mscc-ocelot.c

157

gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;

drivers/irqchip/irq-mscc-ocelot.c

158

gc->chip_types[0].regs.ack = p->reg_off_sticky;

drivers/irqchip/irq-mscc-ocelot.c

160

gc->chip_types[0].regs.mask = p->reg_off_ena_clr;

drivers/irqchip/irq-mscc-ocelot.c

161

gc->chip_types[0].chip.irq_unmask = ocelot_irq_unmask;

drivers/irqchip/irq-mscc-ocelot.c

162

gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;

drivers/irqchip/irq-mscc-ocelot.c

164

gc->chip_types[0].regs.enable = p->reg_off_ena_set;

drivers/irqchip/irq-mscc-ocelot.c

165

gc->chip_types[0].regs.disable = p->reg_off_ena_clr;

drivers/irqchip/irq-mscc-ocelot.c

166

gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;

drivers/irqchip/irq-mscc-ocelot.c

167

gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;

drivers/irqchip/irq-nvic.c

117

gc->chip_types[0].regs.enable = NVIC_ISER;

drivers/irqchip/irq-nvic.c

118

gc->chip_types[0].regs.disable = NVIC_ICER;

drivers/irqchip/irq-nvic.c

119

gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;

drivers/irqchip/irq-nvic.c

120

gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;

drivers/irqchip/irq-nvic.c

124

gc->chip_types[0].chip.irq_eoi = irq_gc_noop;

drivers/irqchip/irq-omap-intc.c

206

ct = gc->chip_types;

drivers/irqchip/irq-omap-intc.c

231

ct = gc->chip_types;

drivers/irqchip/irq-orion.c

188

gc->chip_types[0].regs.ack = ORION_BRIDGE_IRQ_CAUSE;

drivers/irqchip/irq-orion.c

189

gc->chip_types[0].regs.mask = ORION_BRIDGE_IRQ_MASK;

drivers/irqchip/irq-orion.c

190

gc->chip_types[0].chip.irq_startup = orion_bridge_irq_startup;

drivers/irqchip/irq-orion.c

191

gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit;

drivers/irqchip/irq-orion.c

192

gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-orion.c

193

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-orion.c

89

gc->chip_types[0].regs.mask = ORION_IRQ_MASK;

drivers/irqchip/irq-orion.c

90

gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-orion.c

91

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-pic32-evic.c

269

gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK;

drivers/irqchip/irq-pic32-evic.c

270

gc->chip_types[0].handler = handle_fasteoi_irq;

drivers/irqchip/irq-pic32-evic.c

271

gc->chip_types[0].regs.ack = ifsclr;

drivers/irqchip/irq-pic32-evic.c

272

gc->chip_types[0].regs.mask = iec;

drivers/irqchip/irq-pic32-evic.c

273

gc->chip_types[0].chip.name = "evic-level";

drivers/irqchip/irq-pic32-evic.c

274

gc->chip_types[0].chip.irq_eoi = irq_gc_ack_set_bit;

drivers/irqchip/irq-pic32-evic.c

275

gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-pic32-evic.c

276

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-pic32-evic.c

277

gc->chip_types[0].chip.flags = IRQCHIP_SKIP_SET_WAKE;

drivers/irqchip/irq-pic32-evic.c

280

gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH;

drivers/irqchip/irq-pic32-evic.c

281

gc->chip_types[1].handler = handle_edge_irq;

drivers/irqchip/irq-pic32-evic.c

282

gc->chip_types[1].regs.ack = ifsclr;

drivers/irqchip/irq-pic32-evic.c

283

gc->chip_types[1].regs.mask = iec;

drivers/irqchip/irq-pic32-evic.c

284

gc->chip_types[1].chip.name = "evic-edge";

drivers/irqchip/irq-pic32-evic.c

285

gc->chip_types[1].chip.irq_ack = irq_gc_ack_set_bit;

drivers/irqchip/irq-pic32-evic.c

286

gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-pic32-evic.c

287

gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-pic32-evic.c

288

gc->chip_types[1].chip.irq_set_type = pic32_set_type_edge;

drivers/irqchip/irq-pic32-evic.c

289

gc->chip_types[1].chip.flags = IRQCHIP_SKIP_SET_WAKE;

drivers/irqchip/irq-renesas-irqc.c

189

p->gc->chip_types[0].regs.enable = IRQC_EN_SET;

drivers/irqchip/irq-renesas-irqc.c

190

p->gc->chip_types[0].regs.disable = IRQC_EN_STS;

drivers/irqchip/irq-renesas-irqc.c

191

p->gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;

drivers/irqchip/irq-renesas-irqc.c

192

p->gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;

drivers/irqchip/irq-renesas-irqc.c

193

p->gc->chip_types[0].chip.irq_set_type = irqc_irq_set_type;

drivers/irqchip/irq-renesas-irqc.c

194

p->gc->chip_types[0].chip.irq_set_wake = irqc_irq_set_wake;

drivers/irqchip/irq-renesas-irqc.c

195

p->gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND;

drivers/irqchip/irq-stm32-exti.c

364

gc->chip_types->type = IRQ_TYPE_EDGE_BOTH;

drivers/irqchip/irq-stm32-exti.c

365

gc->chip_types->chip.irq_ack = stm32_irq_ack;

drivers/irqchip/irq-stm32-exti.c

366

gc->chip_types->chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-stm32-exti.c

367

gc->chip_types->chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-stm32-exti.c

368

gc->chip_types->chip.irq_set_type = stm32_irq_set_type;

drivers/irqchip/irq-stm32-exti.c

369

gc->chip_types->chip.irq_set_wake = irq_gc_set_wake;

drivers/irqchip/irq-stm32-exti.c

374

gc->chip_types->regs.mask = stm32_bank->imr_ofst;

drivers/irqchip/irq-sunxi-nmi.c

108

struct irq_chip_type *ct = gc->chip_types;

drivers/irqchip/irq-sunxi-nmi.c

186

gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK;

drivers/irqchip/irq-sunxi-nmi.c

187

gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-sunxi-nmi.c

188

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-sunxi-nmi.c

189

gc->chip_types[0].chip.irq_eoi = irq_gc_ack_set_bit;

drivers/irqchip/irq-sunxi-nmi.c

190

gc->chip_types[0].chip.irq_set_type = sunxi_sc_nmi_set_type;

drivers/irqchip/irq-sunxi-nmi.c

191

gc->chip_types[0].chip.flags = IRQCHIP_EOI_THREADED |

drivers/irqchip/irq-sunxi-nmi.c

194

gc->chip_types[0].regs.ack = data->reg_offs.pend;

drivers/irqchip/irq-sunxi-nmi.c

195

gc->chip_types[0].regs.mask = data->reg_offs.enable;

drivers/irqchip/irq-sunxi-nmi.c

196

gc->chip_types[0].regs.type = data->reg_offs.ctrl;

drivers/irqchip/irq-sunxi-nmi.c

198

gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH;

drivers/irqchip/irq-sunxi-nmi.c

199

gc->chip_types[1].chip.irq_ack = irq_gc_ack_set_bit;

drivers/irqchip/irq-sunxi-nmi.c

200

gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-sunxi-nmi.c

201

gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-sunxi-nmi.c

202

gc->chip_types[1].chip.irq_set_type = sunxi_sc_nmi_set_type;

drivers/irqchip/irq-sunxi-nmi.c

203

gc->chip_types[1].regs.ack = data->reg_offs.pend;

drivers/irqchip/irq-sunxi-nmi.c

204

gc->chip_types[1].regs.mask = data->reg_offs.enable;

drivers/irqchip/irq-sunxi-nmi.c

205

gc->chip_types[1].regs.type = data->reg_offs.ctrl;

drivers/irqchip/irq-sunxi-nmi.c

206

gc->chip_types[1].handler = handle_edge_irq;

drivers/irqchip/irq-tb10x.c

139

gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK;

drivers/irqchip/irq-tb10x.c

140

gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-tb10x.c

141

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-tb10x.c

142

gc->chip_types[0].chip.irq_set_type = tb10x_irq_set_type;

drivers/irqchip/irq-tb10x.c

143

gc->chip_types[0].regs.mask = AB_IRQCTL_INT_ENABLE;

drivers/irqchip/irq-tb10x.c

145

gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH;

drivers/irqchip/irq-tb10x.c

146

gc->chip_types[1].chip.irq_ack = irq_gc_ack_set_bit;

drivers/irqchip/irq-tb10x.c

147

gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/irqchip/irq-tb10x.c

148

gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit;

drivers/irqchip/irq-tb10x.c

149

gc->chip_types[1].chip.irq_set_type = tb10x_irq_set_type;

drivers/irqchip/irq-tb10x.c

150

gc->chip_types[1].regs.ack = AB_IRQCTL_INT_STATUS;

drivers/irqchip/irq-tb10x.c

151

gc->chip_types[1].regs.mask = AB_IRQCTL_INT_ENABLE;

drivers/irqchip/irq-tb10x.c

152

gc->chip_types[1].handler = handle_edge_irq;

drivers/irqchip/irq-zevio.c

106

gc->chip_types[0].chip.irq_ack = zevio_irq_ack;

drivers/irqchip/irq-zevio.c

107

gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;

drivers/irqchip/irq-zevio.c

108

gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;

drivers/irqchip/irq-zevio.c

109

gc->chip_types[0].regs.mask = IO_IRQ_BASE + IO_ENABLE;

drivers/irqchip/irq-zevio.c

110

gc->chip_types[0].regs.enable = IO_IRQ_BASE + IO_ENABLE;

drivers/irqchip/irq-zevio.c

111

gc->chip_types[0].regs.disable = IO_IRQ_BASE + IO_DISABLE;

drivers/irqchip/irq-zevio.c

112

gc->chip_types[0].regs.ack = IO_IRQ_BASE + IO_RESET;

drivers/scsi/arm/fas216.c

2705

static char *chip_types[] = {

drivers/scsi/arm/fas216.c

2900

info->scsi.type = chip_types[type];

drivers/soc/dove/pmu.c

295

gc->chip_types[0].regs.mask = PMC_IRQ_MASK;

drivers/soc/dove/pmu.c

296

gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;

drivers/soc/dove/pmu.c

297

gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;

include/linux/irq.h

1072

struct irq_chip_type chip_types[];

kernel/irq/devres.c

271

gc = devm_kzalloc(dev, struct_size(gc, chip_types, num_ct), GFP_KERNEL);

kernel/irq/generic-chip.c

214

struct irq_chip_type *ct = gc->chip_types;

kernel/irq/generic-chip.c

223

gc->chip_types->handler = handler;

kernel/irq/generic-chip.c

243

gc = kzalloc_flex(*gc, chip_types, num_ct);

kernel/irq/generic-chip.c

255

struct irq_chip_type *ct = gc->chip_types;

kernel/irq/generic-chip.c

297

gc_sz = struct_size(gc, chip_types, info->num_ct);

kernel/irq/generic-chip.c

465

ct = gc->chip_types;

kernel/irq/generic-chip.c

534

struct irq_chip_type *ct = gc->chip_types;

kernel/irq/generic-chip.c

577

struct irq_chip_type *ct = gc->chip_types;

kernel/irq/generic-chip.c

658

struct irq_chip_type *ct = gc->chip_types;

kernel/irq/generic-chip.c

678

struct irq_chip_type *ct = gc->chip_types;

kernel/irq/generic-chip.c

701

struct irq_chip_type *ct = gc->chip_types;