crypto/openssh/openbsd-compat/memmem.c

38

uint16_t nw = n[0]<<8 | n[1], hw = h[0]<<8 | h[1];

crypto/openssh/openbsd-compat/memmem.c

39

for (h+=2, k-=2; k; k--, hw = hw<<8 | *h++)

crypto/openssh/openbsd-compat/memmem.c

40

if (hw == nw) return (char *)h-2;

crypto/openssh/openbsd-compat/memmem.c

41

return hw == nw ? (char *)h-2 : 0;

crypto/openssh/openbsd-compat/memmem.c

48

uint32_t hw = h[0]<<24 | h[1]<<16 | h[2]<<8;

crypto/openssh/openbsd-compat/memmem.c

49

for (h+=3, k-=3; k; k--, hw = (hw|*h++)<<8)

crypto/openssh/openbsd-compat/memmem.c

50

if (hw == nw) return (char *)h-3;

crypto/openssh/openbsd-compat/memmem.c

51

return hw == nw ? (char *)h-3 : 0;

crypto/openssh/openbsd-compat/memmem.c

58

uint32_t hw = h[0]<<24 | h[1]<<16 | h[2]<<8 | h[3];

crypto/openssh/openbsd-compat/memmem.c

59

for (h+=4, k-=4; k; k--, hw = hw<<8 | *h++)

crypto/openssh/openbsd-compat/memmem.c

60

if (hw == nw) return (char *)h-4;

crypto/openssh/openbsd-compat/memmem.c

61

return hw == nw ? (char *)h-4 : 0;

crypto/openssl/crypto/lhash/lhash.c

48

OPENSSL_LH_HASHFUNCTHUNK hw,

crypto/openssl/crypto/lhash/lhash.c

57

lh->hashw = hw;

crypto/openssl/include/openssl/lhash.h

97

OPENSSL_LH_HASHFUNCTHUNK hw,

crypto/openssl/providers/implementations/ciphers/cipher_aes.c

45

in->base.hw->copyctx(&ret->base, &in->base);

crypto/openssl/providers/implementations/ciphers/cipher_aes_cbc_hmac_sha.c

105

hw->init_mac_key(ctx, p->data, p->data_size);

crypto/openssl/providers/implementations/ciphers/cipher_aes_cbc_hmac_sha.c

137

if (hw->tls1_multiblock_aad(vctx, &mb_param) <= 0)

crypto/openssl/providers/implementations/ciphers/cipher_aes_cbc_hmac_sha.c

168

if (hw->tls1_multiblock_encrypt(vctx, &mb_param) <= 0)

crypto/openssl/providers/implementations/ciphers/cipher_aes_cbc_hmac_sha.c

179

if (hw->set_tls1_aad(ctx, p->data, p->data_size) <= 0)

crypto/openssl/providers/implementations/ciphers/cipher_aes_cbc_hmac_sha.c

227

PROV_CIPHER_HW_AES_HMAC_SHA *hw = (PROV_CIPHER_HW_AES_HMAC_SHA *)ctx->hw;

crypto/openssl/providers/implementations/ciphers/cipher_aes_cbc_hmac_sha.c

228

size_t len = hw->tls1_multiblock_max_bufsize(ctx);

crypto/openssl/providers/implementations/ciphers/cipher_aes_cbc_hmac_sha.c

315

ctx->hw = (PROV_CIPHER_HW_AES_HMAC_SHA *)ctx->base.hw;

crypto/openssl/providers/implementations/ciphers/cipher_aes_cbc_hmac_sha.c

89

PROV_CIPHER_HW_AES_HMAC_SHA *hw = (PROV_CIPHER_HW_AES_HMAC_SHA *)ctx->hw;

crypto/openssl/providers/implementations/ciphers/cipher_aes_cbc_hmac_sha.h

44

const PROV_CIPHER_HW_AES_HMAC_SHA *hw;

crypto/openssl/providers/implementations/ciphers/cipher_aes_gcm_siv.c

117

if (!ctx->hw->initkey(ctx))

crypto/openssl/providers/implementations/ciphers/cipher_aes_gcm_siv.c

152

error |= !ctx->hw->cipher(ctx, out, in, inl);

crypto/openssl/providers/implementations/ciphers/cipher_aes_gcm_siv.c

168

error |= !ctx->hw->cipher(vctx, out, NULL, 0);

crypto/openssl/providers/implementations/ciphers/cipher_aes_gcm_siv.c

37

ctx->hw = ossl_prov_cipher_hw_aes_gcm_siv(keybits);

crypto/openssl/providers/implementations/ciphers/cipher_aes_gcm_siv.c

52

ctx->hw->clean_ctx(ctx);

crypto/openssl/providers/implementations/ciphers/cipher_aes_gcm_siv.c

64

if (in->hw == NULL)

crypto/openssl/providers/implementations/ciphers/cipher_aes_gcm_siv.c

79

if (!in->hw->dup_ctx(ret, in))

crypto/openssl/providers/implementations/ciphers/cipher_aes_gcm_siv.h

35

const PROV_CIPHER_HW_AES_GCM_SIV *hw; /* maybe not used, yet? */

crypto/openssl/providers/implementations/ciphers/cipher_aes_ocb.c

133

if (!ctx->base.hw->init(&ctx->base, key, keylen))

crypto/openssl/providers/implementations/ciphers/cipher_aes_siv.c

126

if (ctx->hw->cipher(ctx, out, in, inl) <= 0)

crypto/openssl/providers/implementations/ciphers/cipher_aes_siv.c

142

if (!ctx->hw->cipher(vctx, out, NULL, 0))

crypto/openssl/providers/implementations/ciphers/cipher_aes_siv.c

205

|| !ctx->hw->settag(ctx, p->data, p->data_size)) {

crypto/openssl/providers/implementations/ciphers/cipher_aes_siv.c

216

ctx->hw->setspeed(ctx, (int)speed);

crypto/openssl/providers/implementations/ciphers/cipher_aes_siv.c

43

ctx->hw = ossl_prov_cipher_hw_aes_siv(keybits);

crypto/openssl/providers/implementations/ciphers/cipher_aes_siv.c

54

ctx->hw->cleanup(ctx);

crypto/openssl/providers/implementations/ciphers/cipher_aes_siv.c

70

if (!in->hw->dupctx(in, ret)) {

crypto/openssl/providers/implementations/ciphers/cipher_aes_siv.c

93

if (!ctx->hw->initkey(ctx, key, ctx->keylen))

crypto/openssl/providers/implementations/ciphers/cipher_aes_siv.h

32

const PROV_CIPHER_HW_AES_SIV *hw;

crypto/openssl/providers/implementations/ciphers/cipher_aes_xts.c

172

in->base.hw->copyctx(&ret->base, &in->base);

crypto/openssl/providers/implementations/ciphers/cipher_aes_xts.c

95

if (!ctx->hw->init(ctx, key, keylen))

crypto/openssl/providers/implementations/ciphers/cipher_aria.c

38

in->base.hw->copyctx(&ret->base, &in->base);

crypto/openssl/providers/implementations/ciphers/cipher_camellia.c

44

in->base.hw->copyctx(&ret->base, &in->base);

crypto/openssl/providers/implementations/ciphers/cipher_chacha20.c

178

PROV_CIPHER_HW_CHACHA20 *hw = (PROV_CIPHER_HW_CHACHA20 *)ctx->hw;

crypto/openssl/providers/implementations/ciphers/cipher_chacha20.c

180

hw->initiv(ctx);

crypto/openssl/providers/implementations/ciphers/cipher_chacha20.c

197

PROV_CIPHER_HW_CHACHA20 *hw = (PROV_CIPHER_HW_CHACHA20 *)ctx->hw;

crypto/openssl/providers/implementations/ciphers/cipher_chacha20.c

199

hw->initiv(ctx);

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305.c

180

PROV_CIPHER_HW_CHACHA20_POLY1305 *hw = (PROV_CIPHER_HW_CHACHA20_POLY1305 *)ctx->base.hw;

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305.c

234

len = hw->tls_init(&ctx->base, p->data, p->data_size);

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305.c

248

if (hw->tls_iv_set_fixed(&ctx->base, p->data, p->data_size) == 0) {

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305.c

266

PROV_CIPHER_HW_CHACHA20_POLY1305 *hw = (PROV_CIPHER_HW_CHACHA20_POLY1305 *)ctx->hw;

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305.c

268

hw->initiv(ctx);

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305.c

285

PROV_CIPHER_HW_CHACHA20_POLY1305 *hw = (PROV_CIPHER_HW_CHACHA20_POLY1305 *)ctx->hw;

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305.c

287

hw->initiv(ctx);

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305.c

299

PROV_CIPHER_HW_CHACHA20_POLY1305 *hw = (PROV_CIPHER_HW_CHACHA20_POLY1305 *)ctx->hw;

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305.c

314

if (!hw->aead_cipher(ctx, out, outl, in, inl))

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305.c

324

PROV_CIPHER_HW_CHACHA20_POLY1305 *hw = (PROV_CIPHER_HW_CHACHA20_POLY1305 *)ctx->hw;

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305.c

329

if (hw->aead_cipher(ctx, out, outl, NULL, 0) <= 0)

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305_hw.c

322

ctx->chacha.base.hw->cipher(&ctx->chacha.base, out, in, plen);

crypto/openssl/providers/implementations/ciphers/cipher_chacha20_poly1305_hw.c

329

ctx->chacha.base.hw->cipher(&ctx->chacha.base, out, in, plen);

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

107

if (!ctx->hw->cipher(ctx, out, in, len))

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

118

if (!ctx->hw->cipher(ctx, out - CTS_BLOCK_SIZE + residue, tmp_in.c,

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

142

if (!ctx->hw->cipher(ctx, out, in, len))

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

149

if (!ctx->hw->cipher(ctx, out, in, len))

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

161

if (!ctx->hw->cipher(ctx, pt_last.c, in + residue, CTS_BLOCK_SIZE))

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

187

if (!ctx->hw->cipher(ctx, out, ct_mid.c, CTS_BLOCK_SIZE))

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

206

return ctx->hw->cipher(ctx, out, in, len) ? len : 0;

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

213

if (!ctx->hw->cipher(ctx, out, in, len))

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

222

if (!ctx->hw->cipher(ctx, out - CTS_BLOCK_SIZE, tmp_in.c, CTS_BLOCK_SIZE))

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

246

return ctx->hw->cipher(ctx, out, in, len) ? len : 0;

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

255

if (!ctx->hw->cipher(ctx, out, in, len))

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

267

if (!ctx->hw->cipher(ctx, pt_last.c, in, CTS_BLOCK_SIZE))

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

293

if (!ctx->hw->cipher(ctx, out, ct_mid.c, CTS_BLOCK_SIZE))

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

306

if (!ctx->hw->cipher(ctx, out, in, len))

crypto/openssl/providers/implementations/ciphers/cipher_cts.c

319

if (!ctx->hw->cipher(ctx, out, in, len))

crypto/openssl/providers/implementations/ciphers/cipher_des.c

33

const PROV_CIPHER_HW *hw)

crypto/openssl/providers/implementations/ciphers/cipher_des.c

43

hw, provctx);

crypto/openssl/providers/implementations/ciphers/cipher_des.c

58

in->base.hw->copyctx(&ret->base, &in->base);

crypto/openssl/providers/implementations/ciphers/cipher_des.c

97

if (!ctx->hw->init(ctx, key, keylen))

crypto/openssl/providers/implementations/ciphers/cipher_rc4_hmac_md5.c

31

#define GET_HW(ctx) ((PROV_CIPHER_HW_RC4_HMAC_MD5 *)ctx->base.hw)

crypto/openssl/providers/implementations/ciphers/cipher_sm4.c

38

in->base.hw->copyctx(&ret->base, &in->base);

crypto/openssl/providers/implementations/ciphers/cipher_sm4_xts.c

117

in->base.hw->copyctx(&ret->base, &in->base);

crypto/openssl/providers/implementations/ciphers/cipher_sm4_xts.c

57

if (!ctx->hw->init(ctx, key, keylen))

crypto/openssl/providers/implementations/ciphers/cipher_tdes.h

76

size_t ivbits, uint64_t flags, const PROV_CIPHER_HW *hw);

crypto/openssl/providers/implementations/ciphers/cipher_tdes_common.c

104

if (!ctx->hw->init(ctx, key, ctx->keylen))

crypto/openssl/providers/implementations/ciphers/cipher_tdes_common.c

24

size_t ivbits, uint64_t flags, const PROV_CIPHER_HW *hw)

crypto/openssl/providers/implementations/ciphers/cipher_tdes_common.c

35

hw, provctx);

crypto/openssl/providers/implementations/ciphers/cipher_tdes_common.c

52

in->base.hw->copyctx(&ret->base, &in->base);

crypto/openssl/providers/implementations/ciphers/cipher_tdes_wrap.c

103

ctx->hw->cipher(ctx, out + ivlen, out + ivlen, inl + ivlen);

crypto/openssl/providers/implementations/ciphers/cipher_tdes_wrap.c

106

ctx->hw->cipher(ctx, out, out, len);

crypto/openssl/providers/implementations/ciphers/cipher_tdes_wrap.c

47

ctx->hw->cipher(ctx, icv, in, 8);

crypto/openssl/providers/implementations/ciphers/cipher_tdes_wrap.c

57

ctx->hw->cipher(ctx, out, in + 8, inl - 16);

crypto/openssl/providers/implementations/ciphers/cipher_tdes_wrap.c

59

ctx->hw->cipher(ctx, iv, in + inl - 8, 8);

crypto/openssl/providers/implementations/ciphers/cipher_tdes_wrap.c

65

ctx->hw->cipher(ctx, out, out, inl - 16);

crypto/openssl/providers/implementations/ciphers/cipher_tdes_wrap.c

66

ctx->hw->cipher(ctx, icv, icv, 8);

crypto/openssl/providers/implementations/ciphers/ciphercommon.c

222

if (!ctx->hw->init(ctx, key, ctx->keylen))

crypto/openssl/providers/implementations/ciphers/ciphercommon.c

335

if (!ctx->hw->cipher(ctx, out, in, inl)) {

crypto/openssl/providers/implementations/ciphers/ciphercommon.c

375

if (!ctx->hw->cipher(ctx, out, ctx->buf, blksz)) {

crypto/openssl/providers/implementations/ciphers/ciphercommon.c

398

if (!ctx->hw->cipher(ctx, out, in, nextblocks)) {

crypto/openssl/providers/implementations/ciphers/ciphercommon.c

450

if (!ctx->hw->cipher(ctx, out, ctx->buf, blksz)) {

crypto/openssl/providers/implementations/ciphers/ciphercommon.c

469

if (!ctx->hw->cipher(ctx, ctx->buf, ctx->buf, blksz)) {

crypto/openssl/providers/implementations/ciphers/ciphercommon.c

510

if (!ctx->hw->cipher(ctx, out, in, inl)) {

crypto/openssl/providers/implementations/ciphers/ciphercommon.c

587

if (!ctx->hw->cipher(ctx, out, in, inl)) {

crypto/openssl/providers/implementations/ciphers/ciphercommon.c

719

uint64_t flags, const PROV_CIPHER_HW *hw,

crypto/openssl/providers/implementations/ciphers/ciphercommon.c

732

ctx->hw = hw;

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

216

if (!ctx->hw->gettag(ctx, p->data, p->data_size))

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

249

if (!ctx->hw->setkey(ctx, key, keylen))

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

327

const PROV_CCM_HW *hw = ctx->hw;

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

329

if (!hw->setiv(ctx, ctx->iv, ccm_get_ivlen(ctx), mlen))

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

360

if (!ctx->hw->setaad(ctx, ctx->buf, ctx->tls_aad_len))

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

367

if (!ctx->hw->auth_encrypt(ctx, in, out, len, out + len, ctx->m))

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

371

if (!ctx->hw->auth_decrypt(ctx, in, out, len,

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

388

const PROV_CCM_HW *hw = ctx->hw;

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

412

if (!hw->setaad(ctx, in, len))

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

421

if (!hw->auth_encrypt(ctx, in, out, len, NULL, 0))

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

429

if (!hw->auth_decrypt(ctx, in, out, len, ctx->buf, ctx->m))

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

445

void ossl_ccm_initctx(PROV_CCM_CTX *ctx, size_t keybits, const PROV_CCM_HW *hw)

crypto/openssl/providers/implementations/ciphers/ciphercommon_ccm.c

455

ctx->hw = hw;

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm.c

116

|| !ctx->hw->setiv(ctx, ctx->iv, ctx->ivlen))

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm.c

138

if (!ctx->hw->setiv(ctx, ctx->iv, ctx->ivlen))

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm.c

34

const PROV_GCM_HW *hw)

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm.c

417

const PROV_GCM_HW *hw = ctx->hw;

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm.c

42

ctx->hw = hw;

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm.c

437

if (!hw->setiv(ctx, ctx->iv, ctx->ivlen))

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm.c

445

if (!hw->aadupdate(ctx, in, len))

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm.c

449

if (!hw->cipherupdate(ctx, in, len, out))

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm.c

456

if (!hw->cipherfinal(ctx, ctx->buf))

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm.c

576

if (!ctx->hw->oneshot(ctx, ctx->buf, ctx->tls_aad_len, in, len, out, tag,

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm.c

75

if (!ctx->hw->setkey(ctx, key, ctx->keylen))

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm_hw.c

57

if (!ctx->hw->aadupdate(ctx, aad, aad_len))

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm_hw.c

59

if (!ctx->hw->cipherupdate(ctx, in, in_len, out))

crypto/openssl/providers/implementations/ciphers/ciphercommon_gcm_hw.c

62

if (!ctx->hw->cipherfinal(ctx, tag))

crypto/openssl/providers/implementations/include/prov/ciphercommon.h

134

const PROV_CIPHER_HW *hw, void *provctx);

crypto/openssl/providers/implementations/include/prov/ciphercommon.h

97

const PROV_CIPHER_HW *hw; /* hardware specific functions */

crypto/openssl/providers/implementations/include/prov/ciphercommon_ccm.h

48

const PROV_CCM_HW *hw; /* hardware specific methods */

crypto/openssl/providers/implementations/include/prov/ciphercommon_ccm.h

79

void ossl_ccm_initctx(PROV_CCM_CTX *ctx, size_t keybits, const PROV_CCM_HW *hw);

crypto/openssl/providers/implementations/include/prov/ciphercommon_gcm.h

107

const PROV_GCM_HW *hw);

crypto/openssl/providers/implementations/include/prov/ciphercommon_gcm.h

79

const PROV_GCM_HW *hw; /* hardware specific methods */

lib/libc/string/memmem.c

31

uint16_t nw = n[0] << 8 | n[1], hw = h[0] << 8 | h[1];

lib/libc/string/memmem.c

32

for (h += 2, k -= 2; k; k--, hw = hw << 8 | *h++)

lib/libc/string/memmem.c

33

if (hw == nw)

lib/libc/string/memmem.c

35

return hw == nw ? (char *)h - 2 : 0;

lib/libc/string/memmem.c

42

uint32_t hw = (uint32_t)h[0] << 24 | h[1] << 16 | h[2] << 8;

lib/libc/string/memmem.c

43

for (h += 3, k -= 3; k; k--, hw = (hw | *h++) << 8)

lib/libc/string/memmem.c

44

if (hw == nw)

lib/libc/string/memmem.c

46

return hw == nw ? (char *)h - 3 : 0;

lib/libc/string/memmem.c

53

uint32_t hw = (uint32_t)h[0] << 24 | h[1] << 16 | h[2] << 8 | h[3];

lib/libc/string/memmem.c

54

for (h += 4, k -= 4; k; k--, hw = hw << 8 | *h++)

lib/libc/string/memmem.c

55

if (hw == nw)

lib/libc/string/memmem.c

57

return hw == nw ? (char *)h - 4 : 0;

lib/libc/string/strstr.c

31

uint16_t nw = n[0] << 8 | n[1], hw = h[0] << 8 | h[1];

lib/libc/string/strstr.c

32

for (h++; *h && hw != nw; hw = hw << 8 | *++h)

lib/libc/string/strstr.c

41

uint32_t hw = (uint32_t)h[0] << 24 | h[1] << 16 | h[2] << 8;

lib/libc/string/strstr.c

42

for (h += 2; *h && hw != nw; hw = (hw | *++h) << 8)

lib/libc/string/strstr.c

51

uint32_t hw = (uint32_t)h[0] << 24 | h[1] << 16 | h[2] << 8 | h[3];

lib/libc/string/strstr.c

52

for (h += 3; *h && hw != nw; hw = hw << 8 | *++h)

sys/compat/linuxkpi/common/include/net/mac80211.h

1144

struct ieee80211_hw *hw, enum ieee80211_iface_iter flags,

sys/compat/linuxkpi/common/include/net/mac80211.h

1221

_ieee80211_hw_set(struct ieee80211_hw *hw, enum ieee80211_hw_flags flag)

sys/compat/linuxkpi/common/include/net/mac80211.h

1224

set_bit(flag, hw->flags);

sys/compat/linuxkpi/common/include/net/mac80211.h

1228

__ieee80211_hw_check(struct ieee80211_hw *hw, enum ieee80211_hw_flags flag)

sys/compat/linuxkpi/common/include/net/mac80211.h

1231

return (test_bit(flag, hw->flags));

sys/compat/linuxkpi/common/include/net/mac80211.h

1250

ieee80211_free_hw(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/include/net/mac80211.h

1253

linuxkpi_ieee80211_iffree(hw);

sys/compat/linuxkpi/common/include/net/mac80211.h

1255

if (hw->wiphy != NULL)

sys/compat/linuxkpi/common/include/net/mac80211.h

1256

wiphy_free(hw->wiphy);

sys/compat/linuxkpi/common/include/net/mac80211.h

1270

SET_IEEE80211_DEV(struct ieee80211_hw *hw, struct device *dev)

sys/compat/linuxkpi/common/include/net/mac80211.h

1273

set_wiphy_dev(hw->wiphy, dev);

sys/compat/linuxkpi/common/include/net/mac80211.h

1274

linuxkpi_set_ieee80211_dev(hw);

sys/compat/linuxkpi/common/include/net/mac80211.h

1280

ieee80211_register_hw(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/include/net/mac80211.h

1284

error = wiphy_register(hw->wiphy);

sys/compat/linuxkpi/common/include/net/mac80211.h

1294

error = linuxkpi_ieee80211_ifattach(hw);

sys/compat/linuxkpi/common/include/net/mac80211.h

1302

ieee80211_unregister_hw(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/include/net/mac80211.h

1305

linuxkpi_ieee80211_unregister_hw(hw);

sys/compat/linuxkpi/common/include/net/mac80211.h

1316

ieee80211_restart_hw(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/include/net/mac80211.h

1318

linuxkpi_ieee80211_restart_hw(hw);

sys/compat/linuxkpi/common/include/net/mac80211.h

1368

ieee80211_rx_napi(struct ieee80211_hw *hw, struct ieee80211_sta *sta,

sys/compat/linuxkpi/common/include/net/mac80211.h

1372

linuxkpi_ieee80211_rx(hw, skb, sta, napi, NULL);

sys/compat/linuxkpi/common/include/net/mac80211.h

1376

ieee80211_rx_list(struct ieee80211_hw *hw, struct ieee80211_sta *sta,

sys/compat/linuxkpi/common/include/net/mac80211.h

1380

linuxkpi_ieee80211_rx(hw, skb, sta, NULL, list);

sys/compat/linuxkpi/common/include/net/mac80211.h

1384

ieee80211_rx_ni(struct ieee80211_hw *hw, struct sk_buff *skb)

sys/compat/linuxkpi/common/include/net/mac80211.h

1387

linuxkpi_ieee80211_rx(hw, skb, NULL, NULL, NULL);

sys/compat/linuxkpi/common/include/net/mac80211.h

1391

ieee80211_rx_irqsafe(struct ieee80211_hw *hw, struct sk_buff *skb)

sys/compat/linuxkpi/common/include/net/mac80211.h

1394

linuxkpi_ieee80211_rx(hw, skb, NULL, NULL, NULL);

sys/compat/linuxkpi/common/include/net/mac80211.h

1398

ieee80211_rx(struct ieee80211_hw *hw, struct sk_buff *skb)

sys/compat/linuxkpi/common/include/net/mac80211.h

1401

linuxkpi_ieee80211_rx(hw, skb, NULL, NULL, NULL);

sys/compat/linuxkpi/common/include/net/mac80211.h

1407

ieee80211_stop_queues(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/include/net/mac80211.h

1409

linuxkpi_ieee80211_stop_queues(hw);

sys/compat/linuxkpi/common/include/net/mac80211.h

1413

ieee80211_wake_queues(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/include/net/mac80211.h

1415

linuxkpi_ieee80211_wake_queues(hw);

sys/compat/linuxkpi/common/include/net/mac80211.h

1419

ieee80211_stop_queue(struct ieee80211_hw *hw, int qnum)

sys/compat/linuxkpi/common/include/net/mac80211.h

1421

linuxkpi_ieee80211_stop_queue(hw, qnum);

sys/compat/linuxkpi/common/include/net/mac80211.h

1425

ieee80211_wake_queue(struct ieee80211_hw *hw, int qnum)

sys/compat/linuxkpi/common/include/net/mac80211.h

1427

linuxkpi_ieee80211_wake_queue(hw, qnum);

sys/compat/linuxkpi/common/include/net/mac80211.h

1431

ieee80211_schedule_txq(struct ieee80211_hw *hw, struct ieee80211_txq *txq)

sys/compat/linuxkpi/common/include/net/mac80211.h

1433

linuxkpi_ieee80211_schedule_txq(hw, txq, true);

sys/compat/linuxkpi/common/include/net/mac80211.h

1437

ieee80211_return_txq(struct ieee80211_hw *hw, struct ieee80211_txq *txq,

sys/compat/linuxkpi/common/include/net/mac80211.h

1440

linuxkpi_ieee80211_schedule_txq(hw, txq, withoutpkts);

sys/compat/linuxkpi/common/include/net/mac80211.h

1444

ieee80211_txq_schedule_start(struct ieee80211_hw *hw, uint8_t ac)

sys/compat/linuxkpi/common/include/net/mac80211.h

1446

linuxkpi_ieee80211_txq_schedule_start(hw, ac);

sys/compat/linuxkpi/common/include/net/mac80211.h

1450

ieee80211_txq_schedule_end(struct ieee80211_hw *hw, uint8_t ac)

sys/compat/linuxkpi/common/include/net/mac80211.h

1456

ieee80211_next_txq(struct ieee80211_hw *hw, uint8_t ac)

sys/compat/linuxkpi/common/include/net/mac80211.h

1458

return (linuxkpi_ieee80211_next_txq(hw, ac));

sys/compat/linuxkpi/common/include/net/mac80211.h

1462

ieee80211_handle_wake_tx_queue(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

1465

linuxkpi_ieee80211_handle_wake_tx_queue(hw, txq);

sys/compat/linuxkpi/common/include/net/mac80211.h

1469

ieee80211_purge_tx_queue(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

1485

ieee80211_beacon_get_tim(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/include/net/mac80211.h

1498

ieee80211_iterate_active_interfaces_atomic(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

1506

linuxkpi_ieee80211_iterate_interfaces(hw, flags, iterfunc, arg);

sys/compat/linuxkpi/common/include/net/mac80211.h

1510

ieee80211_iterate_active_interfaces(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

1517

linuxkpi_ieee80211_iterate_interfaces(hw, flags, iterfunc, arg);

sys/compat/linuxkpi/common/include/net/mac80211.h

1521

ieee80211_iterate_active_interfaces_mtx(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

1528

linuxkpi_ieee80211_iterate_interfaces(hw, flags, iterfunc, arg);

sys/compat/linuxkpi/common/include/net/mac80211.h

1532

ieee80211_iterate_interfaces(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

1538

linuxkpi_ieee80211_iterate_interfaces(hw, flags, iterfunc, arg);

sys/compat/linuxkpi/common/include/net/mac80211.h

1542

ieee80211_iter_keys(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/include/net/mac80211.h

1547

linuxkpi_ieee80211_iterate_keys(hw, vif, iterfunc, arg, false);

sys/compat/linuxkpi/common/include/net/mac80211.h

1551

ieee80211_iter_keys_rcu(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/include/net/mac80211.h

1556

linuxkpi_ieee80211_iterate_keys(hw, vif, iterfunc, arg, true);

sys/compat/linuxkpi/common/include/net/mac80211.h

1560

ieee80211_iter_chan_contexts_atomic(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

1565

linuxkpi_ieee80211_iterate_chan_contexts(hw, iterfunc, arg);

sys/compat/linuxkpi/common/include/net/mac80211.h

1569

ieee80211_iter_chan_contexts_mtx(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

1574

linuxkpi_ieee80211_iterate_chan_contexts(hw, iterfunc, arg);

sys/compat/linuxkpi/common/include/net/mac80211.h

1578

ieee80211_iterate_stations_atomic(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

1582

linuxkpi_ieee80211_iterate_stations_atomic(hw, iterfunc, arg);

sys/compat/linuxkpi/common/include/net/mac80211.h

1586

ieee80211_iterate_stations_mtx(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

1590

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/include/net/mac80211.h

1592

linuxkpi_ieee80211_iterate_stations_atomic(hw, iterfunc, arg);

sys/compat/linuxkpi/common/include/net/mac80211.h

1603

ieee80211_beacon_get_template(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

1740

ieee80211_find_sta_by_ifaddr(struct ieee80211_hw *hw, const uint8_t *addr,

sys/compat/linuxkpi/common/include/net/mac80211.h

1744

return (linuxkpi_ieee80211_find_sta_by_ifaddr(hw, addr, ourvifaddr));

sys/compat/linuxkpi/common/include/net/mac80211.h

1805

ieee80211_free_txskb(struct ieee80211_hw *hw, struct sk_buff *skb)

sys/compat/linuxkpi/common/include/net/mac80211.h

1814

linuxkpi_ieee80211_free_txskb(hw, skb, 0x455458);

sys/compat/linuxkpi/common/include/net/mac80211.h

1818

ieee80211_ready_on_channel(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/include/net/mac80211.h

1825

ieee80211_remain_on_channel_expired(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/include/net/mac80211.h

2045

ieee80211_sta_block_awake(struct ieee80211_hw *hw, struct ieee80211_sta *sta,

sys/compat/linuxkpi/common/include/net/mac80211.h

2078

ieee80211_tx_dequeue(struct ieee80211_hw *hw, struct ieee80211_txq *txq)

sys/compat/linuxkpi/common/include/net/mac80211.h

2081

return (linuxkpi_ieee80211_tx_dequeue(hw, txq));

sys/compat/linuxkpi/common/include/net/mac80211.h

2085

ieee80211_tx_dequeue_ni(struct ieee80211_hw *hw, struct ieee80211_txq *txq)

sys/compat/linuxkpi/common/include/net/mac80211.h

2090

skb = linuxkpi_ieee80211_tx_dequeue(hw, txq);

sys/compat/linuxkpi/common/include/net/mac80211.h

2110

ieee80211_sched_scan_results(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/include/net/mac80211.h

2149

ieee80211_sched_scan_stopped(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/include/net/mac80211.h

2155

ieee80211_scan_completed(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

2159

linuxkpi_ieee80211_scan_completed(hw, info);

sys/compat/linuxkpi/common/include/net/mac80211.h

2163

ieee80211_beacon_get(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/include/net/mac80211.h

2171

ieee80211_pspoll_get(struct ieee80211_hw *hw, struct ieee80211_vif *vif)

sys/compat/linuxkpi/common/include/net/mac80211.h

2178

return (linuxkpi_ieee80211_pspoll_get(hw, vif));

sys/compat/linuxkpi/common/include/net/mac80211.h

2182

ieee80211_proberesp_get(struct ieee80211_hw *hw, struct ieee80211_vif *vif)

sys/compat/linuxkpi/common/include/net/mac80211.h

2189

ieee80211_nullfunc_get(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/include/net/mac80211.h

2197

return (linuxkpi_ieee80211_nullfunc_get(hw, vif, linkid, qos));

sys/compat/linuxkpi/common/include/net/mac80211.h

2201

ieee80211_probereq_get(struct ieee80211_hw *hw, const uint8_t *addr,

sys/compat/linuxkpi/common/include/net/mac80211.h

2205

return (linuxkpi_ieee80211_probereq_get(hw, addr, ssid, ssid_len,

sys/compat/linuxkpi/common/include/net/mac80211.h

2210

ieee80211_queue_delayed_work(struct ieee80211_hw *hw, struct delayed_work *w,

sys/compat/linuxkpi/common/include/net/mac80211.h

2214

linuxkpi_ieee80211_queue_delayed_work(hw, w, delay);

sys/compat/linuxkpi/common/include/net/mac80211.h

2218

ieee80211_queue_work(struct ieee80211_hw *hw, struct work_struct *w)

sys/compat/linuxkpi/common/include/net/mac80211.h

2221

linuxkpi_ieee80211_queue_work(hw, w);

sys/compat/linuxkpi/common/include/net/mac80211.h

2225

ieee80211_tx_prepare_skb(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/include/net/mac80211.h

2233

ieee80211_tx_status_skb(struct ieee80211_hw *hw, struct sk_buff *skb)

sys/compat/linuxkpi/common/include/net/mac80211.h

2235

linuxkpi_ieee80211_tx_status(hw, skb);

sys/compat/linuxkpi/common/include/net/mac80211.h

2239

ieee80211_tx_status_noskb(struct ieee80211_hw *hw, struct ieee80211_sta *sta,

sys/compat/linuxkpi/common/include/net/mac80211.h

2246

ieee80211_tx_status_irqsafe(struct ieee80211_hw *hw, struct sk_buff *skb)

sys/compat/linuxkpi/common/include/net/mac80211.h

2249

linuxkpi_ieee80211_tx_status(hw, skb);

sys/compat/linuxkpi/common/include/net/mac80211.h

2253

ieee80211_tx_status_ni(struct ieee80211_hw *hw, struct sk_buff *skb)

sys/compat/linuxkpi/common/include/net/mac80211.h

2256

linuxkpi_ieee80211_tx_status(hw, skb);

sys/compat/linuxkpi/common/include/net/mac80211.h

2260

ieee80211_tx_status_ext(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

2264

linuxkpi_ieee80211_tx_status_ext(hw, txstat);

sys/compat/linuxkpi/common/include/net/mac80211.h

2299

SET_IEEE80211_PERM_ADDR (struct ieee80211_hw *hw, uint8_t *addr)

sys/compat/linuxkpi/common/include/net/mac80211.h

2302

ether_addr_copy(hw->wiphy->perm_addr, addr);

sys/compat/linuxkpi/common/include/net/mac80211.h

2312

ieee80211_tx_rate_update(struct ieee80211_hw *hw, struct ieee80211_sta *sta,

sys/compat/linuxkpi/common/include/net/mac80211.h

2319

ieee80211_txq_may_transmit(struct ieee80211_hw *hw, struct ieee80211_txq *txq)

sys/compat/linuxkpi/common/include/net/mac80211.h

2326

ieee80211_radar_detected(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

2372

ieee80211_calc_rx_airtime(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

2393

ieee80211_get_fils_discovery_tmpl(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

2401

ieee80211_get_unsol_bcast_probe_resp_tmpl(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

2584

ieee80211_beacon_get_template_ema_list(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/include/net/mac80211.h

558

} hw;

sys/compat/linuxkpi/common/src/linux_80211.c

10001

ieee80211_emulate_change_chanctx(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

10005

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

10011

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

10017

hw->conf.radar_enabled = chanctx_conf->radar_enabled;

sys/compat/linuxkpi/common/src/linux_80211.c

10018

lkpi_80211_update_chandef(hw, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

10022

ieee80211_emulate_switch_vif_chanctx(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

10029

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

10041

hw->conf.radar_enabled = vifs[0].new_ctx->radar_enabled;

sys/compat/linuxkpi/common/src/linux_80211.c

10043

error = lkpi_80211_update_chandef(hw, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

10053

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

10057

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

10070

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

10071

error = lkpi_80211_mo_suspend(hw, &wowlan);

sys/compat/linuxkpi/common/src/linux_80211.c

10072

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

10081

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

10088

lkpi_80211_mo_remove_interface(hw, LVIF_TO_VIF(lvif));

sys/compat/linuxkpi/common/src/linux_80211.c

10092

lkpi_80211_mo_stop(hw, true);

sys/compat/linuxkpi/common/src/linux_80211.c

10093

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

10109

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

10114

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

10130

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

10131

error = lkpi_80211_mo_start(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

10135

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

10140

error = lkpi_80211_mo_add_interface(hw, LVIF_TO_VIF(lvif));

sys/compat/linuxkpi/common/src/linux_80211.c

10147

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

10151

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

10157

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

10158

error = lkpi_80211_mo_resume(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

10159

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

1021

lockdep_assert_wiphy(lsta->hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

1030

struct ieee80211_hw *hw, struct ieee80211_node *ni)

sys/compat/linuxkpi/common/src/linux_80211.c

1038

lsta = malloc(sizeof(*lsta) + hw->sta_data_size, M_LKPI80211,

sys/compat/linuxkpi/common/src/linux_80211.c

1043

lsta->hw = hw;

sys/compat/linuxkpi/common/src/linux_80211.c

1070

ltxq = malloc(sizeof(*ltxq) + hw->txq_data_size,

sys/compat/linuxkpi/common/src/linux_80211.c

1076

if (!ieee80211_hw_check(hw, STA_MMPDU_TXQ)) {

sys/compat/linuxkpi/common/src/linux_80211.c

1100

supband = hw->wiphy->bands[band];

sys/compat/linuxkpi/common/src/linux_80211.c

1129

(void)lkpi_sta_sync_from_ni(hw, vif, sta, ni, false);

sys/compat/linuxkpi/common/src/linux_80211.c

1490

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

1495

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

1497

if (hw->wiphy->bands[band] == NULL)

sys/compat/linuxkpi/common/src/linux_80211.c

1500

nchans = hw->wiphy->bands[band]->n_channels;

sys/compat/linuxkpi/common/src/linux_80211.c

1504

channels = hw->wiphy->bands[band]->channels;

sys/compat/linuxkpi/common/src/linux_80211.c

1566

lkpi_sta_del_keys(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211.c

1574

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

1604

err = lkpi_80211_mo_set_key(hw, DISABLE_KEY, vif,

sys/compat/linuxkpi/common/src/linux_80211.c

1642

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

1653

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

1661

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

1727

error = lkpi_80211_mo_set_key(hw, DISABLE_KEY, vif, sta, kc);

sys/compat/linuxkpi/common/src/linux_80211.c

1757

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

1772

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

1778

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

1880

error = lkpi_80211_mo_set_key(hw, SET_KEY, vif, sta, kc);

sys/compat/linuxkpi/common/src/linux_80211.c

1968

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

1975

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

2006

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2026

ieee80211_stop_queues(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

2035

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

2041

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

2048

lkpi_ieee80211_wake_queues_locked(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

2077

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2147

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

2153

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

2155

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2170

mc = lkpi_80211_mo_prepare_multicast(hw, &lhw->mc_list);

sys/compat/linuxkpi/common/src/linux_80211.c

2173

lkpi_80211_mo_configure_filter(hw, changed_flags, &flags, mc);

sys/compat/linuxkpi/common/src/linux_80211.c

2189

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

2192

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

2194

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2196

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2287

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

2299

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

2302

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2304

lkpi_80211_mo_cancel_hw_scan(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211.c

2305

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2322

lkpi_hw_conf_idle(struct ieee80211_hw *hw, bool new)

sys/compat/linuxkpi/common/src/linux_80211.c

2328

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2330

old = hw->conf.flags & IEEE80211_CONF_IDLE;

sys/compat/linuxkpi/common/src/linux_80211.c

2334

hw->conf.flags ^= IEEE80211_CONF_IDLE;

sys/compat/linuxkpi/common/src/linux_80211.c

2335

error = lkpi_80211_mo_config(hw, IEEE80211_CONF_CHANGE_IDLE);

sys/compat/linuxkpi/common/src/linux_80211.c

2337

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

2347

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

2351

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

2352

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2384

lkpi_wake_tx_queues(struct ieee80211_hw *hw, struct ieee80211_sta *sta,

sys/compat/linuxkpi/common/src/linux_80211.c

2396

if (!ieee80211_hw_check(hw, STA_MMPDU_TXQ))

sys/compat/linuxkpi/common/src/linux_80211.c

2398

} else if (tid >= hw->queues)

sys/compat/linuxkpi/common/src/linux_80211.c

2414

lkpi_80211_mo_wake_tx_queue(hw, sta->txq[tid], false);

sys/compat/linuxkpi/common/src/linux_80211.c

2431

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

2437

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

2438

lockdep_assert_not_held(&hw->wiphy->mtx);

sys/compat/linuxkpi/common/src/linux_80211.c

2511

lkpi_init_chanctx_conf(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

2517

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2525

if (chanctx_conf->radar_enabled != hw->conf.radar_enabled) {

sys/compat/linuxkpi/common/src/linux_80211.c

2526

chanctx_conf->radar_enabled = hw->conf.radar_enabled;

sys/compat/linuxkpi/common/src/linux_80211.c

2543

lkpi_alloc_lchanctx(struct ieee80211_hw *hw, struct lkpi_vif *lvif)

sys/compat/linuxkpi/common/src/linux_80211.c

2547

lchanctx = malloc(sizeof(*lchanctx) + hw->chanctx_data_size,

sys/compat/linuxkpi/common/src/linux_80211.c

2555

lkpi_find_lchanctx_reserved(struct ieee80211_hw *hw, struct lkpi_vif *lvif)

sys/compat/linuxkpi/common/src/linux_80211.c

2561

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

2574

lchanctx = lkpi_alloc_lchanctx(hw, lvif);

sys/compat/linuxkpi/common/src/linux_80211.c

2582

lkpi_get_chanctx_conf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)

sys/compat/linuxkpi/common/src/linux_80211.c

2587

lockdep_is_held(&hw->wiphy->mtx));

sys/compat/linuxkpi/common/src/linux_80211.c

2593

lchanctx = lkpi_find_lchanctx_reserved(hw, lvif);

sys/compat/linuxkpi/common/src/linux_80211.c

2595

__func__, hw, vif));

sys/compat/linuxkpi/common/src/linux_80211.c

2605

lkpi_set_chanctx_conf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211.c

2613

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2623

lkpi_80211_mo_change_chanctx(hw, chanctx_conf, changed);

sys/compat/linuxkpi/common/src/linux_80211.c

2628

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

2632

lkpi_hw_conf_idle(hw, false);

sys/compat/linuxkpi/common/src/linux_80211.c

2634

error = lkpi_80211_mo_add_chanctx(hw, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

2654

error = lkpi_80211_mo_assign_vif_chanctx(hw, vif,

sys/compat/linuxkpi/common/src/linux_80211.c

2661

lkpi_80211_mo_remove_chanctx(hw, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

2674

lkpi_remove_chanctx(struct ieee80211_hw *hw, struct ieee80211_vif *vif)

sys/compat/linuxkpi/common/src/linux_80211.c

2680

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2683

lockdep_is_held(&hw->wiphy->mtx));

sys/compat/linuxkpi/common/src/linux_80211.c

2689

lkpi_80211_mo_unassign_vif_chanctx(hw, vif, &vif->bss_conf, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

2691

lkpi_hw_conf_idle(hw, true);

sys/compat/linuxkpi/common/src/linux_80211.c

2694

lkpi_80211_mo_remove_chanctx(hw, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

2700

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

2714

lkpi_bss_info_change(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211.c

2744

lkpi_80211_mo_vif_cfg_changed(hw, vif, vif_cfg_bits, false);

sys/compat/linuxkpi/common/src/linux_80211.c

2748

lkpi_80211_mo_link_info_changed(hw, vif, &vif->bss_conf,

sys/compat/linuxkpi/common/src/linux_80211.c

2751

lkpi_80211_mo_bss_info_changed(hw, vif, &vif->bss_conf, bss_changed);

sys/compat/linuxkpi/common/src/linux_80211.c

2777

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

2821

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

2840

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

2843

chanctx_conf = lkpi_get_chanctx_conf(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211.c

2854

hw->conf.radar_enabled =

sys/compat/linuxkpi/common/src/linux_80211.c

2856

hw->conf.chandef = chandef;

sys/compat/linuxkpi/common/src/linux_80211.c

2857

vif->bss_conf.chanreq.oper = hw->conf.chandef;

sys/compat/linuxkpi/common/src/linux_80211.c

2862

&hw->conf.chandef, &chandef, &vif->bss_conf.chanreq.oper);

sys/compat/linuxkpi/common/src/linux_80211.c

2865

changed = lkpi_init_chanctx_conf(hw, &chandef, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

2886

error = lkpi_set_chanctx_conf(hw, vif, chanctx_conf, changed, true);

sys/compat/linuxkpi/common/src/linux_80211.c

2894

bss_changed |= lkpi_sta_supp_rates(hw, vif, ni, NULL);

sys/compat/linuxkpi/common/src/linux_80211.c

2895

if (ieee80211_hw_check(hw, HAS_RATE_CONTROL))

sys/compat/linuxkpi/common/src/linux_80211.c

2896

lkpi_80211_mo_set_bitrate_mask(hw, vif, &lvif->br_mask);

sys/compat/linuxkpi/common/src/linux_80211.c

2899

lkpi_bss_info_change(hw, vif, bss_changed);

sys/compat/linuxkpi/common/src/linux_80211.c

2917

error = lkpi_80211_mo_sta_state(hw, vif, lsta, IEEE80211_STA_NONE);

sys/compat/linuxkpi/common/src/linux_80211.c

2939

lkpi_wake_tx_queues(hw, LSTA_TO_STA(lsta), false, false);

sys/compat/linuxkpi/common/src/linux_80211.c

2947

lkpi_80211_mo_mgd_prepare_tx(hw, vif, &prep_tx_info);

sys/compat/linuxkpi/common/src/linux_80211.c

295

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

2959

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3015

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3032

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

3040

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

3045

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

307

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

3072

error = lkpi_80211_mo_sta_state(hw, vif, lsta, IEEE80211_STA_AUTH);

sys/compat/linuxkpi/common/src/linux_80211.c

3084

lkpi_80211_mo_mgd_complete_tx(hw, vif, &prep_tx_info);

sys/compat/linuxkpi/common/src/linux_80211.c

309

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3095

lkpi_80211_mo_mgd_prepare_tx(hw, vif, &prep_tx_info);

sys/compat/linuxkpi/common/src/linux_80211.c

3102

lkpi_wake_tx_queues(hw, LSTA_TO_STA(lsta), false, true);

sys/compat/linuxkpi/common/src/linux_80211.c

3116

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3140

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

3151

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

3156

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

317

error = lkpi_80211_mo_sta_statistics(hw, vif, sta, &sinfo);

sys/compat/linuxkpi/common/src/linux_80211.c

3199

bss_changed |= lkpi_sta_sync_from_ni(hw, vif, sta, ni, true);

sys/compat/linuxkpi/common/src/linux_80211.c

3200

if (ieee80211_hw_check(hw, HAS_RATE_CONTROL))

sys/compat/linuxkpi/common/src/linux_80211.c

3201

lkpi_80211_mo_set_bitrate_mask(hw, vif, &lvif->br_mask);

sys/compat/linuxkpi/common/src/linux_80211.c

3203

error = lkpi_80211_mo_sta_state(hw, vif, lsta, IEEE80211_STA_ASSOC);

sys/compat/linuxkpi/common/src/linux_80211.c

3242

lkpi_bss_info_change(hw, vif, bss_changed);

sys/compat/linuxkpi/common/src/linux_80211.c

3254

lkpi_80211_mo_mgd_complete_tx(hw, vif, &prep_tx_info);

sys/compat/linuxkpi/common/src/linux_80211.c

3275

hw->wiphy->frag_threshold = vap->iv_fragthreshold;

sys/compat/linuxkpi/common/src/linux_80211.c

3276

lkpi_80211_mo_set_frag_threshold(hw, vap->iv_fragthreshold);

sys/compat/linuxkpi/common/src/linux_80211.c

3277

hw->wiphy->rts_threshold = vap->iv_rtsthreshold;

sys/compat/linuxkpi/common/src/linux_80211.c

3278

lkpi_80211_mo_set_rts_threshold(hw, vap->iv_rtsthreshold);

sys/compat/linuxkpi/common/src/linux_80211.c

3284

error = lkpi_80211_mo_sta_state(hw, vif, lsta, IEEE80211_STA_AUTHORIZED);

sys/compat/linuxkpi/common/src/linux_80211.c

3301

lkpi_bss_info_change(hw, vif, bss_changed);

sys/compat/linuxkpi/common/src/linux_80211.c

3307

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3324

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

3338

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

3343

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3367

lkpi_80211_mo_flush(hw, vif, nitems(sta->txq), true);

sys/compat/linuxkpi/common/src/linux_80211.c

3394

lkpi_80211_mo_mgd_prepare_tx(hw, vif, &prep_tx_info);

sys/compat/linuxkpi/common/src/linux_80211.c

3397

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3423

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3428

lkpi_wake_tx_queues(hw, sta, false, true);

sys/compat/linuxkpi/common/src/linux_80211.c

3431

lkpi_80211_mo_flush(hw, vif, nitems(sta->txq), false);

sys/compat/linuxkpi/common/src/linux_80211.c

3439

lkpi_80211_mo_mgd_complete_tx(hw, vif, &prep_tx_info);

sys/compat/linuxkpi/common/src/linux_80211.c

3444

lkpi_80211_mo_sync_rx_queues(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

3447

lkpi_80211_mo_sta_pre_rcu_remove(hw, vif, sta);

sys/compat/linuxkpi/common/src/linux_80211.c

3456

error = lkpi_80211_mo_sta_state(hw, vif, lsta, IEEE80211_STA_ASSOC);

sys/compat/linuxkpi/common/src/linux_80211.c

3467

error = lkpi_sta_del_keys(hw, vif, lsta);

sys/compat/linuxkpi/common/src/linux_80211.c

3485

error = lkpi_80211_mo_sta_state(hw, vif, lsta, IEEE80211_STA_AUTH);

sys/compat/linuxkpi/common/src/linux_80211.c

3502

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3519

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

3528

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

3533

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3560

lkpi_80211_mo_mgd_complete_tx(hw, vif, &prep_tx_info);

sys/compat/linuxkpi/common/src/linux_80211.c

3574

error = lkpi_80211_mo_sta_state(hw, vif, lsta, IEEE80211_STA_NONE);

sys/compat/linuxkpi/common/src/linux_80211.c

3584

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3599

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

3610

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

3615

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3651

lkpi_80211_mo_flush(hw, vif, nitems(sta->txq), true);

sys/compat/linuxkpi/common/src/linux_80211.c

3654

lkpi_wake_tx_queues(hw, sta, false, true);

sys/compat/linuxkpi/common/src/linux_80211.c

3657

lkpi_80211_mo_flush(hw, vif, nitems(sta->txq), false);

sys/compat/linuxkpi/common/src/linux_80211.c

3664

lkpi_80211_mo_mgd_complete_tx(hw, vif, &prep_tx_info);

sys/compat/linuxkpi/common/src/linux_80211.c

3669

lkpi_80211_mo_sync_rx_queues(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

3673

error = lkpi_sta_del_keys(hw, vif, lsta);

sys/compat/linuxkpi/common/src/linux_80211.c

3688

lkpi_80211_mo_sta_pre_rcu_remove(hw, vif, sta);

sys/compat/linuxkpi/common/src/linux_80211.c

3739

lkpi_bss_info_change(hw, vif, bss_changed);

sys/compat/linuxkpi/common/src/linux_80211.c

3745

error = lkpi_80211_mo_sta_state(hw, vif, lsta, IEEE80211_STA_NOTEXIST);

sys/compat/linuxkpi/common/src/linux_80211.c

3765

lkpi_remove_chanctx(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211.c

3768

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3811

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

3819

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

3824

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

3856

lkpi_80211_mo_mgd_complete_tx(hw, vif, &prep_tx_info);

sys/compat/linuxkpi/common/src/linux_80211.c

3870

lkpi_80211_mo_mgd_prepare_tx(hw, vif, &prep_tx_info);

sys/compat/linuxkpi/common/src/linux_80211.c

3876

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4113

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

4123

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

4124

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4165

error = lkpi_80211_mo_conf_tx(hw, vif, /* link_id */0, ac, &txqp);

sys/compat/linuxkpi/common/src/linux_80211.c

4172

lkpi_bss_info_change(hw, vif, bss_changed);

sys/compat/linuxkpi/common/src/linux_80211.c

4184

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

4192

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

4194

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4196

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4206

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

421

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4233

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

4240

lkpi_bss_info_change(hw, vif, bss_changed);

sys/compat/linuxkpi/common/src/linux_80211.c

4281

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

4297

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

4300

len += hw->vif_data_size; /* vif->drv_priv */

sys/compat/linuxkpi/common/src/linux_80211.c

4323

supband = hw->wiphy->bands[band];

sys/compat/linuxkpi/common/src/linux_80211.c

4331

if (hw->conf.chandef.chan == NULL ||

sys/compat/linuxkpi/common/src/linux_80211.c

4332

hw->conf.chandef.chan->band != band)

sys/compat/linuxkpi/common/src/linux_80211.c

4364

(void) lkpi_find_lchanctx_reserved(hw, lvif);

sys/compat/linuxkpi/common/src/linux_80211.c

4412

if (ieee80211_hw_check(hw, QUEUE_CONTROL))

sys/compat/linuxkpi/common/src/linux_80211.c

4414

else if (hw->queues >= IEEE80211_NUM_ACS)

sys/compat/linuxkpi/common/src/linux_80211.c

4426

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4427

error = lkpi_80211_mo_start(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

4429

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4436

error = lkpi_80211_mo_add_interface(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211.c

4439

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4445

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4453

lkpi_bss_info_change(hw, vif, bss_changed);

sys/compat/linuxkpi/common/src/linux_80211.c

4457

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4465

error = lkpi_80211_mo_conf_tx(hw, vif, /* link_id */0, ac, &txqp);

sys/compat/linuxkpi/common/src/linux_80211.c

4471

lkpi_bss_info_change(hw, vif, bss_changed);

sys/compat/linuxkpi/common/src/linux_80211.c

4476

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4521

if (hw->max_listen_interval == 0)

sys/compat/linuxkpi/common/src/linux_80211.c

4522

hw->max_listen_interval = 7 * (ic->ic_lintval / ic->ic_bintval);

sys/compat/linuxkpi/common/src/linux_80211.c

4523

hw->conf.listen_interval = hw->max_listen_interval;

sys/compat/linuxkpi/common/src/linux_80211.c

4525

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4527

hw->wiphy->frag_threshold = vap->iv_fragthreshold;

sys/compat/linuxkpi/common/src/linux_80211.c

4528

lkpi_80211_mo_set_frag_threshold(hw, vap->iv_fragthreshold);

sys/compat/linuxkpi/common/src/linux_80211.c

4529

hw->wiphy->rts_threshold = vap->iv_rtsthreshold;

sys/compat/linuxkpi/common/src/linux_80211.c

4530

lkpi_80211_mo_set_rts_threshold(hw, vap->iv_rtsthreshold);

sys/compat/linuxkpi/common/src/linux_80211.c

4531

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4558

linuxkpi_ieee80211_unregister_hw(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211.c

4561

wiphy_unregister(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4562

linuxkpi_ieee80211_ifdetach(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

4568

linuxkpi_ieee80211_restart_hw(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211.c

4579

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

4587

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

4605

lkpi_80211_mo_remove_interface(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211.c

4608

lkpi_80211_mo_stop(hw, false); /* XXX SUSPEND */

sys/compat/linuxkpi/common/src/linux_80211.c

4660

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

4669

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

4673

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4676

error = lkpi_80211_mo_start(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

4682

lkpi_80211_mo_stop(hw, false); /* XXX SUSPEND */

sys/compat/linuxkpi/common/src/linux_80211.c

4685

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4729

uint32_t band_mask, struct ieee80211vap *vap, struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211.c

4744

supband = hw->wiphy->bands[band];

sys/compat/linuxkpi/common/src/linux_80211.c

4944

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

4980

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

4989

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

4990

lkpi_hw_conf_idle(hw, false);

sys/compat/linuxkpi/common/src/linux_80211.c

4991

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

5002

lkpi_80211_mo_sw_scan_start(hw, vif, vif->addr);

sys/compat/linuxkpi/common/src/linux_80211.c

5023

ssid_count = min(ss->ss_nssid, hw->wiphy->max_scan_ssids);

sys/compat/linuxkpi/common/src/linux_80211.c

5029

if (ieee80211_hw_check(hw, SINGLE_SCAN_ON_ALL_BANDS)) {

sys/compat/linuxkpi/common/src/linux_80211.c

5048

if (hw->wiphy->bands[band] != NULL) {

sys/compat/linuxkpi/common/src/linux_80211.c

5054

channels = hw->wiphy->bands[band]->channels;

sys/compat/linuxkpi/common/src/linux_80211.c

5055

n = hw->wiphy->bands[band]->n_channels;

sys/compat/linuxkpi/common/src/linux_80211.c

507

lkpi_sta_supp_rates(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211.c

5084

if (common_ie_len > hw->wiphy->max_scan_ie_len) {

sys/compat/linuxkpi/common/src/linux_80211.c

5087

common_ie_len, hw->wiphy->max_scan_ie_len);

sys/compat/linuxkpi/common/src/linux_80211.c

5096

hw_req->req.wiphy = hw->wiphy;

sys/compat/linuxkpi/common/src/linux_80211.c

5163

supband = hw->wiphy->bands[band];

sys/compat/linuxkpi/common/src/linux_80211.c

5216

ieend = lkpi_scan_ies_add(ie, &hw_req->ies, band_mask, vap, hw);

sys/compat/linuxkpi/common/src/linux_80211.c

522

supband = hw->wiphy->bands[band];

sys/compat/linuxkpi/common/src/linux_80211.c

5245

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

5255

error = lkpi_80211_mo_hw_scan(hw, vif, hw_req);

sys/compat/linuxkpi/common/src/linux_80211.c

5256

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

5388

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

5394

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

5398

lkpi_80211_mo_sw_scan_complete(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211.c

5403

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

5404

lkpi_hw_conf_idle(hw, true);

sys/compat/linuxkpi/common/src/linux_80211.c

5405

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

5466

lkpi_ic_set_channel_chanctx_iterf(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

5483

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

5527

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

5528

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

5556

chanctx_conf = lkpi_get_chanctx_conf(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211.c

5557

changed = lkpi_init_chanctx_conf(hw, &lhw->scan_chandef, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

5558

error = lkpi_set_chanctx_conf(hw, vif, chanctx_conf, changed, true);

sys/compat/linuxkpi/common/src/linux_80211.c

5580

ieee80211_iter_chan_contexts_mtx(hw,

sys/compat/linuxkpi/common/src/linux_80211.c

5603

chanctx_conf = lkpi_get_chanctx_conf(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211.c

5604

changed = lkpi_init_chanctx_conf(hw, &chandef, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

5606

error = lkpi_set_chanctx_conf(hw, vif, chanctx_conf, changed, true);

sys/compat/linuxkpi/common/src/linux_80211.c

5622

changed = lkpi_init_chanctx_conf(hw, &chandef, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

5623

lkpi_80211_mo_change_chanctx(hw, chanctx_conf, changed);

sys/compat/linuxkpi/common/src/linux_80211.c

5629

if (ieee80211_hw_check(hw, SUPPORTS_PS) &&

sys/compat/linuxkpi/common/src/linux_80211.c

5630

(hw->conf.flags & IEEE80211_CONF_PS) != 0) {

sys/compat/linuxkpi/common/src/linux_80211.c

5631

hw->conf.flags &= ~IEEE80211_CONF_PS;

sys/compat/linuxkpi/common/src/linux_80211.c

5632

error = lkpi_80211_mo_config(hw, IEEE80211_CONF_CHANGE_PS);

sys/compat/linuxkpi/common/src/linux_80211.c

5639

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

5649

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

5663

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

5664

lsta = lkpi_lsta_alloc(vap, mac, hw, ni);

sys/compat/linuxkpi/common/src/linux_80211.c

5988

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

6037

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

6072

skb = dev_alloc_skb(hw->extra_tx_headroom + tailroom + m->m_pkthdr.len);

sys/compat/linuxkpi/common/src/linux_80211.c

6081

__func__, hw->extra_tx_headroom, m->m_pkthdr.len, lsta, sta, ni);

sys/compat/linuxkpi/common/src/linux_80211.c

6094

skb_reserve(skb, hw->extra_tx_headroom);

sys/compat/linuxkpi/common/src/linux_80211.c

6221

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6222

lkpi_80211_mo_wake_tx_queue(hw, &ltxq->txq, true);

sys/compat/linuxkpi/common/src/linux_80211.c

6223

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6237

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6238

lkpi_80211_mo_tx(hw, &control, skb);

sys/compat/linuxkpi/common/src/linux_80211.c

6240

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6367

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

6378

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

6404

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6405

error = lkpi_80211_mo_ampdu_action(hw, vif, &params);

sys/compat/linuxkpi/common/src/linux_80211.c

6406

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6441

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

645

lkpi_sync_chanctx_cw_from_rx_bw(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

6452

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

6495

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6496

error = lkpi_80211_mo_ampdu_action(hw, vif, &params);

sys/compat/linuxkpi/common/src/linux_80211.c

6497

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6512

lkpi_80211_mo_wake_tx_queue(hw, sta->txq[tap->txa_tid], true);

sys/compat/linuxkpi/common/src/linux_80211.c

6529

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

653

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6540

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

656

lockdep_is_held(&hw->wiphy->mtx));

sys/compat/linuxkpi/common/src/linux_80211.c

6564

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6565

error = lkpi_80211_mo_ampdu_action(hw, vif, &params);

sys/compat/linuxkpi/common/src/linux_80211.c

6566

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6606

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

6614

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

6615

lkpi_80211_mo_wake_tx_queue(hw, sta->txq[tap->txa_tid], true);

sys/compat/linuxkpi/common/src/linux_80211.c

662

old_bw, sta->deflink.bandwidth, lkpi_cw_to_rx_bw(hw->conf.chandef.width));

sys/compat/linuxkpi/common/src/linux_80211.c

664

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

6643

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

6654

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

666

(!lhw->emulate_chanctx || old_bw == lkpi_cw_to_rx_bw(hw->conf.chandef.width)))

sys/compat/linuxkpi/common/src/linux_80211.c

6682

if (hw->max_rx_aggregation_subframes > 0 &&

sys/compat/linuxkpi/common/src/linux_80211.c

6683

params.buf_size > hw->max_rx_aggregation_subframes)

sys/compat/linuxkpi/common/src/linux_80211.c

6684

params.buf_size = hw->max_rx_aggregation_subframes;

sys/compat/linuxkpi/common/src/linux_80211.c

6696

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6697

error = lkpi_80211_mo_ampdu_action(hw, vif, &params);

sys/compat/linuxkpi/common/src/linux_80211.c

6698

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6705

if (!ieee80211_hw_check(hw, SUPPORTS_REORDERING_BUFFER)) {

sys/compat/linuxkpi/common/src/linux_80211.c

6720

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

6746

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

6792

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6793

error = lkpi_80211_mo_ampdu_action(hw, vif, &params);

sys/compat/linuxkpi/common/src/linux_80211.c

6794

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

6811

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

6826

hw = lsta->hw;

sys/compat/linuxkpi/common/src/linux_80211.c

6827

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

6837

if (!ieee80211_hw_check(hw, AMPDU_AGGREGATION)) {

sys/compat/linuxkpi/common/src/linux_80211.c

6842

if (ieee80211_hw_check(hw, TX_AMPDU_SETUP_IN_HW)) {

sys/compat/linuxkpi/common/src/linux_80211.c

685

lkpi_80211_mo_change_chanctx(hw, chanctx_conf, changed);

sys/compat/linuxkpi/common/src/linux_80211.c

690

lkpi_sta_sync_ht_from_ni(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211.c

6909

lkpi_ic_getradiocaps_ht(struct ieee80211com *ic, struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

6915

ht_cap = &hw->wiphy->bands[band]->ht_cap;

sys/compat/linuxkpi/common/src/linux_80211.c

6941

if (ieee80211_hw_check(hw, AMPDU_AGGREGATION))

sys/compat/linuxkpi/common/src/linux_80211.c

6944

if (ieee80211_hw_check(hw, TX_AMSDU))

sys/compat/linuxkpi/common/src/linux_80211.c

6946

if (ieee80211_hw_check(hw, SUPPORTS_AMSDU_IN_AMPDU))

sys/compat/linuxkpi/common/src/linux_80211.c

6965

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

6972

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

6976

if (hw->wiphy->bands[NL80211_BAND_2GHZ] != NULL)

sys/compat/linuxkpi/common/src/linux_80211.c

6977

nchans = hw->wiphy->bands[NL80211_BAND_2GHZ]->n_channels;

sys/compat/linuxkpi/common/src/linux_80211.c

6986

supband = hw->wiphy->bands[NL80211_BAND_2GHZ];

sys/compat/linuxkpi/common/src/linux_80211.c

6997

lkpi_ic_getradiocaps_ht(ic, hw, bands, &chan_flags,

sys/compat/linuxkpi/common/src/linux_80211.c

7043

if (hw->wiphy->bands[NL80211_BAND_5GHZ] != NULL)

sys/compat/linuxkpi/common/src/linux_80211.c

7044

nchans = hw->wiphy->bands[NL80211_BAND_5GHZ]->n_channels;

sys/compat/linuxkpi/common/src/linux_80211.c

7050

lkpi_ic_getradiocaps_ht(ic, hw, bands, &chan_flags,

sys/compat/linuxkpi/common/src/linux_80211.c

7054

if (hw->wiphy->bands[NL80211_BAND_5GHZ]->vht_cap.vht_supported) {

sys/compat/linuxkpi/common/src/linux_80211.c

7058

hw->wiphy->bands[NL80211_BAND_5GHZ]->vht_cap.cap;

sys/compat/linuxkpi/common/src/linux_80211.c

7060

hw->wiphy->bands[NL80211_BAND_5GHZ]->vht_cap.vht_mcs;

sys/compat/linuxkpi/common/src/linux_80211.c

7073

channels = hw->wiphy->bands[NL80211_BAND_5GHZ]->channels;

sys/compat/linuxkpi/common/src/linux_80211.c

7132

struct ieee80211_hw *hw;

sys/compat/linuxkpi/common/src/linux_80211.c

7220

hw = LHW_TO_HW(lhw);

sys/compat/linuxkpi/common/src/linux_80211.c

7221

hw->wiphy = wiphy;

sys/compat/linuxkpi/common/src/linux_80211.c

7222

hw->conf.flags |= IEEE80211_CONF_IDLE;

sys/compat/linuxkpi/common/src/linux_80211.c

7223

hw->priv = (void *)(lhw + 1);

sys/compat/linuxkpi/common/src/linux_80211.c

7232

return (hw);

sys/compat/linuxkpi/common/src/linux_80211.c

7236

linuxkpi_ieee80211_iffree(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211.c

7242

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

7285

wiphy_lock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

7295

lkpi_80211_mo_remove_chanctx(hw, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

7313

wiphy_unlock(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

733

ht_cap = &hw->wiphy->bands[band]->ht_cap;

sys/compat/linuxkpi/common/src/linux_80211.c

7332

linuxkpi_set_ieee80211_dev(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211.c

7338

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

7350

dev = wiphy_dev(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

7392

linuxkpi_ieee80211_ifattach(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211.c

7398

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

7402

lhw->workq = alloc_ordered_workqueue(wiphy_name(hw->wiphy), 0);

sys/compat/linuxkpi/common/src/linux_80211.c

7407

if (!is_zero_ether_addr(hw->wiphy->perm_addr)) {

sys/compat/linuxkpi/common/src/linux_80211.c

7409

hw->wiphy->perm_addr);

sys/compat/linuxkpi/common/src/linux_80211.c

7410

} else if (hw->wiphy->n_addresses > 0) {

sys/compat/linuxkpi/common/src/linux_80211.c

7413

hw->wiphy->addresses[0].addr);

sys/compat/linuxkpi/common/src/linux_80211.c

7420

ic->ic_headroom = hw->extra_tx_headroom;

sys/compat/linuxkpi/common/src/linux_80211.c

7451

if (bootverbose && !ieee80211_hw_check(hw, HAS_RATE_CONTROL))

sys/compat/linuxkpi/common/src/linux_80211.c

7456

if (ieee80211_hw_check(hw, SUPPORTS_TX_FRAG))

sys/compat/linuxkpi/common/src/linux_80211.c

7460

if (ieee80211_hw_check(hw, AMPDU_AGGREGATION))

sys/compat/linuxkpi/common/src/linux_80211.c

7463

if (ieee80211_hw_check(hw, TX_AMSDU))

sys/compat/linuxkpi/common/src/linux_80211.c

7464

if (ieee80211_hw_check(hw, SUPPORTS_AMSDU_IN_AMPDU))

sys/compat/linuxkpi/common/src/linux_80211.c

7473

if (hw->wiphy->available_antennas_rx ||

sys/compat/linuxkpi/common/src/linux_80211.c

7474

hw->wiphy->available_antennas_tx) {

sys/compat/linuxkpi/common/src/linux_80211.c

7477

if (lkpi_80211_mo_get_antenna(hw, &txs, &rxs) == 0) {

sys/compat/linuxkpi/common/src/linux_80211.c

7485

if (lkpi_hwcrypto && hw->wiphy->n_cipher_suites > 0) {

sys/compat/linuxkpi/common/src/linux_80211.c

7489

for (i = 0; i < hw->wiphy->n_cipher_suites; i++) {

sys/compat/linuxkpi/common/src/linux_80211.c

7493

ic, hw->wiphy->cipher_suites[i]);

sys/compat/linuxkpi/common/src/linux_80211.c

7607

supband = hw->wiphy->bands[band];

sys/compat/linuxkpi/common/src/linux_80211.c

7615

if (hw->conf.chandef.chan != NULL)

sys/compat/linuxkpi/common/src/linux_80211.c

7624

cfg80211_chandef_create(&hw->conf.chandef, &channels[i],

sys/compat/linuxkpi/common/src/linux_80211.c

7629

lhw->dflt_chandef = hw->conf.chandef;

sys/compat/linuxkpi/common/src/linux_80211.c

7660

if (hw->wiphy->features & NL80211_FEATURE_DS_PARAM_SET_IE_IN_PROBES) {

sys/compat/linuxkpi/common/src/linux_80211.c

7679

if (hw->wiphy->max_scan_ie_len > 0) {

sys/compat/linuxkpi/common/src/linux_80211.c

7680

if (lhw->scan_ie_len > hw->wiphy->max_scan_ie_len)

sys/compat/linuxkpi/common/src/linux_80211.c

7682

hw->wiphy->max_scan_ie_len -= lhw->scan_ie_len;

sys/compat/linuxkpi/common/src/linux_80211.c

7686

if (hw->netdev_features != 0)

sys/compat/linuxkpi/common/src/linux_80211.c

7688

hw->netdev_features, NETIF_F_BITS);

sys/compat/linuxkpi/common/src/linux_80211.c

7699

linuxkpi_ieee80211_ifdetach(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211.c

7704

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

7710

linuxkpi_ieee80211_iterate_interfaces(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

7720

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

7732

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

7778

lkpi_ieee80211_iterate_keys(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211.c

779

lkpi_sta_sync_vht_from_ni(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211.c

7798

iterfunc(hw, vif, LSTA_TO_STA(lsta), lsta->kc[keyix], arg);

sys/compat/linuxkpi/common/src/linux_80211.c

7802

linuxkpi_ieee80211_iterate_keys(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

7822

lkpi_ieee80211_iterate_keys(hw, vif,

sys/compat/linuxkpi/common/src/linux_80211.c

7829

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

7837

lkpi_ieee80211_iterate_keys(hw, vif,

sys/compat/linuxkpi/common/src/linux_80211.c

7845

linuxkpi_ieee80211_iterate_chan_contexts(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

7853

KASSERT(hw != NULL && iterfunc != NULL,

sys/compat/linuxkpi/common/src/linux_80211.c

7854

("%s: hw %p iterfunc %p arg %p\n", __func__, hw, iterfunc, arg));

sys/compat/linuxkpi/common/src/linux_80211.c

7856

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

7862

iterfunc(hw, &lchanctx->chanctx_conf, arg);

sys/compat/linuxkpi/common/src/linux_80211.c

7868

linuxkpi_ieee80211_iterate_stations_atomic(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

7876

KASSERT(hw != NULL && iterfunc != NULL,

sys/compat/linuxkpi/common/src/linux_80211.c

7877

("%s: hw %p iterfunc %p arg %p\n", __func__, hw, iterfunc, arg));

sys/compat/linuxkpi/common/src/linux_80211.c

7879

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

7930

linuxkpi_ieee80211_scan_completed(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

7937

lhw = wiphy_priv(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

8029

lkpi_convert_rx_status(struct ieee80211_hw *hw, struct lkpi_sta *lsta,

sys/compat/linuxkpi/common/src/linux_80211.c

8044

if (ieee80211_hw_check(hw, SIGNAL_DBM) &&

sys/compat/linuxkpi/common/src/linux_80211.c

8109

supband = hw->wiphy->bands[rx_status->band];

sys/compat/linuxkpi/common/src/linux_80211.c

8282

linuxkpi_ieee80211_rx(struct ieee80211_hw *hw, struct sk_buff *skb,

sys/compat/linuxkpi/common/src/linux_80211.c

8300

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

8403

lkpi_convert_rx_status(hw, lsta, rx_status, &rx_stats, &rssi);

sys/compat/linuxkpi/common/src/linux_80211.c

843

vht_cap = &hw->wiphy->bands[band]->vht_cap;

sys/compat/linuxkpi/common/src/linux_80211.c

8465

if (ieee80211_hw_check(hw, RX_INCLUDES_FCS))

sys/compat/linuxkpi/common/src/linux_80211.c

8480

if (ieee80211_hw_check(hw, RX_INCLUDES_FCS))

sys/compat/linuxkpi/common/src/linux_80211.c

8919

linuxkpi_ieee80211_find_sta_by_ifaddr(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

8928

lhw = wiphy_priv(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

8956

linuxkpi_ieee80211_tx_dequeue(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

9023

_lkpi_ieee80211_free_txskb(struct ieee80211_hw *hw, struct sk_buff *skb,

sys/compat/linuxkpi/common/src/linux_80211.c

9044

linuxkpi_ieee80211_free_txskb(struct ieee80211_hw *hw, struct sk_buff *skb,

sys/compat/linuxkpi/common/src/linux_80211.c

9048

_lkpi_ieee80211_free_txskb(hw, skb, status);

sys/compat/linuxkpi/common/src/linux_80211.c

9053

linuxkpi_ieee80211_tx_status_ext(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

906

lkpi_sta_sync_from_ni(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211.c

9125

__func__, hw, skb, status, info->flags, IEEE80211_TX_INFO_FLAGS,

sys/compat/linuxkpi/common/src/linux_80211.c

9143

_lkpi_ieee80211_free_txskb(hw, skb, status);

sys/compat/linuxkpi/common/src/linux_80211.c

9147

linuxkpi_ieee80211_free_txskb(hw, skb, status);

sys/compat/linuxkpi/common/src/linux_80211.c

915

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

9152

linuxkpi_ieee80211_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb)

sys/compat/linuxkpi/common/src/linux_80211.c

9161

ieee80211_tx_status_ext(hw, &status);

sys/compat/linuxkpi/common/src/linux_80211.c

9191

linuxkpi_ieee80211_queue_delayed_work(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

9199

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

9204

linuxkpi_ieee80211_queue_work(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

9212

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

9217

linuxkpi_ieee80211_probereq_get(struct ieee80211_hw *hw, const uint8_t *addr,

sys/compat/linuxkpi/common/src/linux_80211.c

9228

skb = dev_alloc_skb(hw->extra_tx_headroom + len + tailroom);

sys/compat/linuxkpi/common/src/linux_80211.c

9232

skb_reserve(skb, hw->extra_tx_headroom);

sys/compat/linuxkpi/common/src/linux_80211.c

9251

linuxkpi_ieee80211_pspoll_get(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

9260

skb = dev_alloc_skb(hw->extra_tx_headroom + sizeof(*psp));

sys/compat/linuxkpi/common/src/linux_80211.c

9264

skb_reserve(skb, hw->extra_tx_headroom);

sys/compat/linuxkpi/common/src/linux_80211.c

9281

linuxkpi_ieee80211_nullfunc_get(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

9289

skb = dev_alloc_skb(hw->extra_tx_headroom + sizeof(*nullf));

sys/compat/linuxkpi/common/src/linux_80211.c

9293

skb_reserve(skb, hw->extra_tx_headroom);

sys/compat/linuxkpi/common/src/linux_80211.c

933

lkpi_sta_sync_ht_from_ni(hw, vif, sta, ni);

sys/compat/linuxkpi/common/src/linux_80211.c

936

lkpi_sta_sync_vht_from_ni(hw, vif, sta, ni);

sys/compat/linuxkpi/common/src/linux_80211.c

9364

linuxkpi_ieee80211_stop_queue(struct ieee80211_hw *hw, int qnum)

sys/compat/linuxkpi/common/src/linux_80211.c

9371

KASSERT(qnum < hw->queues, ("%s: qnum %d >= hw->queues %d, hw %p\n",

sys/compat/linuxkpi/common/src/linux_80211.c

9372

__func__, qnum, hw->queues, hw));

sys/compat/linuxkpi/common/src/linux_80211.c

9374

lhw = wiphy_priv(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

9377

if (hw->queues >= IEEE80211_NUM_ACS)

sys/compat/linuxkpi/common/src/linux_80211.c

9399

lhw, hw, lvif, vif, ac, qnum);

sys/compat/linuxkpi/common/src/linux_80211.c

9409

linuxkpi_ieee80211_stop_queues(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211.c

9414

for (i = 0; i < hw->queues; i++)

sys/compat/linuxkpi/common/src/linux_80211.c

9415

linuxkpi_ieee80211_stop_queue(hw, i);

sys/compat/linuxkpi/common/src/linux_80211.c

9420

lkpi_ieee80211_wake_queues(struct ieee80211_hw *hw, int hwq)

sys/compat/linuxkpi/common/src/linux_80211.c

9428

if (hw->queues >= IEEE80211_NUM_ACS)

sys/compat/linuxkpi/common/src/linux_80211.c

9433

lhw = wiphy_priv(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

9457

lhw, hw, lvif, vif, ac);

sys/compat/linuxkpi/common/src/linux_80211.c

947

lkpi_sync_chanctx_cw_from_rx_bw(hw, vif, sta);

sys/compat/linuxkpi/common/src/linux_80211.c

9482

lkpi_80211_mo_wake_tx_queue(hw, sta->txq[tid], false);

sys/compat/linuxkpi/common/src/linux_80211.c

949

bss_changed |= lkpi_sta_supp_rates(hw, vif, ni, &rc_changed);

sys/compat/linuxkpi/common/src/linux_80211.c

9493

lkpi_ieee80211_wake_queues_locked(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211.c

9498

for (i = 0; i < hw->queues; i++)

sys/compat/linuxkpi/common/src/linux_80211.c

9499

lkpi_ieee80211_wake_queues(hw, i);

sys/compat/linuxkpi/common/src/linux_80211.c

9503

linuxkpi_ieee80211_wake_queues(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211.c

9508

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

9511

lkpi_ieee80211_wake_queues_locked(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

9516

linuxkpi_ieee80211_wake_queue(struct ieee80211_hw *hw, int qnum)

sys/compat/linuxkpi/common/src/linux_80211.c

9521

KASSERT(qnum < hw->queues, ("%s: qnum %d >= hw->queues %d, hw %p\n",

sys/compat/linuxkpi/common/src/linux_80211.c

9522

__func__, qnum, hw->queues, hw));

sys/compat/linuxkpi/common/src/linux_80211.c

9524

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

9527

lkpi_ieee80211_wake_queues(hw, qnum);

sys/compat/linuxkpi/common/src/linux_80211.c

9532

linuxkpi_ieee80211_handle_wake_tx_queue(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

9537

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

9540

ieee80211_txq_schedule_start(hw, txq->ac);

sys/compat/linuxkpi/common/src/linux_80211.c

9547

ntxq = ieee80211_next_txq(hw, txq->ac);

sys/compat/linuxkpi/common/src/linux_80211.c

9555

skb = linuxkpi_ieee80211_tx_dequeue(hw, ntxq);

sys/compat/linuxkpi/common/src/linux_80211.c

9559

lkpi_80211_mo_tx(hw, &control, skb);

sys/compat/linuxkpi/common/src/linux_80211.c

9562

ieee80211_return_txq(hw, ntxq, false);

sys/compat/linuxkpi/common/src/linux_80211.c

9564

ieee80211_txq_schedule_end(hw, txq->ac);

sys/compat/linuxkpi/common/src/linux_80211.c

9575

linuxkpi_ieee80211_txq_schedule_start(struct ieee80211_hw *hw, uint8_t ac)

sys/compat/linuxkpi/common/src/linux_80211.c

9579

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

9594

linuxkpi_ieee80211_next_txq(struct ieee80211_hw *hw, uint8_t ac)

sys/compat/linuxkpi/common/src/linux_80211.c

9600

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

962

lkpi_80211_mo_link_sta_rc_update(hw, vif, &sta->deflink, rc_changed);

sys/compat/linuxkpi/common/src/linux_80211.c

9635

void linuxkpi_ieee80211_schedule_txq(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

9651

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

9876

lkpi_80211_update_chandef(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

9885

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

9887

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

9924

same = cfg80211_chan_def_are_same(cd, &hw->conf.chandef);

sys/compat/linuxkpi/common/src/linux_80211.c

9927

hw->conf.chandef = *cd;

sys/compat/linuxkpi/common/src/linux_80211.c

9941

&hw->conf.chandef, hw->conf.chandef.chan->center_freq,

sys/compat/linuxkpi/common/src/linux_80211.c

9942

hw->conf.chandef.width,

sys/compat/linuxkpi/common/src/linux_80211.c

9943

hw->conf.chandef.center_freq1,

sys/compat/linuxkpi/common/src/linux_80211.c

9944

hw->conf.chandef.center_freq2,

sys/compat/linuxkpi/common/src/linux_80211.c

9945

hw->conf.chandef.punctured,

sys/compat/linuxkpi/common/src/linux_80211.c

9952

error = lkpi_80211_mo_config(hw, changed);

sys/compat/linuxkpi/common/src/linux_80211.c

9957

ieee80211_emulate_add_chanctx(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

9962

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

9968

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

9974

hw->conf.radar_enabled = chanctx_conf->radar_enabled;

sys/compat/linuxkpi/common/src/linux_80211.c

9975

error = lkpi_80211_update_chandef(hw, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211.c

9980

ieee80211_emulate_remove_chanctx(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211.c

9984

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211.c

9990

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211.c

9996

hw->conf.radar_enabled = false;

sys/compat/linuxkpi/common/src/linux_80211.c

9997

lkpi_80211_update_chandef(hw, NULL);

sys/compat/linuxkpi/common/src/linux_80211.h

189

struct ieee80211_hw *hw; /* back pointer f. locking. */

sys/compat/linuxkpi/common/src/linux_80211.h

344

struct ieee80211_hw hw __aligned(CACHE_LINE_SIZE);

sys/compat/linuxkpi/common/src/linux_80211.h

346

#define LHW_TO_HW(_lhw) (&(_lhw)->hw)

sys/compat/linuxkpi/common/src/linux_80211.h

347

#define HW_TO_LHW(_hw) container_of(_hw, struct lkpi_hw, hw)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

1004

LKPI_80211_TRACE_MO("hw %p vif %p grd %p", hw, vif, grd);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

1005

lhw->ops->set_rekey_data(hw, vif, grd);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

1013

lkpi_80211_mo_set_default_unicast_key(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

1020

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

1022

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

1028

LKPI_80211_TRACE_MO("hw %p vif %p idx %d", hw, vif, idx);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

1029

lhw->ops->set_default_unicast_key(hw, vif, idx);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

104

LKPI_80211_TRACE_MO("hw %p", hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

106

error = lhw->ops->get_antenna(hw, 0, txs, rxs);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

113

lkpi_80211_mo_set_frag_threshold(struct ieee80211_hw *hw, uint32_t frag_th)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

119

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

121

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

127

LKPI_80211_TRACE_MO("hw %p frag_th %u", hw, frag_th);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

129

error = lhw->ops->set_frag_threshold(hw, 0, frag_th);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

136

lkpi_80211_mo_set_rts_threshold(struct ieee80211_hw *hw, uint32_t rts_th)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

142

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

144

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

150

LKPI_80211_TRACE_MO("hw %p rts_th %u", hw, rts_th);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

152

error = lhw->ops->set_rts_threshold(hw, 0, rts_th);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

160

lkpi_80211_mo_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

166

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

182

LKPI_80211_TRACE_MO("hw %p vif %p", hw, vif);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

183

error = lhw->ops->add_interface(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

195

lkpi_80211_mo_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

200

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

212

LKPI_80211_TRACE_MO("hw %p vif %p", hw, vif);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

213

lhw->ops->remove_interface(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

221

lkpi_80211_mo_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

227

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

235

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

242

LKPI_80211_TRACE_MO("CALLING hw %p vif %p sr %p", hw, vif, sr);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

243

error = lhw->ops->hw_scan(hw, vif, sr);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

244

LKPI_80211_TRACE_MO("RETURNING hw %p vif %p sr %p error %d", hw, vif, sr, error);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

251

lkpi_80211_mo_cancel_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

255

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

257

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

261

LKPI_80211_TRACE_MO("hw %p vif %p", hw, vif);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

262

lhw->ops->cancel_hw_scan(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

266

lkpi_80211_mo_sw_scan_complete(struct ieee80211_hw *hw, struct ieee80211_vif *vif)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

270

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

274

LKPI_80211_TRACE_MO("hw %p vif %p", hw, vif);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

275

lhw->ops->sw_scan_complete(hw, vif);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

280

lkpi_80211_mo_sw_scan_start(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

285

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

289

LKPI_80211_TRACE_MO("hw %p vif %p", hw, vif);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

290

lhw->ops->sw_scan_start(hw, vif, addr);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

298

lkpi_80211_mo_prepare_multicast(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

306

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

310

LKPI_80211_TRACE_MO("hw %p mc_list %p", hw, mc_list);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

311

ptr = lhw->ops->prepare_multicast(hw, mc_list);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

316

lkpi_80211_mo_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

321

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

323

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

327

LKPI_80211_TRACE_MO("hw %p changed_flags %#x total_flags %p mc_ptr %ju", hw, changed_flags, total_flags, (uintmax_t)mc_ptr);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

328

lhw->ops->configure_filter(hw, changed_flags, total_flags, mc_ptr);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

338

lkpi_80211_mo_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

345

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

357

LKPI_80211_TRACE_MO("hw %p vif %p sta %p", hw, vif, sta);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

358

error = lhw->ops->sta_add(hw, vif, sta);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

367

lkpi_80211_mo_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

374

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

387

LKPI_80211_TRACE_MO("hw %p vif %p sta %p", hw, vif, sta);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

388

error = lhw->ops->sta_remove(hw, vif, sta);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

397

lkpi_80211_mo_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

404

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

407

LKPI_80211_TRACE_MO("hw %p vif %p sta %p nstate %d", hw, vif, sta, nstate);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

408

error = lhw->ops->sta_state(hw, vif, sta, lsta->state, nstate);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

421

error = lkpi_80211_mo_sta_add(hw, vif, sta);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

426

error = lkpi_80211_mo_sta_remove(hw, vif, sta);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

441

lkpi_80211_mo_config(struct ieee80211_hw *hw, uint32_t changed)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

446

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

448

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

454

LKPI_80211_TRACE_MO("hw %p changed %u", hw, changed);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

456

error = lhw->ops->config(hw, 0, changed);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

464

lkpi_80211_mo_assign_vif_chanctx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

470

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

477

hw, vif, conf, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

478

error = lhw->ops->assign_vif_chanctx(hw, vif, conf, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

487

lkpi_80211_mo_unassign_vif_chanctx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

493

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

495

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

503

hw, vif, conf, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

504

lhw->ops->unassign_vif_chanctx(hw, vif, conf, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

509

lkpi_80211_mo_add_chanctx(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

51

lkpi_80211_mo_start(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

517

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

519

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

525

LKPI_80211_TRACE_MO("hw %p chanctx_conf %p", hw, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

526

error = lhw->ops->add_chanctx(hw, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

537

lkpi_80211_mo_change_chanctx(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

543

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

545

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

549

LKPI_80211_TRACE_MO("hw %p chanctx_conf %p changed %u", hw, chanctx_conf, changed);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

550

lhw->ops->change_chanctx(hw, chanctx_conf, changed);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

554

lkpi_80211_mo_remove_chanctx(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

56

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

561

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

563

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

567

LKPI_80211_TRACE_MO("hw %p chanctx_conf %p", hw, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

568

lhw->ops->remove_chanctx(hw, chanctx_conf);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

574

lkpi_80211_mo_vif_cfg_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

58

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

582

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

590

LKPI_80211_TRACE_MO("hw %p vif %p vif_cfg_bits %#jx", hw, vif, (uintmax_t)vif_cfg_bits);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

592

lhw->ops->vif_cfg_changed(hw, vif, vif_cfg_bits);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

594

lhw->ops->bss_info_changed(hw, vif, &vif->bss_conf, vif_cfg_bits);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

598

lkpi_80211_mo_link_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

607

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

618

LKPI_80211_TRACE_MO("hw %p vif %p conf %p link_info_bits %#jx", hw, vif, conf, (uintmax_t)link_info_bits);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

620

lhw->ops->link_info_changed(hw, vif, conf, link_info_bits);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

622

lhw->ops->bss_info_changed(hw, vif, conf, link_info_bits);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

632

lkpi_80211_mo_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

639

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

646

LKPI_80211_TRACE_MO("hw %p vif %p conf %p changed %#jx", hw, vif, conf, (uintmax_t)bss_changed);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

647

lhw->ops->bss_info_changed(hw, vif, conf, bss_changed);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

651

lkpi_80211_mo_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

657

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

664

hw, vif, link_id, ac, txqp);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

665

error = lhw->ops->conf_tx(hw, vif, link_id, ac, txqp);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

672

lkpi_80211_mo_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

677

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

681

LKPI_80211_TRACE_MO("hw %p vif %p nqueues %u drop %d", hw, vif, nqueues, drop);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

682

lhw->ops->flush(hw, vif, nqueues, drop);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

686

lkpi_80211_mo_mgd_prepare_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

69

LKPI_80211_TRACE_MO("hw %p", hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

691

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

695

LKPI_80211_TRACE_MO("hw %p vif %p txinfo %p", hw, vif, txinfo);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

696

lhw->ops->mgd_prepare_tx(hw, vif, txinfo);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

70

error = lhw->ops->start(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

700

lkpi_80211_mo_mgd_complete_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

705

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

709

LKPI_80211_TRACE_MO("hw %p vif %p txinfo %p", hw, vif, txinfo);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

710

lhw->ops->mgd_complete_tx(hw, vif, txinfo);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

714

lkpi_80211_mo_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *txctrl,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

719

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

723

LKPI_80211_TRACE_MO("hw %p txctrl %p skb %p", hw, txctrl, skb);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

724

lhw->ops->tx(hw, txctrl, skb);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

728

lkpi_80211_mo_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

733

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

737

ieee80211_schedule_txq(hw, txq);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

742

LKPI_80211_TRACE_MO("hw %p txq %p", hw, txq);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

743

lhw->ops->wake_tx_queue(hw, txq);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

747

lkpi_80211_mo_sync_rx_queues(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

751

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

755

LKPI_80211_TRACE_MO("hw %p", hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

756

lhw->ops->sync_rx_queues(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

760

lkpi_80211_mo_sta_pre_rcu_remove(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

765

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

769

LKPI_80211_TRACE_MO("hw %p vif %p sta %p", hw, vif, sta);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

770

lhw->ops->sta_pre_rcu_remove(hw, vif, sta);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

774

lkpi_80211_mo_link_sta_rc_update(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

780

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

785

hw, vif, link_sta, rc_changed);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

786

lhw->ops->link_sta_rc_update(hw, vif, link_sta, rc_changed);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

79

lkpi_80211_mo_stop(struct ieee80211_hw *hw, bool suspend)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

790

lkpi_80211_mo_set_bitrate_mask(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

797

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

799

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

806

hw, vif, br_mask);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

807

error = lhw->ops->set_bitrate_mask(hw, vif, br_mask);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

814

lkpi_80211_mo_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

821

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

823

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

83

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

845

LKPI_80211_TRACE_MO("hw %p cmd %d vif %p sta %p kc %p", hw, cmd, vif, sta, kc);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

846

error = lhw->ops->set_key(hw, cmd, vif, sta, kc);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

853

lkpi_80211_mo_sta_set_decap_offload(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

859

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

861

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

865

LKPI_80211_TRACE_MO("hw %p vif %p sta %p enable %d", hw, vif, sta, enable);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

866

lhw->ops->sta_set_decap_offload(hw, vif, sta, enable);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

87

LKPI_80211_TRACE_MO("hw %p suspend %d", hw, suspend);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

870

lkpi_80211_mo_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

876

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

88

lhw->ops->stop(hw, suspend);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

883

hw, vif, params, params->sta, params->action, params->buf_size,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

885

error = lhw->ops->ampdu_action(hw, vif, params);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

892

lkpi_80211_mo_sta_statistics(struct ieee80211_hw *hw, struct ieee80211_vif *vif,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

899

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

911

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

913

LKPI_80211_TRACE_MO("hw %p vif %p sta %p sinfo %p", hw, vif, sta, sinfo);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

914

lhw->ops->sta_statistics(hw, vif, sta, sinfo);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

922

lkpi_80211_mo_suspend(struct ieee80211_hw *hw, struct cfg80211_wowlan *wowlan)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

928

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

93

lkpi_80211_mo_get_antenna(struct ieee80211_hw *hw, u32 *txs, u32 *rxs)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

930

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

936

LKPI_80211_TRACE_MO("hw %p wowlan %p", hw, wowlan);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

937

error = lhw->ops->suspend(hw, wowlan);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

944

lkpi_80211_mo_resume(struct ieee80211_hw *hw)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

950

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

952

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

958

LKPI_80211_TRACE_MO("hw %p", hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

959

error = lhw->ops->resume(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

966

lkpi_80211_mo_set_wakeup(struct ieee80211_hw *hw, bool enable)

sys/compat/linuxkpi/common/src/linux_80211_macops.c

972

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

974

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

98

lhw = HW_TO_LHW(hw);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

980

LKPI_80211_TRACE_MO("hw %p enable %d", hw, enable);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

981

lhw->ops->set_wakeup(hw, enable);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

989

lkpi_80211_mo_set_rekey_data(struct ieee80211_hw *hw,

sys/compat/linuxkpi/common/src/linux_80211_macops.c

996

lockdep_assert_wiphy(hw->wiphy);

sys/compat/linuxkpi/common/src/linux_80211_macops.c

998

lhw = HW_TO_LHW(hw);

sys/dev/adb/adb_mouse.c

160

sc->hw.buttons = 2;

sys/dev/adb/adb_mouse.c

161

sc->hw.iftype = MOUSE_IF_UNKNOWN;

sys/dev/adb/adb_mouse.c

162

sc->hw.type = MOUSE_UNKNOWN;

sys/dev/adb/adb_mouse.c

163

sc->hw.model = sc->hw.hwid = 0;

sys/dev/adb/adb_mouse.c

194

memcpy(&sc->hw.hwid,r1,4);

sys/dev/adb/adb_mouse.c

199

sc->hw.type = MOUSE_PAD;

sys/dev/adb/adb_mouse.c

203

sc->hw.type = MOUSE_MOUSE;

sys/dev/adb/adb_mouse.c

207

sc->hw.type = MOUSE_TRACKBALL;

sys/dev/adb/adb_mouse.c

212

sc->hw.type = MOUSE_PAD;

sys/dev/adb/adb_mouse.c

218

sc->hw.buttons = r1[7];

sys/dev/adb/adb_mouse.c

221

sc->hw.buttons, sc->mode.resolution,description);

sys/dev/adb/adb_mouse.c

230

if (sc->hw.hwid == 0x4b4f4954) {

sys/dev/adb/adb_mouse.c

404

if (rounddown2(buttons, 1 << sc->hw.buttons)

sys/dev/adb/adb_mouse.c

406

buttons |= 1 << (sc->hw.buttons - 1);

sys/dev/adb/adb_mouse.c

408

buttons &= (1 << sc->hw.buttons) - 1;

sys/dev/adb/adb_mouse.c

586

*(mousehw_t *)addr = sc->hw;

sys/dev/adb/adb_mouse.c

79

mousehw_t hw;

sys/dev/aq/aq2_fw.c

102

v = AQ_READ_REG(hw, AQ2_MIF_BOOT_REG);

sys/dev/aq/aq2_fw.c

105

v = AQ_READ_REG(hw, AQ2_MCP_HOST_REQ_INT_REG);

sys/dev/aq/aq2_fw.c

111

device_printf(hw->dev, "A2 firmware restart timeout\n");

sys/dev/aq/aq2_fw.c

115

v = AQ_READ_REG(hw, AQ2_MIF_BOOT_REG);

sys/dev/aq/aq2_fw.c

117

device_printf(hw->dev, "A2 firmware restart failed\n");

sys/dev/aq/aq2_fw.c

120

v = AQ_READ_REG(hw, AQ2_MCP_HOST_REQ_INT_REG);

sys/dev/aq/aq2_fw.c

122

device_printf(hw->dev, "A2 firmware required but not present\n");

sys/dev/aq/aq2_fw.c

127

err = aq2_fw_interface_buffer_read(hw,

sys/dev/aq/aq2_fw.c

131

hw->fw_version.raw =

sys/dev/aq/aq2_fw.c

139

err = aq2_fw_interface_buffer_read(hw,

sys/dev/aq/aq2_fw.c

143

hw->aq2_iface = v & AQ2_FW_INTERFACE_OUT_VERSION_IFACE_VER;

sys/dev/aq/aq2_fw.c

144

switch (hw->aq2_iface) {

sys/dev/aq/aq2_fw.c

155

device_printf(hw->dev, "Atlantic 2 %s, firmware %u.%u.%u\n", iface,

sys/dev/aq/aq2_fw.c

156

hw->fw_version.major_version, hw->fw_version.minor_version,

sys/dev/aq/aq2_fw.c

157

hw->fw_version.build_number);

sys/dev/aq/aq2_fw.c

160

err = aq2_fw_interface_buffer_read(hw,

sys/dev/aq/aq2_fw.c

165

hw->art_filter_base_index = ((filter_caps[2] &

sys/dev/aq/aq2_fw.c

174

aq2_fw_wait_shared_ack(struct aq_hw *hw)

sys/dev/aq/aq2_fw.c

176

AQ_WRITE_REG(hw, AQ2_MIF_HOST_FINISHED_STATUS_WRITE_REG,

sys/dev/aq/aq2_fw.c

178

return (AQ_HW_WAIT_FOR((AQ_READ_REG(hw,

sys/dev/aq/aq2_fw.c

184

aq2_fw_reset(struct aq_hw *hw)

sys/dev/aq/aq2_fw.c

189

AQ_WRITE_REG_BIT(hw, AQ2_FW_INTERFACE_IN_LINK_CONTROL_REG,

sys/dev/aq/aq2_fw.c

193

AQ_WRITE_REG(hw, AQ2_FW_INTERFACE_IN_MTU_REG, HW_ATL_B0_MTU_JUMBO);

sys/dev/aq/aq2_fw.c

195

v = AQ_READ_REG(hw, AQ2_FW_INTERFACE_IN_REQUEST_POLICY_REG);

sys/dev/aq/aq2_fw.c

204

AQ_WRITE_REG(hw, AQ2_FW_INTERFACE_IN_REQUEST_POLICY_REG, v);

sys/dev/aq/aq2_fw.c

206

err = aq2_fw_wait_shared_ack(hw);

sys/dev/aq/aq2_fw.c

208

device_printf(hw->dev, "A2 firmware reset timed out\n");

sys/dev/aq/aq2_fw.c

213

aq2_fw_get_mac_addr(struct aq_hw *hw, uint8_t *mac)

sys/dev/aq/aq2_fw.c

217

mac_addr[0] = AQ_READ_REG(hw, AQ2_FW_INTERFACE_IN_MAC_ADDRESS_REG);

sys/dev/aq/aq2_fw.c

218

mac_addr[1] = AQ_READ_REG(hw, AQ2_FW_INTERFACE_IN_MAC_ADDRESS_REG + 4);

sys/dev/aq/aq2_fw.c

221

device_printf(hw->dev, "A2 mac address not found\n");

sys/dev/aq/aq2_fw.c

232

aq2_fw_set_mode(struct aq_hw *hw, enum aq_hw_fw_mpi_state mode,

sys/dev/aq/aq2_fw.c

238

v = AQ_READ_REG(hw, AQ2_FW_INTERFACE_IN_LINK_OPTIONS_REG);

sys/dev/aq/aq2_fw.c

270

if (hw->fc.fc_tx)

sys/dev/aq/aq2_fw.c

272

if (hw->fc.fc_rx)

sys/dev/aq/aq2_fw.c

277

AQ_WRITE_REG_BIT(hw, AQ2_FW_INTERFACE_IN_LINK_CONTROL_REG,

sys/dev/aq/aq2_fw.c

283

AQ_WRITE_REG(hw, AQ2_FW_INTERFACE_IN_LINK_OPTIONS_REG, v);

sys/dev/aq/aq2_fw.c

285

err = aq2_fw_wait_shared_ack(hw);

sys/dev/aq/aq2_fw.c

288

AQ_WRITE_REG_BIT(hw, AQ2_FW_INTERFACE_IN_LINK_CONTROL_REG,

sys/dev/aq/aq2_fw.c

292

return (aq2_fw_wait_shared_ack(hw));

sys/dev/aq/aq2_fw.c

296

aq2_fw_get_mode(struct aq_hw *hw, enum aq_hw_fw_mpi_state *modep,

sys/dev/aq/aq2_fw.c

306

v = AQ_READ_REG(hw, AQ2_FW_INTERFACE_OUT_LINK_STATUS_REG);

sys/dev/aq/aq2_fw.c

36

static int aq2_fw_reset(struct aq_hw *hw);

sys/dev/aq/aq2_fw.c

37

static int aq2_fw_set_mode(struct aq_hw *hw, enum aq_hw_fw_mpi_state mode,

sys/dev/aq/aq2_fw.c

39

static int aq2_fw_get_mode(struct aq_hw *hw, enum aq_hw_fw_mpi_state *mode,

sys/dev/aq/aq2_fw.c

394

aq2_fw_get_stats(struct aq_hw *hw, struct aq_hw_stats *stats)

sys/dev/aq/aq2_fw.c

401

err = aq2_fw_interface_buffer_read(hw, AQ2_FW_INTERFACE_OUT_STATS_REG,

sys/dev/aq/aq2_fw.c

406

if (hw->aq2_iface == AQ2_FW_INTERFACE_OUT_VERSION_IFACE_VER_A0) {

sys/dev/aq/aq2_fw.c

41

static int aq2_fw_get_mac_addr(struct aq_hw *hw, uint8_t *mac);

sys/dev/aq/aq2_fw.c

42

static int aq2_fw_get_stats(struct aq_hw *hw, struct aq_hw_stats *stats);

sys/dev/aq/aq2_fw.c

423

} else if (hw->aq2_iface == AQ2_FW_INTERFACE_OUT_VERSION_IFACE_VER_B0) {

sys/dev/aq/aq2_fw.c

46

aq2_fw_interface_buffer_read(struct aq_hw *hw, uint32_t reg0, uint32_t *data0,

sys/dev/aq/aq2_fw.c

53

tid0 = AQ_READ_REG(hw, AQ2_FW_INTERFACE_OUT_TRANSACTION_ID_REG);

sys/dev/aq/aq2_fw.c

65

*data = AQ_READ_REG(hw, reg);

sys/dev/aq/aq2_fw.c

67

tid1 = AQ_READ_REG(hw, AQ2_FW_INTERFACE_OUT_TRANSACTION_ID_REG);

sys/dev/aq/aq2_fw.c

72

device_printf(hw->dev, "A2 interface buffer read timeout\n");

sys/dev/aq/aq2_fw.c

80

aq2_fw_reboot(struct aq_hw *hw)

sys/dev/aq/aq2_fw.c

86

hw->fw_ops = &aq2_fw_ops;

sys/dev/aq/aq2_fw.c

88

AQ_WRITE_REG(hw, AQ2_MCP_HOST_REQ_INT_CLR_REG, 1);

sys/dev/aq/aq2_fw.c

89

AQ_WRITE_REG(hw, AQ2_MIF_BOOT_REG, 1); /* reboot request */

sys/dev/aq/aq2_fw.c

91

v = AQ_READ_REG(hw, AQ2_MIF_BOOT_REG);

sys/dev/aq/aq2_fw.c

97

device_printf(hw->dev, "A2 firmware reboot timeout\n");

sys/dev/aq/aq_device.h

109

struct aq_hw hw;

sys/dev/aq/aq_fw.c

102

uint32_t flb_status = reg_glb_daisy_chain_status1_get(hw);

sys/dev/aq/aq_fw.c

103

boot_exit_code = AQ_READ_REG(hw, 0x388);

sys/dev/aq/aq_fw.c

109

device_printf(hw->dev, "Neither RBL nor FLB started\n");

sys/dev/aq/aq_fw.c

113

hw->rbl_enabled = boot_exit_code != 0;

sys/dev/aq/aq_fw.c

115

trace(dbg_init, "RBL enabled = %d", hw->rbl_enabled);

sys/dev/aq/aq_fw.c

122

if (hw->fast_start_enabled && !ver) {

sys/dev/aq/aq_fw.c

123

int err = wait_init_mac_firmware(hw);

sys/dev/aq/aq_fw.c

130

int err = mac_soft_reset(hw, &mode);

sys/dev/aq/aq_fw.c

132

device_printf(hw->dev, "MAC reset failed: %d\n", err);

sys/dev/aq/aq_fw.c

139

hw->flash_present = true;

sys/dev/aq/aq_fw.c

140

return wait_init_mac_firmware(hw);

sys/dev/aq/aq_fw.c

144

hw->flash_present = true;

sys/dev/aq/aq_fw.c

145

return wait_init_mac_firmware(hw);

sys/dev/aq/aq_fw.c

148

device_printf(hw->dev, "F/W bootload error: unknown bootloader type\n");

sys/dev/aq/aq_fw.c

153

device_printf(hw->dev, "RBL> Host Bootload mode: this driver does not support Host Boot\n");

sys/dev/aq/aq_fw.c

164

device_printf(hw->dev, "RBL> F/W Host Bootload not implemented\n");

sys/dev/aq/aq_fw.c

170

aq_fw_ops_init(struct aq_hw* hw)

sys/dev/aq/aq_fw.c

172

if (hw->fw_version.raw == 0)

sys/dev/aq/aq_fw.c

173

hw->fw_version.raw = AQ_READ_REG(hw, 0x18);

sys/dev/aq/aq_fw.c

176

hw->fw_version.major_version, hw->fw_version.minor_version,

sys/dev/aq/aq_fw.c

177

hw->fw_version.build_number);

sys/dev/aq/aq_fw.c

179

if (hw->fw_version.major_version == 1) {

sys/dev/aq/aq_fw.c

181

hw->fw_ops = &aq_fw1x_ops;

sys/dev/aq/aq_fw.c

183

} else if (hw->fw_version.major_version >= 2) {

sys/dev/aq/aq_fw.c

185

hw->fw_ops = &aq_fw2x_ops;

sys/dev/aq/aq_fw.c

189

device_printf(hw->dev, "aq_fw_ops_init(): invalid F/W version %#x\n",

sys/dev/aq/aq_fw.c

190

hw->fw_version.raw);

sys/dev/aq/aq_fw.c

196

mac_soft_reset(struct aq_hw* hw, enum aq_fw_bootloader_mode* mode /*= nullptr*/)

sys/dev/aq/aq_fw.c

198

if (hw->rbl_enabled) {

sys/dev/aq/aq_fw.c

199

return mac_soft_reset_rbl(hw, mode);

sys/dev/aq/aq_fw.c

204

return mac_soft_reset_flb(hw);

sys/dev/aq/aq_fw.c

209

mac_soft_reset_flb(struct aq_hw* hw)

sys/dev/aq/aq_fw.c

213

reg_global_ctl2_set(hw, 0x40e1);

sys/dev/aq/aq_fw.c

223

reg_glb_nvr_provisioning2_set(hw, 0xa0);

sys/dev/aq/aq_fw.c

224

reg_glb_nvr_interface1_set(hw, 0x9f);

sys/dev/aq/aq_fw.c

225

reg_glb_nvr_interface1_set(hw, 0x809f);

sys/dev/aq/aq_fw.c

228

reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk);

sys/dev/aq/aq_fw.c

231

reg_global_ctl2_set(hw, 0x80e0);

sys/dev/aq/aq_fw.c

232

reg_mif_power_gating_enable_control_set(hw, 0);

sys/dev/aq/aq_fw.c

233

if (!hw->fast_start_enabled)

sys/dev/aq/aq_fw.c

234

reg_glb_general_provisioning9_set(hw, 1);

sys/dev/aq/aq_fw.c

243

if (!hw->fast_start_enabled) {

sys/dev/aq/aq_fw.c

244

reg_global_ctl2_set(hw, 0x180e0);

sys/dev/aq/aq_fw.c

249

flb_status = reg_glb_daisy_chain_status1_get(hw) & 0x10;

sys/dev/aq/aq_fw.c

263

reg_global_ctl2_set(hw, 0x80e0);

sys/dev/aq/aq_fw.c

268

reg_glb_cpu_sem_set(hw, 1, 0);

sys/dev/aq/aq_fw.c

273

rx_rx_reg_res_dis_set(hw, 0);

sys/dev/aq/aq_fw.c

274

tx_tx_reg_res_dis_set(hw, 0);

sys/dev/aq/aq_fw.c

275

mpi_tx_reg_res_dis_set(hw, 0);

sys/dev/aq/aq_fw.c

276

reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk);

sys/dev/aq/aq_fw.c

280

restart_completed = reg_glb_fw_image_id1_get(hw) != 0;

sys/dev/aq/aq_fw.c

296

mac_soft_reset_rbl(struct aq_hw* hw, enum aq_fw_bootloader_mode* mode)

sys/dev/aq/aq_fw.c

300

reg_global_ctl2_set(hw, 0x40e1);

sys/dev/aq/aq_fw.c

301

reg_glb_cpu_sem_set(hw, 1, 0);

sys/dev/aq/aq_fw.c

302

reg_mif_power_gating_enable_control_set(hw, 0);

sys/dev/aq/aq_fw.c

306

reg_glb_cpu_no_reset_scratchpad_set(hw, 0xDEAD,

sys/dev/aq/aq_fw.c

310

uint32_t spi = AQ_READ_REG(hw, 0x53c);

sys/dev/aq/aq_fw.c

311

AQ_WRITE_REG(hw, 0x53c, spi | 0x10);

sys/dev/aq/aq_fw.c

314

rx_rx_reg_res_dis_set(hw, 0);

sys/dev/aq/aq_fw.c

315

tx_tx_reg_res_dis_set(hw, 0);

sys/dev/aq/aq_fw.c

316

mpi_tx_reg_res_dis_set(hw, 0);

sys/dev/aq/aq_fw.c

317

reg_glb_standard_ctl1_set(hw, (reg_glb_standard_ctl1_get(hw) & ~glb_reg_res_dis_msk) | glb_soft_res_msk);

sys/dev/aq/aq_fw.c

319

reg_global_ctl2_set(hw, 0x40e0);

sys/dev/aq/aq_fw.c

324

rbl_status = ((uint16_t)(reg_glb_cpu_no_reset_scratchpad_get(hw, NO_RESET_SCRATCHPAD_RBL_STATUS)));

sys/dev/aq/aq_fw.c

353

wait_init_mac_firmware(struct aq_hw* hw)

sys/dev/aq/aq_fw.c

356

if ((hw->fw_version.raw = AQ_READ_REG(hw, 0x18)) != 0)

sys/dev/aq/aq_fw.c

88

static int mac_soft_reset(struct aq_hw* hw, enum aq_fw_bootloader_mode* mode);

sys/dev/aq/aq_fw.c

89

static int mac_soft_reset_flb(struct aq_hw* hw);

sys/dev/aq/aq_fw.c

90

static int mac_soft_reset_rbl(struct aq_hw* hw, enum aq_fw_bootloader_mode* mode);

sys/dev/aq/aq_fw.c

91

static int wait_init_mac_firmware(struct aq_hw* hw);

sys/dev/aq/aq_fw.c

95

aq_fw_reset(struct aq_hw* hw)

sys/dev/aq/aq_fw.c

97

int ver = AQ_READ_REG(hw, 0x18);

sys/dev/aq/aq_fw.h

63

int (*reset)(struct aq_hw* hw);

sys/dev/aq/aq_fw.h

65

int (*set_mode)(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode, enum aq_fw_link_speed speed);

sys/dev/aq/aq_fw.h

66

int (*get_mode)(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode, enum aq_fw_link_speed* speed, enum aq_fw_link_fc* fc);

sys/dev/aq/aq_fw.h

68

int (*get_mac_addr)(struct aq_hw* hw, uint8_t* mac_addr);

sys/dev/aq/aq_fw.h

69

int (*get_stats)(struct aq_hw* hw, struct aq_hw_stats* stats);

sys/dev/aq/aq_fw.h

71

int (*led_control)(struct aq_hw* hw, uint32_t mode);

sys/dev/aq/aq_fw.h

79

int aq_fw_reset(struct aq_hw* hw);

sys/dev/aq/aq_fw.h

80

int aq_fw_ops_init(struct aq_hw* hw);

sys/dev/aq/aq_fw.h

81

int aq2_fw_reboot(struct aq_hw* hw);

sys/dev/aq/aq_fw1x.c

165

aq_fw1x_reset(struct aq_hw* hw)

sys/dev/aq/aq_fw1x.c

174

aq_hw_fw_downld_dwords(hw, hw->mbox_addr, (uint32_t*)&mbox,

sys/dev/aq/aq_fw1x.c

202

aq_fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,

sys/dev/aq/aq_fw1x.c

212

AQ_WRITE_REG(hw, AQ_HW_MPI_CONTROL_ADR, state.val);

sys/dev/aq/aq_fw1x.c

218

aq_fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,

sys/dev/aq/aq_fw1x.c

221

union aq_fw1x_state_reg state = { .val = AQ_READ_REG(hw, AQ_HW_MPI_STATE_ADR) };

sys/dev/aq/aq_fw1x.c

224

state.val, AQ_READ_REG(hw, AQ_HW_MPI_CONTROL_ADR));

sys/dev/aq/aq_fw1x.c

257

aq_fw1x_get_mac_addr(struct aq_hw* hw, uint8_t* mac)

sys/dev/aq/aq_fw1x.c

264

uint32_t efuse_shadow_addr = AQ_READ_REG(hw, 0x374);

sys/dev/aq/aq_fw1x.c

271

err = aq_hw_fw_downld_dwords(hw, efuse_shadow_addr + (40 * 4),

sys/dev/aq/aq_fw1x.c

298

aq_fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats)

sys/dev/aq/aq_fw1x.c

303

err = aq_hw_fw_downld_dwords(hw, hw->mbox_addr,

sys/dev/aq/aq_fw1x.c

304

(uint32_t*)(void*)&hw->mbox, sizeof hw->mbox / sizeof(uint32_t));

sys/dev/aq/aq_fw1x.c

307

memcpy(stats, &hw->mbox.stats, sizeof hw->mbox.stats);

sys/dev/aq/aq_fw1x.c

80

static int aq_fw1x_reset(struct aq_hw* hw);

sys/dev/aq/aq_fw1x.c

82

static int aq_fw1x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,

sys/dev/aq/aq_fw1x.c

84

static int aq_fw1x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,

sys/dev/aq/aq_fw1x.c

86

static int aq_fw1x_get_mac_addr(struct aq_hw* hw, uint8_t* mac_addr);

sys/dev/aq/aq_fw1x.c

87

static int aq_fw1x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats);

sys/dev/aq/aq_fw2x.c

196

static int aq_fw2x_reset(struct aq_hw* hw);

sys/dev/aq/aq_fw2x.c

198

static int aq_fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,

sys/dev/aq/aq_fw2x.c

200

static int aq_fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,

sys/dev/aq/aq_fw2x.c

203

static int aq_fw2x_get_mac_addr(struct aq_hw* hw, uint8_t* mac);

sys/dev/aq/aq_fw2x.c

204

static int aq_fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats);

sys/dev/aq/aq_fw2x.c

208

read64(struct aq_hw* hw, uint32_t addr)

sys/dev/aq/aq_fw2x.c

212

hi = AQ_READ_REG(hw, addr + 4);

sys/dev/aq/aq_fw2x.c

215

lo = AQ_READ_REG(hw, addr);

sys/dev/aq/aq_fw2x.c

216

hi = AQ_READ_REG(hw, addr + 4);

sys/dev/aq/aq_fw2x.c

223

get_mpi_ctrl(struct aq_hw* hw)

sys/dev/aq/aq_fw2x.c

225

return read64(hw, FW2X_MPI_CONTROL_ADDR);

sys/dev/aq/aq_fw2x.c

229

get_mpi_state(struct aq_hw* hw)

sys/dev/aq/aq_fw2x.c

231

return read64(hw, FW2X_MPI_STATE_ADDR);

sys/dev/aq/aq_fw2x.c

235

set_mpi_ctrl(struct aq_hw* hw, uint64_t value)

sys/dev/aq/aq_fw2x.c

237

AQ_WRITE_REG(hw, FW2X_MPI_CONTROL_ADDR, (uint32_t)value);

sys/dev/aq/aq_fw2x.c

238

AQ_WRITE_REG(hw, FW2X_MPI_CONTROL_ADDR + 4, (uint32_t)(value >> 32));

sys/dev/aq/aq_fw2x.c

243

aq_fw2x_reset(struct aq_hw* hw)

sys/dev/aq/aq_fw2x.c

247

int err = aq_hw_fw_downld_dwords(hw,

sys/dev/aq/aq_fw2x.c

248

hw->mbox_addr + offsetof(struct aq_fw2x_mailbox, caps),

sys/dev/aq/aq_fw2x.c

251

hw->fw_caps = caps.caps_lo | ((uint64_t)caps.caps_hi << 32);

sys/dev/aq/aq_fw2x.c

254

(unsigned long long)hw->fw_caps);

sys/dev/aq/aq_fw2x.c

292

aq_fw2x_set_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state mode,

sys/dev/aq/aq_fw2x.c

295

uint64_t mpi_ctrl = get_mpi_ctrl(hw);

sys/dev/aq/aq_fw2x.c

307

if (hw->fc.fc_rx)

sys/dev/aq/aq_fw2x.c

309

if (hw->fc.fc_tx)

sys/dev/aq/aq_fw2x.c

323

set_mpi_ctrl(hw, mpi_ctrl);

sys/dev/aq/aq_fw2x.c

329

aq_fw2x_get_mode(struct aq_hw* hw, enum aq_hw_fw_mpi_state* mode,

sys/dev/aq/aq_fw2x.c

332

uint64_t mpi_state = get_mpi_state(hw);

sys/dev/aq/aq_fw2x.c

337

uint64_t mpi_ctrl = get_mpi_ctrl(hw);

sys/dev/aq/aq_fw2x.c

368

aq_fw2x_get_mac_addr(struct aq_hw* hw, uint8_t* mac)

sys/dev/aq/aq_fw2x.c

375

uint32_t efuse_shadow_addr = AQ_READ_REG(hw, 0x364);

sys/dev/aq/aq_fw2x.c

382

err = aq_hw_fw_downld_dwords(hw, efuse_shadow_addr + (40 * 4), mac_addr,

sys/dev/aq/aq_fw2x.c

424

aq_fw2x_get_stats(struct aq_hw* hw, struct aq_hw_stats* stats)

sys/dev/aq/aq_fw2x.c

430

if ((hw->fw_caps & FW2X_CAP_STATISTICS) == 0) {

sys/dev/aq/aq_fw2x.c

436

err = aq_hw_fw_downld_dwords(hw,

sys/dev/aq/aq_fw2x.c

437

hw->mbox_addr + offsetof(struct aq_fw2x_mailbox, msm),

sys/dev/aq/aq_fw2x.c

446

mpi_ctrl = get_mpi_ctrl(hw);

sys/dev/aq/aq_fw2x.c

448

set_mpi_ctrl(hw, mpi_ctrl);

sys/dev/aq/aq_fw2x.c

454

aq_fw2x_led_control(struct aq_hw* hw, uint32_t onoff)

sys/dev/aq/aq_fw2x.c

461

if (aq_hw_ver_match(&ver_expected, &hw->fw_version))

sys/dev/aq/aq_fw2x.c

462

AQ_WRITE_REG(hw, FW2X_MPI_LED_ADDR,

sys/dev/aq/aq_hw.c

100

err = AQ_HW_WAIT_FOR(reg_glb_cpu_sem_get(hw, AQ_HW_FW_SM_RAM) == 1U, 1U,

sys/dev/aq/aq_hw.c

1002

if (err == 0 && IS_CHIP_FEATURE(hw, ATLANTIC2))

sys/dev/aq/aq_hw.c

1003

err = aq2_art_filter_set(hw, AQ2_RPF_INDEX_L2_PROMISC_OFF, 0,

sys/dev/aq/aq_hw.c

1007

rpfl2_accept_all_mc_packets_set(hw, mc_promisc);

sys/dev/aq/aq_hw.c

1008

rpfl2multicast_flr_en_set(hw, mc_promisc, 0);

sys/dev/aq/aq_hw.c

1015

aq_hw_rss_hash_set(struct aq_hw *hw,

sys/dev/aq/aq_hw.c

1029

rpf_rss_key_wr_data_set(hw, key_data);

sys/dev/aq/aq_hw.c

1030

rpf_rss_key_addr_set(hw, addr);

sys/dev/aq/aq_hw.c

1031

rpf_rss_key_wr_en_set(hw, 1U);

sys/dev/aq/aq_hw.c

1032

err = AQ_HW_WAIT_FOR(rpf_rss_key_wr_en_get(hw) == 0,

sys/dev/aq/aq_hw.c

1038

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

1046

aq_hw_rss_hash_get(struct aq_hw *hw,

sys/dev/aq/aq_hw.c

1057

rpf_rss_key_addr_set(hw, addr);

sys/dev/aq/aq_hw.c

1058

rss_key_dw[i] = bswap32(rpf_rss_key_rd_data_get(hw));

sys/dev/aq/aq_hw.c

106

reg_glb_cpu_sem_set(hw, 1U, AQ_HW_FW_SM_RAM);

sys/dev/aq/aq_hw.c

1062

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

1069

aq_hw_rss_set(struct aq_hw *hw,

sys/dev/aq/aq_hw.c

107

is_locked = reg_glb_cpu_sem_get(hw, AQ_HW_FW_SM_RAM);

sys/dev/aq/aq_hw.c

1080

if (IS_CHIP_FEATURE(hw, ATLANTIC2)) {

sys/dev/aq/aq_hw.c

1081

uint32_t n_tcs = aq_hw_active_tcs(hw);

sys/dev/aq/aq_hw.c

1085

AQ_WRITE_REG_BIT(hw, AQ2_RPF_REDIR2_REG, AQ2_RPF_REDIR2_INDEX,

sys/dev/aq/aq_hw.c

1093

AQ_WRITE_REG(hw, AQ2_RPF_RSS_REDIR_REG(0, slot), word);

sys/dev/aq/aq_hw.c

1096

return (aq_hw_err_from_flags(hw));

sys/dev/aq/aq_hw.c

1113

rpf_rss_redir_tbl_wr_data_set(hw, bitary[i]);

sys/dev/aq/aq_hw.c

1114

rpf_rss_redir_tbl_addr_set(hw, i);

sys/dev/aq/aq_hw.c

1115

rpf_rss_redir_wr_en_set(hw, 1U);

sys/dev/aq/aq_hw.c

1116

err = AQ_HW_WAIT_FOR(rpf_rss_redir_wr_en_get(hw) == 0,

sys/dev/aq/aq_hw.c

1122

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

1129

aq_hw_udp_rss_enable(struct aq_hw *hw, bool enable)

sys/dev/aq/aq_hw.c

1138

hw_atl_rpf_l3_l4_enf_set(hw, true, 0);

sys/dev/aq/aq_hw.c

1139

hw_atl_rpf_l4_protf_en_set(hw, true, 0);

sys/dev/aq/aq_hw.c

114

mif_mcp_up_mailbox_addr_set(hw, a);

sys/dev/aq/aq_hw.c

1140

hw_atl_rpf_l3_l4_rxqf_en_set(hw, true, 0);

sys/dev/aq/aq_hw.c

1141

hw_atl_rpf_l3_l4_actf_set(hw, L2_FILTER_ACTION_HOST, 0);

sys/dev/aq/aq_hw.c

1142

hw_atl_rpf_l3_l4_rxqf_set(hw, 0, 0);

sys/dev/aq/aq_hw.c

1143

hw_atl_rpf_l4_protf_set(hw, HW_ATL_RX_UDP, 0);

sys/dev/aq/aq_hw.c

1145

hw_atl_rpf_l3_l4_enf_set(hw, false, 0);

sys/dev/aq/aq_hw.c

1148

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

117

mif_mcp_up_mailbox_execute_operation_set(hw, 1);

sys/dev/aq/aq_hw.c

119

if (IS_CHIP_FEATURE(hw, REVISION_B1))

sys/dev/aq/aq_hw.c

120

err = AQ_HW_WAIT_FOR(a != mif_mcp_up_mailbox_addr_get(hw),

sys/dev/aq/aq_hw.c

123

err = AQ_HW_WAIT_FOR(!mif_mcp_up_mailbox_busy_get(hw), 1,

sys/dev/aq/aq_hw.c

126

*(p++) = mif_mcp_up_mailbox_data_get(hw);

sys/dev/aq/aq_hw.c

129

reg_glb_cpu_sem_set(hw, 1U, AQ_HW_FW_SM_RAM);

sys/dev/aq/aq_hw.c

149

aq_hw_init_ucp(struct aq_hw *hw)

sys/dev/aq/aq_hw.c

154

hw->fw_version.raw = 0;

sys/dev/aq/aq_hw.c

157

if (IS_CHIP_FEATURE(hw, ATLANTIC2))

sys/dev/aq/aq_hw.c

158

return (aq2_fw_reboot(hw));

sys/dev/aq/aq_hw.c

160

err = aq_fw_reset(hw);

sys/dev/aq/aq_hw.c

162

device_printf(hw->dev, "aq_hw_init_ucp(): F/W reset failed, err %d\n", err);

sys/dev/aq/aq_hw.c

166

aq_hw_chip_features_init(hw, &hw->chip_features);

sys/dev/aq/aq_hw.c

167

err = aq_fw_ops_init(hw);

sys/dev/aq/aq_hw.c

169

device_printf(hw->dev, "could not initialize F/W ops, err %d\n", err);

sys/dev/aq/aq_hw.c

173

if (hw->fw_version.major_version == 1) {

sys/dev/aq/aq_hw.c

174

if (!AQ_READ_REG(hw, 0x370)) {

sys/dev/aq/aq_hw.c

181

AQ_WRITE_REG(hw, AQ_HW_UCP_0X370_REG, ucp_0x370);

sys/dev/aq/aq_hw.c

184

reg_glb_cpu_scratch_scp_set(hw, 0, 25);

sys/dev/aq/aq_hw.c

188

err = AQ_HW_WAIT_FOR((hw->mbox_addr = AQ_READ_REG(hw, 0x360)) != 0, 400U, 20);

sys/dev/aq/aq_hw.c

191

if (!aq_hw_ver_match(&ver_expected, &hw->fw_version))

sys/dev/aq/aq_hw.c

192

device_printf(hw->dev, "aq_hw_init_ucp(), wrong FW version: expected:%x actual:%x\n",

sys/dev/aq/aq_hw.c

193

AQ_CFG_FW_MIN_VER_EXPECTED, hw->fw_version.raw);

sys/dev/aq/aq_hw.c

200

aq_hw_mpi_create(struct aq_hw *hw)

sys/dev/aq/aq_hw.c

205

err = aq_hw_init_ucp(hw);

sys/dev/aq/aq_hw.c

215

aq_hw_mpi_read_stats(struct aq_hw *hw, struct aq_hw_stats *stats)

sys/dev/aq/aq_hw.c

219

err = hw->fw_ops->get_stats(hw, stats);

sys/dev/aq/aq_hw.c

224

stats->dpc = reg_rx_dma_stat_counter7get(hw);

sys/dev/aq/aq_hw.c

227

if (!IS_CHIP_FEATURE(hw, ATLANTIC2))

sys/dev/aq/aq_hw.c

228

stats->cprc = stats_rx_lro_coalesced_pkt_count0_get(hw);

sys/dev/aq/aq_hw.c

234

aq_hw_mpi_set(struct aq_hw *hw, enum aq_hw_fw_mpi_state state, uint32_t speed)

sys/dev/aq/aq_hw.c

239

err = hw->fw_ops->set_mode(hw, state, speed);

sys/dev/aq/aq_hw.c

246

aq_hw_set_link_speed(struct aq_hw *hw, uint32_t speed)

sys/dev/aq/aq_hw.c

248

return aq_hw_mpi_set(hw, MPI_INIT, speed);

sys/dev/aq/aq_hw.c

252

aq_hw_get_link_state(struct aq_hw *hw, uint32_t *link_speed, struct aq_hw_fc_info *fc_neg)

sys/dev/aq/aq_hw.c

265

err = hw->fw_ops->get_mode(hw, &mode, &speed, &fc);

sys/dev/aq/aq_hw.c

268

device_printf(hw->dev, "get_mode() failed, err %d\n", err);

sys/dev/aq/aq_hw.c

275

hw->link_speed = speed; /* remember negotiated rate for interrupt moderation */

sys/dev/aq/aq_hw.c

308

aq_hw_get_mac_permanent(struct aq_hw *hw, uint8_t *mac)

sys/dev/aq/aq_hw.c

313

err = hw->fw_ops->get_mac_addr(hw, mac);

sys/dev/aq/aq_hw.c

321

device_printf(hw->dev,

sys/dev/aq/aq_hw.c

350

aq_hw_deinit(struct aq_hw *hw)

sys/dev/aq/aq_hw.c

353

aq_hw_mpi_set(hw, MPI_DEINIT, 0);

sys/dev/aq/aq_hw.c

359

aq_hw_set_power(struct aq_hw *hw, unsigned int power_state)

sys/dev/aq/aq_hw.c

362

aq_hw_mpi_set(hw, MPI_POWER, 0);

sys/dev/aq/aq_hw.c

371

aq_hw_reset(struct aq_hw *hw, bool reboot)

sys/dev/aq/aq_hw.c

383

if (IS_CHIP_FEATURE(hw, ATLANTIC2))

sys/dev/aq/aq_hw.c

384

err = aq2_fw_reboot(hw);

sys/dev/aq/aq_hw.c

386

err = aq_fw_reset(hw);

sys/dev/aq/aq_hw.c

391

itr_irq_reg_res_dis_set(hw, 0);

sys/dev/aq/aq_hw.c

392

itr_res_irq_set(hw, 1);

sys/dev/aq/aq_hw.c

395

err = AQ_HW_WAIT_FOR(itr_res_irq_get(hw) == 0, 1000, 10);

sys/dev/aq/aq_hw.c

397

device_printf(hw->dev, "IRQ reset failed: %d\n", err);

sys/dev/aq/aq_hw.c

401

err = hw->fw_ops->reset(hw);

sys/dev/aq/aq_hw.c

405

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

413

aq_hw_qos_set(struct aq_hw *hw)

sys/dev/aq/aq_hw.c

425

tps_tx_pkt_shed_desc_rate_curr_time_res_set(hw, 0x0U);

sys/dev/aq/aq_hw.c

426

tps_tx_pkt_shed_desc_rate_lim_set(hw, 0xA);

sys/dev/aq/aq_hw.c

429

tps_tx_pkt_shed_desc_vm_arb_mode_set(hw, 0U);

sys/dev/aq/aq_hw.c

432

tps_tx_pkt_shed_desc_tc_arb_mode_set(hw, 0U);

sys/dev/aq/aq_hw.c

433

tps_tx_pkt_shed_data_arb_mode_set(hw, 0U);

sys/dev/aq/aq_hw.c

436

n_tcs = aq_hw_active_tcs(hw);

sys/dev/aq/aq_hw.c

437

buff_size = (IS_CHIP_FEATURE(hw, ATLANTIC2) ?

sys/dev/aq/aq_hw.c

441

if (IS_CHIP_FEATURE(hw, ATLANTIC2)) {

sys/dev/aq/aq_hw.c

443

AQ_WRITE_REG_BIT(hw, TPS_DATA_TCT_REG(tc),

sys/dev/aq/aq_hw.c

446

AQ_WRITE_REG_BIT(hw, TPS_DATA_TCT_REG(tc),

sys/dev/aq/aq_hw.c

450

tps_tx_pkt_shed_tc_data_max_credit_set(hw, 0xFFF, tc);

sys/dev/aq/aq_hw.c

451

tps_tx_pkt_shed_tc_data_weight_set(hw, 0x64, tc);

sys/dev/aq/aq_hw.c

453

tps_tx_pkt_shed_desc_tc_max_credit_set(hw, 0x50, tc);

sys/dev/aq/aq_hw.c

454

tps_tx_pkt_shed_desc_tc_weight_set(hw, 0x1E, tc);

sys/dev/aq/aq_hw.c

456

tpb_tx_pkt_buff_size_per_tc_set(hw, buff_size, tc);

sys/dev/aq/aq_hw.c

457

tpb_tx_buff_hi_threshold_per_tc_set(hw,

sys/dev/aq/aq_hw.c

459

tpb_tx_buff_lo_threshold_per_tc_set(hw,

sys/dev/aq/aq_hw.c

465

buff_size = IS_CHIP_FEATURE(hw, ATLANTIC2) ?

sys/dev/aq/aq_hw.c

468

rpb_rx_pkt_buff_size_per_tc_set(hw, buff_size, tc);

sys/dev/aq/aq_hw.c

469

rpb_rx_buff_hi_threshold_per_tc_set(hw,

sys/dev/aq/aq_hw.c

471

rpb_rx_buff_lo_threshold_per_tc_set(hw,

sys/dev/aq/aq_hw.c

476

rpf_rpb_user_priority_tc_map_set(hw, i_priority, 0U);

sys/dev/aq/aq_hw.c

479

if (IS_CHIP_FEATURE(hw, ATLANTIC2)) {

sys/dev/aq/aq_hw.c

480

AQ_WRITE_REG_BIT(hw, TPB_TX_BUF_REG,

sys/dev/aq/aq_hw.c

485

AQ_WRITE_REG(hw, AQ2_TX_Q_TC_MAP_REG(i),

sys/dev/aq/aq_hw.c

488

AQ_WRITE_REG(hw, AQ2_RX_Q_TC_MAP_REG(i),

sys/dev/aq/aq_hw.c

492

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

499

aq_hw_active_tcs(struct aq_hw *hw)

sys/dev/aq/aq_hw.c

501

uint32_t n = howmany(MAX(hw->tx_rings_count, 1U),

sys/dev/aq/aq_hw.c

508

aq_hw_offload_set(struct aq_hw *hw)

sys/dev/aq/aq_hw.c

51

static uint32_t aq_hw_active_tcs(struct aq_hw *hw);

sys/dev/aq/aq_hw.c

514

tpo_ipv4header_crc_offload_en_set(hw, 1);

sys/dev/aq/aq_hw.c

515

tpo_tcp_udp_crc_offload_en_set(hw, 1);

sys/dev/aq/aq_hw.c

518

rpo_ipv4header_crc_offload_en_set(hw, 1);

sys/dev/aq/aq_hw.c

519

rpo_tcp_udp_crc_offload_en_set(hw, 1);

sys/dev/aq/aq_hw.c

522

tdm_large_send_offload_en_set(hw, 0xFFFFFFFFU);

sys/dev/aq/aq_hw.c

525

rpo_outer_vlan_tag_mode_set(hw, 1U);

sys/dev/aq/aq_hw.c

534

rpo_lro_max_num_of_descriptors_set(hw, val, i);

sys/dev/aq/aq_hw.c

536

rpo_lro_time_base_divider_set(hw, 0x61AU);

sys/dev/aq/aq_hw.c

537

rpo_lro_inactive_interval_set(hw, 0);

sys/dev/aq/aq_hw.c

54

aq_hw_err_from_flags(struct aq_hw *hw)

sys/dev/aq/aq_hw.c

543

rpo_lro_max_coalescing_interval_set(hw, 50);

sys/dev/aq/aq_hw.c

545

rpo_lro_qsessions_lim_set(hw, 1U);

sys/dev/aq/aq_hw.c

547

rpo_lro_total_desc_lim_set(hw, 2U);

sys/dev/aq/aq_hw.c

549

rpo_lro_patch_optimization_en_set(hw, 0U);

sys/dev/aq/aq_hw.c

551

rpo_lro_min_pay_of_first_pkt_set(hw, 10U);

sys/dev/aq/aq_hw.c

553

rpo_lro_pkt_lim_set(hw, 1U);

sys/dev/aq/aq_hw.c

555

rpo_lro_en_set(hw, (hw->lro_enabled ? 0xFFFFFFFFU : 0U));

sys/dev/aq/aq_hw.c

559

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

56

if (atomic_load_acq_long(&hw->flags) & AQ_HW_FLAG_ERR_UNPLUG)

sys/dev/aq/aq_hw.c

566

aq_hw_init_tx_path(struct aq_hw *hw)

sys/dev/aq/aq_hw.c

573

tpb_tx_tc_mode_set(hw, 1U);

sys/dev/aq/aq_hw.c

575

thm_lso_tcp_flag_of_first_pkt_set(hw, 0x0FF6U);

sys/dev/aq/aq_hw.c

576

thm_lso_tcp_flag_of_middle_pkt_set(hw, 0x0FF6U);

sys/dev/aq/aq_hw.c

577

thm_lso_tcp_flag_of_last_pkt_set(hw, 0x0F7FU);

sys/dev/aq/aq_hw.c

580

tdm_tx_desc_wr_wb_irq_en_set(hw, 1U);

sys/dev/aq/aq_hw.c

583

if (!IS_CHIP_FEATURE(hw, ATLANTIC2))

sys/dev/aq/aq_hw.c

584

AQ_WRITE_REG(hw, 0x00007040U,

sys/dev/aq/aq_hw.c

585

IS_CHIP_FEATURE(hw, TPO2) ? 0x00010000U : 0x00000000U);

sys/dev/aq/aq_hw.c

586

tdm_tx_dca_en_set(hw, 0U);

sys/dev/aq/aq_hw.c

587

tdm_tx_dca_mode_set(hw, 0U);

sys/dev/aq/aq_hw.c

589

tpb_tx_path_scp_ins_en_set(hw, 1U);

sys/dev/aq/aq_hw.c

591

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

598

aq2_art_filter_set(struct aq_hw *hw, uint32_t idx, uint32_t tag,

sys/dev/aq/aq_hw.c

601

if (AQ_HW_WAIT_FOR(reg_glb_cpu_sem_get(hw, AQ2_ART_SEM_INDEX) == 1U,

sys/dev/aq/aq_hw.c

603

device_printf(hw->dev, "ART semaphore timeout, idx %u\n", idx);

sys/dev/aq/aq_hw.c

607

idx += hw->art_filter_base_index;

sys/dev/aq/aq_hw.c

608

AQ_WRITE_REG(hw, AQ2_RPF_ACT_ART_REQ_TAG_REG(idx), tag);

sys/dev/aq/aq_hw.c

609

AQ_WRITE_REG(hw, AQ2_RPF_ACT_ART_REQ_MASK_REG(idx), mask);

sys/dev/aq/aq_hw.c

610

AQ_WRITE_REG(hw, AQ2_RPF_ACT_ART_REQ_ACTION_REG(idx), action);

sys/dev/aq/aq_hw.c

612

reg_glb_cpu_sem_set(hw, 1U, AQ2_ART_SEM_INDEX);

sys/dev/aq/aq_hw.c

617

aq_hw_init_rx_path(struct aq_hw *hw)

sys/dev/aq/aq_hw.c

62

aq_hw_read_reg(struct aq_hw *hw, uint32_t reg)

sys/dev/aq/aq_hw.c

625

rpb_rpf_rx_traf_class_mode_set(hw, 1U);

sys/dev/aq/aq_hw.c

633

if (IS_CHIP_FEATURE(hw, ATLANTIC2)) {

sys/dev/aq/aq_hw.c

636

uint32_t hw;

sys/dev/aq/aq_hw.c

64

uint32_t val = le32toh(bus_space_read_4(hw->hw_tag, hw->hw_handle, reg));

sys/dev/aq/aq_hw.c

653

ht |= ht_map[i].hw;

sys/dev/aq/aq_hw.c

654

AQ_WRITE_REG_BIT(hw, AQ2_RPF_REDIR2_REG,

sys/dev/aq/aq_hw.c

659

rpb_rx_flow_ctl_mode_set(hw, 1U);

sys/dev/aq/aq_hw.c

662

reg_rx_flr_rss_control1set(hw, 0xB3333333U);

sys/dev/aq/aq_hw.c

666

rpfl2_uc_flr_en_set(hw, (i == 0U) ? 1U : 0U, i);

sys/dev/aq/aq_hw.c

667

rpfl2unicast_flr_act_set(hw, 1U, i);

sys/dev/aq/aq_hw.c

67

le32toh(bus_space_read_4(hw->hw_tag, hw->hw_handle, 0x10)) ==

sys/dev/aq/aq_hw.c

670

reg_rx_flr_mcst_flr_msk_set(hw, 0x00000000U);

sys/dev/aq/aq_hw.c

671

reg_rx_flr_mcst_flr_set(hw, 0x00010FFFU, 0U);

sys/dev/aq/aq_hw.c

674

rpf_vlan_outer_etht_set(hw, 0x88A8U);

sys/dev/aq/aq_hw.c

675

rpf_vlan_inner_etht_set(hw, 0x8100U);

sys/dev/aq/aq_hw.c

676

rpf_vlan_accept_untagged_packets_set(hw, true);

sys/dev/aq/aq_hw.c

677

rpf_vlan_untagged_act_set(hw, HW_ATL_RX_HOST);

sys/dev/aq/aq_hw.c

679

rpf_vlan_prom_mode_en_set(hw, 1);

sys/dev/aq/aq_hw.c

682

rdm_rx_desc_wr_wb_irq_en_set(hw, 1U);

sys/dev/aq/aq_hw.c

684

if (IS_CHIP_FEATURE(hw, ATLANTIC2)) {

sys/dev/aq/aq_hw.c

686

AQ_WRITE_REG_BIT(hw, AQ2_RPF_REC_TAB_ENABLE_REG,

sys/dev/aq/aq_hw.c

688

AQ_WRITE_REG_BIT(hw, RPF_L2UC_MSW_REG(0),

sys/dev/aq/aq_hw.c

69

atomic_set_rel_long(&hw->flags, AQ_HW_FLAG_ERR_UNPLUG);

sys/dev/aq/aq_hw.c

690

AQ_WRITE_REG_BIT(hw, AQ2_RPF_L2BC_TAG_REG,

sys/dev/aq/aq_hw.c

694

err = aq2_art_filter_set(hw, AQ2_RPF_INDEX_L2_PROMISC_OFF, 0,

sys/dev/aq/aq_hw.c

698

err = aq2_art_filter_set(hw,

sys/dev/aq/aq_hw.c

703

err = aq2_art_filter_set(hw, AQ2_RPF_INDEX_PCP_TO_TC + i,

sys/dev/aq/aq_hw.c

714

AQ_WRITE_REG(hw, 0x00005040U, control_reg_val);

sys/dev/aq/aq_hw.c

717

rpfl2broadcast_en_set(hw, 1U);

sys/dev/aq/aq_hw.c

718

rpfl2broadcast_flr_act_set(hw, 1U);

sys/dev/aq/aq_hw.c

719

rpfl2broadcast_count_threshold_set(hw, 0xFFFFU & (~0U / 256U));

sys/dev/aq/aq_hw.c

721

rdm_rx_dca_en_set(hw, 0U);

sys/dev/aq/aq_hw.c

722

rdm_rx_dca_mode_set(hw, 0U);

sys/dev/aq/aq_hw.c

725

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

731

aq_hw_mac_addr_set(struct aq_hw *hw, uint8_t *mac_addr, uint8_t index)

sys/dev/aq/aq_hw.c

746

rpfl2_uc_flr_en_set(hw, 0U, index);

sys/dev/aq/aq_hw.c

747

rpfl2unicast_dest_addresslsw_set(hw, l, index);

sys/dev/aq/aq_hw.c

748

rpfl2unicast_dest_addressmsw_set(hw, h, index);

sys/dev/aq/aq_hw.c

75

aq_hw_chip_features_init(struct aq_hw *hw, uint32_t *p)

sys/dev/aq/aq_hw.c

750

if (IS_CHIP_FEATURE(hw, ATLANTIC2))

sys/dev/aq/aq_hw.c

751

AQ_WRITE_REG_BIT(hw, RPF_L2UC_MSW_REG(index),

sys/dev/aq/aq_hw.c

753

rpfl2_uc_flr_en_set(hw, 1U, index);

sys/dev/aq/aq_hw.c

755

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

763

aq_hw_init(struct aq_hw *hw, uint8_t *mac_addr, uint8_t adm_irq, bool msix)

sys/dev/aq/aq_hw.c

772

if (!IS_CHIP_FEATURE(hw, ATLANTIC2)) {

sys/dev/aq/aq_hw.c

774

val = AQ_READ_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR);

sys/dev/aq/aq_hw.c

775

AQ_WRITE_REG(hw, AQ_HW_PCI_REG_CONTROL_6_ADR,

sys/dev/aq/aq_hw.c

78

uint32_t val = reg_glb_mif_id_get(hw);

sys/dev/aq/aq_hw.c

782

AQ_WRITE_REG(hw, AQ_HW_TX_DMA_TOTAL_REQ_LIMIT_ADR, 24);

sys/dev/aq/aq_hw.c

785

uint32_t fpgaver = AQ_READ_REG(hw, AQ2_HW_FPGA_VERSION_REG);

sys/dev/aq/aq_hw.c

794

AQ_WRITE_REG_BIT(hw, AQ2_LAUNCHTIME_CTRL_REG,

sys/dev/aq/aq_hw.c

798

err = aq_hw_init_tx_path(hw);

sys/dev/aq/aq_hw.c

801

err = aq_hw_init_rx_path(hw);

sys/dev/aq/aq_hw.c

805

aq_hw_mac_addr_set(hw, mac_addr, AQ_HW_MAC);

sys/dev/aq/aq_hw.c

807

aq_hw_mpi_set(hw, MPI_INIT, hw->link_rate);

sys/dev/aq/aq_hw.c

809

aq_hw_qos_set(hw);

sys/dev/aq/aq_hw.c

812

if (IS_CHIP_FEATURE(hw, ATLANTIC2))

sys/dev/aq/aq_hw.c

813

AQ_WRITE_REG_BIT(hw, AQ2_RPF_NEW_CTRL_REG,

sys/dev/aq/aq_hw.c

816

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

822

itr_irq_status_cor_en_set(hw, 0); //Disable clear-on-read for status

sys/dev/aq/aq_hw.c

823

itr_irq_auto_mask_clr_en_set(hw, 1); // Enable auto-mask clear.

sys/dev/aq/aq_hw.c

825

itr_irq_mode_set(hw, 0x6); //MSIX + multi vector

sys/dev/aq/aq_hw.c

827

itr_irq_mode_set(hw, 0x5); //MSI + multi vector

sys/dev/aq/aq_hw.c

830

reg_gen_irq_map_set(hw,

sys/dev/aq/aq_hw.c

832

reg_gen_irq_map_set(hw, 0x80 | adm_irq, 3);

sys/dev/aq/aq_hw.c

834

err = aq_hw_offload_set(hw);

sys/dev/aq/aq_hw.c

843

aq_hw_start(struct aq_hw *hw)

sys/dev/aq/aq_hw.c

848

tpb_tx_buff_en_set(hw, 1U);

sys/dev/aq/aq_hw.c

849

rpb_rx_buff_en_set(hw, 1U);

sys/dev/aq/aq_hw.c

850

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

857

aq_hw_interrupt_moderation_set(struct aq_hw *hw)

sys/dev/aq/aq_hw.c

877

uint32_t speed_index = ffs(hw->link_speed ? hw->link_speed : aq_fw_10G) - 1;

sys/dev/aq/aq_hw.c

880

int custom_itr = hw->itr;

sys/dev/aq/aq_hw.c

908

tdm_tx_desc_wr_wb_irq_en_set(hw, !active);

sys/dev/aq/aq_hw.c

909

tdm_tdm_intr_moder_en_set(hw, active);

sys/dev/aq/aq_hw.c

910

rdm_rx_desc_wr_wb_irq_en_set(hw, !active);

sys/dev/aq/aq_hw.c

911

rdm_rdm_intr_moder_en_set(hw, active);

sys/dev/aq/aq_hw.c

915

if (IS_CHIP_FEATURE(hw, ATLANTIC2))

sys/dev/aq/aq_hw.c

916

AQ_WRITE_REG(hw, AQ2_TX_INTR_MODERATION_CTL_REG(i),

sys/dev/aq/aq_hw.c

919

reg_tx_intr_moder_ctrl_set(hw, itr_tx, i);

sys/dev/aq/aq_hw.c

920

reg_rx_intr_moder_ctrl_set(hw, itr_rx, i);

sys/dev/aq/aq_hw.c

923

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

939

hw_atl_b0_hw_vlan_set(struct aq_hw *hw, struct aq_rx_filter_vlan *aq_vlans)

sys/dev/aq/aq_hw.c

944

hw_atl_rpf_vlan_flr_en_set(hw, 0U, i);

sys/dev/aq/aq_hw.c

945

hw_atl_rpf_vlan_rxq_en_flr_set(hw, 0U, i);

sys/dev/aq/aq_hw.c

947

hw_atl_rpf_vlan_id_flr_set(hw,

sys/dev/aq/aq_hw.c

950

hw_atl_rpf_vlan_flr_act_set(hw, 1U, i);

sys/dev/aq/aq_hw.c

952

if (IS_CHIP_FEATURE(hw, ATLANTIC2))

sys/dev/aq/aq_hw.c

953

AQ_WRITE_REG_BIT(hw,

sys/dev/aq/aq_hw.c

957

hw_atl_rpf_vlan_flr_en_set(hw, 1U, i);

sys/dev/aq/aq_hw.c

959

hw_atl_rpf_vlan_rxq_flr_set(hw,

sys/dev/aq/aq_hw.c

96

aq_hw_fw_downld_dwords(struct aq_hw *hw, uint32_t a, uint32_t *p, uint32_t cnt)

sys/dev/aq/aq_hw.c

962

hw_atl_rpf_vlan_rxq_en_flr_set(hw, 1U, i);

sys/dev/aq/aq_hw.c

967

return aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

971

hw_atl_b0_hw_vlan_promisc_set(struct aq_hw *hw, bool promisc)

sys/dev/aq/aq_hw.c

976

if (IS_CHIP_FEATURE(hw, ATLANTIC2)) {

sys/dev/aq/aq_hw.c

977

err = aq2_art_filter_set(hw, AQ2_RPF_INDEX_VLAN_PROMISC_OFF,

sys/dev/aq/aq_hw.c

983

hw_atl_rpf_vlan_prom_mode_en_set(hw, promisc);

sys/dev/aq/aq_hw.c

984

return aq_hw_err_from_flags(hw);

sys/dev/aq/aq_hw.c

989

aq_hw_set_promisc(struct aq_hw *hw, bool l2_promisc, bool vlan_promisc,

sys/dev/aq/aq_hw.c

997

rpfl2promiscuous_mode_en_set(hw, l2_promisc);

sys/dev/aq/aq_hw.c

999

err = hw_atl_b0_hw_vlan_promisc_set(hw, l2_promisc | vlan_promisc);

sys/dev/aq/aq_hw.h

355

int aq_hw_get_mac_permanent(struct aq_hw *hw, uint8_t *mac);

sys/dev/aq/aq_hw.h

357

int aq_hw_mac_addr_set(struct aq_hw *hw, uint8_t *mac_addr, uint8_t index);

sys/dev/aq/aq_hw.h

360

int aq_hw_get_link_state(struct aq_hw *hw, uint32_t *link_speed,

sys/dev/aq/aq_hw.h

363

int aq_hw_set_link_speed(struct aq_hw *hw, uint32_t speed);

sys/dev/aq/aq_hw.h

365

int aq_hw_fw_downld_dwords(struct aq_hw *hw, uint32_t a, uint32_t *p, uint32_t cnt);

sys/dev/aq/aq_hw.h

367

int aq_hw_reset(struct aq_hw *hw, bool reboot);

sys/dev/aq/aq_hw.h

369

int aq_hw_mpi_create(struct aq_hw *hw);

sys/dev/aq/aq_hw.h

371

int aq_hw_mpi_read_stats(struct aq_hw *hw, struct aq_hw_stats *stats);

sys/dev/aq/aq_hw.h

373

int aq_hw_init(struct aq_hw *hw, uint8_t *mac_addr, uint8_t adm_irq, bool msix);

sys/dev/aq/aq_hw.h

375

int aq_hw_start(struct aq_hw *hw);

sys/dev/aq/aq_hw.h

377

int aq_hw_interrupt_moderation_set(struct aq_hw *hw);

sys/dev/aq/aq_hw.h

379

int aq_hw_get_fw_version(struct aq_hw *hw, uint32_t *fw_version);

sys/dev/aq/aq_hw.h

381

int aq_hw_deinit(struct aq_hw *hw);

sys/dev/aq/aq_hw.h

386

int aq_hw_set_promisc(struct aq_hw *hw, bool l2_promisc, bool vlan_promisc,

sys/dev/aq/aq_hw.h

389

int aq_hw_set_power(struct aq_hw *hw, unsigned int power_state);

sys/dev/aq/aq_hw.h

391

int aq_hw_err_from_flags(struct aq_hw *hw);

sys/dev/aq/aq_hw.h

393

int hw_atl_b0_hw_vlan_promisc_set(struct aq_hw *hw, bool promisc);

sys/dev/aq/aq_hw.h

395

int hw_atl_b0_hw_vlan_set(struct aq_hw *hw,

sys/dev/aq/aq_hw.h

398

int aq_hw_rss_hash_set(struct aq_hw *hw, uint8_t rss_key[HW_ATL_RSS_HASHKEY_SIZE]);

sys/dev/aq/aq_hw.h

399

int aq_hw_rss_hash_get(struct aq_hw *hw, uint8_t rss_key[HW_ATL_RSS_HASHKEY_SIZE]);

sys/dev/aq/aq_hw.h

400

int aq_hw_rss_set(struct aq_hw *hw, uint8_t rss_table[HW_ATL_RSS_INDIRECTION_TABLE_MAX]);

sys/dev/aq/aq_hw.h

401

int aq_hw_udp_rss_enable(struct aq_hw *hw, bool enable);

sys/dev/aq/aq_hw.h

48

#define AQ_WRITE_REG(hw, reg, value) \

sys/dev/aq/aq_hw.h

49

bus_space_write_4((hw)->hw_tag, (hw)->hw_handle, (reg), htole32(value))

sys/dev/aq/aq_hw.h

54

extern uint32_t aq_hw_read_reg(struct aq_hw *hw, uint32_t reg);

sys/dev/aq/aq_hw.h

55

#define AQ_READ_REG(hw, reg) aq_hw_read_reg((hw), (reg))

sys/dev/aq/aq_hw.h

58

#define AQ_WRITE_REG_BIT(hw, reg, msk, shift, value) do { \

sys/dev/aq/aq_hw.h

61

reg_old = AQ_READ_REG(hw, reg); \

sys/dev/aq/aq_hw.h

64

AQ_WRITE_REG(hw, reg, reg_new); \

sys/dev/aq/aq_hw.h

66

AQ_WRITE_REG(hw, reg, value); \

sys/dev/aq/aq_hw.h

74

#define AQ_HW_FLUSH(hw) { (void)AQ_READ_REG((hw), 0x10); }

sys/dev/aq/aq_hw_llh.c

100

return AQ_READ_REG(hw, glb_daisy_chain_status1_adr);

sys/dev/aq/aq_hw_llh.c

138

mpi_tx_reg_res_dis_set(struct aq_hw* hw, uint32_t mpi_tx_reg_res_dis)

sys/dev/aq/aq_hw_llh.c

140

AQ_WRITE_REG_BIT(hw, mpi_tx_reg_res_dis_adr, mpi_tx_reg_res_dis_msk,

sys/dev/aq/aq_hw_llh.c

144

mpi_tx_reg_res_dis_get(struct aq_hw* hw)

sys/dev/aq/aq_hw_llh.c

146

return AQ_READ_REG_BIT(hw, mpi_tx_reg_res_dis_adr,

sys/dev/aq/aq_hw_llh.c

1911

reg_glb_cpu_scratch_scp_get(struct aq_hw *hw, uint32_t glb_cpu_scratch_scp_idx)

sys/dev/aq/aq_hw_llh.c

1913

return AQ_READ_REG(hw,

sys/dev/aq/aq_hw_llh.c

1925

reg_glb_cpu_no_reset_scratchpad_get(struct aq_hw *hw, uint32_t index)

sys/dev/aq/aq_hw_llh.c

1927

return AQ_READ_REG(hw, glb_cpu_no_reset_scratchpad_adr(index));

sys/dev/aq/aq_hw_llh.c

1930

reg_glb_cpu_no_reset_scratchpad_set(struct aq_hw* hw, uint32_t value,

sys/dev/aq/aq_hw_llh.c

1933

AQ_WRITE_REG(hw, glb_cpu_no_reset_scratchpad_adr(index), value);

sys/dev/aq/aq_hw_llh.c

1937

reg_mif_power_gating_enable_control_set(struct aq_hw* hw, uint32_t value)

sys/dev/aq/aq_hw_llh.c

1939

AQ_WRITE_REG(hw, mif_power_gating_enable_control_adr, value);

sys/dev/aq/aq_hw_llh.c

1943

reg_mif_power_gating_enable_control_get(struct aq_hw* hw)

sys/dev/aq/aq_hw_llh.c

1945

return AQ_READ_REG(hw, mif_power_gating_enable_control_adr);

sys/dev/aq/aq_hw_llh.c

1950

reg_glb_general_provisioning9_set(struct aq_hw* hw, uint32_t value)

sys/dev/aq/aq_hw_llh.c

1952

AQ_WRITE_REG(hw, glb_general_provisioning9_adr, value);

sys/dev/aq/aq_hw_llh.c

1955

reg_glb_general_provisioning9_get(struct aq_hw* hw)

sys/dev/aq/aq_hw_llh.c

1957

return AQ_READ_REG(hw, glb_general_provisioning9_adr);

sys/dev/aq/aq_hw_llh.c

1961

reg_glb_nvr_provisioning2_set(struct aq_hw* hw, uint32_t value)

sys/dev/aq/aq_hw_llh.c

1963

AQ_WRITE_REG(hw, glb_nvr_provisioning2_adr, value);

sys/dev/aq/aq_hw_llh.c

1966

reg_glb_nvr_provisioning2_get(struct aq_hw* hw)

sys/dev/aq/aq_hw_llh.c

1968

return AQ_READ_REG(hw, glb_nvr_provisioning2_adr);

sys/dev/aq/aq_hw_llh.c

1972

reg_glb_nvr_interface1_set(struct aq_hw* hw, uint32_t value)

sys/dev/aq/aq_hw_llh.c

1974

AQ_WRITE_REG(hw, glb_nvr_interface1_adr, value);

sys/dev/aq/aq_hw_llh.c

1977

reg_glb_nvr_interface1_get(struct aq_hw* hw)

sys/dev/aq/aq_hw_llh.c

1979

return AQ_READ_REG(hw, glb_nvr_interface1_adr);

sys/dev/aq/aq_hw_llh.c

1984

mif_mcp_up_mailbox_busy_get(struct aq_hw *hw)

sys/dev/aq/aq_hw_llh.c

1986

return AQ_READ_REG_BIT(hw, mif_mcp_up_mailbox_busy_adr,

sys/dev/aq/aq_hw_llh.c

1992

mif_mcp_up_mailbox_execute_operation_set(struct aq_hw* hw, uint32_t value)

sys/dev/aq/aq_hw_llh.c

1994

AQ_WRITE_REG_BIT(hw, mif_mcp_up_mailbox_execute_operation_adr,

sys/dev/aq/aq_hw_llh.c

2000

mif_mcp_up_mailbox_addr_get(struct aq_hw *hw)

sys/dev/aq/aq_hw_llh.c

2002

return AQ_READ_REG(hw, mif_mcp_up_mailbox_addr_adr);

sys/dev/aq/aq_hw_llh.c

2006

mif_mcp_up_mailbox_addr_set(struct aq_hw *hw, uint32_t value)

sys/dev/aq/aq_hw_llh.c

2008

AQ_WRITE_REG(hw, mif_mcp_up_mailbox_addr_adr, value);

sys/dev/aq/aq_hw_llh.c

2013

mif_mcp_up_mailbox_data_get(struct aq_hw *hw)

sys/dev/aq/aq_hw_llh.c

2015

return AQ_READ_REG(hw, mif_mcp_up_mailbox_data_adr);

sys/dev/aq/aq_hw_llh.c

47

reg_glb_fw_image_id1_set(struct aq_hw* hw, uint32_t value)

sys/dev/aq/aq_hw_llh.c

49

AQ_WRITE_REG(hw, glb_fw_image_id1_adr, value);

sys/dev/aq/aq_hw_llh.c

52

reg_glb_fw_image_id1_get(struct aq_hw* hw)

sys/dev/aq/aq_hw_llh.c

54

return AQ_READ_REG(hw, glb_fw_image_id1_adr);

sys/dev/aq/aq_hw_llh.c

70

reg_glb_standard_ctl1_get(struct aq_hw* hw)

sys/dev/aq/aq_hw_llh.c

72

return AQ_READ_REG(hw, glb_standard_ctl1_adr);

sys/dev/aq/aq_hw_llh.c

75

reg_glb_standard_ctl1_set(struct aq_hw* hw, uint32_t glb_standard_ctl1)

sys/dev/aq/aq_hw_llh.c

77

AQ_WRITE_REG(hw, glb_standard_ctl1_adr, glb_standard_ctl1);

sys/dev/aq/aq_hw_llh.c

81

reg_global_ctl2_set(struct aq_hw* hw, uint32_t global_ctl2)

sys/dev/aq/aq_hw_llh.c

83

AQ_WRITE_REG(hw, glb_ctl2_adr, global_ctl2);

sys/dev/aq/aq_hw_llh.c

86

reg_global_ctl2_get(struct aq_hw* hw)

sys/dev/aq/aq_hw_llh.c

88

return AQ_READ_REG(hw, glb_ctl2_adr);

sys/dev/aq/aq_hw_llh.c

92

reg_glb_daisy_chain_status1_set(struct aq_hw* hw,

sys/dev/aq/aq_hw_llh.c

95

AQ_WRITE_REG(hw, glb_daisy_chain_status1_adr, glb_daisy_chain_status1);

sys/dev/aq/aq_hw_llh.c

98

reg_glb_daisy_chain_status1_get(struct aq_hw* hw)

sys/dev/aq/aq_hw_llh.h

100

uint32_t reg_glb_general_provisioning9_get(struct aq_hw* hw);

sys/dev/aq/aq_hw_llh.h

1027

void reg_mif_power_gating_enable_control_set(struct aq_hw* hw, uint32_t value);

sys/dev/aq/aq_hw_llh.h

1032

uint32_t reg_mif_power_gating_enable_control_get(struct aq_hw* hw);

sys/dev/aq/aq_hw_llh.h

1038

void mif_mcp_up_mailbox_execute_operation_set(struct aq_hw* hw, uint32_t value);

sys/dev/aq/aq_hw_llh.h

1043

void mif_mcp_up_mailbox_addr_set(struct aq_hw *hw, uint32_t value);

sys/dev/aq/aq_hw_llh.h

105

void reg_glb_nvr_provisioning2_set(struct aq_hw* hw, uint32_t value);

sys/dev/aq/aq_hw_llh.h

110

uint32_t reg_glb_nvr_provisioning2_get(struct aq_hw* hw);

sys/dev/aq/aq_hw_llh.h

115

void reg_glb_nvr_interface1_set(struct aq_hw* hw, uint32_t value);

sys/dev/aq/aq_hw_llh.h

120

uint32_t reg_glb_nvr_interface1_get(struct aq_hw* hw);

sys/dev/aq/aq_hw_llh.h

213

void mpi_tx_reg_res_dis_set(struct aq_hw* hw, uint32_t mpi_tx_reg_res_dis);

sys/dev/aq/aq_hw_llh.h

219

uint32_t mpi_tx_reg_res_dis_get(struct aq_hw* hw);

sys/dev/aq/aq_hw_llh.h

429

uint32_t reg_glb_cpu_scratch_scp_get(struct aq_hw *hw,

sys/dev/aq/aq_hw_llh.h

436

uint32_t reg_glb_cpu_no_reset_scratchpad_get(struct aq_hw* hw, uint32_t index);

sys/dev/aq/aq_hw_llh.h

49

void reg_glb_fw_image_id1_set(struct aq_hw* hw, uint32_t value);

sys/dev/aq/aq_hw_llh.h

50

uint32_t reg_glb_fw_image_id1_get(struct aq_hw* hw);

sys/dev/aq/aq_hw_llh.h

63

uint32_t reg_glb_standard_ctl1_get(struct aq_hw* hw);

sys/dev/aq/aq_hw_llh.h

67

void reg_glb_standard_ctl1_set(struct aq_hw* hw, uint32_t glb_standard_ctl1);

sys/dev/aq/aq_hw_llh.h

72

void reg_global_ctl2_set(struct aq_hw* hw, uint32_t global_ctl2);

sys/dev/aq/aq_hw_llh.h

77

uint32_t reg_global_ctl2_get(struct aq_hw* hw);

sys/dev/aq/aq_hw_llh.h

83

void reg_glb_daisy_chain_status1_set(struct aq_hw* hw,

sys/dev/aq/aq_hw_llh.h

89

uint32_t reg_glb_daisy_chain_status1_get(struct aq_hw* hw);

sys/dev/aq/aq_hw_llh.h

95

void reg_glb_general_provisioning9_set(struct aq_hw* hw, uint32_t value);

sys/dev/aq/aq_irq.c

122

struct aq_hw *hw = &aq_dev->hw;

sys/dev/aq/aq_irq.c

127

aq_hw_get_link_state(hw, &link_speed, &fc_neg);

sys/dev/aq/aq_irq.c

134

rpb_rx_xoff_en_per_tc_set(hw, fc_neg.fc_rx, 0);

sys/dev/aq/aq_irq.c

141

aq_hw_interrupt_moderation_set(hw);

sys/dev/aq/aq_irq.c

148

rpb_rx_xoff_en_per_tc_set(hw, 0, 0);

sys/dev/aq/aq_irq.c

165

struct aq_hw *hw = &aq_dev->hw;

sys/dev/aq/aq_irq.c

167

itr_irq_status_clearlsw_set(hw, BIT(ring->msix));

sys/dev/aq/aq_irq.c

168

AQ_HW_FLUSH(hw);

sys/dev/aq/aq_irq.c

180

struct aq_hw *hw = &aq_dev->hw;

sys/dev/aq/aq_irq.c

182

itr_irq_status_clearlsw_set(hw, BIT(aq_dev->msix));

sys/dev/aq/aq_irq.c

183

AQ_HW_FLUSH(hw);

sys/dev/aq/aq_irq.c

58

struct aq_hw *hw = &aq_dev->hw;

sys/dev/aq/aq_irq.c

62

if (aq_hw_mpi_read_stats(hw, &stats) != 0)

sys/dev/aq/aq_main.c

1004

struct aq_hw *hw = &softc->hw;

sys/dev/aq/aq_main.c

1009

itr_irq_msk_clearlsw_set(hw, BIT(softc->msix + 1) - 1);

sys/dev/aq/aq_main.c

1018

struct aq_hw *hw = &softc->hw;

sys/dev/aq/aq_main.c

1022

itr_irq_msk_setlsw_set(hw, BIT(softc->rx_rings[rxqid]->msix));

sys/dev/aq/aq_main.c

1032

struct aq_hw *hw = &softc->hw;

sys/dev/aq/aq_main.c

1036

itr_irq_msk_setlsw_set(hw, BIT(softc->tx_rings[txqid]->msix));

sys/dev/aq/aq_main.c

1116

struct aq_hw *hw = &softc->hw;

sys/dev/aq/aq_main.c

1121

hw_atl_b0_hw_vlan_promisc_set(hw, true);

sys/dev/aq/aq_main.c

1135

hw_atl_b0_hw_vlan_set(hw, aq_vlans);

sys/dev/aq/aq_main.c

1136

if (hw_atl_b0_hw_vlan_promisc_set(hw,

sys/dev/aq/aq_main.c

1175

struct aq_hw *hw = &softc->hw;

sys/dev/aq/aq_main.c

1178

if (hw->fw_ops->led_control)

sys/dev/aq/aq_main.c

1179

hw->fw_ops->led_control(hw, onoff);

sys/dev/aq/aq_main.c

1304

val = tdm_tx_desc_head_ptr_get(&ring->dev->hw, ring->index);

sys/dev/aq/aq_main.c

1323

val = reg_tx_dma_desc_tail_ptr_get(&ring->dev->hw, ring->index);

sys/dev/aq/aq_main.c

1342

val = rdm_rx_desc_head_ptr_get(&ring->dev->hw, ring->index);

sys/dev/aq/aq_main.c

1361

val = reg_rx_dma_desc_tail_ptr_get(&ring->dev->hw, ring->index);

sys/dev/aq/aq_main.c

333

struct aq_hw *hw;

sys/dev/aq/aq_main.c

361

softc->hw.hw_tag = softc->mmio_tag;

sys/dev/aq/aq_main.c

362

softc->hw.hw_handle = softc->mmio_handle;

sys/dev/aq/aq_main.c

363

softc->hw.dev = softc->dev;

sys/dev/aq/aq_main.c

364

softc->hw.device_id = pci_get_device(softc->dev);

sys/dev/aq/aq_main.c

365

if (aq_is_atlantic2(softc->hw.device_id))

sys/dev/aq/aq_main.c

366

softc->hw.chip_features |= AQ_HW_CHIP_ATLANTIC2;

sys/dev/aq/aq_main.c

367

hw = &softc->hw;

sys/dev/aq/aq_main.c

368

hw->link_rate = aq_fw_speed_auto;

sys/dev/aq/aq_main.c

369

hw->itr = -1;

sys/dev/aq/aq_main.c

370

hw->fc.fc_rx = 1;

sys/dev/aq/aq_main.c

371

hw->fc.fc_tx = 1;

sys/dev/aq/aq_main.c

375

rc = aq_hw_mpi_create(hw);

sys/dev/aq/aq_main.c

382

if (hw->fast_start_enabled)

sys/dev/aq/aq_main.c

383

rc = hw->fw_ops->reset(hw);

sys/dev/aq/aq_main.c

385

rc = aq_hw_reset(&softc->hw, !IS_CHIP_FEATURE(hw, ATLANTIC2));

sys/dev/aq/aq_main.c

393

rc = aq_hw_get_mac_permanent(hw, hw->mac_addr);

sys/dev/aq/aq_main.c

401

iflib_set_mac(ctx, hw->mac_addr);

sys/dev/aq/aq_main.c

506

aq_hw_deinit(&softc->hw);

sys/dev/aq/aq_main.c

537

aq_hw_deinit(&softc->hw);

sys/dev/aq/aq_main.c

550

err = aq_hw_mpi_create(&softc->hw);

sys/dev/aq/aq_main.c

719

struct aq_hw *hw;

sys/dev/aq/aq_main.c

725

hw = &softc->hw;

sys/dev/aq/aq_main.c

727

atomic_store_rel_long(&hw->flags, 0);

sys/dev/aq/aq_main.c

729

hw->tx_rings_count = softc->tx_rings_count;

sys/dev/aq/aq_main.c

731

err = aq_hw_init(&softc->hw, softc->hw.mac_addr, softc->msix,

sys/dev/aq/aq_main.c

745

err = aq_ring_tx_init(&softc->hw, ring);

sys/dev/aq/aq_main.c

750

err = aq_ring_tx_start(hw, ring);

sys/dev/aq/aq_main.c

759

err = aq_ring_rx_init(&softc->hw, ring);

sys/dev/aq/aq_main.c

764

err = aq_ring_rx_start(hw, ring);

sys/dev/aq/aq_main.c

772

aq_hw_start(hw);

sys/dev/aq/aq_main.c

774

aq_hw_rss_hash_set(&softc->hw, softc->rss_key);

sys/dev/aq/aq_main.c

775

aq_hw_rss_set(&softc->hw, softc->rss_table);

sys/dev/aq/aq_main.c

777

if (!IS_CHIP_FEATURE(hw, ATLANTIC2))

sys/dev/aq/aq_main.c

778

aq_hw_udp_rss_enable(hw, (aq_rss_hashconfig() &

sys/dev/aq/aq_main.c

781

aq_hw_set_link_speed(hw, hw->link_rate);

sys/dev/aq/aq_main.c

796

struct aq_hw *hw;

sys/dev/aq/aq_main.c

802

hw = &softc->hw;

sys/dev/aq/aq_main.c

808

aq_ring_tx_stop(hw, softc->tx_rings[i]);

sys/dev/aq/aq_main.c

813

aq_ring_rx_stop(hw, softc->rx_rings[i]);

sys/dev/aq/aq_main.c

816

aq_hw_reset(&softc->hw, true);

sys/dev/aq/aq_main.c

845

struct aq_hw *hw = &softc->hw;

sys/dev/aq/aq_main.c

852

aq_hw_mac_addr_set(hw, mac_addr, count + 1);

sys/dev/aq/aq_main.c

869

struct aq_hw *hw = &softc->hw;

sys/dev/aq/aq_main.c

876

rpfl2_uc_flr_en_set(hw, 0U, i);

sys/dev/aq/aq_main.c

880

if (aq_hw_set_promisc(hw, !!(if_getflags(ifp) & IFF_PROMISC),

sys/dev/aq/aq_main.c

957

err = aq_hw_set_promisc(&softc->hw, !!(flags & IFF_PROMISC),

sys/dev/aq/aq_main.c

990

struct aq_hw *hw = &softc->hw;

sys/dev/aq/aq_main.c

995

itr_irq_msk_setlsw_set(hw, BIT(softc->msix + 1) - 1);

sys/dev/aq/aq_media.c

114

struct aq_hw *hw = &aq_dev->hw;

sys/dev/aq/aq_media.c

116

int old_link_speed = hw->link_rate;

sys/dev/aq/aq_media.c

133

hw->link_rate = aq_fw_speed_auto;

sys/dev/aq/aq_media.c

139

hw->link_rate = 0;

sys/dev/aq/aq_media.c

148

device_printf(hw->dev, "unknown media: 0x%X\n",

sys/dev/aq/aq_media.c

152

hw->link_rate = aq_media_types[i].fw_rate;

sys/dev/aq/aq_media.c

156

hw->fc.fc_rx = (ifm->ifm_media & IFM_ETH_RXPAUSE) ? 1 : 0;

sys/dev/aq/aq_media.c

157

hw->fc.fc_tx = (ifm->ifm_media & IFM_ETH_TXPAUSE) ? 1 : 0;

sys/dev/aq/aq_media.c

164

(hw->link_rate != old_link_speed)) {

sys/dev/aq/aq_media.c

166

aq_hw_set_link_speed(hw, hw->link_rate);

sys/dev/aq/aq_media.c

77

struct aq_hw *hw = &aq_dev->hw;

sys/dev/aq/aq_media.c

92

if (hw->link_rate == aq_fw_speed_auto)

sys/dev/aq/aq_ring.c

101

rdm_rx_desc_len_set(hw, ring->rx_size / 8U, ring->index);

sys/dev/aq/aq_ring.c

103

rdm_rx_desc_data_buff_size_set(hw, ring->rx_buf_size / 1024U,

sys/dev/aq/aq_ring.c

106

rdm_rx_desc_head_buff_size_set(hw, 0U, ring->index);

sys/dev/aq/aq_ring.c

107

rdm_rx_desc_head_splitting_set(hw, 0U, ring->index);

sys/dev/aq/aq_ring.c

108

rpo_rx_desc_vlan_stripping_set(hw,

sys/dev/aq/aq_ring.c

115

itr_irq_map_rx_set(hw, ring->msix, ring->index);

sys/dev/aq/aq_ring.c

116

itr_irq_map_en_rx_set(hw, true, ring->index);

sys/dev/aq/aq_ring.c

118

rdm_cpu_id_set(hw, 0, ring->index);

sys/dev/aq/aq_ring.c

119

rdm_rx_desc_dca_en_set(hw, 0U, ring->index);

sys/dev/aq/aq_ring.c

120

rdm_rx_head_dca_en_set(hw, 0U, ring->index);

sys/dev/aq/aq_ring.c

121

rdm_rx_pld_dca_en_set(hw, 0U, ring->index);

sys/dev/aq/aq_ring.c

123

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_ring.c

129

aq_ring_tx_init(struct aq_hw *hw, struct aq_ring *ring)

sys/dev/aq/aq_ring.c

137

tdm_tx_desc_en_set(hw, 0U, ring->index);

sys/dev/aq/aq_ring.c

139

reg_tx_dma_desc_base_addresslswset(hw, dma_desc_addr_lsw, ring->index);

sys/dev/aq/aq_ring.c

141

reg_tx_dma_desc_base_addressmswset(hw, dma_desc_addr_msw, ring->index);

sys/dev/aq/aq_ring.c

143

tdm_tx_desc_len_set(hw, ring->tx_size / 8U, ring->index);

sys/dev/aq/aq_ring.c

145

aq_ring_tx_tail_update(hw, ring, 0U);

sys/dev/aq/aq_ring.c

148

tdm_tx_desc_wr_wb_threshold_set(hw, 0U, ring->index);

sys/dev/aq/aq_ring.c

151

itr_irq_map_tx_set(hw, ring->msix, ring->index);

sys/dev/aq/aq_ring.c

152

itr_irq_map_en_tx_set(hw, true, ring->index);

sys/dev/aq/aq_ring.c

154

tdm_cpu_id_set(hw, 0, ring->index);

sys/dev/aq/aq_ring.c

155

tdm_tx_desc_dca_en_set(hw, 0U, ring->index);

sys/dev/aq/aq_ring.c

157

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_ring.c

163

aq_ring_tx_tail_update(struct aq_hw *hw, struct aq_ring *ring, uint32_t tail)

sys/dev/aq/aq_ring.c

166

reg_tx_dma_desc_tail_ptr_set(hw, tail, ring->index);

sys/dev/aq/aq_ring.c

172

aq_ring_tx_start(struct aq_hw *hw, struct aq_ring *ring)

sys/dev/aq/aq_ring.c

177

tdm_tx_desc_en_set(hw, 1U, ring->index);

sys/dev/aq/aq_ring.c

178

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_ring.c

184

aq_ring_rx_start(struct aq_hw *hw, struct aq_ring *ring)

sys/dev/aq/aq_ring.c

189

rdm_rx_desc_en_set(hw, 1U, ring->index);

sys/dev/aq/aq_ring.c

190

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_ring.c

196

aq_ring_tx_stop(struct aq_hw *hw, struct aq_ring *ring)

sys/dev/aq/aq_ring.c

201

tdm_tx_desc_en_set(hw, 0U, ring->index);

sys/dev/aq/aq_ring.c

202

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_ring.c

208

aq_ring_rx_stop(struct aq_hw *hw, struct aq_ring *ring)

sys/dev/aq/aq_ring.c

213

rdm_rx_desc_en_set(hw, 0U, ring->index);

sys/dev/aq/aq_ring.c

217

rdm_rx_dma_desc_cache_init_tgl(hw);

sys/dev/aq/aq_ring.c

218

err = aq_hw_err_from_flags(hw);

sys/dev/aq/aq_ring.c

255

reg_rx_dma_desc_tail_ptr_set(&aq_dev->hw, pidx, ring->index);

sys/dev/aq/aq_ring.c

571

aq_ring_tx_tail_update(&aq_dev->hw, ring, pidx);

sys/dev/aq/aq_ring.c

592

head = tdm_tx_desc_head_ptr_get(&aq_dev->hw, ring->index);

sys/dev/aq/aq_ring.c

85

aq_ring_rx_init(struct aq_hw *hw, struct aq_ring *ring)

sys/dev/aq/aq_ring.c

93

rdm_rx_desc_en_set(hw, false, ring->index);

sys/dev/aq/aq_ring.c

95

rdm_rx_desc_head_splitting_set(hw, 0U, ring->index);

sys/dev/aq/aq_ring.c

97

reg_rx_dma_desc_base_addresslswset(hw, dma_desc_addr_lsw, ring->index);

sys/dev/aq/aq_ring.c

99

reg_rx_dma_desc_base_addressmswset(hw, dma_desc_addr_msw, ring->index);

sys/dev/aq/aq_ring.h

169

int aq_ring_rx_init(struct aq_hw *hw, struct aq_ring *ring);

sys/dev/aq/aq_ring.h

170

int aq_ring_tx_init(struct aq_hw *hw, struct aq_ring *ring);

sys/dev/aq/aq_ring.h

172

int aq_ring_tx_start(struct aq_hw *hw, struct aq_ring *ring);

sys/dev/aq/aq_ring.h

173

int aq_ring_tx_stop(struct aq_hw *hw, struct aq_ring *ring);

sys/dev/aq/aq_ring.h

174

int aq_ring_rx_start(struct aq_hw *hw, struct aq_ring *ring);

sys/dev/aq/aq_ring.h

175

int aq_ring_rx_stop(struct aq_hw *hw, struct aq_ring *ring);

sys/dev/aq/aq_ring.h

177

int aq_ring_tx_tail_update(struct aq_hw *hw, struct aq_ring *ring, uint32_t tail);

sys/dev/ata/ata-all.c

362

if (ch->hw.status && !ch->hw.status(ch->dev))

sys/dev/ata/ata-all.c

381

if (ch->hw.end_transaction(request) == ATA_OP_FINISHED) {

sys/dev/ata/ata-all.c

807

if (ch->hw.begin_transaction(request) == ATA_OP_FINISHED) {

sys/dev/ata/ata-all.c

846

if (ch->hw.begin_transaction(request) == ATA_OP_FINISHED) {

sys/dev/ata/ata-all.h

404

struct ata_lowlevel hw; /* lowlevel HW functions */

sys/dev/ata/ata-lowlevel.c

106

if (ch->hw.command(request)) {

sys/dev/ata/ata-lowlevel.c

122

ch->hw.tf_read(request);

sys/dev/ata/ata-lowlevel.c

157

if (ch->hw.command(request)) {

sys/dev/ata/ata-lowlevel.c

185

if (ch->hw.command(request)) {

sys/dev/ata/ata-lowlevel.c

211

if (ch->hw.command(request)) {

sys/dev/ata/ata-lowlevel.c

262

ch->hw.tf_read(request);

sys/dev/ata/ata-lowlevel.c

339

ch->hw.tf_read(request);

sys/dev/ata/ata-lowlevel.c

69

ch->hw.begin_transaction = ata_begin_transaction;

sys/dev/ata/ata-lowlevel.c

70

ch->hw.end_transaction = ata_end_transaction;

sys/dev/ata/ata-lowlevel.c

71

ch->hw.status = ata_generic_status;

sys/dev/ata/ata-lowlevel.c

72

ch->hw.softreset = NULL;

sys/dev/ata/ata-lowlevel.c

73

ch->hw.command = ata_generic_command;

sys/dev/ata/ata-lowlevel.c

74

ch->hw.tf_read = ata_tf_read;

sys/dev/ata/ata-lowlevel.c

743

ch->hw.tf_write(request);

sys/dev/ata/ata-lowlevel.c

75

ch->hw.tf_write = ata_tf_write;

sys/dev/ata/ata-lowlevel.c

76

ch->hw.pm_read = NULL;

sys/dev/ata/ata-lowlevel.c

77

ch->hw.pm_write = NULL;

sys/dev/ata/ata-pci.c

474

ch->hw.status = ata_pci_status;

sys/dev/ata/ata-sata.c

292

if (ch->hw.pm_read(dev, ATA_PM, 0, &pm_chipid)) {

sys/dev/ata/ata-sata.c

298

if (ch->hw.pm_read(dev, ATA_PM, 1, &pm_revision)) {

sys/dev/ata/ata-sata.c

304

if (ch->hw.pm_read(dev, ATA_PM, 2, &pm_ports)) {

sys/dev/ata/ata-sata.c

351

signature = ch->hw.softreset(dev, port);

sys/dev/ata/ata-sata.c

85

if (ch->hw.pm_read != NULL)

sys/dev/ata/ata-sata.c

86

return (ch->hw.pm_read(ch->dev, port, reg, val));

sys/dev/ata/ata-sata.c

98

if (ch->hw.pm_write != NULL)

sys/dev/ata/ata-sata.c

99

return (ch->hw.pm_write(ch->dev, port, reg, val));

sys/dev/ata/chipsets/ata-acard.c

118

ch->hw.status = ata_acard_status;

sys/dev/ata/chipsets/ata-intel.c

375

ch->hw.pm_read = ata_intel_sata_cscr_read;

sys/dev/ata/chipsets/ata-intel.c

376

ch->hw.pm_write = ata_intel_sata_cscr_write;

sys/dev/ata/chipsets/ata-intel.c

379

ch->hw.pm_read = ata_intel_sata_ahci_read;

sys/dev/ata/chipsets/ata-intel.c

380

ch->hw.pm_write = ata_intel_sata_ahci_write;

sys/dev/ata/chipsets/ata-intel.c

382

ch->hw.pm_read = ata_intel_sata_sidpr_read;

sys/dev/ata/chipsets/ata-intel.c

383

ch->hw.pm_write = ata_intel_sata_sidpr_write;

sys/dev/ata/chipsets/ata-intel.c

386

if (ch->hw.pm_write != NULL) {

sys/dev/ata/chipsets/ata-intel.c

388

ch->hw.status = ata_intel_sata_status;

sys/dev/ata/chipsets/ata-intel.c

445

if (ch->hw.pm_read != NULL) {

sys/dev/ata/chipsets/ata-intel.c

861

ch->hw.status = ata_intel_31244_status;

sys/dev/ata/chipsets/ata-intel.c

862

ch->hw.tf_write = ata_intel_31244_tf_write;

sys/dev/ata/chipsets/ata-nvidia.c

263

ch->hw.status = ata_nvidia_status;

sys/dev/ata/chipsets/ata-promise.c

370

ch->hw.status = ata_promise_status;

sys/dev/ata/chipsets/ata-promise.c

514

ch->hw.status = ata_promise_tx2_status;

sys/dev/ata/chipsets/ata-promise.c

565

ch->hw.command = ata_promise_sx4_command;

sys/dev/ata/chipsets/ata-promise.c

568

ch->hw.command = ata_promise_mio_command;

sys/dev/ata/chipsets/ata-promise.c

569

ch->hw.status = ata_promise_mio_status;

sys/dev/ata/chipsets/ata-promise.c

570

ch->hw.softreset = ata_promise_mio_softreset;

sys/dev/ata/chipsets/ata-promise.c

571

ch->hw.pm_read = ata_promise_mio_pm_read;

sys/dev/ata/chipsets/ata-promise.c

572

ch->hw.pm_write = ata_promise_mio_pm_write;

sys/dev/ata/chipsets/ata-promise.c

780

u_int32_t signature = ch->hw.softreset(dev, ATA_PM);

sys/dev/ata/chipsets/ata-serverworks.c

207

ch->hw.tf_read = ata_serverworks_tf_read;

sys/dev/ata/chipsets/ata-serverworks.c

208

ch->hw.tf_write = ata_serverworks_tf_write;

sys/dev/ata/chipsets/ata-serverworks.c

235

ch->hw.status = ata_serverworks_status;

sys/dev/ata/chipsets/ata-siliconimage.c

185

ch->hw.status = ata_cmd_status;

sys/dev/ata/chipsets/ata-siliconimage.c

287

ch->hw.status = ata_sii_status;

sys/dev/ata/chipsets/ata-via.c

253

ch->hw.status = ata_via_status;

sys/dev/ata/chipsets/ata-via.c

409

ch->hw.status = ata_via_sata_status;

sys/dev/ata/chipsets/ata-via.c

410

ch->hw.pm_read = ata_via_sata_scr_read;

sys/dev/ata/chipsets/ata-via.c

411

ch->hw.pm_write = ata_via_sata_scr_write;

sys/dev/atkbdc/psm.c

1109

if (vendortype[i].model == sc->hw.model)

sys/dev/atkbdc/psm.c

1152

if (sc->hw.model == MOUSE_MODEL_SYNAPTICS) {

sys/dev/atkbdc/psm.c

1178

if (sc->hw.model == MOUSE_MODEL_GENERIC) {

sys/dev/atkbdc/psm.c

1564

sc->hw.iftype = MOUSE_IF_PS2;

sys/dev/atkbdc/psm.c

1567

sc->hw.hwid = get_aux_id(sc->kbdc);

sys/dev/atkbdc/psm.c

1568

if (!is_a_mouse(sc->hw.hwid)) {

sys/dev/atkbdc/psm.c

1573

sc->hw.hwid);

sys/dev/atkbdc/psm.c

1576

switch (sc->hw.hwid) {

sys/dev/atkbdc/psm.c

1578

sc->hw.type = MOUSE_TRACKBALL;

sys/dev/atkbdc/psm.c

1585

sc->hw.type = MOUSE_MOUSE;

sys/dev/atkbdc/psm.c

1588

sc->hw.type = MOUSE_UNKNOWN;

sys/dev/atkbdc/psm.c

1593

sc->hw.buttons = 2;

sys/dev/atkbdc/psm.c

1597

sc->hw.buttons = get_mouse_buttons(sc->kbdc);

sys/dev/atkbdc/psm.c

1609

sc->hw.model = vendortype[i].model;

sys/dev/atkbdc/psm.c

1745

nbuttons = sc->hw.buttons;

sys/dev/atkbdc/psm.c

1990

switch (sc->hw.model) {

sys/dev/atkbdc/psm.c

2000

error = psm_register(dev, sc->hw.model);

sys/dev/atkbdc/psm.c

2008

switch (sc->hw.model) {

sys/dev/atkbdc/psm.c

2022

if (sc->hw.model == MOUSE_MODEL_ELANTECH &&

sys/dev/atkbdc/psm.c

2030

model_name(sc->hw.model), sc->hw.hwid & 0x00ff);

sys/dev/atkbdc/psm.c

2033

model_name(sc->hw.model), sc->hw.hwid & 0x00ff,

sys/dev/atkbdc/psm.c

2034

sc->hw.hwid >> 8, sc->hw.buttons);

sys/dev/atkbdc/psm.c

2636

((old_mousehw_t *)addr)->buttons = sc->hw.buttons;

sys/dev/atkbdc/psm.c

2637

((old_mousehw_t *)addr)->iftype = sc->hw.iftype;

sys/dev/atkbdc/psm.c

2638

((old_mousehw_t *)addr)->type = sc->hw.type;

sys/dev/atkbdc/psm.c

2639

((old_mousehw_t *)addr)->hwid = sc->hw.hwid & 0x00ff;

sys/dev/atkbdc/psm.c

2645

*(mousehw_t *)addr = sc->hw;

sys/dev/atkbdc/psm.c

2906

sc->hw.hwid &= ~0x00ff;

sys/dev/atkbdc/psm.c

2907

sc->hw.hwid |= get_aux_id(sc->kbdc);

sys/dev/atkbdc/psm.c

2908

*(int *)addr = sc->hw.hwid & 0x00ff;

sys/dev/atkbdc/psm.c

3143

if (sc->hw.model == MOUSE_MODEL_SYNAPTICS ||

sys/dev/atkbdc/psm.c

3144

sc->hw.model == MOUSE_MODEL_ELANTECH ||

sys/dev/atkbdc/psm.c

440

mousehw_t hw; /* hardware information */

sys/dev/atkbdc/psm.c

4967

if (sc->hw.model == MOUSE_MODEL_THINK)

sys/dev/atkbdc/psm.c

4985

switch (sc->hw.model) {

sys/dev/atkbdc/psm.c

5148

sc->hw.model != MOUSE_MODEL_ELANTECH &&

sys/dev/atkbdc/psm.c

5149

sc->hw.model != MOUSE_MODEL_SYNAPTICS) {

sys/dev/atkbdc/psm.c

5153

switch (sc->hw.model) {

sys/dev/atkbdc/psm.c

5415

sc->hw.buttons = 4;

sys/dev/atkbdc/psm.c

5566

sc->hw.hwid &= 0x00ff;

sys/dev/atkbdc/psm.c

5567

sc->hw.hwid |= data[2] << 8; /* save model ID */

sys/dev/atkbdc/psm.c

5606

sc->hw.buttons = 5; /* IntelliMouse Explorer XXX */

sys/dev/atkbdc/psm.c

5607

sc->hw.hwid = id;

sys/dev/atkbdc/psm.c

5651

sc->hw.buttons = 3;

sys/dev/atkbdc/psm.c

5652

sc->hw.hwid = id;

sys/dev/atkbdc/psm.c

5683

sc->hw.buttons = 3; /* XXX some 4D mice have 4? */

sys/dev/atkbdc/psm.c

5684

sc->hw.hwid = id;

sys/dev/atkbdc/psm.c

5722

sc->hw.buttons = (id == PSM_4DPLUS_ID) ? 4 : 3;

sys/dev/atkbdc/psm.c

5723

sc->hw.hwid = id;

sys/dev/atkbdc/psm.c

6287

if (sc->hw.model != MOUSE_MODEL_SYNAPTICS) {

sys/dev/atkbdc/psm.c

6325

sc->hw.model == MOUSE_MODEL_SYNAPTICS && !(mode_byte & (1 << 5))) {

sys/dev/atkbdc/psm.c

6753

sc->hw.model = MOUSE_MODEL_SYNAPTICS;

sys/dev/atkbdc/psm.c

6767

sc->hw.buttons = buttons;

sys/dev/atkbdc/psm.c

7057

sc->hw.hwid = firmware;

sys/dev/atkbdc/psm.c

7058

sc->hw.buttons = 3;

sys/dev/atkbdc/psm.c

7455

sc->hw.buttons = 3;

sys/dev/atopcase/atopcase.c

185

ac->rdesc_len = ac->hw.rdescsize = pl_len;

sys/dev/atopcase/atopcase.c

187

(int) ac->hw.rdescsize, ac->rdesc, " ");

sys/dev/atopcase/atopcase.c

448

strlcpy(ac->hw.name, "Apple MacBook", sizeof(ac->hw.name));

sys/dev/atopcase/atopcase.c

449

ac->hw.idBus = BUS_SPI;

sys/dev/atopcase/atopcase.c

450

ac->hw.idVendor = sc->sc_vid;

sys/dev/atopcase/atopcase.c

451

ac->hw.idProduct = sc->sc_pid;

sys/dev/atopcase/atopcase.c

452

ac->hw.idVersion = sc->sc_ver;

sys/dev/atopcase/atopcase.c

453

strlcpy(ac->hw.idPnP, sc->sc_hid, sizeof(ac->hw.idPnP));

sys/dev/atopcase/atopcase.c

454

strlcpy(ac->hw.serial, sc->sc_serial, sizeof(ac->hw.serial));

sys/dev/atopcase/atopcase.c

461

hid_add_dynamic_quirk(&ac->hw, HQ_NOWRITE);

sys/dev/atopcase/atopcase.c

485

device_set_ivars(hidbus, &ac->hw);

sys/dev/atopcase/atopcase_var.h

48

struct hid_device_info hw;

sys/dev/bhnd/bhndb/bhndb.c

186

u_int ncores, const struct bhndb_hw *hw)

sys/dev/bhnd/bhndb/bhndb.c

188

for (u_int i = 0; i < hw->num_hw_reqs; i++) {

sys/dev/bhnd/bhndb/bhndb.c

192

match = &hw->hw_reqs[i];

sys/dev/bhnd/bhndb/bhndb.c

471

u_int ncores, const struct bhndb_hw **hw)

sys/dev/bhnd/bhndb/bhndb.c

482

*hw = next;

sys/dev/bhnd/bhndb/bhndb.c

515

const struct bhndb_hw *hw;

sys/dev/bhnd/bhndb/bhndb.c

536

if ((error = bhndb_find_hwspec(sc, cores, ncores, &hw))) {

sys/dev/bhnd/bhndb/bhndb.c

541

hw = NULL;

sys/dev/bhnd/bhndb/bhndb.c

543

hwcfg = hw->cfg;

sys/dev/bhnd/bhndb/bhndb.c

546

if (hw != NULL && (bootverbose || BHNDB_DEBUG(PRIO))) {

sys/dev/bhnd/bhndb/bhndb.c

547

device_printf(sc->dev, "%s resource configuration\n", hw->name);

sys/dev/bhnd/bhndb/bhndb.c

81

const struct bhndb_hw *hw);

sys/dev/bhnd/bhndb/bhndb.c

91

const struct bhndb_hw **hw);

sys/dev/cxgbe/t4_main.c

1246

uint64_t hw;

sys/dev/cxgbe/t4_main.c

1253

hw = t4_read_reg64(sc, A_SGE_TIMESTAMP_LO);

sys/dev/cxgbe/t4_main.c

1261

cur->hw_cur = hw;

sys/dev/cxgbe/t4_main.c

1267

if (cur->hw_cur == hw) {

sys/dev/cxgbe/t4_main.c

1277

nex->hw_cur = hw;

sys/dev/cyapa/cyapa.c

1212

*(mousehw_t *)data = sc->hw;

sys/dev/cyapa/cyapa.c

208

mousehw_t hw; /* hardware information */

sys/dev/cyapa/cyapa.c

555

sc->hw.buttons = 5;

sys/dev/cyapa/cyapa.c

556

sc->hw.iftype = MOUSE_IF_PS2;

sys/dev/cyapa/cyapa.c

557

sc->hw.type = MOUSE_MOUSE;

sys/dev/cyapa/cyapa.c

558

sc->hw.model = MOUSE_MODEL_INTELLI;

sys/dev/cyapa/cyapa.c

559

sc->hw.hwid = addr;

sys/dev/e1000/e1000_80003es2lan.c

1025

ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, data);

sys/dev/e1000/e1000_80003es2lan.c

1030

ret_val = hw->phy.ops.commit(hw);

sys/dev/e1000/e1000_80003es2lan.c

1040

ret_val = e1000_write_kmrn_reg_80003es2lan(hw, reg, data);

sys/dev/e1000/e1000_80003es2lan.c

1045

ret_val = e1000_read_kmrn_reg_80003es2lan(hw, reg, &data);

sys/dev/e1000/e1000_80003es2lan.c

1049

ret_val = e1000_write_kmrn_reg_80003es2lan(hw, reg, data);

sys/dev/e1000/e1000_80003es2lan.c

1053

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL_2, &data);

sys/dev/e1000/e1000_80003es2lan.c

1058

ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL_2, data);

sys/dev/e1000/e1000_80003es2lan.c

1062

reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_80003es2lan.c

1064

E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg);

sys/dev/e1000/e1000_80003es2lan.c

1066

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_PWR_MGMT_CTRL, &data);

sys/dev/e1000/e1000_80003es2lan.c

1074

if (!hw->mac.ops.check_mng_mode(hw)) {

sys/dev/e1000/e1000_80003es2lan.c

1077

ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_PWR_MGMT_CTRL,

sys/dev/e1000/e1000_80003es2lan.c

1082

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,

sys/dev/e1000/e1000_80003es2lan.c

1088

ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,

sys/dev/e1000/e1000_80003es2lan.c

1097

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_INBAND_CTRL, &data);

sys/dev/e1000/e1000_80003es2lan.c

1102

ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_INBAND_CTRL, data);

sys/dev/e1000/e1000_80003es2lan.c

1116

static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

1124

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_80003es2lan.c

1127

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_80003es2lan.c

1133

ret_val = e1000_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 4),

sys/dev/e1000/e1000_80003es2lan.c

1137

ret_val = e1000_read_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),

sys/dev/e1000/e1000_80003es2lan.c

1142

ret_val = e1000_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),

sys/dev/e1000/e1000_80003es2lan.c

1147

e1000_read_kmrn_reg_80003es2lan(hw,

sys/dev/e1000/e1000_80003es2lan.c

1154

e1000_write_kmrn_reg_80003es2lan(hw,

sys/dev/e1000/e1000_80003es2lan.c

1160

ret_val = e1000_copper_link_setup_gg82563_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

1164

return e1000_setup_copper_link_generic(hw);

sys/dev/e1000/e1000_80003es2lan.c

1174

static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

1182

if (hw->phy.media_type == e1000_media_type_copper) {

sys/dev/e1000/e1000_80003es2lan.c

1183

ret_val = e1000_get_speed_and_duplex_copper_generic(hw, &speed,

sys/dev/e1000/e1000_80003es2lan.c

1189

ret_val = e1000_cfg_kmrn_1000_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

1191

ret_val = e1000_cfg_kmrn_10_100_80003es2lan(hw, duplex);

sys/dev/e1000/e1000_80003es2lan.c

1205

static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex)

sys/dev/e1000/e1000_80003es2lan.c

1216

e1000_write_kmrn_reg_80003es2lan(hw,

sys/dev/e1000/e1000_80003es2lan.c

1223

tipg = E1000_READ_REG(hw, E1000_TIPG);

sys/dev/e1000/e1000_80003es2lan.c

1226

E1000_WRITE_REG(hw, E1000_TIPG, tipg);

sys/dev/e1000/e1000_80003es2lan.c

1229

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,

sys/dev/e1000/e1000_80003es2lan.c

1234

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,

sys/dev/e1000/e1000_80003es2lan.c

1246

return hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);

sys/dev/e1000/e1000_80003es2lan.c

125

ret_val = e1000_get_phy_id(hw);

sys/dev/e1000/e1000_80003es2lan.c

1256

static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

1267

e1000_write_kmrn_reg_80003es2lan(hw,

sys/dev/e1000/e1000_80003es2lan.c

1274

tipg = E1000_READ_REG(hw, E1000_TIPG);

sys/dev/e1000/e1000_80003es2lan.c

1277

E1000_WRITE_REG(hw, E1000_TIPG, tipg);

sys/dev/e1000/e1000_80003es2lan.c

1280

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,

sys/dev/e1000/e1000_80003es2lan.c

1285

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_KMRN_MODE_CTRL,

sys/dev/e1000/e1000_80003es2lan.c

1294

return hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);

sys/dev/e1000/e1000_80003es2lan.c

1307

static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_80003es2lan.c

1315

ret_val = e1000_acquire_mac_csr_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

1321

E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);

sys/dev/e1000/e1000_80003es2lan.c

1322

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_80003es2lan.c

1326

kmrnctrlsta = E1000_READ_REG(hw, E1000_KMRNCTRLSTA);

sys/dev/e1000/e1000_80003es2lan.c

1329

e1000_release_mac_csr_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

1344

static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_80003es2lan.c

1352

ret_val = e1000_acquire_mac_csr_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

1358

E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);

sys/dev/e1000/e1000_80003es2lan.c

1359

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_80003es2lan.c

1363

e1000_release_mac_csr_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

1372

static s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

138

static s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

1382

ret_val = e1000_check_alt_mac_addr_generic(hw);

sys/dev/e1000/e1000_80003es2lan.c

1386

return e1000_read_mac_addr_generic(hw);

sys/dev/e1000/e1000_80003es2lan.c

1396

static void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

1399

if (!(hw->mac.ops.check_mng_mode(hw) ||

sys/dev/e1000/e1000_80003es2lan.c

140

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_80003es2lan.c

1400

hw->phy.ops.check_reset_block(hw)))

sys/dev/e1000/e1000_80003es2lan.c

1401

e1000_power_down_phy_copper(hw);

sys/dev/e1000/e1000_80003es2lan.c

141

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_80003es2lan.c

1412

static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

1416

e1000_clear_hw_cntrs_base_generic(hw);

sys/dev/e1000/e1000_80003es2lan.c

1418

E1000_READ_REG(hw, E1000_PRC64);

sys/dev/e1000/e1000_80003es2lan.c

1419

E1000_READ_REG(hw, E1000_PRC127);

sys/dev/e1000/e1000_80003es2lan.c

1420

E1000_READ_REG(hw, E1000_PRC255);

sys/dev/e1000/e1000_80003es2lan.c

1421

E1000_READ_REG(hw, E1000_PRC511);

sys/dev/e1000/e1000_80003es2lan.c

1422

E1000_READ_REG(hw, E1000_PRC1023);

sys/dev/e1000/e1000_80003es2lan.c

1423

E1000_READ_REG(hw, E1000_PRC1522);

sys/dev/e1000/e1000_80003es2lan.c

1424

E1000_READ_REG(hw, E1000_PTC64);

sys/dev/e1000/e1000_80003es2lan.c

1425

E1000_READ_REG(hw, E1000_PTC127);

sys/dev/e1000/e1000_80003es2lan.c

1426

E1000_READ_REG(hw, E1000_PTC255);

sys/dev/e1000/e1000_80003es2lan.c

1427

E1000_READ_REG(hw, E1000_PTC511);

sys/dev/e1000/e1000_80003es2lan.c

1428

E1000_READ_REG(hw, E1000_PTC1023);

sys/dev/e1000/e1000_80003es2lan.c

1429

E1000_READ_REG(hw, E1000_PTC1522);

sys/dev/e1000/e1000_80003es2lan.c

1431

E1000_READ_REG(hw, E1000_ALGNERRC);

sys/dev/e1000/e1000_80003es2lan.c

1432

E1000_READ_REG(hw, E1000_RXERRC);

sys/dev/e1000/e1000_80003es2lan.c

1433

E1000_READ_REG(hw, E1000_TNCRS);

sys/dev/e1000/e1000_80003es2lan.c

1434

E1000_READ_REG(hw, E1000_CEXTERR);

sys/dev/e1000/e1000_80003es2lan.c

1435

E1000_READ_REG(hw, E1000_TSCTC);

sys/dev/e1000/e1000_80003es2lan.c

1436

E1000_READ_REG(hw, E1000_TSCTFC);

sys/dev/e1000/e1000_80003es2lan.c

1438

E1000_READ_REG(hw, E1000_MGTPRC);

sys/dev/e1000/e1000_80003es2lan.c

1439

E1000_READ_REG(hw, E1000_MGTPDC);

sys/dev/e1000/e1000_80003es2lan.c

1440

E1000_READ_REG(hw, E1000_MGTPTC);

sys/dev/e1000/e1000_80003es2lan.c

1442

E1000_READ_REG(hw, E1000_IAC);

sys/dev/e1000/e1000_80003es2lan.c

1443

E1000_READ_REG(hw, E1000_ICRXOC);

sys/dev/e1000/e1000_80003es2lan.c

1445

E1000_READ_REG(hw, E1000_ICRXPTC);

sys/dev/e1000/e1000_80003es2lan.c

1446

E1000_READ_REG(hw, E1000_ICRXATC);

sys/dev/e1000/e1000_80003es2lan.c

1447

E1000_READ_REG(hw, E1000_ICTXPTC);

sys/dev/e1000/e1000_80003es2lan.c

1448

E1000_READ_REG(hw, E1000_ICTXATC);

sys/dev/e1000/e1000_80003es2lan.c

1449

E1000_READ_REG(hw, E1000_ICTXQEC);

sys/dev/e1000/e1000_80003es2lan.c

1450

E1000_READ_REG(hw, E1000_ICTXQMTC);

sys/dev/e1000/e1000_80003es2lan.c

1451

E1000_READ_REG(hw, E1000_ICRXDMTC);

sys/dev/e1000/e1000_80003es2lan.c

194

static s32 e1000_init_mac_params_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

196

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_80003es2lan.c

201

switch (hw->device_id) {

sys/dev/e1000/e1000_80003es2lan.c

203

hw->phy.media_type = e1000_media_type_internal_serdes;

sys/dev/e1000/e1000_80003es2lan.c

209

hw->phy.media_type = e1000_media_type_copper;

sys/dev/e1000/e1000_80003es2lan.c

225

mac->arc_subsystem_valid = !!(E1000_READ_REG(hw, E1000_FWSM) &

sys/dev/e1000/e1000_80003es2lan.c

267

hw->mac.ops.set_lan_id(hw);

sys/dev/e1000/e1000_80003es2lan.c

278

void e1000_init_function_pointers_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

282

hw->mac.ops.init_params = e1000_init_mac_params_80003es2lan;

sys/dev/e1000/e1000_80003es2lan.c

283

hw->nvm.ops.init_params = e1000_init_nvm_params_80003es2lan;

sys/dev/e1000/e1000_80003es2lan.c

284

hw->phy.ops.init_params = e1000_init_phy_params_80003es2lan;

sys/dev/e1000/e1000_80003es2lan.c

293

static s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

299

mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;

sys/dev/e1000/e1000_80003es2lan.c

300

return e1000_acquire_swfw_sync(hw, mask);

sys/dev/e1000/e1000_80003es2lan.c

309

static void e1000_release_phy_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

315

mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;

sys/dev/e1000/e1000_80003es2lan.c

316

e1000_release_swfw_sync(hw, mask);

sys/dev/e1000/e1000_80003es2lan.c

326

static s32 e1000_acquire_mac_csr_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

334

return e1000_acquire_swfw_sync(hw, mask);

sys/dev/e1000/e1000_80003es2lan.c

343

static void e1000_release_mac_csr_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

351

e1000_release_swfw_sync(hw, mask);

sys/dev/e1000/e1000_80003es2lan.c

360

static s32 e1000_acquire_nvm_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

366

ret_val = e1000_acquire_swfw_sync(hw, E1000_SWFW_EEP_SM);

sys/dev/e1000/e1000_80003es2lan.c

370

ret_val = e1000_acquire_nvm_generic(hw);

sys/dev/e1000/e1000_80003es2lan.c

373

e1000_release_swfw_sync(hw, E1000_SWFW_EEP_SM);

sys/dev/e1000/e1000_80003es2lan.c

384

static void e1000_release_nvm_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

388

e1000_release_nvm_generic(hw);

sys/dev/e1000/e1000_80003es2lan.c

389

e1000_release_swfw_sync(hw, E1000_SWFW_EEP_SM);

sys/dev/e1000/e1000_80003es2lan.c

400

static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_80003es2lan.c

409

ret_val = e1000_acquire_phy_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

41

static s32 e1000_acquire_phy_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

42

static void e1000_release_phy_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

424

ret_val = e1000_write_phy_reg_mdic(hw, page_select, temp);

sys/dev/e1000/e1000_80003es2lan.c

426

e1000_release_phy_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

43

static s32 e1000_acquire_nvm_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

430

if (hw->dev_spec._80003es2lan.mdic_wa_enable) {

sys/dev/e1000/e1000_80003es2lan.c

438

ret_val = e1000_read_phy_reg_mdic(hw, page_select, &temp);

sys/dev/e1000/e1000_80003es2lan.c

44

static void e1000_release_nvm_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

441

e1000_release_phy_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

447

ret_val = e1000_read_phy_reg_mdic(hw,

sys/dev/e1000/e1000_80003es2lan.c

45

static s32 e1000_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_80003es2lan.c

453

ret_val = e1000_read_phy_reg_mdic(hw,

sys/dev/e1000/e1000_80003es2lan.c

458

e1000_release_phy_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

471

static s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_80003es2lan.c

48

static s32 e1000_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_80003es2lan.c

480

ret_val = e1000_acquire_phy_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

495

ret_val = e1000_write_phy_reg_mdic(hw, page_select, temp);

sys/dev/e1000/e1000_80003es2lan.c

497

e1000_release_phy_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

501

if (hw->dev_spec._80003es2lan.mdic_wa_enable) {

sys/dev/e1000/e1000_80003es2lan.c

509

ret_val = e1000_read_phy_reg_mdic(hw, page_select, &temp);

sys/dev/e1000/e1000_80003es2lan.c

51

static s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_80003es2lan.c

512

e1000_release_phy_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

518

ret_val = e1000_write_phy_reg_mdic(hw,

sys/dev/e1000/e1000_80003es2lan.c

524

ret_val = e1000_write_phy_reg_mdic(hw,

sys/dev/e1000/e1000_80003es2lan.c

529

e1000_release_phy_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

53

static s32 e1000_get_cfg_done_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

54

static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

543

static s32 e1000_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_80003es2lan.c

548

return e1000_write_nvm_spi(hw, offset, words, data);

sys/dev/e1000/e1000_80003es2lan.c

55

static s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

558

static s32 e1000_get_cfg_done_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

56

static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,

sys/dev/e1000/e1000_80003es2lan.c

565

if (hw->bus.func == 1)

sys/dev/e1000/e1000_80003es2lan.c

569

if (E1000_READ_REG(hw, E1000_EEMNGCTL) & mask)

sys/dev/e1000/e1000_80003es2lan.c

58

static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

589

static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

59

static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

597

if (!(hw->phy.ops.read_reg))

sys/dev/e1000/e1000_80003es2lan.c

60

static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

603

ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);

sys/dev/e1000/e1000_80003es2lan.c

608

ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, phy_data);

sys/dev/e1000/e1000_80003es2lan.c

61

static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

614

ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_data);

sys/dev/e1000/e1000_80003es2lan.c

618

e1000_phy_force_speed_duplex_setup(hw, &phy_data);

sys/dev/e1000/e1000_80003es2lan.c

62

static s32 e1000_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);

sys/dev/e1000/e1000_80003es2lan.c

623

ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data);

sys/dev/e1000/e1000_80003es2lan.c

629

if (hw->phy.autoneg_wait_to_complete) {

sys/dev/e1000/e1000_80003es2lan.c

63

static s32 e1000_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

632

ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,

sys/dev/e1000/e1000_80003es2lan.c

64

static s32 e1000_cfg_on_link_up_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

641

ret_val = e1000_phy_reset_dsp_generic(hw);

sys/dev/e1000/e1000_80003es2lan.c

647

ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,

sys/dev/e1000/e1000_80003es2lan.c

65

static s32 e1000_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_80003es2lan.c

653

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,

sys/dev/e1000/e1000_80003es2lan.c

662

if (hw->mac.forced_speed_duplex & E1000_ALL_10_SPEED)

sys/dev/e1000/e1000_80003es2lan.c

67

static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_80003es2lan.c

671

ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL,

sys/dev/e1000/e1000_80003es2lan.c

684

static s32 e1000_get_cable_length_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

686

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_80003es2lan.c

69

static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

692

if (!(hw->phy.ops.read_reg))

sys/dev/e1000/e1000_80003es2lan.c

695

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_DSP_DISTANCE, &phy_data);

sys/dev/e1000/e1000_80003es2lan.c

70

static s32 e1000_read_mac_addr_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

71

static void e1000_power_down_phy_copper_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_80003es2lan.c

720

static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,

sys/dev/e1000/e1000_80003es2lan.c

727

if (hw->phy.media_type == e1000_media_type_copper) {

sys/dev/e1000/e1000_80003es2lan.c

728

ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed,

sys/dev/e1000/e1000_80003es2lan.c

730

hw->phy.ops.cfg_on_link_up(hw);

sys/dev/e1000/e1000_80003es2lan.c

732

ret_val = e1000_get_speed_and_duplex_fiber_serdes_generic(hw,

sys/dev/e1000/e1000_80003es2lan.c

746

static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

757

ret_val = e1000_disable_pcie_master_generic(hw);

sys/dev/e1000/e1000_80003es2lan.c

762

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_80003es2lan.c

764

E1000_WRITE_REG(hw, E1000_RCTL, 0);

sys/dev/e1000/e1000_80003es2lan.c

765

E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);

sys/dev/e1000/e1000_80003es2lan.c

766

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_80003es2lan.c

770

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_80003es2lan.c

772

ret_val = e1000_acquire_phy_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

777

E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);

sys/dev/e1000/e1000_80003es2lan.c

778

e1000_release_phy_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

781

ret_val = e1000_read_kmrn_reg_80003es2lan(hw,

sys/dev/e1000/e1000_80003es2lan.c

785

ret_val = e1000_write_kmrn_reg_80003es2lan(hw,

sys/dev/e1000/e1000_80003es2lan.c

793

ret_val = e1000_get_auto_rd_done_generic(hw);

sys/dev/e1000/e1000_80003es2lan.c

799

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_80003es2lan.c

800

E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/e1000_80003es2lan.c

802

return e1000_check_alt_mac_addr_generic(hw);

sys/dev/e1000/e1000_80003es2lan.c

811

static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

813

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_80003es2lan.c

821

e1000_initialize_hw_bits_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

824

ret_val = mac->ops.id_led_init(hw);

sys/dev/e1000/e1000_80003es2lan.c

831

mac->ops.clear_vfta(hw);

sys/dev/e1000/e1000_80003es2lan.c

834

e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);

sys/dev/e1000/e1000_80003es2lan.c

839

E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);

sys/dev/e1000/e1000_80003es2lan.c

842

ret_val = mac->ops.setup_link(hw);

sys/dev/e1000/e1000_80003es2lan.c

848

e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_INBAND_PARAM,

sys/dev/e1000/e1000_80003es2lan.c

852

ret_val = e1000_write_kmrn_reg_80003es2lan(hw,

sys/dev/e1000/e1000_80003es2lan.c

861

reg_data = E1000_READ_REG(hw, E1000_TXDCTL(0));

sys/dev/e1000/e1000_80003es2lan.c

864

E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg_data);

sys/dev/e1000/e1000_80003es2lan.c

867

reg_data = E1000_READ_REG(hw, E1000_TXDCTL(1));

sys/dev/e1000/e1000_80003es2lan.c

87

static s32 e1000_init_phy_params_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

870

E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg_data);

sys/dev/e1000/e1000_80003es2lan.c

873

reg_data = E1000_READ_REG(hw, E1000_TCTL);

sys/dev/e1000/e1000_80003es2lan.c

875

E1000_WRITE_REG(hw, E1000_TCTL, reg_data);

sys/dev/e1000/e1000_80003es2lan.c

878

reg_data = E1000_READ_REG(hw, E1000_TCTL_EXT);

sys/dev/e1000/e1000_80003es2lan.c

881

E1000_WRITE_REG(hw, E1000_TCTL_EXT, reg_data);

sys/dev/e1000/e1000_80003es2lan.c

884

reg_data = E1000_READ_REG(hw, E1000_TIPG);

sys/dev/e1000/e1000_80003es2lan.c

887

E1000_WRITE_REG(hw, E1000_TIPG, reg_data);

sys/dev/e1000/e1000_80003es2lan.c

889

reg_data = E1000_READ_REG_ARRAY(hw, E1000_FFLT, 0x0001);

sys/dev/e1000/e1000_80003es2lan.c

89

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_80003es2lan.c

891

E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data);

sys/dev/e1000/e1000_80003es2lan.c

894

hw->dev_spec._80003es2lan.mdic_wa_enable = true;

sys/dev/e1000/e1000_80003es2lan.c

897

e1000_read_kmrn_reg_80003es2lan(hw, E1000_KMRNCTRLSTA_OFFSET >>

sys/dev/e1000/e1000_80003es2lan.c

902

hw->dev_spec._80003es2lan.mdic_wa_enable = false;

sys/dev/e1000/e1000_80003es2lan.c

910

e1000_clear_hw_cntrs_80003es2lan(hw);

sys/dev/e1000/e1000_80003es2lan.c

921

static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

928

reg = E1000_READ_REG(hw, E1000_TXDCTL(0));

sys/dev/e1000/e1000_80003es2lan.c

930

E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg);

sys/dev/e1000/e1000_80003es2lan.c

933

reg = E1000_READ_REG(hw, E1000_TXDCTL(1));

sys/dev/e1000/e1000_80003es2lan.c

935

E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg);

sys/dev/e1000/e1000_80003es2lan.c

938

reg = E1000_READ_REG(hw, E1000_TARC(0));

sys/dev/e1000/e1000_80003es2lan.c

94

if (hw->phy.media_type != e1000_media_type_copper) {

sys/dev/e1000/e1000_80003es2lan.c

940

if (hw->phy.media_type != e1000_media_type_copper)

sys/dev/e1000/e1000_80003es2lan.c

942

E1000_WRITE_REG(hw, E1000_TARC(0), reg);

sys/dev/e1000/e1000_80003es2lan.c

945

reg = E1000_READ_REG(hw, E1000_TARC(1));

sys/dev/e1000/e1000_80003es2lan.c

946

if (E1000_READ_REG(hw, E1000_TCTL) & E1000_TCTL_MULR)

sys/dev/e1000/e1000_80003es2lan.c

950

E1000_WRITE_REG(hw, E1000_TARC(1), reg);

sys/dev/e1000/e1000_80003es2lan.c

955

reg = E1000_READ_REG(hw, E1000_RFCTL);

sys/dev/e1000/e1000_80003es2lan.c

957

E1000_WRITE_REG(hw, E1000_RFCTL, reg);

sys/dev/e1000/e1000_80003es2lan.c

968

static s32 e1000_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_80003es2lan.c

970

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_80003es2lan.c

977

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, &data);

sys/dev/e1000/e1000_80003es2lan.c

985

ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, data);

sys/dev/e1000/e1000_80003es2lan.c

996

ret_val = hw->phy.ops.read_reg(hw, GG82563_PHY_SPEC_CTRL, &data);

sys/dev/e1000/e1000_82540.c

117

static s32 e1000_init_nvm_params_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

119

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_82540.c

120

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_82540.c

158

static s32 e1000_init_mac_params_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

160

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82540.c

166

switch (hw->device_id) {

sys/dev/e1000/e1000_82540.c

171

hw->phy.media_type = e1000_media_type_fiber;

sys/dev/e1000/e1000_82540.c

175

hw->phy.media_type = e1000_media_type_internal_serdes;

sys/dev/e1000/e1000_82540.c

178

hw->phy.media_type = e1000_media_type_copper;

sys/dev/e1000/e1000_82540.c

201

(hw->phy.media_type == e1000_media_type_copper)

sys/dev/e1000/e1000_82540.c

205

switch (hw->phy.media_type) {

sys/dev/e1000/e1000_82540.c

222

(hw->phy.media_type == e1000_media_type_copper)

sys/dev/e1000/e1000_82540.c

255

void e1000_init_function_pointers_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

259

hw->mac.ops.init_params = e1000_init_mac_params_82540;

sys/dev/e1000/e1000_82540.c

260

hw->nvm.ops.init_params = e1000_init_nvm_params_82540;

sys/dev/e1000/e1000_82540.c

261

hw->phy.ops.init_params = e1000_init_phy_params_82540;

sys/dev/e1000/e1000_82540.c

270

static s32 e1000_reset_hw_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

278

E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);

sys/dev/e1000/e1000_82540.c

280

E1000_WRITE_REG(hw, E1000_RCTL, 0);

sys/dev/e1000/e1000_82540.c

281

E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);

sys/dev/e1000/e1000_82540.c

282

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82540.c

290

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82540.c

293

switch (hw->mac.type) {

sys/dev/e1000/e1000_82540.c

296

E1000_WRITE_REG(hw, E1000_CTRL_DUP, ctrl | E1000_CTRL_RST);

sys/dev/e1000/e1000_82540.c

304

E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);

sys/dev/e1000/e1000_82540.c

312

manc = E1000_READ_REG(hw, E1000_MANC);

sys/dev/e1000/e1000_82540.c

314

E1000_WRITE_REG(hw, E1000_MANC, manc);

sys/dev/e1000/e1000_82540.c

316

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_82540.c

317

E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/e1000_82540.c

328

static s32 e1000_init_hw_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

330

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82540.c

338

ret_val = mac->ops.id_led_init(hw);

sys/dev/e1000/e1000_82540.c

347

E1000_WRITE_REG(hw, E1000_VET, 0);

sys/dev/e1000/e1000_82540.c

349

mac->ops.clear_vfta(hw);

sys/dev/e1000/e1000_82540.c

352

e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);

sys/dev/e1000/e1000_82540.c

357

E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);

sys/dev/e1000/e1000_82540.c

366

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82540.c

370

e1000_pcix_mmrbc_workaround_generic(hw);

sys/dev/e1000/e1000_82540.c

373

ret_val = mac->ops.setup_link(hw);

sys/dev/e1000/e1000_82540.c

375

txdctl = E1000_READ_REG(hw, E1000_TXDCTL(0));

sys/dev/e1000/e1000_82540.c

378

E1000_WRITE_REG(hw, E1000_TXDCTL(0), txdctl);

sys/dev/e1000/e1000_82540.c

386

e1000_clear_hw_cntrs_82540(hw);

sys/dev/e1000/e1000_82540.c

388

if ((hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER) ||

sys/dev/e1000/e1000_82540.c

389

(hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3)) {

sys/dev/e1000/e1000_82540.c

390

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82540.c

396

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_82540.c

411

static s32 e1000_setup_copper_link_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

419

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82540.c

422

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82540.c

424

ret_val = e1000_set_phy_mode_82540(hw);

sys/dev/e1000/e1000_82540.c

428

if (hw->mac.type == e1000_82545_rev_3 ||

sys/dev/e1000/e1000_82540.c

429

hw->mac.type == e1000_82546_rev_3) {

sys/dev/e1000/e1000_82540.c

430

ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL,

sys/dev/e1000/e1000_82540.c

435

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL,

sys/dev/e1000/e1000_82540.c

441

ret_val = e1000_copper_link_setup_m88(hw);

sys/dev/e1000/e1000_82540.c

445

ret_val = e1000_setup_copper_link_generic(hw);

sys/dev/e1000/e1000_82540.c

460

static s32 e1000_setup_fiber_serdes_link_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

462

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82540.c

470

if (hw->phy.media_type == e1000_media_type_internal_serdes) {

sys/dev/e1000/e1000_82540.c

475

ret_val = e1000_adjust_serdes_amplitude_82540(hw);

sys/dev/e1000/e1000_82540.c

48

static s32 e1000_init_phy_params_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

480

ret_val = e1000_set_vco_speed_82540(hw);

sys/dev/e1000/e1000_82540.c

487

ret_val = e1000_setup_fiber_serdes_link_generic(hw);

sys/dev/e1000/e1000_82540.c

49

static s32 e1000_init_nvm_params_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

499

static s32 e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

50

static s32 e1000_init_mac_params_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

506

ret_val = hw->nvm.ops.read(hw, NVM_SERDES_AMPLITUDE, 1, &nvm_data);

sys/dev/e1000/e1000_82540.c

51

static s32 e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

513

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_EXT_CTRL,

sys/dev/e1000/e1000_82540.c

52

static void e1000_clear_hw_cntrs_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

529

static s32 e1000_set_vco_speed_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

53

static s32 e1000_init_hw_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

539

ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_PAGE_SELECT,

sys/dev/e1000/e1000_82540.c

54

static s32 e1000_reset_hw_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

544

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005);

sys/dev/e1000/e1000_82540.c

548

ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);

sys/dev/e1000/e1000_82540.c

55

static s32 e1000_set_phy_mode_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

553

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);

sys/dev/e1000/e1000_82540.c

559

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0004);

sys/dev/e1000/e1000_82540.c

56

static s32 e1000_set_vco_speed_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

563

ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);

sys/dev/e1000/e1000_82540.c

568

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);

sys/dev/e1000/e1000_82540.c

57

static s32 e1000_setup_copper_link_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

572

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,

sys/dev/e1000/e1000_82540.c

58

static s32 e1000_setup_fiber_serdes_link_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

588

static s32 e1000_set_phy_mode_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

59

static void e1000_power_down_phy_copper_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

595

if (hw->mac.type != e1000_82545_rev_3)

sys/dev/e1000/e1000_82540.c

598

ret_val = hw->nvm.ops.read(hw, NVM_PHY_CLASS_WORD, 1, &nvm_data);

sys/dev/e1000/e1000_82540.c

60

static s32 e1000_read_mac_addr_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_82540.c

605

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,

sys/dev/e1000/e1000_82540.c

611

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL,

sys/dev/e1000/e1000_82540.c

631

static void e1000_power_down_phy_copper_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

634

if (!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_SMBUS_EN))

sys/dev/e1000/e1000_82540.c

635

e1000_power_down_phy_copper(hw);

sys/dev/e1000/e1000_82540.c

646

static void e1000_clear_hw_cntrs_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

650

e1000_clear_hw_cntrs_base_generic(hw);

sys/dev/e1000/e1000_82540.c

652

E1000_READ_REG(hw, E1000_PRC64);

sys/dev/e1000/e1000_82540.c

653

E1000_READ_REG(hw, E1000_PRC127);

sys/dev/e1000/e1000_82540.c

654

E1000_READ_REG(hw, E1000_PRC255);

sys/dev/e1000/e1000_82540.c

655

E1000_READ_REG(hw, E1000_PRC511);

sys/dev/e1000/e1000_82540.c

656

E1000_READ_REG(hw, E1000_PRC1023);

sys/dev/e1000/e1000_82540.c

657

E1000_READ_REG(hw, E1000_PRC1522);

sys/dev/e1000/e1000_82540.c

658

E1000_READ_REG(hw, E1000_PTC64);

sys/dev/e1000/e1000_82540.c

659

E1000_READ_REG(hw, E1000_PTC127);

sys/dev/e1000/e1000_82540.c

66

static s32 e1000_init_phy_params_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

660

E1000_READ_REG(hw, E1000_PTC255);

sys/dev/e1000/e1000_82540.c

661

E1000_READ_REG(hw, E1000_PTC511);

sys/dev/e1000/e1000_82540.c

662

E1000_READ_REG(hw, E1000_PTC1023);

sys/dev/e1000/e1000_82540.c

663

E1000_READ_REG(hw, E1000_PTC1522);

sys/dev/e1000/e1000_82540.c

665

E1000_READ_REG(hw, E1000_ALGNERRC);

sys/dev/e1000/e1000_82540.c

666

E1000_READ_REG(hw, E1000_RXERRC);

sys/dev/e1000/e1000_82540.c

667

E1000_READ_REG(hw, E1000_TNCRS);

sys/dev/e1000/e1000_82540.c

668

E1000_READ_REG(hw, E1000_CEXTERR);

sys/dev/e1000/e1000_82540.c

669

E1000_READ_REG(hw, E1000_TSCTC);

sys/dev/e1000/e1000_82540.c

670

E1000_READ_REG(hw, E1000_TSCTFC);

sys/dev/e1000/e1000_82540.c

672

E1000_READ_REG(hw, E1000_MGTPRC);

sys/dev/e1000/e1000_82540.c

673

E1000_READ_REG(hw, E1000_MGTPDC);

sys/dev/e1000/e1000_82540.c

674

E1000_READ_REG(hw, E1000_MGTPTC);

sys/dev/e1000/e1000_82540.c

68

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82540.c

691

s32 e1000_read_mac_addr_82540(struct e1000_hw *hw)

sys/dev/e1000/e1000_82540.c

700

ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);

sys/dev/e1000/e1000_82540.c

705

hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF);

sys/dev/e1000/e1000_82540.c

706

hw->mac.perm_addr[i+1] = (u8)(nvm_data >> 8);

sys/dev/e1000/e1000_82540.c

710

if (hw->bus.func == E1000_FUNC_1)

sys/dev/e1000/e1000_82540.c

711

hw->mac.perm_addr[5] ^= 1;

sys/dev/e1000/e1000_82540.c

714

hw->mac.addr[i] = hw->mac.perm_addr[i];

sys/dev/e1000/e1000_82540.c

89

ret_val = e1000_get_phy_id(hw);

sys/dev/e1000/e1000_82540.c

94

switch (hw->mac.type) {

sys/dev/e1000/e1000_82541.c

1000

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_82541.c

1010

ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data);

sys/dev/e1000/e1000_82541.c

1015

ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,

sys/dev/e1000/e1000_82541.c

1021

ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,

sys/dev/e1000/e1000_82541.c

1036

static s32 e1000_setup_led_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

1038

struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;

sys/dev/e1000/e1000_82541.c

1043

ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO,

sys/dev/e1000/e1000_82541.c

1048

ret_val = hw->phy.ops.write_reg(hw, IGP01E1000_GMII_FIFO,

sys/dev/e1000/e1000_82541.c

1054

E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1);

sys/dev/e1000/e1000_82541.c

1067

static s32 e1000_cleanup_led_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

1069

struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;

sys/dev/e1000/e1000_82541.c

1074

ret_val = hw->phy.ops.write_reg(hw, IGP01E1000_GMII_FIFO,

sys/dev/e1000/e1000_82541.c

1079

E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default);

sys/dev/e1000/e1000_82541.c

1091

static s32 e1000_phy_init_script_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

1093

struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;

sys/dev/e1000/e1000_82541.c

110

ret_val = e1000_get_phy_id(hw);

sys/dev/e1000/e1000_82541.c

1111

ret_val = hw->phy.ops.read_reg(hw, 0x2F5B, &phy_saved_data);

sys/dev/e1000/e1000_82541.c

1114

hw->phy.ops.write_reg(hw, 0x2F5B, 0x0003);

sys/dev/e1000/e1000_82541.c

1118

hw->phy.ops.write_reg(hw, 0x0000, 0x0140);

sys/dev/e1000/e1000_82541.c

1122

switch (hw->mac.type) {

sys/dev/e1000/e1000_82541.c

1125

hw->phy.ops.write_reg(hw, 0x1F95, 0x0001);

sys/dev/e1000/e1000_82541.c

1127

hw->phy.ops.write_reg(hw, 0x1F71, 0xBD21);

sys/dev/e1000/e1000_82541.c

1129

hw->phy.ops.write_reg(hw, 0x1F79, 0x0018);

sys/dev/e1000/e1000_82541.c

1131

hw->phy.ops.write_reg(hw, 0x1F30, 0x1600);

sys/dev/e1000/e1000_82541.c

1133

hw->phy.ops.write_reg(hw, 0x1F31, 0x0014);

sys/dev/e1000/e1000_82541.c

1135

hw->phy.ops.write_reg(hw, 0x1F32, 0x161C);

sys/dev/e1000/e1000_82541.c

1137

hw->phy.ops.write_reg(hw, 0x1F94, 0x0003);

sys/dev/e1000/e1000_82541.c

1139

hw->phy.ops.write_reg(hw, 0x1F96, 0x003F);

sys/dev/e1000/e1000_82541.c

1141

hw->phy.ops.write_reg(hw, 0x2010, 0x0008);

sys/dev/e1000/e1000_82541.c

1145

hw->phy.ops.write_reg(hw, 0x1F73, 0x0099);

sys/dev/e1000/e1000_82541.c

1151

hw->phy.ops.write_reg(hw, 0x0000, 0x3300);

sys/dev/e1000/e1000_82541.c

1156

hw->phy.ops.write_reg(hw, 0x2F5B, phy_saved_data);

sys/dev/e1000/e1000_82541.c

1158

if (hw->mac.type == e1000_82547) {

sys/dev/e1000/e1000_82541.c

1162

hw->phy.ops.read_reg(hw, IGP01E1000_ANALOG_SPARE_FUSE_STATUS,

sys/dev/e1000/e1000_82541.c

1166

hw->phy.ops.read_reg(hw, IGP01E1000_ANALOG_FUSE_STATUS,

sys/dev/e1000/e1000_82541.c

1183

hw->phy.ops.write_reg(hw,

sys/dev/e1000/e1000_82541.c

1186

hw->phy.ops.write_reg(hw,

sys/dev/e1000/e1000_82541.c

1204

void e1000_init_script_state_82541(struct e1000_hw *hw, bool state)

sys/dev/e1000/e1000_82541.c

1206

struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;

sys/dev/e1000/e1000_82541.c

1210

if (hw->phy.type != e1000_phy_igp) {

sys/dev/e1000/e1000_82541.c

1228

static void e1000_power_down_phy_copper_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

1231

if (!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_SMBUS_EN))

sys/dev/e1000/e1000_82541.c

1232

e1000_power_down_phy_copper(hw);

sys/dev/e1000/e1000_82541.c

1243

static void e1000_clear_hw_cntrs_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

1247

e1000_clear_hw_cntrs_base_generic(hw);

sys/dev/e1000/e1000_82541.c

1249

E1000_READ_REG(hw, E1000_PRC64);

sys/dev/e1000/e1000_82541.c

1250

E1000_READ_REG(hw, E1000_PRC127);

sys/dev/e1000/e1000_82541.c

1251

E1000_READ_REG(hw, E1000_PRC255);

sys/dev/e1000/e1000_82541.c

1252

E1000_READ_REG(hw, E1000_PRC511);

sys/dev/e1000/e1000_82541.c

1253

E1000_READ_REG(hw, E1000_PRC1023);

sys/dev/e1000/e1000_82541.c

1254

E1000_READ_REG(hw, E1000_PRC1522);

sys/dev/e1000/e1000_82541.c

1255

E1000_READ_REG(hw, E1000_PTC64);

sys/dev/e1000/e1000_82541.c

1256

E1000_READ_REG(hw, E1000_PTC127);

sys/dev/e1000/e1000_82541.c

1257

E1000_READ_REG(hw, E1000_PTC255);

sys/dev/e1000/e1000_82541.c

1258

E1000_READ_REG(hw, E1000_PTC511);

sys/dev/e1000/e1000_82541.c

1259

E1000_READ_REG(hw, E1000_PTC1023);

sys/dev/e1000/e1000_82541.c

1260

E1000_READ_REG(hw, E1000_PTC1522);

sys/dev/e1000/e1000_82541.c

1262

E1000_READ_REG(hw, E1000_ALGNERRC);

sys/dev/e1000/e1000_82541.c

1263

E1000_READ_REG(hw, E1000_RXERRC);

sys/dev/e1000/e1000_82541.c

1264

E1000_READ_REG(hw, E1000_TNCRS);

sys/dev/e1000/e1000_82541.c

1265

E1000_READ_REG(hw, E1000_CEXTERR);

sys/dev/e1000/e1000_82541.c

1266

E1000_READ_REG(hw, E1000_TSCTC);

sys/dev/e1000/e1000_82541.c

1267

E1000_READ_REG(hw, E1000_TSCTFC);

sys/dev/e1000/e1000_82541.c

1269

E1000_READ_REG(hw, E1000_MGTPRC);

sys/dev/e1000/e1000_82541.c

1270

E1000_READ_REG(hw, E1000_MGTPDC);

sys/dev/e1000/e1000_82541.c

1271

E1000_READ_REG(hw, E1000_MGTPTC);

sys/dev/e1000/e1000_82541.c

128

static s32 e1000_init_nvm_params_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

1280

static s32 e1000_read_mac_addr_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

1289

ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);

sys/dev/e1000/e1000_82541.c

1294

hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF);

sys/dev/e1000/e1000_82541.c

1295

hw->mac.perm_addr[i+1] = (u8)(nvm_data >> 8);

sys/dev/e1000/e1000_82541.c

1299

hw->mac.addr[i] = hw->mac.perm_addr[i];

sys/dev/e1000/e1000_82541.c

130

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_82541.c

132

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_82541.c

182

ret_val = nvm->ops.read(hw, NVM_CFG, 1, &size);

sys/dev/e1000/e1000_82541.c

219

static s32 e1000_init_mac_params_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

221

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82541.c

226

hw->phy.media_type = e1000_media_type_copper;

sys/dev/e1000/e1000_82541.c

281

void e1000_init_function_pointers_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

285

hw->mac.ops.init_params = e1000_init_mac_params_82541;

sys/dev/e1000/e1000_82541.c

286

hw->nvm.ops.init_params = e1000_init_nvm_params_82541;

sys/dev/e1000/e1000_82541.c

287

hw->phy.ops.init_params = e1000_init_phy_params_82541;

sys/dev/e1000/e1000_82541.c

296

static s32 e1000_reset_hw_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

303

E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);

sys/dev/e1000/e1000_82541.c

305

E1000_WRITE_REG(hw, E1000_RCTL, 0);

sys/dev/e1000/e1000_82541.c

306

E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);

sys/dev/e1000/e1000_82541.c

307

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82541.c

315

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82541.c

318

if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {

sys/dev/e1000/e1000_82541.c

319

E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_PHY_RST));

sys/dev/e1000/e1000_82541.c

320

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82541.c

325

switch (hw->mac.type) {

sys/dev/e1000/e1000_82541.c

333

E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);

sys/dev/e1000/e1000_82541.c

336

E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);

sys/dev/e1000/e1000_82541.c

344

manc = E1000_READ_REG(hw, E1000_MANC);

sys/dev/e1000/e1000_82541.c

346

E1000_WRITE_REG(hw, E1000_MANC, manc);

sys/dev/e1000/e1000_82541.c

348

if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {

sys/dev/e1000/e1000_82541.c

349

e1000_phy_init_script_82541(hw);

sys/dev/e1000/e1000_82541.c

352

ledctl = E1000_READ_REG(hw, E1000_LEDCTL);

sys/dev/e1000/e1000_82541.c

355

E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);

sys/dev/e1000/e1000_82541.c

360

E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);

sys/dev/e1000/e1000_82541.c

363

E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/e1000_82541.c

374

static s32 e1000_init_hw_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

376

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82541.c

377

struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;

sys/dev/e1000/e1000_82541.c

384

ret_val = mac->ops.id_led_init(hw);

sys/dev/e1000/e1000_82541.c

391

ret_val = hw->phy.ops.read_reg(hw, IGP01E1000_GMII_FIFO,

sys/dev/e1000/e1000_82541.c

398

mac->ops.clear_vfta(hw);

sys/dev/e1000/e1000_82541.c

401

e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);

sys/dev/e1000/e1000_82541.c

406

E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);

sys/dev/e1000/e1000_82541.c

413

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82541.c

417

ret_val = mac->ops.setup_link(hw);

sys/dev/e1000/e1000_82541.c

419

txdctl = E1000_READ_REG(hw, E1000_TXDCTL(0));

sys/dev/e1000/e1000_82541.c

422

E1000_WRITE_REG(hw, E1000_TXDCTL(0), txdctl);

sys/dev/e1000/e1000_82541.c

430

e1000_clear_hw_cntrs_82541(hw);

sys/dev/e1000/e1000_82541.c

444

static s32 e1000_get_link_up_info_82541(struct e1000_hw *hw, u16 *speed,

sys/dev/e1000/e1000_82541.c

447

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82541.c

453

ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed, duplex);

sys/dev/e1000/e1000_82541.c

46

static s32 e1000_init_phy_params_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

466

ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_EXP, &data);

sys/dev/e1000/e1000_82541.c

47

static s32 e1000_init_nvm_params_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

473

ret_val = phy->ops.read_reg(hw, PHY_LP_ABILITY, &data);

sys/dev/e1000/e1000_82541.c

48

static s32 e1000_init_mac_params_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

49

static s32 e1000_reset_hw_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

499

static s32 e1000_phy_hw_reset_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

50

static s32 e1000_init_hw_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

506

ret_val = e1000_phy_hw_reset_generic(hw);

sys/dev/e1000/e1000_82541.c

51

static s32 e1000_get_link_up_info_82541(struct e1000_hw *hw, u16 *speed,

sys/dev/e1000/e1000_82541.c

510

e1000_phy_init_script_82541(hw);

sys/dev/e1000/e1000_82541.c

512

if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {

sys/dev/e1000/e1000_82541.c

514

ledctl = E1000_READ_REG(hw, E1000_LEDCTL);

sys/dev/e1000/e1000_82541.c

517

E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);

sys/dev/e1000/e1000_82541.c

53

static s32 e1000_phy_hw_reset_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

533

static s32 e1000_setup_copper_link_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

535

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82541.c

536

struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;

sys/dev/e1000/e1000_82541.c

54

static s32 e1000_setup_copper_link_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

542

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82541.c

545

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82541.c

549

if (hw->mac.type == e1000_82541 || hw->mac.type == e1000_82547) {

sys/dev/e1000/e1000_82541.c

55

static s32 e1000_check_for_link_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

556

ret_val = e1000_copper_link_setup_igp(hw);

sys/dev/e1000/e1000_82541.c

56

static s32 e1000_get_cable_length_igp_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

560

if (hw->mac.autoneg) {

sys/dev/e1000/e1000_82541.c

566

ledctl = E1000_READ_REG(hw, E1000_LEDCTL);

sys/dev/e1000/e1000_82541.c

569

E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);

sys/dev/e1000/e1000_82541.c

57

static s32 e1000_set_d3_lplu_state_82541(struct e1000_hw *hw,

sys/dev/e1000/e1000_82541.c

571

ret_val = e1000_setup_copper_link_generic(hw);

sys/dev/e1000/e1000_82541.c

584

static s32 e1000_check_for_link_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

586

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82541.c

59

static s32 e1000_setup_led_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

60

static s32 e1000_cleanup_led_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

608

ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/e1000/e1000_82541.c

61

static void e1000_clear_hw_cntrs_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

613

ret_val = e1000_config_dsp_after_link_change_82541(hw, false);

sys/dev/e1000/e1000_82541.c

62

static s32 e1000_read_mac_addr_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

623

e1000_check_downshift_generic(hw);

sys/dev/e1000/e1000_82541.c

63

static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,

sys/dev/e1000/e1000_82541.c

634

ret_val = e1000_config_dsp_after_link_change_82541(hw, true);

sys/dev/e1000/e1000_82541.c

641

mac->ops.config_collision_dist(hw);

sys/dev/e1000/e1000_82541.c

649

ret_val = e1000_config_fc_after_link_up_generic(hw);

sys/dev/e1000/e1000_82541.c

65

static s32 e1000_phy_init_script_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

66

static void e1000_power_down_phy_copper_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_82541.c

668

static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,

sys/dev/e1000/e1000_82541.c

671

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82541.c

672

struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;

sys/dev/e1000/e1000_82541.c

686

ret_val = hw->mac.ops.get_link_up_info(hw, &speed, &duplex);

sys/dev/e1000/e1000_82541.c

697

ret_val = phy->ops.get_cable_length(hw);

sys/dev/e1000/e1000_82541.c

705

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_82541.c

713

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_82541.c

729

ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);

sys/dev/e1000/e1000_82541.c

735

ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS,

sys/dev/e1000/e1000_82541.c

744

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_82541.c

762

ret_val = phy->ops.read_reg(hw, 0x2F5B,

sys/dev/e1000/e1000_82541.c

768

ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);

sys/dev/e1000/e1000_82541.c

774

ret_val = phy->ops.write_reg(hw, 0x0000,

sys/dev/e1000/e1000_82541.c

779

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_82541.c

788

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_82541.c

795

ret_val = phy->ops.write_reg(hw, 0x0000,

sys/dev/e1000/e1000_82541.c

803

ret_val = phy->ops.write_reg(hw, 0x2F5B,

sys/dev/e1000/e1000_82541.c

820

ret_val = phy->ops.read_reg(hw, 0x2F5B, &phy_saved_data);

sys/dev/e1000/e1000_82541.c

825

ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);

sys/dev/e1000/e1000_82541.c

831

ret_val = phy->ops.write_reg(hw, 0x0000,

sys/dev/e1000/e1000_82541.c

836

ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_DSP_FFE,

sys/dev/e1000/e1000_82541.c

841

ret_val = phy->ops.write_reg(hw, 0x0000,

sys/dev/e1000/e1000_82541.c

849

ret_val = phy->ops.write_reg(hw, 0x2F5B, phy_saved_data);

sys/dev/e1000/e1000_82541.c

85

static s32 e1000_init_phy_params_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

87

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82541.c

872

static s32 e1000_get_cable_length_igp_82541(struct e1000_hw *hw)

sys/dev/e1000/e1000_82541.c

874

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82541.c

888

ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &data);

sys/dev/e1000/e1000_82541.c

945

static s32 e1000_set_d3_lplu_state_82541(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_82541.c

947

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82541.c

953

switch (hw->mac.type) {

sys/dev/e1000/e1000_82541.c

958

ret_val = e1000_set_d3_lplu_state_generic(hw, active);

sys/dev/e1000/e1000_82541.c

963

ret_val = phy->ops.read_reg(hw, IGP01E1000_GMII_FIFO, &data);

sys/dev/e1000/e1000_82541.c

969

ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data);

sys/dev/e1000/e1000_82541.c

980

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_82541.c

987

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_82541.c

993

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_82541.h

91

void e1000_init_script_state_82541(struct e1000_hw *hw, bool state);

sys/dev/e1000/e1000_82542.c

100

static s32 e1000_init_mac_params_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

102

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82542.c

107

hw->phy.media_type = e1000_media_type_fiber;

sys/dev/e1000/e1000_82542.c

159

void e1000_init_function_pointers_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

163

hw->mac.ops.init_params = e1000_init_mac_params_82542;

sys/dev/e1000/e1000_82542.c

164

hw->nvm.ops.init_params = e1000_init_nvm_params_82542;

sys/dev/e1000/e1000_82542.c

165

hw->phy.ops.init_params = e1000_init_phy_params_82542;

sys/dev/e1000/e1000_82542.c

175

static s32 e1000_get_bus_info_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

179

hw->bus.type = e1000_bus_type_pci;

sys/dev/e1000/e1000_82542.c

180

hw->bus.speed = e1000_bus_speed_unknown;

sys/dev/e1000/e1000_82542.c

181

hw->bus.width = e1000_bus_width_unknown;

sys/dev/e1000/e1000_82542.c

192

static s32 e1000_reset_hw_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

194

struct e1000_bus_info *bus = &hw->bus;

sys/dev/e1000/e1000_82542.c

200

if (hw->revision_id == E1000_REVISION_2) {

sys/dev/e1000/e1000_82542.c

202

e1000_pci_clear_mwi(hw);

sys/dev/e1000/e1000_82542.c

206

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_82542.c

208

E1000_WRITE_REG(hw, E1000_RCTL, 0);

sys/dev/e1000/e1000_82542.c

209

E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);

sys/dev/e1000/e1000_82542.c

210

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82542.c

218

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82542.c

221

E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);

sys/dev/e1000/e1000_82542.c

223

hw->nvm.ops.reload(hw);

sys/dev/e1000/e1000_82542.c

226

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_82542.c

227

E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/e1000_82542.c

229

if (hw->revision_id == E1000_REVISION_2) {

sys/dev/e1000/e1000_82542.c

231

e1000_pci_set_mwi(hw);

sys/dev/e1000/e1000_82542.c

243

static s32 e1000_init_hw_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

245

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82542.c

246

struct e1000_dev_spec_82542 *dev_spec = &hw->dev_spec._82542;

sys/dev/e1000/e1000_82542.c

254

E1000_WRITE_REG(hw, E1000_VET, 0);

sys/dev/e1000/e1000_82542.c

255

mac->ops.clear_vfta(hw);

sys/dev/e1000/e1000_82542.c

258

if (hw->revision_id == E1000_REVISION_2) {

sys/dev/e1000/e1000_82542.c

260

e1000_pci_clear_mwi(hw);

sys/dev/e1000/e1000_82542.c

261

E1000_WRITE_REG(hw, E1000_RCTL, E1000_RCTL_RST);

sys/dev/e1000/e1000_82542.c

262

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82542.c

267

e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);

sys/dev/e1000/e1000_82542.c

270

if (hw->revision_id == E1000_REVISION_2) {

sys/dev/e1000/e1000_82542.c

271

E1000_WRITE_REG(hw, E1000_RCTL, 0);

sys/dev/e1000/e1000_82542.c

272

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82542.c

274

if (hw->bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)

sys/dev/e1000/e1000_82542.c

275

e1000_pci_set_mwi(hw);

sys/dev/e1000/e1000_82542.c

281

E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);

sys/dev/e1000/e1000_82542.c

289

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82542.c

290

E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PRIOR);

sys/dev/e1000/e1000_82542.c

294

ret_val = e1000_setup_link_82542(hw);

sys/dev/e1000/e1000_82542.c

302

e1000_clear_hw_cntrs_82542(hw);

sys/dev/e1000/e1000_82542.c

317

static s32 e1000_setup_link_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

319

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82542.c

324

ret_val = e1000_set_default_fc_generic(hw);

sys/dev/e1000/e1000_82542.c

328

hw->fc.requested_mode &= ~e1000_fc_tx_pause;

sys/dev/e1000/e1000_82542.c

331

hw->fc.requested_mode &= ~e1000_fc_rx_pause;

sys/dev/e1000/e1000_82542.c

337

hw->fc.current_mode = hw->fc.requested_mode;

sys/dev/e1000/e1000_82542.c

340

hw->fc.current_mode);

sys/dev/e1000/e1000_82542.c

343

ret_val = mac->ops.setup_physical_interface(hw);

sys/dev/e1000/e1000_82542.c

355

E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW);

sys/dev/e1000/e1000_82542.c

356

E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH);

sys/dev/e1000/e1000_82542.c

357

E1000_WRITE_REG(hw, E1000_FCT, FLOW_CONTROL_TYPE);

sys/dev/e1000/e1000_82542.c

359

E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time);

sys/dev/e1000/e1000_82542.c

361

ret_val = e1000_set_fc_watermarks_generic(hw);

sys/dev/e1000/e1000_82542.c

373

static s32 e1000_led_on_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

375

u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82542.c

381

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82542.c

392

static s32 e1000_led_off_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

394

u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82542.c

400

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82542.c

41

static s32 e1000_init_phy_params_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_82542.c

414

static int e1000_rar_set_82542(struct e1000_hw *hw, u8 *addr, u32 index)

sys/dev/e1000/e1000_82542.c

42

static s32 e1000_init_nvm_params_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_82542.c

43

static s32 e1000_init_mac_params_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_82542.c

433

E1000_WRITE_REG_ARRAY(hw, E1000_RA, (index << 1), rar_low);

sys/dev/e1000/e1000_82542.c

434

E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((index << 1) + 1), rar_high);

sys/dev/e1000/e1000_82542.c

44

static s32 e1000_get_bus_info_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_82542.c

45

static s32 e1000_reset_hw_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_82542.c

46

static s32 e1000_init_hw_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_82542.c

47

static s32 e1000_setup_link_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_82542.c

48

static s32 e1000_led_on_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_82542.c

49

static s32 e1000_led_off_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_82542.c

50

static int e1000_rar_set_82542(struct e1000_hw *hw, u8 *addr, u32 index);

sys/dev/e1000/e1000_82542.c

51

static void e1000_clear_hw_cntrs_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_82542.c

52

static s32 e1000_read_mac_addr_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_82542.c

542

static void e1000_clear_hw_cntrs_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

546

e1000_clear_hw_cntrs_base_generic(hw);

sys/dev/e1000/e1000_82542.c

548

E1000_READ_REG(hw, E1000_PRC64);

sys/dev/e1000/e1000_82542.c

549

E1000_READ_REG(hw, E1000_PRC127);

sys/dev/e1000/e1000_82542.c

550

E1000_READ_REG(hw, E1000_PRC255);

sys/dev/e1000/e1000_82542.c

551

E1000_READ_REG(hw, E1000_PRC511);

sys/dev/e1000/e1000_82542.c

552

E1000_READ_REG(hw, E1000_PRC1023);

sys/dev/e1000/e1000_82542.c

553

E1000_READ_REG(hw, E1000_PRC1522);

sys/dev/e1000/e1000_82542.c

554

E1000_READ_REG(hw, E1000_PTC64);

sys/dev/e1000/e1000_82542.c

555

E1000_READ_REG(hw, E1000_PTC127);

sys/dev/e1000/e1000_82542.c

556

E1000_READ_REG(hw, E1000_PTC255);

sys/dev/e1000/e1000_82542.c

557

E1000_READ_REG(hw, E1000_PTC511);

sys/dev/e1000/e1000_82542.c

558

E1000_READ_REG(hw, E1000_PTC1023);

sys/dev/e1000/e1000_82542.c

559

E1000_READ_REG(hw, E1000_PTC1522);

sys/dev/e1000/e1000_82542.c

568

s32 e1000_read_mac_addr_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

577

ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);

sys/dev/e1000/e1000_82542.c

58

static s32 e1000_init_phy_params_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

582

hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF);

sys/dev/e1000/e1000_82542.c

583

hw->mac.perm_addr[i+1] = (u8)(nvm_data >> 8);

sys/dev/e1000/e1000_82542.c

587

hw->mac.addr[i] = hw->mac.perm_addr[i];

sys/dev/e1000/e1000_82542.c

60

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82542.c

74

static s32 e1000_init_nvm_params_82542(struct e1000_hw *hw)

sys/dev/e1000/e1000_82542.c

76

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_82543.c

1001

e1000_clear_hw_cntrs_82543(hw);

sys/dev/e1000/e1000_82543.c

1019

static s32 e1000_setup_link_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

1034

if (hw->mac.type == e1000_82543) {

sys/dev/e1000/e1000_82543.c

1035

ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data);

sys/dev/e1000/e1000_82543.c

1043

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_82543.c

1046

ret_val = e1000_setup_link_generic(hw);

sys/dev/e1000/e1000_82543.c

1060

static s32 e1000_setup_copper_link_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

1068

ctrl = E1000_READ_REG(hw, E1000_CTRL) | E1000_CTRL_SLU;

sys/dev/e1000/e1000_82543.c

1075

if (hw->mac.type == e1000_82543) {

sys/dev/e1000/e1000_82543.c

1077

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82543.c

1078

ret_val = hw->phy.ops.reset(hw);

sys/dev/e1000/e1000_82543.c

1083

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82543.c

1087

ret_val = e1000_copper_link_setup_m88(hw);

sys/dev/e1000/e1000_82543.c

1091

if (hw->mac.autoneg) {

sys/dev/e1000/e1000_82543.c

1096

ret_val = e1000_copper_link_autoneg(hw);

sys/dev/e1000/e1000_82543.c

110

phy->ops.read_reg = (hw->mac.type == e1000_82543)

sys/dev/e1000/e1000_82543.c

1105

ret_val = e1000_phy_force_speed_duplex_82543(hw);

sys/dev/e1000/e1000_82543.c

1116

ret_val = e1000_phy_has_link_generic(hw, COPPER_LINK_UP_LIMIT, 10,

sys/dev/e1000/e1000_82543.c

1125

if (hw->mac.type == e1000_82544) {

sys/dev/e1000/e1000_82543.c

1126

hw->mac.ops.config_collision_dist(hw);

sys/dev/e1000/e1000_82543.c

1128

ret_val = e1000_config_mac_to_phy_82543(hw);

sys/dev/e1000/e1000_82543.c

113

phy->ops.reset = (hw->mac.type == e1000_82543)

sys/dev/e1000/e1000_82543.c

1132

ret_val = e1000_config_fc_after_link_up_generic(hw);

sys/dev/e1000/e1000_82543.c

1148

static s32 e1000_setup_fiber_link_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

1155

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82543.c

116

phy->ops.write_reg = (hw->mac.type == e1000_82543)

sys/dev/e1000/e1000_82543.c

1160

hw->mac.ops.config_collision_dist(hw);

sys/dev/e1000/e1000_82543.c

1162

ret_val = e1000_commit_fc_settings_generic(hw);

sys/dev/e1000/e1000_82543.c

1168

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82543.c

1169

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82543.c

1177

if (!(E1000_READ_REG(hw, E1000_CTRL) & E1000_CTRL_SWDPIN1))

sys/dev/e1000/e1000_82543.c

1178

ret_val = e1000_poll_fiber_serdes_link_generic(hw);

sys/dev/e1000/e1000_82543.c

1197

static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

1199

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82543.c

1212

ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/e1000/e1000_82543.c

1221

e1000_check_downshift_generic(hw);

sys/dev/e1000/e1000_82543.c

1237

E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);

sys/dev/e1000/e1000_82543.c

1238

ret_val = e1000_polarity_reversal_workaround_82543(hw);

sys/dev/e1000/e1000_82543.c

1239

icr = E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/e1000_82543.c

1240

E1000_WRITE_REG(hw, E1000_ICS, (icr & ~E1000_ICS_LSC));

sys/dev/e1000/e1000_82543.c

1241

E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK);

sys/dev/e1000/e1000_82543.c

1258

hw->mac.ops.config_collision_dist(hw);

sys/dev/e1000/e1000_82543.c

126

if (!e1000_init_phy_disabled_82543(hw)) {

sys/dev/e1000/e1000_82543.c

1260

ret_val = e1000_config_mac_to_phy_82543(hw);

sys/dev/e1000/e1000_82543.c

127

ret_val = phy->ops.reset(hw);

sys/dev/e1000/e1000_82543.c

1273

ret_val = e1000_config_fc_after_link_up_generic(hw);

sys/dev/e1000/e1000_82543.c

1285

if (e1000_tbi_compatibility_enabled_82543(hw)) {

sys/dev/e1000/e1000_82543.c

1286

ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);

sys/dev/e1000/e1000_82543.c

1296

if (e1000_tbi_sbp_enabled_82543(hw)) {

sys/dev/e1000/e1000_82543.c

1301

e1000_set_tbi_sbp_82543(hw, false);

sys/dev/e1000/e1000_82543.c

1302

rctl = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/e1000_82543.c

1304

E1000_WRITE_REG(hw, E1000_RCTL, rctl);

sys/dev/e1000/e1000_82543.c

1314

if (!e1000_tbi_sbp_enabled_82543(hw)) {

sys/dev/e1000/e1000_82543.c

1315

e1000_set_tbi_sbp_82543(hw, true);

sys/dev/e1000/e1000_82543.c

1316

rctl = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/e1000_82543.c

1318

E1000_WRITE_REG(hw, E1000_RCTL, rctl);

sys/dev/e1000/e1000_82543.c

1333

static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

1335

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82543.c

1341

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82543.c

1342

status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_82543.c

1343

rxcw = E1000_READ_REG(hw, E1000_RXCW);

sys/dev/e1000/e1000_82543.c

135

ret_val = e1000_get_phy_id(hw);

sys/dev/e1000/e1000_82543.c

1365

E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE));

sys/dev/e1000/e1000_82543.c

1368

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82543.c

1370

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82543.c

1373

ret_val = e1000_config_fc_after_link_up_generic(hw);

sys/dev/e1000/e1000_82543.c

1386

E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);

sys/dev/e1000/e1000_82543.c

1387

E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));

sys/dev/e1000/e1000_82543.c

140

switch (hw->mac.type) {

sys/dev/e1000/e1000_82543.c

1403

static s32 e1000_config_mac_to_phy_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

1411

if (!(hw->phy.ops.read_reg))

sys/dev/e1000/e1000_82543.c

1415

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82543.c

1423

ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);

sys/dev/e1000/e1000_82543.c

1431

hw->mac.ops.config_collision_dist(hw);

sys/dev/e1000/e1000_82543.c

1442

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82543.c

1457

static void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset, u32 value)

sys/dev/e1000/e1000_82543.c

1463

if ((hw->mac.type == e1000_82544) && (offset & 1)) {

sys/dev/e1000/e1000_82543.c

1464

temp = E1000_READ_REG_ARRAY(hw, E1000_VFTA, offset - 1);

sys/dev/e1000/e1000_82543.c

1465

E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);

sys/dev/e1000/e1000_82543.c

1466

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82543.c

1467

E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset - 1, temp);

sys/dev/e1000/e1000_82543.c

1468

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82543.c

1470

e1000_write_vfta_generic(hw, offset, value);

sys/dev/e1000/e1000_82543.c

1480

static s32 e1000_led_on_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

1482

u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82543.c

1486

if (hw->mac.type == e1000_82544 &&

sys/dev/e1000/e1000_82543.c

1487

hw->phy.media_type == e1000_media_type_copper) {

sys/dev/e1000/e1000_82543.c

1496

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82543.c

1507

static s32 e1000_led_off_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

1509

u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82543.c

1513

if (hw->mac.type == e1000_82544 &&

sys/dev/e1000/e1000_82543.c

1514

hw->phy.media_type == e1000_media_type_copper) {

sys/dev/e1000/e1000_82543.c

1522

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82543.c

1533

static void e1000_clear_hw_cntrs_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

1537

e1000_clear_hw_cntrs_base_generic(hw);

sys/dev/e1000/e1000_82543.c

1539

E1000_READ_REG(hw, E1000_PRC64);

sys/dev/e1000/e1000_82543.c

1540

E1000_READ_REG(hw, E1000_PRC127);

sys/dev/e1000/e1000_82543.c

1541

E1000_READ_REG(hw, E1000_PRC255);

sys/dev/e1000/e1000_82543.c

1542

E1000_READ_REG(hw, E1000_PRC511);

sys/dev/e1000/e1000_82543.c

1543

E1000_READ_REG(hw, E1000_PRC1023);

sys/dev/e1000/e1000_82543.c

1544

E1000_READ_REG(hw, E1000_PRC1522);

sys/dev/e1000/e1000_82543.c

1545

E1000_READ_REG(hw, E1000_PTC64);

sys/dev/e1000/e1000_82543.c

1546

E1000_READ_REG(hw, E1000_PTC127);

sys/dev/e1000/e1000_82543.c

1547

E1000_READ_REG(hw, E1000_PTC255);

sys/dev/e1000/e1000_82543.c

1548

E1000_READ_REG(hw, E1000_PTC511);

sys/dev/e1000/e1000_82543.c

1549

E1000_READ_REG(hw, E1000_PTC1023);

sys/dev/e1000/e1000_82543.c

1550

E1000_READ_REG(hw, E1000_PTC1522);

sys/dev/e1000/e1000_82543.c

1552

E1000_READ_REG(hw, E1000_ALGNERRC);

sys/dev/e1000/e1000_82543.c

1553

E1000_READ_REG(hw, E1000_RXERRC);

sys/dev/e1000/e1000_82543.c

1554

E1000_READ_REG(hw, E1000_TNCRS);

sys/dev/e1000/e1000_82543.c

1555

E1000_READ_REG(hw, E1000_CEXTERR);

sys/dev/e1000/e1000_82543.c

1556

E1000_READ_REG(hw, E1000_TSCTC);

sys/dev/e1000/e1000_82543.c

1557

E1000_READ_REG(hw, E1000_TSCTFC);

sys/dev/e1000/e1000_82543.c

1569

s32 e1000_read_mac_addr_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

1578

ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);

sys/dev/e1000/e1000_82543.c

1583

hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF);

sys/dev/e1000/e1000_82543.c

1584

hw->mac.perm_addr[i+1] = (u8)(nvm_data >> 8);

sys/dev/e1000/e1000_82543.c

1588

if (hw->bus.func == E1000_FUNC_1)

sys/dev/e1000/e1000_82543.c

1589

hw->mac.perm_addr[5] ^= 1;

sys/dev/e1000/e1000_82543.c

1592

hw->mac.addr[i] = hw->mac.perm_addr[i];

sys/dev/e1000/e1000_82543.c

167

static s32 e1000_init_nvm_params_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

169

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_82543.c

193

static s32 e1000_init_mac_params_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

195

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82543.c

200

switch (hw->device_id) {

sys/dev/e1000/e1000_82543.c

203

hw->phy.media_type = e1000_media_type_fiber;

sys/dev/e1000/e1000_82543.c

206

hw->phy.media_type = e1000_media_type_copper;

sys/dev/e1000/e1000_82543.c

229

(hw->phy.media_type == e1000_media_type_copper)

sys/dev/e1000/e1000_82543.c

233

(hw->phy.media_type == e1000_media_type_copper)

sys/dev/e1000/e1000_82543.c

238

(hw->phy.media_type == e1000_media_type_copper)

sys/dev/e1000/e1000_82543.c

256

if ((hw->mac.type != e1000_82543) ||

sys/dev/e1000/e1000_82543.c

257

(hw->phy.media_type == e1000_media_type_fiber))

sys/dev/e1000/e1000_82543.c

258

e1000_set_tbi_compatibility_82543(hw, false);

sys/dev/e1000/e1000_82543.c

269

void e1000_init_function_pointers_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

273

hw->mac.ops.init_params = e1000_init_mac_params_82543;

sys/dev/e1000/e1000_82543.c

274

hw->nvm.ops.init_params = e1000_init_nvm_params_82543;

sys/dev/e1000/e1000_82543.c

275

hw->phy.ops.init_params = e1000_init_phy_params_82543;

sys/dev/e1000/e1000_82543.c

285

static bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

287

struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;

sys/dev/e1000/e1000_82543.c

292

if (hw->mac.type != e1000_82543) {

sys/dev/e1000/e1000_82543.c

310

void e1000_set_tbi_compatibility_82543(struct e1000_hw *hw, bool state)

sys/dev/e1000/e1000_82543.c

312

struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;

sys/dev/e1000/e1000_82543.c

316

if (hw->mac.type != e1000_82543) {

sys/dev/e1000/e1000_82543.c

337

bool e1000_tbi_sbp_enabled_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

339

struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;

sys/dev/e1000/e1000_82543.c

344

if (hw->mac.type != e1000_82543) {

sys/dev/e1000/e1000_82543.c

362

static void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state)

sys/dev/e1000/e1000_82543.c

364

struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;

sys/dev/e1000/e1000_82543.c

368

if (state && e1000_tbi_compatibility_enabled_82543(hw))

sys/dev/e1000/e1000_82543.c

383

static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

385

struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;

sys/dev/e1000/e1000_82543.c

390

if (hw->mac.type != e1000_82543) {

sys/dev/e1000/e1000_82543.c

411

void e1000_tbi_adjust_stats_82543(struct e1000_hw *hw,

sys/dev/e1000/e1000_82543.c

415

if (!(e1000_tbi_sbp_enabled_82543(hw)))

sys/dev/e1000/e1000_82543.c

46

static s32 e1000_init_phy_params_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

47

static s32 e1000_init_nvm_params_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

48

static s32 e1000_init_mac_params_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

487

static s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_82543.c

49

static s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_82543.c

505

e1000_shift_out_mdi_bits_82543(hw, PHY_PREAMBLE, PHY_PREAMBLE_SIZE);

sys/dev/e1000/e1000_82543.c

51

static s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_82543.c

519

mdic = (offset | (hw->phy.addr << 5) |

sys/dev/e1000/e1000_82543.c

522

e1000_shift_out_mdi_bits_82543(hw, mdic, 14);

sys/dev/e1000/e1000_82543.c

529

*data = e1000_shift_in_mdi_bits_82543(hw);

sys/dev/e1000/e1000_82543.c

53

static s32 e1000_phy_force_speed_duplex_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

54

static s32 e1000_phy_hw_reset_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

543

static s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_82543.c

55

static s32 e1000_reset_hw_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

56

static s32 e1000_init_hw_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

562

e1000_shift_out_mdi_bits_82543(hw, PHY_PREAMBLE, PHY_PREAMBLE_SIZE);

sys/dev/e1000/e1000_82543.c

57

static s32 e1000_setup_link_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

571

mdic = ((PHY_TURNAROUND) | (offset << 2) | (hw->phy.addr << 7) |

sys/dev/e1000/e1000_82543.c

576

e1000_shift_out_mdi_bits_82543(hw, mdic, 32);

sys/dev/e1000/e1000_82543.c

58

static s32 e1000_setup_copper_link_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

59

static s32 e1000_setup_fiber_link_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

590

static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl)

sys/dev/e1000/e1000_82543.c

596

E1000_WRITE_REG(hw, E1000_CTRL, (*ctrl | E1000_CTRL_MDC));

sys/dev/e1000/e1000_82543.c

597

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82543.c

60

static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

609

static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl)

sys/dev/e1000/e1000_82543.c

61

static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

615

E1000_WRITE_REG(hw, E1000_CTRL, (*ctrl & ~E1000_CTRL_MDC));

sys/dev/e1000/e1000_82543.c

616

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82543.c

62

static s32 e1000_led_on_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

63

static s32 e1000_led_off_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

630

static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,

sys/dev/e1000/e1000_82543.c

64

static void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_82543.c

644

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82543.c

66

static void e1000_clear_hw_cntrs_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

661

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82543.c

662

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82543.c

666

e1000_raise_mdi_clk_82543(hw, &ctrl);

sys/dev/e1000/e1000_82543.c

667

e1000_lower_mdi_clk_82543(hw, &ctrl);

sys/dev/e1000/e1000_82543.c

67

static s32 e1000_config_mac_to_phy_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

68

static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

682

static u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

69

static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);

sys/dev/e1000/e1000_82543.c

697

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82543.c

70

static s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

706

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82543.c

707

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82543.c

71

static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);

sys/dev/e1000/e1000_82543.c

714

e1000_raise_mdi_clk_82543(hw, &ctrl);

sys/dev/e1000/e1000_82543.c

715

e1000_lower_mdi_clk_82543(hw, &ctrl);

sys/dev/e1000/e1000_82543.c

719

e1000_raise_mdi_clk_82543(hw, &ctrl);

sys/dev/e1000/e1000_82543.c

72

static u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

720

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82543.c

724

e1000_lower_mdi_clk_82543(hw, &ctrl);

sys/dev/e1000/e1000_82543.c

727

e1000_raise_mdi_clk_82543(hw, &ctrl);

sys/dev/e1000/e1000_82543.c

728

e1000_lower_mdi_clk_82543(hw, &ctrl);

sys/dev/e1000/e1000_82543.c

73

static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,

sys/dev/e1000/e1000_82543.c

741

static s32 e1000_phy_force_speed_duplex_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

747

ret_val = e1000_phy_force_speed_duplex_m88(hw);

sys/dev/e1000/e1000_82543.c

75

static bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

751

if (!hw->mac.autoneg && (hw->mac.forced_speed_duplex &

sys/dev/e1000/e1000_82543.c

753

ret_val = e1000_polarity_reversal_workaround_82543(hw);

sys/dev/e1000/e1000_82543.c

76

static void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state);

sys/dev/e1000/e1000_82543.c

767

static s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

77

static s32 e1000_read_mac_addr_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82543.c

774

if (!(hw->phy.ops.write_reg))

sys/dev/e1000/e1000_82543.c

781

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);

sys/dev/e1000/e1000_82543.c

784

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF);

sys/dev/e1000/e1000_82543.c

788

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);

sys/dev/e1000/e1000_82543.c

802

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);

sys/dev/e1000/e1000_82543.c

806

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);

sys/dev/e1000/e1000_82543.c

820

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);

sys/dev/e1000/e1000_82543.c

824

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);

sys/dev/e1000/e1000_82543.c

828

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);

sys/dev/e1000/e1000_82543.c

832

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);

sys/dev/e1000/e1000_82543.c

836

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);

sys/dev/e1000/e1000_82543.c

84

static s32 e1000_init_phy_params_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

844

ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_TIME, 100000, &link);

sys/dev/e1000/e1000_82543.c

86

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82543.c

861

static s32 e1000_phy_hw_reset_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

872

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82543.c

875

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_82543.c

876

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82543.c

882

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_82543.c

883

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82543.c

887

if (!(hw->phy.ops.get_cfg_done))

sys/dev/e1000/e1000_82543.c

890

ret_val = hw->phy.ops.get_cfg_done(hw);

sys/dev/e1000/e1000_82543.c

901

static s32 e1000_reset_hw_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

909

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_82543.c

91

if (hw->phy.media_type != e1000_media_type_copper) {

sys/dev/e1000/e1000_82543.c

911

E1000_WRITE_REG(hw, E1000_RCTL, 0);

sys/dev/e1000/e1000_82543.c

912

E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);

sys/dev/e1000/e1000_82543.c

913

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82543.c

915

e1000_set_tbi_sbp_82543(hw, false);

sys/dev/e1000/e1000_82543.c

923

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82543.c

926

if (hw->mac.type == e1000_82543) {

sys/dev/e1000/e1000_82543.c

927

E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);

sys/dev/e1000/e1000_82543.c

933

E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);

sys/dev/e1000/e1000_82543.c

940

hw->nvm.ops.reload(hw);

sys/dev/e1000/e1000_82543.c

944

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_82543.c

945

E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/e1000_82543.c

956

static s32 e1000_init_hw_82543(struct e1000_hw *hw)

sys/dev/e1000/e1000_82543.c

958

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82543.c

959

struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;

sys/dev/e1000/e1000_82543.c

967

E1000_WRITE_REG(hw, E1000_VET, 0);

sys/dev/e1000/e1000_82543.c

968

mac->ops.clear_vfta(hw);

sys/dev/e1000/e1000_82543.c

971

e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);

sys/dev/e1000/e1000_82543.c

976

E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);

sys/dev/e1000/e1000_82543.c

977

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82543.c

985

if (hw->mac.type == e1000_82543 && dev_spec->dma_fairness) {

sys/dev/e1000/e1000_82543.c

986

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82543.c

987

E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PRIOR);

sys/dev/e1000/e1000_82543.c

990

e1000_pcix_mmrbc_workaround_generic(hw);

sys/dev/e1000/e1000_82543.c

993

ret_val = mac->ops.setup_link(hw);

sys/dev/e1000/e1000_82543.h

49

void e1000_tbi_adjust_stats_82543(struct e1000_hw *hw,

sys/dev/e1000/e1000_82543.h

53

void e1000_set_tbi_compatibility_82543(struct e1000_hw *hw,

sys/dev/e1000/e1000_82543.h

55

bool e1000_tbi_sbp_enabled_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

1006

if (hw->nvm.type == e1000_nvm_flash_hw) {

sys/dev/e1000/e1000_82571.c

1008

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82571.c

1010

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_82571.c

1011

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82571.c

1014

ret_val = e1000_get_auto_rd_done_generic(hw);

sys/dev/e1000/e1000_82571.c

1024

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

1030

eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_82571.c

1032

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_82571.c

1044

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_82571.c

1045

E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/e1000_82571.c

1047

if (hw->mac.type == e1000_82571) {

sys/dev/e1000/e1000_82571.c

1049

ret_val = e1000_check_alt_mac_addr_generic(hw);

sys/dev/e1000/e1000_82571.c

1053

e1000_set_laa_state_82571(hw, true);

sys/dev/e1000/e1000_82571.c

1057

if (hw->phy.media_type == e1000_media_type_internal_serdes)

sys/dev/e1000/e1000_82571.c

1058

hw->mac.serdes_link_state = e1000_serdes_link_down;

sys/dev/e1000/e1000_82571.c

1069

static s32 e1000_init_hw_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1071

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82571.c

1078

e1000_initialize_hw_bits_82571(hw);

sys/dev/e1000/e1000_82571.c

1081

ret_val = mac->ops.id_led_init(hw);

sys/dev/e1000/e1000_82571.c

1088

mac->ops.clear_vfta(hw);

sys/dev/e1000/e1000_82571.c

1095

if (e1000_get_laa_state_82571(hw))

sys/dev/e1000/e1000_82571.c

1097

e1000_init_rx_addrs_generic(hw, rar_count);

sys/dev/e1000/e1000_82571.c

1102

E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);

sys/dev/e1000/e1000_82571.c

1105

ret_val = mac->ops.setup_link(hw);

sys/dev/e1000/e1000_82571.c

1108

reg_data = E1000_READ_REG(hw, E1000_TXDCTL(0));

sys/dev/e1000/e1000_82571.c

1111

E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg_data);

sys/dev/e1000/e1000_82571.c

1116

e1000_enable_tx_pkt_filtering_generic(hw);

sys/dev/e1000/e1000_82571.c

1120

reg_data = E1000_READ_REG(hw, E1000_GCR);

sys/dev/e1000/e1000_82571.c

1123

E1000_WRITE_REG(hw, E1000_GCR, reg_data);

sys/dev/e1000/e1000_82571.c

1126

reg_data = E1000_READ_REG(hw, E1000_TXDCTL(1));

sys/dev/e1000/e1000_82571.c

1130

E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg_data);

sys/dev/e1000/e1000_82571.c

1139

e1000_clear_hw_cntrs_82571(hw);

sys/dev/e1000/e1000_82571.c

114

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

1150

static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1157

reg = E1000_READ_REG(hw, E1000_TXDCTL(0));

sys/dev/e1000/e1000_82571.c

1159

E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg);

sys/dev/e1000/e1000_82571.c

1162

reg = E1000_READ_REG(hw, E1000_TXDCTL(1));

sys/dev/e1000/e1000_82571.c

1164

E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg);

sys/dev/e1000/e1000_82571.c

1167

reg = E1000_READ_REG(hw, E1000_TARC(0));

sys/dev/e1000/e1000_82571.c

1169

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

1181

E1000_WRITE_REG(hw, E1000_TARC(0), reg);

sys/dev/e1000/e1000_82571.c

1184

reg = E1000_READ_REG(hw, E1000_TARC(1));

sys/dev/e1000/e1000_82571.c

1185

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

1190

if (E1000_READ_REG(hw, E1000_TCTL) & E1000_TCTL_MULR)

sys/dev/e1000/e1000_82571.c

1194

E1000_WRITE_REG(hw, E1000_TARC(1), reg);

sys/dev/e1000/e1000_82571.c

1201

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

1205

reg = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82571.c

1207

E1000_WRITE_REG(hw, E1000_CTRL, reg);

sys/dev/e1000/e1000_82571.c

1214

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

1218

reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82571.c

1221

E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg);

sys/dev/e1000/e1000_82571.c

1227

if (hw->mac.type == e1000_82571) {

sys/dev/e1000/e1000_82571.c

1228

reg = E1000_READ_REG(hw, E1000_PBA_ECC);

sys/dev/e1000/e1000_82571.c

1230

E1000_WRITE_REG(hw, E1000_PBA_ECC, reg);

sys/dev/e1000/e1000_82571.c

1236

if ((hw->mac.type == e1000_82571) ||

sys/dev/e1000/e1000_82571.c

1237

(hw->mac.type == e1000_82572)) {

sys/dev/e1000/e1000_82571.c

1238

reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82571.c

1240

E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg);

sys/dev/e1000/e1000_82571.c

1246

if (hw->mac.type <= e1000_82573) {

sys/dev/e1000/e1000_82571.c

1247

reg = E1000_READ_REG(hw, E1000_RFCTL);

sys/dev/e1000/e1000_82571.c

1249

E1000_WRITE_REG(hw, E1000_RFCTL, reg);

sys/dev/e1000/e1000_82571.c

1253

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

1256

reg = E1000_READ_REG(hw, E1000_GCR);

sys/dev/e1000/e1000_82571.c

1258

E1000_WRITE_REG(hw, E1000_GCR, reg);

sys/dev/e1000/e1000_82571.c

1266

reg = E1000_READ_REG(hw, E1000_GCR2);

sys/dev/e1000/e1000_82571.c

1268

E1000_WRITE_REG(hw, E1000_GCR2, reg);

sys/dev/e1000/e1000_82571.c

1284

static void e1000_clear_vfta_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1293

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

1297

if (hw->mng_cookie.vlan_id != 0) {

sys/dev/e1000/e1000_82571.c

1304

vfta_offset = (hw->mng_cookie.vlan_id >>

sys/dev/e1000/e1000_82571.c

1308

1 << (hw->mng_cookie.vlan_id &

sys/dev/e1000/e1000_82571.c

1321

E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, vfta_value);

sys/dev/e1000/e1000_82571.c

1322

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82571.c

1333

static bool e1000_check_mng_mode_82574(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1340

ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data);

sys/dev/e1000/e1000_82571.c

1353

static s32 e1000_led_on_82574(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1360

ctrl = hw->mac.ledctl_mode2;

sys/dev/e1000/e1000_82571.c

1361

if (!(E1000_STATUS_LU & E1000_READ_REG(hw, E1000_STATUS))) {

sys/dev/e1000/e1000_82571.c

1366

if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) ==

sys/dev/e1000/e1000_82571.c

1370

E1000_WRITE_REG(hw, E1000_LEDCTL, ctrl);

sys/dev/e1000/e1000_82571.c

1381

bool e1000_check_phy_82574(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1392

ret_val = hw->phy.ops.read_reg(hw, E1000_RECEIVE_ERROR_COUNTER,

sys/dev/e1000/e1000_82571.c

1397

ret_val = hw->phy.ops.read_reg(hw, E1000_BASE1000T_STATUS,

sys/dev/e1000/e1000_82571.c

1420

static s32 e1000_setup_link_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1428

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

1432

if (hw->fc.requested_mode == e1000_fc_default)

sys/dev/e1000/e1000_82571.c

1433

hw->fc.requested_mode = e1000_fc_full;

sys/dev/e1000/e1000_82571.c

1439

return e1000_setup_link_generic(hw);

sys/dev/e1000/e1000_82571.c

1450

static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1457

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82571.c

1460

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82571.c

1462

switch (hw->phy.type) {

sys/dev/e1000/e1000_82571.c

1465

ret_val = e1000_copper_link_setup_m88(hw);

sys/dev/e1000/e1000_82571.c

1468

ret_val = e1000_copper_link_setup_igp(hw);

sys/dev/e1000/e1000_82571.c

1478

return e1000_setup_copper_link_generic(hw);

sys/dev/e1000/e1000_82571.c

1488

static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1492

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

1501

E1000_WRITE_REG(hw, E1000_SCTL,

sys/dev/e1000/e1000_82571.c

1508

return e1000_setup_fiber_serdes_link_generic(hw);

sys/dev/e1000/e1000_82571.c

1530

static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1532

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82571.c

1542

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82571.c

1543

status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_82571.c

1544

E1000_READ_REG(hw, E1000_RXCW);

sys/dev/e1000/e1000_82571.c

1547

rxcw = E1000_READ_REG(hw, E1000_RXCW);

sys/dev/e1000/e1000_82571.c

1574

E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);

sys/dev/e1000/e1000_82571.c

1575

E1000_WRITE_REG(hw, E1000_CTRL,

sys/dev/e1000/e1000_82571.c

1608

E1000_WRITE_REG(hw, E1000_TXCW,

sys/dev/e1000/e1000_82571.c

1611

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82571.c

1615

e1000_config_fc_after_link_up_generic(hw);

sys/dev/e1000/e1000_82571.c

1633

E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);

sys/dev/e1000/e1000_82571.c

1634

E1000_WRITE_REG(hw, E1000_CTRL, (ctrl &

sys/dev/e1000/e1000_82571.c

164

ret_val = e1000_get_phy_id_82571(hw);

sys/dev/e1000/e1000_82571.c

1654

rxcw = E1000_READ_REG(hw, E1000_RXCW);

sys/dev/e1000/e1000_82571.c

1669

txcw = E1000_READ_REG(hw, E1000_TXCW);

sys/dev/e1000/e1000_82571.c

1671

E1000_WRITE_REG(hw, E1000_TXCW, txcw);

sys/dev/e1000/e1000_82571.c

1691

static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data)

sys/dev/e1000/e1000_82571.c

1697

ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);

sys/dev/e1000/e1000_82571.c

1703

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

171

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

1726

bool e1000_get_laa_state_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1730

if (hw->mac.type != e1000_82571)

sys/dev/e1000/e1000_82571.c

1733

return hw->dev_spec._82571.laa_is_present;

sys/dev/e1000/e1000_82571.c

1743

void e1000_set_laa_state_82571(struct e1000_hw *hw, bool state)

sys/dev/e1000/e1000_82571.c

1747

if (hw->mac.type != e1000_82571)

sys/dev/e1000/e1000_82571.c

1750

hw->dev_spec._82571.laa_is_present = state;

sys/dev/e1000/e1000_82571.c

1760

hw->mac.ops.rar_set(hw, hw->mac.addr,

sys/dev/e1000/e1000_82571.c

1761

hw->mac.rar_entry_count - 1);

sys/dev/e1000/e1000_82571.c

1775

static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1777

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_82571.c

1789

ret_val = nvm->ops.read(hw, 0x10, 1, &data);

sys/dev/e1000/e1000_82571.c

1801

ret_val = nvm->ops.read(hw, 0x23, 1, &data);

sys/dev/e1000/e1000_82571.c

1807

ret_val = nvm->ops.write(hw, 0x23, 1, &data);

sys/dev/e1000/e1000_82571.c

1810

ret_val = nvm->ops.update(hw);

sys/dev/e1000/e1000_82571.c

1824

static s32 e1000_read_mac_addr_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1828

if (hw->mac.type == e1000_82571) {

sys/dev/e1000/e1000_82571.c

1835

ret_val = e1000_check_alt_mac_addr_generic(hw);

sys/dev/e1000/e1000_82571.c

1840

return e1000_read_mac_addr_generic(hw);

sys/dev/e1000/e1000_82571.c

1850

static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1852

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82571.c

1853

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82571.c

1859

if (!(mac->ops.check_mng_mode(hw) || phy->ops.check_reset_block(hw)))

sys/dev/e1000/e1000_82571.c

1860

e1000_power_down_phy_copper(hw);

sys/dev/e1000/e1000_82571.c

1871

static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

1875

e1000_clear_hw_cntrs_base_generic(hw);

sys/dev/e1000/e1000_82571.c

1877

E1000_READ_REG(hw, E1000_PRC64);

sys/dev/e1000/e1000_82571.c

1878

E1000_READ_REG(hw, E1000_PRC127);

sys/dev/e1000/e1000_82571.c

1879

E1000_READ_REG(hw, E1000_PRC255);

sys/dev/e1000/e1000_82571.c

1880

E1000_READ_REG(hw, E1000_PRC511);

sys/dev/e1000/e1000_82571.c

1881

E1000_READ_REG(hw, E1000_PRC1023);

sys/dev/e1000/e1000_82571.c

1882

E1000_READ_REG(hw, E1000_PRC1522);

sys/dev/e1000/e1000_82571.c

1883

E1000_READ_REG(hw, E1000_PTC64);

sys/dev/e1000/e1000_82571.c

1884

E1000_READ_REG(hw, E1000_PTC127);

sys/dev/e1000/e1000_82571.c

1885

E1000_READ_REG(hw, E1000_PTC255);

sys/dev/e1000/e1000_82571.c

1886

E1000_READ_REG(hw, E1000_PTC511);

sys/dev/e1000/e1000_82571.c

1887

E1000_READ_REG(hw, E1000_PTC1023);

sys/dev/e1000/e1000_82571.c

1888

E1000_READ_REG(hw, E1000_PTC1522);

sys/dev/e1000/e1000_82571.c

1890

E1000_READ_REG(hw, E1000_ALGNERRC);

sys/dev/e1000/e1000_82571.c

1891

E1000_READ_REG(hw, E1000_RXERRC);

sys/dev/e1000/e1000_82571.c

1892

E1000_READ_REG(hw, E1000_TNCRS);

sys/dev/e1000/e1000_82571.c

1893

E1000_READ_REG(hw, E1000_CEXTERR);

sys/dev/e1000/e1000_82571.c

1894

E1000_READ_REG(hw, E1000_TSCTC);

sys/dev/e1000/e1000_82571.c

1895

E1000_READ_REG(hw, E1000_TSCTFC);

sys/dev/e1000/e1000_82571.c

1897

E1000_READ_REG(hw, E1000_MGTPRC);

sys/dev/e1000/e1000_82571.c

1898

E1000_READ_REG(hw, E1000_MGTPDC);

sys/dev/e1000/e1000_82571.c

1899

E1000_READ_REG(hw, E1000_MGTPTC);

sys/dev/e1000/e1000_82571.c

1901

E1000_READ_REG(hw, E1000_IAC);

sys/dev/e1000/e1000_82571.c

1902

E1000_READ_REG(hw, E1000_ICRXOC);

sys/dev/e1000/e1000_82571.c

1904

E1000_READ_REG(hw, E1000_ICRXPTC);

sys/dev/e1000/e1000_82571.c

1905

E1000_READ_REG(hw, E1000_ICRXATC);

sys/dev/e1000/e1000_82571.c

1906

E1000_READ_REG(hw, E1000_ICTXPTC);

sys/dev/e1000/e1000_82571.c

1907

E1000_READ_REG(hw, E1000_ICTXATC);

sys/dev/e1000/e1000_82571.c

1908

E1000_READ_REG(hw, E1000_ICTXQEC);

sys/dev/e1000/e1000_82571.c

1909

E1000_READ_REG(hw, E1000_ICTXQMTC);

sys/dev/e1000/e1000_82571.c

1910

E1000_READ_REG(hw, E1000_ICRXDMTC);

sys/dev/e1000/e1000_82571.c

201

static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

203

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_82571.c

204

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_82571.c

226

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

237

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_82571.c

258

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

282

static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

284

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82571.c

292

switch (hw->device_id) {

sys/dev/e1000/e1000_82571.c

296

hw->phy.media_type = e1000_media_type_fiber;

sys/dev/e1000/e1000_82571.c

307

hw->phy.media_type = e1000_media_type_internal_serdes;

sys/dev/e1000/e1000_82571.c

315

hw->phy.media_type = e1000_media_type_copper;

sys/dev/e1000/e1000_82571.c

363

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

375

mac->arc_subsystem_valid = !!(E1000_READ_REG(hw, E1000_FWSM) &

sys/dev/e1000/e1000_82571.c

400

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

403

swsm2 = E1000_READ_REG(hw, E1000_SWSM2);

sys/dev/e1000/e1000_82571.c

407

E1000_WRITE_REG(hw, E1000_SWSM2, swsm2 |

sys/dev/e1000/e1000_82571.c

421

swsm = E1000_READ_REG(hw, E1000_SWSM);

sys/dev/e1000/e1000_82571.c

429

E1000_WRITE_REG(hw, E1000_SWSM, swsm & ~E1000_SWSM_SMBI);

sys/dev/e1000/e1000_82571.c

433

hw->dev_spec._82571.smb_counter = 0;

sys/dev/e1000/e1000_82571.c

444

void e1000_init_function_pointers_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

448

hw->mac.ops.init_params = e1000_init_mac_params_82571;

sys/dev/e1000/e1000_82571.c

449

hw->nvm.ops.init_params = e1000_init_nvm_params_82571;

sys/dev/e1000/e1000_82571.c

450

hw->phy.ops.init_params = e1000_init_phy_params_82571;

sys/dev/e1000/e1000_82571.c

460

static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

462

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82571.c

468

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

479

return e1000_get_phy_id(hw);

sys/dev/e1000/e1000_82571.c

483

ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);

sys/dev/e1000/e1000_82571.c

489

ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);

sys/dev/e1000/e1000_82571.c

512

e1000_get_hw_semaphore_82574(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

519

ASSERT_CTX_LOCK_HELD(hw);

sys/dev/e1000/e1000_82571.c

520

extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);

sys/dev/e1000/e1000_82571.c

523

E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl);

sys/dev/e1000/e1000_82571.c

524

extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);

sys/dev/e1000/e1000_82571.c

53

static s32 e1000_acquire_nvm_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

535

e1000_put_hw_semaphore_82574(hw);

sys/dev/e1000/e1000_82571.c

54

static void e1000_release_nvm_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

55

static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_82571.c

551

e1000_put_hw_semaphore_82574(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

557

extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);

sys/dev/e1000/e1000_82571.c

559

E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl);

sys/dev/e1000/e1000_82571.c

57

static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

574

static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_82571.c

576

u32 data = E1000_READ_REG(hw, E1000_POEMB);

sys/dev/e1000/e1000_82571.c

58

static s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

585

E1000_WRITE_REG(hw, E1000_POEMB, data);

sys/dev/e1000/e1000_82571.c

59

static s32 e1000_get_cfg_done_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

60

static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw,

sys/dev/e1000/e1000_82571.c

600

static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_82571.c

602

u32 data = E1000_READ_REG(hw, E1000_POEMB);

sys/dev/e1000/e1000_82571.c

608

} else if ((hw->phy.autoneg_advertised == E1000_ALL_SPEED_DUPLEX) ||

sys/dev/e1000/e1000_82571.c

609

(hw->phy.autoneg_advertised == E1000_ALL_NOT_GIG) ||

sys/dev/e1000/e1000_82571.c

610

(hw->phy.autoneg_advertised == E1000_ALL_10_SPEED)) {

sys/dev/e1000/e1000_82571.c

614

E1000_WRITE_REG(hw, E1000_POEMB, data);

sys/dev/e1000/e1000_82571.c

62

static s32 e1000_reset_hw_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

627

static s32 e1000_acquire_nvm_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

63

static s32 e1000_init_hw_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

633

ret_val = e1000_get_hw_semaphore(hw);

sys/dev/e1000/e1000_82571.c

637

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

64

static void e1000_clear_vfta_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

641

ret_val = e1000_acquire_nvm_generic(hw);

sys/dev/e1000/e1000_82571.c

646

e1000_put_hw_semaphore(hw);

sys/dev/e1000/e1000_82571.c

65

static bool e1000_check_mng_mode_82574(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

657

static void e1000_release_nvm_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

66

static s32 e1000_led_on_82574(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

661

e1000_release_nvm_generic(hw);

sys/dev/e1000/e1000_82571.c

662

e1000_put_hw_semaphore(hw);

sys/dev/e1000/e1000_82571.c

67

static s32 e1000_setup_link_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

677

static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_82571.c

68

static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

684

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

688

ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data);

sys/dev/e1000/e1000_82571.c

69

static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

692

ret_val = e1000_write_nvm_spi(hw, offset, words, data);

sys/dev/e1000/e1000_82571.c

70

static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

71

static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data);

sys/dev/e1000/e1000_82571.c

710

static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

718

ret_val = e1000_update_nvm_checksum_generic(hw);

sys/dev/e1000/e1000_82571.c

72

static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

725

if (hw->nvm.type != e1000_nvm_flash_hw)

sys/dev/e1000/e1000_82571.c

73

static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

731

if (!(E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_FLUPD))

sys/dev/e1000/e1000_82571.c

739

if ((E1000_READ_REG(hw, E1000_FLOP) & 0xFF00) == E1000_STM_OPCODE) {

sys/dev/e1000/e1000_82571.c

74

static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

743

E1000_WRITE_REG(hw, E1000_HICR, E1000_HICR_FW_RESET_ENABLE);

sys/dev/e1000/e1000_82571.c

744

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82571.c

745

E1000_WRITE_REG(hw, E1000_HICR, E1000_HICR_FW_RESET);

sys/dev/e1000/e1000_82571.c

749

eecd = E1000_READ_REG(hw, E1000_EECD) | E1000_EECD_FLUPD;

sys/dev/e1000/e1000_82571.c

75

static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

750

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_82571.c

754

if (!(E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_FLUPD))

sys/dev/e1000/e1000_82571.c

76

static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

77

static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw,

sys/dev/e1000/e1000_82571.c

771

static s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

775

if (hw->nvm.type == e1000_nvm_flash_hw)

sys/dev/e1000/e1000_82571.c

776

e1000_fix_nvm_checksum_82571(hw);

sys/dev/e1000/e1000_82571.c

778

return e1000_validate_nvm_checksum_generic(hw);

sys/dev/e1000/e1000_82571.c

79

static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw,

sys/dev/e1000/e1000_82571.c

795

static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_82571.c

798

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_82571.c

81

static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

818

ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE);

sys/dev/e1000/e1000_82571.c

82

static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_82571.c

822

E1000_WRITE_REG(hw, E1000_EEWR, eewr);

sys/dev/e1000/e1000_82571.c

824

ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE);

sys/dev/e1000/e1000_82571.c

838

static s32 e1000_get_cfg_done_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

84

static s32 e1000_read_mac_addr_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

845

if (E1000_READ_REG(hw, E1000_EEMNGCTL) &

sys/dev/e1000/e1000_82571.c

85

static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.c

870

static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_82571.c

872

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82571.c

881

ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);

sys/dev/e1000/e1000_82571.c

887

ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,

sys/dev/e1000/e1000_82571.c

893

ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,

sys/dev/e1000/e1000_82571.c

898

ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,

sys/dev/e1000/e1000_82571.c

904

ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,

sys/dev/e1000/e1000_82571.c

91

static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

912

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_82571.c

919

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_82571.c

925

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_82571.c

93

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82571.c

932

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_82571.c

949

static s32 e1000_reset_hw_82571(struct e1000_hw *hw)

sys/dev/e1000/e1000_82571.c

959

ret_val = e1000_disable_pcie_master_generic(hw);

sys/dev/e1000/e1000_82571.c

964

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_82571.c

966

E1000_WRITE_REG(hw, E1000_RCTL, 0);

sys/dev/e1000/e1000_82571.c

967

tctl = E1000_READ_REG(hw, E1000_TCTL);

sys/dev/e1000/e1000_82571.c

969

E1000_WRITE_REG(hw, E1000_TCTL, tctl);

sys/dev/e1000/e1000_82571.c

970

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82571.c

977

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

98

if (hw->phy.media_type != e1000_media_type_copper) {

sys/dev/e1000/e1000_82571.c

981

ret_val = e1000_get_hw_semaphore_82574(hw);

sys/dev/e1000/e1000_82571.c

987

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82571.c

990

E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);

sys/dev/e1000/e1000_82571.c

993

switch (hw->mac.type) {

sys/dev/e1000/e1000_82571.c

999

e1000_put_hw_semaphore_82574(hw);

sys/dev/e1000/e1000_82571.h

62

bool e1000_check_phy_82574(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.h

63

bool e1000_get_laa_state_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_82571.h

64

void e1000_set_laa_state_82571(struct e1000_hw *hw, bool state);

sys/dev/e1000/e1000_82575.c

1002

static s32 e1000_get_cfg_done_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1009

if (hw->bus.func == E1000_FUNC_1)

sys/dev/e1000/e1000_82575.c

101

static void e1000_i2c_start(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

1011

else if (hw->bus.func == E1000_FUNC_2)

sys/dev/e1000/e1000_82575.c

1013

else if (hw->bus.func == E1000_FUNC_3)

sys/dev/e1000/e1000_82575.c

1016

if (E1000_READ_REG(hw, E1000_EEMNGCTL) & mask)

sys/dev/e1000/e1000_82575.c

102

static void e1000_i2c_stop(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

1025

if (!(E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_PRES) &&

sys/dev/e1000/e1000_82575.c

1026

(hw->phy.type == e1000_phy_igp_3))

sys/dev/e1000/e1000_82575.c

1027

e1000_phy_init_script_igp3(hw);

sys/dev/e1000/e1000_82575.c

103

static void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);

sys/dev/e1000/e1000_82575.c

104

static s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data);

sys/dev/e1000/e1000_82575.c

1042

static s32 e1000_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed,

sys/dev/e1000/e1000_82575.c

1049

if (hw->phy.media_type != e1000_media_type_copper)

sys/dev/e1000/e1000_82575.c

105

static s32 e1000_get_i2c_ack(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

1050

ret_val = e1000_get_pcs_speed_and_duplex_82575(hw, speed,

sys/dev/e1000/e1000_82575.c

1053

ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed,

sys/dev/e1000/e1000_82575.c

106

static void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);

sys/dev/e1000/e1000_82575.c

1066

static s32 e1000_check_for_link_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

107

static s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data);

sys/dev/e1000/e1000_82575.c

1073

if (hw->phy.media_type != e1000_media_type_copper) {

sys/dev/e1000/e1000_82575.c

1074

ret_val = e1000_get_pcs_speed_and_duplex_82575(hw, &speed,

sys/dev/e1000/e1000_82575.c

108

static void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);

sys/dev/e1000/e1000_82575.c

1081

hw->mac.get_link_status = !hw->mac.serdes_has_link;

sys/dev/e1000/e1000_82575.c

1089

ret_val = e1000_config_fc_after_link_up_generic(hw);

sys/dev/e1000/e1000_82575.c

109

static void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);

sys/dev/e1000/e1000_82575.c

1093

ret_val = e1000_check_for_copper_link_generic(hw);

sys/dev/e1000/e1000_82575.c

110

static s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data);

sys/dev/e1000/e1000_82575.c

1105

static s32 e1000_check_for_link_media_swap(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1107

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82575.c

1115

ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0);

sys/dev/e1000/e1000_82575.c

1119

ret_val = phy->ops.read_reg(hw, E1000_M88E1112_STATUS, &data);

sys/dev/e1000/e1000_82575.c

1127

ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 1);

sys/dev/e1000/e1000_82575.c

1131

ret_val = phy->ops.read_reg(hw, E1000_M88E1112_STATUS, &data);

sys/dev/e1000/e1000_82575.c

1139

if (port && (hw->dev_spec._82575.media_port != port)) {

sys/dev/e1000/e1000_82575.c

1140

hw->dev_spec._82575.media_port = port;

sys/dev/e1000/e1000_82575.c

1141

hw->dev_spec._82575.media_changed = true;

sys/dev/e1000/e1000_82575.c

1146

ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0);

sys/dev/e1000/e1000_82575.c

1149

e1000_check_for_link_82575(hw);

sys/dev/e1000/e1000_82575.c

1151

e1000_check_for_link_82575(hw);

sys/dev/e1000/e1000_82575.c

1153

ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0);

sys/dev/e1000/e1000_82575.c

1165

static void e1000_power_up_serdes_link_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1171

if ((hw->phy.media_type != e1000_media_type_internal_serdes) &&

sys/dev/e1000/e1000_82575.c

1172

!e1000_sgmii_active_82575(hw))

sys/dev/e1000/e1000_82575.c

1176

reg = E1000_READ_REG(hw, E1000_PCS_CFG0);

sys/dev/e1000/e1000_82575.c

1178

E1000_WRITE_REG(hw, E1000_PCS_CFG0, reg);

sys/dev/e1000/e1000_82575.c

1181

reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82575.c

1183

E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg);

sys/dev/e1000/e1000_82575.c

1186

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

1199

static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,

sys/dev/e1000/e1000_82575.c

1202

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82575.c

1213

pcs = E1000_READ_REG(hw, E1000_PCS_LSTAT);

sys/dev/e1000/e1000_82575.c

1237

status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_82575.c

1263

void e1000_shutdown_serdes_link_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1269

if ((hw->phy.media_type != e1000_media_type_internal_serdes) &&

sys/dev/e1000/e1000_82575.c

127

static bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1270

!e1000_sgmii_active_82575(hw))

sys/dev/e1000/e1000_82575.c

1273

if (!e1000_enable_mng_pass_thru(hw)) {

sys/dev/e1000/e1000_82575.c

1275

reg = E1000_READ_REG(hw, E1000_PCS_CFG0);

sys/dev/e1000/e1000_82575.c

1277

E1000_WRITE_REG(hw, E1000_PCS_CFG0, reg);

sys/dev/e1000/e1000_82575.c

1280

reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82575.c

1282

E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg);

sys/dev/e1000/e1000_82575.c

1285

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

1298

static s32 e1000_reset_hw_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1309

ret_val = e1000_disable_pcie_master_generic(hw);

sys/dev/e1000/e1000_82575.c

1314

ret_val = e1000_set_pcie_completion_timeout(hw);

sys/dev/e1000/e1000_82575.c

1319

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_82575.c

1321

E1000_WRITE_REG(hw, E1000_RCTL, 0);

sys/dev/e1000/e1000_82575.c

1322

E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);

sys/dev/e1000/e1000_82575.c

1323

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

1327

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82575.c

1330

E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);

sys/dev/e1000/e1000_82575.c

1332

ret_val = e1000_get_auto_rd_done_generic(hw);

sys/dev/e1000/e1000_82575.c

134

switch (hw->mac.type) {

sys/dev/e1000/e1000_82575.c

1343

if (!(E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_PRES))

sys/dev/e1000/e1000_82575.c

1344

e1000_reset_init_script_82575(hw);

sys/dev/e1000/e1000_82575.c

1347

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_82575.c

1348

E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/e1000_82575.c

1351

ret_val = e1000_check_alt_mac_addr_generic(hw);

sys/dev/e1000/e1000_82575.c

1362

static s32 e1000_init_hw_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1364

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82575.c

137

reg = E1000_READ_REG(hw, E1000_MDIC);

sys/dev/e1000/e1000_82575.c

1370

ret_val = mac->ops.id_led_init(hw);

sys/dev/e1000/e1000_82575.c

1378

mac->ops.clear_vfta(hw);

sys/dev/e1000/e1000_82575.c

1380

ret_val = e1000_init_hw_base(hw);

sys/dev/e1000/e1000_82575.c

1383

hw->dev_spec._82575.mtu = 1500;

sys/dev/e1000/e1000_82575.c

1390

e1000_clear_hw_cntrs_82575(hw);

sys/dev/e1000/e1000_82575.c

1402

static s32 e1000_setup_copper_link_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1410

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82575.c

1413

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82575.c

1416

switch (hw->mac.type) {

sys/dev/e1000/e1000_82575.c

1421

phpm_reg = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT);

sys/dev/e1000/e1000_82575.c

1423

E1000_WRITE_REG(hw, E1000_82580_PHY_POWER_MGMT, phpm_reg);

sys/dev/e1000/e1000_82575.c

1429

ret_val = e1000_setup_serdes_link_82575(hw);

sys/dev/e1000/e1000_82575.c

1433

if (e1000_sgmii_active_82575(hw)) {

sys/dev/e1000/e1000_82575.c

1437

ret_val = hw->phy.ops.reset(hw);

sys/dev/e1000/e1000_82575.c

1443

switch (hw->phy.type) {

sys/dev/e1000/e1000_82575.c

1447

switch (hw->phy.id) {

sys/dev/e1000/e1000_82575.c

145

reg = E1000_READ_REG(hw, E1000_MDICNFG);

sys/dev/e1000/e1000_82575.c

1459

ret_val = e1000_copper_link_setup_m88_gen2(hw);

sys/dev/e1000/e1000_82575.c

1462

ret_val = e1000_copper_link_setup_m88(hw);

sys/dev/e1000/e1000_82575.c

1467

ret_val = e1000_copper_link_setup_igp(hw);

sys/dev/e1000/e1000_82575.c

1470

ret_val = e1000_copper_link_setup_82577(hw);

sys/dev/e1000/e1000_82575.c

1480

ret_val = e1000_setup_copper_link_generic(hw);

sys/dev/e1000/e1000_82575.c

1494

static s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1503

if ((hw->phy.media_type != e1000_media_type_internal_serdes) &&

sys/dev/e1000/e1000_82575.c

1504

!e1000_sgmii_active_82575(hw))

sys/dev/e1000/e1000_82575.c

1513

E1000_WRITE_REG(hw, E1000_SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);

sys/dev/e1000/e1000_82575.c

1516

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82575.c

1518

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_82575.c

1520

ctrl_reg = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82575.c

1524

if (hw->mac.type == e1000_82575 || hw->mac.type == e1000_82576)

sys/dev/e1000/e1000_82575.c

1527

reg = E1000_READ_REG(hw, E1000_PCS_LCTL);

sys/dev/e1000/e1000_82575.c

1530

pcs_autoneg = hw->mac.autoneg;

sys/dev/e1000/e1000_82575.c

1544

if (hw->mac.type == e1000_82575 ||

sys/dev/e1000/e1000_82575.c

1545

hw->mac.type == e1000_82576) {

sys/dev/e1000/e1000_82575.c

1546

ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &data);

sys/dev/e1000/e1000_82575.c

1569

E1000_WRITE_REG(hw, E1000_CTRL, ctrl_reg);

sys/dev/e1000/e1000_82575.c

158

static s32 e1000_init_phy_params_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1589

anadv_reg = E1000_READ_REG(hw, E1000_PCS_ANADV);

sys/dev/e1000/e1000_82575.c

1592

switch (hw->fc.requested_mode) {

sys/dev/e1000/e1000_82575.c

160

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82575.c

1605

E1000_WRITE_REG(hw, E1000_PCS_ANADV, anadv_reg);

sys/dev/e1000/e1000_82575.c

1618

E1000_WRITE_REG(hw, E1000_PCS_LCTL, reg);

sys/dev/e1000/e1000_82575.c

1620

if (!pcs_autoneg && !e1000_sgmii_active_82575(hw))

sys/dev/e1000/e1000_82575.c

1621

e1000_force_mac_fc_generic(hw);

sys/dev/e1000/e1000_82575.c

1637

static s32 e1000_get_media_type_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1639

struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;

sys/dev/e1000/e1000_82575.c

1649

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82575.c

1656

hw->phy.media_type = e1000_media_type_internal_serdes;

sys/dev/e1000/e1000_82575.c

1659

hw->phy.media_type = e1000_media_type_copper;

sys/dev/e1000/e1000_82575.c

1663

if (e1000_sgmii_uses_mdio_82575(hw)) {

sys/dev/e1000/e1000_82575.c

1664

hw->phy.media_type = e1000_media_type_copper;

sys/dev/e1000/e1000_82575.c

1672

ret_val = e1000_set_sfp_media_type_82575(hw);

sys/dev/e1000/e1000_82575.c

1674

(hw->phy.media_type == e1000_media_type_unknown)) {

sys/dev/e1000/e1000_82575.c

1679

hw->phy.media_type = e1000_media_type_internal_serdes;

sys/dev/e1000/e1000_82575.c

1682

hw->phy.media_type = e1000_media_type_copper;

sys/dev/e1000/e1000_82575.c

169

if (hw->phy.media_type != e1000_media_type_copper) {

sys/dev/e1000/e1000_82575.c

1697

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_82575.c

1715

static s32 e1000_set_sfp_media_type_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1719

struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;

sys/dev/e1000/e1000_82575.c

1725

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82575.c

1727

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext | E1000_CTRL_I2C_ENA);

sys/dev/e1000/e1000_82575.c

1729

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

1733

ret_val = e1000_read_sfp_data_byte(hw,

sys/dev/e1000/e1000_82575.c

1744

ret_val = e1000_read_sfp_data_byte(hw,

sys/dev/e1000/e1000_82575.c

1758

hw->phy.media_type = e1000_media_type_internal_serdes;

sys/dev/e1000/e1000_82575.c

1762

hw->phy.media_type = e1000_media_type_internal_serdes;

sys/dev/e1000/e1000_82575.c

1766

hw->phy.media_type = e1000_media_type_copper;

sys/dev/e1000/e1000_82575.c

1769

hw->phy.media_type = e1000_media_type_unknown;

sys/dev/e1000/e1000_82575.c

1776

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_82575.c

1788

static s32 e1000_valid_led_default_82575(struct e1000_hw *hw, u16 *data)

sys/dev/e1000/e1000_82575.c

1794

ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);

sys/dev/e1000/e1000_82575.c

1801

switch (hw->phy.media_type) {

sys/dev/e1000/e1000_82575.c

1823

static bool e1000_sgmii_active_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1825

struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;

sys/dev/e1000/e1000_82575.c

1836

s32 e1000_reset_init_script_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1840

if (hw->mac.type == e1000_82575) {

sys/dev/e1000/e1000_82575.c

1843

e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x00, 0x0C);

sys/dev/e1000/e1000_82575.c

1844

e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x01, 0x78);

sys/dev/e1000/e1000_82575.c

1845

e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x1B, 0x23);

sys/dev/e1000/e1000_82575.c

1846

e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x23, 0x15);

sys/dev/e1000/e1000_82575.c

1849

e1000_write_8bit_ctrl_reg_generic(hw, E1000_CCMCTL, 0x14, 0x00);

sys/dev/e1000/e1000_82575.c

1850

e1000_write_8bit_ctrl_reg_generic(hw, E1000_CCMCTL, 0x10, 0x00);

sys/dev/e1000/e1000_82575.c

1853

e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x00, 0xEC);

sys/dev/e1000/e1000_82575.c

1854

e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x61, 0xDF);

sys/dev/e1000/e1000_82575.c

1855

e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x34, 0x05);

sys/dev/e1000/e1000_82575.c

1856

e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x2F, 0x81);

sys/dev/e1000/e1000_82575.c

1859

e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x02, 0x47);

sys/dev/e1000/e1000_82575.c

186

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82575.c

1860

e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x14, 0x00);

sys/dev/e1000/e1000_82575.c

1861

e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x10, 0x00);

sys/dev/e1000/e1000_82575.c

1871

static s32 e1000_read_mac_addr_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

188

if (e1000_sgmii_active_82575(hw)) {

sys/dev/e1000/e1000_82575.c

1882

ret_val = e1000_check_alt_mac_addr_generic(hw);

sys/dev/e1000/e1000_82575.c

1886

ret_val = e1000_read_mac_addr_generic(hw);

sys/dev/e1000/e1000_82575.c

1899

static void e1000_config_collision_dist_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1905

tctl_ext = E1000_READ_REG(hw, E1000_TCTL_EXT);

sys/dev/e1000/e1000_82575.c

1910

E1000_WRITE_REG(hw, E1000_TCTL_EXT, tctl_ext);

sys/dev/e1000/e1000_82575.c

1911

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

1920

static void e1000_clear_hw_cntrs_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

1924

e1000_clear_hw_cntrs_base_generic(hw);

sys/dev/e1000/e1000_82575.c

1926

E1000_READ_REG(hw, E1000_PRC64);

sys/dev/e1000/e1000_82575.c

1927

E1000_READ_REG(hw, E1000_PRC127);

sys/dev/e1000/e1000_82575.c

1928

E1000_READ_REG(hw, E1000_PRC255);

sys/dev/e1000/e1000_82575.c

1929

E1000_READ_REG(hw, E1000_PRC511);

sys/dev/e1000/e1000_82575.c

1930

E1000_READ_REG(hw, E1000_PRC1023);

sys/dev/e1000/e1000_82575.c

1931

E1000_READ_REG(hw, E1000_PRC1522);

sys/dev/e1000/e1000_82575.c

1932

E1000_READ_REG(hw, E1000_PTC64);

sys/dev/e1000/e1000_82575.c

1933

E1000_READ_REG(hw, E1000_PTC127);

sys/dev/e1000/e1000_82575.c

1934

E1000_READ_REG(hw, E1000_PTC255);

sys/dev/e1000/e1000_82575.c

1935

E1000_READ_REG(hw, E1000_PTC511);

sys/dev/e1000/e1000_82575.c

1936

E1000_READ_REG(hw, E1000_PTC1023);

sys/dev/e1000/e1000_82575.c

1937

E1000_READ_REG(hw, E1000_PTC1522);

sys/dev/e1000/e1000_82575.c

1939

E1000_READ_REG(hw, E1000_ALGNERRC);

sys/dev/e1000/e1000_82575.c

1940

E1000_READ_REG(hw, E1000_RXERRC);

sys/dev/e1000/e1000_82575.c

1941

E1000_READ_REG(hw, E1000_TNCRS);

sys/dev/e1000/e1000_82575.c

1942

E1000_READ_REG(hw, E1000_CEXTERR);

sys/dev/e1000/e1000_82575.c

1943

E1000_READ_REG(hw, E1000_TSCTC);

sys/dev/e1000/e1000_82575.c

1944

E1000_READ_REG(hw, E1000_TSCTFC);

sys/dev/e1000/e1000_82575.c

1946

E1000_READ_REG(hw, E1000_MGTPRC);

sys/dev/e1000/e1000_82575.c

1947

E1000_READ_REG(hw, E1000_MGTPDC);

sys/dev/e1000/e1000_82575.c

1948

E1000_READ_REG(hw, E1000_MGTPTC);

sys/dev/e1000/e1000_82575.c

1950

E1000_READ_REG(hw, E1000_IAC);

sys/dev/e1000/e1000_82575.c

1951

E1000_READ_REG(hw, E1000_ICRXOC);

sys/dev/e1000/e1000_82575.c

1953

E1000_READ_REG(hw, E1000_ICRXPTC);

sys/dev/e1000/e1000_82575.c

1954

E1000_READ_REG(hw, E1000_ICRXATC);

sys/dev/e1000/e1000_82575.c

1955

E1000_READ_REG(hw, E1000_ICTXPTC);

sys/dev/e1000/e1000_82575.c

1956

E1000_READ_REG(hw, E1000_ICTXATC);

sys/dev/e1000/e1000_82575.c

1957

E1000_READ_REG(hw, E1000_ICTXQEC);

sys/dev/e1000/e1000_82575.c

1958

E1000_READ_REG(hw, E1000_ICTXQMTC);

sys/dev/e1000/e1000_82575.c

1959

E1000_READ_REG(hw, E1000_ICRXDMTC);

sys/dev/e1000/e1000_82575.c

196

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_82575.c

1961

E1000_READ_REG(hw, E1000_CBTMPC);

sys/dev/e1000/e1000_82575.c

1962

E1000_READ_REG(hw, E1000_HTDPMC);

sys/dev/e1000/e1000_82575.c

1963

E1000_READ_REG(hw, E1000_CBRMPC);

sys/dev/e1000/e1000_82575.c

1964

E1000_READ_REG(hw, E1000_RPTHC);

sys/dev/e1000/e1000_82575.c

1965

E1000_READ_REG(hw, E1000_HGPTC);

sys/dev/e1000/e1000_82575.c

1966

E1000_READ_REG(hw, E1000_HTCBDPC);

sys/dev/e1000/e1000_82575.c

1967

E1000_READ_REG(hw, E1000_HGORCL);

sys/dev/e1000/e1000_82575.c

1968

E1000_READ_REG(hw, E1000_HGORCH);

sys/dev/e1000/e1000_82575.c

1969

E1000_READ_REG(hw, E1000_HGOTCL);

sys/dev/e1000/e1000_82575.c

197

e1000_reset_mdicnfg_82580(hw);

sys/dev/e1000/e1000_82575.c

1970

E1000_READ_REG(hw, E1000_HGOTCH);

sys/dev/e1000/e1000_82575.c

1971

E1000_READ_REG(hw, E1000_LENERRS);

sys/dev/e1000/e1000_82575.c

1974

if ((hw->phy.media_type == e1000_media_type_internal_serdes) ||

sys/dev/e1000/e1000_82575.c

1975

e1000_sgmii_active_82575(hw))

sys/dev/e1000/e1000_82575.c

1976

E1000_READ_REG(hw, E1000_SCVPC);

sys/dev/e1000/e1000_82575.c

1989

static s32 e1000_set_pcie_completion_timeout(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

199

if (e1000_sgmii_active_82575(hw) && !e1000_sgmii_uses_mdio_82575(hw)) {

sys/dev/e1000/e1000_82575.c

1991

u32 gcr = E1000_READ_REG(hw, E1000_GCR);

sys/dev/e1000/e1000_82575.c

2013

ret_val = e1000_read_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,

sys/dev/e1000/e1000_82575.c

2020

ret_val = e1000_write_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,

sys/dev/e1000/e1000_82575.c

2026

E1000_WRITE_REG(hw, E1000_GCR, gcr);

sys/dev/e1000/e1000_82575.c

203

switch (hw->mac.type) {

sys/dev/e1000/e1000_82575.c

2038

void e1000_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf)

sys/dev/e1000/e1000_82575.c

2042

switch (hw->mac.type) {

sys/dev/e1000/e1000_82575.c

2054

reg_val = E1000_READ_REG(hw, reg_offset);

sys/dev/e1000/e1000_82575.c

2066

E1000_WRITE_REG(hw, reg_offset, reg_val);

sys/dev/e1000/e1000_82575.c

2076

void e1000_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable)

sys/dev/e1000/e1000_82575.c

2080

switch (hw->mac.type) {

sys/dev/e1000/e1000_82575.c

2082

dtxswc = E1000_READ_REG(hw, E1000_DTXSWC);

sys/dev/e1000/e1000_82575.c

2087

E1000_WRITE_REG(hw, E1000_DTXSWC, dtxswc);

sys/dev/e1000/e1000_82575.c

2091

dtxswc = E1000_READ_REG(hw, E1000_TXSWC);

sys/dev/e1000/e1000_82575.c

2096

E1000_WRITE_REG(hw, E1000_TXSWC, dtxswc);

sys/dev/e1000/e1000_82575.c

2113

void e1000_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable)

sys/dev/e1000/e1000_82575.c

2115

u32 vt_ctl = E1000_READ_REG(hw, E1000_VT_CTL);

sys/dev/e1000/e1000_82575.c

2122

E1000_WRITE_REG(hw, E1000_VT_CTL, vt_ctl);

sys/dev/e1000/e1000_82575.c

2134

static s32 e1000_read_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_82575.c

2140

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_82575.c

2144

ret_val = e1000_read_phy_reg_mdic(hw, offset, data);

sys/dev/e1000/e1000_82575.c

2146

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_82575.c

2160

static s32 e1000_write_phy_reg_82580(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_82575.c

2166

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_82575.c

2170

ret_val = e1000_write_phy_reg_mdic(hw, offset, data);

sys/dev/e1000/e1000_82575.c

2172

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_82575.c

2186

static s32 e1000_reset_mdicnfg_82580(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

2194

if (hw->mac.type != e1000_82580)

sys/dev/e1000/e1000_82575.c

2196

if (!e1000_sgmii_active_82575(hw))

sys/dev/e1000/e1000_82575.c

2199

ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +

sys/dev/e1000/e1000_82575.c

2200

NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,

sys/dev/e1000/e1000_82575.c

2207

mdicnfg = E1000_READ_REG(hw, E1000_MDICNFG);

sys/dev/e1000/e1000_82575.c

2212

E1000_WRITE_REG(hw, E1000_MDICNFG, mdicnfg);

sys/dev/e1000/e1000_82575.c

222

ret_val = e1000_get_phy_id_82575(hw);

sys/dev/e1000/e1000_82575.c

2224

static s32 e1000_reset_hw_82580(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

2230

bool global_device_reset = hw->dev_spec._82575.global_device_reset;

sys/dev/e1000/e1000_82575.c

2234

hw->dev_spec._82575.global_device_reset = false;

sys/dev/e1000/e1000_82575.c

2237

if (hw->mac.type == e1000_82580)

sys/dev/e1000/e1000_82575.c

2241

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_82575.c

2247

ret_val = e1000_disable_pcie_master_generic(hw);

sys/dev/e1000/e1000_82575.c

2252

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_82575.c

2253

E1000_WRITE_REG(hw, E1000_RCTL, 0);

sys/dev/e1000/e1000_82575.c

2254

E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);

sys/dev/e1000/e1000_82575.c

2255

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

2260

if (global_device_reset && hw->mac.ops.acquire_swfw_sync(hw,

sys/dev/e1000/e1000_82575.c

2264

if (global_device_reset && !(E1000_READ_REG(hw, E1000_STATUS) &

sys/dev/e1000/e1000_82575.c

2270

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_82575.c

2272

switch (hw->device_id) {

sys/dev/e1000/e1000_82575.c

2276

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

2283

ret_val = e1000_get_auto_rd_done_generic(hw);

sys/dev/e1000/e1000_82575.c

2294

E1000_WRITE_REG(hw, E1000_STATUS, E1000_STAT_DEV_RST_SET);

sys/dev/e1000/e1000_82575.c

2297

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_82575.c

2298

E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/e1000_82575.c

2300

ret_val = e1000_reset_mdicnfg_82580(hw);

sys/dev/e1000/e1000_82575.c

2305

ret_val = e1000_check_alt_mac_addr_generic(hw);

sys/dev/e1000/e1000_82575.c

2309

hw->mac.ops.release_swfw_sync(hw, swmbsw_mask);

sys/dev/e1000/e1000_82575.c

2343

s32 e1000_validate_nvm_checksum_with_offset(struct e1000_hw *hw, u16 offset)

sys/dev/e1000/e1000_82575.c

2352

ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);

sys/dev/e1000/e1000_82575.c

2380

s32 e1000_update_nvm_checksum_with_offset(struct e1000_hw *hw, u16 offset)

sys/dev/e1000/e1000_82575.c

2389

ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);

sys/dev/e1000/e1000_82575.c

2397

ret_val = hw->nvm.ops.write(hw, (NVM_CHECKSUM_REG + offset), 1,

sys/dev/e1000/e1000_82575.c

2414

static s32 e1000_validate_nvm_checksum_82580(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

2423

ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data);

sys/dev/e1000/e1000_82575.c

2437

ret_val = e1000_validate_nvm_checksum_with_offset(hw,

sys/dev/e1000/e1000_82575.c

2455

static s32 e1000_update_nvm_checksum_82580(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

2463

ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data);

sys/dev/e1000/e1000_82575.c

2472

ret_val = hw->nvm.ops.write(hw, NVM_COMPATIBILITY_REG_3, 1,

sys/dev/e1000/e1000_82575.c

2482

ret_val = e1000_update_nvm_checksum_with_offset(hw, nvm_offset);

sys/dev/e1000/e1000_82575.c

2499

static s32 e1000_validate_nvm_checksum_i350(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

2509

ret_val = e1000_validate_nvm_checksum_with_offset(hw,

sys/dev/e1000/e1000_82575.c

2527

static s32 e1000_update_nvm_checksum_i350(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

2537

ret_val = e1000_update_nvm_checksum_with_offset(hw, nvm_offset);

sys/dev/e1000/e1000_82575.c

2553

static s32 __e1000_access_emi_reg(struct e1000_hw *hw, u16 address,

sys/dev/e1000/e1000_82575.c

2560

ret_val = hw->phy.ops.write_reg(hw, E1000_EMIADD, address);

sys/dev/e1000/e1000_82575.c

2565

ret_val = hw->phy.ops.read_reg(hw, E1000_EMIDATA, data);

sys/dev/e1000/e1000_82575.c

2567

ret_val = hw->phy.ops.write_reg(hw, E1000_EMIDATA, *data);

sys/dev/e1000/e1000_82575.c

2578

s32 e1000_read_emi_reg(struct e1000_hw *hw, u16 addr, u16 *data)

sys/dev/e1000/e1000_82575.c

2582

return __e1000_access_emi_reg(hw, addr, data, true);

sys/dev/e1000/e1000_82575.c

2591

s32 e1000_initialize_M88E1512_phy(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

2593

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82575.c

2603

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FF);

sys/dev/e1000/e1000_82575.c

2607

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x214B);

sys/dev/e1000/e1000_82575.c

2611

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2144);

sys/dev/e1000/e1000_82575.c

2615

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x0C28);

sys/dev/e1000/e1000_82575.c

2619

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2146);

sys/dev/e1000/e1000_82575.c

2623

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xB233);

sys/dev/e1000/e1000_82575.c

2627

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x214D);

sys/dev/e1000/e1000_82575.c

2631

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xCC0C);

sys/dev/e1000/e1000_82575.c

2635

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2159);

sys/dev/e1000/e1000_82575.c

2640

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FB);

sys/dev/e1000/e1000_82575.c

2644

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_3, 0x000D);

sys/dev/e1000/e1000_82575.c

2649

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x12);

sys/dev/e1000/e1000_82575.c

2654

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_MODE, 0x8001);

sys/dev/e1000/e1000_82575.c

2659

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0);

sys/dev/e1000/e1000_82575.c

2663

ret_val = phy->ops.commit(hw);

sys/dev/e1000/e1000_82575.c

2680

s32 e1000_initialize_M88E1543_phy(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

2682

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82575.c

2692

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FF);

sys/dev/e1000/e1000_82575.c

2696

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x214B);

sys/dev/e1000/e1000_82575.c

2700

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2144);

sys/dev/e1000/e1000_82575.c

2704

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x0C28);

sys/dev/e1000/e1000_82575.c

2708

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2146);

sys/dev/e1000/e1000_82575.c

2712

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xB233);

sys/dev/e1000/e1000_82575.c

2716

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x214D);

sys/dev/e1000/e1000_82575.c

2720

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xDC0C);

sys/dev/e1000/e1000_82575.c

2724

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2159);

sys/dev/e1000/e1000_82575.c

2729

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FB);

sys/dev/e1000/e1000_82575.c

2733

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_3, 0xC00D);

sys/dev/e1000/e1000_82575.c

2738

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x12);

sys/dev/e1000/e1000_82575.c

2743

ret_val = phy->ops.write_reg(hw, E1000_M88E1512_MODE, 0x8001);

sys/dev/e1000/e1000_82575.c

2748

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x1);

sys/dev/e1000/e1000_82575.c

2753

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_FIBER_CTRL, 0x9140);

sys/dev/e1000/e1000_82575.c

2758

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0);

sys/dev/e1000/e1000_82575.c

2762

ret_val = phy->ops.commit(hw);

sys/dev/e1000/e1000_82575.c

2782

s32 e1000_set_eee_i350(struct e1000_hw *hw, bool adv1G, bool adv100M)

sys/dev/e1000/e1000_82575.c

2788

if ((hw->mac.type < e1000_i350) ||

sys/dev/e1000/e1000_82575.c

2789

(hw->phy.media_type != e1000_media_type_copper))

sys/dev/e1000/e1000_82575.c

2791

ipcnfg = E1000_READ_REG(hw, E1000_IPCNFG);

sys/dev/e1000/e1000_82575.c

2792

eeer = E1000_READ_REG(hw, E1000_EEER);

sys/dev/e1000/e1000_82575.c

2795

if (!(hw->dev_spec._82575.eee_disable)) {

sys/dev/e1000/e1000_82575.c

2796

u32 eee_su = E1000_READ_REG(hw, E1000_EEE_SU);

sys/dev/e1000/e1000_82575.c

2819

E1000_WRITE_REG(hw, E1000_IPCNFG, ipcnfg);

sys/dev/e1000/e1000_82575.c

2820

E1000_WRITE_REG(hw, E1000_EEER, eeer);

sys/dev/e1000/e1000_82575.c

2821

E1000_READ_REG(hw, E1000_IPCNFG);

sys/dev/e1000/e1000_82575.c

2822

E1000_READ_REG(hw, E1000_EEER);

sys/dev/e1000/e1000_82575.c

2837

s32 e1000_set_eee_i354(struct e1000_hw *hw, bool adv1G, bool adv100M)

sys/dev/e1000/e1000_82575.c

2839

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82575.c

2845

if ((hw->phy.media_type != e1000_media_type_copper) ||

sys/dev/e1000/e1000_82575.c

285

ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 2);

sys/dev/e1000/e1000_82575.c

2850

if (!hw->dev_spec._82575.eee_disable) {

sys/dev/e1000/e1000_82575.c

2852

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 18);

sys/dev/e1000/e1000_82575.c

2856

ret_val = phy->ops.read_reg(hw, E1000_M88E1543_EEE_CTRL_1,

sys/dev/e1000/e1000_82575.c

2862

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_EEE_CTRL_1,

sys/dev/e1000/e1000_82575.c

2868

ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0);

sys/dev/e1000/e1000_82575.c

2873

ret_val = e1000_read_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354,

sys/dev/e1000/e1000_82575.c

288

ret_val = phy->ops.read_reg(hw, E1000_M88E1112_MAC_CTRL_1,

sys/dev/e1000/e1000_82575.c

2889

ret_val = e1000_write_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354,

sys/dev/e1000/e1000_82575.c

2894

ret_val = e1000_read_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354,

sys/dev/e1000/e1000_82575.c

2902

ret_val = e1000_write_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354,

sys/dev/e1000/e1000_82575.c

2919

s32 e1000_get_eee_status_i354(struct e1000_hw *hw, bool *status)

sys/dev/e1000/e1000_82575.c

2921

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82575.c

2928

if ((hw->phy.media_type != e1000_media_type_copper) ||

sys/dev/e1000/e1000_82575.c

2933

ret_val = e1000_read_xmdio_reg(hw, E1000_PCS_STATUS_ADDR_I354,

sys/dev/e1000/e1000_82575.c

2958

void e1000_clear_vfta_i350(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

2967

E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0);

sys/dev/e1000/e1000_82575.c

2969

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

297

hw->mac.ops.check_for_link =

sys/dev/e1000/e1000_82575.c

2982

void e1000_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value)

sys/dev/e1000/e1000_82575.c

2989

E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);

sys/dev/e1000/e1000_82575.c

2991

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

3002

s32 e1000_set_i2c_bb(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

3009

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82575.c

3011

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_82575.c

3012

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

3014

i2cparams = E1000_READ_REG(hw, E1000_I2CPARAMS);

sys/dev/e1000/e1000_82575.c

3018

E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cparams);

sys/dev/e1000/e1000_82575.c

3019

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

303

ret_val = e1000_initialize_M88E1512_phy(hw);

sys/dev/e1000/e1000_82575.c

3034

s32 e1000_read_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset,

sys/dev/e1000/e1000_82575.c

3049

if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)

sys/dev/e1000/e1000_82575.c

3055

e1000_i2c_start(hw);

sys/dev/e1000/e1000_82575.c

3058

status = e1000_clock_out_i2c_byte(hw, dev_addr);

sys/dev/e1000/e1000_82575.c

3062

status = e1000_get_i2c_ack(hw);

sys/dev/e1000/e1000_82575.c

3066

status = e1000_clock_out_i2c_byte(hw, byte_offset);

sys/dev/e1000/e1000_82575.c

3070

status = e1000_get_i2c_ack(hw);

sys/dev/e1000/e1000_82575.c

3074

e1000_i2c_start(hw);

sys/dev/e1000/e1000_82575.c

3077

status = e1000_clock_out_i2c_byte(hw, (dev_addr | 0x1));

sys/dev/e1000/e1000_82575.c

308

ret_val = e1000_initialize_M88E1543_phy(hw);

sys/dev/e1000/e1000_82575.c

3081

status = e1000_get_i2c_ack(hw);

sys/dev/e1000/e1000_82575.c

3085

e1000_clock_in_i2c_byte(hw, data);

sys/dev/e1000/e1000_82575.c

3087

status = e1000_clock_out_i2c_bit(hw, nack);

sys/dev/e1000/e1000_82575.c

3091

e1000_i2c_stop(hw);

sys/dev/e1000/e1000_82575.c

3095

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/e1000/e1000_82575.c

3097

e1000_i2c_bus_clear(hw);

sys/dev/e1000/e1000_82575.c

3106

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/e1000/e1000_82575.c

3123

s32 e1000_write_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset,

sys/dev/e1000/e1000_82575.c

3135

if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS) {

sys/dev/e1000/e1000_82575.c

3141

e1000_i2c_start(hw);

sys/dev/e1000/e1000_82575.c

3143

status = e1000_clock_out_i2c_byte(hw, dev_addr);

sys/dev/e1000/e1000_82575.c

3147

status = e1000_get_i2c_ack(hw);

sys/dev/e1000/e1000_82575.c

3151

status = e1000_clock_out_i2c_byte(hw, byte_offset);

sys/dev/e1000/e1000_82575.c

3155

status = e1000_get_i2c_ack(hw);

sys/dev/e1000/e1000_82575.c

3159

status = e1000_clock_out_i2c_byte(hw, data);

sys/dev/e1000/e1000_82575.c

3163

status = e1000_get_i2c_ack(hw);

sys/dev/e1000/e1000_82575.c

3167

e1000_i2c_stop(hw);

sys/dev/e1000/e1000_82575.c

3171

e1000_i2c_bus_clear(hw);

sys/dev/e1000/e1000_82575.c

3179

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/e1000/e1000_82575.c

3192

static void e1000_i2c_start(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

3194

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

sys/dev/e1000/e1000_82575.c

3199

e1000_set_i2c_data(hw, &i2cctl, 1);

sys/dev/e1000/e1000_82575.c

3200

e1000_raise_i2c_clk(hw, &i2cctl);

sys/dev/e1000/e1000_82575.c

3205

e1000_set_i2c_data(hw, &i2cctl, 0);

sys/dev/e1000/e1000_82575.c

3210

e1000_lower_i2c_clk(hw, &i2cctl);

sys/dev/e1000/e1000_82575.c

3223

static void e1000_i2c_stop(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

3225

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

sys/dev/e1000/e1000_82575.c

323

static s32 e1000_init_mac_params_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

3230

e1000_set_i2c_data(hw, &i2cctl, 0);

sys/dev/e1000/e1000_82575.c

3231

e1000_raise_i2c_clk(hw, &i2cctl);

sys/dev/e1000/e1000_82575.c

3236

e1000_set_i2c_data(hw, &i2cctl, 1);

sys/dev/e1000/e1000_82575.c

3249

static void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)

sys/dev/e1000/e1000_82575.c

325

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_82575.c

3258

e1000_clock_in_i2c_bit(hw, &bit);

sys/dev/e1000/e1000_82575.c

326

struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;

sys/dev/e1000/e1000_82575.c

3270

static s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data)

sys/dev/e1000/e1000_82575.c

3281

status = e1000_clock_out_i2c_bit(hw, bit);

sys/dev/e1000/e1000_82575.c

3288

i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

sys/dev/e1000/e1000_82575.c

3291

E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);

sys/dev/e1000/e1000_82575.c

3292

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

3303

static s32 e1000_get_i2c_ack(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

3307

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

sys/dev/e1000/e1000_82575.c

331

e1000_init_mac_ops_generic(hw);

sys/dev/e1000/e1000_82575.c

3313

e1000_raise_i2c_clk(hw, &i2cctl);

sys/dev/e1000/e1000_82575.c

3321

i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

sys/dev/e1000/e1000_82575.c

3334

e1000_lower_i2c_clk(hw, &i2cctl);

sys/dev/e1000/e1000_82575.c

334

e1000_get_media_type_82575(hw);

sys/dev/e1000/e1000_82575.c

3349

static void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)

sys/dev/e1000/e1000_82575.c

3351

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

sys/dev/e1000/e1000_82575.c

3355

e1000_raise_i2c_clk(hw, &i2cctl);

sys/dev/e1000/e1000_82575.c

3360

i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

sys/dev/e1000/e1000_82575.c

3363

e1000_lower_i2c_clk(hw, &i2cctl);

sys/dev/e1000/e1000_82575.c

3376

static s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data)

sys/dev/e1000/e1000_82575.c

3379

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

sys/dev/e1000/e1000_82575.c

338

mac->uta_reg_count = (hw->mac.type == e1000_82575) ? 0 : 128;

sys/dev/e1000/e1000_82575.c

3383

status = e1000_set_i2c_data(hw, &i2cctl, data);

sys/dev/e1000/e1000_82575.c

3385

e1000_raise_i2c_clk(hw, &i2cctl);

sys/dev/e1000/e1000_82575.c

3390

e1000_lower_i2c_clk(hw, &i2cctl);

sys/dev/e1000/e1000_82575.c

3410

static void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl)

sys/dev/e1000/e1000_82575.c

3416

E1000_WRITE_REG(hw, E1000_I2CPARAMS, *i2cctl);

sys/dev/e1000/e1000_82575.c

3417

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

3430

static void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl)

sys/dev/e1000/e1000_82575.c

3437

E1000_WRITE_REG(hw, E1000_I2CPARAMS, *i2cctl);

sys/dev/e1000/e1000_82575.c

3438

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

3452

static s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data)

sys/dev/e1000/e1000_82575.c

3465

E1000_WRITE_REG(hw, E1000_I2CPARAMS, *i2cctl);

sys/dev/e1000/e1000_82575.c

3466

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

3471

*i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

sys/dev/e1000/e1000_82575.c

3507

void e1000_i2c_bus_clear(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

3509

u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);

sys/dev/e1000/e1000_82575.c

3514

e1000_i2c_start(hw);

sys/dev/e1000/e1000_82575.c

3516

e1000_set_i2c_data(hw, &i2cctl, 1);

sys/dev/e1000/e1000_82575.c

3519

e1000_raise_i2c_clk(hw, &i2cctl);

sys/dev/e1000/e1000_82575.c

3524

e1000_lower_i2c_clk(hw, &i2cctl);

sys/dev/e1000/e1000_82575.c

3530

e1000_i2c_start(hw);

sys/dev/e1000/e1000_82575.c

3533

e1000_i2c_stop(hw);

sys/dev/e1000/e1000_82575.c

362

!!(E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK);

sys/dev/e1000/e1000_82575.c

382

(hw->phy.media_type == e1000_media_type_copper)

sys/dev/e1000/e1000_82575.c

396

if (hw->mac.type == e1000_i350 || mac->type == e1000_i354) {

sys/dev/e1000/e1000_82575.c

407

if (hw->mac.type >= e1000_82580)

sys/dev/e1000/e1000_82575.c

431

hw->mac.ops.set_lan_id(hw);

sys/dev/e1000/e1000_82575.c

440

s32 e1000_init_nvm_params_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

442

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_82575.c

443

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_82575.c

462

if (hw->mac.type < e1000_i210) {

sys/dev/e1000/e1000_82575.c

48

static s32 e1000_init_phy_params_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

49

static s32 e1000_init_mac_params_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

50

static s32 e1000_acquire_nvm_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

503

switch (hw->mac.type) {

sys/dev/e1000/e1000_82575.c

51

static void e1000_release_nvm_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

52

static s32 e1000_check_for_link_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

525

void e1000_init_function_pointers_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

529

hw->mac.ops.init_params = e1000_init_mac_params_82575;

sys/dev/e1000/e1000_82575.c

53

static s32 e1000_check_for_link_media_swap(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

530

hw->nvm.ops.init_params = e1000_init_nvm_params_82575;

sys/dev/e1000/e1000_82575.c

531

hw->phy.ops.init_params = e1000_init_phy_params_82575;

sys/dev/e1000/e1000_82575.c

532

hw->mbx.ops.init_params = e1000_init_mbx_params_pf;

sys/dev/e1000/e1000_82575.c

54

static s32 e1000_get_cfg_done_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

544

static s32 e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_82575.c

55

static s32 e1000_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed,

sys/dev/e1000/e1000_82575.c

556

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_82575.c

560

ret_val = e1000_read_phy_reg_i2c(hw, offset, data);

sys/dev/e1000/e1000_82575.c

562

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_82575.c

57

static s32 e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

577

static s32 e1000_write_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_82575.c

58

static s32 e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_82575.c

589

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_82575.c

593

ret_val = e1000_write_phy_reg_i2c(hw, offset, data);

sys/dev/e1000/e1000_82575.c

595

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_82575.c

60

static s32 e1000_reset_hw_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

608

static s32 e1000_get_phy_id_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

61

static s32 e1000_init_hw_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

610

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82575.c

619

if (hw->mac.type == e1000_i354)

sys/dev/e1000/e1000_82575.c

62

static s32 e1000_reset_hw_82580(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

620

e1000_get_phy_id(hw);

sys/dev/e1000/e1000_82575.c

629

if (!e1000_sgmii_active_82575(hw)) {

sys/dev/e1000/e1000_82575.c

63

static s32 e1000_read_phy_reg_82580(struct e1000_hw *hw,

sys/dev/e1000/e1000_82575.c

631

ret_val = e1000_get_phy_id(hw);

sys/dev/e1000/e1000_82575.c

635

if (e1000_sgmii_uses_mdio_82575(hw)) {

sys/dev/e1000/e1000_82575.c

636

switch (hw->mac.type) {

sys/dev/e1000/e1000_82575.c

639

mdic = E1000_READ_REG(hw, E1000_MDIC);

sys/dev/e1000/e1000_82575.c

648

mdic = E1000_READ_REG(hw, E1000_MDICNFG);

sys/dev/e1000/e1000_82575.c

65

static s32 e1000_write_phy_reg_82580(struct e1000_hw *hw,

sys/dev/e1000/e1000_82575.c

657

ret_val = e1000_get_phy_id(hw);

sys/dev/e1000/e1000_82575.c

662

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_82575.c

663

E1000_WRITE_REG(hw, E1000_CTRL_EXT,

sys/dev/e1000/e1000_82575.c

665

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_82575.c

67

static s32 e1000_set_d0_lplu_state_82580(struct e1000_hw *hw,

sys/dev/e1000/e1000_82575.c

673

ret_val = e1000_read_phy_reg_sgmii_82575(hw, PHY_ID1, &phy_id);

sys/dev/e1000/e1000_82575.c

69

static s32 e1000_set_d3_lplu_state_82580(struct e1000_hw *hw,

sys/dev/e1000/e1000_82575.c

694

ret_val = e1000_get_phy_id(hw);

sys/dev/e1000/e1000_82575.c

698

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_82575.c

71

static s32 e1000_set_d0_lplu_state_82575(struct e1000_hw *hw,

sys/dev/e1000/e1000_82575.c

710

static s32 e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

713

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82575.c

724

if (!(hw->phy.ops.write_reg))

sys/dev/e1000/e1000_82575.c

73

static s32 e1000_setup_copper_link_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

731

ret_val = hw->phy.ops.write_reg(hw, 0x1B, 0x8084);

sys/dev/e1000/e1000_82575.c

735

ret_val = hw->phy.ops.commit(hw);

sys/dev/e1000/e1000_82575.c

74

static s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

740

ret_val = e1000_initialize_M88E1512_phy(hw);

sys/dev/e1000/e1000_82575.c

75

static s32 e1000_get_media_type_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

758

static s32 e1000_set_d0_lplu_state_82575(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_82575.c

76

static s32 e1000_set_sfp_media_type_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

760

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82575.c

766

if (!(hw->phy.ops.read_reg))

sys/dev/e1000/e1000_82575.c

769

ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);

sys/dev/e1000/e1000_82575.c

77

static s32 e1000_valid_led_default_82575(struct e1000_hw *hw, u16 *data);

sys/dev/e1000/e1000_82575.c

775

ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,

sys/dev/e1000/e1000_82575.c

78

static s32 e1000_write_phy_reg_sgmii_82575(struct e1000_hw *hw,

sys/dev/e1000/e1000_82575.c

781

ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,

sys/dev/e1000/e1000_82575.c

784

ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,

sys/dev/e1000/e1000_82575.c

790

ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,

sys/dev/e1000/e1000_82575.c

799

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_82575.c

80

static void e1000_clear_hw_cntrs_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

806

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_82575.c

81

static s32 e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,

sys/dev/e1000/e1000_82575.c

812

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_82575.c

819

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_82575.c

83

static s32 e1000_get_phy_id_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

84

static bool e1000_sgmii_active_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

844

static s32 e1000_set_d0_lplu_state_82580(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_82575.c

846

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82575.c

85

static s32 e1000_read_mac_addr_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

851

data = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT);

sys/dev/e1000/e1000_82575.c

86

static void e1000_config_collision_dist_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

87

static void e1000_shutdown_serdes_link_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

873

E1000_WRITE_REG(hw, E1000_82580_PHY_POWER_MGMT, data);

sys/dev/e1000/e1000_82575.c

88

static void e1000_power_up_serdes_link_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

89

static s32 e1000_set_pcie_completion_timeout(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

891

s32 e1000_set_d3_lplu_state_82580(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_82575.c

893

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_82575.c

898

data = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT);

sys/dev/e1000/e1000_82575.c

90

static s32 e1000_reset_mdicnfg_82580(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

91

static s32 e1000_validate_nvm_checksum_82580(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

92

static s32 e1000_update_nvm_checksum_82580(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

920

E1000_WRITE_REG(hw, E1000_82580_PHY_POWER_MGMT, data);

sys/dev/e1000/e1000_82575.c

93

static s32 e1000_update_nvm_checksum_with_offset(struct e1000_hw *hw,

sys/dev/e1000/e1000_82575.c

933

static s32 e1000_acquire_nvm_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

939

ret_val = e1000_acquire_swfw_sync(hw, E1000_SWFW_EEP_SM);

sys/dev/e1000/e1000_82575.c

947

if (hw->mac.type == e1000_i350) {

sys/dev/e1000/e1000_82575.c

948

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_82575.c

95

static s32 e1000_validate_nvm_checksum_with_offset(struct e1000_hw *hw,

sys/dev/e1000/e1000_82575.c

952

E1000_WRITE_REG(hw, E1000_EECD, eecd |

sys/dev/e1000/e1000_82575.c

958

if (hw->mac.type == e1000_82580) {

sys/dev/e1000/e1000_82575.c

959

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_82575.c

962

E1000_WRITE_REG(hw, E1000_EECD, eecd |

sys/dev/e1000/e1000_82575.c

968

ret_val = e1000_acquire_nvm_generic(hw);

sys/dev/e1000/e1000_82575.c

97

static s32 e1000_validate_nvm_checksum_i350(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

970

e1000_release_swfw_sync(hw, E1000_SWFW_EEP_SM);

sys/dev/e1000/e1000_82575.c

98

static s32 e1000_update_nvm_checksum_i350(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.c

983

static void e1000_release_nvm_82575(struct e1000_hw *hw)

sys/dev/e1000/e1000_82575.c

987

e1000_release_nvm_generic(hw);

sys/dev/e1000/e1000_82575.c

989

e1000_release_swfw_sync(hw, E1000_SWFW_EEP_SM);

sys/dev/e1000/e1000_82575.c

99

static void e1000_clear_vfta_i350(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.h

388

s32 e1000_reset_init_script_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.h

389

s32 e1000_init_nvm_params_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.h

393

void e1000_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable);

sys/dev/e1000/e1000_82575.h

394

void e1000_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf);

sys/dev/e1000/e1000_82575.h

395

void e1000_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable);

sys/dev/e1000/e1000_82575.h

409

void e1000_write_vfta_i350(struct e1000_hw *hw, u32 offset, u32 value);

sys/dev/e1000/e1000_82575.h

411

s32 e1000_read_emi_reg(struct e1000_hw *hw, u16 addr, u16 *data);

sys/dev/e1000/e1000_82575.h

412

s32 e1000_set_eee_i350(struct e1000_hw *hw, bool adv1G, bool adv100M);

sys/dev/e1000/e1000_82575.h

413

s32 e1000_set_eee_i354(struct e1000_hw *hw, bool adv1G, bool adv100M);

sys/dev/e1000/e1000_82575.h

415

s32 e1000_initialize_M88E1512_phy(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.h

416

s32 e1000_initialize_M88E1543_phy(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.h

430

s32 e1000_set_i2c_bb(struct e1000_hw *hw);

sys/dev/e1000/e1000_82575.h

431

s32 e1000_read_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset,

sys/dev/e1000/e1000_82575.h

433

s32 e1000_write_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset,

sys/dev/e1000/e1000_82575.h

435

void e1000_i2c_bus_clear(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.c

100

if (hw->phy.ops.init_params) {

sys/dev/e1000/e1000_api.c

1000

return e1000_mng_enable_host_if_generic(hw);

sys/dev/e1000/e1000_api.c

101

ret_val = hw->phy.ops.init_params(hw);

sys/dev/e1000/e1000_api.c

1010

s32 e1000_set_obff_timer(struct e1000_hw *hw, u32 itr)

sys/dev/e1000/e1000_api.c

1012

if (hw->mac.ops.set_obff_timer)

sys/dev/e1000/e1000_api.c

1013

return hw->mac.ops.set_obff_timer(hw, itr);

sys/dev/e1000/e1000_api.c

1025

s32 e1000_check_reset_block(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1027

if (hw->phy.ops.check_reset_block)

sys/dev/e1000/e1000_api.c

1028

return hw->phy.ops.check_reset_block(hw);

sys/dev/e1000/e1000_api.c

1042

s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_api.c

1044

if (hw->phy.ops.read_reg)

sys/dev/e1000/e1000_api.c

1045

return hw->phy.ops.read_reg(hw, offset, data);

sys/dev/e1000/e1000_api.c

1059

s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_api.c

1061

if (hw->phy.ops.write_reg)

sys/dev/e1000/e1000_api.c

1062

return hw->phy.ops.write_reg(hw, offset, data);

sys/dev/e1000/e1000_api.c

1074

void e1000_release_phy(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1076

if (hw->phy.ops.release)

sys/dev/e1000/e1000_api.c

1077

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_api.c

1087

s32 e1000_acquire_phy(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1089

if (hw->phy.ops.acquire)

sys/dev/e1000/e1000_api.c

1090

return hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_api.c

1099

s32 e1000_cfg_on_link_up(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1101

if (hw->phy.ops.cfg_on_link_up)

sys/dev/e1000/e1000_api.c

1102

return hw->phy.ops.cfg_on_link_up(hw);

sys/dev/e1000/e1000_api.c

1117

s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_api.c

1119

return e1000_read_kmrn_reg_generic(hw, offset, data);

sys/dev/e1000/e1000_api.c

1132

s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_api.c

1134

return e1000_write_kmrn_reg_generic(hw, offset, data);

sys/dev/e1000/e1000_api.c

1145

s32 e1000_get_cable_length(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1147

if (hw->phy.ops.get_cable_length)

sys/dev/e1000/e1000_api.c

1148

return hw->phy.ops.get_cable_length(hw);

sys/dev/e1000/e1000_api.c

1161

s32 e1000_get_phy_info(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1163

if (hw->phy.ops.get_info)

sys/dev/e1000/e1000_api.c

1164

return hw->phy.ops.get_info(hw);

sys/dev/e1000/e1000_api.c

1176

s32 e1000_phy_hw_reset(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1178

if (hw->phy.ops.reset)

sys/dev/e1000/e1000_api.c

1179

return hw->phy.ops.reset(hw);

sys/dev/e1000/e1000_api.c

1191

s32 e1000_phy_commit(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1193

if (hw->phy.ops.commit)

sys/dev/e1000/e1000_api.c

1194

return hw->phy.ops.commit(hw);

sys/dev/e1000/e1000_api.c

1213

s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_api.c

1215

if (hw->phy.ops.set_d0_lplu_state)

sys/dev/e1000/e1000_api.c

1216

return hw->phy.ops.set_d0_lplu_state(hw, active);

sys/dev/e1000/e1000_api.c

122

s32 e1000_init_mbx_params(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1235

s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_api.c

1237

if (hw->phy.ops.set_d3_lplu_state)

sys/dev/e1000/e1000_api.c

1238

return hw->phy.ops.set_d3_lplu_state(hw, active);

sys/dev/e1000/e1000_api.c

1251

s32 e1000_read_mac_addr(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1253

if (hw->mac.ops.read_mac_addr)

sys/dev/e1000/e1000_api.c

1254

return hw->mac.ops.read_mac_addr(hw);

sys/dev/e1000/e1000_api.c

1256

return e1000_read_mac_addr_generic(hw);

sys/dev/e1000/e1000_api.c

126

if (hw->mbx.ops.init_params) {

sys/dev/e1000/e1000_api.c

127

ret_val = hw->mbx.ops.init_params(hw);

sys/dev/e1000/e1000_api.c

1270

s32 e1000_read_pba_string(struct e1000_hw *hw, u8 *pba_num, u32 pba_num_size)

sys/dev/e1000/e1000_api.c

1272

return e1000_read_pba_string_generic(hw, pba_num, pba_num_size);

sys/dev/e1000/e1000_api.c

1285

s32 e1000_read_pba_length(struct e1000_hw *hw, u32 *pba_num_size)

sys/dev/e1000/e1000_api.c

1287

return e1000_read_pba_length_generic(hw, pba_num_size);

sys/dev/e1000/e1000_api.c

1300

s32 e1000_read_pba_num(struct e1000_hw *hw, u32 *pba_num)

sys/dev/e1000/e1000_api.c

1302

return e1000_read_pba_num_generic(hw, pba_num);

sys/dev/e1000/e1000_api.c

1312

s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1314

if (hw->nvm.ops.validate)

sys/dev/e1000/e1000_api.c

1315

return hw->nvm.ops.validate(hw);

sys/dev/e1000/e1000_api.c

1327

s32 e1000_update_nvm_checksum(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1329

if (hw->nvm.ops.update)

sys/dev/e1000/e1000_api.c

1330

return hw->nvm.ops.update(hw);

sys/dev/e1000/e1000_api.c

1342

void e1000_reload_nvm(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1344

if (hw->nvm.ops.reload)

sys/dev/e1000/e1000_api.c

1345

hw->nvm.ops.reload(hw);

sys/dev/e1000/e1000_api.c

1358

s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/e1000/e1000_api.c

1360

if (hw->nvm.ops.read)

sys/dev/e1000/e1000_api.c

1361

return hw->nvm.ops.read(hw, offset, words, data);

sys/dev/e1000/e1000_api.c

1376

s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/e1000/e1000_api.c

1378

if (hw->nvm.ops.write)

sys/dev/e1000/e1000_api.c

1379

return hw->nvm.ops.write(hw, offset, words, data);

sys/dev/e1000/e1000_api.c

1394

s32 e1000_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, u32 offset,

sys/dev/e1000/e1000_api.c

1397

return e1000_write_8bit_ctrl_reg_generic(hw, reg, offset, data);

sys/dev/e1000/e1000_api.c

1407

void e1000_power_up_phy(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1409

if (hw->phy.ops.power_up)

sys/dev/e1000/e1000_api.c

1410

hw->phy.ops.power_up(hw);

sys/dev/e1000/e1000_api.c

1412

e1000_setup_link(hw);

sys/dev/e1000/e1000_api.c

1422

void e1000_power_down_phy(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1424

if (hw->phy.ops.power_down)

sys/dev/e1000/e1000_api.c

1425

hw->phy.ops.power_down(hw);

sys/dev/e1000/e1000_api.c

1434

void e1000_power_up_fiber_serdes_link(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1436

if (hw->mac.ops.power_up_serdes)

sys/dev/e1000/e1000_api.c

1437

hw->mac.ops.power_up_serdes(hw);

sys/dev/e1000/e1000_api.c

1446

void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

1448

if (hw->mac.ops.shutdown_serdes)

sys/dev/e1000/e1000_api.c

1449

hw->mac.ops.shutdown_serdes(hw);

sys/dev/e1000/e1000_api.c

150

s32 e1000_set_mac_type(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

152

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_api.c

157

switch (hw->device_id) {

sys/dev/e1000/e1000_api.c

44

s32 e1000_init_mac_params(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

450

s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device)

sys/dev/e1000/e1000_api.c

455

ret_val = e1000_set_mac_type(hw);

sys/dev/e1000/e1000_api.c

461

if (!hw->hw_addr) {

sys/dev/e1000/e1000_api.c

471

e1000_init_mac_ops_generic(hw);

sys/dev/e1000/e1000_api.c

472

e1000_init_phy_ops_generic(hw);

sys/dev/e1000/e1000_api.c

473

e1000_init_nvm_ops_generic(hw);

sys/dev/e1000/e1000_api.c

474

e1000_init_mbx_ops_generic(hw);

sys/dev/e1000/e1000_api.c

48

if (hw->mac.ops.init_params) {

sys/dev/e1000/e1000_api.c

481

switch (hw->mac.type) {

sys/dev/e1000/e1000_api.c

483

e1000_init_function_pointers_82542(hw);

sys/dev/e1000/e1000_api.c

487

e1000_init_function_pointers_82543(hw);

sys/dev/e1000/e1000_api.c

49

ret_val = hw->mac.ops.init_params(hw);

sys/dev/e1000/e1000_api.c

494

e1000_init_function_pointers_82540(hw);

sys/dev/e1000/e1000_api.c

500

e1000_init_function_pointers_82541(hw);

sys/dev/e1000/e1000_api.c

507

e1000_init_function_pointers_82571(hw);

sys/dev/e1000/e1000_api.c

510

e1000_init_function_pointers_80003es2lan(hw);

sys/dev/e1000/e1000_api.c

524

e1000_init_function_pointers_ich8lan(hw);

sys/dev/e1000/e1000_api.c

531

e1000_init_function_pointers_82575(hw);

sys/dev/e1000/e1000_api.c

535

e1000_init_function_pointers_i210(hw);

sys/dev/e1000/e1000_api.c

538

e1000_init_function_pointers_vf(hw);

sys/dev/e1000/e1000_api.c

541

e1000_init_function_pointers_vf(hw);

sys/dev/e1000/e1000_api.c

554

ret_val = e1000_init_mac_params(hw);

sys/dev/e1000/e1000_api.c

558

ret_val = e1000_init_nvm_params(hw);

sys/dev/e1000/e1000_api.c

562

ret_val = e1000_init_phy_params(hw);

sys/dev/e1000/e1000_api.c

566

ret_val = e1000_init_mbx_params(hw);

sys/dev/e1000/e1000_api.c

583

s32 e1000_get_bus_info(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

585

if (hw->mac.ops.get_bus_info)

sys/dev/e1000/e1000_api.c

586

return hw->mac.ops.get_bus_info(hw);

sys/dev/e1000/e1000_api.c

598

void e1000_clear_vfta(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

600

if (hw->mac.ops.clear_vfta)

sys/dev/e1000/e1000_api.c

601

hw->mac.ops.clear_vfta(hw);

sys/dev/e1000/e1000_api.c

613

void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)

sys/dev/e1000/e1000_api.c

615

if (hw->mac.ops.write_vfta)

sys/dev/e1000/e1000_api.c

616

hw->mac.ops.write_vfta(hw, offset, value);

sys/dev/e1000/e1000_api.c

628

void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,

sys/dev/e1000/e1000_api.c

631

if (hw->mac.ops.update_mc_addr_list)

sys/dev/e1000/e1000_api.c

632

hw->mac.ops.update_mc_addr_list(hw, mc_addr_list,

sys/dev/e1000/e1000_api.c

644

s32 e1000_force_mac_fc(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

646

return e1000_force_mac_fc_generic(hw);

sys/dev/e1000/e1000_api.c

657

s32 e1000_check_for_link(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

659

if (hw->mac.ops.check_for_link)

sys/dev/e1000/e1000_api.c

660

return hw->mac.ops.check_for_link(hw);

sys/dev/e1000/e1000_api.c

672

bool e1000_check_mng_mode(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

674

if (hw->mac.ops.check_mng_mode)

sys/dev/e1000/e1000_api.c

675

return hw->mac.ops.check_mng_mode(hw);

sys/dev/e1000/e1000_api.c

688

s32 e1000_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length)

sys/dev/e1000/e1000_api.c

690

return e1000_mng_write_dhcp_info_generic(hw, buffer, length);

sys/dev/e1000/e1000_api.c

70

s32 e1000_init_nvm_params(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

700

s32 e1000_reset_hw(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

702

if (hw->mac.ops.reset_hw)

sys/dev/e1000/e1000_api.c

703

return hw->mac.ops.reset_hw(hw);

sys/dev/e1000/e1000_api.c

715

s32 e1000_init_hw(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

717

if (hw->mac.ops.init_hw)

sys/dev/e1000/e1000_api.c

718

return hw->mac.ops.init_hw(hw);

sys/dev/e1000/e1000_api.c

731

s32 e1000_setup_link(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

733

if (hw->mac.ops.setup_link)

sys/dev/e1000/e1000_api.c

734

return hw->mac.ops.setup_link(hw);

sys/dev/e1000/e1000_api.c

74

if (hw->nvm.ops.init_params) {

sys/dev/e1000/e1000_api.c

749

s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex)

sys/dev/e1000/e1000_api.c

75

ret_val = hw->nvm.ops.init_params(hw);

sys/dev/e1000/e1000_api.c

751

if (hw->mac.ops.get_link_up_info)

sys/dev/e1000/e1000_api.c

752

return hw->mac.ops.get_link_up_info(hw, speed, duplex);

sys/dev/e1000/e1000_api.c

765

s32 e1000_setup_led(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

767

if (hw->mac.ops.setup_led)

sys/dev/e1000/e1000_api.c

768

return hw->mac.ops.setup_led(hw);

sys/dev/e1000/e1000_api.c

780

s32 e1000_cleanup_led(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

782

if (hw->mac.ops.cleanup_led)

sys/dev/e1000/e1000_api.c

783

return hw->mac.ops.cleanup_led(hw);

sys/dev/e1000/e1000_api.c

796

s32 e1000_blink_led(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

798

if (hw->mac.ops.blink_led)

sys/dev/e1000/e1000_api.c

799

return hw->mac.ops.blink_led(hw);

sys/dev/e1000/e1000_api.c

811

s32 e1000_id_led_init(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

813

if (hw->mac.ops.id_led_init)

sys/dev/e1000/e1000_api.c

814

return hw->mac.ops.id_led_init(hw);

sys/dev/e1000/e1000_api.c

826

s32 e1000_led_on(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

828

if (hw->mac.ops.led_on)

sys/dev/e1000/e1000_api.c

829

return hw->mac.ops.led_on(hw);

sys/dev/e1000/e1000_api.c

841

s32 e1000_led_off(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

843

if (hw->mac.ops.led_off)

sys/dev/e1000/e1000_api.c

844

return hw->mac.ops.led_off(hw);

sys/dev/e1000/e1000_api.c

856

void e1000_reset_adaptive(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

858

e1000_reset_adaptive_generic(hw);

sys/dev/e1000/e1000_api.c

868

void e1000_update_adaptive(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

870

e1000_update_adaptive_generic(hw);

sys/dev/e1000/e1000_api.c

881

s32 e1000_disable_pcie_master(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

883

return e1000_disable_pcie_master_generic(hw);

sys/dev/e1000/e1000_api.c

893

void e1000_config_collision_dist(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

895

if (hw->mac.ops.config_collision_dist)

sys/dev/e1000/e1000_api.c

896

hw->mac.ops.config_collision_dist(hw);

sys/dev/e1000/e1000_api.c

907

int e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)

sys/dev/e1000/e1000_api.c

909

if (hw->mac.ops.rar_set)

sys/dev/e1000/e1000_api.c

910

return hw->mac.ops.rar_set(hw, addr, index);

sys/dev/e1000/e1000_api.c

921

s32 e1000_validate_mdi_setting(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

923

if (hw->mac.ops.validate_mdi_setting)

sys/dev/e1000/e1000_api.c

924

return hw->mac.ops.validate_mdi_setting(hw);

sys/dev/e1000/e1000_api.c

938

u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)

sys/dev/e1000/e1000_api.c

940

return e1000_hash_mc_addr_generic(hw, mc_addr);

sys/dev/e1000/e1000_api.c

952

bool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

954

return e1000_enable_tx_pkt_filtering_generic(hw);

sys/dev/e1000/e1000_api.c

96

s32 e1000_init_phy_params(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.c

969

s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer, u16 length,

sys/dev/e1000/e1000_api.c

972

return e1000_mng_host_if_write_generic(hw, buffer, length, offset, sum);

sys/dev/e1000/e1000_api.c

982

s32 e1000_mng_write_cmd_header(struct e1000_hw *hw,

sys/dev/e1000/e1000_api.c

985

return e1000_mng_write_cmd_header_generic(hw, hdr);

sys/dev/e1000/e1000_api.c

998

s32 e1000_mng_enable_host_if(struct e1000_hw *hw)

sys/dev/e1000/e1000_api.h

100

s32 e1000_read_pba_string(struct e1000_hw *hw, u8 *pba_num, u32 pba_num_size);

sys/dev/e1000/e1000_api.h

101

s32 e1000_read_pba_length(struct e1000_hw *hw, u32 *pba_num_size);

sys/dev/e1000/e1000_api.h

102

void e1000_reload_nvm(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

103

s32 e1000_update_nvm_checksum(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

104

s32 e1000_validate_nvm_checksum(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

105

s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);

sys/dev/e1000/e1000_api.h

106

s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_api.h

107

s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_api.h

108

s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);

sys/dev/e1000/e1000_api.h

109

s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);

sys/dev/e1000/e1000_api.h

110

s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active);

sys/dev/e1000/e1000_api.h

111

bool e1000_check_mng_mode(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

112

bool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

113

s32 e1000_mng_enable_host_if(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

114

s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer, u16 length,

sys/dev/e1000/e1000_api.h

116

s32 e1000_mng_write_cmd_header(struct e1000_hw *hw,

sys/dev/e1000/e1000_api.h

118

s32 e1000_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);

sys/dev/e1000/e1000_api.h

40

extern void e1000_init_function_pointers_82542(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

41

extern void e1000_init_function_pointers_82543(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

42

extern void e1000_init_function_pointers_82540(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

43

extern void e1000_init_function_pointers_82571(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

44

extern void e1000_init_function_pointers_82541(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

45

extern void e1000_init_function_pointers_80003es2lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

46

extern void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

47

extern void e1000_init_function_pointers_82575(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

48

extern void e1000_init_function_pointers_vf(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

49

extern void e1000_power_up_fiber_serdes_link(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

50

extern void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

51

extern void e1000_init_function_pointers_i210(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

53

s32 e1000_set_obff_timer(struct e1000_hw *hw, u32 itr);

sys/dev/e1000/e1000_api.h

54

s32 e1000_set_mac_type(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

55

s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device);

sys/dev/e1000/e1000_api.h

56

s32 e1000_init_mac_params(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

57

s32 e1000_init_nvm_params(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

58

s32 e1000_init_phy_params(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

59

s32 e1000_init_mbx_params(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

60

s32 e1000_get_bus_info(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

61

void e1000_clear_vfta(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

62

void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);

sys/dev/e1000/e1000_api.h

63

s32 e1000_force_mac_fc(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

64

s32 e1000_check_for_link(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

65

s32 e1000_reset_hw(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

66

s32 e1000_init_hw(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

67

s32 e1000_setup_link(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

68

s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex);

sys/dev/e1000/e1000_api.h

69

s32 e1000_disable_pcie_master(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

70

void e1000_config_collision_dist(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

71

int e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);

sys/dev/e1000/e1000_api.h

72

u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr);

sys/dev/e1000/e1000_api.h

73

void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,

sys/dev/e1000/e1000_api.h

75

s32 e1000_setup_led(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

76

s32 e1000_cleanup_led(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

77

s32 e1000_check_reset_block(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

78

s32 e1000_blink_led(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

79

s32 e1000_led_on(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

80

s32 e1000_led_off(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

81

s32 e1000_id_led_init(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

82

void e1000_reset_adaptive(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

83

void e1000_update_adaptive(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

84

s32 e1000_get_cable_length(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

85

s32 e1000_validate_mdi_setting(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

86

s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_api.h

87

s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_api.h

88

s32 e1000_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, u32 offset,

sys/dev/e1000/e1000_api.h

90

s32 e1000_get_phy_info(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

91

void e1000_release_phy(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

92

s32 e1000_acquire_phy(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

93

s32 e1000_cfg_on_link_up(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

94

s32 e1000_phy_hw_reset(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

95

s32 e1000_phy_commit(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

96

void e1000_power_up_phy(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

97

void e1000_power_down_phy(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

98

s32 e1000_read_mac_addr(struct e1000_hw *hw);

sys/dev/e1000/e1000_api.h

99

s32 e1000_read_pba_num(struct e1000_hw *hw, u32 *part_num);

sys/dev/e1000/e1000_base.c

100

e1000_init_rx_addrs_generic(hw, rar_count);

sys/dev/e1000/e1000_base.c

105

E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);

sys/dev/e1000/e1000_base.c

110

E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, 0);

sys/dev/e1000/e1000_base.c

113

ret_val = mac->ops.setup_link(hw);

sys/dev/e1000/e1000_base.c

120

e1000_clear_hw_cntrs_base_generic(hw);

sys/dev/e1000/e1000_base.c

132

void e1000_power_down_phy_copper_base(struct e1000_hw *hw)

sys/dev/e1000/e1000_base.c

134

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_base.c

140

if (!(e1000_enable_mng_pass_thru(hw) || phy->ops.check_reset_block(hw)))

sys/dev/e1000/e1000_base.c

141

e1000_power_down_phy_copper(hw);

sys/dev/e1000/e1000_base.c

153

void e1000_rx_fifo_flush_base(struct e1000_hw *hw)

sys/dev/e1000/e1000_base.c

161

rfctl = E1000_READ_REG(hw, E1000_RFCTL);

sys/dev/e1000/e1000_base.c

163

E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);

sys/dev/e1000/e1000_base.c

165

if (hw->mac.type != e1000_82575 ||

sys/dev/e1000/e1000_base.c

166

!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_RCV_TCO_EN))

sys/dev/e1000/e1000_base.c

171

rxdctl[i] = E1000_READ_REG(hw, E1000_RXDCTL(i));

sys/dev/e1000/e1000_base.c

172

E1000_WRITE_REG(hw, E1000_RXDCTL(i),

sys/dev/e1000/e1000_base.c

180

rx_enabled |= E1000_READ_REG(hw, E1000_RXDCTL(i));

sys/dev/e1000/e1000_base.c

192

E1000_WRITE_REG(hw, E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF);

sys/dev/e1000/e1000_base.c

194

rlpml = E1000_READ_REG(hw, E1000_RLPML);

sys/dev/e1000/e1000_base.c

195

E1000_WRITE_REG(hw, E1000_RLPML, 0);

sys/dev/e1000/e1000_base.c

197

rctl = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/e1000_base.c

201

E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl);

sys/dev/e1000/e1000_base.c

202

E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl | E1000_RCTL_EN);

sys/dev/e1000/e1000_base.c

203

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_base.c

210

E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl[i]);

sys/dev/e1000/e1000_base.c

211

E1000_WRITE_REG(hw, E1000_RCTL, rctl);

sys/dev/e1000/e1000_base.c

212

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_base.c

214

E1000_WRITE_REG(hw, E1000_RLPML, rlpml);

sys/dev/e1000/e1000_base.c

215

E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);

sys/dev/e1000/e1000_base.c

218

E1000_READ_REG(hw, E1000_ROC);

sys/dev/e1000/e1000_base.c

219

E1000_READ_REG(hw, E1000_RNBC);

sys/dev/e1000/e1000_base.c

220

E1000_READ_REG(hw, E1000_MPC);

sys/dev/e1000/e1000_base.c

47

s32 e1000_acquire_phy_base(struct e1000_hw *hw)

sys/dev/e1000/e1000_base.c

53

if (hw->bus.func == E1000_FUNC_1)

sys/dev/e1000/e1000_base.c

55

else if (hw->bus.func == E1000_FUNC_2)

sys/dev/e1000/e1000_base.c

57

else if (hw->bus.func == E1000_FUNC_3)

sys/dev/e1000/e1000_base.c

60

return hw->mac.ops.acquire_swfw_sync(hw, mask);

sys/dev/e1000/e1000_base.c

69

void e1000_release_phy_base(struct e1000_hw *hw)

sys/dev/e1000/e1000_base.c

75

if (hw->bus.func == E1000_FUNC_1)

sys/dev/e1000/e1000_base.c

77

else if (hw->bus.func == E1000_FUNC_2)

sys/dev/e1000/e1000_base.c

79

else if (hw->bus.func == E1000_FUNC_3)

sys/dev/e1000/e1000_base.c

82

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/e1000/e1000_base.c

91

s32 e1000_init_hw_base(struct e1000_hw *hw)

sys/dev/e1000/e1000_base.c

93

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_base.h

39

s32 e1000_init_hw_base(struct e1000_hw *hw);

sys/dev/e1000/e1000_base.h

40

void e1000_power_down_phy_copper_base(struct e1000_hw *hw);

sys/dev/e1000/e1000_base.h

41

extern void e1000_rx_fifo_flush_base(struct e1000_hw *hw);

sys/dev/e1000/e1000_base.h

42

s32 e1000_acquire_phy_base(struct e1000_hw *hw);

sys/dev/e1000/e1000_base.h

43

void e1000_release_phy_base(struct e1000_hw *hw);

sys/dev/e1000/e1000_hw.h

1082

void e1000_pci_clear_mwi(struct e1000_hw *hw);

sys/dev/e1000/e1000_hw.h

1083

void e1000_pci_set_mwi(struct e1000_hw *hw);

sys/dev/e1000/e1000_hw.h

1084

s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/e1000/e1000_hw.h

1085

s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/e1000/e1000_hw.h

1086

void e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/e1000/e1000_hw.h

1087

void e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/e1000/e1000_hw.h

793

s32 (*get_cfg_done)(struct e1000_hw *hw);

sys/dev/e1000/e1000_hw.h

940

s32 (*init_params)(struct e1000_hw *hw);

sys/dev/e1000/e1000_i210.c

103

if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {

sys/dev/e1000/e1000_i210.c

104

status = e1000_read_nvm_eerd(hw, offset, count,

sys/dev/e1000/e1000_i210.c

106

hw->nvm.ops.release(hw);

sys/dev/e1000/e1000_i210.c

134

s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_i210.c

148

if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {

sys/dev/e1000/e1000_i210.c

149

status = e1000_write_nvm_srwr(hw, offset, count,

sys/dev/e1000/e1000_i210.c

151

hw->nvm.ops.release(hw);

sys/dev/e1000/e1000_i210.c

175

static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_i210.c

178

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_i210.c

203

E1000_WRITE_REG(hw, E1000_SRWR, eewr);

sys/dev/e1000/e1000_i210.c

207

E1000_READ_REG(hw, E1000_SRWR)) {

sys/dev/e1000/e1000_i210.c

232

static s32 e1000_read_invm_word_i210(struct e1000_hw *hw, u8 address, u16 *data)

sys/dev/e1000/e1000_i210.c

242

invm_dword = E1000_READ_REG(hw, E1000_INVM_DATA_REG(i));

sys/dev/e1000/e1000_i210.c

274

static s32 e1000_read_invm_i210(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_i210.c

284

ret_val = e1000_read_invm_word_i210(hw, (u8)offset, &data[0]);

sys/dev/e1000/e1000_i210.c

285

ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 1,

sys/dev/e1000/e1000_i210.c

287

ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 2,

sys/dev/e1000/e1000_i210.c

293

ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);

sys/dev/e1000/e1000_i210.c

300

ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);

sys/dev/e1000/e1000_i210.c

307

ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);

sys/dev/e1000/e1000_i210.c

314

ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);

sys/dev/e1000/e1000_i210.c

321

ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);

sys/dev/e1000/e1000_i210.c

328

*data = hw->subsystem_device_id;

sys/dev/e1000/e1000_i210.c

331

*data = hw->subsystem_vendor_id;

sys/dev/e1000/e1000_i210.c

334

*data = hw->device_id;

sys/dev/e1000/e1000_i210.c

337

*data = hw->vendor_id;

sys/dev/e1000/e1000_i210.c

354

s32 e1000_read_invm_version(struct e1000_hw *hw,

sys/dev/e1000/e1000_i210.c

371

invm_dword = E1000_READ_REG(hw, E1000_INVM_DATA_REG(i));

sys/dev/e1000/e1000_i210.c

38

static s32 e1000_acquire_nvm_i210(struct e1000_hw *hw);

sys/dev/e1000/e1000_i210.c

39

static void e1000_release_nvm_i210(struct e1000_hw *hw);

sys/dev/e1000/e1000_i210.c

40

static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_i210.c

42

static s32 e1000_pool_flash_update_done_i210(struct e1000_hw *hw);

sys/dev/e1000/e1000_i210.c

43

static s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data);

sys/dev/e1000/e1000_i210.c

453

s32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

460

if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {

sys/dev/e1000/e1000_i210.c

467

read_op_ptr = hw->nvm.ops.read;

sys/dev/e1000/e1000_i210.c

468

hw->nvm.ops.read = e1000_read_nvm_eerd;

sys/dev/e1000/e1000_i210.c

470

status = e1000_validate_nvm_checksum_generic(hw);

sys/dev/e1000/e1000_i210.c

473

hw->nvm.ops.read = read_op_ptr;

sys/dev/e1000/e1000_i210.c

475

hw->nvm.ops.release(hw);

sys/dev/e1000/e1000_i210.c

492

s32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

505

ret_val = e1000_read_nvm_eerd(hw, 0, 1, &nvm_data);

sys/dev/e1000/e1000_i210.c

511

if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {

sys/dev/e1000/e1000_i210.c

519

ret_val = e1000_read_nvm_eerd(hw, i, 1, &nvm_data);

sys/dev/e1000/e1000_i210.c

521

hw->nvm.ops.release(hw);

sys/dev/e1000/e1000_i210.c

528

ret_val = e1000_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,

sys/dev/e1000/e1000_i210.c

531

hw->nvm.ops.release(hw);

sys/dev/e1000/e1000_i210.c

536

hw->nvm.ops.release(hw);

sys/dev/e1000/e1000_i210.c

538

ret_val = e1000_update_flash_i210(hw);

sys/dev/e1000/e1000_i210.c

54

static s32 e1000_acquire_nvm_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

551

bool e1000_get_flash_presence_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

558

eec = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_i210.c

571

s32 e1000_update_flash_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

578

ret_val = e1000_pool_flash_update_done_i210(hw);

sys/dev/e1000/e1000_i210.c

584

flup = E1000_READ_REG(hw, E1000_EECD) | E1000_EECD_FLUPD_I210;

sys/dev/e1000/e1000_i210.c

585

E1000_WRITE_REG(hw, E1000_EECD, flup);

sys/dev/e1000/e1000_i210.c

587

ret_val = e1000_pool_flash_update_done_i210(hw);

sys/dev/e1000/e1000_i210.c

60

ret_val = e1000_acquire_swfw_sync(hw, E1000_SWFW_EEP_SM);

sys/dev/e1000/e1000_i210.c

602

s32 e1000_pool_flash_update_done_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

610

reg = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_i210.c

627

static s32 e1000_init_nvm_params_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

630

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_i210.c

634

ret_val = e1000_init_nvm_params_82575(hw);

sys/dev/e1000/e1000_i210.c

638

if (e1000_get_flash_presence_i210(hw)) {

sys/dev/e1000/e1000_i210.c

639

hw->nvm.type = e1000_nvm_flash_hw;

sys/dev/e1000/e1000_i210.c

645

hw->nvm.type = e1000_nvm_invm;

sys/dev/e1000/e1000_i210.c

660

void e1000_init_function_pointers_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

662

e1000_init_function_pointers_82575(hw);

sys/dev/e1000/e1000_i210.c

663

hw->nvm.ops.init_params = e1000_init_nvm_params_i210;

sys/dev/e1000/e1000_i210.c

674

static s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data)

sys/dev/e1000/e1000_i210.c

680

ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);

sys/dev/e1000/e1000_i210.c

687

switch (hw->phy.media_type) {

sys/dev/e1000/e1000_i210.c

708

static s32 e1000_pll_workaround_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

716

hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_i210.c

718

wuc = E1000_READ_REG(hw, E1000_WUC);

sys/dev/e1000/e1000_i210.c

719

mdicnfg = E1000_READ_REG(hw, E1000_MDICNFG);

sys/dev/e1000/e1000_i210.c

72

static void e1000_release_nvm_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

721

E1000_WRITE_REG(hw, E1000_MDICNFG, reg_val);

sys/dev/e1000/e1000_i210.c

724

ret_val = e1000_read_invm_word_i210(hw, E1000_INVM_AUTOLOAD,

sys/dev/e1000/e1000_i210.c

732

e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0xFC);

sys/dev/e1000/e1000_i210.c

734

e1000_read_phy_reg_mdic(hw, E1000_PHY_PLL_FREQ_REG, &phy_word);

sys/dev/e1000/e1000_i210.c

736

e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0);

sys/dev/e1000/e1000_i210.c

745

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_i210.c

746

E1000_WRITE_REG(hw, E1000_CTRL, ctrl|E1000_CTRL_PHY_RST);

sys/dev/e1000/e1000_i210.c

748

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_i210.c

750

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_i210.c

752

E1000_WRITE_REG(hw, E1000_WUC, 0);

sys/dev/e1000/e1000_i210.c

754

E1000_WRITE_REG(hw, E1000_EEARBC_I210, reg_val);

sys/dev/e1000/e1000_i210.c

756

e1000_read_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);

sys/dev/e1000/e1000_i210.c

758

e1000_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);

sys/dev/e1000/e1000_i210.c

76

e1000_release_swfw_sync(hw, E1000_SWFW_EEP_SM);

sys/dev/e1000/e1000_i210.c

761

e1000_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);

sys/dev/e1000/e1000_i210.c

763

E1000_WRITE_REG(hw, E1000_EEARBC_I210, reg_val);

sys/dev/e1000/e1000_i210.c

766

E1000_WRITE_REG(hw, E1000_WUC, wuc);

sys/dev/e1000/e1000_i210.c

769

E1000_WRITE_REG(hw, E1000_MDICNFG, mdicnfg);

sys/dev/e1000/e1000_i210.c

771

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_i210.c

785

static s32 e1000_get_cfg_done_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

793

if (E1000_READ_REG(hw, E1000_EEMNGCTL_I210) & mask)

sys/dev/e1000/e1000_i210.c

810

s32 e1000_init_hw_i210(struct e1000_hw *hw)

sys/dev/e1000/e1000_i210.c

812

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_i210.c

816

if ((hw->mac.type >= e1000_i210) &&

sys/dev/e1000/e1000_i210.c

817

!(e1000_get_flash_presence_i210(hw))) {

sys/dev/e1000/e1000_i210.c

818

ret_val = e1000_pll_workaround_i210(hw);

sys/dev/e1000/e1000_i210.c

822

hw->phy.ops.get_cfg_done = e1000_get_cfg_done_i210;

sys/dev/e1000/e1000_i210.c

825

mac->ops.id_led_init(hw);

sys/dev/e1000/e1000_i210.c

827

ret_val = e1000_init_hw_base(hw);

sys/dev/e1000/e1000_i210.c

89

s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_i210.h

38

bool e1000_get_flash_presence_i210(struct e1000_hw *hw);

sys/dev/e1000/e1000_i210.h

39

s32 e1000_update_flash_i210(struct e1000_hw *hw);

sys/dev/e1000/e1000_i210.h

40

s32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw);

sys/dev/e1000/e1000_i210.h

41

s32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw);

sys/dev/e1000/e1000_i210.h

42

s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_i210.h

44

s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_i210.h

46

s32 e1000_read_invm_version(struct e1000_hw *hw,

sys/dev/e1000/e1000_i210.h

48

s32 e1000_init_hw_i210(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

100

static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1003

ret_val = hw->phy.ops.write_reg_locked(hw, I82579_LPI_CTRL, lpi_ctrl);

sys/dev/e1000/e1000_ich8lan.c

1005

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

101

static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

102

static s32 e1000_update_nvm_checksum_spt(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1021

static s32 e1000_k1_workaround_lpt_lp(struct e1000_hw *hw, bool link)

sys/dev/e1000/e1000_ich8lan.c

1023

u32 fextnvm6 = E1000_READ_REG(hw, E1000_FEXTNVM6);

sys/dev/e1000/e1000_ich8lan.c

1024

u32 status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_ich8lan.c

1029

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

103

static s32 e1000_valid_led_default_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

1034

e1000_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG,

sys/dev/e1000/e1000_ich8lan.c

1040

e1000_write_kmrn_reg_locked(hw,

sys/dev/e1000/e1000_ich8lan.c

1049

E1000_WRITE_REG(hw, E1000_FEXTNVM6,

sys/dev/e1000/e1000_ich8lan.c

105

static s32 e1000_id_led_init_pchlan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1053

e1000_write_kmrn_reg_locked(hw,

sys/dev/e1000/e1000_ich8lan.c

1057

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

106

static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1062

if ((hw->phy.revision > 5) || !link ||

sys/dev/e1000/e1000_ich8lan.c

1067

ret_val = hw->phy.ops.read_reg(hw, I217_INBAND_CTRL, &reg);

sys/dev/e1000/e1000_ich8lan.c

107

static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

108

static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1089

ret_val = hw->phy.ops.write_reg(hw, I217_INBAND_CTRL, reg);

sys/dev/e1000/e1000_ich8lan.c

109

static s32 e1000_setup_link_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1094

E1000_WRITE_REG(hw, E1000_FEXTNVM6, fextnvm6);

sys/dev/e1000/e1000_ich8lan.c

110

static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

111

static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

112

static s32 e1000_get_link_up_info_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

1130

static s32 e1000_platform_pm_pch_lpt(struct e1000_hw *hw, bool link)

sys/dev/e1000/e1000_ich8lan.c

114

static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1147

if (!hw->mac.max_frame_size) {

sys/dev/e1000/e1000_ich8lan.c

115

static s32 e1000_led_on_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1152

hw->mac.ops.get_link_up_info(hw, &speed, &duplex);

sys/dev/e1000/e1000_ich8lan.c

1159

rxa = E1000_READ_REG(hw, E1000_PBA) & E1000_PBA_RXA_MASK;

sys/dev/e1000/e1000_ich8lan.c

116

static s32 e1000_led_off_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

117

static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link);

sys/dev/e1000/e1000_ich8lan.c

1170

(2 * (s64)hw->mac.max_frame_size)) * 8 * 1000;

sys/dev/e1000/e1000_ich8lan.c

118

static s32 e1000_setup_led_pchlan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1188

e1000_read_pci_cfg(hw, E1000_PCI_LTR_CAP_LPT, &max_snoop);

sys/dev/e1000/e1000_ich8lan.c

1189

e1000_read_pci_cfg(hw, E1000_PCI_LTR_CAP_LPT + 2, &max_nosnoop);

sys/dev/e1000/e1000_ich8lan.c

119

static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

120

static s32 e1000_led_on_pchlan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

121

static s32 e1000_led_off_pchlan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1211

E1000_WRITE_REG(hw, E1000_LTRV, reg);

sys/dev/e1000/e1000_ich8lan.c

1214

reg = E1000_READ_REG(hw, E1000_SVT) & ~E1000_SVT_OFF_HWM_MASK;

sys/dev/e1000/e1000_ich8lan.c

1216

E1000_WRITE_REG(hw, E1000_SVT, reg);

sys/dev/e1000/e1000_ich8lan.c

1219

reg = E1000_READ_REG(hw, E1000_SVCR);

sys/dev/e1000/e1000_ich8lan.c

122

static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1226

E1000_WRITE_REG(hw, E1000_SVCR, reg);

sys/dev/e1000/e1000_ich8lan.c

123

static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank);

sys/dev/e1000/e1000_ich8lan.c

1238

static s32 e1000_set_obff_timer_pch_lpt(struct e1000_hw *hw, u32 itr)

sys/dev/e1000/e1000_ich8lan.c

124

static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

125

static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1254

svcr = E1000_READ_REG(hw, E1000_SVCR);

sys/dev/e1000/e1000_ich8lan.c

1257

E1000_WRITE_REG(hw, E1000_SVCR, svcr);

sys/dev/e1000/e1000_ich8lan.c

126

static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

1272

s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)

sys/dev/e1000/e1000_ich8lan.c

1279

if ((hw->mac.type < e1000_pch_lpt) ||

sys/dev/e1000/e1000_ich8lan.c

128

static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_ich8lan.c

1280

(hw->device_id == E1000_DEV_ID_PCH_LPT_I217_LM) ||

sys/dev/e1000/e1000_ich8lan.c

1281

(hw->device_id == E1000_DEV_ID_PCH_LPT_I217_V) ||

sys/dev/e1000/e1000_ich8lan.c

1282

(hw->device_id == E1000_DEV_ID_PCH_I218_LM2) ||

sys/dev/e1000/e1000_ich8lan.c

1283

(hw->device_id == E1000_DEV_ID_PCH_I218_V2) ||

sys/dev/e1000/e1000_ich8lan.c

1284

(hw->dev_spec.ich8lan.ulp_state == e1000_ulp_state_on))

sys/dev/e1000/e1000_ich8lan.c

1287

if (E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID) {

sys/dev/e1000/e1000_ich8lan.c

1289

mac_reg = E1000_READ_REG(hw, E1000_H2ME);

sys/dev/e1000/e1000_ich8lan.c

1291

E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

1299

while (!(E1000_READ_REG(hw, E1000_FEXT) &

sys/dev/e1000/e1000_ich8lan.c

130

static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_ich8lan.c

1302

if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)

sys/dev/e1000/e1000_ich8lan.c

1310

(E1000_READ_REG(hw, E1000_FEXT) &

sys/dev/e1000/e1000_ich8lan.c

1313

if (!(E1000_READ_REG(hw, E1000_FEXT) &

sys/dev/e1000/e1000_ich8lan.c

1318

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

132

static s32 e1000_read_flash_dword_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

1323

ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1327

e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1330

mac_reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_ich8lan.c

1332

E1000_WRITE_REG(hw, E1000_CTRL_EXT, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

1337

if ((hw->phy.type == e1000_phy_i217) && (hw->phy.revision == 6)) {

sys/dev/e1000/e1000_ich8lan.c

1338

ret_val = e1000_read_phy_reg_hv_locked(hw, HV_OEM_BITS,

sys/dev/e1000/e1000_ich8lan.c

134

static s32 e1000_write_flash_data32_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

1346

ret_val = e1000_write_phy_reg_hv_locked(hw, HV_OEM_BITS,

sys/dev/e1000/e1000_ich8lan.c

1356

ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

136

static s32 e1000_retry_write_flash_dword_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

1362

if (E1000_READ_REG(hw, E1000_WUFC) & E1000_WUFC_LNKC)

sys/dev/e1000/e1000_ich8lan.c

1374

e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1377

mac_reg = E1000_READ_REG(hw, E1000_FEXTNVM7);

sys/dev/e1000/e1000_ich8lan.c

1379

E1000_WRITE_REG(hw, E1000_FEXTNVM7, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

138

static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

1383

e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1385

if ((hw->phy.type == e1000_phy_i217) && (hw->phy.revision == 6) &&

sys/dev/e1000/e1000_ich8lan.c

1386

to_sx && (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) {

sys/dev/e1000/e1000_ich8lan.c

1387

ret_val = e1000_write_phy_reg_hv_locked(hw, HV_OEM_BITS,

sys/dev/e1000/e1000_ich8lan.c

1394

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

1399

hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_on;

sys/dev/e1000/e1000_ich8lan.c

140

static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

1419

s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)

sys/dev/e1000/e1000_ich8lan.c

142

static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1427

if ((hw->mac.type < e1000_pch_lpt) ||

sys/dev/e1000/e1000_ich8lan.c

1428

(hw->device_id == E1000_DEV_ID_PCH_LPT_I217_LM) ||

sys/dev/e1000/e1000_ich8lan.c

1429

(hw->device_id == E1000_DEV_ID_PCH_LPT_I217_V) ||

sys/dev/e1000/e1000_ich8lan.c

143

static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1430

(hw->device_id == E1000_DEV_ID_PCH_I218_LM2) ||

sys/dev/e1000/e1000_ich8lan.c

1431

(hw->device_id == E1000_DEV_ID_PCH_I218_V2) ||

sys/dev/e1000/e1000_ich8lan.c

1432

(hw->dev_spec.ich8lan.ulp_state == e1000_ulp_state_off))

sys/dev/e1000/e1000_ich8lan.c

1435

if (E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID) {

sys/dev/e1000/e1000_ich8lan.c

1438

mac_reg = E1000_READ_REG(hw, E1000_H2ME);

sys/dev/e1000/e1000_ich8lan.c

144

static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1441

E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

1444

if (hw->mac.type == e1000_pch_cnp)

sys/dev/e1000/e1000_ich8lan.c

1447

while (E1000_READ_REG(hw, E1000_FWSM) &

sys/dev/e1000/e1000_ich8lan.c

145

static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1459

mac_reg = E1000_READ_REG(hw, E1000_H2ME);

sys/dev/e1000/e1000_ich8lan.c

146

static s32 e1000_k1_workaround_lv(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

1461

E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

1464

mac_reg = E1000_READ_REG(hw, E1000_H2ME);

sys/dev/e1000/e1000_ich8lan.c

1466

E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

147

static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate);

sys/dev/e1000/e1000_ich8lan.c

1472

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

1478

e1000_toggle_lanphypc_pch_lpt(hw);

sys/dev/e1000/e1000_ich8lan.c

148

static s32 e1000_set_obff_timer_pch_lpt(struct e1000_hw *hw, u32 itr);

sys/dev/e1000/e1000_ich8lan.c

1481

ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1486

mac_reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_ich8lan.c

1488

E1000_WRITE_REG(hw, E1000_CTRL_EXT, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

1492

ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL,

sys/dev/e1000/e1000_ich8lan.c

1498

e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1501

mac_reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_ich8lan.c

1503

E1000_WRITE_REG(hw, E1000_CTRL_EXT, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

1508

ret_val = e1000_read_phy_reg_hv_locked(hw, HV_PM_CTRL, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1512

e1000_write_phy_reg_hv_locked(hw, HV_PM_CTRL, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1515

ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1526

e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1530

e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1533

mac_reg = E1000_READ_REG(hw, E1000_FEXTNVM7);

sys/dev/e1000/e1000_ich8lan.c

1535

E1000_WRITE_REG(hw, E1000_FEXTNVM7, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

1538

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

1540

hw->phy.ops.reset(hw);

sys/dev/e1000/e1000_ich8lan.c

1547

hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_off;

sys/dev/e1000/e1000_ich8lan.c

1560

static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

1562

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_ich8lan.c

1582

ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/e1000/e1000_ich8lan.c

1586

if (hw->mac.type == e1000_pchlan) {

sys/dev/e1000/e1000_ich8lan.c

1587

ret_val = e1000_k1_gig_workaround_hv(hw, link);

sys/dev/e1000/e1000_ich8lan.c

1596

if ((hw->mac.type >= e1000_pch2lan) && link) {

sys/dev/e1000/e1000_ich8lan.c

1599

e1000_get_speed_and_duplex_copper_generic(hw, &speed, &duplex);

sys/dev/e1000/e1000_ich8lan.c

1600

tipg_reg = E1000_READ_REG(hw, E1000_TIPG);

sys/dev/e1000/e1000_ich8lan.c

1607

} else if (hw->mac.type >= e1000_pch_spt &&

sys/dev/e1000/e1000_ich8lan.c

1617

E1000_WRITE_REG(hw, E1000_TIPG, tipg_reg);

sys/dev/e1000/e1000_ich8lan.c

1619

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

1623

if (hw->mac.type == e1000_pch2lan)

sys/dev/e1000/e1000_ich8lan.c

1627

ret_val = e1000_write_emi_reg_locked(hw, emi_addr, emi_val);

sys/dev/e1000/e1000_ich8lan.c

1630

if (hw->mac.type >= e1000_pch_lpt) {

sys/dev/e1000/e1000_ich8lan.c

1631

hw->phy.ops.read_reg_locked(hw, I217_PLL_CLOCK_GATE_REG,

sys/dev/e1000/e1000_ich8lan.c

1638

hw->phy.ops.write_reg_locked(hw,

sys/dev/e1000/e1000_ich8lan.c

1643

hw->phy.ops.read_reg_locked(hw, HV_PM_CTRL,

sys/dev/e1000/e1000_ich8lan.c

1648

hw->phy.ops.write_reg_locked(hw, HV_PM_CTRL,

sys/dev/e1000/e1000_ich8lan.c

1652

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

1657

if (hw->mac.type >= e1000_pch_spt) {

sys/dev/e1000/e1000_ich8lan.c

1662

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

1666

ret_val = hw->phy.ops.read_reg_locked(hw,

sys/dev/e1000/e1000_ich8lan.c

1670

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

1679

hw->phy.ops.write_reg_locked(hw,

sys/dev/e1000/e1000_ich8lan.c

1682

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

1686

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

1690

ret_val = hw->phy.ops.write_reg_locked(hw,

sys/dev/e1000/e1000_ich8lan.c

1693

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

1706

if (hw->mac.type >= e1000_pch_lpt) {

sys/dev/e1000/e1000_ich8lan.c

1709

mac_reg = E1000_READ_REG(hw, E1000_FEXTNVM4);

sys/dev/e1000/e1000_ich8lan.c

1712

E1000_WRITE_REG(hw, E1000_FEXTNVM4, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

1716

if ((hw->device_id == E1000_DEV_ID_PCH_LPTLP_I218_LM) ||

sys/dev/e1000/e1000_ich8lan.c

1717

(hw->device_id == E1000_DEV_ID_PCH_LPTLP_I218_V) ||

sys/dev/e1000/e1000_ich8lan.c

1718

(hw->device_id == E1000_DEV_ID_PCH_I218_LM3) ||

sys/dev/e1000/e1000_ich8lan.c

1719

(hw->device_id == E1000_DEV_ID_PCH_I218_V3)) {

sys/dev/e1000/e1000_ich8lan.c

1720

ret_val = e1000_k1_workaround_lpt_lp(hw, link);

sys/dev/e1000/e1000_ich8lan.c

1724

if (hw->mac.type >= e1000_pch_lpt) {

sys/dev/e1000/e1000_ich8lan.c

1729

ret_val = e1000_platform_pm_pch_lpt(hw, link);

sys/dev/e1000/e1000_ich8lan.c

1734

hw->dev_spec.ich8lan.eee_lp_ability = 0;

sys/dev/e1000/e1000_ich8lan.c

1736

if (hw->mac.type >= e1000_pch_lpt) {

sys/dev/e1000/e1000_ich8lan.c

1737

u32 fextnvm6 = E1000_READ_REG(hw, E1000_FEXTNVM6);

sys/dev/e1000/e1000_ich8lan.c

1739

if (hw->mac.type == e1000_pch_spt) {

sys/dev/e1000/e1000_ich8lan.c

1741

u32 pcieanacfg = E1000_READ_REG(hw, E1000_PCIEANACFG);

sys/dev/e1000/e1000_ich8lan.c

1749

if (hw->dev_spec.ich8lan.disable_k1_off == true)

sys/dev/e1000/e1000_ich8lan.c

1752

E1000_WRITE_REG(hw, E1000_FEXTNVM6, fextnvm6);

sys/dev/e1000/e1000_ich8lan.c

1755

e1000_configure_k0s_lpt(hw, K1_ENTRY_LATENCY, K1_MIN_TIME);

sys/dev/e1000/e1000_ich8lan.c

1763

switch (hw->mac.type) {

sys/dev/e1000/e1000_ich8lan.c

1765

ret_val = e1000_k1_workaround_lv(hw);

sys/dev/e1000/e1000_ich8lan.c

1770

if (hw->phy.type == e1000_phy_82578) {

sys/dev/e1000/e1000_ich8lan.c

1771

ret_val = e1000_link_stall_workaround_hv(hw);

sys/dev/e1000/e1000_ich8lan.c

1781

hw->phy.ops.read_reg(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1784

if ((E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FD) !=

sys/dev/e1000/e1000_ich8lan.c

1788

hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

1797

e1000_check_downshift_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

1800

if (hw->phy.type > e1000_phy_82579) {

sys/dev/e1000/e1000_ich8lan.c

1801

ret_val = e1000_set_eee_pchlan(hw);

sys/dev/e1000/e1000_ich8lan.c

1816

mac->ops.config_collision_dist(hw);

sys/dev/e1000/e1000_ich8lan.c

1823

ret_val = e1000_config_fc_after_link_up_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

1836

void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

1840

hw->mac.ops.init_params = e1000_init_mac_params_ich8lan;

sys/dev/e1000/e1000_ich8lan.c

1841

hw->nvm.ops.init_params = e1000_init_nvm_params_ich8lan;

sys/dev/e1000/e1000_ich8lan.c

1842

switch (hw->mac.type) {

sys/dev/e1000/e1000_ich8lan.c

1846

hw->phy.ops.init_params = e1000_init_phy_params_ich8lan;

sys/dev/e1000/e1000_ich8lan.c

1857

hw->phy.ops.init_params = e1000_init_phy_params_pchlan;

sys/dev/e1000/e1000_ich8lan.c

1870

static s32 e1000_acquire_nvm_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

1874

ASSERT_CTX_LOCK_HELD(hw);

sys/dev/e1000/e1000_ich8lan.c

1885

static void e1000_release_nvm_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

1889

ASSERT_CTX_LOCK_HELD(hw);

sys/dev/e1000/e1000_ich8lan.c

1899

static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

1906

ASSERT_CTX_LOCK_HELD(hw);

sys/dev/e1000/e1000_ich8lan.c

1909

extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);

sys/dev/e1000/e1000_ich8lan.c

1926

E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl);

sys/dev/e1000/e1000_ich8lan.c

1929

extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);

sys/dev/e1000/e1000_ich8lan.c

1939

E1000_READ_REG(hw, E1000_FWSM), extcnf_ctrl);

sys/dev/e1000/e1000_ich8lan.c

1941

E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl);

sys/dev/e1000/e1000_ich8lan.c

1957

static void e1000_release_swflag_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

1963

extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);

sys/dev/e1000/e1000_ich8lan.c

1967

E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl);

sys/dev/e1000/e1000_ich8lan.c

1981

static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

1987

fwsm = E1000_READ_REG(hw, E1000_FWSM);

sys/dev/e1000/e1000_ich8lan.c

2002

static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

2008

fwsm = E1000_READ_REG(hw, E1000_FWSM);

sys/dev/e1000/e1000_ich8lan.c

201

static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

2025

static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index)

sys/dev/e1000/e1000_ich8lan.c

2045

E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);

sys/dev/e1000/e1000_ich8lan.c

2046

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

2047

E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);

sys/dev/e1000/e1000_ich8lan.c

2048

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

2055

if (index < (u32) (hw->mac.rar_entry_count)) {

sys/dev/e1000/e1000_ich8lan.c

2058

ret_val = e1000_acquire_swflag_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

2062

E1000_WRITE_REG(hw, E1000_SHRAL(index - 1), rar_low);

sys/dev/e1000/e1000_ich8lan.c

2063

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

2064

E1000_WRITE_REG(hw, E1000_SHRAH(index - 1), rar_high);

sys/dev/e1000/e1000_ich8lan.c

2065

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

2067

e1000_release_swflag_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

2070

if ((E1000_READ_REG(hw, E1000_SHRAL(index - 1)) == rar_low) &&

sys/dev/e1000/e1000_ich8lan.c

2071

(E1000_READ_REG(hw, E1000_SHRAH(index - 1)) == rar_high))

sys/dev/e1000/e1000_ich8lan.c

2075

(index - 1), E1000_READ_REG(hw, E1000_FWSM));

sys/dev/e1000/e1000_ich8lan.c

2094

static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index)

sys/dev/e1000/e1000_ich8lan.c

210

ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID1, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

2114

E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);

sys/dev/e1000/e1000_ich8lan.c

2115

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

2116

E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);

sys/dev/e1000/e1000_ich8lan.c

2117

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

2124

if (index < hw->mac.rar_entry_count) {

sys/dev/e1000/e1000_ich8lan.c

2125

wlock_mac = E1000_READ_REG(hw, E1000_FWSM) &

sys/dev/e1000/e1000_ich8lan.c

2136

ret_val = e1000_acquire_swflag_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

2141

E1000_WRITE_REG(hw, E1000_SHRAL_PCH_LPT(index - 1),

sys/dev/e1000/e1000_ich8lan.c

2143

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

2144

E1000_WRITE_REG(hw, E1000_SHRAH_PCH_LPT(index - 1),

sys/dev/e1000/e1000_ich8lan.c

2146

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

2148

e1000_release_swflag_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

215

ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID2, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

2151

if ((E1000_READ_REG(hw, E1000_SHRAL_PCH_LPT(index - 1)) == rar_low) &&

sys/dev/e1000/e1000_ich8lan.c

2152

(E1000_READ_REG(hw, E1000_SHRAH_PCH_LPT(index - 1)) == rar_high))

sys/dev/e1000/e1000_ich8lan.c

2171

static void e1000_update_mc_addr_list_pch2lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

2181

e1000_update_mc_addr_list_generic(hw, mc_addr_list, mc_addr_count);

sys/dev/e1000/e1000_ich8lan.c

2183

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

2187

ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

2191

for (i = 0; i < hw->mac.mta_reg_count; i++) {

sys/dev/e1000/e1000_ich8lan.c

2192

hw->phy.ops.write_reg_page(hw, BM_MTA(i),

sys/dev/e1000/e1000_ich8lan.c

2193

(u16)(hw->mac.mta_shadow[i] &

sys/dev/e1000/e1000_ich8lan.c

2195

hw->phy.ops.write_reg_page(hw, (BM_MTA(i) + 1),

sys/dev/e1000/e1000_ich8lan.c

2196

(u16)((hw->mac.mta_shadow[i] >> 16) &

sys/dev/e1000/e1000_ich8lan.c

2200

e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

2203

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

2214

static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

2223

fwsm = E1000_READ_REG(hw, E1000_FWSM);

sys/dev/e1000/e1000_ich8lan.c

224

if (hw->phy.id) {

sys/dev/e1000/e1000_ich8lan.c

2241

static s32 e1000_write_smbus_addr(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

2244

u32 strap = E1000_READ_REG(hw, E1000_STRAP);

sys/dev/e1000/e1000_ich8lan.c

225

if (hw->phy.id == phy_id)

sys/dev/e1000/e1000_ich8lan.c

2251

ret_val = e1000_read_phy_reg_hv_locked(hw, HV_SMB_ADDR, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

2259

if (hw->phy.type == e1000_phy_i217) {

sys/dev/e1000/e1000_ich8lan.c

2272

return e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, phy_data);

sys/dev/e1000/e1000_ich8lan.c

228

hw->phy.id = phy_id;

sys/dev/e1000/e1000_ich8lan.c

2282

static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

2284

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_ich8lan.c

229

hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK);

sys/dev/e1000/e1000_ich8lan.c

2297

switch (hw->mac.type) {

sys/dev/e1000/e1000_ich8lan.c

2302

if ((hw->device_id == E1000_DEV_ID_ICH8_IGP_AMT) ||

sys/dev/e1000/e1000_ich8lan.c

2303

(hw->device_id == E1000_DEV_ID_ICH8_IGP_C)) {

sys/dev/e1000/e1000_ich8lan.c

2323

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

2327

data = E1000_READ_REG(hw, E1000_FEXTNVM);

sys/dev/e1000/e1000_ich8lan.c

2334

data = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);

sys/dev/e1000/e1000_ich8lan.c

2335

if ((hw->mac.type < e1000_pch2lan) &&

sys/dev/e1000/e1000_ich8lan.c

2339

cnf_size = E1000_READ_REG(hw, E1000_EXTCNF_SIZE);

sys/dev/e1000/e1000_ich8lan.c

2348

if (((hw->mac.type == e1000_pchlan) &&

sys/dev/e1000/e1000_ich8lan.c

2350

(hw->mac.type > e1000_pchlan)) {

sys/dev/e1000/e1000_ich8lan.c

2356

ret_val = e1000_write_smbus_addr(hw);

sys/dev/e1000/e1000_ich8lan.c

236

if (hw->mac.type < e1000_pch_lpt) {

sys/dev/e1000/e1000_ich8lan.c

2360

data = E1000_READ_REG(hw, E1000_LEDCTL);

sys/dev/e1000/e1000_ich8lan.c

2361

ret_val = e1000_write_phy_reg_hv_locked(hw, HV_LED_CONFIG,

sys/dev/e1000/e1000_ich8lan.c

237

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

2373

ret_val = hw->nvm.ops.read(hw, (word_addr + i * 2), 1,

sys/dev/e1000/e1000_ich8lan.c

2378

ret_val = hw->nvm.ops.read(hw, (word_addr + i * 2 + 1),

sys/dev/e1000/e1000_ich8lan.c

238

ret_val = e1000_set_mdio_slow_mode_hv(hw);

sys/dev/e1000/e1000_ich8lan.c

2392

ret_val = phy->ops.write_reg_locked(hw, (u32)reg_addr,

sys/dev/e1000/e1000_ich8lan.c

2399

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

240

ret_val = e1000_get_phy_id(hw);

sys/dev/e1000/e1000_ich8lan.c

241

hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

2413

static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)

sys/dev/e1000/e1000_ich8lan.c

2417

bool k1_enable = hw->dev_spec.ich8lan.nvm_k1_enabled;

sys/dev/e1000/e1000_ich8lan.c

2421

if (hw->mac.type != e1000_pchlan)

sys/dev/e1000/e1000_ich8lan.c

2425

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

2431

if (hw->phy.type == e1000_phy_82578) {

sys/dev/e1000/e1000_ich8lan.c

2432

ret_val = hw->phy.ops.read_reg_locked(hw, BM_CS_STATUS,

sys/dev/e1000/e1000_ich8lan.c

2447

if (hw->phy.type == e1000_phy_82577) {

sys/dev/e1000/e1000_ich8lan.c

2448

ret_val = hw->phy.ops.read_reg_locked(hw, HV_M_STATUS,

sys/dev/e1000/e1000_ich8lan.c

2464

ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19),

sys/dev/e1000/e1000_ich8lan.c

247

if (hw->mac.type >= e1000_pch_lpt) {

sys/dev/e1000/e1000_ich8lan.c

2471

ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19),

sys/dev/e1000/e1000_ich8lan.c

2477

ret_val = e1000_configure_k1_ich8lan(hw, k1_enable);

sys/dev/e1000/e1000_ich8lan.c

2480

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

249

if (!(E1000_READ_REG(hw, E1000_FWSM) &

sys/dev/e1000/e1000_ich8lan.c

2495

s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable)

sys/dev/e1000/e1000_ich8lan.c

2505

ret_val = e1000_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG,

sys/dev/e1000/e1000_ich8lan.c

2515

ret_val = e1000_write_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG,

sys/dev/e1000/e1000_ich8lan.c

252

hw->phy.ops.read_reg_locked(hw, CV_SMB_CTRL, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

2521

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_ich8lan.c

2522

ctrl_reg = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_ich8lan.c

2526

E1000_WRITE_REG(hw, E1000_CTRL, reg);

sys/dev/e1000/e1000_ich8lan.c

2528

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_SPD_BYPS);

sys/dev/e1000/e1000_ich8lan.c

2529

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

2531

E1000_WRITE_REG(hw, E1000_CTRL, ctrl_reg);

sys/dev/e1000/e1000_ich8lan.c

2532

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_ich8lan.c

2533

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

254

hw->phy.ops.write_reg_locked(hw, CV_SMB_CTRL, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

2548

static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)

sys/dev/e1000/e1000_ich8lan.c

2556

if (hw->mac.type < e1000_pchlan)

sys/dev/e1000/e1000_ich8lan.c

2559

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

2563

if (hw->mac.type == e1000_pchlan) {

sys/dev/e1000/e1000_ich8lan.c

2564

mac_reg = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);

sys/dev/e1000/e1000_ich8lan.c

2569

mac_reg = E1000_READ_REG(hw, E1000_FEXTNVM);

sys/dev/e1000/e1000_ich8lan.c

257

mac_reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_ich8lan.c

2573

mac_reg = E1000_READ_REG(hw, E1000_PHY_CTRL);

sys/dev/e1000/e1000_ich8lan.c

2575

ret_val = hw->phy.ops.read_reg_locked(hw, HV_OEM_BITS, &oem_reg);

sys/dev/e1000/e1000_ich8lan.c

259

E1000_WRITE_REG(hw, E1000_CTRL_EXT, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

2598

if ((d0_state || (hw->mac.type != e1000_pchlan)) &&

sys/dev/e1000/e1000_ich8lan.c

2599

!hw->phy.ops.check_reset_block(hw))

sys/dev/e1000/e1000_ich8lan.c

2602

ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg);

sys/dev/e1000/e1000_ich8lan.c

2605

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

2615

static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

2622

ret_val = hw->phy.ops.read_reg(hw, HV_KMRN_MODE_CTRL, &data);

sys/dev/e1000/e1000_ich8lan.c

2628

ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_MODE_CTRL, data);

sys/dev/e1000/e1000_ich8lan.c

2638

static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

2645

if (hw->mac.type != e1000_pchlan)

sys/dev/e1000/e1000_ich8lan.c

2649

if (hw->phy.type == e1000_phy_82577) {

sys/dev/e1000/e1000_ich8lan.c

2650

ret_val = e1000_set_mdio_slow_mode_hv(hw);

sys/dev/e1000/e1000_ich8lan.c

2655

if (((hw->phy.type == e1000_phy_82577) &&

sys/dev/e1000/e1000_ich8lan.c

2656

((hw->phy.revision == 1) || (hw->phy.revision == 2))) ||

sys/dev/e1000/e1000_ich8lan.c

2657

((hw->phy.type == e1000_phy_82578) && (hw->phy.revision == 1))) {

sys/dev/e1000/e1000_ich8lan.c

2659

ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 25), 0x4431);

sys/dev/e1000/e1000_ich8lan.c

2664

ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA,

sys/dev/e1000/e1000_ich8lan.c

2670

if (hw->phy.type == e1000_phy_82578) {

sys/dev/e1000/e1000_ich8lan.c

2674

if (hw->phy.revision < 2) {

sys/dev/e1000/e1000_ich8lan.c

2675

e1000_phy_sw_reset_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

2676

ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL,

sys/dev/e1000/e1000_ich8lan.c

2684

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

2688

hw->phy.addr = 1;

sys/dev/e1000/e1000_ich8lan.c

2689

ret_val = e1000_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0);

sys/dev/e1000/e1000_ich8lan.c

2690

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

2697

ret_val = e1000_k1_gig_workaround_hv(hw, true);

sys/dev/e1000/e1000_ich8lan.c

2702

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

2705

ret_val = hw->phy.ops.read_reg_locked(hw, BM_PORT_GEN_CFG, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

2708

ret_val = hw->phy.ops.write_reg_locked(hw, BM_PORT_GEN_CFG,

sys/dev/e1000/e1000_ich8lan.c

2714

ret_val = e1000_write_emi_reg_locked(hw, I82577_MSE_THRESHOLD, 0x0034);

sys/dev/e1000/e1000_ich8lan.c

2716

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

2725

void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

273

static void e1000_toggle_lanphypc_pch_lpt(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

2733

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

2736

ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

2741

for (i = 0; i < (hw->mac.rar_entry_count); i++) {

sys/dev/e1000/e1000_ich8lan.c

2742

mac_reg = E1000_READ_REG(hw, E1000_RAL(i));

sys/dev/e1000/e1000_ich8lan.c

2743

hw->phy.ops.write_reg_page(hw, BM_RAR_L(i),

sys/dev/e1000/e1000_ich8lan.c

2745

hw->phy.ops.write_reg_page(hw, BM_RAR_M(i),

sys/dev/e1000/e1000_ich8lan.c

2748

mac_reg = E1000_READ_REG(hw, E1000_RAH(i));

sys/dev/e1000/e1000_ich8lan.c

2749

hw->phy.ops.write_reg_page(hw, BM_RAR_H(i),

sys/dev/e1000/e1000_ich8lan.c

2751

hw->phy.ops.write_reg_page(hw, BM_RAR_CTRL(i),

sys/dev/e1000/e1000_ich8lan.c

2756

e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

2759

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

2786

s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)

sys/dev/e1000/e1000_ich8lan.c

2795

if (hw->mac.type < e1000_pch2lan)

sys/dev/e1000/e1000_ich8lan.c

2799

hw->phy.ops.read_reg(hw, PHY_REG(769, 20), &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

280

mac_reg = E1000_READ_REG(hw, E1000_FEXTNVM3);

sys/dev/e1000/e1000_ich8lan.c

2800

ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 20),

sys/dev/e1000/e1000_ich8lan.c

2809

for (i = 0; i < hw->mac.rar_entry_count; i++) {

sys/dev/e1000/e1000_ich8lan.c

2813

addr_high = E1000_READ_REG(hw, E1000_RAH(i));

sys/dev/e1000/e1000_ich8lan.c

2816

addr_low = E1000_READ_REG(hw, E1000_RAL(i));

sys/dev/e1000/e1000_ich8lan.c

2824

E1000_WRITE_REG(hw, E1000_PCH_RAICC(i),

sys/dev/e1000/e1000_ich8lan.c

2829

e1000_copy_rx_addrs_to_phy_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

283

E1000_WRITE_REG(hw, E1000_FEXTNVM3, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

2832

mac_reg = E1000_READ_REG(hw, E1000_FFLT_DBG);

sys/dev/e1000/e1000_ich8lan.c

2835

E1000_WRITE_REG(hw, E1000_FFLT_DBG, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

2837

mac_reg = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/e1000_ich8lan.c

2839

E1000_WRITE_REG(hw, E1000_RCTL, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

2841

ret_val = e1000_read_kmrn_reg_generic(hw,

sys/dev/e1000/e1000_ich8lan.c

2846

ret_val = e1000_write_kmrn_reg_generic(hw,

sys/dev/e1000/e1000_ich8lan.c

2851

ret_val = e1000_read_kmrn_reg_generic(hw,

sys/dev/e1000/e1000_ich8lan.c

2858

ret_val = e1000_write_kmrn_reg_generic(hw,

sys/dev/e1000/e1000_ich8lan.c

286

mac_reg = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_ich8lan.c

2865

hw->phy.ops.read_reg(hw, PHY_REG(769, 23), &data);

sys/dev/e1000/e1000_ich8lan.c

2868

ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 23), data);

sys/dev/e1000/e1000_ich8lan.c

2871

hw->phy.ops.read_reg(hw, PHY_REG(769, 16), &data);

sys/dev/e1000/e1000_ich8lan.c

2873

ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 16), data);

sys/dev/e1000/e1000_ich8lan.c

2876

hw->phy.ops.read_reg(hw, PHY_REG(776, 20), &data);

sys/dev/e1000/e1000_ich8lan.c

2879

ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 20), data);

sys/dev/e1000/e1000_ich8lan.c

2882

ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 23), 0xF100);

sys/dev/e1000/e1000_ich8lan.c

2885

hw->phy.ops.read_reg(hw, HV_PM_CTRL, &data);

sys/dev/e1000/e1000_ich8lan.c

2886

ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL, data |

sys/dev/e1000/e1000_ich8lan.c

289

E1000_WRITE_REG(hw, E1000_CTRL, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

2892

mac_reg = E1000_READ_REG(hw, E1000_FFLT_DBG);

sys/dev/e1000/e1000_ich8lan.c

2894

E1000_WRITE_REG(hw, E1000_FFLT_DBG, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

2896

mac_reg = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/e1000_ich8lan.c

2898

E1000_WRITE_REG(hw, E1000_RCTL, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

290

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

2900

ret_val = e1000_read_kmrn_reg_generic(hw,

sys/dev/e1000/e1000_ich8lan.c

2905

ret_val = e1000_write_kmrn_reg_generic(hw,

sys/dev/e1000/e1000_ich8lan.c

2910

ret_val = e1000_read_kmrn_reg_generic(hw,

sys/dev/e1000/e1000_ich8lan.c

2917

ret_val = e1000_write_kmrn_reg_generic(hw,

sys/dev/e1000/e1000_ich8lan.c

2924

hw->phy.ops.read_reg(hw, PHY_REG(769, 23), &data);

sys/dev/e1000/e1000_ich8lan.c

2926

ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 23), data);

sys/dev/e1000/e1000_ich8lan.c

2929

hw->phy.ops.read_reg(hw, PHY_REG(769, 16), &data);

sys/dev/e1000/e1000_ich8lan.c

293

E1000_WRITE_REG(hw, E1000_CTRL, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

2931

ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 16), data);

sys/dev/e1000/e1000_ich8lan.c

2934

hw->phy.ops.read_reg(hw, PHY_REG(776, 20), &data);

sys/dev/e1000/e1000_ich8lan.c

2937

ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 20), data);

sys/dev/e1000/e1000_ich8lan.c

294

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

2940

ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 23), 0x7E00);

sys/dev/e1000/e1000_ich8lan.c

2943

hw->phy.ops.read_reg(hw, HV_PM_CTRL, &data);

sys/dev/e1000/e1000_ich8lan.c

2944

ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL, data &

sys/dev/e1000/e1000_ich8lan.c

2951

return hw->phy.ops.write_reg(hw, PHY_REG(769, 20), phy_reg &

sys/dev/e1000/e1000_ich8lan.c

296

if (hw->mac.type < e1000_pch_lpt) {

sys/dev/e1000/e1000_ich8lan.c

2960

static s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

2966

if (hw->mac.type != e1000_pch2lan)

sys/dev/e1000/e1000_ich8lan.c

2970

ret_val = e1000_set_mdio_slow_mode_hv(hw);

sys/dev/e1000/e1000_ich8lan.c

2974

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

2978

ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_THRESHOLD, 0x0034);

sys/dev/e1000/e1000_ich8lan.c

2982

ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_LINK_DOWN, 0x0005);

sys/dev/e1000/e1000_ich8lan.c

2984

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

2996

static s32 e1000_k1_workaround_lv(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

3003

if (hw->mac.type != e1000_pch2lan)

sys/dev/e1000/e1000_ich8lan.c

3007

ret_val = hw->phy.ops.read_reg(hw, HV_M_STATUS, &status_reg);

sys/dev/e1000/e1000_ich8lan.c

3018

ret_val = hw->phy.ops.read_reg(hw, HV_PM_CTRL,

sys/dev/e1000/e1000_ich8lan.c

3023

ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL,

sys/dev/e1000/e1000_ich8lan.c

3029

mac_reg = E1000_READ_REG(hw, E1000_FEXTNVM4);

sys/dev/e1000/e1000_ich8lan.c

303

} while (!(E1000_READ_REG(hw, E1000_CTRL_EXT) &

sys/dev/e1000/e1000_ich8lan.c

3032

E1000_WRITE_REG(hw, E1000_FEXTNVM4, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

3047

static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate)

sys/dev/e1000/e1000_ich8lan.c

3053

if (hw->mac.type < e1000_pch2lan)

sys/dev/e1000/e1000_ich8lan.c

3056

extcnf_ctrl = E1000_READ_REG(hw, E1000_EXTCNF_CTRL);

sys/dev/e1000/e1000_ich8lan.c

3063

E1000_WRITE_REG(hw, E1000_EXTCNF_CTRL, extcnf_ctrl);

sys/dev/e1000/e1000_ich8lan.c

3073

static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

3081

data = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_ich8lan.c

3094

data = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_ich8lan.c

3096

E1000_WRITE_REG(hw, E1000_STATUS, data);

sys/dev/e1000/e1000_ich8lan.c

3103

static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

3110

if (hw->phy.ops.check_reset_block(hw))

sys/dev/e1000/e1000_ich8lan.c

3117

switch (hw->mac.type) {

sys/dev/e1000/e1000_ich8lan.c

3119

ret_val = e1000_hv_phy_workarounds_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

3124

ret_val = e1000_lv_phy_workarounds_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

3133

if (hw->mac.type >= e1000_pchlan) {

sys/dev/e1000/e1000_ich8lan.c

3134

hw->phy.ops.read_reg(hw, BM_PORT_GEN_CFG, &reg);

sys/dev/e1000/e1000_ich8lan.c

3136

hw->phy.ops.write_reg(hw, BM_PORT_GEN_CFG, reg);

sys/dev/e1000/e1000_ich8lan.c

3140

ret_val = e1000_sw_lcd_config_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

3145

ret_val = e1000_oem_bits_config_ich8lan(hw, true);

sys/dev/e1000/e1000_ich8lan.c

3147

if (hw->mac.type == e1000_pch2lan) {

sys/dev/e1000/e1000_ich8lan.c

3149

if (!(E1000_READ_REG(hw, E1000_FWSM) &

sys/dev/e1000/e1000_ich8lan.c

3152

e1000_gate_hw_phy_config_ich8lan(hw, false);

sys/dev/e1000/e1000_ich8lan.c

3156

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

3159

ret_val = e1000_write_emi_reg_locked(hw,

sys/dev/e1000/e1000_ich8lan.c

3162

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

317

static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

3176

static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

3183

if ((hw->mac.type == e1000_pch2lan) &&

sys/dev/e1000/e1000_ich8lan.c

3184

!(E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID))

sys/dev/e1000/e1000_ich8lan.c

3185

e1000_gate_hw_phy_config_ich8lan(hw, true);

sys/dev/e1000/e1000_ich8lan.c

3187

ret_val = e1000_phy_hw_reset_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

319

u32 mac_reg, fwsm = E1000_READ_REG(hw, E1000_FWSM);

sys/dev/e1000/e1000_ich8lan.c

3191

return e1000_post_phy_reset_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

3205

static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_ich8lan.c

3211

ret_val = hw->phy.ops.read_reg(hw, HV_OEM_BITS, &oem_reg);

sys/dev/e1000/e1000_ich8lan.c

3220

if (!hw->phy.ops.check_reset_block(hw))

sys/dev/e1000/e1000_ich8lan.c

3223

return hw->phy.ops.write_reg(hw, HV_OEM_BITS, oem_reg);

sys/dev/e1000/e1000_ich8lan.c

3239

static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_ich8lan.c

3241

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_ich8lan.c

3251

phy_ctrl = E1000_READ_REG(hw, E1000_PHY_CTRL);

sys/dev/e1000/e1000_ich8lan.c

3255

E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl);

sys/dev/e1000/e1000_ich8lan.c

3263

if (hw->mac.type == e1000_ich8lan)

sys/dev/e1000/e1000_ich8lan.c

3264

e1000_gig_downshift_workaround_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

3267

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

327

e1000_gate_hw_phy_config_ich8lan(hw, true);

sys/dev/e1000/e1000_ich8lan.c

3273

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

3280

E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl);

sys/dev/e1000/e1000_ich8lan.c

3291

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

3298

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

3304

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

3311

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

332

hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_unknown;

sys/dev/e1000/e1000_ich8lan.c

333

ret_val = e1000_disable_ulp_lpt_lp(hw, true);

sys/dev/e1000/e1000_ich8lan.c

3335

static s32 e1000_set_d3_lplu_state_ich8lan(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_ich8lan.c

3337

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_ich8lan.c

3344

phy_ctrl = E1000_READ_REG(hw, E1000_PHY_CTRL);

sys/dev/e1000/e1000_ich8lan.c

3348

E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl);

sys/dev/e1000/e1000_ich8lan.c

3359

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

3366

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

337

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

3372

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

3379

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

3389

E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl);

sys/dev/e1000/e1000_ich8lan.c

3397

if (hw->mac.type == e1000_ich8lan)

sys/dev/e1000/e1000_ich8lan.c

3398

e1000_gig_downshift_workaround_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

3401

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

3408

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

3424

static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)

sys/dev/e1000/e1000_ich8lan.c

3427

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_ich8lan.c

3436

switch (hw->mac.type) {

sys/dev/e1000/e1000_ich8lan.c

3450

ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset,

sys/dev/e1000/e1000_ich8lan.c

3462

ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset +

sys/dev/e1000/e1000_ich8lan.c

347

switch (hw->mac.type) {

sys/dev/e1000/e1000_ich8lan.c

3478

eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_ich8lan.c

3495

ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset,

sys/dev/e1000/e1000_ich8lan.c

3506

ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset +

sys/dev/e1000/e1000_ich8lan.c

3531

static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_ich8lan.c

3534

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_ich8lan.c

3535

struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;

sys/dev/e1000/e1000_ich8lan.c

355

if (e1000_phy_is_accessible_pchlan(hw))

sys/dev/e1000/e1000_ich8lan.c

3552

nvm->ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

3554

ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);

sys/dev/e1000/e1000_ich8lan.c

3574

e1000_read_flash_dword_ich8lan(hw,

sys/dev/e1000/e1000_ich8lan.c

3589

e1000_read_flash_dword_ich8lan(hw,

sys/dev/e1000/e1000_ich8lan.c

3608

nvm->ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

361

mac_reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_ich8lan.c

3626

static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_ich8lan.c

3629

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_ich8lan.c

363

E1000_WRITE_REG(hw, E1000_CTRL_EXT, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

3630

struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;

sys/dev/e1000/e1000_ich8lan.c

3645

nvm->ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

3647

ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);

sys/dev/e1000/e1000_ich8lan.c

3661

ret_val = e1000_read_flash_word_ich8lan(hw,

sys/dev/e1000/e1000_ich8lan.c

3670

nvm->ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

3686

static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

3693

hsfsts.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFSTS);

sys/dev/e1000/e1000_ich8lan.c

3704

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

3705

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_HSFSTS,

sys/dev/e1000/e1000_ich8lan.c

3708

E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFSTS, hsfsts.regval);

sys/dev/e1000/e1000_ich8lan.c

3724

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

3725

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_HSFSTS,

sys/dev/e1000/e1000_ich8lan.c

3728

E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFSTS,

sys/dev/e1000/e1000_ich8lan.c

373

if (e1000_phy_is_accessible_pchlan(hw))

sys/dev/e1000/e1000_ich8lan.c

3738

hsfsts.regval = E1000_READ_FLASH_REG16(hw,

sys/dev/e1000/e1000_ich8lan.c

3751

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

3752

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_HSFSTS,

sys/dev/e1000/e1000_ich8lan.c

3755

E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFSTS,

sys/dev/e1000/e1000_ich8lan.c

3772

static s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout)

sys/dev/e1000/e1000_ich8lan.c

378

if ((hw->mac.type == e1000_pchlan) &&

sys/dev/e1000/e1000_ich8lan.c

3781

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

3782

hsflctl.regval = E1000_READ_FLASH_REG(hw, ICH_FLASH_HSFSTS)>>16;

sys/dev/e1000/e1000_ich8lan.c

3784

hsflctl.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFCTL);

sys/dev/e1000/e1000_ich8lan.c

3787

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

3788

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_HSFSTS,

sys/dev/e1000/e1000_ich8lan.c

3791

E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFCTL, hsflctl.regval);

sys/dev/e1000/e1000_ich8lan.c

3795

hsfsts.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFSTS);

sys/dev/e1000/e1000_ich8lan.c

3816

static s32 e1000_read_flash_dword_ich8lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_ich8lan.c

382

if (hw->phy.ops.check_reset_block(hw)) {

sys/dev/e1000/e1000_ich8lan.c

3827

return e1000_read_flash_data32_ich8lan(hw, offset, data);

sys/dev/e1000/e1000_ich8lan.c

3839

static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_ich8lan.c

3850

return e1000_read_flash_data_ich8lan(hw, offset, 2, data);

sys/dev/e1000/e1000_ich8lan.c

3861

static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_ich8lan.c

3870

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

3873

ret_val = e1000_read_flash_data_ich8lan(hw, offset, 1, &word);

sys/dev/e1000/e1000_ich8lan.c

389

e1000_toggle_lanphypc_pch_lpt(hw);

sys/dev/e1000/e1000_ich8lan.c

3892

static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_ich8lan.c

390

if (hw->mac.type >= e1000_pch_lpt) {

sys/dev/e1000/e1000_ich8lan.c

3907

hw->nvm.flash_base_addr);

sys/dev/e1000/e1000_ich8lan.c

391

if (e1000_phy_is_accessible_pchlan(hw))

sys/dev/e1000/e1000_ich8lan.c

3912

ret_val = e1000_flash_cycle_init_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

3915

hsflctl.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFCTL);

sys/dev/e1000/e1000_ich8lan.c

3920

E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFCTL, hsflctl.regval);

sys/dev/e1000/e1000_ich8lan.c

3921

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_FADDR, flash_linear_addr);

sys/dev/e1000/e1000_ich8lan.c

3923

ret_val = e1000_flash_cycle_ich8lan(hw,

sys/dev/e1000/e1000_ich8lan.c

3932

flash_data = E1000_READ_FLASH_REG(hw, ICH_FLASH_FDATA0);

sys/dev/e1000/e1000_ich8lan.c

3944

hsfsts.regval = E1000_READ_FLASH_REG16(hw,

sys/dev/e1000/e1000_ich8lan.c

3967

static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_ich8lan.c

397

mac_reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_ich8lan.c

3979

hw->mac.type < e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

3982

hw->nvm.flash_base_addr);

sys/dev/e1000/e1000_ich8lan.c

3987

ret_val = e1000_flash_cycle_init_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

399

E1000_WRITE_REG(hw, E1000_CTRL_EXT, mac_reg);

sys/dev/e1000/e1000_ich8lan.c

3993

hsflctl.regval = E1000_READ_FLASH_REG(hw, ICH_FLASH_HSFSTS)>>16;

sys/dev/e1000/e1000_ich8lan.c

4001

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_HSFSTS,

sys/dev/e1000/e1000_ich8lan.c

4003

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_FADDR, flash_linear_addr);

sys/dev/e1000/e1000_ich8lan.c

4005

ret_val = e1000_flash_cycle_ich8lan(hw,

sys/dev/e1000/e1000_ich8lan.c

401

if (e1000_phy_is_accessible_pchlan(hw))

sys/dev/e1000/e1000_ich8lan.c

4014

*data = E1000_READ_FLASH_REG(hw, ICH_FLASH_FDATA0);

sys/dev/e1000/e1000_ich8lan.c

4022

hsfsts.regval = E1000_READ_FLASH_REG16(hw,

sys/dev/e1000/e1000_ich8lan.c

4046

static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_ich8lan.c

4049

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_ich8lan.c

4050

struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;

sys/dev/e1000/e1000_ich8lan.c

4061

nvm->ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

4068

nvm->ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

4084

static s32 e1000_update_nvm_checksum_spt(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

4086

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_ich8lan.c

4087

struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;

sys/dev/e1000/e1000_ich8lan.c

4094

ret_val = e1000_update_nvm_checksum_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

4101

nvm->ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

4107

ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);

sys/dev/e1000/e1000_ich8lan.c

411

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

4116

ret_val = e1000_erase_flash_bank_ich8lan(hw, 1);

sys/dev/e1000/e1000_ich8lan.c

4122

ret_val = e1000_erase_flash_bank_ich8lan(hw, 0);

sys/dev/e1000/e1000_ich8lan.c

4131

ret_val = e1000_read_flash_dword_ich8lan(hw,

sys/dev/e1000/e1000_ich8lan.c

415

if (hw->phy.ops.check_reset_block(hw)) {

sys/dev/e1000/e1000_ich8lan.c

4164

ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset,

sys/dev/e1000/e1000_ich8lan.c

4187

ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);

sys/dev/e1000/e1000_ich8lan.c

4193

ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword);

sys/dev/e1000/e1000_ich8lan.c

4200

ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);

sys/dev/e1000/e1000_ich8lan.c

4206

ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword);

sys/dev/e1000/e1000_ich8lan.c

4218

nvm->ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

4224

nvm->ops.reload(hw);

sys/dev/e1000/e1000_ich8lan.c

4246

static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

4248

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_ich8lan.c

4249

struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;

sys/dev/e1000/e1000_ich8lan.c

425

ret_val = e1000_phy_hw_reset_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

4256

ret_val = e1000_update_nvm_checksum_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

4263

nvm->ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

4269

ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);

sys/dev/e1000/e1000_ich8lan.c

4278

ret_val = e1000_erase_flash_bank_ich8lan(hw, 1);

sys/dev/e1000/e1000_ich8lan.c

4284

ret_val = e1000_erase_flash_bank_ich8lan(hw, 0);

sys/dev/e1000/e1000_ich8lan.c

4292

ret_val = e1000_read_flash_word_ich8lan(hw, i +

sys/dev/e1000/e1000_ich8lan.c

4314

ret_val = e1000_retry_write_flash_byte_ich8lan(hw,

sys/dev/e1000/e1000_ich8lan.c

4321

ret_val = e1000_retry_write_flash_byte_ich8lan(hw,

sys/dev/e1000/e1000_ich8lan.c

4342

ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data);

sys/dev/e1000/e1000_ich8lan.c

4347

ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset * 2 + 1,

sys/dev/e1000/e1000_ich8lan.c

435

ret_val = hw->phy.ops.check_reset_block(hw);

sys/dev/e1000/e1000_ich8lan.c

4359

ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0);

sys/dev/e1000/e1000_ich8lan.c

4371

nvm->ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

4377

nvm->ops.reload(hw);

sys/dev/e1000/e1000_ich8lan.c

4396

static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

4410

switch (hw->mac.type) {

sys/dev/e1000/e1000_ich8lan.c

442

if ((hw->mac.type == e1000_pch2lan) &&

sys/dev/e1000/e1000_ich8lan.c

4427

ret_val = hw->nvm.ops.read(hw, word, 1, &data);

sys/dev/e1000/e1000_ich8lan.c

4433

ret_val = hw->nvm.ops.write(hw, word, 1, &data);

sys/dev/e1000/e1000_ich8lan.c

4436

ret_val = hw->nvm.ops.update(hw);

sys/dev/e1000/e1000_ich8lan.c

4441

return e1000_validate_nvm_checksum_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

445

e1000_gate_hw_phy_config_ich8lan(hw, false);

sys/dev/e1000/e1000_ich8lan.c

4453

static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_ich8lan.c

4465

if (hw->mac.type >= e1000_pch_spt) {

sys/dev/e1000/e1000_ich8lan.c

4474

hw->nvm.flash_base_addr);

sys/dev/e1000/e1000_ich8lan.c

4479

ret_val = e1000_flash_cycle_init_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

4485

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

4487

E1000_READ_FLASH_REG(hw, ICH_FLASH_HSFSTS)>>16;

sys/dev/e1000/e1000_ich8lan.c

4490

E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFCTL);

sys/dev/e1000/e1000_ich8lan.c

4499

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

4500

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_HSFSTS,

sys/dev/e1000/e1000_ich8lan.c

4503

E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFCTL,

sys/dev/e1000/e1000_ich8lan.c

4506

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_FADDR, flash_linear_addr);

sys/dev/e1000/e1000_ich8lan.c

4513

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_FDATA0, flash_data);

sys/dev/e1000/e1000_ich8lan.c

4519

e1000_flash_cycle_ich8lan(hw,

sys/dev/e1000/e1000_ich8lan.c

4529

hsfsts.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFSTS);

sys/dev/e1000/e1000_ich8lan.c

4550

static s32 e1000_write_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_ich8lan.c

4561

if (hw->mac.type >= e1000_pch_spt) {

sys/dev/e1000/e1000_ich8lan.c

4566

hw->nvm.flash_base_addr);

sys/dev/e1000/e1000_ich8lan.c

457

static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

4570

ret_val = e1000_flash_cycle_init_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

4577

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

4578

hsflctl.regval = E1000_READ_FLASH_REG(hw,

sys/dev/e1000/e1000_ich8lan.c

4582

hsflctl.regval = E1000_READ_FLASH_REG16(hw,

sys/dev/e1000/e1000_ich8lan.c

459

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_ich8lan.c

4592

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

4593

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_HSFSTS,

sys/dev/e1000/e1000_ich8lan.c

4596

E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFCTL,

sys/dev/e1000/e1000_ich8lan.c

4599

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_FADDR, flash_linear_addr);

sys/dev/e1000/e1000_ich8lan.c

4601

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_FDATA0, data);

sys/dev/e1000/e1000_ich8lan.c

4606

ret_val = e1000_flash_cycle_ich8lan(hw,

sys/dev/e1000/e1000_ich8lan.c

4617

hsfsts.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFSTS);

sys/dev/e1000/e1000_ich8lan.c

4639

static s32 e1000_write_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_ich8lan.c

4646

return e1000_write_flash_data_ich8lan(hw, offset, 1, word);

sys/dev/e1000/e1000_ich8lan.c

4658

static s32 e1000_retry_write_flash_dword_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

4669

ret_val = e1000_write_flash_data32_ich8lan(hw, offset, dword);

sys/dev/e1000/e1000_ich8lan.c

4676

ret_val = e1000_write_flash_data32_ich8lan(hw, offset, dword);

sys/dev/e1000/e1000_ich8lan.c

4695

static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

4703

ret_val = e1000_write_flash_byte_ich8lan(hw, offset, byte);

sys/dev/e1000/e1000_ich8lan.c

4710

ret_val = e1000_write_flash_byte_ich8lan(hw, offset, byte);

sys/dev/e1000/e1000_ich8lan.c

4728

static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)

sys/dev/e1000/e1000_ich8lan.c

4730

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_ich8lan.c

4742

hsfsts.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFSTS);

sys/dev/e1000/e1000_ich8lan.c

4779

flash_linear_addr = hw->nvm.flash_base_addr;

sys/dev/e1000/e1000_ich8lan.c

4787

ret_val = e1000_flash_cycle_init_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

4794

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

4796

E1000_READ_FLASH_REG(hw,

sys/dev/e1000/e1000_ich8lan.c

4800

E1000_READ_FLASH_REG16(hw,

sys/dev/e1000/e1000_ich8lan.c

4804

if (hw->mac.type >= e1000_pch_spt)

sys/dev/e1000/e1000_ich8lan.c

4805

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_HSFSTS,

sys/dev/e1000/e1000_ich8lan.c

4808

E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFCTL,

sys/dev/e1000/e1000_ich8lan.c

4816

E1000_WRITE_FLASH_REG(hw, ICH_FLASH_FADDR,

sys/dev/e1000/e1000_ich8lan.c

4819

ret_val = e1000_flash_cycle_ich8lan(hw, timeout);

sys/dev/e1000/e1000_ich8lan.c

4827

hsfsts.regval = E1000_READ_FLASH_REG16(hw,

sys/dev/e1000/e1000_ich8lan.c

4849

static s32 e1000_valid_led_default_ich8lan(struct e1000_hw *hw, u16 *data)

sys/dev/e1000/e1000_ich8lan.c

4855

ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);

sys/dev/e1000/e1000_ich8lan.c

487

ret_val = e1000_init_phy_workarounds_pchlan(hw);

sys/dev/e1000/e1000_ich8lan.c

4880

static s32 e1000_id_led_init_pchlan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

4882

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_ich8lan.c

4891

ret_val = hw->nvm.ops.valid_led_default(hw, &data);

sys/dev/e1000/e1000_ich8lan.c

4895

mac->ledctl_default = E1000_READ_REG(hw, E1000_LEDCTL);

sys/dev/e1000/e1000_ich8lan.c

492

switch (hw->mac.type) {

sys/dev/e1000/e1000_ich8lan.c

494

ret_val = e1000_get_phy_id(hw);

sys/dev/e1000/e1000_ich8lan.c

4948

static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

4950

struct e1000_bus_info *bus = &hw->bus;

sys/dev/e1000/e1000_ich8lan.c

4955

ret_val = e1000_get_bus_info_pcie_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

4975

static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

4977

struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;

sys/dev/e1000/e1000_ich8lan.c

4988

ret_val = e1000_disable_pcie_master_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

4993

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_ich8lan.c

4999

E1000_WRITE_REG(hw, E1000_RCTL, 0);

sys/dev/e1000/e1000_ich8lan.c

5000

E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);

sys/dev/e1000/e1000_ich8lan.c

5001

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_ich8lan.c

5006

if (hw->mac.type == e1000_ich8lan) {

sys/dev/e1000/e1000_ich8lan.c

5008

E1000_WRITE_REG(hw, E1000_PBA, E1000_PBA_8K);

sys/dev/e1000/e1000_ich8lan.c

5010

E1000_WRITE_REG(hw, E1000_PBS, E1000_PBS_16K);

sys/dev/e1000/e1000_ich8lan.c

5013

if (hw->mac.type == e1000_pchlan) {

sys/dev/e1000/e1000_ich8lan.c

5015

ret_val = e1000_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, &kum_cfg);

sys/dev/e1000/e1000_ich8lan.c

5025

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_ich8lan.c

5027

if (!hw->phy.ops.check_reset_block(hw)) {

sys/dev/e1000/e1000_ich8lan.c

5037

if ((hw->mac.type == e1000_pch2lan) &&

sys/dev/e1000/e1000_ich8lan.c

5038

!(E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID))

sys/dev/e1000/e1000_ich8lan.c

5039

e1000_gate_hw_phy_config_ich8lan(hw, true);

sys/dev/e1000/e1000_ich8lan.c

5041

ret_val = e1000_acquire_swflag_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

5049

e1000_read_pci_cfg(hw, E1000_PCI_VENDOR_ID_REGISTER, &pci_cfg);

sys/dev/e1000/e1000_ich8lan.c

5050

E1000_WRITE_REG(hw, E1000_STRAP, pci_cfg);

sys/dev/e1000/e1000_ich8lan.c

5052

E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_RST));

sys/dev/e1000/e1000_ich8lan.c

5061

e1000_read_pci_cfg(hw, E1000_PCI_VENDOR_ID_REGISTER, &pci_cfg);

sys/dev/e1000/e1000_ich8lan.c

5062

E1000_WRITE_REG(hw, E1000_STRAP, pci_cfg);

sys/dev/e1000/e1000_ich8lan.c

5065

if (hw->mac.type == e1000_pch2lan) {

sys/dev/e1000/e1000_ich8lan.c

5066

reg = E1000_READ_REG(hw, E1000_FEXTNVM3);

sys/dev/e1000/e1000_ich8lan.c

5069

E1000_WRITE_REG(hw, E1000_FEXTNVM3, reg);

sys/dev/e1000/e1000_ich8lan.c

5074

ret_val = hw->phy.ops.get_cfg_done(hw);

sys/dev/e1000/e1000_ich8lan.c

5078

ret_val = e1000_post_phy_reset_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

5087

if (hw->mac.type == e1000_pchlan)

sys/dev/e1000/e1000_ich8lan.c

5088

E1000_WRITE_REG(hw, E1000_CRC_OFFSET, 0x65656565);

sys/dev/e1000/e1000_ich8lan.c

5090

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/e1000_ich8lan.c

5091

E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/e1000_ich8lan.c

5093

reg = E1000_READ_REG(hw, E1000_KABGTXD);

sys/dev/e1000/e1000_ich8lan.c

5095

E1000_WRITE_REG(hw, E1000_KABGTXD, reg);

sys/dev/e1000/e1000_ich8lan.c

511

ret_val = e1000_set_mdio_slow_mode_hv(hw);

sys/dev/e1000/e1000_ich8lan.c

5112

static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5114

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_ich8lan.c

5121

e1000_initialize_hw_bits_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

5124

ret_val = mac->ops.id_led_init(hw);

sys/dev/e1000/e1000_ich8lan.c

5130

e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);

sys/dev/e1000/e1000_ich8lan.c

5135

E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);

sys/dev/e1000/e1000_ich8lan.c

514

ret_val = e1000_get_phy_id(hw);

sys/dev/e1000/e1000_ich8lan.c

5141

if (hw->phy.type == e1000_phy_82578) {

sys/dev/e1000/e1000_ich8lan.c

5142

hw->phy.ops.read_reg(hw, BM_PORT_GEN_CFG, &i);

sys/dev/e1000/e1000_ich8lan.c

5144

hw->phy.ops.write_reg(hw, BM_PORT_GEN_CFG, i);

sys/dev/e1000/e1000_ich8lan.c

5145

ret_val = e1000_phy_hw_reset_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

5151

ret_val = mac->ops.setup_link(hw);

sys/dev/e1000/e1000_ich8lan.c

5154

txdctl = E1000_READ_REG(hw, E1000_TXDCTL(0));

sys/dev/e1000/e1000_ich8lan.c

5159

E1000_WRITE_REG(hw, E1000_TXDCTL(0), txdctl);

sys/dev/e1000/e1000_ich8lan.c

5160

txdctl = E1000_READ_REG(hw, E1000_TXDCTL(1));

sys/dev/e1000/e1000_ich8lan.c

5165

E1000_WRITE_REG(hw, E1000_TXDCTL(1), txdctl);

sys/dev/e1000/e1000_ich8lan.c

5174

e1000_set_pcie_no_snoop_generic(hw, snoop);

sys/dev/e1000/e1000_ich8lan.c

5178

uint32_t fflt_dbg = E1000_READ_REG(hw, E1000_FFLT_DBG);

sys/dev/e1000/e1000_ich8lan.c

5180

E1000_WRITE_REG(hw, E1000_FFLT_DBG, fflt_dbg);

sys/dev/e1000/e1000_ich8lan.c

5183

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_ich8lan.c

5185

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_ich8lan.c

5192

e1000_clear_hw_cntrs_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

5204

static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5211

reg = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_ich8lan.c

5214

if (hw->mac.type >= e1000_pchlan)

sys/dev/e1000/e1000_ich8lan.c

5216

E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg);

sys/dev/e1000/e1000_ich8lan.c

5219

reg = E1000_READ_REG(hw, E1000_TXDCTL(0));

sys/dev/e1000/e1000_ich8lan.c

5221

E1000_WRITE_REG(hw, E1000_TXDCTL(0), reg);

sys/dev/e1000/e1000_ich8lan.c

5224

reg = E1000_READ_REG(hw, E1000_TXDCTL(1));

sys/dev/e1000/e1000_ich8lan.c

5226

E1000_WRITE_REG(hw, E1000_TXDCTL(1), reg);

sys/dev/e1000/e1000_ich8lan.c

5229

reg = E1000_READ_REG(hw, E1000_TARC(0));

sys/dev/e1000/e1000_ich8lan.c

5230

if (hw->mac.type == e1000_ich8lan)

sys/dev/e1000/e1000_ich8lan.c

5233

E1000_WRITE_REG(hw, E1000_TARC(0), reg);

sys/dev/e1000/e1000_ich8lan.c

5236

reg = E1000_READ_REG(hw, E1000_TARC(1));

sys/dev/e1000/e1000_ich8lan.c

5237

if (E1000_READ_REG(hw, E1000_TCTL) & E1000_TCTL_MULR)

sys/dev/e1000/e1000_ich8lan.c

5242

E1000_WRITE_REG(hw, E1000_TARC(1), reg);

sys/dev/e1000/e1000_ich8lan.c

5245

if (hw->mac.type == e1000_ich8lan) {

sys/dev/e1000/e1000_ich8lan.c

5246

reg = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_ich8lan.c

5248

E1000_WRITE_REG(hw, E1000_STATUS, reg);

sys/dev/e1000/e1000_ich8lan.c

5254

reg = E1000_READ_REG(hw, E1000_RFCTL);

sys/dev/e1000/e1000_ich8lan.c

5260

if (hw->mac.type == e1000_ich8lan)

sys/dev/e1000/e1000_ich8lan.c

5262

E1000_WRITE_REG(hw, E1000_RFCTL, reg);

sys/dev/e1000/e1000_ich8lan.c

5265

if (hw->mac.type >= e1000_pch_lpt) {

sys/dev/e1000/e1000_ich8lan.c

5266

reg = E1000_READ_REG(hw, E1000_PBECCSTS);

sys/dev/e1000/e1000_ich8lan.c

5268

E1000_WRITE_REG(hw, E1000_PBECCSTS, reg);

sys/dev/e1000/e1000_ich8lan.c

5270

reg = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_ich8lan.c

5272

E1000_WRITE_REG(hw, E1000_CTRL, reg);

sys/dev/e1000/e1000_ich8lan.c

5288

static s32 e1000_setup_link_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5298

if (hw->fc.requested_mode == e1000_fc_default)

sys/dev/e1000/e1000_ich8lan.c

5299

hw->fc.requested_mode = e1000_fc_full;

sys/dev/e1000/e1000_ich8lan.c

5304

hw->fc.current_mode = hw->fc.requested_mode;

sys/dev/e1000/e1000_ich8lan.c

5307

hw->fc.current_mode);

sys/dev/e1000/e1000_ich8lan.c

5309

if (!hw->phy.ops.check_reset_block(hw)) {

sys/dev/e1000/e1000_ich8lan.c

5311

ret_val = hw->mac.ops.setup_physical_interface(hw);

sys/dev/e1000/e1000_ich8lan.c

5316

E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time);

sys/dev/e1000/e1000_ich8lan.c

5317

if ((hw->phy.type == e1000_phy_82578) ||

sys/dev/e1000/e1000_ich8lan.c

5318

(hw->phy.type == e1000_phy_82579) ||

sys/dev/e1000/e1000_ich8lan.c

5319

(hw->phy.type == e1000_phy_i217) ||

sys/dev/e1000/e1000_ich8lan.c

5320

(hw->phy.type == e1000_phy_82577)) {

sys/dev/e1000/e1000_ich8lan.c

5321

E1000_WRITE_REG(hw, E1000_FCRTV_PCH, hw->fc.refresh_time);

sys/dev/e1000/e1000_ich8lan.c

5323

ret_val = hw->phy.ops.write_reg(hw,

sys/dev/e1000/e1000_ich8lan.c

5325

hw->fc.pause_time);

sys/dev/e1000/e1000_ich8lan.c

5330

return e1000_set_fc_watermarks_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

5341

static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5349

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_ich8lan.c

5352

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_ich8lan.c

5358

ret_val = e1000_write_kmrn_reg_generic(hw, E1000_KMRNCTRLSTA_TIMEOUTS,

sys/dev/e1000/e1000_ich8lan.c

5362

ret_val = e1000_read_kmrn_reg_generic(hw,

sys/dev/e1000/e1000_ich8lan.c

5368

ret_val = e1000_write_kmrn_reg_generic(hw,

sys/dev/e1000/e1000_ich8lan.c

5374

switch (hw->phy.type) {

sys/dev/e1000/e1000_ich8lan.c

5376

ret_val = e1000_copper_link_setup_igp(hw);

sys/dev/e1000/e1000_ich8lan.c

5382

ret_val = e1000_copper_link_setup_m88(hw);

sys/dev/e1000/e1000_ich8lan.c

5388

ret_val = e1000_copper_link_setup_82577(hw);

sys/dev/e1000/e1000_ich8lan.c

5393

ret_val = hw->phy.ops.read_reg(hw, IFE_PHY_MDIX_CONTROL,

sys/dev/e1000/e1000_ich8lan.c

5400

switch (hw->phy.mdix) {

sys/dev/e1000/e1000_ich8lan.c

5412

ret_val = hw->phy.ops.write_reg(hw, IFE_PHY_MDIX_CONTROL,

sys/dev/e1000/e1000_ich8lan.c

5421

return e1000_setup_copper_link_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

5432

static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5439

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_ich8lan.c

5442

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_ich8lan.c

5444

ret_val = e1000_copper_link_setup_82577(hw);

sys/dev/e1000/e1000_ich8lan.c

5448

return e1000_setup_copper_link_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

5461

static s32 e1000_get_link_up_info_ich8lan(struct e1000_hw *hw, u16 *speed,

sys/dev/e1000/e1000_ich8lan.c

5468

ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed, duplex);

sys/dev/e1000/e1000_ich8lan.c

5472

if ((hw->mac.type == e1000_ich8lan) &&

sys/dev/e1000/e1000_ich8lan.c

5473

(hw->phy.type == e1000_phy_igp_3) &&

sys/dev/e1000/e1000_ich8lan.c

5475

ret_val = e1000_kmrn_lock_loss_workaround_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

5496

static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5498

struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;

sys/dev/e1000/e1000_ich8lan.c

5513

ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/e1000/e1000_ich8lan.c

5519

ret_val = hw->phy.ops.read_reg(hw, IGP3_KMRN_DIAG, &data);

sys/dev/e1000/e1000_ich8lan.c

552

static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5523

ret_val = hw->phy.ops.read_reg(hw, IGP3_KMRN_DIAG, &data);

sys/dev/e1000/e1000_ich8lan.c

5532

hw->phy.ops.reset(hw);

sys/dev/e1000/e1000_ich8lan.c

5536

phy_ctrl = E1000_READ_REG(hw, E1000_PHY_CTRL);

sys/dev/e1000/e1000_ich8lan.c

5539

E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl);

sys/dev/e1000/e1000_ich8lan.c

554

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_ich8lan.c

5544

e1000_gig_downshift_workaround_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

5558

void e1000_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

5561

struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;

sys/dev/e1000/e1000_ich8lan.c

5565

if (hw->mac.type != e1000_ich8lan) {

sys/dev/e1000/e1000_ich8lan.c

5585

void e1000_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5593

if (hw->phy.type != e1000_phy_igp_3)

sys/dev/e1000/e1000_ich8lan.c

5599

reg = E1000_READ_REG(hw, E1000_PHY_CTRL);

sys/dev/e1000/e1000_ich8lan.c

5602

E1000_WRITE_REG(hw, E1000_PHY_CTRL, reg);

sys/dev/e1000/e1000_ich8lan.c

5607

if (hw->mac.type == e1000_ich8lan)

sys/dev/e1000/e1000_ich8lan.c

5608

e1000_gig_downshift_workaround_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

5611

hw->phy.ops.read_reg(hw, IGP3_VR_CTRL, &data);

sys/dev/e1000/e1000_ich8lan.c

5613

hw->phy.ops.write_reg(hw, IGP3_VR_CTRL,

sys/dev/e1000/e1000_ich8lan.c

5617

hw->phy.ops.read_reg(hw, IGP3_VR_CTRL, &data);

sys/dev/e1000/e1000_ich8lan.c

5623

reg = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_ich8lan.c

5624

E1000_WRITE_REG(hw, E1000_CTRL, reg | E1000_CTRL_PHY_RST);

sys/dev/e1000/e1000_ich8lan.c

5639

void e1000_gig_downshift_workaround_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5646

if ((hw->mac.type != e1000_ich8lan) ||

sys/dev/e1000/e1000_ich8lan.c

5647

(hw->phy.type == e1000_phy_ife))

sys/dev/e1000/e1000_ich8lan.c

5650

ret_val = e1000_read_kmrn_reg_generic(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET,

sys/dev/e1000/e1000_ich8lan.c

5655

ret_val = e1000_write_kmrn_reg_generic(hw,

sys/dev/e1000/e1000_ich8lan.c

5661

e1000_write_kmrn_reg_generic(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET,

sys/dev/e1000/e1000_ich8lan.c

5679

void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5681

struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;

sys/dev/e1000/e1000_ich8lan.c

5687

phy_ctrl = E1000_READ_REG(hw, E1000_PHY_CTRL);

sys/dev/e1000/e1000_ich8lan.c

5690

if (hw->phy.type == e1000_phy_i217) {

sys/dev/e1000/e1000_ich8lan.c

5691

u16 phy_reg, device_id = hw->device_id;

sys/dev/e1000/e1000_ich8lan.c

5697

(hw->mac.type >= e1000_pch_spt)) {

sys/dev/e1000/e1000_ich8lan.c

5698

u32 fextnvm6 = E1000_READ_REG(hw, E1000_FEXTNVM6);

sys/dev/e1000/e1000_ich8lan.c

5700

E1000_WRITE_REG(hw, E1000_FEXTNVM6,

sys/dev/e1000/e1000_ich8lan.c

5704

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

5712

e1000_read_emi_reg_locked(hw,

sys/dev/e1000/e1000_ich8lan.c

5726

(hw->phy.autoneg_advertised & ADVERTISE_100_FULL)) {

sys/dev/e1000/e1000_ich8lan.c

5731

hw->phy.ops.read_reg_locked(hw,

sys/dev/e1000/e1000_ich8lan.c

5735

hw->phy.ops.write_reg_locked(hw,

sys/dev/e1000/e1000_ich8lan.c

5748

if (!(E1000_READ_REG(hw, E1000_FWSM) &

sys/dev/e1000/e1000_ich8lan.c

5751

hw->phy.ops.read_reg_locked(hw, I217_PROXY_CTRL,

sys/dev/e1000/e1000_ich8lan.c

5754

hw->phy.ops.write_reg_locked(hw, I217_PROXY_CTRL,

sys/dev/e1000/e1000_ich8lan.c

5760

hw->phy.ops.read_reg_locked(hw, I217_SxCTRL, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

5762

hw->phy.ops.write_reg_locked(hw, I217_SxCTRL, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

5765

hw->phy.ops.read_reg_locked(hw, I217_MEMPWR, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

5767

hw->phy.ops.write_reg_locked(hw, I217_MEMPWR, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

5773

hw->phy.ops.read_reg_locked(hw, I217_CGFREG, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

5775

hw->phy.ops.write_reg_locked(hw, I217_CGFREG, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

5778

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

5781

E1000_WRITE_REG(hw, E1000_PHY_CTRL, phy_ctrl);

sys/dev/e1000/e1000_ich8lan.c

5783

if (hw->mac.type == e1000_ich8lan)

sys/dev/e1000/e1000_ich8lan.c

5784

e1000_gig_downshift_workaround_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

5786

if (hw->mac.type >= e1000_pchlan) {

sys/dev/e1000/e1000_ich8lan.c

5787

e1000_oem_bits_config_ich8lan(hw, false);

sys/dev/e1000/e1000_ich8lan.c

579

ret_val = e1000_determine_phy_address(hw);

sys/dev/e1000/e1000_ich8lan.c

5790

if (hw->mac.type == e1000_pchlan)

sys/dev/e1000/e1000_ich8lan.c

5791

e1000_phy_hw_reset_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

5793

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

5796

e1000_write_smbus_addr(hw);

sys/dev/e1000/e1000_ich8lan.c

5797

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

5813

u32 e1000_resume_workarounds_pchlan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5818

if (hw->mac.type < e1000_pch2lan)

sys/dev/e1000/e1000_ich8lan.c

5821

ret_val = e1000_init_phy_workarounds_pchlan(hw);

sys/dev/e1000/e1000_ich8lan.c

583

ret_val = e1000_determine_phy_address(hw);

sys/dev/e1000/e1000_ich8lan.c

5832

if (hw->phy.type == e1000_phy_i217) {

sys/dev/e1000/e1000_ich8lan.c

5835

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

5842

hw->phy.ops.read_reg_locked(hw, I217_LPI_GPIO_CTRL, &phy_reg);

sys/dev/e1000/e1000_ich8lan.c

5844

hw->phy.ops.write_reg_locked(hw, I217_LPI_GPIO_CTRL, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

5846

if (!(E1000_READ_REG(hw, E1000_FWSM) &

sys/dev/e1000/e1000_ich8lan.c

5851

ret_val = hw->phy.ops.read_reg_locked(hw, I217_MEMPWR,

sys/dev/e1000/e1000_ich8lan.c

5856

hw->phy.ops.write_reg_locked(hw, I217_MEMPWR, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

5859

hw->phy.ops.write_reg_locked(hw, I217_PROXY_CTRL, 0);

sys/dev/e1000/e1000_ich8lan.c

5862

ret_val = hw->phy.ops.read_reg_locked(hw, I217_CGFREG,

sys/dev/e1000/e1000_ich8lan.c

5867

hw->phy.ops.write_reg_locked(hw, I217_CGFREG, phy_reg);

sys/dev/e1000/e1000_ich8lan.c

5871

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

5883

static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5887

if (hw->phy.type == e1000_phy_ife)

sys/dev/e1000/e1000_ich8lan.c

5888

return hw->phy.ops.write_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED,

sys/dev/e1000/e1000_ich8lan.c

5891

E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default);

sys/dev/e1000/e1000_ich8lan.c

5901

static s32 e1000_led_on_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5905

if (hw->phy.type == e1000_phy_ife)

sys/dev/e1000/e1000_ich8lan.c

5906

return hw->phy.ops.write_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED,

sys/dev/e1000/e1000_ich8lan.c

5909

E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode2);

sys/dev/e1000/e1000_ich8lan.c

5919

static s32 e1000_led_off_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5923

if (hw->phy.type == e1000_phy_ife)

sys/dev/e1000/e1000_ich8lan.c

5924

return hw->phy.ops.write_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED,

sys/dev/e1000/e1000_ich8lan.c

5927

E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1);

sys/dev/e1000/e1000_ich8lan.c

5937

static s32 e1000_setup_led_pchlan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

594

ret_val = e1000_get_phy_id(hw);

sys/dev/e1000/e1000_ich8lan.c

5941

return hw->phy.ops.write_reg(hw, HV_LED_CONFIG,

sys/dev/e1000/e1000_ich8lan.c

5942

(u16)hw->mac.ledctl_mode1);

sys/dev/e1000/e1000_ich8lan.c

5951

static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5955

return hw->phy.ops.write_reg(hw, HV_LED_CONFIG,

sys/dev/e1000/e1000_ich8lan.c

5956

(u16)hw->mac.ledctl_default);

sys/dev/e1000/e1000_ich8lan.c

5965

static s32 e1000_led_on_pchlan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5967

u16 data = (u16)hw->mac.ledctl_mode2;

sys/dev/e1000/e1000_ich8lan.c

5975

if (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) {

sys/dev/e1000/e1000_ich8lan.c

5988

return hw->phy.ops.write_reg(hw, HV_LED_CONFIG, data);

sys/dev/e1000/e1000_ich8lan.c

5997

static s32 e1000_led_off_pchlan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

5999

u16 data = (u16)hw->mac.ledctl_mode1;

sys/dev/e1000/e1000_ich8lan.c

6007

if (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) {

sys/dev/e1000/e1000_ich8lan.c

6020

return hw->phy.ops.write_reg(hw, HV_LED_CONFIG, data);

sys/dev/e1000/e1000_ich8lan.c

6035

static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

6043

e1000_get_cfg_done_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

6046

if (hw->mac.type >= e1000_ich10lan) {

sys/dev/e1000/e1000_ich8lan.c

6047

e1000_lan_init_done_ich8lan(hw);

sys/dev/e1000/e1000_ich8lan.c

6049

ret_val = e1000_get_auto_rd_done_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

6061

status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_ich8lan.c

6063

E1000_WRITE_REG(hw, E1000_STATUS, status & ~E1000_STATUS_PHYRA);

sys/dev/e1000/e1000_ich8lan.c

6068

if (hw->mac.type <= e1000_ich9lan) {

sys/dev/e1000/e1000_ich8lan.c

6069

if (!(E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_PRES) &&

sys/dev/e1000/e1000_ich8lan.c

6070

(hw->phy.type == e1000_phy_igp_3)) {

sys/dev/e1000/e1000_ich8lan.c

6071

e1000_phy_init_script_igp3(hw);

sys/dev/e1000/e1000_ich8lan.c

6074

if (e1000_valid_nvm_bank_detect_ich8lan(hw, &bank)) {

sys/dev/e1000/e1000_ich8lan.c

6091

static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

6094

if (!(hw->mac.ops.check_mng_mode(hw) ||

sys/dev/e1000/e1000_ich8lan.c

6095

hw->phy.ops.check_reset_block(hw)))

sys/dev/e1000/e1000_ich8lan.c

6096

e1000_power_down_phy_copper(hw);

sys/dev/e1000/e1000_ich8lan.c

6108

static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

6115

e1000_clear_hw_cntrs_base_generic(hw);

sys/dev/e1000/e1000_ich8lan.c

6117

E1000_READ_REG(hw, E1000_ALGNERRC);

sys/dev/e1000/e1000_ich8lan.c

6118

E1000_READ_REG(hw, E1000_RXERRC);

sys/dev/e1000/e1000_ich8lan.c

6119

E1000_READ_REG(hw, E1000_TNCRS);

sys/dev/e1000/e1000_ich8lan.c

6120

E1000_READ_REG(hw, E1000_CEXTERR);

sys/dev/e1000/e1000_ich8lan.c

6121

E1000_READ_REG(hw, E1000_TSCTC);

sys/dev/e1000/e1000_ich8lan.c

6122

E1000_READ_REG(hw, E1000_TSCTFC);

sys/dev/e1000/e1000_ich8lan.c

6124

E1000_READ_REG(hw, E1000_MGTPRC);

sys/dev/e1000/e1000_ich8lan.c

6125

E1000_READ_REG(hw, E1000_MGTPDC);

sys/dev/e1000/e1000_ich8lan.c

6126

E1000_READ_REG(hw, E1000_MGTPTC);

sys/dev/e1000/e1000_ich8lan.c

6128

E1000_READ_REG(hw, E1000_IAC);

sys/dev/e1000/e1000_ich8lan.c

6129

E1000_READ_REG(hw, E1000_ICRXOC);

sys/dev/e1000/e1000_ich8lan.c

6132

if ((hw->phy.type == e1000_phy_82578) ||

sys/dev/e1000/e1000_ich8lan.c

6133

(hw->phy.type == e1000_phy_82579) ||

sys/dev/e1000/e1000_ich8lan.c

6134

(hw->phy.type == e1000_phy_i217) ||

sys/dev/e1000/e1000_ich8lan.c

6135

(hw->phy.type == e1000_phy_82577)) {

sys/dev/e1000/e1000_ich8lan.c

6136

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

6139

ret_val = hw->phy.ops.set_page(hw,

sys/dev/e1000/e1000_ich8lan.c

6143

hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6144

hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6145

hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6146

hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6147

hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6148

hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6149

hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6150

hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6151

hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6152

hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6153

hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6154

hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6155

hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6156

hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);

sys/dev/e1000/e1000_ich8lan.c

6158

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_ich8lan.c

6177

s32 e1000_configure_k0s_lpt(struct e1000_hw *hw, u8 entry_latency, u8 min_time)

sys/dev/e1000/e1000_ich8lan.c

6187

ret_val = e1000_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K0S_CTRL,

sys/dev/e1000/e1000_ich8lan.c

6196

ret_val = e1000_write_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K0S_CTRL,

sys/dev/e1000/e1000_ich8lan.c

644

static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

646

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_ich8lan.c

647

struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;

sys/dev/e1000/e1000_ich8lan.c

656

if (hw->mac.type >= e1000_pch_spt) {

sys/dev/e1000/e1000_ich8lan.c

665

(((E1000_READ_REG(hw, E1000_STRAP) >> 1) & 0x1F) + 1)

sys/dev/e1000/e1000_ich8lan.c

671

hw->flash_address = hw->hw_addr + E1000_FLASH_BASE_ADDR;

sys/dev/e1000/e1000_ich8lan.c

674

if (!hw->flash_address) {

sys/dev/e1000/e1000_ich8lan.c

679

gfpreg = E1000_READ_FLASH_REG(hw, ICH_FLASH_GFPREG);

sys/dev/e1000/e1000_ich8lan.c

713

if (hw->mac.type >= e1000_pch_spt) {

sys/dev/e1000/e1000_ich8lan.c

734

static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

736

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_ich8lan.c

74

static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state);

sys/dev/e1000/e1000_ich8lan.c

741

hw->phy.media_type = e1000_media_type_copper;

sys/dev/e1000/e1000_ich8lan.c

75

static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

76

static void e1000_release_swflag_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

77

static s32 e1000_acquire_nvm_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

78

static void e1000_release_nvm_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

79

static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

80

static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

81

static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);

sys/dev/e1000/e1000_ich8lan.c

82

static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);

sys/dev/e1000/e1000_ich8lan.c

83

static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

84

static void e1000_update_mc_addr_list_pch2lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

841

e1000_set_kmrn_lock_loss_workaround_ich8lan(hw, true);

sys/dev/e1000/e1000_ich8lan.c

855

static s32 __e1000_access_emi_reg_locked(struct e1000_hw *hw, u16 address,

sys/dev/e1000/e1000_ich8lan.c

862

ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_ADDR, address);

sys/dev/e1000/e1000_ich8lan.c

867

ret_val = hw->phy.ops.read_reg_locked(hw, I82579_EMI_DATA,

sys/dev/e1000/e1000_ich8lan.c

87

static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

870

ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_DATA,

sys/dev/e1000/e1000_ich8lan.c

88

static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.c

884

s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data)

sys/dev/e1000/e1000_ich8lan.c

888

return __e1000_access_emi_reg_locked(hw, addr, data, true);

sys/dev/e1000/e1000_ich8lan.c

89

static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active);

sys/dev/e1000/e1000_ich8lan.c

899

s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data)

sys/dev/e1000/e1000_ich8lan.c

90

static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

903

return __e1000_access_emi_reg_locked(hw, addr, &data, false);

sys/dev/e1000/e1000_ich8lan.c

92

static s32 e1000_set_d3_lplu_state_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.c

920

s32 e1000_set_eee_pchlan(struct e1000_hw *hw)

sys/dev/e1000/e1000_ich8lan.c

922

struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;

sys/dev/e1000/e1000_ich8lan.c

928

switch (hw->phy.type) {

sys/dev/e1000/e1000_ich8lan.c

94

static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_ich8lan.c

943

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_ich8lan.c

947

ret_val = hw->phy.ops.read_reg_locked(hw, I82579_LPI_CTRL, &lpi_ctrl);

sys/dev/e1000/e1000_ich8lan.c

957

ret_val = e1000_read_emi_reg_locked(hw, lpa,

sys/dev/e1000/e1000_ich8lan.c

96

static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_ich8lan.c

963

ret_val = e1000_read_emi_reg_locked(hw, adv_addr, &adv);

sys/dev/e1000/e1000_ich8lan.c

974

hw->phy.ops.read_reg_locked(hw, PHY_LP_ABILITY, &data);

sys/dev/e1000/e1000_ich8lan.c

98

static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_ich8lan.c

987

if (hw->phy.type == e1000_phy_82579) {

sys/dev/e1000/e1000_ich8lan.c

988

ret_val = e1000_read_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,

sys/dev/e1000/e1000_ich8lan.c

994

ret_val = e1000_write_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,

sys/dev/e1000/e1000_ich8lan.c

999

ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data);

sys/dev/e1000/e1000_ich8lan.h

332

void e1000_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,

sys/dev/e1000/e1000_ich8lan.h

334

void e1000_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.h

335

void e1000_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.h

336

void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.h

337

u32 e1000_resume_workarounds_pchlan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.h

338

s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable);

sys/dev/e1000/e1000_ich8lan.h

339

s32 e1000_configure_k0s_lpt(struct e1000_hw *hw, u8 entry_latency, u8 min_time);

sys/dev/e1000/e1000_ich8lan.h

340

void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.h

341

s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable);

sys/dev/e1000/e1000_ich8lan.h

342

s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data);

sys/dev/e1000/e1000_ich8lan.h

343

s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data);

sys/dev/e1000/e1000_ich8lan.h

344

s32 e1000_set_eee_pchlan(struct e1000_hw *hw);

sys/dev/e1000/e1000_ich8lan.h

345

s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx);

sys/dev/e1000/e1000_ich8lan.h

346

s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force);

sys/dev/e1000/e1000_mac.c

1009

s32 e1000_setup_link_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1018

if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))

sys/dev/e1000/e1000_mac.c

1024

if (hw->fc.requested_mode == e1000_fc_default) {

sys/dev/e1000/e1000_mac.c

1025

ret_val = e1000_set_default_fc_generic(hw);

sys/dev/e1000/e1000_mac.c

1033

hw->fc.current_mode = hw->fc.requested_mode;

sys/dev/e1000/e1000_mac.c

1036

hw->fc.current_mode);

sys/dev/e1000/e1000_mac.c

1039

ret_val = hw->mac.ops.setup_physical_interface(hw);

sys/dev/e1000/e1000_mac.c

1049

E1000_WRITE_REG(hw, E1000_FCT, FLOW_CONTROL_TYPE);

sys/dev/e1000/e1000_mac.c

1050

E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH);

sys/dev/e1000/e1000_mac.c

1051

E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW);

sys/dev/e1000/e1000_mac.c

1053

E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time);

sys/dev/e1000/e1000_mac.c

1055

return e1000_set_fc_watermarks_generic(hw);

sys/dev/e1000/e1000_mac.c

1065

s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1067

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

1088

switch (hw->fc.current_mode) {

sys/dev/e1000/e1000_mac.c

109

s32 e1000_null_link_info(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_mac.c

1121

E1000_WRITE_REG(hw, E1000_TXCW, txcw);

sys/dev/e1000/e1000_mac.c

1134

s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1136

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

1150

status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_mac.c

1162

ret_val = mac->ops.check_for_link(hw);

sys/dev/e1000/e1000_mac.c

1183

s32 e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1190

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_mac.c

1195

hw->mac.ops.config_collision_dist(hw);

sys/dev/e1000/e1000_mac.c

1197

ret_val = e1000_commit_fc_settings_generic(hw);

sys/dev/e1000/e1000_mac.c

120

bool e1000_null_mng_mode(struct e1000_hw E1000_UNUSEDARG *hw)

sys/dev/e1000/e1000_mac.c

1209

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_mac.c

1210

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_mac.c

1217

if (hw->phy.media_type == e1000_media_type_internal_serdes ||

sys/dev/e1000/e1000_mac.c

1218

(E1000_READ_REG(hw, E1000_CTRL) & E1000_CTRL_SWDPIN1)) {

sys/dev/e1000/e1000_mac.c

1219

ret_val = e1000_poll_fiber_serdes_link_generic(hw);

sys/dev/e1000/e1000_mac.c

1234

static void e1000_config_collision_dist_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1240

tctl = E1000_READ_REG(hw, E1000_TCTL);

sys/dev/e1000/e1000_mac.c

1245

E1000_WRITE_REG(hw, E1000_TCTL, tctl);

sys/dev/e1000/e1000_mac.c

1246

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_mac.c

1257

s32 e1000_set_fc_watermarks_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1269

if (hw->fc.current_mode & e1000_fc_tx_pause) {

sys/dev/e1000/e1000_mac.c

1274

fcrtl = hw->fc.low_water;

sys/dev/e1000/e1000_mac.c

1275

if (hw->fc.send_xon)

sys/dev/e1000/e1000_mac.c

1278

fcrth = hw->fc.high_water;

sys/dev/e1000/e1000_mac.c

1280

E1000_WRITE_REG(hw, E1000_FCRTL, fcrtl);

sys/dev/e1000/e1000_mac.c

1281

E1000_WRITE_REG(hw, E1000_FCRTH, fcrth);

sys/dev/e1000/e1000_mac.c

1296

s32 e1000_force_mac_fc_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1302

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_mac.c

132

void e1000_null_update_mc(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_mac.c

1321

DEBUGOUT1("hw->fc.current_mode = %u\n", hw->fc.current_mode);

sys/dev/e1000/e1000_mac.c

1323

switch (hw->fc.current_mode) {

sys/dev/e1000/e1000_mac.c

1343

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_mac.c

1358

s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1360

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

1373

if (hw->phy.media_type == e1000_media_type_fiber ||

sys/dev/e1000/e1000_mac.c

1374

hw->phy.media_type == e1000_media_type_internal_serdes)

sys/dev/e1000/e1000_mac.c

1375

ret_val = e1000_force_mac_fc_generic(hw);

sys/dev/e1000/e1000_mac.c

1377

if (hw->phy.media_type == e1000_media_type_copper)

sys/dev/e1000/e1000_mac.c

1378

ret_val = e1000_force_mac_fc_generic(hw);

sys/dev/e1000/e1000_mac.c

1391

if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) {

sys/dev/e1000/e1000_mac.c

1396

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);

sys/dev/e1000/e1000_mac.c

1399

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);

sys/dev/e1000/e1000_mac.c

1414

ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,

sys/dev/e1000/e1000_mac.c

1418

ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,

sys/dev/e1000/e1000_mac.c

145

void e1000_null_write_vfta(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_mac.c

1464

if (hw->fc.requested_mode == e1000_fc_full) {

sys/dev/e1000/e1000_mac.c

1465

hw->fc.current_mode = e1000_fc_full;

sys/dev/e1000/e1000_mac.c

1468

hw->fc.current_mode = e1000_fc_rx_pause;

sys/dev/e1000/e1000_mac.c

1483

hw->fc.current_mode = e1000_fc_tx_pause;

sys/dev/e1000/e1000_mac.c

1497

hw->fc.current_mode = e1000_fc_rx_pause;

sys/dev/e1000/e1000_mac.c

1503

hw->fc.current_mode = e1000_fc_none;

sys/dev/e1000/e1000_mac.c

1511

ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);

sys/dev/e1000/e1000_mac.c

1518

hw->fc.current_mode = e1000_fc_none;

sys/dev/e1000/e1000_mac.c

1523

ret_val = e1000_force_mac_fc_generic(hw);

sys/dev/e1000/e1000_mac.c

1535

if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&

sys/dev/e1000/e1000_mac.c

1540

pcs_status_reg = E1000_READ_REG(hw, E1000_PCS_LSTAT);

sys/dev/e1000/e1000_mac.c

1553

pcs_adv_reg = E1000_READ_REG(hw, E1000_PCS_ANADV);

sys/dev/e1000/e1000_mac.c

1554

pcs_lp_ability_reg = E1000_READ_REG(hw, E1000_PCS_LPAB);

sys/dev/e1000/e1000_mac.c

158

int e1000_null_rar_set(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_mac.c

1597

if (hw->fc.requested_mode == e1000_fc_full) {

sys/dev/e1000/e1000_mac.c

1598

hw->fc.current_mode = e1000_fc_full;

sys/dev/e1000/e1000_mac.c

1601

hw->fc.current_mode = e1000_fc_rx_pause;

sys/dev/e1000/e1000_mac.c

1616

hw->fc.current_mode = e1000_fc_tx_pause;

sys/dev/e1000/e1000_mac.c

1630

hw->fc.current_mode = e1000_fc_rx_pause;

sys/dev/e1000/e1000_mac.c

1636

hw->fc.current_mode = e1000_fc_none;

sys/dev/e1000/e1000_mac.c

1643

pcs_ctrl_reg = E1000_READ_REG(hw, E1000_PCS_LCTL);

sys/dev/e1000/e1000_mac.c

1645

E1000_WRITE_REG(hw, E1000_PCS_LCTL, pcs_ctrl_reg);

sys/dev/e1000/e1000_mac.c

1647

ret_val = e1000_force_mac_fc_generic(hw);

sys/dev/e1000/e1000_mac.c

1666

s32 e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,

sys/dev/e1000/e1000_mac.c

1673

status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_mac.c

169

s32 e1000_null_set_obff_timer(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_mac.c

1705

s32 e1000_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_mac.c

1722

s32 e1000_get_auto_rd_done_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1729

if (E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_AUTO_RD)

sys/dev/e1000/e1000_mac.c

1751

s32 e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data)

sys/dev/e1000/e1000_mac.c

1757

ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);

sys/dev/e1000/e1000_mac.c

1774

s32 e1000_id_led_init_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1776

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

1786

ret_val = hw->nvm.ops.valid_led_default(hw, &data);

sys/dev/e1000/e1000_mac.c

1790

mac->ledctl_default = E1000_READ_REG(hw, E1000_LEDCTL);

sys/dev/e1000/e1000_mac.c

184

s32 e1000_get_bus_info_pci_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1842

s32 e1000_setup_led_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1848

if (hw->mac.ops.setup_led != e1000_setup_led_generic)

sys/dev/e1000/e1000_mac.c

1851

if (hw->phy.media_type == e1000_media_type_fiber) {

sys/dev/e1000/e1000_mac.c

1852

ledctl = E1000_READ_REG(hw, E1000_LEDCTL);

sys/dev/e1000/e1000_mac.c

1853

hw->mac.ledctl_default = ledctl;

sys/dev/e1000/e1000_mac.c

1859

E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);

sys/dev/e1000/e1000_mac.c

186

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

1860

} else if (hw->phy.media_type == e1000_media_type_copper) {

sys/dev/e1000/e1000_mac.c

1861

E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1);

sys/dev/e1000/e1000_mac.c

187

struct e1000_bus_info *bus = &hw->bus;

sys/dev/e1000/e1000_mac.c

1874

s32 e1000_cleanup_led_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1878

E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default);

sys/dev/e1000/e1000_mac.c

188

u32 status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_mac.c

1888

s32 e1000_blink_led_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1895

if (hw->phy.media_type == e1000_media_type_fiber) {

sys/dev/e1000/e1000_mac.c

1906

ledctl_blink = hw->mac.ledctl_mode2;

sys/dev/e1000/e1000_mac.c

1908

u32 mode = (hw->mac.ledctl_mode2 >> i) &

sys/dev/e1000/e1000_mac.c

1910

u32 led_default = hw->mac.ledctl_default >> i;

sys/dev/e1000/e1000_mac.c

1924

E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl_blink);

sys/dev/e1000/e1000_mac.c

1935

s32 e1000_led_on_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1941

switch (hw->phy.media_type) {

sys/dev/e1000/e1000_mac.c

1943

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_mac.c

1946

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_mac.c

1949

E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode2);

sys/dev/e1000/e1000_mac.c

1964

s32 e1000_led_off_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

1970

switch (hw->phy.media_type) {

sys/dev/e1000/e1000_mac.c

1972

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_mac.c

1975

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_mac.c

1978

E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1);

sys/dev/e1000/e1000_mac.c

1994

void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop)

sys/dev/e1000/e1000_mac.c

2000

if (hw->bus.type != e1000_bus_type_pci_express)

sys/dev/e1000/e1000_mac.c

2004

gcr = E1000_READ_REG(hw, E1000_GCR);

sys/dev/e1000/e1000_mac.c

2007

E1000_WRITE_REG(hw, E1000_GCR, gcr);

sys/dev/e1000/e1000_mac.c

2022

s32 e1000_disable_pcie_master_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

2029

if (hw->bus.type != e1000_bus_type_pci_express)

sys/dev/e1000/e1000_mac.c

2032

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_mac.c

2034

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_mac.c

2037

if (!(E1000_READ_REG(hw, E1000_STATUS) &

sys/dev/e1000/e1000_mac.c

2039

E1000_REMOVED(hw->hw_addr))

sys/dev/e1000/e1000_mac.c

2059

void e1000_reset_adaptive_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

2061

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

2077

E1000_WRITE_REG(hw, E1000_AIT, 0);

sys/dev/e1000/e1000_mac.c

2087

void e1000_update_adaptive_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

2089

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

2107

E1000_WRITE_REG(hw, E1000_AIT,

sys/dev/e1000/e1000_mac.c

2116

E1000_WRITE_REG(hw, E1000_AIT, 0);

sys/dev/e1000/e1000_mac.c

2128

static s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

2132

if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) {

sys/dev/e1000/e1000_mac.c

2134

hw->phy.mdix = 1;

sys/dev/e1000/e1000_mac.c

2148

s32 e1000_validate_mdi_setting_crossover_generic(struct e1000_hw E1000_UNUSEDARG *hw)

sys/dev/e1000/e1000_mac.c

2166

s32 e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,

sys/dev/e1000/e1000_mac.c

2175

E1000_WRITE_REG(hw, reg, regvalue);

sys/dev/e1000/e1000_mac.c

2180

regvalue = E1000_READ_REG(hw, reg);

sys/dev/e1000/e1000_mac.c

2198

s32 e1000_get_hw_semaphore(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

2201

s32 fw_timeout = hw->nvm.word_size + 1;

sys/dev/e1000/e1000_mac.c

2202

s32 sw_timeout = hw->nvm.word_size + 1;

sys/dev/e1000/e1000_mac.c

2215

if (hw->dev_spec._82571.smb_counter > 2)

sys/dev/e1000/e1000_mac.c

2221

swsm = E1000_READ_REG(hw, E1000_SWSM);

sys/dev/e1000/e1000_mac.c

2231

hw->dev_spec._82571.smb_counter++;

sys/dev/e1000/e1000_mac.c

2237

if (hw->dev_spec._82575.clear_semaphore_once) {

sys/dev/e1000/e1000_mac.c

2238

hw->dev_spec._82575.clear_semaphore_once = false;

sys/dev/e1000/e1000_mac.c

2239

e1000_put_hw_semaphore(hw);

sys/dev/e1000/e1000_mac.c

2241

swsm = E1000_READ_REG(hw, E1000_SWSM);

sys/dev/e1000/e1000_mac.c

2251

swsm = E1000_READ_REG(hw, E1000_SWSM);

sys/dev/e1000/e1000_mac.c

2252

E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_SWESMBI);

sys/dev/e1000/e1000_mac.c

2255

if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI)

sys/dev/e1000/e1000_mac.c

226

mac->ops.set_lan_id(hw);

sys/dev/e1000/e1000_mac.c

2263

e1000_put_hw_semaphore(hw);

sys/dev/e1000/e1000_mac.c

2277

void e1000_put_hw_semaphore(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

2283

swsm = E1000_READ_REG(hw, E1000_SWSM);

sys/dev/e1000/e1000_mac.c

2287

E1000_WRITE_REG(hw, E1000_SWSM, swsm);

sys/dev/e1000/e1000_mac.c

2300

e1000_acquire_swfw_sync(struct e1000_hw *hw, u16 mask)

sys/dev/e1000/e1000_mac.c

2311

if (e1000_get_hw_semaphore(hw)) {

sys/dev/e1000/e1000_mac.c

2316

swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);

sys/dev/e1000/e1000_mac.c

2324

e1000_put_hw_semaphore(hw);

sys/dev/e1000/e1000_mac.c

2336

E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);

sys/dev/e1000/e1000_mac.c

2338

e1000_put_hw_semaphore(hw);

sys/dev/e1000/e1000_mac.c

2353

e1000_release_swfw_sync(struct e1000_hw *hw, u16 mask)

sys/dev/e1000/e1000_mac.c

2359

while (e1000_get_hw_semaphore(hw) != E1000_SUCCESS)

sys/dev/e1000/e1000_mac.c

2362

swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);

sys/dev/e1000/e1000_mac.c

2364

E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);

sys/dev/e1000/e1000_mac.c

2366

e1000_put_hw_semaphore(hw);

sys/dev/e1000/e1000_mac.c

239

s32 e1000_get_bus_info_pcie_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

241

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

242

struct e1000_bus_info *bus = &hw->bus;

sys/dev/e1000/e1000_mac.c

250

ret_val = e1000_read_pcie_cap_reg(hw, PCIE_LINK_STATUS,

sys/dev/e1000/e1000_mac.c

272

mac->ops.set_lan_id(hw);

sys/dev/e1000/e1000_mac.c

285

static void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

287

struct e1000_bus_info *bus = &hw->bus;

sys/dev/e1000/e1000_mac.c

293

reg = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_mac.c

303

void e1000_set_lan_id_multi_port_pci(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

305

struct e1000_bus_info *bus = &hw->bus;

sys/dev/e1000/e1000_mac.c

309

e1000_read_pci_cfg(hw, PCI_HEADER_TYPE_REGISTER, &pci_header_type);

sys/dev/e1000/e1000_mac.c

311

status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_mac.c

325

void e1000_set_lan_id_single_port(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

327

struct e1000_bus_info *bus = &hw->bus;

sys/dev/e1000/e1000_mac.c

339

void e1000_clear_vfta_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

346

E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0);

sys/dev/e1000/e1000_mac.c

347

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_mac.c

360

void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)

sys/dev/e1000/e1000_mac.c

364

E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);

sys/dev/e1000/e1000_mac.c

365

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_mac.c

37

static s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.c

377

void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count)

sys/dev/e1000/e1000_mac.c

38

static void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.c

387

hw->mac.ops.rar_set(hw, hw->mac.addr, 0);

sys/dev/e1000/e1000_mac.c

39

static void e1000_config_collision_dist_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.c

392

hw->mac.ops.rar_set(hw, mac_addr, i);

sys/dev/e1000/e1000_mac.c

407

s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

416

ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &nvm_data);

sys/dev/e1000/e1000_mac.c

421

if ((hw->mac.type < e1000_82571) || (hw->mac.type == e1000_82573))

sys/dev/e1000/e1000_mac.c

427

if (hw->mac.type >= e1000_82580)

sys/dev/e1000/e1000_mac.c

430

ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,

sys/dev/e1000/e1000_mac.c

442

if (hw->bus.func == E1000_FUNC_1)

sys/dev/e1000/e1000_mac.c

444

if (hw->bus.func == E1000_FUNC_2)

sys/dev/e1000/e1000_mac.c

447

if (hw->bus.func == E1000_FUNC_3)

sys/dev/e1000/e1000_mac.c

451

ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);

sys/dev/e1000/e1000_mac.c

47

void e1000_init_mac_ops_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

471

hw->mac.ops.rar_set(hw, alt_mac_addr, 0);

sys/dev/e1000/e1000_mac.c

485

int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)

sys/dev/e1000/e1000_mac.c

49

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

507

E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);

sys/dev/e1000/e1000_mac.c

508

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_mac.c

509

E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);

sys/dev/e1000/e1000_mac.c

510

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_mac.c

523

u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr)

sys/dev/e1000/e1000_mac.c

531

hash_mask = (hw->mac.mta_reg_count * 32) - 1;

sys/dev/e1000/e1000_mac.c

564

switch (hw->mac.mc_filter_type) {

sys/dev/e1000/e1000_mac.c

594

void e1000_update_mc_addr_list_generic(struct e1000_hw *hw,

sys/dev/e1000/e1000_mac.c

603

memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow));

sys/dev/e1000/e1000_mac.c

607

hash_value = e1000_hash_mc_addr_generic(hw, mc_addr_list);

sys/dev/e1000/e1000_mac.c

609

hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);

sys/dev/e1000/e1000_mac.c

612

hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit);

sys/dev/e1000/e1000_mac.c

617

for (i = hw->mac.mta_reg_count - 1; i >= 0; i--)

sys/dev/e1000/e1000_mac.c

618

E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw->mac.mta_shadow[i]);

sys/dev/e1000/e1000_mac.c

619

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_mac.c

631

void e1000_pcix_mmrbc_workaround_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

641

if (hw->bus.type != e1000_bus_type_pcix)

sys/dev/e1000/e1000_mac.c

644

e1000_read_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd);

sys/dev/e1000/e1000_mac.c

645

e1000_read_pci_cfg(hw, PCIX_STATUS_REGISTER_HI, &pcix_stat_hi_word);

sys/dev/e1000/e1000_mac.c

655

e1000_write_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd);

sys/dev/e1000/e1000_mac.c

665

void e1000_clear_hw_cntrs_base_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

669

E1000_READ_REG(hw, E1000_CRCERRS);

sys/dev/e1000/e1000_mac.c

670

E1000_READ_REG(hw, E1000_SYMERRS);

sys/dev/e1000/e1000_mac.c

671

E1000_READ_REG(hw, E1000_MPC);

sys/dev/e1000/e1000_mac.c

672

E1000_READ_REG(hw, E1000_SCC);

sys/dev/e1000/e1000_mac.c

673

E1000_READ_REG(hw, E1000_ECOL);

sys/dev/e1000/e1000_mac.c

674

E1000_READ_REG(hw, E1000_MCC);

sys/dev/e1000/e1000_mac.c

675

E1000_READ_REG(hw, E1000_LATECOL);

sys/dev/e1000/e1000_mac.c

676

E1000_READ_REG(hw, E1000_COLC);

sys/dev/e1000/e1000_mac.c

677

E1000_READ_REG(hw, E1000_DC);

sys/dev/e1000/e1000_mac.c

678

E1000_READ_REG(hw, E1000_SEC);

sys/dev/e1000/e1000_mac.c

679

E1000_READ_REG(hw, E1000_RLEC);

sys/dev/e1000/e1000_mac.c

680

E1000_READ_REG(hw, E1000_XONRXC);

sys/dev/e1000/e1000_mac.c

681

E1000_READ_REG(hw, E1000_XONTXC);

sys/dev/e1000/e1000_mac.c

682

E1000_READ_REG(hw, E1000_XOFFRXC);

sys/dev/e1000/e1000_mac.c

683

E1000_READ_REG(hw, E1000_XOFFTXC);

sys/dev/e1000/e1000_mac.c

684

E1000_READ_REG(hw, E1000_FCRUC);

sys/dev/e1000/e1000_mac.c

685

E1000_READ_REG(hw, E1000_GPRC);

sys/dev/e1000/e1000_mac.c

686

E1000_READ_REG(hw, E1000_BPRC);

sys/dev/e1000/e1000_mac.c

687

E1000_READ_REG(hw, E1000_MPRC);

sys/dev/e1000/e1000_mac.c

688

E1000_READ_REG(hw, E1000_GPTC);

sys/dev/e1000/e1000_mac.c

689

E1000_READ_REG(hw, E1000_GORCL);

sys/dev/e1000/e1000_mac.c

690

E1000_READ_REG(hw, E1000_GORCH);

sys/dev/e1000/e1000_mac.c

691

E1000_READ_REG(hw, E1000_GOTCL);

sys/dev/e1000/e1000_mac.c

692

E1000_READ_REG(hw, E1000_GOTCH);

sys/dev/e1000/e1000_mac.c

693

E1000_READ_REG(hw, E1000_RNBC);

sys/dev/e1000/e1000_mac.c

694

E1000_READ_REG(hw, E1000_RUC);

sys/dev/e1000/e1000_mac.c

695

E1000_READ_REG(hw, E1000_RFC);

sys/dev/e1000/e1000_mac.c

696

E1000_READ_REG(hw, E1000_ROC);

sys/dev/e1000/e1000_mac.c

697

E1000_READ_REG(hw, E1000_RJC);

sys/dev/e1000/e1000_mac.c

698

E1000_READ_REG(hw, E1000_TORL);

sys/dev/e1000/e1000_mac.c

699

E1000_READ_REG(hw, E1000_TORH);

sys/dev/e1000/e1000_mac.c

700

E1000_READ_REG(hw, E1000_TOTL);

sys/dev/e1000/e1000_mac.c

701

E1000_READ_REG(hw, E1000_TOTH);

sys/dev/e1000/e1000_mac.c

702

E1000_READ_REG(hw, E1000_TPR);

sys/dev/e1000/e1000_mac.c

703

E1000_READ_REG(hw, E1000_TPT);

sys/dev/e1000/e1000_mac.c

704

E1000_READ_REG(hw, E1000_MPTC);

sys/dev/e1000/e1000_mac.c

705

E1000_READ_REG(hw, E1000_BPTC);

sys/dev/e1000/e1000_mac.c

716

s32 e1000_check_for_copper_link_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

718

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

736

ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/e1000/e1000_mac.c

748

e1000_check_downshift_generic(hw);

sys/dev/e1000/e1000_mac.c

760

mac->ops.config_collision_dist(hw);

sys/dev/e1000/e1000_mac.c

767

ret_val = e1000_config_fc_after_link_up_generic(hw);

sys/dev/e1000/e1000_mac.c

781

s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

783

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

791

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_mac.c

792

status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_mac.c

793

rxcw = E1000_READ_REG(hw, E1000_RXCW);

sys/dev/e1000/e1000_mac.c

812

E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE));

sys/dev/e1000/e1000_mac.c

815

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_mac.c

817

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_mac.c

820

ret_val = e1000_config_fc_after_link_up_generic(hw);

sys/dev/e1000/e1000_mac.c

832

E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);

sys/dev/e1000/e1000_mac.c

833

E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));

sys/dev/e1000/e1000_mac.c

848

s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

850

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_mac.c

858

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_mac.c

859

status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_mac.c

860

rxcw = E1000_READ_REG(hw, E1000_RXCW);

sys/dev/e1000/e1000_mac.c

87

s32 e1000_null_ops_generic(struct e1000_hw E1000_UNUSEDARG *hw)

sys/dev/e1000/e1000_mac.c

877

E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE));

sys/dev/e1000/e1000_mac.c

880

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_mac.c

882

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_mac.c

885

ret_val = e1000_config_fc_after_link_up_generic(hw);

sys/dev/e1000/e1000_mac.c

897

E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);

sys/dev/e1000/e1000_mac.c

898

E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));

sys/dev/e1000/e1000_mac.c

901

} else if (!(E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW))) {

sys/dev/e1000/e1000_mac.c

908

rxcw = E1000_READ_REG(hw, E1000_RXCW);

sys/dev/e1000/e1000_mac.c

920

if (E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW)) {

sys/dev/e1000/e1000_mac.c

921

status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_mac.c

925

rxcw = E1000_READ_REG(hw, E1000_RXCW);

sys/dev/e1000/e1000_mac.c

954

s32 e1000_set_default_fc_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mac.c

97

void e1000_null_mac_generic(struct e1000_hw E1000_UNUSEDARG *hw)

sys/dev/e1000/e1000_mac.c

970

if (hw->mac.type == e1000_i350) {

sys/dev/e1000/e1000_mac.c

971

nvm_offset = NVM_82580_LAN_FUNC_OFFSET(hw->bus.func);

sys/dev/e1000/e1000_mac.c

972

ret_val = hw->nvm.ops.read(hw,

sys/dev/e1000/e1000_mac.c

977

ret_val = hw->nvm.ops.read(hw,

sys/dev/e1000/e1000_mac.c

989

hw->fc.requested_mode = e1000_fc_none;

sys/dev/e1000/e1000_mac.c

992

hw->fc.requested_mode = e1000_fc_tx_pause;

sys/dev/e1000/e1000_mac.c

994

hw->fc.requested_mode = e1000_fc_full;

sys/dev/e1000/e1000_mac.h

38

void e1000_init_mac_ops_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

40

void e1000_null_mac_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

41

s32 e1000_null_ops_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

42

s32 e1000_null_link_info(struct e1000_hw *hw, u16 *s, u16 *d);

sys/dev/e1000/e1000_mac.h

43

bool e1000_null_mng_mode(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

44

void e1000_null_update_mc(struct e1000_hw *hw, u8 *h, u32 a);

sys/dev/e1000/e1000_mac.h

45

void e1000_null_write_vfta(struct e1000_hw *hw, u32 a, u32 b);

sys/dev/e1000/e1000_mac.h

46

int e1000_null_rar_set(struct e1000_hw *hw, u8 *h, u32 a);

sys/dev/e1000/e1000_mac.h

47

s32 e1000_null_set_obff_timer(struct e1000_hw *hw, u32 a);

sys/dev/e1000/e1000_mac.h

48

s32 e1000_blink_led_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

49

s32 e1000_check_for_copper_link_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

50

s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

51

s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

52

s32 e1000_cleanup_led_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

53

s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

54

s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

55

s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

56

s32 e1000_disable_pcie_master_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

57

s32 e1000_force_mac_fc_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

58

s32 e1000_get_auto_rd_done_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

59

s32 e1000_get_bus_info_pci_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

60

s32 e1000_get_bus_info_pcie_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

61

void e1000_set_lan_id_single_port(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

62

void e1000_set_lan_id_multi_port_pci(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

63

s32 e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,

sys/dev/e1000/e1000_mac.h

65

s32 e1000_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw *hw,

sys/dev/e1000/e1000_mac.h

67

s32 e1000_id_led_init_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

68

s32 e1000_led_on_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

69

s32 e1000_led_off_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

70

void e1000_update_mc_addr_list_generic(struct e1000_hw *hw,

sys/dev/e1000/e1000_mac.h

72

int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);

sys/dev/e1000/e1000_mac.h

73

s32 e1000_set_default_fc_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

74

s32 e1000_set_fc_watermarks_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

75

s32 e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

76

s32 e1000_setup_led_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

77

s32 e1000_setup_link_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

78

s32 e1000_validate_mdi_setting_crossover_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

79

s32 e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,

sys/dev/e1000/e1000_mac.h

82

u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr);

sys/dev/e1000/e1000_mac.h

84

void e1000_clear_hw_cntrs_base_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

85

void e1000_clear_vfta_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

86

void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count);

sys/dev/e1000/e1000_mac.h

87

void e1000_pcix_mmrbc_workaround_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

88

s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

89

void e1000_reset_adaptive_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

90

void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop);

sys/dev/e1000/e1000_mac.h

91

void e1000_update_adaptive_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

92

void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);

sys/dev/e1000/e1000_mac.h

94

s32 e1000_get_hw_semaphore(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

95

void e1000_put_hw_semaphore(struct e1000_hw *hw);

sys/dev/e1000/e1000_mac.h

96

s32 e1000_acquire_swfw_sync(struct e1000_hw *hw, u16 mask);

sys/dev/e1000/e1000_mac.h

97

void e1000_release_swfw_sync(struct e1000_hw *hw, u16 mask);

sys/dev/e1000/e1000_manage.c

113

bool e1000_check_mng_mode_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_manage.c

115

u32 fwsm = E1000_READ_REG(hw, E1000_FWSM);

sys/dev/e1000/e1000_manage.c

131

bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_manage.c

133

struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;

sys/dev/e1000/e1000_manage.c

134

u32 *buffer = (u32 *)&hw->mng_cookie;

sys/dev/e1000/e1000_manage.c

141

hw->mac.tx_pkt_filtering = true;

sys/dev/e1000/e1000_manage.c

144

if (!hw->mac.ops.check_mng_mode(hw)) {

sys/dev/e1000/e1000_manage.c

145

hw->mac.tx_pkt_filtering = false;

sys/dev/e1000/e1000_manage.c

146

return hw->mac.tx_pkt_filtering;

sys/dev/e1000/e1000_manage.c

152

ret_val = e1000_mng_enable_host_if_generic(hw);

sys/dev/e1000/e1000_manage.c

154

hw->mac.tx_pkt_filtering = false;

sys/dev/e1000/e1000_manage.c

155

return hw->mac.tx_pkt_filtering;

sys/dev/e1000/e1000_manage.c

162

*(buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF,

sys/dev/e1000/e1000_manage.c

173

hw->mac.tx_pkt_filtering = true;

sys/dev/e1000/e1000_manage.c

174

return hw->mac.tx_pkt_filtering;

sys/dev/e1000/e1000_manage.c

179

hw->mac.tx_pkt_filtering = false;

sys/dev/e1000/e1000_manage.c

181

return hw->mac.tx_pkt_filtering;

sys/dev/e1000/e1000_manage.c

191

s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,

sys/dev/e1000/e1000_manage.c

205

E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,

sys/dev/e1000/e1000_manage.c

207

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_manage.c

225

s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,

sys/dev/e1000/e1000_manage.c

245

data = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset);

sys/dev/e1000/e1000_manage.c

250

E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset, data);

sys/dev/e1000/e1000_manage.c

270

E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,

sys/dev/e1000/e1000_manage.c

282

E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,

sys/dev/e1000/e1000_manage.c

297

s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw, u8 *buffer,

sys/dev/e1000/e1000_manage.c

313

ret_val = e1000_mng_enable_host_if_generic(hw);

sys/dev/e1000/e1000_manage.c

318

ret_val = e1000_mng_host_if_write_generic(hw, buffer, length,

sys/dev/e1000/e1000_manage.c

324

ret_val = e1000_mng_write_cmd_header_generic(hw, &hdr);

sys/dev/e1000/e1000_manage.c

329

hicr = E1000_READ_REG(hw, E1000_HICR);

sys/dev/e1000/e1000_manage.c

330

E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);

sys/dev/e1000/e1000_manage.c

342

bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)

sys/dev/e1000/e1000_manage.c

349

if (!hw->mac.asf_firmware_present)

sys/dev/e1000/e1000_manage.c

352

manc = E1000_READ_REG(hw, E1000_MANC);

sys/dev/e1000/e1000_manage.c

357

if (hw->mac.has_fwsm) {

sys/dev/e1000/e1000_manage.c

358

fwsm = E1000_READ_REG(hw, E1000_FWSM);

sys/dev/e1000/e1000_manage.c

359

factps = E1000_READ_REG(hw, E1000_FACTPS);

sys/dev/e1000/e1000_manage.c

365

} else if ((hw->mac.type == e1000_82574) ||

sys/dev/e1000/e1000_manage.c

366

(hw->mac.type == e1000_82583)) {

sys/dev/e1000/e1000_manage.c

370

factps = E1000_READ_REG(hw, E1000_FACTPS);

sys/dev/e1000/e1000_manage.c

371

ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);

sys/dev/e1000/e1000_manage.c

396

s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length)

sys/dev/e1000/e1000_manage.c

402

if (!(hw->mac.arc_subsystem_valid)) {

sys/dev/e1000/e1000_manage.c

407

if (!hw->mac.asf_firmware_present) {

sys/dev/e1000/e1000_manage.c

419

hicr = E1000_READ_REG(hw, E1000_HICR);

sys/dev/e1000/e1000_manage.c

432

E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,

sys/dev/e1000/e1000_manage.c

436

E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);

sys/dev/e1000/e1000_manage.c

439

hicr = E1000_READ_REG(hw, E1000_HICR);

sys/dev/e1000/e1000_manage.c

447

(!(E1000_READ_REG(hw, E1000_HICR) & E1000_HICR_SV))) {

sys/dev/e1000/e1000_manage.c

453

*((u32 *)buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw,

sys/dev/e1000/e1000_manage.c

470

s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length)

sys/dev/e1000/e1000_manage.c

476

if (hw->mac.type < e1000_i210) {

sys/dev/e1000/e1000_manage.c

482

hicr = E1000_READ_REG(hw, E1000_HICR);

sys/dev/e1000/e1000_manage.c

498

icr = E1000_READ_REG(hw, E1000_ICR_V2);

sys/dev/e1000/e1000_manage.c

501

hicr = E1000_READ_REG(hw, E1000_HICR);

sys/dev/e1000/e1000_manage.c

503

E1000_WRITE_REG(hw, E1000_HICR, hicr);

sys/dev/e1000/e1000_manage.c

505

E1000_WRITE_REG(hw, E1000_HICR, hicr);

sys/dev/e1000/e1000_manage.c

506

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_manage.c

510

icr = E1000_READ_REG(hw, E1000_ICR_V2);

sys/dev/e1000/e1000_manage.c

524

fwsm = E1000_READ_REG(hw, E1000_FWSM);

sys/dev/e1000/e1000_manage.c

551

E1000_WRITE_REG(hw, E1000_HIBBA, hibba);

sys/dev/e1000/e1000_manage.c

554

E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF,

sys/dev/e1000/e1000_manage.c

560

hicr = E1000_READ_REG(hw, E1000_HICR);

sys/dev/e1000/e1000_manage.c

561

E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);

sys/dev/e1000/e1000_manage.c

564

hicr = E1000_READ_REG(hw, E1000_HICR);

sys/dev/e1000/e1000_manage.c

72

s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_manage.c

79

if (!hw->mac.arc_subsystem_valid) {

sys/dev/e1000/e1000_manage.c

85

hicr = E1000_READ_REG(hw, E1000_HICR);

sys/dev/e1000/e1000_manage.c

92

hicr = E1000_READ_REG(hw, E1000_HICR);

sys/dev/e1000/e1000_manage.h

38

bool e1000_check_mng_mode_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_manage.h

39

bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_manage.h

40

s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_manage.h

41

s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,

sys/dev/e1000/e1000_manage.h

43

s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,

sys/dev/e1000/e1000_manage.h

45

s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw,

sys/dev/e1000/e1000_manage.h

47

bool e1000_enable_mng_pass_thru(struct e1000_hw *hw);

sys/dev/e1000/e1000_manage.h

49

s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length);

sys/dev/e1000/e1000_manage.h

50

s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length);

sys/dev/e1000/e1000_mbx.c

100

ret_val = mbx->ops.read(hw, msg, size, mbx_id, unlock);

sys/dev/e1000/e1000_mbx.c

114

s32 e1000_write_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/e1000/e1000_mbx.c

116

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

125

ret_val = mbx->ops.write(hw, msg, size, mbx_id);

sys/dev/e1000/e1000_mbx.c

137

s32 e1000_check_for_msg(struct e1000_hw *hw, u16 mbx_id)

sys/dev/e1000/e1000_mbx.c

139

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

145

ret_val = mbx->ops.check_for_msg(hw, mbx_id);

sys/dev/e1000/e1000_mbx.c

157

s32 e1000_check_for_ack(struct e1000_hw *hw, u16 mbx_id)

sys/dev/e1000/e1000_mbx.c

159

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

165

ret_val = mbx->ops.check_for_ack(hw, mbx_id);

sys/dev/e1000/e1000_mbx.c

177

s32 e1000_check_for_rst(struct e1000_hw *hw, u16 mbx_id)

sys/dev/e1000/e1000_mbx.c

179

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

185

ret_val = mbx->ops.check_for_rst(hw, mbx_id);

sys/dev/e1000/e1000_mbx.c

195

s32 e1000_unlock_mbx(struct e1000_hw *hw, u16 mbx_id)

sys/dev/e1000/e1000_mbx.c

197

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

203

ret_val = mbx->ops.unlock(hw, mbx_id);

sys/dev/e1000/e1000_mbx.c

215

static s32 e1000_poll_for_msg(struct e1000_hw *hw, u16 mbx_id)

sys/dev/e1000/e1000_mbx.c

217

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

225

while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) {

sys/dev/e1000/e1000_mbx.c

246

static s32 e1000_poll_for_ack(struct e1000_hw *hw, u16 mbx_id)

sys/dev/e1000/e1000_mbx.c

248

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

256

while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) {

sys/dev/e1000/e1000_mbx.c

280

s32 e1000_read_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/e1000/e1000_mbx.c

282

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

290

ret_val = e1000_poll_for_msg(hw, mbx_id);

sys/dev/e1000/e1000_mbx.c

294

ret_val = mbx->ops.read(hw, msg, size, mbx_id, true);

sys/dev/e1000/e1000_mbx.c

309

s32 e1000_write_posted_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/e1000/e1000_mbx.c

311

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

321

ret_val = mbx->ops.write(hw, msg, size, mbx_id);

sys/dev/e1000/e1000_mbx.c

325

ret_val = e1000_poll_for_ack(hw, mbx_id);

sys/dev/e1000/e1000_mbx.c

336

void e1000_init_mbx_ops_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_mbx.c

338

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

357

static u32 e1000_read_v2p_mailbox(struct e1000_hw *hw)

sys/dev/e1000/e1000_mbx.c

359

u32 v2p_mailbox = E1000_READ_REG(hw, E1000_V2PMAILBOX(0));

sys/dev/e1000/e1000_mbx.c

361

v2p_mailbox |= hw->dev_spec.vf.v2p_mailbox;

sys/dev/e1000/e1000_mbx.c

362

hw->dev_spec.vf.v2p_mailbox |= v2p_mailbox & E1000_V2PMAILBOX_R2C_BITS;

sys/dev/e1000/e1000_mbx.c

375

static s32 e1000_check_for_bit_vf(struct e1000_hw *hw, u32 mask)

sys/dev/e1000/e1000_mbx.c

377

u32 v2p_mailbox = e1000_read_v2p_mailbox(hw);

sys/dev/e1000/e1000_mbx.c

383

hw->dev_spec.vf.v2p_mailbox &= ~mask;

sys/dev/e1000/e1000_mbx.c

395

static s32 e1000_check_for_msg_vf(struct e1000_hw *hw,

sys/dev/e1000/e1000_mbx.c

402

if (!e1000_check_for_bit_vf(hw, E1000_V2PMAILBOX_PFSTS)) {

sys/dev/e1000/e1000_mbx.c

404

hw->mbx.stats.reqs++;

sys/dev/e1000/e1000_mbx.c

417

static s32 e1000_check_for_ack_vf(struct e1000_hw *hw,

sys/dev/e1000/e1000_mbx.c

42

static s32 e1000_null_mbx_check_for_flag(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_mbx.c

424

if (!e1000_check_for_bit_vf(hw, E1000_V2PMAILBOX_PFACK)) {

sys/dev/e1000/e1000_mbx.c

426

hw->mbx.stats.acks++;

sys/dev/e1000/e1000_mbx.c

439

static s32 e1000_check_for_rst_vf(struct e1000_hw *hw,

sys/dev/e1000/e1000_mbx.c

446

if (!e1000_check_for_bit_vf(hw, (E1000_V2PMAILBOX_RSTD |

sys/dev/e1000/e1000_mbx.c

449

hw->mbx.stats.rsts++;

sys/dev/e1000/e1000_mbx.c

461

static s32 e1000_obtain_mbx_lock_vf(struct e1000_hw *hw)

sys/dev/e1000/e1000_mbx.c

470

E1000_WRITE_REG(hw, E1000_V2PMAILBOX(0), E1000_V2PMAILBOX_VFU);

sys/dev/e1000/e1000_mbx.c

473

if (e1000_read_v2p_mailbox(hw) & E1000_V2PMAILBOX_VFU) {

sys/dev/e1000/e1000_mbx.c

492

static s32 e1000_write_mbx_vf(struct e1000_hw *hw, u32 *msg, u16 size,

sys/dev/e1000/e1000_mbx.c

502

ret_val = e1000_obtain_mbx_lock_vf(hw);

sys/dev/e1000/e1000_mbx.c

507

e1000_check_for_msg_vf(hw, 0);

sys/dev/e1000/e1000_mbx.c

508

e1000_check_for_ack_vf(hw, 0);

sys/dev/e1000/e1000_mbx.c

512

E1000_WRITE_REG_ARRAY(hw, E1000_VMBMEM(0), i, msg[i]);

sys/dev/e1000/e1000_mbx.c

515

hw->mbx.stats.msgs_tx++;

sys/dev/e1000/e1000_mbx.c

518

E1000_WRITE_REG(hw, E1000_V2PMAILBOX(0), E1000_V2PMAILBOX_REQ);

sys/dev/e1000/e1000_mbx.c

533

static s32 e1000_read_mbx_vf(struct e1000_hw *hw, u32 *msg, u16 size,

sys/dev/e1000/e1000_mbx.c

543

ret_val = e1000_obtain_mbx_lock_vf(hw);

sys/dev/e1000/e1000_mbx.c

549

msg[i] = E1000_READ_REG_ARRAY(hw, E1000_VMBMEM(0), i);

sys/dev/e1000/e1000_mbx.c

552

E1000_WRITE_REG(hw, E1000_V2PMAILBOX(0), E1000_V2PMAILBOX_ACK);

sys/dev/e1000/e1000_mbx.c

555

hw->mbx.stats.msgs_rx++;

sys/dev/e1000/e1000_mbx.c

567

s32 e1000_init_mbx_params_vf(struct e1000_hw *hw)

sys/dev/e1000/e1000_mbx.c

569

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

57

static s32 e1000_null_mbx_transact(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_mbx.c

595

static s32 e1000_check_for_bit_pf(struct e1000_hw *hw, u32 mask)

sys/dev/e1000/e1000_mbx.c

597

u32 mbvficr = E1000_READ_REG(hw, E1000_MBVFICR);

sys/dev/e1000/e1000_mbx.c

602

E1000_WRITE_REG(hw, E1000_MBVFICR, mask);

sys/dev/e1000/e1000_mbx.c

615

static s32 e1000_check_for_msg_pf(struct e1000_hw *hw, u16 vf_number)

sys/dev/e1000/e1000_mbx.c

621

if (!e1000_check_for_bit_pf(hw, E1000_MBVFICR_VFREQ_VF1 << vf_number)) {

sys/dev/e1000/e1000_mbx.c

623

hw->mbx.stats.reqs++;

sys/dev/e1000/e1000_mbx.c

636

static s32 e1000_check_for_ack_pf(struct e1000_hw *hw, u16 vf_number)

sys/dev/e1000/e1000_mbx.c

642

if (!e1000_check_for_bit_pf(hw, E1000_MBVFICR_VFACK_VF1 << vf_number)) {

sys/dev/e1000/e1000_mbx.c

644

hw->mbx.stats.acks++;

sys/dev/e1000/e1000_mbx.c

657

static s32 e1000_check_for_rst_pf(struct e1000_hw *hw, u16 vf_number)

sys/dev/e1000/e1000_mbx.c

659

u32 vflre = E1000_READ_REG(hw, E1000_VFLRE);

sys/dev/e1000/e1000_mbx.c

666

E1000_WRITE_REG(hw, E1000_VFLRE, (1 << vf_number));

sys/dev/e1000/e1000_mbx.c

667

hw->mbx.stats.rsts++;

sys/dev/e1000/e1000_mbx.c

67

static s32 e1000_null_mbx_read(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_mbx.c

680

static s32 e1000_obtain_mbx_lock_pf(struct e1000_hw *hw, u16 vf_number)

sys/dev/e1000/e1000_mbx.c

692

E1000_WRITE_REG(hw, E1000_P2VMAILBOX(vf_number),

sys/dev/e1000/e1000_mbx.c

694

p2v_mailbox = E1000_READ_REG(hw, E1000_P2VMAILBOX(vf_number));

sys/dev/e1000/e1000_mbx.c

703

e1000_release_mbx_lock_pf(struct e1000_hw *hw, u16 vf_number)

sys/dev/e1000/e1000_mbx.c

707

p2v_mailbox = E1000_READ_REG(hw, E1000_P2VMAILBOX(vf_number));

sys/dev/e1000/e1000_mbx.c

709

E1000_WRITE_REG(hw, E1000_P2VMAILBOX(vf_number),

sys/dev/e1000/e1000_mbx.c

724

static s32 e1000_write_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,

sys/dev/e1000/e1000_mbx.c

733

ret_val = e1000_obtain_mbx_lock_pf(hw, vf_number);

sys/dev/e1000/e1000_mbx.c

741

if (E1000_READ_REG(hw, E1000_MBVFICR) &

sys/dev/e1000/e1000_mbx.c

743

e1000_release_mbx_lock_pf(hw, vf_number);

sys/dev/e1000/e1000_mbx.c

749

e1000_check_for_msg_pf(hw, vf_number);

sys/dev/e1000/e1000_mbx.c

750

e1000_check_for_ack_pf(hw, vf_number);

sys/dev/e1000/e1000_mbx.c

754

E1000_WRITE_REG_ARRAY(hw, E1000_VMBMEM(vf_number), i, msg[i]);

sys/dev/e1000/e1000_mbx.c

757

E1000_WRITE_REG(hw, E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_STS);

sys/dev/e1000/e1000_mbx.c

760

hw->mbx.stats.msgs_tx++;

sys/dev/e1000/e1000_mbx.c

778

static s32 e1000_read_mbx_pf(struct e1000_hw *hw, u32 *msg, u16 size,

sys/dev/e1000/e1000_mbx.c

787

ret_val = e1000_obtain_mbx_lock_pf(hw, vf_number);

sys/dev/e1000/e1000_mbx.c

796

(void)e1000_check_for_msg_pf(hw, vf_number);

sys/dev/e1000/e1000_mbx.c

800

msg[i] = E1000_READ_REG_ARRAY(hw, E1000_VMBMEM(vf_number), i);

sys/dev/e1000/e1000_mbx.c

803

E1000_WRITE_REG(hw, E1000_P2VMAILBOX(vf_number),

sys/dev/e1000/e1000_mbx.c

808

hw->mbx.stats.msgs_rx++;

sys/dev/e1000/e1000_mbx.c

820

s32 e1000_init_mbx_params_pf(struct e1000_hw *hw)

sys/dev/e1000/e1000_mbx.c

822

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.c

824

switch (hw->mac.type) {

sys/dev/e1000/e1000_mbx.c

87

s32 e1000_read_mbx(struct e1000_hw *hw, u32 *msg, u16 size, u16 mbx_id,

sys/dev/e1000/e1000_mbx.c

90

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_mbx.h

105

void e1000_init_mbx_ops_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_nvm.c

1000

ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2,

sys/dev/e1000/e1000_nvm.c

1017

ret_val = e1000_get_pba_block_size(hw, eeprom_buf,

sys/dev/e1000/e1000_nvm.c

1027

ret_val = e1000_read_nvm(hw, pba->word[1],

sys/dev/e1000/e1000_nvm.c

1058

s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/e1000/e1000_nvm.c

106

s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_nvm.c

1067

ret_val = e1000_write_nvm(hw, NVM_PBA_OFFSET_0, 2,

sys/dev/e1000/e1000_nvm.c

1085

ret_val = e1000_write_nvm(hw, pba->word[1],

sys/dev/e1000/e1000_nvm.c

1117

s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/e1000/e1000_nvm.c

1127

ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2, &pba_word[0]);

sys/dev/e1000/e1000_nvm.c

1141

ret_val = e1000_read_nvm(hw, pba_word[1] + 0, 1,

sys/dev/e1000/e1000_nvm.c

1173

s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_nvm.c

1179

rar_high = E1000_READ_REG(hw, E1000_RAH(0));

sys/dev/e1000/e1000_nvm.c

1180

rar_low = E1000_READ_REG(hw, E1000_RAL(0));

sys/dev/e1000/e1000_nvm.c

1183

hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));

sys/dev/e1000/e1000_nvm.c

1186

hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));

sys/dev/e1000/e1000_nvm.c

1189

hw->mac.addr[i] = hw->mac.perm_addr[i];

sys/dev/e1000/e1000_nvm.c

1201

s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_nvm.c

121

static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)

sys/dev/e1000/e1000_nvm.c

1210

ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);

sys/dev/e1000/e1000_nvm.c

1234

s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_nvm.c

124

E1000_WRITE_REG(hw, E1000_EECD, *eecd);

sys/dev/e1000/e1000_nvm.c

1243

ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);

sys/dev/e1000/e1000_nvm.c

125

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_nvm.c

1251

ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);

sys/dev/e1000/e1000_nvm.c

126

usec_delay(hw->nvm.delay_usec);

sys/dev/e1000/e1000_nvm.c

1265

static void e1000_reload_nvm_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_nvm.c

1272

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/e1000_nvm.c

1274

E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/e1000_nvm.c

1275

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_nvm.c

1285

void e1000_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers)

sys/dev/e1000/e1000_nvm.c

1296

switch (hw->mac.type) {

sys/dev/e1000/e1000_nvm.c

1298

e1000_read_invm_version(hw, fw_vers);

sys/dev/e1000/e1000_nvm.c

1304

hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);

sys/dev/e1000/e1000_nvm.c

1309

hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);

sys/dev/e1000/e1000_nvm.c

1319

if (!(e1000_get_flash_presence_i210(hw))) {

sys/dev/e1000/e1000_nvm.c

1320

e1000_read_invm_version(hw, fw_vers);

sys/dev/e1000/e1000_nvm.c

1325

hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);

sys/dev/e1000/e1000_nvm.c

1327

hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);

sys/dev/e1000/e1000_nvm.c

1331

hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset

sys/dev/e1000/e1000_nvm.c

1333

hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset),

sys/dev/e1000/e1000_nvm.c

1353

hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);

sys/dev/e1000/e1000_nvm.c

1356

hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);

sys/dev/e1000/e1000_nvm.c

136

static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)

sys/dev/e1000/e1000_nvm.c

1378

hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl);

sys/dev/e1000/e1000_nvm.c

1379

hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh);

sys/dev/e1000/e1000_nvm.c

1383

hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh);

sys/dev/e1000/e1000_nvm.c

1384

hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl);

sys/dev/e1000/e1000_nvm.c

139

E1000_WRITE_REG(hw, E1000_EECD, *eecd);

sys/dev/e1000/e1000_nvm.c

140

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_nvm.c

141

usec_delay(hw->nvm.delay_usec);

sys/dev/e1000/e1000_nvm.c

154

static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)

sys/dev/e1000/e1000_nvm.c

156

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_nvm.c

157

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_nvm.c

175

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

176

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_nvm.c

180

e1000_raise_eec_clk(hw, &eecd);

sys/dev/e1000/e1000_nvm.c

181

e1000_lower_eec_clk(hw, &eecd);

sys/dev/e1000/e1000_nvm.c

187

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

201

static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)

sys/dev/e1000/e1000_nvm.c

209

eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_nvm.c

216

e1000_raise_eec_clk(hw, &eecd);

sys/dev/e1000/e1000_nvm.c

218

eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_nvm.c

224

e1000_lower_eec_clk(hw, &eecd);

sys/dev/e1000/e1000_nvm.c

238

s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)

sys/dev/e1000/e1000_nvm.c

247

reg = E1000_READ_REG(hw, E1000_EERD);

sys/dev/e1000/e1000_nvm.c

249

reg = E1000_READ_REG(hw, E1000_EEWR);

sys/dev/e1000/e1000_nvm.c

268

s32 e1000_acquire_nvm_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_nvm.c

270

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_nvm.c

275

E1000_WRITE_REG(hw, E1000_EECD, eecd | E1000_EECD_REQ);

sys/dev/e1000/e1000_nvm.c

276

eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_nvm.c

282

eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_nvm.c

288

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

302

static void e1000_standby_nvm(struct e1000_hw *hw)

sys/dev/e1000/e1000_nvm.c

304

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_nvm.c

305

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_nvm.c

311

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

312

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_nvm.c

315

e1000_raise_eec_clk(hw, &eecd);

sys/dev/e1000/e1000_nvm.c

319

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

320

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_nvm.c

323

e1000_lower_eec_clk(hw, &eecd);

sys/dev/e1000/e1000_nvm.c

327

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

328

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_nvm.c

331

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

332

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_nvm.c

343

void e1000_stop_nvm(struct e1000_hw *hw)

sys/dev/e1000/e1000_nvm.c

349

eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_nvm.c

350

if (hw->nvm.type == e1000_nvm_eeprom_spi) {

sys/dev/e1000/e1000_nvm.c

353

e1000_lower_eec_clk(hw, &eecd);

sys/dev/e1000/e1000_nvm.c

354

} else if (hw->nvm.type == e1000_nvm_eeprom_microwire) {

sys/dev/e1000/e1000_nvm.c

357

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

358

e1000_raise_eec_clk(hw, &eecd);

sys/dev/e1000/e1000_nvm.c

359

e1000_lower_eec_clk(hw, &eecd);

sys/dev/e1000/e1000_nvm.c

369

void e1000_release_nvm_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_nvm.c

37

static void e1000_reload_nvm_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_nvm.c

375

e1000_stop_nvm(hw);

sys/dev/e1000/e1000_nvm.c

377

eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_nvm.c

379

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

388

static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)

sys/dev/e1000/e1000_nvm.c

390

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_nvm.c

391

u32 eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_nvm.c

399

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

402

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

408

E1000_WRITE_REG(hw, E1000_EECD, eecd);

sys/dev/e1000/e1000_nvm.c

409

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_nvm.c

418

e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,

sys/dev/e1000/e1000_nvm.c

419

hw->nvm.opcode_bits);

sys/dev/e1000/e1000_nvm.c

420

spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);

sys/dev/e1000/e1000_nvm.c

425

e1000_standby_nvm(hw);

sys/dev/e1000/e1000_nvm.c

447

s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/e1000/e1000_nvm.c

449

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_nvm.c

45

void e1000_init_nvm_ops_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_nvm.c

466

ret_val = nvm->ops.acquire(hw);

sys/dev/e1000/e1000_nvm.c

47

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_nvm.c

470

ret_val = e1000_ready_nvm_eeprom(hw);

sys/dev/e1000/e1000_nvm.c

474

e1000_standby_nvm(hw);

sys/dev/e1000/e1000_nvm.c

480

e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);

sys/dev/e1000/e1000_nvm.c

481

e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);

sys/dev/e1000/e1000_nvm.c

488

word_in = e1000_shift_in_eec_bits(hw, 16);

sys/dev/e1000/e1000_nvm.c

493

nvm->ops.release(hw);

sys/dev/e1000/e1000_nvm.c

507

s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_nvm.c

510

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_nvm.c

526

ret_val = nvm->ops.acquire(hw);

sys/dev/e1000/e1000_nvm.c

530

ret_val = e1000_ready_nvm_eeprom(hw);

sys/dev/e1000/e1000_nvm.c

536

e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);

sys/dev/e1000/e1000_nvm.c

537

e1000_shift_out_eec_bits(hw, (u16)(offset + i),

sys/dev/e1000/e1000_nvm.c

543

data[i] = e1000_shift_in_eec_bits(hw, 16);

sys/dev/e1000/e1000_nvm.c

544

e1000_standby_nvm(hw);

sys/dev/e1000/e1000_nvm.c

548

nvm->ops.release(hw);

sys/dev/e1000/e1000_nvm.c

562

s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/e1000/e1000_nvm.c

564

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_nvm.c

583

E1000_WRITE_REG(hw, E1000_EERD, eerd);

sys/dev/e1000/e1000_nvm.c

584

ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);

sys/dev/e1000/e1000_nvm.c

588

data[i] = (E1000_READ_REG(hw, E1000_EERD) >>

sys/dev/e1000/e1000_nvm.c

610

s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/e1000/e1000_nvm.c

612

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_nvm.c

630

ret_val = nvm->ops.acquire(hw);

sys/dev/e1000/e1000_nvm.c

634

ret_val = e1000_ready_nvm_eeprom(hw);

sys/dev/e1000/e1000_nvm.c

636

nvm->ops.release(hw);

sys/dev/e1000/e1000_nvm.c

640

e1000_standby_nvm(hw);

sys/dev/e1000/e1000_nvm.c

643

e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,

sys/dev/e1000/e1000_nvm.c

646

e1000_standby_nvm(hw);

sys/dev/e1000/e1000_nvm.c

655

e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);

sys/dev/e1000/e1000_nvm.c

656

e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),

sys/dev/e1000/e1000_nvm.c

663

e1000_shift_out_eec_bits(hw, word_out, 16);

sys/dev/e1000/e1000_nvm.c

667

e1000_standby_nvm(hw);

sys/dev/e1000/e1000_nvm.c

672

nvm->ops.release(hw);

sys/dev/e1000/e1000_nvm.c

69

s32 e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_nvm.c

690

s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_nvm.c

693

struct e1000_nvm_info *nvm = &hw->nvm;

sys/dev/e1000/e1000_nvm.c

710

ret_val = nvm->ops.acquire(hw);

sys/dev/e1000/e1000_nvm.c

714

ret_val = e1000_ready_nvm_eeprom(hw);

sys/dev/e1000/e1000_nvm.c

718

e1000_shift_out_eec_bits(hw, NVM_EWEN_OPCODE_MICROWIRE,

sys/dev/e1000/e1000_nvm.c

721

e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));

sys/dev/e1000/e1000_nvm.c

723

e1000_standby_nvm(hw);

sys/dev/e1000/e1000_nvm.c

726

e1000_shift_out_eec_bits(hw, NVM_WRITE_OPCODE_MICROWIRE,

sys/dev/e1000/e1000_nvm.c

729

e1000_shift_out_eec_bits(hw, (u16)(offset + words_written),

sys/dev/e1000/e1000_nvm.c

732

e1000_shift_out_eec_bits(hw, data[words_written], 16);

sys/dev/e1000/e1000_nvm.c

734

e1000_standby_nvm(hw);

sys/dev/e1000/e1000_nvm.c

737

eecd = E1000_READ_REG(hw, E1000_EECD);

sys/dev/e1000/e1000_nvm.c

749

e1000_standby_nvm(hw);

sys/dev/e1000/e1000_nvm.c

754

e1000_shift_out_eec_bits(hw, NVM_EWDS_OPCODE_MICROWIRE,

sys/dev/e1000/e1000_nvm.c

757

e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));

sys/dev/e1000/e1000_nvm.c

760

nvm->ops.release(hw);

sys/dev/e1000/e1000_nvm.c

774

s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,

sys/dev/e1000/e1000_nvm.c

785

if ((hw->mac.type == e1000_i210 ||

sys/dev/e1000/e1000_nvm.c

786

hw->mac.type == e1000_i211) &&

sys/dev/e1000/e1000_nvm.c

787

!e1000_get_flash_presence_i210(hw)) {

sys/dev/e1000/e1000_nvm.c

797

ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);

sys/dev/e1000/e1000_nvm.c

803

ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);

sys/dev/e1000/e1000_nvm.c

81

void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG *hw)

sys/dev/e1000/e1000_nvm.c

848

ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);

sys/dev/e1000/e1000_nvm.c

869

ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);

sys/dev/e1000/e1000_nvm.c

890

s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size)

sys/dev/e1000/e1000_nvm.c

904

ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);

sys/dev/e1000/e1000_nvm.c

910

ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);

sys/dev/e1000/e1000_nvm.c

92

s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_nvm.c

922

ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);

sys/dev/e1000/e1000_nvm.c

949

s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num)

sys/dev/e1000/e1000_nvm.c

956

ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);

sys/dev/e1000/e1000_nvm.c

966

ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);

sys/dev/e1000/e1000_nvm.c

989

s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/e1000/e1000_nvm.h

60

void e1000_init_nvm_ops_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_nvm.h

61

s32 e1000_null_read_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);

sys/dev/e1000/e1000_nvm.h

62

void e1000_null_nvm_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_nvm.h

63

s32 e1000_null_led_default(struct e1000_hw *hw, u16 *data);

sys/dev/e1000/e1000_nvm.h

64

s32 e1000_null_write_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);

sys/dev/e1000/e1000_nvm.h

65

s32 e1000_acquire_nvm_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_nvm.h

67

s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);

sys/dev/e1000/e1000_nvm.h

68

s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_nvm.h

69

s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num);

sys/dev/e1000/e1000_nvm.h

70

s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,

sys/dev/e1000/e1000_nvm.h

72

s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size);

sys/dev/e1000/e1000_nvm.h

73

s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/e1000/e1000_nvm.h

76

s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/e1000/e1000_nvm.h

78

s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,

sys/dev/e1000/e1000_nvm.h

80

s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);

sys/dev/e1000/e1000_nvm.h

81

s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_nvm.h

83

s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_nvm.h

85

s32 e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data);

sys/dev/e1000/e1000_nvm.h

86

s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_nvm.h

87

s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset,

sys/dev/e1000/e1000_nvm.h

89

s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words,

sys/dev/e1000/e1000_nvm.h

91

s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_nvm.h

92

void e1000_stop_nvm(struct e1000_hw *hw);

sys/dev/e1000/e1000_nvm.h

93

void e1000_release_nvm_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_nvm.h

94

void e1000_get_fw_version(struct e1000_hw *hw,

sys/dev/e1000/e1000_osdep.c

54

e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)

sys/dev/e1000/e1000_osdep.c

56

pci_write_config(((struct e1000_osdep *)hw->back)->dev, reg, *value, 2);

sys/dev/e1000/e1000_osdep.c

60

e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)

sys/dev/e1000/e1000_osdep.c

62

*value = pci_read_config(((struct e1000_osdep *)hw->back)->dev, reg, 2);

sys/dev/e1000/e1000_osdep.c

66

e1000_pci_set_mwi(struct e1000_hw *hw)

sys/dev/e1000/e1000_osdep.c

68

pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND,

sys/dev/e1000/e1000_osdep.c

69

(hw->bus.pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2);

sys/dev/e1000/e1000_osdep.c

73

e1000_pci_clear_mwi(struct e1000_hw *hw)

sys/dev/e1000/e1000_osdep.c

75

pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND,

sys/dev/e1000/e1000_osdep.c

76

(hw->bus.pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2);

sys/dev/e1000/e1000_osdep.c

83

e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)

sys/dev/e1000/e1000_osdep.c

85

device_t dev = ((struct e1000_osdep *)hw->back)->dev;

sys/dev/e1000/e1000_osdep.c

97

e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)

sys/dev/e1000/e1000_osdep.c

99

device_t dev = ((struct e1000_osdep *)hw->back)->dev;

sys/dev/e1000/e1000_osdep.h

136

#define ASSERT_CTX_LOCK_HELD(hw) (sx_assert(iflib_ctx_lock_get(((struct e1000_osdep *)hw->back)->ctx), SX_XLOCKED))

sys/dev/e1000/e1000_osdep.h

138

#define ASSERT_CTX_LOCK_HELD(hw)

sys/dev/e1000/e1000_osdep.h

269

#define E1000_REGISTER(hw, reg) (((hw)->mac.type >= e1000_82543) \

sys/dev/e1000/e1000_osdep.h

275

#define E1000_READ_OFFSET(hw, offset) \

sys/dev/e1000/e1000_osdep.h

276

bus_space_read_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/e1000/e1000_osdep.h

277

((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, offset)

sys/dev/e1000/e1000_osdep.h

280

#define E1000_WRITE_OFFSET(hw, offset, value) \

sys/dev/e1000/e1000_osdep.h

281

bus_space_write_4(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/e1000/e1000_osdep.h

282

((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, offset, value)

sys/dev/e1000/e1000_osdep.h

321

#define E1000_READ_REG(hw, reg) \

sys/dev/e1000/e1000_osdep.h

322

e1000_rd32((hw)->back, E1000_REGISTER(hw, reg))

sys/dev/e1000/e1000_osdep.h

324

#define E1000_WRITE_REG(hw, reg, value) \

sys/dev/e1000/e1000_osdep.h

325

e1000_wr32((hw)->back, E1000_REGISTER(hw, reg), value)

sys/dev/e1000/e1000_osdep.h

327

#define E1000_READ_REG_ARRAY(hw, reg, index) \

sys/dev/e1000/e1000_osdep.h

328

e1000_rd32((hw)->back, E1000_REGISTER(hw, reg) + ((index) << 2))

sys/dev/e1000/e1000_osdep.h

330

#define E1000_WRITE_REG_ARRAY(hw, reg, index, value) \

sys/dev/e1000/e1000_osdep.h

331

e1000_wr32((hw)->back, E1000_REGISTER(hw, reg) + ((index) << 2), value)

sys/dev/e1000/e1000_osdep.h

336

#define E1000_READ_REG_ARRAY_BYTE(hw, reg, index) \

sys/dev/e1000/e1000_osdep.h

337

bus_space_read_1(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/e1000/e1000_osdep.h

338

((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \

sys/dev/e1000/e1000_osdep.h

339

E1000_REGISTER(hw, reg) + index)

sys/dev/e1000/e1000_osdep.h

341

#define E1000_WRITE_REG_ARRAY_BYTE(hw, reg, index, value) \

sys/dev/e1000/e1000_osdep.h

342

bus_space_write_1(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/e1000/e1000_osdep.h

343

((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \

sys/dev/e1000/e1000_osdep.h

344

E1000_REGISTER(hw, reg) + index, value)

sys/dev/e1000/e1000_osdep.h

346

#define E1000_WRITE_REG_ARRAY_WORD(hw, reg, index, value) \

sys/dev/e1000/e1000_osdep.h

347

bus_space_write_2(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/e1000/e1000_osdep.h

348

((struct e1000_osdep *)(hw)->back)->mem_bus_space_handle, \

sys/dev/e1000/e1000_osdep.h

349

E1000_REGISTER(hw, reg) + (index << 1), value)

sys/dev/e1000/e1000_osdep.h

351

#define E1000_WRITE_REG_IO(hw, reg, value) do {\

sys/dev/e1000/e1000_osdep.h

352

bus_space_write_4(((struct e1000_osdep *)(hw)->back)->io_bus_space_tag, \

sys/dev/e1000/e1000_osdep.h

353

((struct e1000_osdep *)(hw)->back)->io_bus_space_handle, \

sys/dev/e1000/e1000_osdep.h

354

(hw)->io_base, reg); \

sys/dev/e1000/e1000_osdep.h

355

bus_space_write_4(((struct e1000_osdep *)(hw)->back)->io_bus_space_tag, \

sys/dev/e1000/e1000_osdep.h

356

((struct e1000_osdep *)(hw)->back)->io_bus_space_handle, \

sys/dev/e1000/e1000_osdep.h

357

(hw)->io_base + 4, value); } while (0)

sys/dev/e1000/e1000_osdep.h

359

#define E1000_READ_FLASH_REG(hw, reg) \

sys/dev/e1000/e1000_osdep.h

360

bus_space_read_4(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \

sys/dev/e1000/e1000_osdep.h

361

((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg)

sys/dev/e1000/e1000_osdep.h

363

#define E1000_READ_FLASH_REG16(hw, reg) \

sys/dev/e1000/e1000_osdep.h

364

bus_space_read_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \

sys/dev/e1000/e1000_osdep.h

365

((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg)

sys/dev/e1000/e1000_osdep.h

367

#define E1000_WRITE_FLASH_REG(hw, reg, value) \

sys/dev/e1000/e1000_osdep.h

368

bus_space_write_4(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \

sys/dev/e1000/e1000_osdep.h

369

((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value)

sys/dev/e1000/e1000_osdep.h

371

#define E1000_WRITE_FLASH_REG16(hw, reg, value) \

sys/dev/e1000/e1000_osdep.h

372

bus_space_write_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \

sys/dev/e1000/e1000_osdep.h

373

((struct e1000_osdep *)(hw)->back)->flash_bus_space_handle, reg, value)

sys/dev/e1000/e1000_phy.c

1003

s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

1005

return __e1000_write_kmrn_reg(hw, offset, data, true);

sys/dev/e1000/e1000_phy.c

1014

static s32 e1000_set_master_slave_mode(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

1020

ret_val = hw->phy.ops.read_reg(hw, PHY_1000T_CTRL, &phy_data);

sys/dev/e1000/e1000_phy.c

1025

hw->phy.original_ms_type = (phy_data & CR_1000T_MS_ENABLE) ?

sys/dev/e1000/e1000_phy.c

1030

switch (hw->phy.ms_type) {

sys/dev/e1000/e1000_phy.c

1045

return hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data);

sys/dev/e1000/e1000_phy.c

1054

s32 e1000_copper_link_setup_82577(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

1061

if (hw->phy.type == e1000_phy_82580) {

sys/dev/e1000/e1000_phy.c

1062

ret_val = hw->phy.ops.reset(hw);

sys/dev/e1000/e1000_phy.c

1070

ret_val = hw->phy.ops.read_reg(hw, I82577_CFG_REG, &phy_data);

sys/dev/e1000/e1000_phy.c

1079

ret_val = hw->phy.ops.write_reg(hw, I82577_CFG_REG, phy_data);

sys/dev/e1000/e1000_phy.c

108

s32 e1000_null_set_page(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_phy.c

1084

ret_val = hw->phy.ops.read_reg(hw, I82577_PHY_CTRL_2, &phy_data);

sys/dev/e1000/e1000_phy.c

1093

switch (hw->phy.mdix) {

sys/dev/e1000/e1000_phy.c

1105

ret_val = hw->phy.ops.write_reg(hw, I82577_PHY_CTRL_2, phy_data);

sys/dev/e1000/e1000_phy.c

1109

return e1000_set_master_slave_mode(hw);

sys/dev/e1000/e1000_phy.c

1119

s32 e1000_copper_link_setup_m88(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

1121

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

1129

ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);

sys/dev/e1000/e1000_phy.c

1178

ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL,

sys/dev/e1000/e1000_phy.c

1183

ret_val = phy->ops.commit(hw);

sys/dev/e1000/e1000_phy.c

1193

ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);

sys/dev/e1000/e1000_phy.c

1203

ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,

sys/dev/e1000/e1000_phy.c

121

s32 e1000_null_read_reg(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_phy.c

1222

ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,

sys/dev/e1000/e1000_phy.c

1230

ret_val = phy->ops.write_reg(hw, 29, 0x0003);

sys/dev/e1000/e1000_phy.c

1235

ret_val = phy->ops.write_reg(hw, 30, 0x0000);

sys/dev/e1000/e1000_phy.c

1241

ret_val = phy->ops.commit(hw);

sys/dev/e1000/e1000_phy.c

1248

ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,

sys/dev/e1000/e1000_phy.c

1256

ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,

sys/dev/e1000/e1000_phy.c

1272

s32 e1000_copper_link_setup_m88_gen2(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

1274

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

1282

ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);

sys/dev/e1000/e1000_phy.c

132

void e1000_null_phy_generic(struct e1000_hw E1000_UNUSEDARG *hw)

sys/dev/e1000/e1000_phy.c

1330

phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);

sys/dev/e1000/e1000_phy.c

1334

ret_val = phy->ops.commit(hw);

sys/dev/e1000/e1000_phy.c

1345

ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);

sys/dev/e1000/e1000_phy.c

1350

ret_val = phy->ops.commit(hw);

sys/dev/e1000/e1000_phy.c

1356

ret_val = e1000_set_master_slave_mode(hw);

sys/dev/e1000/e1000_phy.c

1370

s32 e1000_copper_link_setup_igp(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

1372

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

1379

ret_val = hw->phy.ops.reset(hw);

sys/dev/e1000/e1000_phy.c

1395

ret_val = hw->phy.ops.set_d3_lplu_state(hw, false);

sys/dev/e1000/e1000_phy.c

1403

if (hw->phy.ops.set_d0_lplu_state) {

sys/dev/e1000/e1000_phy.c

1404

ret_val = hw->phy.ops.set_d0_lplu_state(hw, false);

sys/dev/e1000/e1000_phy.c

1411

ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &data);

sys/dev/e1000/e1000_phy.c

143

s32 e1000_null_lplu_state(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_phy.c

1430

ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, data);

sys/dev/e1000/e1000_phy.c

1435

if (hw->mac.autoneg) {

sys/dev/e1000/e1000_phy.c

1442

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_phy.c

1449

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_phy.c

1456

ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data);

sys/dev/e1000/e1000_phy.c

1461

ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, data);

sys/dev/e1000/e1000_phy.c

1466

ret_val = e1000_set_master_slave_mode(hw);

sys/dev/e1000/e1000_phy.c

1481

s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

1483

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

1493

ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);

sys/dev/e1000/e1000_phy.c

1499

ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL,

sys/dev/e1000/e1000_phy.c

156

s32 e1000_null_write_reg(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_phy.c

1575

switch (hw->fc.current_mode) {

sys/dev/e1000/e1000_phy.c

1612

ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);

sys/dev/e1000/e1000_phy.c

1619

ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL,

sys/dev/e1000/e1000_phy.c

1634

s32 e1000_copper_link_autoneg(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

1636

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

1654

ret_val = e1000_phy_setup_autoneg(hw);

sys/dev/e1000/e1000_phy.c

1664

ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);

sys/dev/e1000/e1000_phy.c

1669

ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);

sys/dev/e1000/e1000_phy.c

1677

ret_val = e1000_wait_autoneg(hw);

sys/dev/e1000/e1000_phy.c

1684

hw->mac.get_link_status = true;

sys/dev/e1000/e1000_phy.c

1698

s32 e1000_setup_copper_link_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

1705

if (hw->mac.autoneg) {

sys/dev/e1000/e1000_phy.c

1709

ret_val = e1000_copper_link_autoneg(hw);

sys/dev/e1000/e1000_phy.c

171

s32 e1000_read_i2c_byte_null(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_phy.c

1717

ret_val = hw->phy.ops.force_speed_duplex(hw);

sys/dev/e1000/e1000_phy.c

1727

ret_val = e1000_phy_has_link_generic(hw, COPPER_LINK_UP_LIMIT, 10,

sys/dev/e1000/e1000_phy.c

1734

hw->mac.ops.config_collision_dist(hw);

sys/dev/e1000/e1000_phy.c

1735

ret_val = e1000_config_fc_after_link_up_generic(hw);

sys/dev/e1000/e1000_phy.c

1751

s32 e1000_phy_force_speed_duplex_igp(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

1753

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

1760

ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);

sys/dev/e1000/e1000_phy.c

1764

e1000_phy_force_speed_duplex_setup(hw, &phy_data);

sys/dev/e1000/e1000_phy.c

1766

ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);

sys/dev/e1000/e1000_phy.c

1773

ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data);

sys/dev/e1000/e1000_phy.c

1780

ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data);

sys/dev/e1000/e1000_phy.c

1791

ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,

sys/dev/e1000/e1000_phy.c

1800

ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,

sys/dev/e1000/e1000_phy.c

1817

s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

1819

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

1831

ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL,

sys/dev/e1000/e1000_phy.c

1837

ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL,

sys/dev/e1000/e1000_phy.c

1845

ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);

sys/dev/e1000/e1000_phy.c

1849

e1000_phy_force_speed_duplex_setup(hw, &phy_data);

sys/dev/e1000/e1000_phy.c

1851

ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);

sys/dev/e1000/e1000_phy.c

1856

ret_val = hw->phy.ops.commit(hw);

sys/dev/e1000/e1000_phy.c

1863

ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,

sys/dev/e1000/e1000_phy.c

1871

switch (hw->phy.id) {

sys/dev/e1000/e1000_phy.c

188

s32 e1000_write_i2c_byte_null(struct e1000_hw E1000_UNUSEDARG *hw,

sys/dev/e1000/e1000_phy.c

1881

if (hw->phy.type != e1000_phy_m88)

sys/dev/e1000/e1000_phy.c

1892

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_phy.c

1897

ret_val = e1000_phy_reset_dsp_generic(hw);

sys/dev/e1000/e1000_phy.c

1904

ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,

sys/dev/e1000/e1000_phy.c

1910

if (hw->phy.type != e1000_phy_m88)

sys/dev/e1000/e1000_phy.c

1913

if (hw->phy.id == I347AT4_E_PHY_ID ||

sys/dev/e1000/e1000_phy.c

1914

hw->phy.id == M88E1340M_E_PHY_ID ||

sys/dev/e1000/e1000_phy.c

1915

hw->phy.id == M88E1112_E_PHY_ID)

sys/dev/e1000/e1000_phy.c

1917

if (hw->phy.id == I210_I_PHY_ID)

sys/dev/e1000/e1000_phy.c

1919

if ((hw->phy.id == M88E1543_E_PHY_ID) ||

sys/dev/e1000/e1000_phy.c

1920

(hw->phy.id == M88E1512_E_PHY_ID))

sys/dev/e1000/e1000_phy.c

1922

ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data);

sys/dev/e1000/e1000_phy.c

1931

ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_data);

sys/dev/e1000/e1000_phy.c

1938

ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);

sys/dev/e1000/e1000_phy.c

1943

ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);

sys/dev/e1000/e1000_phy.c

1956

s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

1958

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

1965

ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &data);

sys/dev/e1000/e1000_phy.c

1969

e1000_phy_force_speed_duplex_setup(hw, &data);

sys/dev/e1000/e1000_phy.c

1971

ret_val = phy->ops.write_reg(hw, PHY_CONTROL, data);

sys/dev/e1000/e1000_phy.c

1976

ret_val = phy->ops.read_reg(hw, IFE_PHY_MDIX_CONTROL, &data);

sys/dev/e1000/e1000_phy.c

1983

ret_val = phy->ops.write_reg(hw, IFE_PHY_MDIX_CONTROL, data);

sys/dev/e1000/e1000_phy.c

1994

ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,

sys/dev/e1000/e1000_phy.c

2003

ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,

sys/dev/e1000/e1000_phy.c

2024

void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl)

sys/dev/e1000/e1000_phy.c

2026

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_phy.c

2032

hw->fc.current_mode = e1000_fc_none;

sys/dev/e1000/e1000_phy.c

2035

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_phy.c

205

s32 e1000_check_reset_block_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2068

hw->mac.ops.config_collision_dist(hw);

sys/dev/e1000/e1000_phy.c

2070

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_phy.c

2087

s32 e1000_set_d3_lplu_state_generic(struct e1000_hw *hw, bool active)

sys/dev/e1000/e1000_phy.c

2089

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2095

if (!hw->phy.ops.read_reg)

sys/dev/e1000/e1000_phy.c

2098

ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);

sys/dev/e1000/e1000_phy.c

2104

ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,

sys/dev/e1000/e1000_phy.c

211

manc = E1000_READ_REG(hw, E1000_MANC);

sys/dev/e1000/e1000_phy.c

2114

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_phy.c

2121

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_phy.c

2127

ret_val = phy->ops.read_reg(hw,

sys/dev/e1000/e1000_phy.c

2134

ret_val = phy->ops.write_reg(hw,

sys/dev/e1000/e1000_phy.c

2144

ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,

sys/dev/e1000/e1000_phy.c

2150

ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,

sys/dev/e1000/e1000_phy.c

2156

ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,

sys/dev/e1000/e1000_phy.c

2171

s32 e1000_check_downshift_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2173

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2200

ret_val = phy->ops.read_reg(hw, offset, &phy_data);

sys/dev/e1000/e1000_phy.c

2216

s32 e1000_check_polarity_m88(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2218

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2224

ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &data);

sys/dev/e1000/e1000_phy.c

224

s32 e1000_get_phy_id(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2243

s32 e1000_check_polarity_igp(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2245

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2254

ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data);

sys/dev/e1000/e1000_phy.c

226

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2270

ret_val = phy->ops.read_reg(hw, offset, &data);

sys/dev/e1000/e1000_phy.c

2286

s32 e1000_check_polarity_ife(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2288

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2304

ret_val = phy->ops.read_reg(hw, offset, &phy_data);

sys/dev/e1000/e1000_phy.c

2321

static s32 e1000_wait_autoneg(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2328

if (!hw->phy.ops.read_reg)

sys/dev/e1000/e1000_phy.c

2333

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/e1000/e1000_phy.c

2336

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/e1000/e1000_phy.c

2359

s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,

sys/dev/e1000/e1000_phy.c

2367

if (!hw->phy.ops.read_reg)

sys/dev/e1000/e1000_phy.c

237

ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);

sys/dev/e1000/e1000_phy.c

2375

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/e1000/e1000_phy.c

2386

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/e1000/e1000_phy.c

2417

s32 e1000_get_cable_length_m88(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2419

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2425

ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);

sys/dev/e1000/e1000_phy.c

243

ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);

sys/dev/e1000/e1000_phy.c

2443

s32 e1000_get_cable_length_m88_gen2(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2445

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2452

switch (hw->phy.id) {

sys/dev/e1000/e1000_phy.c

2455

ret_val = phy->ops.read_reg(hw, (0x7 << GS40G_PAGE_SHIFT) +

sys/dev/e1000/e1000_phy.c

2462

ret_val = phy->ops.read_reg(hw, (0x7 << GS40G_PAGE_SHIFT) +

sys/dev/e1000/e1000_phy.c

2479

ret_val = phy->ops.read_reg(hw, I347AT4_PAGE_SELECT,

sys/dev/e1000/e1000_phy.c

2484

ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0x07);

sys/dev/e1000/e1000_phy.c

2489

ret_val = phy->ops.read_reg(hw, (I347AT4_PCDL + phy->addr),

sys/dev/e1000/e1000_phy.c

2495

ret_val = phy->ops.read_reg(hw, I347AT4_PCDC, &phy_data2);

sys/dev/e1000/e1000_phy.c

2507

ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT,

sys/dev/e1000/e1000_phy.c

2515

ret_val = phy->ops.read_reg(hw, I347AT4_PAGE_SELECT,

sys/dev/e1000/e1000_phy.c

2520

ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0x05);

sys/dev/e1000/e1000_phy.c

2524

ret_val = phy->ops.read_reg(hw, M88E1112_VCT_DSP_DISTANCE,

sys/dev/e1000/e1000_phy.c

2542

ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT,

sys/dev/e1000/e1000_phy.c

2566

s32 e1000_get_cable_length_igp_2(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2568

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2584

ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &phy_data);

sys/dev/e1000/e1000_phy.c

2636

s32 e1000_get_phy_info_m88(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2638

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

265

s32 e1000_phy_reset_dsp_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2650

ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/e1000/e1000_phy.c

2659

ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);

sys/dev/e1000/e1000_phy.c

2666

ret_val = e1000_check_polarity_m88(hw);

sys/dev/e1000/e1000_phy.c

2670

ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);

sys/dev/e1000/e1000_phy.c

2677

ret_val = hw->phy.ops.get_cable_length(hw);

sys/dev/e1000/e1000_phy.c

2681

ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);

sys/dev/e1000/e1000_phy.c

271

if (!hw->phy.ops.write_reg)

sys/dev/e1000/e1000_phy.c

2711

s32 e1000_get_phy_info_igp(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2713

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2720

ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/e1000/e1000_phy.c

2731

ret_val = e1000_check_polarity_igp(hw);

sys/dev/e1000/e1000_phy.c

2735

ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data);

sys/dev/e1000/e1000_phy.c

274

ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xC1);

sys/dev/e1000/e1000_phy.c

2743

ret_val = phy->ops.get_cable_length(hw);

sys/dev/e1000/e1000_phy.c

2747

ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data);

sys/dev/e1000/e1000_phy.c

2773

s32 e1000_get_phy_info_ife(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2775

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

278

return hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0);

sys/dev/e1000/e1000_phy.c

2782

ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/e1000/e1000_phy.c

2791

ret_val = phy->ops.read_reg(hw, IFE_PHY_SPECIAL_CONTROL, &data);

sys/dev/e1000/e1000_phy.c

2797

ret_val = e1000_check_polarity_ife(hw);

sys/dev/e1000/e1000_phy.c

2807

ret_val = phy->ops.read_reg(hw, IFE_PHY_MDIX_CONTROL, &data);

sys/dev/e1000/e1000_phy.c

2828

s32 e1000_phy_sw_reset_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2835

if (!hw->phy.ops.read_reg)

sys/dev/e1000/e1000_phy.c

2838

ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);

sys/dev/e1000/e1000_phy.c

2843

ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_ctrl);

sys/dev/e1000/e1000_phy.c

2861

s32 e1000_phy_hw_reset_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

2863

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2870

ret_val = phy->ops.check_reset_block(hw);

sys/dev/e1000/e1000_phy.c

2875

ret_val = phy->ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

2879

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_phy.c

2880

E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PHY_RST);

sys/dev/e1000/e1000_phy.c

2881

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_phy.c

2885

E1000_WRITE_REG(hw, E1000_CTRL, ctrl);

sys/dev/e1000/e1000_phy.c

2886

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_phy.c

2890

phy->ops.release(hw);

sys/dev/e1000/e1000_phy.c

2892

return phy->ops.get_cfg_done(hw);

sys/dev/e1000/e1000_phy.c

290

s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

2902

s32 e1000_get_cfg_done_generic(struct e1000_hw E1000_UNUSEDARG *hw)

sys/dev/e1000/e1000_phy.c

2917

s32 e1000_phy_init_script_igp3(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

292

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

2923

hw->phy.ops.write_reg(hw, 0x2F5B, 0x9018);

sys/dev/e1000/e1000_phy.c

2925

hw->phy.ops.write_reg(hw, 0x2F52, 0x0000);

sys/dev/e1000/e1000_phy.c

2927

hw->phy.ops.write_reg(hw, 0x2FB1, 0x8B24);

sys/dev/e1000/e1000_phy.c

2929

hw->phy.ops.write_reg(hw, 0x2FB2, 0xF8F0);

sys/dev/e1000/e1000_phy.c

2931

hw->phy.ops.write_reg(hw, 0x2010, 0x10B0);

sys/dev/e1000/e1000_phy.c

2933

hw->phy.ops.write_reg(hw, 0x2011, 0x0000);

sys/dev/e1000/e1000_phy.c

2935

hw->phy.ops.write_reg(hw, 0x20DD, 0x249A);

sys/dev/e1000/e1000_phy.c

2937

hw->phy.ops.write_reg(hw, 0x20DE, 0x00D3);

sys/dev/e1000/e1000_phy.c

2939

hw->phy.ops.write_reg(hw, 0x28B4, 0x04CE);

sys/dev/e1000/e1000_phy.c

2941

hw->phy.ops.write_reg(hw, 0x2F70, 0x29E4);

sys/dev/e1000/e1000_phy.c

2943

hw->phy.ops.write_reg(hw, 0x0000, 0x0140);

sys/dev/e1000/e1000_phy.c

2945

hw->phy.ops.write_reg(hw, 0x1F30, 0x1606);

sys/dev/e1000/e1000_phy.c

2947

hw->phy.ops.write_reg(hw, 0x1F31, 0xB814);

sys/dev/e1000/e1000_phy.c

2949

hw->phy.ops.write_reg(hw, 0x1F35, 0x002A);

sys/dev/e1000/e1000_phy.c

2951

hw->phy.ops.write_reg(hw, 0x1F3E, 0x0067);

sys/dev/e1000/e1000_phy.c

2953

hw->phy.ops.write_reg(hw, 0x1F54, 0x0065);

sys/dev/e1000/e1000_phy.c

2955

hw->phy.ops.write_reg(hw, 0x1F55, 0x002A);

sys/dev/e1000/e1000_phy.c

2957

hw->phy.ops.write_reg(hw, 0x1F56, 0x002A);

sys/dev/e1000/e1000_phy.c

2959

hw->phy.ops.write_reg(hw, 0x1F72, 0x3FB0);

sys/dev/e1000/e1000_phy.c

2961

hw->phy.ops.write_reg(hw, 0x1F76, 0xC0FF);

sys/dev/e1000/e1000_phy.c

2963

hw->phy.ops.write_reg(hw, 0x1F77, 0x1DEC);

sys/dev/e1000/e1000_phy.c

2965

hw->phy.ops.write_reg(hw, 0x1F78, 0xF9EF);

sys/dev/e1000/e1000_phy.c

2967

hw->phy.ops.write_reg(hw, 0x1F79, 0x0210);

sys/dev/e1000/e1000_phy.c

2969

hw->phy.ops.write_reg(hw, 0x1895, 0x0003);

sys/dev/e1000/e1000_phy.c

2971

hw->phy.ops.write_reg(hw, 0x1796, 0x0008);

sys/dev/e1000/e1000_phy.c

2973

hw->phy.ops.write_reg(hw, 0x1798, 0xD008);

sys/dev/e1000/e1000_phy.c

2977

hw->phy.ops.write_reg(hw, 0x1898, 0xD918);

sys/dev/e1000/e1000_phy.c

2979

hw->phy.ops.write_reg(hw, 0x187A, 0x0800);

sys/dev/e1000/e1000_phy.c

2983

hw->phy.ops.write_reg(hw, 0x0019, 0x008D);

sys/dev/e1000/e1000_phy.c

2985

hw->phy.ops.write_reg(hw, 0x001B, 0x2080);

sys/dev/e1000/e1000_phy.c

2987

hw->phy.ops.write_reg(hw, 0x0014, 0x0045);

sys/dev/e1000/e1000_phy.c

2989

hw->phy.ops.write_reg(hw, 0x0000, 0x1340);

sys/dev/e1000/e1000_phy.c

3067

s32 e1000_determine_phy_address(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

3073

hw->phy.id = phy_type;

sys/dev/e1000/e1000_phy.c

3076

hw->phy.addr = phy_addr;

sys/dev/e1000/e1000_phy.c

3080

e1000_get_phy_id(hw);

sys/dev/e1000/e1000_phy.c

3081

phy_type = e1000_get_phy_type_from_id(hw->phy.id);

sys/dev/e1000/e1000_phy.c

310

E1000_WRITE_REG(hw, E1000_MDIC, mdic);

sys/dev/e1000/e1000_phy.c

3123

s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

3130

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

3136

ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,

sys/dev/e1000/e1000_phy.c

3141

hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);

sys/dev/e1000/e1000_phy.c

3150

if (hw->phy.addr == 1) {

sys/dev/e1000/e1000_phy.c

3159

ret_val = e1000_write_phy_reg_mdic(hw, page_select,

sys/dev/e1000/e1000_phy.c

3165

ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,

sys/dev/e1000/e1000_phy.c

3169

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

318

mdic = E1000_READ_REG(hw, E1000_MDIC);

sys/dev/e1000/e1000_phy.c

3183

s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

3190

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

3196

ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,

sys/dev/e1000/e1000_phy.c

3201

hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);

sys/dev/e1000/e1000_phy.c

3210

if (hw->phy.addr == 1) {

sys/dev/e1000/e1000_phy.c

3219

ret_val = e1000_write_phy_reg_mdic(hw, page_select,

sys/dev/e1000/e1000_phy.c

3225

ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,

sys/dev/e1000/e1000_phy.c

3228

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

3242

s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

3249

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

3255

ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,

sys/dev/e1000/e1000_phy.c

3260

hw->phy.addr = 1;

sys/dev/e1000/e1000_phy.c

3264

ret_val = e1000_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,

sys/dev/e1000/e1000_phy.c

3271

ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,

sys/dev/e1000/e1000_phy.c

3274

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

3287

s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

3294

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

3300

ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,

sys/dev/e1000/e1000_phy.c

3305

hw->phy.addr = 1;

sys/dev/e1000/e1000_phy.c

3309

ret_val = e1000_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,

sys/dev/e1000/e1000_phy.c

3316

ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,

sys/dev/e1000/e1000_phy.c

3320

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

3332

s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg)

sys/dev/e1000/e1000_phy.c

3343

hw->phy.addr = 1;

sys/dev/e1000/e1000_phy.c

3346

ret_val = e1000_set_page_igp(hw, (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT));

sys/dev/e1000/e1000_phy.c

3352

ret_val = e1000_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);

sys/dev/e1000/e1000_phy.c

3366

ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, temp);

sys/dev/e1000/e1000_phy.c

3376

return e1000_set_page_igp(hw, (BM_WUC_PAGE << IGP_PAGE_SHIFT));

sys/dev/e1000/e1000_phy.c

3390

s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg)

sys/dev/e1000/e1000_phy.c

3400

ret_val = e1000_set_page_igp(hw, (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT));

sys/dev/e1000/e1000_phy.c

3407

ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, *phy_reg);

sys/dev/e1000/e1000_phy.c

341

if (hw->mac.type == e1000_pch2lan)

sys/dev/e1000/e1000_phy.c

3440

static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_phy.c

3451

if ((hw->mac.type == e1000_pchlan) &&

sys/dev/e1000/e1000_phy.c

3452

(!(E1000_READ_REG(hw, E1000_PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE)))

sys/dev/e1000/e1000_phy.c

3458

ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg);

sys/dev/e1000/e1000_phy.c

3468

ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ADDRESS_OPCODE, reg);

sys/dev/e1000/e1000_phy.c

3476

ret_val = e1000_read_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,

sys/dev/e1000/e1000_phy.c

3480

ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,

sys/dev/e1000/e1000_phy.c

3490

ret_val = e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg);

sys/dev/e1000/e1000_phy.c

3503

void e1000_power_up_phy_copper(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

3508

hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);

sys/dev/e1000/e1000_phy.c

3510

hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);

sys/dev/e1000/e1000_phy.c

3521

void e1000_power_down_phy_copper(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

3526

hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);

sys/dev/e1000/e1000_phy.c

3528

hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);

sys/dev/e1000/e1000_phy.c

3544

static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,

sys/dev/e1000/e1000_phy.c

355

s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

3550

u32 phy_addr = hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);

sys/dev/e1000/e1000_phy.c

3555

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

3561

ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,

sys/dev/e1000/e1000_phy.c

3567

ret_val = e1000_access_phy_debug_regs_hv(hw, offset,

sys/dev/e1000/e1000_phy.c

357

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

3578

ret_val = e1000_set_page_igp(hw,

sys/dev/e1000/e1000_phy.c

3581

hw->phy.addr = phy_addr;

sys/dev/e1000/e1000_phy.c

3591

ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,

sys/dev/e1000/e1000_phy.c

3595

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

3610

s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

3612

return __e1000_read_phy_reg_hv(hw, offset, data, false, false);

sys/dev/e1000/e1000_phy.c

3624

s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

3626

return __e1000_read_phy_reg_hv(hw, offset, data, true, false);

sys/dev/e1000/e1000_phy.c

3638

s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

3640

return __e1000_read_phy_reg_hv(hw, offset, data, true, true);

sys/dev/e1000/e1000_phy.c

3654

static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,

sys/dev/e1000/e1000_phy.c

3660

u32 phy_addr = hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);

sys/dev/e1000/e1000_phy.c

3665

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

3671

ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,

sys/dev/e1000/e1000_phy.c

3677

ret_val = e1000_access_phy_debug_regs_hv(hw, offset,

sys/dev/e1000/e1000_phy.c

3689

if ((hw->phy.type == e1000_phy_82578) &&

sys/dev/e1000/e1000_phy.c

3690

(hw->phy.revision >= 1) &&

sys/dev/e1000/e1000_phy.c

3691

(hw->phy.addr == 2) &&

sys/dev/e1000/e1000_phy.c

3695

ret_val = e1000_access_phy_debug_regs_hv(hw,

sys/dev/e1000/e1000_phy.c

37

static s32 e1000_wait_autoneg(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.c

3704

ret_val = e1000_set_page_igp(hw,

sys/dev/e1000/e1000_phy.c

3707

hw->phy.addr = phy_addr;

sys/dev/e1000/e1000_phy.c

3717

ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,

sys/dev/e1000/e1000_phy.c

3722

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

3736

s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

3738

return __e1000_write_phy_reg_hv(hw, offset, data, false, false);

sys/dev/e1000/e1000_phy.c

3750

s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

3752

return __e1000_write_phy_reg_hv(hw, offset, data, true, false);

sys/dev/e1000/e1000_phy.c

376

E1000_WRITE_REG(hw, E1000_MDIC, mdic);

sys/dev/e1000/e1000_phy.c

3764

s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

3766

return __e1000_write_phy_reg_hv(hw, offset, data, true, true);

sys/dev/e1000/e1000_phy.c

3795

static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_phy.c

38

static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_phy.c

3805

addr_reg = ((hw->phy.type == e1000_phy_82578) ?

sys/dev/e1000/e1000_phy.c

3810

hw->phy.addr = 2;

sys/dev/e1000/e1000_phy.c

3813

ret_val = e1000_write_phy_reg_mdic(hw, addr_reg, (u16)offset & 0x3F);

sys/dev/e1000/e1000_phy.c

3821

ret_val = e1000_read_phy_reg_mdic(hw, data_reg, data);

sys/dev/e1000/e1000_phy.c

3823

ret_val = e1000_write_phy_reg_mdic(hw, data_reg, *data);

sys/dev/e1000/e1000_phy.c

384

mdic = E1000_READ_REG(hw, E1000_MDIC);

sys/dev/e1000/e1000_phy.c

3842

s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

3849

if (hw->phy.type != e1000_phy_82578)

sys/dev/e1000/e1000_phy.c

3853

hw->phy.ops.read_reg(hw, PHY_CONTROL, &data);

sys/dev/e1000/e1000_phy.c

3858

ret_val = hw->phy.ops.read_reg(hw, BM_CS_STATUS, &data);

sys/dev/e1000/e1000_phy.c

3872

ret_val = hw->phy.ops.write_reg(hw, HV_MUX_DATA_CTRL,

sys/dev/e1000/e1000_phy.c

3878

return hw->phy.ops.write_reg(hw, HV_MUX_DATA_CTRL,

sys/dev/e1000/e1000_phy.c

3890

s32 e1000_check_polarity_82577(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

3892

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

3898

ret_val = phy->ops.read_reg(hw, I82577_PHY_STATUS_2, &data);

sys/dev/e1000/e1000_phy.c

3914

s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

3916

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

3923

ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);

sys/dev/e1000/e1000_phy.c

3927

e1000_phy_force_speed_duplex_setup(hw, &phy_data);

sys/dev/e1000/e1000_phy.c

3929

ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);

sys/dev/e1000/e1000_phy.c

3938

ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,

sys/dev/e1000/e1000_phy.c

3947

ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,

sys/dev/e1000/e1000_phy.c

3963

s32 e1000_get_phy_info_82577(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

3965

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

3972

ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/e1000/e1000_phy.c

3983

ret_val = e1000_check_polarity_82577(hw);

sys/dev/e1000/e1000_phy.c

3987

ret_val = phy->ops.read_reg(hw, I82577_PHY_STATUS_2, &data);

sys/dev/e1000/e1000_phy.c

3995

ret_val = hw->phy.ops.get_cable_length(hw);

sys/dev/e1000/e1000_phy.c

3999

ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data);

sys/dev/e1000/e1000_phy.c

4026

s32 e1000_get_cable_length_82577(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

4028

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

4034

ret_val = phy->ops.read_reg(hw, I82577_PHY_DIAG_STATUS, &phy_data);

sys/dev/e1000/e1000_phy.c

4058

s32 e1000_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

406

if (hw->mac.type == e1000_pch2lan)

sys/dev/e1000/e1000_phy.c

4066

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

4070

ret_val = e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, page);

sys/dev/e1000/e1000_phy.c

4073

ret_val = e1000_write_phy_reg_mdic(hw, offset, data);

sys/dev/e1000/e1000_phy.c

4076

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

4090

s32 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

4098

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

41

static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,

sys/dev/e1000/e1000_phy.c

4102

ret_val = e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, page);

sys/dev/e1000/e1000_phy.c

4105

ret_val = e1000_read_phy_reg_mdic(hw, offset, data);

sys/dev/e1000/e1000_phy.c

4108

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

4121

s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data)

sys/dev/e1000/e1000_phy.c

4130

ready = e1000_is_mphy_ready(hw);

sys/dev/e1000/e1000_phy.c

4135

mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);

sys/dev/e1000/e1000_phy.c

4138

ready = e1000_is_mphy_ready(hw);

sys/dev/e1000/e1000_phy.c

4142

E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, mphy_ctrl);

sys/dev/e1000/e1000_phy.c

4146

ready = e1000_is_mphy_ready(hw);

sys/dev/e1000/e1000_phy.c

4154

E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, mphy_ctrl);

sys/dev/e1000/e1000_phy.c

4157

ready = e1000_is_mphy_ready(hw);

sys/dev/e1000/e1000_phy.c

4160

*data = E1000_READ_REG(hw, E1000_MPHY_DATA);

sys/dev/e1000/e1000_phy.c

4164

ready = e1000_is_mphy_ready(hw);

sys/dev/e1000/e1000_phy.c

4167

E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL,

sys/dev/e1000/e1000_phy.c

4182

s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,

sys/dev/e1000/e1000_phy.c

4192

ready = e1000_is_mphy_ready(hw);

sys/dev/e1000/e1000_phy.c

4197

mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);

sys/dev/e1000/e1000_phy.c

4200

ready = e1000_is_mphy_ready(hw);

sys/dev/e1000/e1000_phy.c

4204

E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, mphy_ctrl);

sys/dev/e1000/e1000_phy.c

4208

ready = e1000_is_mphy_ready(hw);

sys/dev/e1000/e1000_phy.c

421

s32 e1000_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

4219

E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL, mphy_ctrl);

sys/dev/e1000/e1000_phy.c

4222

ready = e1000_is_mphy_ready(hw);

sys/dev/e1000/e1000_phy.c

4225

E1000_WRITE_REG(hw, E1000_MPHY_DATA, data);

sys/dev/e1000/e1000_phy.c

4229

ready = e1000_is_mphy_ready(hw);

sys/dev/e1000/e1000_phy.c

423

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

4232

E1000_WRITE_REG(hw, E1000_MPHY_ADDR_CTRL,

sys/dev/e1000/e1000_phy.c

4244

bool e1000_is_mphy_ready(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

4251

mphy_ctrl = E1000_READ_REG(hw, E1000_MPHY_ADDR_CTRL);

sys/dev/e1000/e1000_phy.c

4275

static s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address,

sys/dev/e1000/e1000_phy.c

4282

ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);

sys/dev/e1000/e1000_phy.c

4286

ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address);

sys/dev/e1000/e1000_phy.c

4290

ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA |

sys/dev/e1000/e1000_phy.c

4296

ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data);

sys/dev/e1000/e1000_phy.c

4298

ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data);

sys/dev/e1000/e1000_phy.c

4303

ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0);

sys/dev/e1000/e1000_phy.c

4317

s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data)

sys/dev/e1000/e1000_phy.c

4321

return __e1000_access_xmdio_reg(hw, addr, dev_addr, data, true);

sys/dev/e1000/e1000_phy.c

4331

s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)

sys/dev/e1000/e1000_phy.c

4335

return __e1000_access_xmdio_reg(hw, addr, dev_addr, &data,

sys/dev/e1000/e1000_phy.c

436

E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);

sys/dev/e1000/e1000_phy.c

441

i2ccmd = E1000_READ_REG(hw, E1000_I2CCMD);

sys/dev/e1000/e1000_phy.c

468

s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

470

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

477

if ((hw->phy.addr == 0) || (hw->phy.addr > 7)) {

sys/dev/e1000/e1000_phy.c

479

hw->phy.addr);

sys/dev/e1000/e1000_phy.c

495

E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);

sys/dev/e1000/e1000_phy.c

500

i2ccmd = E1000_READ_REG(hw, E1000_I2CCMD);

sys/dev/e1000/e1000_phy.c

529

s32 e1000_read_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 *data)

sys/dev/e1000/e1000_phy.c

549

E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);

sys/dev/e1000/e1000_phy.c

554

data_local = E1000_READ_REG(hw, E1000_I2CCMD);

sys/dev/e1000/e1000_phy.c

584

s32 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data)

sys/dev/e1000/e1000_phy.c

608

E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);

sys/dev/e1000/e1000_phy.c

614

i2ccmd = E1000_READ_REG(hw, E1000_I2CCMD);

sys/dev/e1000/e1000_phy.c

627

E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);

sys/dev/e1000/e1000_phy.c

654

s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

660

if (!hw->phy.ops.acquire)

sys/dev/e1000/e1000_phy.c

663

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

667

ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,

sys/dev/e1000/e1000_phy.c

670

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

684

s32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

690

if (!hw->phy.ops.acquire)

sys/dev/e1000/e1000_phy.c

693

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

697

ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,

sys/dev/e1000/e1000_phy.c

70

void e1000_init_phy_ops_generic(struct e1000_hw *hw)

sys/dev/e1000/e1000_phy.c

700

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

714

s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page)

sys/dev/e1000/e1000_phy.c

72

struct e1000_phy_info *phy = &hw->phy;

sys/dev/e1000/e1000_phy.c

720

hw->phy.addr = 1;

sys/dev/e1000/e1000_phy.c

722

return e1000_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, page);

sys/dev/e1000/e1000_phy.c

736

static s32 __e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,

sys/dev/e1000/e1000_phy.c

744

if (!hw->phy.ops.acquire)

sys/dev/e1000/e1000_phy.c

747

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

753

ret_val = e1000_write_phy_reg_mdic(hw,

sys/dev/e1000/e1000_phy.c

757

ret_val = e1000_read_phy_reg_mdic(hw,

sys/dev/e1000/e1000_phy.c

761

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

776

s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

778

return __e1000_read_phy_reg_igp(hw, offset, data, false);

sys/dev/e1000/e1000_phy.c

790

s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

792

return __e1000_read_phy_reg_igp(hw, offset, data, true);

sys/dev/e1000/e1000_phy.c

805

static s32 __e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,

sys/dev/e1000/e1000_phy.c

813

if (!hw->phy.ops.acquire)

sys/dev/e1000/e1000_phy.c

816

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

822

ret_val = e1000_write_phy_reg_mdic(hw,

sys/dev/e1000/e1000_phy.c

826

ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS &

sys/dev/e1000/e1000_phy.c

830

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

844

s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

846

return __e1000_write_phy_reg_igp(hw, offset, data, false);

sys/dev/e1000/e1000_phy.c

858

s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

860

return __e1000_write_phy_reg_igp(hw, offset, data, true);

sys/dev/e1000/e1000_phy.c

874

static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,

sys/dev/e1000/e1000_phy.c

884

if (!hw->phy.ops.acquire)

sys/dev/e1000/e1000_phy.c

887

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

894

E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);

sys/dev/e1000/e1000_phy.c

895

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_phy.c

899

kmrnctrlsta = E1000_READ_REG(hw, E1000_KMRNCTRLSTA);

sys/dev/e1000/e1000_phy.c

903

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

918

s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

920

return __e1000_read_kmrn_reg(hw, offset, data, false);

sys/dev/e1000/e1000_phy.c

933

s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data)

sys/dev/e1000/e1000_phy.c

935

return __e1000_read_kmrn_reg(hw, offset, data, true);

sys/dev/e1000/e1000_phy.c

949

static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data,

sys/dev/e1000/e1000_phy.c

959

if (!hw->phy.ops.acquire)

sys/dev/e1000/e1000_phy.c

962

ret_val = hw->phy.ops.acquire(hw);

sys/dev/e1000/e1000_phy.c

969

E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);

sys/dev/e1000/e1000_phy.c

970

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/e1000_phy.c

975

hw->phy.ops.release(hw);

sys/dev/e1000/e1000_phy.c

989

s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data)

sys/dev/e1000/e1000_phy.c

991

return __e1000_write_kmrn_reg(hw, offset, data, false);

sys/dev/e1000/e1000_phy.h

100

s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

101

s32 e1000_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

102

s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

103

s32 e1000_read_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 *data);

sys/dev/e1000/e1000_phy.h

104

s32 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data);

sys/dev/e1000/e1000_phy.h

105

s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

106

s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

107

s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

108

s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

109

s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

110

s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

111

s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

112

s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

113

s32 e1000_check_polarity_82577(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

114

s32 e1000_get_phy_info_82577(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

115

s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

116

s32 e1000_get_cable_length_82577(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

117

s32 e1000_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

118

s32 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

119

s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data);

sys/dev/e1000/e1000_phy.h

120

s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,

sys/dev/e1000/e1000_phy.h

122

bool e1000_is_mphy_ready(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

124

s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,

sys/dev/e1000/e1000_phy.h

126

s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,

sys/dev/e1000/e1000_phy.h

38

void e1000_init_phy_ops_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

39

s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

40

void e1000_null_phy_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

41

s32 e1000_null_lplu_state(struct e1000_hw *hw, bool active);

sys/dev/e1000/e1000_phy.h

42

s32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

43

s32 e1000_null_set_page(struct e1000_hw *hw, u16 data);

sys/dev/e1000/e1000_phy.h

44

s32 e1000_read_i2c_byte_null(struct e1000_hw *hw, u8 byte_offset,

sys/dev/e1000/e1000_phy.h

46

s32 e1000_write_i2c_byte_null(struct e1000_hw *hw, u8 byte_offset,

sys/dev/e1000/e1000_phy.h

48

s32 e1000_check_downshift_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

49

s32 e1000_check_polarity_m88(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

50

s32 e1000_check_polarity_igp(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

51

s32 e1000_check_polarity_ife(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

52

s32 e1000_check_reset_block_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

53

s32 e1000_phy_setup_autoneg(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

54

s32 e1000_copper_link_autoneg(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

55

s32 e1000_copper_link_setup_igp(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

56

s32 e1000_copper_link_setup_m88(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

57

s32 e1000_copper_link_setup_m88_gen2(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

58

s32 e1000_phy_force_speed_duplex_igp(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

59

s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

60

s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

61

s32 e1000_get_cable_length_m88(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

62

s32 e1000_get_cable_length_m88_gen2(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

63

s32 e1000_get_cable_length_igp_2(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

64

s32 e1000_get_cfg_done_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

65

s32 e1000_get_phy_id(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

66

s32 e1000_get_phy_info_igp(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

67

s32 e1000_get_phy_info_m88(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

68

s32 e1000_get_phy_info_ife(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

69

s32 e1000_phy_sw_reset_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

70

void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);

sys/dev/e1000/e1000_phy.h

71

s32 e1000_phy_hw_reset_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

72

s32 e1000_phy_reset_dsp_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

73

s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

74

s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

75

s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page);

sys/dev/e1000/e1000_phy.h

76

s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

77

s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

78

s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

79

s32 e1000_set_d3_lplu_state_generic(struct e1000_hw *hw, bool active);

sys/dev/e1000/e1000_phy.h

80

s32 e1000_setup_copper_link_generic(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

81

s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

82

s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

83

s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

84

s32 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

85

s32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

86

s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,

sys/dev/e1000/e1000_phy.h

88

s32 e1000_phy_init_script_igp3(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

90

s32 e1000_determine_phy_address(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

91

s32 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

92

s32 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

93

s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg);

sys/dev/e1000/e1000_phy.h

94

s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg);

sys/dev/e1000/e1000_phy.h

95

s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_phy.h

96

s32 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);

sys/dev/e1000/e1000_phy.h

97

void e1000_power_up_phy_copper(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

98

void e1000_power_down_phy_copper(struct e1000_hw *hw);

sys/dev/e1000/e1000_phy.h

99

s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);

sys/dev/e1000/e1000_vf.c

103

hw->phy.media_type = e1000_media_type_unknown;

sys/dev/e1000/e1000_vf.c

144

void e1000_init_function_pointers_vf(struct e1000_hw *hw)

sys/dev/e1000/e1000_vf.c

148

hw->mac.ops.init_params = e1000_init_mac_params_vf;

sys/dev/e1000/e1000_vf.c

149

hw->nvm.ops.init_params = e1000_init_nvm_params_vf;

sys/dev/e1000/e1000_vf.c

150

hw->phy.ops.init_params = e1000_init_phy_params_vf;

sys/dev/e1000/e1000_vf.c

151

hw->mbx.ops.init_params = e1000_init_mbx_params_vf;

sys/dev/e1000/e1000_vf.c

162

static s32 e1000_acquire_vf(struct e1000_hw E1000_UNUSEDARG *hw)

sys/dev/e1000/e1000_vf.c

175

static void e1000_release_vf(struct e1000_hw E1000_UNUSEDARG *hw)

sys/dev/e1000/e1000_vf.c

186

static s32 e1000_setup_link_vf(struct e1000_hw E1000_UNUSEDARG *hw)

sys/dev/e1000/e1000_vf.c

199

static s32 e1000_get_bus_info_pcie_vf(struct e1000_hw *hw)

sys/dev/e1000/e1000_vf.c

201

struct e1000_bus_info *bus = &hw->bus;

sys/dev/e1000/e1000_vf.c

221

static s32 e1000_get_link_up_info_vf(struct e1000_hw *hw, u16 *speed,

sys/dev/e1000/e1000_vf.c

228

status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/e1000_vf.c

258

static s32 e1000_reset_hw_vf(struct e1000_hw *hw)

sys/dev/e1000/e1000_vf.c

260

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_vf.c

269

ctrl = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/e1000_vf.c

270

E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);

sys/dev/e1000/e1000_vf.c

273

while (!mbx->ops.check_for_rst(hw, 0) && timeout) {

sys/dev/e1000/e1000_vf.c

283

mbx->ops.write_posted(hw, msgbuf, 1, 0);

sys/dev/e1000/e1000_vf.c

288

ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);

sys/dev/e1000/e1000_vf.c

292

memcpy(hw->mac.perm_addr, addr, 6);

sys/dev/e1000/e1000_vf.c

307

static s32 e1000_init_hw_vf(struct e1000_hw *hw)

sys/dev/e1000/e1000_vf.c

312

e1000_rar_set_vf(hw, hw->mac.addr, 0);

sys/dev/e1000/e1000_vf.c

323

static int e1000_rar_set_vf(struct e1000_hw *hw, u8 *addr,

sys/dev/e1000/e1000_vf.c

326

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_vf.c

334

ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);

sys/dev/e1000/e1000_vf.c

337

ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);

sys/dev/e1000/e1000_vf.c

344

e1000_read_mac_addr_vf(hw);

sys/dev/e1000/e1000_vf.c

357

static u32 e1000_hash_mc_addr_vf(struct e1000_hw *hw, u8 *mc_addr)

sys/dev/e1000/e1000_vf.c

365

hash_mask = (hw->mac.mta_reg_count * 32) - 1;

sys/dev/e1000/e1000_vf.c

380

static void e1000_write_msg_read_ack(struct e1000_hw *hw,

sys/dev/e1000/e1000_vf.c

383

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_vf.c

385

s32 retval = mbx->ops.write_posted(hw, msg, size, 0);

sys/dev/e1000/e1000_vf.c

388

mbx->ops.read_posted(hw, retmsg, E1000_VFMAILBOX_SIZE, 0);

sys/dev/e1000/e1000_vf.c

39

static s32 e1000_init_phy_params_vf(struct e1000_hw *hw);

sys/dev/e1000/e1000_vf.c

40

static s32 e1000_init_nvm_params_vf(struct e1000_hw *hw);

sys/dev/e1000/e1000_vf.c

402

e1000_set_uc_addr_vf(struct e1000_hw *hw, u32 sub_cmd, u8 *addr)

sys/dev/e1000/e1000_vf.c

404

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_vf.c

41

static void e1000_release_vf(struct e1000_hw *hw);

sys/dev/e1000/e1000_vf.c

414

ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);

sys/dev/e1000/e1000_vf.c

416

ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);

sys/dev/e1000/e1000_vf.c

42

static s32 e1000_acquire_vf(struct e1000_hw *hw);

sys/dev/e1000/e1000_vf.c

43

static s32 e1000_setup_link_vf(struct e1000_hw *hw);

sys/dev/e1000/e1000_vf.c

435

void e1000_update_mc_addr_list_vf(struct e1000_hw *hw,

sys/dev/e1000/e1000_vf.c

44

static s32 e1000_get_bus_info_pcie_vf(struct e1000_hw *hw);

sys/dev/e1000/e1000_vf.c

45

static s32 e1000_init_mac_params_vf(struct e1000_hw *hw);

sys/dev/e1000/e1000_vf.c

46

static s32 e1000_check_for_link_vf(struct e1000_hw *hw);

sys/dev/e1000/e1000_vf.c

466

hash_value = e1000_hash_mc_addr_vf(hw, mc_addr_list);

sys/dev/e1000/e1000_vf.c

47

static s32 e1000_get_link_up_info_vf(struct e1000_hw *hw, u16 *speed,

sys/dev/e1000/e1000_vf.c

472

e1000_write_msg_read_ack(hw, msgbuf, E1000_VFMAILBOX_SIZE);

sys/dev/e1000/e1000_vf.c

483

s32 e1000_vfta_set_vf(struct e1000_hw *hw, u16 vid, bool set)

sys/dev/e1000/e1000_vf.c

485

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_vf.c

49

static s32 e1000_init_hw_vf(struct e1000_hw *hw);

sys/dev/e1000/e1000_vf.c

495

ret_val = mbx->ops.write_posted(hw, msgbuf, 2, 0);

sys/dev/e1000/e1000_vf.c

497

ret_val = mbx->ops.read_posted(hw, msgbuf, 1, 0);

sys/dev/e1000/e1000_vf.c

50

static s32 e1000_reset_hw_vf(struct e1000_hw *hw);

sys/dev/e1000/e1000_vf.c

51

static void e1000_update_mc_addr_list_vf(struct e1000_hw *hw, u8 *, u32);

sys/dev/e1000/e1000_vf.c

510

void e1000_rlpml_set_vf(struct e1000_hw *hw, u16 max_size)

sys/dev/e1000/e1000_vf.c

517

e1000_write_msg_read_ack(hw, msgbuf, 2);

sys/dev/e1000/e1000_vf.c

526

s32 e1000_promisc_set_vf(struct e1000_hw *hw, enum e1000_promisc_type type)

sys/dev/e1000/e1000_vf.c

528

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_vf.c

548

ret_val = mbx->ops.write_posted(hw, &msgbuf, 1, 0);

sys/dev/e1000/e1000_vf.c

551

ret_val = mbx->ops.read_posted(hw, &msgbuf, 1, 0);

sys/dev/e1000/e1000_vf.c

563

static s32 e1000_read_mac_addr_vf(struct e1000_hw *hw)

sys/dev/e1000/e1000_vf.c

568

hw->mac.addr[i] = hw->mac.perm_addr[i];

sys/dev/e1000/e1000_vf.c

581

static s32 e1000_check_for_link_vf(struct e1000_hw *hw)

sys/dev/e1000/e1000_vf.c

583

struct e1000_mbx_info *mbx = &hw->mbx;

sys/dev/e1000/e1000_vf.c

584

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_vf.c

597

if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)

sys/dev/e1000/e1000_vf.c

604

if (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU))

sys/dev/e1000/e1000_vf.c

609

if (mbx->ops.read(hw, &in_msg, 1, 0, true))

sys/dev/e1000/e1000_vf.c

61

static s32 e1000_init_phy_params_vf(struct e1000_hw *hw)

sys/dev/e1000/e1000_vf.c

64

hw->phy.type = e1000_phy_vf;

sys/dev/e1000/e1000_vf.c

65

hw->phy.ops.acquire = e1000_acquire_vf;

sys/dev/e1000/e1000_vf.c

66

hw->phy.ops.release = e1000_release_vf;

sys/dev/e1000/e1000_vf.c

77

static s32 e1000_init_nvm_params_vf(struct e1000_hw *hw)

sys/dev/e1000/e1000_vf.c

80

hw->nvm.type = e1000_nvm_none;

sys/dev/e1000/e1000_vf.c

81

hw->nvm.ops.acquire = e1000_acquire_vf;

sys/dev/e1000/e1000_vf.c

82

hw->nvm.ops.release = e1000_release_vf;

sys/dev/e1000/e1000_vf.c

91

static s32 e1000_init_mac_params_vf(struct e1000_hw *hw)

sys/dev/e1000/e1000_vf.c

93

struct e1000_mac_info *mac = &hw->mac;

sys/dev/e1000/e1000_vf.h

229

s32 (*init_params)(struct e1000_hw *hw);

sys/dev/e1000/e1000_vf.h

293

s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);

sys/dev/e1000/em_txrx.c

500

E1000_WRITE_REG(&sc->hw, E1000_TDT(txr->me), pidx);

sys/dev/e1000/em_txrx.c

501

if (sc->hw.mac.type >= e1000_82540)

sys/dev/e1000/em_txrx.c

627

E1000_WRITE_REG(&sc->hw, E1000_RDT(rxr->me), pidx);

sys/dev/e1000/em_txrx.c

628

if (sc->hw.mac.type >= e1000_82540)

sys/dev/e1000/if_em.c

1096

switch (sc->hw.mac.type) {

sys/dev/e1000/if_em.c

1150

struct e1000_hw *hw;

sys/dev/e1000/if_em.c

1154

hw = &sc->hw;

sys/dev/e1000/if_em.c

1192

if (hw->mac.type >= e1000_i350) {

sys/dev/e1000/if_em.c

1230

struct e1000_hw *hw;

sys/dev/e1000/if_em.c

1250

hw = &sc->hw;

sys/dev/e1000/if_em.c

1257

sc->osdep.vf_82576 = sc->hw.mac.type == e1000_vfadapt;

sys/dev/e1000/if_em.c

1272

if (hw->mac.type >= igb_mac_min) {

sys/dev/e1000/if_em.c

1287

if (hw->mac.type != e1000_82575)

sys/dev/e1000/if_em.c

1295

} else if (hw->mac.type >= em_mac_min) {

sys/dev/e1000/if_em.c

1318

if (hw->mac.type == e1000_pch_spt)

sys/dev/e1000/if_em.c

1325

if (hw->mac.type == e1000_82574) {

sys/dev/e1000/if_em.c

1352

if (hw->device_id == E1000_DEV_ID_82541ER ||

sys/dev/e1000/if_em.c

1353

hw->device_id == E1000_DEV_ID_82541ER_LOM) {

sys/dev/e1000/if_em.c

1358

if (hw->mac.type == e1000_82542) {

sys/dev/e1000/if_em.c

1366

if (hw->mac.type < e1000_82544 ||

sys/dev/e1000/if_em.c

1367

hw->mac.type == e1000_82547 ||

sys/dev/e1000/if_em.c

1368

hw->mac.type == e1000_82547_rev_2) {

sys/dev/e1000/if_em.c

1374

if (hw->mac.type < e1000_82545){

sys/dev/e1000/if_em.c

1382

if (hw->mac.type == e1000_82547 ||

sys/dev/e1000/if_em.c

1383

hw->mac.type == e1000_82547_rev_2)

sys/dev/e1000/if_em.c

1404

if ((hw->mac.type == e1000_ich8lan) ||

sys/dev/e1000/if_em.c

1405

(hw->mac.type == e1000_ich9lan) ||

sys/dev/e1000/if_em.c

1406

(hw->mac.type == e1000_ich10lan) ||

sys/dev/e1000/if_em.c

1407

(hw->mac.type == e1000_pchlan) ||

sys/dev/e1000/if_em.c

1408

(hw->mac.type == e1000_pch2lan) ||

sys/dev/e1000/if_em.c

1409

(hw->mac.type == e1000_pch_lpt)) {

sys/dev/e1000/if_em.c

1419

hw->flash_address = (u8 *)sc->flash;

sys/dev/e1000/if_em.c

1431

else if (hw->mac.type >= e1000_pch_spt) {

sys/dev/e1000/if_em.c

1438

error = e1000_setup_init_funcs(hw, true);

sys/dev/e1000/if_em.c

1447

e1000_get_bus_info(hw);

sys/dev/e1000/if_em.c

1454

if (hw->bus.type == e1000_bus_type_pci) {

sys/dev/e1000/if_em.c

1471

if (hw->mac.type < igb_mac_min) {

sys/dev/e1000/if_em.c

1474

E1000_REGISTER(hw, E1000_RDTR), em_rx_int_delay_dflt);

sys/dev/e1000/if_em.c

1477

E1000_REGISTER(hw, E1000_TIDV), em_tx_int_delay_dflt);

sys/dev/e1000/if_em.c

1479

if (hw->mac.type >= e1000_82540 && hw->mac.type < igb_mac_min) {

sys/dev/e1000/if_em.c

1483

E1000_REGISTER(hw, E1000_RADV), em_rx_abs_int_delay_dflt);

sys/dev/e1000/if_em.c

1487

E1000_REGISTER(hw, E1000_TADV), em_tx_abs_int_delay_dflt);

sys/dev/e1000/if_em.c

1490

hw->mac.autoneg = DO_AUTO_NEG;

sys/dev/e1000/if_em.c

1491

hw->phy.autoneg_wait_to_complete = false;

sys/dev/e1000/if_em.c

1492

hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;

sys/dev/e1000/if_em.c

1494

if (hw->mac.type < em_mac_min) {

sys/dev/e1000/if_em.c

1495

e1000_init_script_state_82541(hw, true);

sys/dev/e1000/if_em.c

1496

e1000_set_tbi_compatibility_82543(hw, true);

sys/dev/e1000/if_em.c

1499

if (hw->phy.media_type == e1000_media_type_copper) {

sys/dev/e1000/if_em.c

1500

hw->phy.mdix = AUTO_ALL_MODES;

sys/dev/e1000/if_em.c

1501

hw->phy.disable_polarity_correction = false;

sys/dev/e1000/if_em.c

1502

hw->phy.ms_type = EM_MASTER_SLAVE;

sys/dev/e1000/if_em.c

1509

scctx->isc_max_frame_size = hw->mac.max_frame_size =

sys/dev/e1000/if_em.c

1516

hw->mac.report_tx_early = 1;

sys/dev/e1000/if_em.c

1532

if (!sc->vf_ifp && e1000_check_reset_block(hw))

sys/dev/e1000/if_em.c

1538

if (hw->mac.type < igb_mac_min)

sys/dev/e1000/if_em.c

1539

hw->dev_spec.ich8lan.eee_disable = eee_setting;

sys/dev/e1000/if_em.c

1541

hw->dev_spec._82575.eee_disable = eee_setting;

sys/dev/e1000/if_em.c

1552

if (e1000_reset_hw(hw) != E1000_SUCCESS && sc->vf_ifp)

sys/dev/e1000/if_em.c

1557

if (!sc->vf_ifp && e1000_validate_nvm_checksum(hw) < 0) {

sys/dev/e1000/if_em.c

1563

if (e1000_validate_nvm_checksum(hw) < 0) {

sys/dev/e1000/if_em.c

1572

if (e1000_read_mac_addr(hw) < 0) {

sys/dev/e1000/if_em.c

1579

if (!em_is_valid_ether_addr(hw->mac.addr)) {

sys/dev/e1000/if_em.c

1585

(struct ether_addr *)hw->mac.addr);

sys/dev/e1000/if_em.c

1611

iflib_set_mac(ctx, hw->mac.addr);

sys/dev/e1000/if_em.c

1629

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

1652

hw->mac.get_link_status = 1;

sys/dev/e1000/if_em.c

1695

e1000_phy_hw_reset(&sc->hw);

sys/dev/e1000/if_em.c

1739

if (sc->hw.mac.type == e1000_pch2lan)

sys/dev/e1000/if_em.c

1740

e1000_resume_workarounds_pchlan(&sc->hw);

sys/dev/e1000/if_em.c

1756

switch (sc->hw.mac.type) {

sys/dev/e1000/if_em.c

1784

if (sc->hw.mac.type >= igb_mac_min)

sys/dev/e1000/if_em.c

1793

scctx->isc_max_frame_size = sc->hw.mac.max_frame_size =

sys/dev/e1000/if_em.c

1825

bcopy(if_getlladdr(ifp), sc->hw.mac.addr, ETHER_ADDR_LEN);

sys/dev/e1000/if_em.c

1832

e1000_rar_set(&sc->hw, sc->hw.mac.addr, 0);

sys/dev/e1000/if_em.c

1840

if (sc->hw.mac.type == e1000_82571) {

sys/dev/e1000/if_em.c

1841

e1000_set_laa_state_82571(&sc->hw, true);

sys/dev/e1000/if_em.c

1842

e1000_rar_set(&sc->hw, sc->hw.mac.addr,

sys/dev/e1000/if_em.c

1891

E1000_WRITE_REG(&sc->hw, E1000_VET, ETHERTYPE_VLAN);

sys/dev/e1000/if_em.c

1894

if (sc->hw.mac.type >= igb_mac_min && !sc->vf_ifp)

sys/dev/e1000/if_em.c

1895

e1000_rx_fifo_flush_base(&sc->hw);

sys/dev/e1000/if_em.c

1932

if (sc->hw.mac.ops.clear_hw_cntrs != NULL)

sys/dev/e1000/if_em.c

1933

sc->hw.mac.ops.clear_hw_cntrs(&sc->hw);

sys/dev/e1000/if_em.c

1936

if (sc->hw.mac.type == e1000_82574) {

sys/dev/e1000/if_em.c

1937

int tmp = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT);

sys/dev/e1000/if_em.c

1940

E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT, tmp);

sys/dev/e1000/if_em.c

1942

E1000_WRITE_REG(&sc->hw, E1000_IVAR, sc->ivars);

sys/dev/e1000/if_em.c

1947

if (sc->hw.mac.type >= igb_mac_min)

sys/dev/e1000/if_em.c

1952

E1000_READ_REG(&sc->hw, E1000_ICR);

sys/dev/e1000/if_em.c

1953

E1000_WRITE_REG(&sc->hw, E1000_ICS, E1000_ICS_LSC);

sys/dev/e1000/if_em.c

1961

if (sc->hw.mac.type >= igb_mac_min &&

sys/dev/e1000/if_em.c

1962

sc->hw.phy.media_type == e1000_media_type_copper) {

sys/dev/e1000/if_em.c

1963

if (sc->hw.mac.type == e1000_i354)

sys/dev/e1000/if_em.c

1964

e1000_set_eee_i354(&sc->hw, true, true);

sys/dev/e1000/if_em.c

1966

e1000_set_eee_i350(&sc->hw, true, true);

sys/dev/e1000/if_em.c

2076

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

2120

if (hw->mac.type >= igb_mac_min) {

sys/dev/e1000/if_em.c

2123

if (hw->mac.type == e1000_82575)

sys/dev/e1000/if_em.c

2130

E1000_WRITE_REG(hw, E1000_EITR(que->msix),

sys/dev/e1000/if_em.c

2138

if (hw->mac.type == e1000_82574 &&

sys/dev/e1000/if_em.c

2140

E1000_WRITE_REG(hw,

sys/dev/e1000/if_em.c

2144

E1000_WRITE_REG(hw, E1000_ITR,

sys/dev/e1000/if_em.c

2160

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

2166

reg_icr = E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/if_em.c

2180

if (hw->mac.type >= e1000_82571 &&

sys/dev/e1000/if_em.c

2199

if (hw->mac.type >= e1000_82540)

sys/dev/e1000/if_em.c

2211

E1000_WRITE_REG(&sc->hw, E1000_IMS, rxq->eims);

sys/dev/e1000/if_em.c

2221

E1000_WRITE_REG(&sc->hw, E1000_IMS, txq->eims);

sys/dev/e1000/if_em.c

2231

E1000_WRITE_REG(&sc->hw, E1000_EIMS, rxq->eims);

sys/dev/e1000/if_em.c

2241

E1000_WRITE_REG(&sc->hw, E1000_EIMS, txq->eims);

sys/dev/e1000/if_em.c

2276

MPASS(sc->hw.back != NULL);

sys/dev/e1000/if_em.c

2283

sc->hw.mac.get_link_status = true;

sys/dev/e1000/if_em.c

2285

E1000_WRITE_REG(&sc->hw, E1000_EIMS, sc->link_mask);

sys/dev/e1000/if_em.c

2289

reg_icr = E1000_READ_REG(&sc->hw, E1000_ICR);

sys/dev/e1000/if_em.c

2311

if (sc->hw.mac.type >= igb_mac_min) {

sys/dev/e1000/if_em.c

2312

E1000_WRITE_REG(&sc->hw, E1000_IMS,

sys/dev/e1000/if_em.c

2314

E1000_WRITE_REG(&sc->hw, E1000_EIMS, sc->link_mask);

sys/dev/e1000/if_em.c

2315

} else if (sc->hw.mac.type == e1000_82574) {

sys/dev/e1000/if_em.c

2316

E1000_WRITE_REG(&sc->hw, E1000_IMS,

sys/dev/e1000/if_em.c

2324

E1000_WRITE_REG(&sc->hw, E1000_ICS, sc->ims);

sys/dev/e1000/if_em.c

2326

E1000_WRITE_REG(&sc->hw, E1000_IMS, E1000_IMS_LSC);

sys/dev/e1000/if_em.c

2337

sc->hw.mac.get_link_status = 1;

sys/dev/e1000/if_em.c

2369

if ((sc->hw.phy.media_type == e1000_media_type_fiber) ||

sys/dev/e1000/if_em.c

2370

(sc->hw.phy.media_type == e1000_media_type_internal_serdes)) {

sys/dev/e1000/if_em.c

2371

if (sc->hw.mac.type == e1000_82545)

sys/dev/e1000/if_em.c

2414

sc->hw.mac.autoneg = DO_AUTO_NEG;

sys/dev/e1000/if_em.c

2415

sc->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;

sys/dev/e1000/if_em.c

2420

sc->hw.mac.autoneg = DO_AUTO_NEG;

sys/dev/e1000/if_em.c

2421

sc->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;

sys/dev/e1000/if_em.c

2424

sc->hw.mac.autoneg = false;

sys/dev/e1000/if_em.c

2425

sc->hw.phy.autoneg_advertised = 0;

sys/dev/e1000/if_em.c

2427

sc->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;

sys/dev/e1000/if_em.c

2429

sc->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;

sys/dev/e1000/if_em.c

2432

sc->hw.mac.autoneg = false;

sys/dev/e1000/if_em.c

2433

sc->hw.phy.autoneg_advertised = 0;

sys/dev/e1000/if_em.c

2435

sc->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;

sys/dev/e1000/if_em.c

2437

sc->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;

sys/dev/e1000/if_em.c

2462

switch (sc->hw.mac.type) {

sys/dev/e1000/if_em.c

2500

error = e1000_promisc_set_vf(&sc->hw, type);

sys/dev/e1000/if_em.c

2509

reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL);

sys/dev/e1000/if_em.c

2519

E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl);

sys/dev/e1000/if_em.c

2526

E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl);

sys/dev/e1000/if_em.c

2535

E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl);

sys/dev/e1000/if_em.c

2578

if (sc->hw.mac.type == e1000_82542 &&

sys/dev/e1000/if_em.c

2579

sc->hw.revision_id == E1000_REVISION_2) {

sys/dev/e1000/if_em.c

2580

reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL);

sys/dev/e1000/if_em.c

2581

if (sc->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)

sys/dev/e1000/if_em.c

2582

e1000_pci_clear_mwi(&sc->hw);

sys/dev/e1000/if_em.c

2584

E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl);

sys/dev/e1000/if_em.c

2591

e1000_update_mc_addr_list(&sc->hw, mta, mcnt);

sys/dev/e1000/if_em.c

2598

e1000_update_mc_addr_list(&sc->hw, mta, mcnt);

sys/dev/e1000/if_em.c

2600

reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL);

sys/dev/e1000/if_em.c

2611

E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl);

sys/dev/e1000/if_em.c

2613

if (sc->hw.mac.type == e1000_82542 &&

sys/dev/e1000/if_em.c

2614

sc->hw.revision_id == E1000_REVISION_2) {

sys/dev/e1000/if_em.c

2615

reg_rctl = E1000_READ_REG(&sc->hw, E1000_RCTL);

sys/dev/e1000/if_em.c

2617

E1000_WRITE_REG(&sc->hw, E1000_RCTL, reg_rctl);

sys/dev/e1000/if_em.c

2619

if (sc->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)

sys/dev/e1000/if_em.c

2620

e1000_pci_set_mwi(&sc->hw);

sys/dev/e1000/if_em.c

2651

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

2666

switch (hw->phy.media_type) {

sys/dev/e1000/if_em.c

2668

if (hw->mac.get_link_status) {

sys/dev/e1000/if_em.c

2669

if (hw->mac.type == e1000_pch_spt)

sys/dev/e1000/if_em.c

2672

e1000_check_for_link(hw);

sys/dev/e1000/if_em.c

2673

link_check = !hw->mac.get_link_status;

sys/dev/e1000/if_em.c

2675

e1000_cfg_on_link_up(hw);

sys/dev/e1000/if_em.c

2681

e1000_check_for_link(hw);

sys/dev/e1000/if_em.c

2683

(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU);

sys/dev/e1000/if_em.c

2686

e1000_check_for_link(hw);

sys/dev/e1000/if_em.c

2687

link_check = hw->mac.serdes_has_link;

sys/dev/e1000/if_em.c

2694

if (hw->mac.type == e1000_i350) {

sys/dev/e1000/if_em.c

2695

thstat = E1000_READ_REG(hw, E1000_THSTAT);

sys/dev/e1000/if_em.c

2696

ctrl = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/if_em.c

2707

e1000_get_speed_and_duplex(hw, &sc->link_speed,

sys/dev/e1000/if_em.c

2711

((hw->mac.type == e1000_82571) ||

sys/dev/e1000/if_em.c

2712

(hw->mac.type == e1000_82572))) {

sys/dev/e1000/if_em.c

2714

tarc0 = E1000_READ_REG(hw, E1000_TARC(0));

sys/dev/e1000/if_em.c

2716

E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);

sys/dev/e1000/if_em.c

2725

if (hw->mac.type == e1000_i350 &&

sys/dev/e1000/if_em.c

2731

if (((hw->mac.type == e1000_i210) ||

sys/dev/e1000/if_em.c

2732

(hw->mac.type == e1000_i211)) &&

sys/dev/e1000/if_em.c

2733

(hw->phy.id == I210_I_PHY_ID))

sys/dev/e1000/if_em.c

2736

if (hw->dev_spec._82575.media_changed &&

sys/dev/e1000/if_em.c

2737

hw->mac.type >= igb_mac_min) {

sys/dev/e1000/if_em.c

2738

hw->dev_spec._82575.media_changed = false;

sys/dev/e1000/if_em.c

2748

if (hw->mac.type < igb_mac_min)

sys/dev/e1000/if_em.c

2790

if (hw->mac.type == e1000_82571 && e1000_get_laa_state_82571(hw))

sys/dev/e1000/if_em.c

2791

e1000_rar_set(hw, hw->mac.addr, 0);

sys/dev/e1000/if_em.c

2793

if (hw->mac.type < em_mac_min)

sys/dev/e1000/if_em.c

2826

if (sc->hw.mac.type >= e1000_pch_spt && sc->hw.mac.type < igb_mac_min)

sys/dev/e1000/if_em.c

2830

e1000_reset_hw(&sc->hw);

sys/dev/e1000/if_em.c

2831

if (sc->hw.mac.type >= e1000_82544 && !sc->vf_ifp)

sys/dev/e1000/if_em.c

2832

E1000_WRITE_REG(&sc->hw, E1000_WUFC, 0);

sys/dev/e1000/if_em.c

2835

e1000_led_off(&sc->hw);

sys/dev/e1000/if_em.c

2836

e1000_cleanup_led(&sc->hw);

sys/dev/e1000/if_em.c

2852

sc->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);

sys/dev/e1000/if_em.c

2855

sc->hw.vendor_id = pci_get_vendor(dev);

sys/dev/e1000/if_em.c

2856

sc->hw.device_id = pci_get_device(dev);

sys/dev/e1000/if_em.c

2857

sc->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1);

sys/dev/e1000/if_em.c

2858

sc->hw.subsystem_vendor_id = pci_read_config(dev, PCIR_SUBVEND_0, 2);

sys/dev/e1000/if_em.c

2859

sc->hw.subsystem_device_id = pci_read_config(dev, PCIR_SUBDEV_0, 2);

sys/dev/e1000/if_em.c

2862

if (e1000_set_mac_type(&sc->hw)) {

sys/dev/e1000/if_em.c

2873

(sc->hw.mac.type == e1000_vfadapt ||

sys/dev/e1000/if_em.c

2874

sc->hw.mac.type == e1000_vfadapt_i350),

sys/dev/e1000/if_em.c

2898

sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle;

sys/dev/e1000/if_em.c

2901

if (sc->hw.mac.type < em_mac_min && sc->hw.mac.type > e1000_82543) {

sys/dev/e1000/if_em.c

2924

sc->hw.io_base = 0;

sys/dev/e1000/if_em.c

2931

sc->hw.back = &sc->osdep;

sys/dev/e1000/if_em.c

2972

if (sc->hw.mac.type == e1000_82574) {

sys/dev/e1000/if_em.c

2976

} else if (sc->hw.mac.type == e1000_82575)

sys/dev/e1000/if_em.c

2999

if (sc->hw.mac.type == e1000_82574) {

sys/dev/e1000/if_em.c

3003

} else if (sc->hw.mac.type == e1000_82575) {

sys/dev/e1000/if_em.c

3021

if (sc->hw.mac.type < igb_mac_min) {

sys/dev/e1000/if_em.c

3040

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

3054

if (!sc->vf_ifp && hw->mac.type != e1000_82575)

sys/dev/e1000/if_em.c

3055

E1000_WRITE_REG(hw, E1000_GPIE,

sys/dev/e1000/if_em.c

3060

switch (hw->mac.type) {

sys/dev/e1000/if_em.c

3075

ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);

sys/dev/e1000/if_em.c

3084

E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);

sys/dev/e1000/if_em.c

3094

ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);

sys/dev/e1000/if_em.c

3104

E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);

sys/dev/e1000/if_em.c

3118

E1000_WRITE_REG(hw, E1000_IVAR_MISC, ivar);

sys/dev/e1000/if_em.c

3128

ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);

sys/dev/e1000/if_em.c

3137

E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);

sys/dev/e1000/if_em.c

3147

ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);

sys/dev/e1000/if_em.c

3157

E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);

sys/dev/e1000/if_em.c

3164

E1000_WRITE_REG(hw, E1000_IVAR_MISC, ivar);

sys/dev/e1000/if_em.c

3169

tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/if_em.c

3174

E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);

sys/dev/e1000/if_em.c

3182

E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), i,

sys/dev/e1000/if_em.c

3188

E1000_WRITE_REG(hw, E1000_MSIXBM(sc->linkvec),

sys/dev/e1000/if_em.c

3201

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

3206

if (hw->mac.type == e1000_82575)

sys/dev/e1000/if_em.c

3214

E1000_WRITE_REG(hw, E1000_EITR(rx_que->msix),

sys/dev/e1000/if_em.c

3218

E1000_WRITE_REG(hw, E1000_EITR(sc->linkvec), newitr);

sys/dev/e1000/if_em.c

3263

if (sc->hw.mac.type == e1000_82574) {

sys/dev/e1000/if_em.c

3281

(sc->hw.phy.type != e1000_phy_igp) ||

sys/dev/e1000/if_em.c

3282

sc->hw.mac.autoneg == 0 ||

sys/dev/e1000/if_em.c

3283

(sc->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)

sys/dev/e1000/if_em.c

3289

e1000_read_phy_reg(&sc->hw, PHY_1000T_STATUS, &phy_tmp);

sys/dev/e1000/if_em.c

3292

e1000_read_phy_reg(&sc->hw, PHY_1000T_STATUS, &phy_tmp);

sys/dev/e1000/if_em.c

3294

e1000_read_phy_reg(&sc->hw,

sys/dev/e1000/if_em.c

3298

e1000_write_phy_reg(&sc->hw,

sys/dev/e1000/if_em.c

3301

if(sc->hw.mac.autoneg &&

sys/dev/e1000/if_em.c

3302

!e1000_copper_link_autoneg(&sc->hw) &&

sys/dev/e1000/if_em.c

3303

!e1000_read_phy_reg(&sc->hw,

sys/dev/e1000/if_em.c

3307

e1000_write_phy_reg(&sc->hw,

sys/dev/e1000/if_em.c

3315

e1000_read_phy_reg(&sc->hw, PHY_1000T_CTRL, &phy_tmp);

sys/dev/e1000/if_em.c

3317

e1000_write_phy_reg(&sc->hw, PHY_1000T_CTRL, phy_tmp);

sys/dev/e1000/if_em.c

3318

if(sc->hw.mac.autoneg &&

sys/dev/e1000/if_em.c

3319

!e1000_copper_link_autoneg(&sc->hw) &&

sys/dev/e1000/if_em.c

3320

!e1000_read_phy_reg(&sc->hw, PHY_CONTROL, &phy_tmp)) {

sys/dev/e1000/if_em.c

3323

e1000_write_phy_reg(&sc->hw, PHY_CONTROL, phy_tmp);

sys/dev/e1000/if_em.c

3340

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

3348

if (hw->mac.type == e1000_i211)

sys/dev/e1000/if_em.c

3356

if (hw->mac.type > e1000_82580)

sys/dev/e1000/if_em.c

3357

E1000_WRITE_REG(hw, E1000_DMACR, 0);

sys/dev/e1000/if_em.c

3362

if (hw->mac.type > e1000_82580) {

sys/dev/e1000/if_em.c

3365

E1000_WRITE_REG(hw, E1000_DMACR, reg);

sys/dev/e1000/if_em.c

3371

E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);

sys/dev/e1000/if_em.c

3376

reg = E1000_READ_REG(hw, E1000_FCRTC);

sys/dev/e1000/if_em.c

3380

E1000_WRITE_REG(hw, E1000_FCRTC, reg);

sys/dev/e1000/if_em.c

3386

reg = E1000_READ_REG(hw, E1000_DMACR);

sys/dev/e1000/if_em.c

3400

if (hw->mac.type == e1000_i354) {

sys/dev/e1000/if_em.c

3401

int status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/if_em.c

3411

E1000_WRITE_REG(hw, E1000_DMACR, reg);

sys/dev/e1000/if_em.c

3413

E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);

sys/dev/e1000/if_em.c

3416

reg = E1000_READ_REG(hw, E1000_DMCTLX);

sys/dev/e1000/if_em.c

3417

if (hw->mac.type == e1000_i350)

sys/dev/e1000/if_em.c

3423

if (hw->mac.type == e1000_i354) {

sys/dev/e1000/if_em.c

3424

int status = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/if_em.c

3434

E1000_WRITE_REG(hw, E1000_DMCTLX, reg);

sys/dev/e1000/if_em.c

3437

E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_TXPBSIZE -

sys/dev/e1000/if_em.c

3441

reg = E1000_READ_REG(hw, E1000_PCIEMISC);

sys/dev/e1000/if_em.c

3443

E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);

sys/dev/e1000/if_em.c

3445

} else if (hw->mac.type == e1000_82580) {

sys/dev/e1000/if_em.c

3446

u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);

sys/dev/e1000/if_em.c

3447

E1000_WRITE_REG(hw, E1000_PCIEMISC,

sys/dev/e1000/if_em.c

3449

E1000_WRITE_REG(hw, E1000_DMACR, 0);

sys/dev/e1000/if_em.c

3466

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

3472

tctl = E1000_READ_REG(hw, E1000_TCTL);

sys/dev/e1000/if_em.c

3473

E1000_WRITE_REG(hw, E1000_TCTL, tctl | E1000_TCTL_EN);

sys/dev/e1000/if_em.c

3485

E1000_WRITE_REG(hw, E1000_TDT(0), txr->tx_cidx_processed);

sys/dev/e1000/if_em.c

3498

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

3501

rctl = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/if_em.c

3502

E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);

sys/dev/e1000/if_em.c

3503

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_em.c

3506

rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0));

sys/dev/e1000/if_em.c

3515

E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl);

sys/dev/e1000/if_em.c

3518

E1000_WRITE_REG(hw, E1000_RCTL, rctl | E1000_RCTL_EN);

sys/dev/e1000/if_em.c

3519

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_em.c

3521

E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);

sys/dev/e1000/if_em.c

3537

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

3543

fext_nvm11 = E1000_READ_REG(hw, E1000_FEXTNVM11);

sys/dev/e1000/if_em.c

3545

E1000_WRITE_REG(hw, E1000_FEXTNVM11, fext_nvm11);

sys/dev/e1000/if_em.c

3548

tdlen = E1000_READ_REG(hw, E1000_TDLEN(0));

sys/dev/e1000/if_em.c

3573

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

3584

if (!em_smart_pwr_down && (hw->mac.type == e1000_82571 ||

sys/dev/e1000/if_em.c

3585

hw->mac.type == e1000_82572)) {

sys/dev/e1000/if_em.c

3589

e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, &phy_tmp);

sys/dev/e1000/if_em.c

3591

e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, phy_tmp);

sys/dev/e1000/if_em.c

3599

switch (hw->mac.type) {

sys/dev/e1000/if_em.c

3603

if (hw->mac.max_frame_size > 8192)

sys/dev/e1000/if_em.c

3621

if (hw->mac.max_frame_size > 8192)

sys/dev/e1000/if_em.c

3632

if (hw->mac.max_frame_size > 4096)

sys/dev/e1000/if_em.c

3652

pba = E1000_READ_REG(hw, E1000_RXPBS);

sys/dev/e1000/if_em.c

3658

pba = E1000_READ_REG(hw, E1000_RXPBS);

sys/dev/e1000/if_em.c

3667

if (hw->mac.max_frame_size > 8192)

sys/dev/e1000/if_em.c

3674

if ((hw->mac.type == e1000_82575) && (if_getmtu(ifp) > ETHERMTU)) {

sys/dev/e1000/if_em.c

3676

pba = E1000_READ_REG(hw, E1000_PBA);

sys/dev/e1000/if_em.c

3679

min_tx = (hw->mac.max_frame_size +

sys/dev/e1000/if_em.c

3683

min_rx = hw->mac.max_frame_size;

sys/dev/e1000/if_em.c

3696

E1000_WRITE_REG(hw, E1000_PBA, pba);

sys/dev/e1000/if_em.c

3699

if (hw->mac.type < igb_mac_min)

sys/dev/e1000/if_em.c

3700

E1000_WRITE_REG(hw, E1000_PBA, pba);

sys/dev/e1000/if_em.c

3720

hw->fc.high_water = rx_buffer_size -

sys/dev/e1000/if_em.c

3721

roundup2(hw->mac.max_frame_size, 1024);

sys/dev/e1000/if_em.c

3722

hw->fc.low_water = hw->fc.high_water - 1500;

sys/dev/e1000/if_em.c

3725

hw->fc.requested_mode = sc->fc;

sys/dev/e1000/if_em.c

3727

hw->fc.requested_mode = e1000_fc_full;

sys/dev/e1000/if_em.c

3729

if (hw->mac.type == e1000_80003es2lan)

sys/dev/e1000/if_em.c

3730

hw->fc.pause_time = 0xFFFF;

sys/dev/e1000/if_em.c

3732

hw->fc.pause_time = EM_FC_PAUSE_TIME;

sys/dev/e1000/if_em.c

3734

hw->fc.send_xon = true;

sys/dev/e1000/if_em.c

3737

switch (hw->mac.type) {

sys/dev/e1000/if_em.c

3740

hw->fc.requested_mode = e1000_fc_rx_pause;

sys/dev/e1000/if_em.c

3741

hw->fc.pause_time = 0xFFFF; /* override */

sys/dev/e1000/if_em.c

3743

hw->fc.high_water = 0x3500;

sys/dev/e1000/if_em.c

3744

hw->fc.low_water = 0x1500;

sys/dev/e1000/if_em.c

3746

hw->fc.high_water = 0x5000;

sys/dev/e1000/if_em.c

3747

hw->fc.low_water = 0x3000;

sys/dev/e1000/if_em.c

3749

hw->fc.refresh_time = 0x1000;

sys/dev/e1000/if_em.c

3759

hw->fc.high_water = 0x5C20;

sys/dev/e1000/if_em.c

3760

hw->fc.low_water = 0x5048;

sys/dev/e1000/if_em.c

3761

hw->fc.pause_time = 0xFFFF;

sys/dev/e1000/if_em.c

3762

hw->fc.refresh_time = 0xFFFF;

sys/dev/e1000/if_em.c

3768

E1000_WRITE_REG(hw, E1000_PBA, pba);

sys/dev/e1000/if_em.c

3773

hw->fc.low_water = hw->fc.high_water - 8;

sys/dev/e1000/if_em.c

3781

hw->fc.low_water = hw->fc.high_water - 16;

sys/dev/e1000/if_em.c

3786

hw->fc.high_water = 0x2800;

sys/dev/e1000/if_em.c

3787

hw->fc.low_water = hw->fc.high_water - 8;

sys/dev/e1000/if_em.c

3792

if (hw->mac.type == e1000_80003es2lan)

sys/dev/e1000/if_em.c

3793

hw->fc.pause_time = 0xFFFF;

sys/dev/e1000/if_em.c

3798

if (sc->hw.mac.type >= e1000_pch_spt && sc->hw.mac.type < igb_mac_min)

sys/dev/e1000/if_em.c

3802

e1000_reset_hw(hw);

sys/dev/e1000/if_em.c

3803

if (hw->mac.type >= igb_mac_min) {

sys/dev/e1000/if_em.c

3804

E1000_WRITE_REG(hw, E1000_WUC, 0);

sys/dev/e1000/if_em.c

3806

E1000_WRITE_REG(hw, E1000_WUFC, 0);

sys/dev/e1000/if_em.c

3810

e1000_setup_init_funcs(hw, true);

sys/dev/e1000/if_em.c

3811

e1000_get_bus_info(hw);

sys/dev/e1000/if_em.c

3815

if (e1000_init_hw(hw) < 0) {

sys/dev/e1000/if_em.c

3819

if (hw->mac.type >= igb_mac_min)

sys/dev/e1000/if_em.c

3825

E1000_WRITE_REG(hw, E1000_VET, ETHERTYPE_VLAN);

sys/dev/e1000/if_em.c

3826

e1000_get_phy_info(hw);

sys/dev/e1000/if_em.c

3827

e1000_check_for_link(hw);

sys/dev/e1000/if_em.c

3841

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

3852

E1000_WRITE_REG(hw,E1000_RSSRK(i), rssrk);

sys/dev/e1000/if_em.c

3867

E1000_WRITE_REG(hw, E1000_RETA(i), reta);

sys/dev/e1000/if_em.c

3869

E1000_WRITE_REG(hw, E1000_MRQC, E1000_MRQC_RSS_ENABLE_2Q |

sys/dev/e1000/if_em.c

3880

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

3887

if (hw->mac.type == e1000_82575)

sys/dev/e1000/if_em.c

3935

E1000_WRITE_REG(hw, E1000_RETA(i >> 2), reta);

sys/dev/e1000/if_em.c

3951

E1000_WRITE_REG_ARRAY(hw, E1000_RSSRK(0), i, rss_key[i]);

sys/dev/e1000/if_em.c

3965

E1000_WRITE_REG(hw, E1000_MRQC, mrqc);

sys/dev/e1000/if_em.c

4000

if (sc->hw.phy.media_type == e1000_media_type_fiber ||

sys/dev/e1000/if_em.c

4001

sc->hw.phy.media_type == e1000_media_type_internal_serdes) {

sys/dev/e1000/if_em.c

4004

if (sc->hw.mac.type == e1000_82545)

sys/dev/e1000/if_em.c

4016

if (sc->hw.phy.type != e1000_phy_ife) {

sys/dev/e1000/if_em.c

4171

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4189

if (hw->mac.type >= igb_mac_min) {

sys/dev/e1000/if_em.c

4190

txdctl = E1000_READ_REG(hw, E1000_TXDCTL(qid));

sys/dev/e1000/if_em.c

4191

E1000_WRITE_REG(hw, E1000_TXDCTL(qid),

sys/dev/e1000/if_em.c

4193

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_em.c

4197

E1000_WRITE_REG(hw, E1000_TDLEN(qid),

sys/dev/e1000/if_em.c

4199

E1000_WRITE_REG(hw, E1000_TDBAH(qid), (u32)(bus_addr >> 32));

sys/dev/e1000/if_em.c

4200

E1000_WRITE_REG(hw, E1000_TDBAL(qid), (u32)bus_addr);

sys/dev/e1000/if_em.c

4202

E1000_WRITE_REG(hw, E1000_TDT(qid), 0);

sys/dev/e1000/if_em.c

4203

E1000_WRITE_REG(hw, E1000_TDH(qid), 0);

sys/dev/e1000/if_em.c

4206

E1000_READ_REG(hw, E1000_TDBAL(qid)),

sys/dev/e1000/if_em.c

4207

E1000_READ_REG(hw, E1000_TDLEN(qid)));

sys/dev/e1000/if_em.c

4213

if (hw->mac.type < igb_mac_min) {

sys/dev/e1000/if_em.c

4220

E1000_WRITE_REG(hw, E1000_TXDCTL(qid), txdctl);

sys/dev/e1000/if_em.c

4228

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4237

switch (hw->mac.type) {

sys/dev/e1000/if_em.c

4249

if (hw->phy.media_type == e1000_media_type_fiber ||

sys/dev/e1000/if_em.c

4250

hw->phy.media_type == e1000_media_type_internal_serdes)

sys/dev/e1000/if_em.c

4258

if (hw->mac.type < igb_mac_min) {

sys/dev/e1000/if_em.c

4259

E1000_WRITE_REG(hw, E1000_TIPG, tipg);

sys/dev/e1000/if_em.c

4260

E1000_WRITE_REG(hw, E1000_TIDV, sc->tx_int_delay.value);

sys/dev/e1000/if_em.c

4266

if (hw->mac.type >= e1000_82540 && hw->mac.type < igb_mac_min)

sys/dev/e1000/if_em.c

4267

E1000_WRITE_REG(hw, E1000_TADV, sc->tx_abs_int_delay.value);

sys/dev/e1000/if_em.c

4269

if (hw->mac.type == e1000_82571 || hw->mac.type == e1000_82572) {

sys/dev/e1000/if_em.c

4270

tarc = E1000_READ_REG(hw, E1000_TARC(0));

sys/dev/e1000/if_em.c

4272

E1000_WRITE_REG(hw, E1000_TARC(0), tarc);

sys/dev/e1000/if_em.c

4273

} else if (hw->mac.type == e1000_80003es2lan) {

sys/dev/e1000/if_em.c

4275

tarc = E1000_READ_REG(hw, E1000_TARC(0));

sys/dev/e1000/if_em.c

4277

E1000_WRITE_REG(hw, E1000_TARC(0), tarc);

sys/dev/e1000/if_em.c

4278

tarc = E1000_READ_REG(hw, E1000_TARC(1));

sys/dev/e1000/if_em.c

4280

E1000_WRITE_REG(hw, E1000_TARC(1), tarc);

sys/dev/e1000/if_em.c

4281

} else if (hw->mac.type == e1000_82574) {

sys/dev/e1000/if_em.c

4282

tarc = E1000_READ_REG(hw, E1000_TARC(0));

sys/dev/e1000/if_em.c

4286

E1000_WRITE_REG(hw, E1000_TARC(0), tarc);

sys/dev/e1000/if_em.c

4287

E1000_WRITE_REG(hw, E1000_TARC(1), tarc);

sys/dev/e1000/if_em.c

4289

E1000_WRITE_REG(hw, E1000_TARC(0), tarc);

sys/dev/e1000/if_em.c

4293

tctl = E1000_READ_REG(hw, E1000_TCTL);

sys/dev/e1000/if_em.c

4298

if (hw->mac.type >= e1000_82571 && hw->mac.type < igb_mac_min)

sys/dev/e1000/if_em.c

4302

E1000_WRITE_REG(hw, E1000_TCTL, tctl);

sys/dev/e1000/if_em.c

4305

if (hw->mac.type == e1000_pch_spt) {

sys/dev/e1000/if_em.c

4307

reg = E1000_READ_REG(hw, E1000_IOSFPC);

sys/dev/e1000/if_em.c

4309

E1000_WRITE_REG(hw, E1000_IOSFPC, reg);

sys/dev/e1000/if_em.c

4311

reg = E1000_READ_REG(hw, E1000_TARC(0));

sys/dev/e1000/if_em.c

4314

E1000_WRITE_REG(hw, E1000_TARC(0), reg);

sys/dev/e1000/if_em.c

4330

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4351

rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(qid));

sys/dev/e1000/if_em.c

4352

E1000_WRITE_REG(hw, E1000_RXDCTL(qid),

sys/dev/e1000/if_em.c

4354

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_em.c

4356

E1000_WRITE_REG(hw, E1000_RDLEN(qid),

sys/dev/e1000/if_em.c

4358

E1000_WRITE_REG(hw, E1000_RDBAH(qid),

sys/dev/e1000/if_em.c

4360

E1000_WRITE_REG(hw, E1000_RDBAL(qid), (uint32_t)bus_addr);

sys/dev/e1000/if_em.c

4361

E1000_WRITE_REG(hw, E1000_RDH(qid), 0);

sys/dev/e1000/if_em.c

4362

E1000_WRITE_REG(hw, E1000_RDT(qid), 0);

sys/dev/e1000/if_em.c

4363

E1000_WRITE_REG(hw, E1000_SRRCTL(qid), srrctl);

sys/dev/e1000/if_em.c

4370

E1000_WRITE_REG(hw, E1000_RXDCTL(qid), rxdctl);

sys/dev/e1000/if_em.c

4380

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4392

rctl = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/if_em.c

4394

if (hw->mac.type != e1000_82574 &&

sys/dev/e1000/if_em.c

4395

hw->mac.type != e1000_82583)

sys/dev/e1000/if_em.c

4396

E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);

sys/dev/e1000/if_em.c

4402

(hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);

sys/dev/e1000/if_em.c

4413

if (hw->mac.type < igb_mac_min) {

sys/dev/e1000/if_em.c

4414

if (hw->mac.type >= e1000_82540) {

sys/dev/e1000/if_em.c

4415

E1000_WRITE_REG(hw, E1000_RADV,

sys/dev/e1000/if_em.c

4419

E1000_WRITE_REG(hw, E1000_ITR,

sys/dev/e1000/if_em.c

4442

if (hw->mac.type == e1000_82573)

sys/dev/e1000/if_em.c

4443

E1000_WRITE_REG(hw, E1000_RDTR, 0x20);

sys/dev/e1000/if_em.c

4445

E1000_WRITE_REG(hw, E1000_RDTR,

sys/dev/e1000/if_em.c

4449

if (hw->mac.type >= em_mac_min) {

sys/dev/e1000/if_em.c

4452

rfctl = E1000_READ_REG(hw, E1000_RFCTL);

sys/dev/e1000/if_em.c

4459

if (hw->mac.type == e1000_82574) {

sys/dev/e1000/if_em.c

4461

E1000_WRITE_REG(hw, E1000_EITR_82574(i),

sys/dev/e1000/if_em.c

4466

E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);

sys/dev/e1000/if_em.c

4469

rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);

sys/dev/e1000/if_em.c

4472

if (hw->mac.type > e1000_82575)

sys/dev/e1000/if_em.c

4474

else if (hw->mac.type < em_mac_min &&

sys/dev/e1000/if_em.c

4479

if (hw->mac.type > e1000_82575)

sys/dev/e1000/if_em.c

4481

else if (hw->mac.type < em_mac_min)

sys/dev/e1000/if_em.c

4489

if (hw->mac.type >= igb_mac_min)

sys/dev/e1000/if_em.c

4494

E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);

sys/dev/e1000/if_em.c

4497

hw->mac.type < igb_mac_min && i < sc->rx_num_queues;

sys/dev/e1000/if_em.c

4507

E1000_WRITE_REG(hw, E1000_RDLEN(qid),

sys/dev/e1000/if_em.c

4510

E1000_WRITE_REG(hw, E1000_RDBAH(qid), (u32)(bus_addr >> 32));

sys/dev/e1000/if_em.c

4511

E1000_WRITE_REG(hw, E1000_RDBAL(qid), (u32)bus_addr);

sys/dev/e1000/if_em.c

4513

E1000_WRITE_REG(hw, E1000_RDH(qid), 0);

sys/dev/e1000/if_em.c

4514

E1000_WRITE_REG(hw, E1000_RDT(qid), 0);

sys/dev/e1000/if_em.c

4524

if ((hw->mac.type == e1000_ich9lan || hw->mac.type == e1000_pch2lan ||

sys/dev/e1000/if_em.c

4525

hw->mac.type == e1000_ich10lan) && if_getmtu(ifp) > ETHERMTU) {

sys/dev/e1000/if_em.c

4526

u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0));

sys/dev/e1000/if_em.c

4527

E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl | 3);

sys/dev/e1000/if_em.c

4528

} else if (hw->mac.type == e1000_82574) {

sys/dev/e1000/if_em.c

4530

u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(i));

sys/dev/e1000/if_em.c

4535

E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl);

sys/dev/e1000/if_em.c

4537

} else if (hw->mac.type >= igb_mac_min) {

sys/dev/e1000/if_em.c

4542

E1000_WRITE_REG(hw, E1000_RLPML,

sys/dev/e1000/if_em.c

4550

E1000_WRITE_REG(hw, E1000_RLPML, psize);

sys/dev/e1000/if_em.c

4565

} else if (hw->mac.type >= e1000_pch2lan) {

sys/dev/e1000/if_em.c

4567

e1000_lv_jumbo_workaround_ich8lan(hw, true);

sys/dev/e1000/if_em.c

4569

e1000_lv_jumbo_workaround_ich8lan(hw, false);

sys/dev/e1000/if_em.c

4576

if (hw->mac.type < igb_mac_min) {

sys/dev/e1000/if_em.c

4600

E1000_WRITE_REG(hw, E1000_RCTL, rctl);

sys/dev/e1000/if_em.c

4624

e1000_vfta_set_vf(&sc->hw, vtag, true) != E1000_SUCCESS) {

sys/dev/e1000/if_em.c

4651

e1000_vfta_set_vf(&sc->hw, vtag, false) != E1000_SUCCESS) {

sys/dev/e1000/if_em.c

4703

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4706

reg = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/if_em.c

4709

E1000_WRITE_REG(hw, E1000_RCTL, reg);

sys/dev/e1000/if_em.c

4715

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4718

reg = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/if_em.c

4720

E1000_WRITE_REG(hw, E1000_RCTL, reg);

sys/dev/e1000/if_em.c

4726

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4731

if (hw->mac.type < em_mac_min)

sys/dev/e1000/if_em.c

4736

e1000_write_vfta(hw, i, sc->shadow_vfta[i]);

sys/dev/e1000/if_em.c

4739

if (hw->mac.type < em_mac_min)

sys/dev/e1000/if_em.c

4747

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4762

e1000_rlpml_set_vf(hw, max_frame_size);

sys/dev/e1000/if_em.c

4772

error = e1000_vfta_set_vf(hw, vid, true);

sys/dev/e1000/if_em.c

4788

reg = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/if_em.c

4790

E1000_WRITE_REG(hw, E1000_CTRL, reg);

sys/dev/e1000/if_em.c

4792

reg = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/if_em.c

4794

E1000_WRITE_REG(hw, E1000_CTRL, reg);

sys/dev/e1000/if_em.c

4833

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4837

E1000_WRITE_REG(hw, EM_EIAC, sc->ims);

sys/dev/e1000/if_em.c

4841

E1000_WRITE_REG(hw, E1000_IMS, ims_mask);

sys/dev/e1000/if_em.c

4842

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_em.c

4849

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4852

E1000_WRITE_REG(hw, EM_EIAC, 0);

sys/dev/e1000/if_em.c

4853

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/if_em.c

4854

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_em.c

4861

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4870

reg = E1000_READ_REG(hw, E1000_EIAC);

sys/dev/e1000/if_em.c

4871

E1000_WRITE_REG(hw, E1000_EIAC, reg | mask);

sys/dev/e1000/if_em.c

4872

reg = E1000_READ_REG(hw, E1000_EIAM);

sys/dev/e1000/if_em.c

4873

E1000_WRITE_REG(hw, E1000_EIAM, reg | mask);

sys/dev/e1000/if_em.c

4874

E1000_WRITE_REG(hw, E1000_EIMS, mask);

sys/dev/e1000/if_em.c

4875

E1000_WRITE_REG(hw, E1000_IMS,

sys/dev/e1000/if_em.c

4878

E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK);

sys/dev/e1000/if_em.c

4879

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_em.c

4886

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

4898

reg = E1000_READ_REG(hw, E1000_EIAM);

sys/dev/e1000/if_em.c

4899

E1000_WRITE_REG(hw, E1000_EIAM, reg & ~mask);

sys/dev/e1000/if_em.c

4900

E1000_WRITE_REG(hw, E1000_EIMC, mask);

sys/dev/e1000/if_em.c

4901

reg = E1000_READ_REG(hw, E1000_EIAC);

sys/dev/e1000/if_em.c

4902

E1000_WRITE_REG(hw, E1000_EIAC, reg & ~mask);

sys/dev/e1000/if_em.c

4904

E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);

sys/dev/e1000/if_em.c

4905

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_em.c

4919

int manc2h = E1000_READ_REG(&sc->hw, E1000_MANC2H);

sys/dev/e1000/if_em.c

4920

int manc = E1000_READ_REG(&sc->hw, E1000_MANC);

sys/dev/e1000/if_em.c

4931

E1000_WRITE_REG(&sc->hw, E1000_MANC2H, manc2h);

sys/dev/e1000/if_em.c

4932

E1000_WRITE_REG(&sc->hw, E1000_MANC, manc);

sys/dev/e1000/if_em.c

4944

int manc = E1000_READ_REG(&sc->hw, E1000_MANC);

sys/dev/e1000/if_em.c

4950

E1000_WRITE_REG(&sc->hw, E1000_MANC, manc);

sys/dev/e1000/if_em.c

4968

if (sc->hw.mac.type == e1000_82573) {

sys/dev/e1000/if_em.c

4969

swsm = E1000_READ_REG(&sc->hw, E1000_SWSM);

sys/dev/e1000/if_em.c

4970

E1000_WRITE_REG(&sc->hw, E1000_SWSM,

sys/dev/e1000/if_em.c

4975

ctrl_ext = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT);

sys/dev/e1000/if_em.c

4976

E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT,

sys/dev/e1000/if_em.c

4994

if (sc->hw.mac.type == e1000_82573) {

sys/dev/e1000/if_em.c

4995

swsm = E1000_READ_REG(&sc->hw, E1000_SWSM);

sys/dev/e1000/if_em.c

4996

E1000_WRITE_REG(&sc->hw, E1000_SWSM,

sys/dev/e1000/if_em.c

5001

ctrl_ext = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT);

sys/dev/e1000/if_em.c

5002

E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT,

sys/dev/e1000/if_em.c

5073

sc->has_manage = e1000_enable_mng_pass_thru(&sc->hw);

sys/dev/e1000/if_em.c

5076

switch (sc->hw.mac.type) {

sys/dev/e1000/if_em.c

5081

e1000_read_nvm(&sc->hw,

sys/dev/e1000/if_em.c

5087

if (sc->hw.bus.func == 1) {

sys/dev/e1000/if_em.c

5088

e1000_read_nvm(&sc->hw,

sys/dev/e1000/if_em.c

5092

e1000_read_nvm(&sc->hw,

sys/dev/e1000/if_em.c

5102

if (sc->hw.bus.func == 1) {

sys/dev/e1000/if_em.c

5103

e1000_read_nvm(&sc->hw,

sys/dev/e1000/if_em.c

5107

e1000_read_nvm(&sc->hw,

sys/dev/e1000/if_em.c

5126

eeprom_data = E1000_READ_REG(&sc->hw, E1000_WUC);

sys/dev/e1000/if_em.c

5129

e1000_read_nvm(&sc->hw,

sys/dev/e1000/if_em.c

5149

if (E1000_READ_REG(&sc->hw, E1000_STATUS) &

sys/dev/e1000/if_em.c

5164

if (E1000_READ_REG(&sc->hw, E1000_STATUS) &

sys/dev/e1000/if_em.c

5212

rctl = E1000_READ_REG(&sc->hw, E1000_RCTL);

sys/dev/e1000/if_em.c

5214

E1000_WRITE_REG(&sc->hw, E1000_RCTL, rctl);

sys/dev/e1000/if_em.c

5221

ctrl = E1000_READ_REG(&sc->hw, E1000_CTRL);

sys/dev/e1000/if_em.c

5223

E1000_WRITE_REG(&sc->hw, E1000_CTRL, ctrl);

sys/dev/e1000/if_em.c

5226

if (sc->hw.phy.media_type == e1000_media_type_fiber ||

sys/dev/e1000/if_em.c

5227

sc->hw.phy.media_type == e1000_media_type_internal_serdes) {

sys/dev/e1000/if_em.c

5228

ctrl_ext = E1000_READ_REG(&sc->hw, E1000_CTRL_EXT);

sys/dev/e1000/if_em.c

5230

E1000_WRITE_REG(&sc->hw, E1000_CTRL_EXT, ctrl_ext);

sys/dev/e1000/if_em.c

5233

if ((sc->hw.mac.type == e1000_ich8lan) ||

sys/dev/e1000/if_em.c

5234

(sc->hw.mac.type == e1000_pchlan) ||

sys/dev/e1000/if_em.c

5235

(sc->hw.mac.type == e1000_ich9lan) ||

sys/dev/e1000/if_em.c

5236

(sc->hw.mac.type == e1000_ich10lan))

sys/dev/e1000/if_em.c

5237

e1000_suspend_workarounds_ich8lan(&sc->hw);

sys/dev/e1000/if_em.c

5239

if ( sc->hw.mac.type >= e1000_pchlan) {

sys/dev/e1000/if_em.c

5245

E1000_WRITE_REG(&sc->hw, E1000_WUC, E1000_WUC_PME_EN);

sys/dev/e1000/if_em.c

5246

E1000_WRITE_REG(&sc->hw, E1000_WUFC, sc->wol);

sys/dev/e1000/if_em.c

5249

if (sc->hw.phy.type == e1000_phy_igp_3)

sys/dev/e1000/if_em.c

5250

e1000_igp3_phy_powerdown_workaround_ich8lan(&sc->hw);

sys/dev/e1000/if_em.c

5266

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

5271

e1000_copy_rx_addrs_to_phy_ich8lan(hw);

sys/dev/e1000/if_em.c

5274

for (int i = 0; i < hw->mac.mta_reg_count; i++) {

sys/dev/e1000/if_em.c

5275

mreg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);

sys/dev/e1000/if_em.c

5276

e1000_write_phy_reg(hw, BM_MTA(i), (u16)(mreg & 0xFFFF));

sys/dev/e1000/if_em.c

5277

e1000_write_phy_reg(hw, BM_MTA(i) + 1,

sys/dev/e1000/if_em.c

5282

e1000_read_phy_reg(hw, BM_RCTL, &preg);

sys/dev/e1000/if_em.c

5283

mreg = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/if_em.c

5296

mreg = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/if_em.c

5299

e1000_write_phy_reg(hw, BM_RCTL, preg);

sys/dev/e1000/if_em.c

5302

E1000_WRITE_REG(hw, E1000_WUC,

sys/dev/e1000/if_em.c

5304

E1000_WRITE_REG(hw, E1000_WUFC, sc->wol);

sys/dev/e1000/if_em.c

5307

e1000_write_phy_reg(hw, BM_WUFC, sc->wol);

sys/dev/e1000/if_em.c

5308

e1000_write_phy_reg(hw, BM_WUC, E1000_WUC_PME_EN);

sys/dev/e1000/if_em.c

5311

ret = hw->phy.ops.acquire(hw);

sys/dev/e1000/if_em.c

5316

e1000_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,

sys/dev/e1000/if_em.c

5318

ret = e1000_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &preg);

sys/dev/e1000/if_em.c

5324

ret = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, preg);

sys/dev/e1000/if_em.c

5328

hw->phy.ops.release(hw);

sys/dev/e1000/if_em.c

5339

e1000_setup_led(&sc->hw);

sys/dev/e1000/if_em.c

5340

e1000_led_on(&sc->hw);

sys/dev/e1000/if_em.c

5342

e1000_led_off(&sc->hw);

sys/dev/e1000/if_em.c

5343

e1000_cleanup_led(&sc->hw);

sys/dev/e1000/if_em.c

5357

switch (sc->hw.mac.type) {

sys/dev/e1000/if_em.c

5397

if(sc->hw.phy.media_type == e1000_media_type_copper ||

sys/dev/e1000/if_em.c

5398

(E1000_READ_REG(&sc->hw, E1000_STATUS) & E1000_STATUS_LU)) {

sys/dev/e1000/if_em.c

5399

stats->symerrs += E1000_READ_REG(&sc->hw, E1000_SYMERRS);

sys/dev/e1000/if_em.c

5400

stats->sec += E1000_READ_REG(&sc->hw, E1000_SEC);

sys/dev/e1000/if_em.c

5402

stats->crcerrs += E1000_READ_REG(&sc->hw, E1000_CRCERRS);

sys/dev/e1000/if_em.c

5403

stats->mpc += E1000_READ_REG(&sc->hw, E1000_MPC);

sys/dev/e1000/if_em.c

5404

stats->scc += E1000_READ_REG(&sc->hw, E1000_SCC);

sys/dev/e1000/if_em.c

5405

stats->ecol += E1000_READ_REG(&sc->hw, E1000_ECOL);

sys/dev/e1000/if_em.c

5407

stats->mcc += E1000_READ_REG(&sc->hw, E1000_MCC);

sys/dev/e1000/if_em.c

5408

stats->latecol += E1000_READ_REG(&sc->hw, E1000_LATECOL);

sys/dev/e1000/if_em.c

5409

stats->colc += E1000_READ_REG(&sc->hw, E1000_COLC);

sys/dev/e1000/if_em.c

5410

stats->dc += E1000_READ_REG(&sc->hw, E1000_DC);

sys/dev/e1000/if_em.c

5411

stats->rlec += E1000_READ_REG(&sc->hw, E1000_RLEC);

sys/dev/e1000/if_em.c

5412

stats->xonrxc += E1000_READ_REG(&sc->hw, E1000_XONRXC);

sys/dev/e1000/if_em.c

5413

stats->xontxc += E1000_READ_REG(&sc->hw, E1000_XONTXC);

sys/dev/e1000/if_em.c

5414

stats->xoffrxc += E1000_READ_REG(&sc->hw, E1000_XOFFRXC);

sys/dev/e1000/if_em.c

5421

stats->xofftxc += E1000_READ_REG(&sc->hw, E1000_XOFFTXC);

sys/dev/e1000/if_em.c

5422

stats->fcruc += E1000_READ_REG(&sc->hw, E1000_FCRUC);

sys/dev/e1000/if_em.c

5423

stats->prc64 += E1000_READ_REG(&sc->hw, E1000_PRC64);

sys/dev/e1000/if_em.c

5424

stats->prc127 += E1000_READ_REG(&sc->hw, E1000_PRC127);

sys/dev/e1000/if_em.c

5425

stats->prc255 += E1000_READ_REG(&sc->hw, E1000_PRC255);

sys/dev/e1000/if_em.c

5426

stats->prc511 += E1000_READ_REG(&sc->hw, E1000_PRC511);

sys/dev/e1000/if_em.c

5427

stats->prc1023 += E1000_READ_REG(&sc->hw, E1000_PRC1023);

sys/dev/e1000/if_em.c

5428

stats->prc1522 += E1000_READ_REG(&sc->hw, E1000_PRC1522);

sys/dev/e1000/if_em.c

5429

stats->gprc += E1000_READ_REG(&sc->hw, E1000_GPRC);

sys/dev/e1000/if_em.c

5430

stats->bprc += E1000_READ_REG(&sc->hw, E1000_BPRC);

sys/dev/e1000/if_em.c

5431

stats->mprc += E1000_READ_REG(&sc->hw, E1000_MPRC);

sys/dev/e1000/if_em.c

5432

stats->gptc += E1000_READ_REG(&sc->hw, E1000_GPTC);

sys/dev/e1000/if_em.c

5437

stats->gorc += E1000_READ_REG(&sc->hw, E1000_GORCL) +

sys/dev/e1000/if_em.c

5438

((u64)E1000_READ_REG(&sc->hw, E1000_GORCH) << 32);

sys/dev/e1000/if_em.c

5439

stats->gotc += E1000_READ_REG(&sc->hw, E1000_GOTCL) +

sys/dev/e1000/if_em.c

5440

((u64)E1000_READ_REG(&sc->hw, E1000_GOTCH) << 32);

sys/dev/e1000/if_em.c

5442

stats->rnbc += E1000_READ_REG(&sc->hw, E1000_RNBC);

sys/dev/e1000/if_em.c

5443

stats->ruc += E1000_READ_REG(&sc->hw, E1000_RUC);

sys/dev/e1000/if_em.c

5444

stats->rfc += E1000_READ_REG(&sc->hw, E1000_RFC);

sys/dev/e1000/if_em.c

5445

stats->roc += E1000_READ_REG(&sc->hw, E1000_ROC);

sys/dev/e1000/if_em.c

5446

stats->rjc += E1000_READ_REG(&sc->hw, E1000_RJC);

sys/dev/e1000/if_em.c

5448

stats->mgprc += E1000_READ_REG(&sc->hw, E1000_MGTPRC);

sys/dev/e1000/if_em.c

5449

stats->mgpdc += E1000_READ_REG(&sc->hw, E1000_MGTPDC);

sys/dev/e1000/if_em.c

5450

stats->mgptc += E1000_READ_REG(&sc->hw, E1000_MGTPTC);

sys/dev/e1000/if_em.c

5452

stats->tor += E1000_READ_REG(&sc->hw, E1000_TORH);

sys/dev/e1000/if_em.c

5453

stats->tot += E1000_READ_REG(&sc->hw, E1000_TOTH);

sys/dev/e1000/if_em.c

5455

stats->tpr += E1000_READ_REG(&sc->hw, E1000_TPR);

sys/dev/e1000/if_em.c

5456

stats->tpt += E1000_READ_REG(&sc->hw, E1000_TPT);

sys/dev/e1000/if_em.c

5457

stats->ptc64 += E1000_READ_REG(&sc->hw, E1000_PTC64);

sys/dev/e1000/if_em.c

5458

stats->ptc127 += E1000_READ_REG(&sc->hw, E1000_PTC127);

sys/dev/e1000/if_em.c

5459

stats->ptc255 += E1000_READ_REG(&sc->hw, E1000_PTC255);

sys/dev/e1000/if_em.c

5460

stats->ptc511 += E1000_READ_REG(&sc->hw, E1000_PTC511);

sys/dev/e1000/if_em.c

5461

stats->ptc1023 += E1000_READ_REG(&sc->hw, E1000_PTC1023);

sys/dev/e1000/if_em.c

5462

stats->ptc1522 += E1000_READ_REG(&sc->hw, E1000_PTC1522);

sys/dev/e1000/if_em.c

5463

stats->mptc += E1000_READ_REG(&sc->hw, E1000_MPTC);

sys/dev/e1000/if_em.c

5464

stats->bptc += E1000_READ_REG(&sc->hw, E1000_BPTC);

sys/dev/e1000/if_em.c

5468

stats->iac += E1000_READ_REG(&sc->hw, E1000_IAC);

sys/dev/e1000/if_em.c

5469

stats->icrxptc += E1000_READ_REG(&sc->hw, E1000_ICRXPTC);

sys/dev/e1000/if_em.c

5470

stats->icrxatc += E1000_READ_REG(&sc->hw, E1000_ICRXATC);

sys/dev/e1000/if_em.c

5471

stats->ictxptc += E1000_READ_REG(&sc->hw, E1000_ICTXPTC);

sys/dev/e1000/if_em.c

5472

stats->ictxatc += E1000_READ_REG(&sc->hw, E1000_ICTXATC);

sys/dev/e1000/if_em.c

5473

stats->ictxqec += E1000_READ_REG(&sc->hw, E1000_ICTXQEC);

sys/dev/e1000/if_em.c

5474

stats->ictxqmtc += E1000_READ_REG(&sc->hw, E1000_ICTXQMTC);

sys/dev/e1000/if_em.c

5475

stats->icrxdmtc += E1000_READ_REG(&sc->hw, E1000_ICRXDMTC);

sys/dev/e1000/if_em.c

5476

stats->icrxoc += E1000_READ_REG(&sc->hw, E1000_ICRXOC);

sys/dev/e1000/if_em.c

5478

if (sc->hw.mac.type >= e1000_82543) {

sys/dev/e1000/if_em.c

5480

E1000_READ_REG(&sc->hw, E1000_ALGNERRC);

sys/dev/e1000/if_em.c

5482

E1000_READ_REG(&sc->hw, E1000_RXERRC);

sys/dev/e1000/if_em.c

5484

E1000_READ_REG(&sc->hw, E1000_TNCRS);

sys/dev/e1000/if_em.c

5486

E1000_READ_REG(&sc->hw, E1000_CEXTERR);

sys/dev/e1000/if_em.c

5488

E1000_READ_REG(&sc->hw, E1000_TSCTC);

sys/dev/e1000/if_em.c

5490

E1000_READ_REG(&sc->hw, E1000_TSCTFC);

sys/dev/e1000/if_em.c

5516

stats->last_##name = E1000_READ_REG(&sc->hw, reg); \

sys/dev/e1000/if_em.c

5527

if (sc->hw.mac.type == e1000_vfadapt)

sys/dev/e1000/if_em.c

5557

if (sc->hw.mac.type == e1000_vfadapt)

sys/dev/e1000/if_em.c

5641

val = E1000_READ_REG(&sc->hw, oidp->oid_arg2);

sys/dev/e1000/if_em.c

5660

val = E1000_READ_REG(&txr->sc->hw, reg);

sys/dev/e1000/if_em.c

5673

val = E1000_READ_REG(&rxr->sc->hw, reg);

sys/dev/e1000/if_em.c

5683

struct e1000_hw *hw;

sys/dev/e1000/if_em.c

5691

hw = &tque->sc->hw;

sys/dev/e1000/if_em.c

5692

if (hw->mac.type >= igb_mac_min)

sys/dev/e1000/if_em.c

5693

reg = E1000_READ_REG(hw, E1000_EITR(tque->msix));

sys/dev/e1000/if_em.c

5694

else if (hw->mac.type == e1000_82574 &&

sys/dev/e1000/if_em.c

5696

reg = E1000_READ_REG(hw, E1000_EITR_82574(tque->msix));

sys/dev/e1000/if_em.c

5698

reg = E1000_READ_REG(hw, E1000_ITR);

sys/dev/e1000/if_em.c

5701

hw = &rque->sc->hw;

sys/dev/e1000/if_em.c

5702

if (hw->mac.type >= igb_mac_min)

sys/dev/e1000/if_em.c

5703

reg = E1000_READ_REG(hw, E1000_EITR(rque->msix));

sys/dev/e1000/if_em.c

5704

else if (hw->mac.type == e1000_82574 &&

sys/dev/e1000/if_em.c

5706

reg = E1000_READ_REG(hw,

sys/dev/e1000/if_em.c

5709

reg = E1000_READ_REG(hw, E1000_ITR);

sys/dev/e1000/if_em.c

5712

if (hw->mac.type < igb_mac_min) {

sys/dev/e1000/if_em.c

5775

CTLFLAG_RD, &sc->hw.fc.high_water, 0,

sys/dev/e1000/if_em.c

5778

CTLFLAG_RD, &sc->hw.fc.low_water, 0,

sys/dev/e1000/if_em.c

5856

if (sc->hw.mac.type == e1000_vfadapt) {

sys/dev/e1000/if_em.c

6095

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

6104

ASSERT_CTX_LOCK_HELD(hw);

sys/dev/e1000/if_em.c

6108

if (hw->mac.type >= igb_mac_min) {

sys/dev/e1000/if_em.c

6112

e1000_get_fw_version(hw, fw_ver);

sys/dev/e1000/if_em.c

6118

if(e1000_read_nvm(hw, NVM_VERSION, 1, &eep)) {

sys/dev/e1000/if_em.c

6242

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

6253

ASSERT_CTX_LOCK_HELD(hw);

sys/dev/e1000/if_em.c

6260

if (e1000_read_nvm(hw, i, 1, &eeprom_data) !=

sys/dev/e1000/if_em.c

6291

regval = E1000_READ_OFFSET(&sc->hw, info->offset);

sys/dev/e1000/if_em.c

6306

E1000_WRITE_OFFSET(&sc->hw, info->offset, regval);

sys/dev/e1000/if_em.c

6335

val = E1000_READ_REG(&sc->hw, reg);

sys/dev/e1000/if_em.c

6343

E1000_WRITE_REG(&sc->hw, reg, val);

sys/dev/e1000/if_em.c

6389

sc->hw.fc.requested_mode = input;

sys/dev/e1000/if_em.c

6397

sc->hw.fc.current_mode = sc->hw.fc.requested_mode;

sys/dev/e1000/if_em.c

6398

e1000_force_mac_fc(&sc->hw);

sys/dev/e1000/if_em.c

6462

if (sc->hw.mac.type < igb_mac_min)

sys/dev/e1000/if_em.c

6463

value = sc->hw.dev_spec.ich8lan.eee_disable;

sys/dev/e1000/if_em.c

6465

value = sc->hw.dev_spec._82575.eee_disable;

sys/dev/e1000/if_em.c

6469

if (sc->hw.mac.type < igb_mac_min)

sys/dev/e1000/if_em.c

6470

sc->hw.dev_spec.ich8lan.eee_disable = (value != 0);

sys/dev/e1000/if_em.c

6472

sc->hw.dev_spec._82575.eee_disable = (value != 0);

sys/dev/e1000/if_em.c

6554

E1000_READ_REG(&sc->hw, E1000_TDH(txr->me)),

sys/dev/e1000/if_em.c

6555

E1000_READ_REG(&sc->hw, E1000_TDT(txr->me)));

sys/dev/e1000/if_em.c

6561

E1000_READ_REG(&sc->hw, E1000_RDH(rxr->me)),

sys/dev/e1000/if_em.c

6562

E1000_READ_REG(&sc->hw, E1000_RDT(rxr->me)));

sys/dev/e1000/if_em.c

6575

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

6579

e1000_read_nvm(hw, EM_NVM_PCIE_CTRL, 1, &edata);

sys/dev/e1000/if_em.c

6587

e1000_write_nvm(hw, EM_NVM_PCIE_CTRL, 1, &edata);

sys/dev/e1000/if_em.c

6588

e1000_update_nvm_checksum(hw);

sys/dev/e1000/if_em.c

893

struct e1000_hw *hw = &sc->hw;

sys/dev/e1000/if_em.c

926

regs_buff[0] = E1000_READ_REG(hw, E1000_CTRL);

sys/dev/e1000/if_em.c

927

regs_buff[1] = E1000_READ_REG(hw, E1000_STATUS);

sys/dev/e1000/if_em.c

928

regs_buff[2] = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/if_em.c

929

regs_buff[3] = E1000_READ_REG(hw, E1000_ICR);

sys/dev/e1000/if_em.c

930

regs_buff[4] = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/if_em.c

931

regs_buff[5] = E1000_READ_REG(hw, E1000_RDLEN(rxqid));

sys/dev/e1000/if_em.c

932

regs_buff[6] = E1000_READ_REG(hw, E1000_RDH(rxqid));

sys/dev/e1000/if_em.c

933

regs_buff[7] = E1000_READ_REG(hw, E1000_RDT(rxqid));

sys/dev/e1000/if_em.c

934

regs_buff[8] = E1000_READ_REG(hw, E1000_RXDCTL(rxqid));

sys/dev/e1000/if_em.c

935

regs_buff[9] = E1000_READ_REG(hw, E1000_RDBAL(rxqid));

sys/dev/e1000/if_em.c

936

regs_buff[10] = E1000_READ_REG(hw, E1000_RDBAH(rxqid));

sys/dev/e1000/if_em.c

937

regs_buff[11] = E1000_READ_REG(hw, E1000_TCTL);

sys/dev/e1000/if_em.c

938

regs_buff[12] = E1000_READ_REG(hw, E1000_TDBAL(txqid));

sys/dev/e1000/if_em.c

939

regs_buff[13] = E1000_READ_REG(hw, E1000_TDBAH(txqid));

sys/dev/e1000/if_em.c

940

regs_buff[14] = E1000_READ_REG(hw, E1000_TDLEN(txqid));

sys/dev/e1000/if_em.c

941

regs_buff[15] = E1000_READ_REG(hw, E1000_TDH(txqid));

sys/dev/e1000/if_em.c

942

regs_buff[16] = E1000_READ_REG(hw, E1000_TDT(txqid));

sys/dev/e1000/if_em.c

943

regs_buff[17] = E1000_READ_REG(hw, E1000_TXDCTL(txqid));

sys/dev/e1000/if_em.c

944

regs_buff[18] = E1000_READ_REG(hw, E1000_TDFH);

sys/dev/e1000/if_em.c

945

regs_buff[19] = E1000_READ_REG(hw, E1000_TDFT);

sys/dev/e1000/if_em.c

946

regs_buff[20] = E1000_READ_REG(hw, E1000_TDFHS);

sys/dev/e1000/if_em.c

947

regs_buff[21] = E1000_READ_REG(hw, E1000_TDFPC);

sys/dev/e1000/if_em.h

300

#define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \

sys/dev/e1000/if_em.h

301

((hw->mac.type <= e1000_82576) ? 16 : 8))

sys/dev/e1000/if_em.h

303

#define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \

sys/dev/e1000/if_em.h

306

#define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8)

sys/dev/e1000/if_em.h

308

#define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \

sys/dev/e1000/if_em.h

391

u32 new = E1000_READ_REG(&sc->hw, reg); \

sys/dev/e1000/if_em.h

529

struct e1000_hw hw;

sys/dev/e1000/if_igb_iov.c

1040

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

1045

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

1046

switch (hw->mac.type) {

sys/dev/e1000/if_igb_iov.c

1065

KASSERT(qid[i] < (hw->mac.type == e1000_82576 ?

sys/dev/e1000/if_igb_iov.c

1083

E1000_WRITE_REG(hw, E1000_RXDCTL(qid[i]), 0);

sys/dev/e1000/if_igb_iov.c

1084

E1000_WRITE_REG(hw, E1000_TXDCTL(qid[i]), 0);

sys/dev/e1000/if_igb_iov.c

1086

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igb_iov.c

1089

rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(qid[i]));

sys/dev/e1000/if_igb_iov.c

1090

txdctl = E1000_READ_REG(hw, E1000_TXDCTL(qid[i]));

sys/dev/e1000/if_igb_iov.c

1116

E1000_WRITE_REG(hw, E1000_SRRCTL(qid[i]), 0);

sys/dev/e1000/if_igb_iov.c

1117

E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(qid[i]), 0);

sys/dev/e1000/if_igb_iov.c

1118

E1000_WRITE_REG(hw, E1000_TDWBAL(qid[i]), 0);

sys/dev/e1000/if_igb_iov.c

1119

E1000_WRITE_REG(hw, E1000_TDWBAH(qid[i]), 0);

sys/dev/e1000/if_igb_iov.c

1120

E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(qid[i]), 0);

sys/dev/e1000/if_igb_iov.c

1122

E1000_WRITE_REG(hw, E1000_PSRTYPE(vf->pool), 0);

sys/dev/e1000/if_igb_iov.c

1123

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igb_iov.c

1131

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

1135

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

1138

reg = E1000_READ_REG(hw, E1000_VFTE);

sys/dev/e1000/if_igb_iov.c

1139

E1000_WRITE_REG(hw, E1000_VFTE, reg & ~(1U << vf->pool));

sys/dev/e1000/if_igb_iov.c

1140

reg = E1000_READ_REG(hw, E1000_VFRE);

sys/dev/e1000/if_igb_iov.c

1141

E1000_WRITE_REG(hw, E1000_VFRE, reg & ~(1U << vf->pool));

sys/dev/e1000/if_igb_iov.c

1143

E1000_WRITE_REG(hw, E1000_VTCTRL(vf->pool),

sys/dev/e1000/if_igb_iov.c

1146

E1000_WRITE_REG(hw, E1000_VMVIR(vf->pool), 0);

sys/dev/e1000/if_igb_iov.c

1187

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

1190

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

1193

e1000_write_mbx(hw, msg, 1, vf->pool);

sys/dev/e1000/if_igb_iov.c

1199

reg = E1000_READ_REG(hw, E1000_VFTE);

sys/dev/e1000/if_igb_iov.c

1200

E1000_WRITE_REG(hw, E1000_VFTE, reg | (1U << vf->pool));

sys/dev/e1000/if_igb_iov.c

1201

reg = E1000_READ_REG(hw, E1000_VFRE);

sys/dev/e1000/if_igb_iov.c

1202

E1000_WRITE_REG(hw, E1000_VFRE, reg | (1U << vf->pool));

sys/dev/e1000/if_igb_iov.c

1208

if (hw->mac.type == e1000_82576)

sys/dev/e1000/if_igb_iov.c

1215

e1000_write_mbx(hw, msg, 3, vf->pool);

sys/dev/e1000/if_igb_iov.c

1371

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

1375

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

1377

if (e1000_read_mbx(hw, msg, nitems(msg), vf->pool, false) != 0)

sys/dev/e1000/if_igb_iov.c

1384

e1000_unlock_mbx(hw, vf->pool);

sys/dev/e1000/if_igb_iov.c

1394

e1000_write_mbx(hw, msg, 1, vf->pool);

sys/dev/e1000/if_igb_iov.c

1396

e1000_unlock_mbx(hw, vf->pool);

sys/dev/e1000/if_igb_iov.c

1430

e1000_write_mbx(hw, msg, 1, vf->pool);

sys/dev/e1000/if_igb_iov.c

1467

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

1476

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

1483

if (e1000_check_for_rst(hw, vf->pool) == 0) {

sys/dev/e1000/if_igb_iov.c

1492

e1000_check_for_msg(hw, vf->pool) == 0) {

sys/dev/e1000/if_igb_iov.c

1501

if (e1000_check_for_ack(hw, vf->pool) == 0 &&

sys/dev/e1000/if_igb_iov.c

1504

e1000_write_mbx(hw, &msg, 1, vf->pool);

sys/dev/e1000/if_igb_iov.c

1530

if (e1000_write_mbx(&sc->hw, &msg, 1, vf->pool) != 0) {

sys/dev/e1000/if_igb_iov.c

1566

if (sc->hw.mac.type == e1000_i350) {

sys/dev/e1000/if_igb_iov.c

1582

mdfb = E1000_READ_REG(&sc->hw, E1000_MDFB);

sys/dev/e1000/if_igb_iov.c

1597

lvmmc = E1000_READ_REG(&sc->hw, E1000_LVMMC);

sys/dev/e1000/if_igb_iov.c

1614

wvbr = E1000_READ_REG(&sc->hw, E1000_WVBR);

sys/dev/e1000/if_igb_iov.c

1641

if (sc->hw.mac.type == e1000_i350 && mdfb_valid &&

sys/dev/e1000/if_igb_iov.c

1664

if (sc->hw.mac.type == e1000_i350 && mdfb_valid &&

sys/dev/e1000/if_igb_iov.c

1668

(sc->hw.mac.type != e1000_i350 ||

sys/dev/e1000/if_igb_iov.c

1670

if (sc->hw.mac.type == e1000_i350)

sys/dev/e1000/if_igb_iov.c

1681

if (sc->hw.mac.type == e1000_i350 && handled != 0) {

sys/dev/e1000/if_igb_iov.c

1690

E1000_WRITE_REG(&sc->hw, E1000_MDFB, handled);

sys/dev/e1000/if_igb_iov.c

1691

E1000_WRITE_FLUSH(&sc->hw);

sys/dev/e1000/if_igb_iov.c

1699

readback = E1000_READ_REG(&sc->hw, E1000_MDFB);

sys/dev/e1000/if_igb_iov.c

1722

cause = E1000_READ_REG(&sc->hw, E1000_LVMMC);

sys/dev/e1000/if_igb_iov.c

1725

if (sc->hw.mac.type == e1000_i350 &&

sys/dev/e1000/if_igb_iov.c

1759

e1000_write_mbx(&sc->hw, &msg, 1, vf->pool);

sys/dev/e1000/if_igb_iov.c

1766

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

1774

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

1778

E1000_WRITE_REG(hw, E1000_MRQC, E1000_MRQC_ENABLE_VMDQ);

sys/dev/e1000/if_igb_iov.c

1780

vt_ctl = E1000_READ_REG(hw, E1000_VT_CTL);

sys/dev/e1000/if_igb_iov.c

1785

E1000_WRITE_REG(hw, E1000_VT_CTL, vt_ctl);

sys/dev/e1000/if_igb_iov.c

1788

E1000_WRITE_REG(hw, E1000_VFRE, mask);

sys/dev/e1000/if_igb_iov.c

1789

E1000_WRITE_REG(hw, E1000_VFTE, mask);

sys/dev/e1000/if_igb_iov.c

1791

E1000_WRITE_REG(hw, E1000_QDE,

sys/dev/e1000/if_igb_iov.c

1792

hw->mac.type == e1000_i350 ? IGB_I350_QUEUE_MASK : ALL_QUEUES);

sys/dev/e1000/if_igb_iov.c

1793

e1000_vmdq_set_loopback_pf(hw, true);

sys/dev/e1000/if_igb_iov.c

1794

dtxctl = E1000_READ_REG(hw, E1000_DTXCTL);

sys/dev/e1000/if_igb_iov.c

1796

if (hw->mac.type == e1000_82576) {

sys/dev/e1000/if_igb_iov.c

1799

rplolr = E1000_READ_REG(hw, E1000_RPLOLR);

sys/dev/e1000/if_igb_iov.c

1801

E1000_WRITE_REG(hw, E1000_RPLOLR, rplolr);

sys/dev/e1000/if_igb_iov.c

1815

E1000_WRITE_REG(hw, E1000_DTXCTL, dtxctl);

sys/dev/e1000/if_igb_iov.c

1817

igb_iov_map_rar(sc, 0, hw->mac.addr, sc->pool);

sys/dev/e1000/if_igb_iov.c

1838

rctl = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/if_igb_iov.c

1839

E1000_WRITE_REG(hw, E1000_RCTL, rctl | E1000_RCTL_VFE);

sys/dev/e1000/if_igb_iov.c

1840

E1000_WRITE_REG(hw, E1000_MBVFIMR, igb_iov_active_mask(sc));

sys/dev/e1000/if_igb_iov.c

1841

if (hw->mac.type == e1000_i350)

sys/dev/e1000/if_igb_iov.c

1842

E1000_WRITE_REG(hw, E1000_DMACR, 0);

sys/dev/e1000/if_igb_iov.c

1844

ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);

sys/dev/e1000/if_igb_iov.c

1845

E1000_WRITE_REG(hw, E1000_CTRL_EXT,

sys/dev/e1000/if_igb_iov.c

1847

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igb_iov.c

1893

sc->hw.mac.rar_entry_count - num_vfs - 1;

sys/dev/e1000/if_igb_iov.c

1903

e1000_init_mbx_params_pf(&sc->hw);

sys/dev/e1000/if_igb_iov.c

1912

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

1920

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

1925

E1000_WRITE_REG(hw, E1000_MBVFIMR, 0);

sys/dev/e1000/if_igb_iov.c

1927

E1000_WRITE_REG(hw, E1000_VFRE, mask);

sys/dev/e1000/if_igb_iov.c

1928

E1000_WRITE_REG(hw, E1000_VFTE, mask);

sys/dev/e1000/if_igb_iov.c

1942

if (hw->mac.type == e1000_82576) {

sys/dev/e1000/if_igb_iov.c

1944

E1000_WRITE_REG(hw, E1000_IOVCTL,

sys/dev/e1000/if_igb_iov.c

1946

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igb_iov.c

1954

E1000_WRITE_REG(hw, E1000_VT_CTL, 0);

sys/dev/e1000/if_igb_iov.c

1955

e1000_vmdq_set_loopback_pf(hw, false);

sys/dev/e1000/if_igb_iov.c

1956

e1000_vmdq_set_anti_spoofing_pf(hw, false, 0);

sys/dev/e1000/if_igb_iov.c

1958

E1000_WRITE_REG(hw, E1000_VLVF(i), 0);

sys/dev/e1000/if_igb_iov.c

1965

rah = E1000_READ_REG(hw, E1000_RAH(0));

sys/dev/e1000/if_igb_iov.c

1967

E1000_WRITE_REG(hw, E1000_RAH(0), rah);

sys/dev/e1000/if_igb_iov.c

1994

if (memcmp(sc->hw.mac.addr, mac, ETHER_ADDR_LEN) == 0)

sys/dev/e1000/if_igb_iov.c

2042

vf->rar_index = sc->hw.mac.rar_entry_count - (vfnum + 1);

sys/dev/e1000/if_igb_iov.c

2072

E1000_WRITE_REG(&sc->hw, E1000_MBVFIMR, igb_iov_active_mask(sc));

sys/dev/e1000/if_igb_iov.c

236

switch (sc->hw.mac.type) {

sys/dev/e1000/if_igb_iov.c

312

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

315

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

316

e1000_rar_set(hw, __DECONST(u8 *, mac), rar);

sys/dev/e1000/if_igb_iov.c

317

rah = E1000_READ_REG(hw, E1000_RAH(rar));

sys/dev/e1000/if_igb_iov.c

320

E1000_WRITE_REG(hw, E1000_RAH(rar), rah);

sys/dev/e1000/if_igb_iov.c

328

e1000_rar_set(&sc->hw, zero, rar);

sys/dev/e1000/if_igb_iov.c

350

return (sc->hw.mac.type == e1000_82576 ?

sys/dev/e1000/if_igb_iov.c

357

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

360

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

362

value = E1000_READ_REG(hw, reg);

sys/dev/e1000/if_igb_iov.c

370

E1000_WRITE_REG(hw, reg, value);

sys/dev/e1000/if_igb_iov.c

376

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

380

if (!igb_iov_enabled(sc) || sc->hw.mac.type != e1000_82576)

sys/dev/e1000/if_igb_iov.c

383

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

384

enable = (E1000_READ_REG(hw, E1000_VMOLR(sc->pool)) &

sys/dev/e1000/if_igb_iov.c

395

E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i,

sys/dev/e1000/if_igb_iov.c

403

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

406

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

407

if (hw->mac.type != e1000_i350)

sys/dev/e1000/if_igb_iov.c

410

dvmolr = E1000_READ_REG(hw, E1000_DVMOLR(pool));

sys/dev/e1000/if_igb_iov.c

418

(E1000_READ_REG(hw, E1000_RCTL) & E1000_RCTL_SECRC) != 0)

sys/dev/e1000/if_igb_iov.c

420

E1000_WRITE_REG(hw, E1000_DVMOLR(pool), dvmolr);

sys/dev/e1000/if_igb_iov.c

426

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

429

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

434

vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf->pool));

sys/dev/e1000/if_igb_iov.c

446

if (hw->mac.type == e1000_82576)

sys/dev/e1000/if_igb_iov.c

450

if (hw->mac.type == e1000_82576)

sys/dev/e1000/if_igb_iov.c

462

if (hw->mac.type == e1000_82576 && vf->vlan_count != 0)

sys/dev/e1000/if_igb_iov.c

470

E1000_WRITE_REG(hw, E1000_VMOLR(vf->pool), vmolr);

sys/dev/e1000/if_igb_iov.c

471

E1000_WRITE_REG(hw, E1000_VMVIR(vf->pool), vmvir);

sys/dev/e1000/if_igb_iov.c

479

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

485

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

489

strip_vlan = (E1000_READ_REG(hw, E1000_CTRL) & E1000_CTRL_VME) != 0;

sys/dev/e1000/if_igb_iov.c

490

old_vmolr = E1000_READ_REG(hw, E1000_VMOLR(sc->pool));

sys/dev/e1000/if_igb_iov.c

494

if (hw->mac.type == e1000_82576) {

sys/dev/e1000/if_igb_iov.c

502

if (hw->mac.type == e1000_82576)

sys/dev/e1000/if_igb_iov.c

513

E1000_WRITE_REG(hw, E1000_VMOLR(sc->pool), vmolr);

sys/dev/e1000/if_igb_iov.c

562

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

567

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

595

if (e1000_write_mbx(hw, &msg, 1, i) != 0) {

sys/dev/e1000/if_igb_iov.c

609

e1000_check_for_ack(hw, i) == 0)

sys/dev/e1000/if_igb_iov.c

624

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

628

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

630

if (hw->mac.type == e1000_i350)

sys/dev/e1000/if_igb_iov.c

638

E1000_WRITE_REG(hw, E1000_VFRE, mask);

sys/dev/e1000/if_igb_iov.c

639

E1000_WRITE_REG(hw, E1000_VFTE, mask);

sys/dev/e1000/if_igb_iov.c

640

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igb_iov.c

655

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

666

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

673

hash_value = e1000_hash_mc_addr(hw,

sys/dev/e1000/if_igb_iov.c

676

(hw->mac.mta_reg_count - 1);

sys/dev/e1000/if_igb_iov.c

686

mta[(hash >> 5) & (hw->mac.mta_reg_count - 1)] |=

sys/dev/e1000/if_igb_iov.c

692

for (i = hw->mac.mta_reg_count - 1; i >= 0; i--) {

sys/dev/e1000/if_igb_iov.c

693

if (sc->iov_mta_valid && hw->mac.mta_shadow[i] == mta[i])

sys/dev/e1000/if_igb_iov.c

695

hw->mac.mta_shadow[i] = mta[i];

sys/dev/e1000/if_igb_iov.c

696

E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, mta[i]);

sys/dev/e1000/if_igb_iov.c

700

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igb_iov.c

741

struct e1000_hw *hw;

sys/dev/e1000/if_igb_iov.c

754

hw = &sc->hw;

sys/dev/e1000/if_igb_iov.c

755

rctl = E1000_READ_REG(hw, E1000_RCTL);

sys/dev/e1000/if_igb_iov.c

758

E1000_WRITE_REG(hw, E1000_RCTL, rctl);

sys/dev/e1000/if_igb_iov.c

762

old_vlvf[i] = E1000_READ_REG(hw, E1000_VLVF(i));

sys/dev/e1000/if_igb_iov.c

765

pf_overflow = !pf_vlan_promisc && hw->mac.type == e1000_i350 &&

sys/dev/e1000/if_igb_iov.c

793

if (hw->mac.type == e1000_82576 &&

sys/dev/e1000/if_igb_iov.c

825

if (hw->mac.type == e1000_82576 &&

sys/dev/e1000/if_igb_iov.c

845

vmolr = E1000_READ_REG(hw, E1000_VMOLR(sc->pool));

sys/dev/e1000/if_igb_iov.c

847

if (hw->mac.type == e1000_i350 &&

sys/dev/e1000/if_igb_iov.c

850

E1000_WRITE_REG(hw, E1000_VMOLR(sc->pool), vmolr);

sys/dev/e1000/if_igb_iov.c

858

force_vfta = hw->mac.type == e1000_i350 &&

sys/dev/e1000/if_igb_iov.c

869

if (hw->mac.type == e1000_i350)

sys/dev/e1000/if_igb_iov.c

873

E1000_READ_REG_ARRAY(hw, E1000_VFTA, i);

sys/dev/e1000/if_igb_iov.c

878

e1000_write_vfta(hw, i, effective_vfta[i]);

sys/dev/e1000/if_igb_iov.c

883

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igb_iov.c

889

E1000_WRITE_REG(hw, E1000_VLVF(i), vlvf[i]);

sys/dev/e1000/if_igb_iov.c

893

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igb_iov.c

899

e1000_write_vfta(hw, i, vfta[i]);

sys/dev/e1000/if_igb_iov.c

903

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igbv.c

227

e1000_vfta_set_vf(&sc->hw, vid, true) ==

sys/dev/e1000/if_igbv.c

297

struct e1000_hw *hw;

sys/dev/e1000/if_igbv.c

302

hw = &sc->hw;

sys/dev/e1000/if_igbv.c

323

if (e1000_check_for_link(hw) != E1000_SUCCESS &&

sys/dev/e1000/if_igbv.c

329

link_check = !hw->mac.get_link_status;

sys/dev/e1000/if_igbv.c

334

e1000_get_speed_and_duplex(hw, &sc->link_speed,

sys/dev/e1000/if_igbv.c

380

head = E1000_READ_REG(&sc->hw, E1000_TDH(txr->me));

sys/dev/e1000/if_igbv.c

381

tail = E1000_READ_REG(&sc->hw, E1000_TDT(txr->me));

sys/dev/e1000/if_igbv.c

391

struct e1000_hw *hw;

sys/dev/e1000/if_igbv.c

395

hw = &sc->hw;

sys/dev/e1000/if_igbv.c

396

switch (hw->mac.type) {

sys/dev/e1000/if_igbv.c

419

E1000_WRITE_REG(hw, E1000_RXDCTL(i), 0);

sys/dev/e1000/if_igbv.c

420

E1000_WRITE_REG(hw, E1000_TXDCTL(i), 0);

sys/dev/e1000/if_igbv.c

422

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igbv.c

425

rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(i));

sys/dev/e1000/if_igbv.c

426

txdctl = E1000_READ_REG(hw, E1000_TXDCTL(i));

sys/dev/e1000/if_igbv.c

452

E1000_WRITE_REG(hw, E1000_SRRCTL(i), 0);

sys/dev/e1000/if_igbv.c

453

E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(i), 0);

sys/dev/e1000/if_igbv.c

454

E1000_WRITE_REG(hw, E1000_TDWBAL(i), 0);

sys/dev/e1000/if_igbv.c

455

E1000_WRITE_REG(hw, E1000_TDWBAH(i), 0);

sys/dev/e1000/if_igbv.c

456

E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(i), 0);

sys/dev/e1000/if_igbv.c

458

E1000_WRITE_REG(hw, E1000_VFPSRTYPE, 0);

sys/dev/e1000/if_igbv.c

459

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igbv.c

467

struct e1000_hw *hw;

sys/dev/e1000/if_igbv.c

471

hw = &sc->hw;

sys/dev/e1000/if_igbv.c

479

hw->fc = (struct e1000_fc_info){

sys/dev/e1000/if_igbv.c

484

error = e1000_reset_hw(hw);

sys/dev/e1000/if_igbv.c

487

e1000_check_for_link(hw);

sys/dev/e1000/if_igbv.c

492

e1000_check_for_link(hw);

sys/dev/e1000/if_igbv.c

499

if (e1000_init_hw(hw) < 0) {

sys/dev/e1000/if_igbv.c

503

e1000_check_for_link(hw);

sys/dev/e1000/if_igbv.c

529

struct e1000_hw *hw;

sys/dev/e1000/if_igbv.c

533

hw = &sc->hw;

sys/dev/e1000/if_igbv.c

539

E1000_WRITE_REG(hw, E1000_EIAC, mask);

sys/dev/e1000/if_igbv.c

540

E1000_WRITE_REG(hw, E1000_EIAM, mask);

sys/dev/e1000/if_igbv.c

541

E1000_WRITE_REG(hw, E1000_EIMS, mask);

sys/dev/e1000/if_igbv.c

542

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igbv.c

549

struct e1000_hw *hw;

sys/dev/e1000/if_igbv.c

552

hw = &sc->hw;

sys/dev/e1000/if_igbv.c

555

E1000_WRITE_REG(hw, E1000_EIMC, 0xffffffff);

sys/dev/e1000/if_igbv.c

556

E1000_WRITE_REG(hw, E1000_EIAC, 0);

sys/dev/e1000/if_igbv.c

557

E1000_WRITE_FLUSH(hw);

sys/dev/e1000/if_igbv.c

564

struct e1000_hw *hw;

sys/dev/e1000/if_igbv.c

569

hw = &sc->hw;

sys/dev/e1000/if_igbv.c

584

E1000_READ_REG(hw, E1000_CTRL));

sys/dev/e1000/if_igbv.c

586

E1000_READ_REG(hw, E1000_STATUS));

sys/dev/e1000/if_igbv.c

588

E1000_READ_REG(hw, E1000_RDLEN(0)));

sys/dev/e1000/if_igbv.c

590

E1000_READ_REG(hw, E1000_RDH(0)));

sys/dev/e1000/if_igbv.c

592

E1000_READ_REG(hw, E1000_RDT(0)));

sys/dev/e1000/if_igbv.c

594

E1000_READ_REG(hw, E1000_TDLEN(0)));

sys/dev/e1000/if_igbv.c

596

E1000_READ_REG(hw, E1000_TDH(0)));

sys/dev/e1000/if_igbv.c

598

E1000_READ_REG(hw, E1000_TDT(0)));

sys/dev/e1000/if_igbv.c

613

if (memcmp(addr, list->sc->hw.mac.addr, ETHER_ADDR_LEN) == 0)

sys/dev/e1000/if_igbv.c

642

if (e1000_set_uc_addr_vf(&sc->hw, E1000_VF_MAC_FILTER_CLR,

sys/dev/e1000/if_igbv.c

643

sc->hw.mac.addr) != E1000_SUCCESS) {

sys/dev/e1000/if_igbv.c

653

if (e1000_set_uc_addr_vf(&sc->hw, E1000_VF_MAC_FILTER_ADD,

sys/dev/e1000/if_igbv.c

669

if (!em_is_valid_ether_addr(sc->hw.mac.addr))

sys/dev/e1000/if_igbv.c

672

if (memcmp(lladdr, sc->hw.mac.addr, ETHER_ADDR_LEN) == 0)

sys/dev/e1000/if_igbv.c

677

sc->hw.mac.addr, ":");

sys/dev/e1000/if_igbv.c

683

memcpy(lladdr, sc->hw.mac.addr, ETHER_ADDR_LEN);

sys/dev/e1000/igb_txrx.c

161

if (sc->hw.mac.type == e1000_82575)

sys/dev/e1000/igb_txrx.c

250

if (sc->hw.mac.type == e1000_82575)

sys/dev/e1000/igb_txrx.c

293

if (sc->hw.mac.type == e1000_82575)

sys/dev/e1000/igb_txrx.c

353

E1000_WRITE_REG(&sc->hw, E1000_TDT(txr->me), pidx);

sys/dev/e1000/igb_txrx.c

445

E1000_WRITE_REG(&sc->hw, E1000_RDT(rxr->me), pidx);

sys/dev/e1000/igb_txrx.c

553

if (((sc->hw.mac.type == e1000_i350) ||

sys/dev/e1000/igb_txrx.c

554

(sc->hw.mac.type == e1000_i354) ||

sys/dev/e1000/igb_txrx.c

555

(sc->hw.mac.type == e1000_vfadapt_i350)) &&

sys/dev/e1000/igb_txrx.c

94

if (sc->hw.mac.type != e1000_vfadapt &&

sys/dev/e1000/igb_txrx.c

95

sc->hw.mac.type != e1000_vfadapt_i350)

sys/dev/firewire/firewire.c

62

struct crom_chunk hw;

sys/dev/firewire/firewire.c

743

crom_add_simple_text(src, root, &buf->hw, prison0.pr_hostname);

sys/dev/hid/appleir.c

349

const struct hid_device_info *hw;

sys/dev/hid/appleir.c

353

hw = hid_get_device_info(dev);

sys/dev/hid/appleir.c

364

evdev_set_id(sc->sc_evdev, hw->idBus, hw->idVendor, hw->idProduct,

sys/dev/hid/appleir.c

365

hw->idVersion);

sys/dev/hid/appleir.c

366

evdev_set_serial(sc->sc_evdev, hw->serial);

sys/dev/hid/bcm5974.c

648

const struct hid_device_info *hw = hid_get_device_info(dev);

sys/dev/hid/bcm5974.c

654

if (hw->rdescsize == sizeof(rdesc) &&

sys/dev/hid/bcm5974.c

677

"%u, not extracting model\n", hw->rdescsize, model_byte);

sys/dev/hid/bcm5974.c

720

const struct hid_device_info *hw = hid_get_device_info(dev);

sys/dev/hid/bcm5974.c

737

evdev_set_id(sc->sc_evdev, hw->idBus, hw->idVendor, hw->idProduct,

sys/dev/hid/bcm5974.c

738

hw->idVersion);

sys/dev/hid/bcm5974.c

739

evdev_set_serial(sc->sc_evdev, hw->serial);

sys/dev/hid/hgame.c

180

const struct hid_device_info *hw = hid_get_device_info(dev);

sys/dev/hid/hgame.c

184

if (hid_test_quirk(hw, HQ_IS_XBOX360GP))

sys/dev/hid/hidmap.c

743

const struct hid_device_info *hw = hid_get_device_info(hm->dev);

sys/dev/hid/hidmap.c

778

evdev_set_id(hm->evdev, hw->idBus, hw->idVendor, hw->idProduct,

sys/dev/hid/hidmap.c

779

hw->idVersion);

sys/dev/hid/hidmap.c

780

evdev_set_serial(hm->evdev, hw->serial);

sys/dev/hid/hidwacom.c

207

const struct hid_device_info *hw;

sys/dev/hid/hidwacom.c

210

hw = hid_get_device_info(dev);

sys/dev/hid/hidwacom.c

216

evdev_set_id(sc->sc_evdev, hw->idBus, hw->idVendor, hw->idProduct,

sys/dev/hid/hidwacom.c

217

hw->idVersion);

sys/dev/hid/hidwacom.c

218

evdev_set_serial(sc->sc_evdev, hw->serial);

sys/dev/hid/hkbd.c

1049

if (hid_test_quirk(hw, HQ_KBD_BOOTPROTO) ||

sys/dev/hid/hkbd.c

1086

evdev_set_id(evdev, hw->idBus, hw->idVendor, hw->idProduct,

sys/dev/hid/hkbd.c

1087

hw->idVersion);

sys/dev/hid/hkbd.c

1088

evdev_set_serial(evdev, hw->serial);

sys/dev/hid/hkbd.c

881

const struct hid_device_info *hw = hid_get_device_info(sc->sc_dev);

sys/dev/hid/hkbd.c

884

if (hw->idVendor == USB_VENDOR_APPLE) { /* belt & braces! */

sys/dev/hid/hkbd.c

985

const struct hid_device_info *hw = hid_get_device_info(dev);

sys/dev/hid/hms.c

196

const struct hid_device_info *hw = hid_get_device_info(parent);

sys/dev/hid/hms.c

206

if ((error != 0 && hid_test_quirk(hw, HQ_HAS_MS_BOOTPROTO)) ||

sys/dev/hid/hms.c

207

(error == 0 && hid_test_quirk(hw, HQ_MS_BOOTPROTO) &&

sys/dev/hid/hms.c

250

const struct hid_device_info *hw = hid_get_device_info(dev);

sys/dev/hid/hms.c

270

if (hid_test_quirk(hw, HQ_MS_REVZ))

sys/dev/hid/hms.c

275

if (hid_test_quirk(hw, HQ_MS_VENDOR_BTN))

sys/dev/hid/hms.c

279

if (hid_test_quirk(hw, HQ_IICHID_SAMPLING) &&

sys/dev/hid/hmt.c

298

const struct hid_device_info *hw = hid_get_device_info(dev);

sys/dev/hid/hmt.c

377

(hid_test_quirk(hw, HQ_MT_TIMESTAMP) || hmt_timestamps))

sys/dev/hid/hmt.c

380

if (hid_test_quirk(hw, HQ_IICHID_SAMPLING))

sys/dev/hid/hmt.c

389

evdev_set_id(sc->evdev, hw->idBus, hw->idVendor, hw->idProduct,

sys/dev/hid/hmt.c

390

hw->idVersion);

sys/dev/hid/hmt.c

391

evdev_set_serial(sc->evdev, hw->serial);

sys/dev/hid/hpen.c

151

const struct hid_device_info *hw = hid_get_device_info(parent);

sys/dev/hid/hpen.c

154

if (hw->idBus == BUS_USB && hw->idVendor == USB_VENDOR_WACOM) {

sys/dev/hid/hpen.c

155

switch (hw->idProduct) {

sys/dev/hid/hpen.c

215

const struct hid_device_info *hw = hid_get_device_info(dev);

sys/dev/hid/hpen.c

219

if (hw->idBus == BUS_USB && hw->idVendor == USB_VENDOR_WACOM &&

sys/dev/hid/hpen.c

220

hw->idProduct == USB_PRODUCT_WACOM_GRAPHIRE3_4X5) {

sys/dev/hid/ietp.c

275

const struct hid_device_info *hw = hid_get_device_info(sc->dev);

sys/dev/hid/ietp.c

303

evdev_set_id(sc->evdev, hw->idBus, hw->idVendor, hw->idProduct,

sys/dev/hid/ietp.c

304

hw->idVersion);

sys/dev/hid/ietp.c

305

evdev_set_serial(sc->evdev, hw->serial);

sys/dev/hid/u2f.c

156

struct hid_device_info *hw = __DECONST(struct hid_device_info *,

sys/dev/hid/u2f.c

201

hid_add_dynamic_quirk(hw, HQ_NO_READAHEAD);

sys/dev/hid/xb360gp.c

106

const struct hid_device_info *hw = hid_get_device_info(parent);

sys/dev/hid/xb360gp.c

109

if (hid_test_quirk(hw, HQ_IS_XBOX360GP))

sys/dev/hid/xb360gp.c

118

const struct hid_device_info *hw = hid_get_device_info(dev);

sys/dev/hid/xb360gp.c

121

if (!hid_test_quirk(hw, HQ_IS_XBOX360GP))

sys/dev/iavf/iavf_adminq.c

110

void iavf_free_adminq_asq(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

112

iavf_free_virt_mem(hw, &hw->aq.asq.cmd_buf);

sys/dev/iavf/iavf_adminq.c

113

iavf_free_dma_mem(hw, &hw->aq.asq.desc_buf);

sys/dev/iavf/iavf_adminq.c

123

void iavf_free_adminq_arq(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

125

iavf_free_dma_mem(hw, &hw->aq.arq.desc_buf);

sys/dev/iavf/iavf_adminq.c

132

STATIC enum iavf_status iavf_alloc_arq_bufs(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

144

ret_code = iavf_allocate_virt_mem(hw, &hw->aq.arq.dma_head,

sys/dev/iavf/iavf_adminq.c

145

(hw->aq.num_arq_entries * sizeof(struct iavf_dma_mem)));

sys/dev/iavf/iavf_adminq.c

148

hw->aq.arq.r.arq_bi = (struct iavf_dma_mem *)hw->aq.arq.dma_head.va;

sys/dev/iavf/iavf_adminq.c

151

for (i = 0; i < hw->aq.num_arq_entries; i++) {

sys/dev/iavf/iavf_adminq.c

152

bi = &hw->aq.arq.r.arq_bi[i];

sys/dev/iavf/iavf_adminq.c

153

ret_code = iavf_allocate_dma_mem(hw, bi,

sys/dev/iavf/iavf_adminq.c

155

hw->aq.arq_buf_size,

sys/dev/iavf/iavf_adminq.c

161

desc = IAVF_ADMINQ_DESC(hw->aq.arq, i);

sys/dev/iavf/iavf_adminq.c

164

if (hw->aq.arq_buf_size > IAVF_AQ_LARGE_BUF)

sys/dev/iavf/iavf_adminq.c

189

iavf_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]);

sys/dev/iavf/iavf_adminq.c

190

iavf_free_virt_mem(hw, &hw->aq.arq.dma_head);

sys/dev/iavf/iavf_adminq.c

199

STATIC enum iavf_status iavf_alloc_asq_bufs(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

206

ret_code = iavf_allocate_virt_mem(hw, &hw->aq.asq.dma_head,

sys/dev/iavf/iavf_adminq.c

207

(hw->aq.num_asq_entries * sizeof(struct iavf_dma_mem)));

sys/dev/iavf/iavf_adminq.c

210

hw->aq.asq.r.asq_bi = (struct iavf_dma_mem *)hw->aq.asq.dma_head.va;

sys/dev/iavf/iavf_adminq.c

213

for (i = 0; i < hw->aq.num_asq_entries; i++) {

sys/dev/iavf/iavf_adminq.c

214

bi = &hw->aq.asq.r.asq_bi[i];

sys/dev/iavf/iavf_adminq.c

215

ret_code = iavf_allocate_dma_mem(hw, bi,

sys/dev/iavf/iavf_adminq.c

217

hw->aq.asq_buf_size,

sys/dev/iavf/iavf_adminq.c

229

iavf_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]);

sys/dev/iavf/iavf_adminq.c

230

iavf_free_virt_mem(hw, &hw->aq.asq.dma_head);

sys/dev/iavf/iavf_adminq.c

239

STATIC void iavf_free_arq_bufs(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

244

for (i = 0; i < hw->aq.num_arq_entries; i++)

sys/dev/iavf/iavf_adminq.c

245

iavf_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]);

sys/dev/iavf/iavf_adminq.c

248

iavf_free_dma_mem(hw, &hw->aq.arq.desc_buf);

sys/dev/iavf/iavf_adminq.c

251

iavf_free_virt_mem(hw, &hw->aq.arq.dma_head);

sys/dev/iavf/iavf_adminq.c

258

STATIC void iavf_free_asq_bufs(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

263

for (i = 0; i < hw->aq.num_asq_entries; i++)

sys/dev/iavf/iavf_adminq.c

264

if (hw->aq.asq.r.asq_bi[i].pa)

sys/dev/iavf/iavf_adminq.c

265

iavf_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]);

sys/dev/iavf/iavf_adminq.c

268

iavf_free_virt_mem(hw, &hw->aq.asq.cmd_buf);

sys/dev/iavf/iavf_adminq.c

271

iavf_free_dma_mem(hw, &hw->aq.asq.desc_buf);

sys/dev/iavf/iavf_adminq.c

274

iavf_free_virt_mem(hw, &hw->aq.asq.dma_head);

sys/dev/iavf/iavf_adminq.c

283

STATIC enum iavf_status iavf_config_asq_regs(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

289

wr32(hw, hw->aq.asq.head, 0);

sys/dev/iavf/iavf_adminq.c

290

wr32(hw, hw->aq.asq.tail, 0);

sys/dev/iavf/iavf_adminq.c

293

wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |

sys/dev/iavf/iavf_adminq.c

295

wr32(hw, hw->aq.asq.bal, IAVF_LO_DWORD(hw->aq.asq.desc_buf.pa));

sys/dev/iavf/iavf_adminq.c

296

wr32(hw, hw->aq.asq.bah, IAVF_HI_DWORD(hw->aq.asq.desc_buf.pa));

sys/dev/iavf/iavf_adminq.c

299

reg = rd32(hw, hw->aq.asq.bal);

sys/dev/iavf/iavf_adminq.c

300

if (reg != IAVF_LO_DWORD(hw->aq.asq.desc_buf.pa))

sys/dev/iavf/iavf_adminq.c

312

STATIC enum iavf_status iavf_config_arq_regs(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

318

wr32(hw, hw->aq.arq.head, 0);

sys/dev/iavf/iavf_adminq.c

319

wr32(hw, hw->aq.arq.tail, 0);

sys/dev/iavf/iavf_adminq.c

322

wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |

sys/dev/iavf/iavf_adminq.c

324

wr32(hw, hw->aq.arq.bal, IAVF_LO_DWORD(hw->aq.arq.desc_buf.pa));

sys/dev/iavf/iavf_adminq.c

325

wr32(hw, hw->aq.arq.bah, IAVF_HI_DWORD(hw->aq.arq.desc_buf.pa));

sys/dev/iavf/iavf_adminq.c

328

wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1);

sys/dev/iavf/iavf_adminq.c

331

reg = rd32(hw, hw->aq.arq.bal);

sys/dev/iavf/iavf_adminq.c

332

if (reg != IAVF_LO_DWORD(hw->aq.arq.desc_buf.pa))

sys/dev/iavf/iavf_adminq.c

351

enum iavf_status iavf_init_asq(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

355

if (hw->aq.asq.count > 0) {

sys/dev/iavf/iavf_adminq.c

362

if ((hw->aq.num_asq_entries == 0) ||

sys/dev/iavf/iavf_adminq.c

363

(hw->aq.asq_buf_size == 0)) {

sys/dev/iavf/iavf_adminq.c

368

hw->aq.asq.next_to_use = 0;

sys/dev/iavf/iavf_adminq.c

369

hw->aq.asq.next_to_clean = 0;

sys/dev/iavf/iavf_adminq.c

372

ret_code = iavf_alloc_adminq_asq_ring(hw);

sys/dev/iavf/iavf_adminq.c

377

ret_code = iavf_alloc_asq_bufs(hw);

sys/dev/iavf/iavf_adminq.c

382

ret_code = iavf_config_asq_regs(hw);

sys/dev/iavf/iavf_adminq.c

387

hw->aq.asq.count = hw->aq.num_asq_entries;

sys/dev/iavf/iavf_adminq.c

391

iavf_free_adminq_asq(hw);

sys/dev/iavf/iavf_adminq.c

395

iavf_free_asq_bufs(hw);

sys/dev/iavf/iavf_adminq.c

414

enum iavf_status iavf_init_arq(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

418

if (hw->aq.arq.count > 0) {

sys/dev/iavf/iavf_adminq.c

425

if ((hw->aq.num_arq_entries == 0) ||

sys/dev/iavf/iavf_adminq.c

426

(hw->aq.arq_buf_size == 0)) {

sys/dev/iavf/iavf_adminq.c

431

hw->aq.arq.next_to_use = 0;

sys/dev/iavf/iavf_adminq.c

432

hw->aq.arq.next_to_clean = 0;

sys/dev/iavf/iavf_adminq.c

435

ret_code = iavf_alloc_adminq_arq_ring(hw);

sys/dev/iavf/iavf_adminq.c

44

STATIC void iavf_adminq_init_regs(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

440

ret_code = iavf_alloc_arq_bufs(hw);

sys/dev/iavf/iavf_adminq.c

445

ret_code = iavf_config_arq_regs(hw);

sys/dev/iavf/iavf_adminq.c

450

hw->aq.arq.count = hw->aq.num_arq_entries;

sys/dev/iavf/iavf_adminq.c

454

iavf_free_adminq_arq(hw);

sys/dev/iavf/iavf_adminq.c

466

enum iavf_status iavf_shutdown_asq(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

47

hw->aq.asq.tail = IAVF_VF_ATQT1;

sys/dev/iavf/iavf_adminq.c

470

iavf_acquire_spinlock(&hw->aq.asq_spinlock);

sys/dev/iavf/iavf_adminq.c

472

if (hw->aq.asq.count == 0) {

sys/dev/iavf/iavf_adminq.c

478

wr32(hw, hw->aq.asq.head, 0);

sys/dev/iavf/iavf_adminq.c

479

wr32(hw, hw->aq.asq.tail, 0);

sys/dev/iavf/iavf_adminq.c

48

hw->aq.asq.head = IAVF_VF_ATQH1;

sys/dev/iavf/iavf_adminq.c

480

wr32(hw, hw->aq.asq.len, 0);

sys/dev/iavf/iavf_adminq.c

481

wr32(hw, hw->aq.asq.bal, 0);

sys/dev/iavf/iavf_adminq.c

482

wr32(hw, hw->aq.asq.bah, 0);

sys/dev/iavf/iavf_adminq.c

484

hw->aq.asq.count = 0; /* to indicate uninitialized queue */

sys/dev/iavf/iavf_adminq.c

487

iavf_free_asq_bufs(hw);

sys/dev/iavf/iavf_adminq.c

49

hw->aq.asq.len = IAVF_VF_ATQLEN1;

sys/dev/iavf/iavf_adminq.c

490

iavf_release_spinlock(&hw->aq.asq_spinlock);

sys/dev/iavf/iavf_adminq.c

50

hw->aq.asq.bal = IAVF_VF_ATQBAL1;

sys/dev/iavf/iavf_adminq.c

500

enum iavf_status iavf_shutdown_arq(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

504

iavf_acquire_spinlock(&hw->aq.arq_spinlock);

sys/dev/iavf/iavf_adminq.c

506

if (hw->aq.arq.count == 0) {

sys/dev/iavf/iavf_adminq.c

51

hw->aq.asq.bah = IAVF_VF_ATQBAH1;

sys/dev/iavf/iavf_adminq.c

512

wr32(hw, hw->aq.arq.head, 0);

sys/dev/iavf/iavf_adminq.c

513

wr32(hw, hw->aq.arq.tail, 0);

sys/dev/iavf/iavf_adminq.c

514

wr32(hw, hw->aq.arq.len, 0);

sys/dev/iavf/iavf_adminq.c

515

wr32(hw, hw->aq.arq.bal, 0);

sys/dev/iavf/iavf_adminq.c

516

wr32(hw, hw->aq.arq.bah, 0);

sys/dev/iavf/iavf_adminq.c

518

hw->aq.arq.count = 0; /* to indicate uninitialized queue */

sys/dev/iavf/iavf_adminq.c

52

hw->aq.arq.tail = IAVF_VF_ARQT1;

sys/dev/iavf/iavf_adminq.c

521

iavf_free_arq_bufs(hw);

sys/dev/iavf/iavf_adminq.c

524

iavf_release_spinlock(&hw->aq.arq_spinlock);

sys/dev/iavf/iavf_adminq.c

53

hw->aq.arq.head = IAVF_VF_ARQH1;

sys/dev/iavf/iavf_adminq.c

539

enum iavf_status iavf_init_adminq(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

54

hw->aq.arq.len = IAVF_VF_ARQLEN1;

sys/dev/iavf/iavf_adminq.c

544

if ((hw->aq.num_arq_entries == 0) ||

sys/dev/iavf/iavf_adminq.c

545

(hw->aq.num_asq_entries == 0) ||

sys/dev/iavf/iavf_adminq.c

546

(hw->aq.arq_buf_size == 0) ||

sys/dev/iavf/iavf_adminq.c

547

(hw->aq.asq_buf_size == 0)) {

sys/dev/iavf/iavf_adminq.c

55

hw->aq.arq.bal = IAVF_VF_ARQBAL1;

sys/dev/iavf/iavf_adminq.c

551

iavf_init_spinlock(&hw->aq.asq_spinlock);

sys/dev/iavf/iavf_adminq.c

552

iavf_init_spinlock(&hw->aq.arq_spinlock);

sys/dev/iavf/iavf_adminq.c

555

iavf_adminq_init_regs(hw);

sys/dev/iavf/iavf_adminq.c

558

hw->aq.asq_cmd_timeout = IAVF_ASQ_CMD_TIMEOUT;

sys/dev/iavf/iavf_adminq.c

56

hw->aq.arq.bah = IAVF_VF_ARQBAH1;

sys/dev/iavf/iavf_adminq.c

561

ret_code = iavf_init_asq(hw);

sys/dev/iavf/iavf_adminq.c

566

ret_code = iavf_init_arq(hw);

sys/dev/iavf/iavf_adminq.c

574

iavf_shutdown_asq(hw);

sys/dev/iavf/iavf_adminq.c

576

iavf_destroy_spinlock(&hw->aq.asq_spinlock);

sys/dev/iavf/iavf_adminq.c

577

iavf_destroy_spinlock(&hw->aq.arq_spinlock);

sys/dev/iavf/iavf_adminq.c

587

enum iavf_status iavf_shutdown_adminq(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

591

if (iavf_check_asq_alive(hw))

sys/dev/iavf/iavf_adminq.c

592

iavf_aq_queue_shutdown(hw, true);

sys/dev/iavf/iavf_adminq.c

594

iavf_shutdown_asq(hw);

sys/dev/iavf/iavf_adminq.c

595

iavf_shutdown_arq(hw);

sys/dev/iavf/iavf_adminq.c

596

iavf_destroy_spinlock(&hw->aq.asq_spinlock);

sys/dev/iavf/iavf_adminq.c

597

iavf_destroy_spinlock(&hw->aq.arq_spinlock);

sys/dev/iavf/iavf_adminq.c

608

u16 iavf_clean_asq(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

610

struct iavf_adminq_ring *asq = &(hw->aq.asq);

sys/dev/iavf/iavf_adminq.c

618

while (rd32(hw, hw->aq.asq.head) != ntc) {

sys/dev/iavf/iavf_adminq.c

619

iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE,

sys/dev/iavf/iavf_adminq.c

620

"ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head));

sys/dev/iavf/iavf_adminq.c

627

cb_func(hw, &desc_cb);

sys/dev/iavf/iavf_adminq.c

63

enum iavf_status iavf_alloc_adminq_asq_ring(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

650

bool iavf_asq_done(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

655

return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use;

sys/dev/iavf/iavf_adminq.c

67

ret_code = iavf_allocate_dma_mem(hw, &hw->aq.asq.desc_buf,

sys/dev/iavf/iavf_adminq.c

670

enum iavf_status iavf_asq_send_command(struct iavf_hw *hw,

sys/dev/iavf/iavf_adminq.c

684

iavf_acquire_spinlock(&hw->aq.asq_spinlock);

sys/dev/iavf/iavf_adminq.c

686

hw->aq.asq_last_status = IAVF_AQ_RC_OK;

sys/dev/iavf/iavf_adminq.c

688

if (hw->aq.asq.count == 0) {

sys/dev/iavf/iavf_adminq.c

689

iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE,

sys/dev/iavf/iavf_adminq.c

69

(hw->aq.num_asq_entries *

sys/dev/iavf/iavf_adminq.c

695

val = rd32(hw, hw->aq.asq.head);

sys/dev/iavf/iavf_adminq.c

696

if (val >= hw->aq.num_asq_entries) {

sys/dev/iavf/iavf_adminq.c

697

iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE,

sys/dev/iavf/iavf_adminq.c

703

details = IAVF_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use);

sys/dev/iavf/iavf_adminq.c

730

if (buff_size > hw->aq.asq_buf_size) {

sys/dev/iavf/iavf_adminq.c

731

iavf_debug(hw,

sys/dev/iavf/iavf_adminq.c

740

iavf_debug(hw,

sys/dev/iavf/iavf_adminq.c

75

ret_code = iavf_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf,

sys/dev/iavf/iavf_adminq.c

754

if (iavf_clean_asq(hw) == 0) {

sys/dev/iavf/iavf_adminq.c

755

iavf_debug(hw,

sys/dev/iavf/iavf_adminq.c

76

(hw->aq.num_asq_entries *

sys/dev/iavf/iavf_adminq.c

763

desc_on_ring = IAVF_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use);

sys/dev/iavf/iavf_adminq.c

771

dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]);

sys/dev/iavf/iavf_adminq.c

787

iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE, "AQTX: desc and buffer:\n");

sys/dev/iavf/iavf_adminq.c

788

iavf_debug_aq(hw, IAVF_DEBUG_AQ_COMMAND, (void *)desc_on_ring,

sys/dev/iavf/iavf_adminq.c

79

iavf_free_dma_mem(hw, &hw->aq.asq.desc_buf);

sys/dev/iavf/iavf_adminq.c

790

(hw->aq.asq.next_to_use)++;

sys/dev/iavf/iavf_adminq.c

791

if (hw->aq.asq.next_to_use == hw->aq.asq.count)

sys/dev/iavf/iavf_adminq.c

792

hw->aq.asq.next_to_use = 0;

sys/dev/iavf/iavf_adminq.c

794

wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use);

sys/dev/iavf/iavf_adminq.c

806

if (iavf_asq_done(hw))

sys/dev/iavf/iavf_adminq.c

810

} while (total_delay < hw->aq.asq_cmd_timeout);

sys/dev/iavf/iavf_adminq.c

814

if (iavf_asq_done(hw)) {

sys/dev/iavf/iavf_adminq.c

822

iavf_debug(hw,

sys/dev/iavf/iavf_adminq.c

837

hw->aq.asq_last_status = (enum iavf_admin_queue_err)retval;

sys/dev/iavf/iavf_adminq.c

840

iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE,

sys/dev/iavf/iavf_adminq.c

842

iavf_debug_aq(hw, IAVF_DEBUG_AQ_COMMAND, (void *)desc, buff, buff_size);

sys/dev/iavf/iavf_adminq.c

852

if (rd32(hw, hw->aq.asq.len) & IAVF_VF_ATQLEN1_ATQCRIT_MASK) {

sys/dev/iavf/iavf_adminq.c

853

iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE,

sys/dev/iavf/iavf_adminq.c

857

iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE,

sys/dev/iavf/iavf_adminq.c

864

iavf_release_spinlock(&hw->aq.asq_spinlock);

sys/dev/iavf/iavf_adminq.c

895

enum iavf_status iavf_clean_arq_element(struct iavf_hw *hw,

sys/dev/iavf/iavf_adminq.c

90

enum iavf_status iavf_alloc_adminq_arq_ring(struct iavf_hw *hw)

sys/dev/iavf/iavf_adminq.c

900

u16 ntc = hw->aq.arq.next_to_clean;

sys/dev/iavf/iavf_adminq.c

912

iavf_acquire_spinlock(&hw->aq.arq_spinlock);

sys/dev/iavf/iavf_adminq.c

914

if (hw->aq.arq.count == 0) {

sys/dev/iavf/iavf_adminq.c

915

iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE,

sys/dev/iavf/iavf_adminq.c

922

ntu = rd32(hw, hw->aq.arq.head) & IAVF_VF_ARQH1_ARQH_MASK;

sys/dev/iavf/iavf_adminq.c

930

desc = IAVF_ADMINQ_DESC(hw->aq.arq, ntc);

sys/dev/iavf/iavf_adminq.c

933

hw->aq.arq_last_status =

sys/dev/iavf/iavf_adminq.c

938

iavf_debug(hw,

sys/dev/iavf/iavf_adminq.c

94

ret_code = iavf_allocate_dma_mem(hw, &hw->aq.arq.desc_buf,

sys/dev/iavf/iavf_adminq.c

941

hw->aq.arq_last_status);

sys/dev/iavf/iavf_adminq.c

950

hw->aq.arq.r.arq_bi[desc_idx].va,

sys/dev/iavf/iavf_adminq.c

953

iavf_debug(hw, IAVF_DEBUG_AQ_MESSAGE, "AQRX: desc and buffer:\n");

sys/dev/iavf/iavf_adminq.c

954

iavf_debug_aq(hw, IAVF_DEBUG_AQ_COMMAND, (void *)desc, e->msg_buf,

sys/dev/iavf/iavf_adminq.c

955

hw->aq.arq_buf_size);

sys/dev/iavf/iavf_adminq.c

96

(hw->aq.num_arq_entries *

sys/dev/iavf/iavf_adminq.c

961

bi = &hw->aq.arq.r.arq_bi[ntc];

sys/dev/iavf/iavf_adminq.c

965

if (hw->aq.arq_buf_size > IAVF_AQ_LARGE_BUF)

sys/dev/iavf/iavf_adminq.c

972

wr32(hw, hw->aq.arq.tail, ntc);

sys/dev/iavf/iavf_adminq.c

975

if (ntc == hw->aq.num_arq_entries)

sys/dev/iavf/iavf_adminq.c

977

hw->aq.arq.next_to_clean = ntc;

sys/dev/iavf/iavf_adminq.c

978

hw->aq.arq.next_to_use = ntu;

sys/dev/iavf/iavf_adminq.c

983

*pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc);

sys/dev/iavf/iavf_adminq.c

985

iavf_release_spinlock(&hw->aq.arq_spinlock);

sys/dev/iavf/iavf_alloc.h

51

enum iavf_status iavf_allocate_dma_mem(struct iavf_hw *hw,

sys/dev/iavf/iavf_alloc.h

55

enum iavf_status iavf_free_dma_mem(struct iavf_hw *hw,

sys/dev/iavf/iavf_alloc.h

57

enum iavf_status iavf_allocate_virt_mem(struct iavf_hw *hw,

sys/dev/iavf/iavf_alloc.h

60

enum iavf_status iavf_free_virt_mem(struct iavf_hw *hw,

sys/dev/iavf/iavf_common.c

1000

hw->dev_caps.num_rx_qp = msg->num_queue_pairs;

sys/dev/iavf/iavf_common.c

1001

hw->dev_caps.num_tx_qp = msg->num_queue_pairs;

sys/dev/iavf/iavf_common.c

1002

hw->dev_caps.num_msix_vectors_vf = msg->max_vectors;

sys/dev/iavf/iavf_common.c

1003

hw->dev_caps.dcb = msg->vf_cap_flags &

sys/dev/iavf/iavf_common.c

1007

iavf_memcpy(hw->mac.perm_addr,

sys/dev/iavf/iavf_common.c

1011

iavf_memcpy(hw->mac.addr, vsi_res->default_mac_addr,

sys/dev/iavf/iavf_common.c

1027

enum iavf_status iavf_vf_reset(struct iavf_hw *hw)

sys/dev/iavf/iavf_common.c

1029

return iavf_aq_send_msg_to_pf(hw, VIRTCHNL_OP_RESET_VF,

sys/dev/iavf/iavf_common.c

1040

enum iavf_status iavf_aq_clear_all_wol_filters(struct iavf_hw *hw,

sys/dev/iavf/iavf_common.c

1049

status = iavf_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/iavf/iavf_common.c

129

snprintf(hw->err_str, sizeof(hw->err_str), "%d", aq_err);

sys/dev/iavf/iavf_common.c

130

return hw->err_str;

sys/dev/iavf/iavf_common.c

138

const char *iavf_stat_str(struct iavf_hw *hw, enum iavf_status stat_err)

sys/dev/iavf/iavf_common.c

277

snprintf(hw->err_str, sizeof(hw->err_str), "%d", stat_err);

sys/dev/iavf/iavf_common.c

278

return hw->err_str;

sys/dev/iavf/iavf_common.c

291

void iavf_debug_aq(struct iavf_hw *hw, enum iavf_debug_mask mask, void *desc,

sys/dev/iavf/iavf_common.c

299

if ((!(mask & hw->debug_mask)) || (desc == NULL))

sys/dev/iavf/iavf_common.c

304

iavf_debug(hw, mask,

sys/dev/iavf/iavf_common.c

310

iavf_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",

sys/dev/iavf/iavf_common.c

313

iavf_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",

sys/dev/iavf/iavf_common.c

316

iavf_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",

sys/dev/iavf/iavf_common.c

321

iavf_debug(hw, mask, "AQ CMD Buffer:\n");

sys/dev/iavf/iavf_common.c

326

iavf_debug(hw, mask,

sys/dev/iavf/iavf_common.c

341

iavf_debug(hw, mask,

sys/dev/iavf/iavf_common.c

357

bool iavf_check_asq_alive(struct iavf_hw *hw)

sys/dev/iavf/iavf_common.c

359

if (hw->aq.asq.len)

sys/dev/iavf/iavf_common.c

360

return !!(rd32(hw, hw->aq.asq.len) &

sys/dev/iavf/iavf_common.c

374

enum iavf_status iavf_aq_queue_shutdown(struct iavf_hw *hw,

sys/dev/iavf/iavf_common.c

387

status = iavf_asq_send_command(hw, &desc, NULL, 0, NULL);

sys/dev/iavf/iavf_common.c

403

STATIC enum iavf_status iavf_aq_get_set_rss_lut(struct iavf_hw *hw,

sys/dev/iavf/iavf_common.c

44

enum iavf_status iavf_set_mac_type(struct iavf_hw *hw)

sys/dev/iavf/iavf_common.c

441

status = iavf_asq_send_command(hw, &desc, lut, lut_size, NULL);

sys/dev/iavf/iavf_common.c

456

enum iavf_status iavf_aq_get_rss_lut(struct iavf_hw *hw, u16 vsi_id,

sys/dev/iavf/iavf_common.c

459

return iavf_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size,

sys/dev/iavf/iavf_common.c

473

enum iavf_status iavf_aq_set_rss_lut(struct iavf_hw *hw, u16 vsi_id,

sys/dev/iavf/iavf_common.c

476

return iavf_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, true);

sys/dev/iavf/iavf_common.c

488

STATIC enum iavf_status iavf_aq_get_set_rss_key(struct iavf_hw *hw,

sys/dev/iavf/iavf_common.c

50

if (hw->vendor_id == IAVF_INTEL_VENDOR_ID) {

sys/dev/iavf/iavf_common.c

51

switch (hw->device_id) {

sys/dev/iavf/iavf_common.c

516

status = iavf_asq_send_command(hw, &desc, key, key_size, NULL);

sys/dev/iavf/iavf_common.c

528

enum iavf_status iavf_aq_get_rss_key(struct iavf_hw *hw,

sys/dev/iavf/iavf_common.c

53

hw->mac.type = IAVF_MAC_X722_VF;

sys/dev/iavf/iavf_common.c

532

return iavf_aq_get_set_rss_key(hw, vsi_id, key, false);

sys/dev/iavf/iavf_common.c

543

enum iavf_status iavf_aq_set_rss_key(struct iavf_hw *hw,

sys/dev/iavf/iavf_common.c

547

return iavf_aq_get_set_rss_key(hw, vsi_id, key, true);

sys/dev/iavf/iavf_common.c

58

hw->mac.type = IAVF_MAC_VF;

sys/dev/iavf/iavf_common.c

61

hw->mac.type = IAVF_MAC_GENERIC;

sys/dev/iavf/iavf_common.c

69

hw->mac.type, status);

sys/dev/iavf/iavf_common.c

78

const char *iavf_aq_str(struct iavf_hw *hw, enum iavf_admin_queue_err aq_err)

sys/dev/iavf/iavf_common.c

952

enum iavf_status iavf_aq_send_msg_to_pf(struct iavf_hw *hw,

sys/dev/iavf/iavf_common.c

978

status = iavf_asq_send_command(hw, (struct iavf_aq_desc *)&desc, msg,

sys/dev/iavf/iavf_common.c

991

void iavf_vf_parse_hw_config(struct iavf_hw *hw,

sys/dev/iavf/iavf_common.c

999

hw->dev_caps.num_vsis = msg->num_vsis;

sys/dev/iavf/iavf_iflib.h

240

struct iavf_hw *hw;

sys/dev/iavf/iavf_iflib.h

334

struct iavf_hw hw;

sys/dev/iavf/iavf_iflib.h

389

const char * iavf_vc_stat_str(struct iavf_hw *hw,

sys/dev/iavf/iavf_lib.c

1076

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_lib.c

1086

wr32(hw, IAVF_VFQF_HENA(0), 0);

sys/dev/iavf/iavf_lib.c

1087

wr32(hw, IAVF_VFQF_HENA(1), 0);

sys/dev/iavf/iavf_lib.c

1088

iavf_flush(hw);

sys/dev/iavf/iavf_lib.c

1097

wr32(hw, IAVF_VFQF_HKEY(i), rss_seed[i]);

sys/dev/iavf/iavf_lib.c

110

iavf_init_hw(hw, dev);

sys/dev/iavf/iavf_lib.c

1115

hena = (u64)rd32(hw, IAVF_VFQF_HENA(0)) |

sys/dev/iavf/iavf_lib.c

1116

((u64)rd32(hw, IAVF_VFQF_HENA(1)) << 32);

sys/dev/iavf/iavf_lib.c

1118

wr32(hw, IAVF_VFQF_HENA(0), (u32)hena);

sys/dev/iavf/iavf_lib.c

1119

wr32(hw, IAVF_VFQF_HENA(1), (u32)(hena >> 32));

sys/dev/iavf/iavf_lib.c

1140

wr32(hw, IAVF_VFQF_HLUT(i >> 2), lut);

sys/dev/iavf/iavf_lib.c

1145

iavf_flush(hw);

sys/dev/iavf/iavf_lib.c

121

sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle;

sys/dev/iavf/iavf_lib.c

122

sc->hw.back = &sc->osdep;

sys/dev/iavf/iavf_lib.c

136

iavf_init_hw(struct iavf_hw *hw, device_t dev)

sys/dev/iavf/iavf_lib.c

139

hw->vendor_id = pci_get_vendor(dev);

sys/dev/iavf/iavf_lib.c

140

hw->device_id = pci_get_device(dev);

sys/dev/iavf/iavf_lib.c

141

hw->revision_id = pci_read_config(dev, PCIR_REVID, 1);

sys/dev/iavf/iavf_lib.c

142

hw->subsystem_vendor_id =

sys/dev/iavf/iavf_lib.c

144

hw->subsystem_device_id =

sys/dev/iavf/iavf_lib.c

147

hw->bus.device = pci_get_slot(dev);

sys/dev/iavf/iavf_lib.c

148

hw->bus.func = pci_get_function(dev);

sys/dev/iavf/iavf_lib.c

199

iavf_reset_complete(struct iavf_hw *hw)

sys/dev/iavf/iavf_lib.c

205

reg = rd32(hw, IAVF_VFGEN_RSTAT) &

sys/dev/iavf/iavf_lib.c

230

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_lib.c

236

hw->aq.num_arq_entries = IAVF_AQ_LEN;

sys/dev/iavf/iavf_lib.c

237

hw->aq.num_asq_entries = IAVF_AQ_LEN;

sys/dev/iavf/iavf_lib.c

238

hw->aq.arq_buf_size = IAVF_AQ_BUF_SZ;

sys/dev/iavf/iavf_lib.c

239

hw->aq.asq_buf_size = IAVF_AQ_BUF_SZ;

sys/dev/iavf/iavf_lib.c

243

error = iavf_init_adminq(hw);

sys/dev/iavf/iavf_lib.c

258

iavf_shutdown_adminq(hw);

sys/dev/iavf/iavf_lib.c

266

while (!iavf_asq_done(hw)) {

sys/dev/iavf/iavf_lib.c

268

iavf_shutdown_adminq(hw);

sys/dev/iavf/iavf_lib.c

310

iavf_shutdown_adminq(hw);

sys/dev/iavf/iavf_lib.c

324

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_lib.c

333

error = iavf_reset_complete(hw);

sys/dev/iavf/iavf_lib.c

341

error = iavf_shutdown_adminq(hw);

sys/dev/iavf/iavf_lib.c

348

error = iavf_init_adminq(hw);

sys/dev/iavf/iavf_lib.c

356

iavf_enable_adminq_irq(hw);

sys/dev/iavf/iavf_lib.c

368

iavf_enable_adminq_irq(struct iavf_hw *hw)

sys/dev/iavf/iavf_lib.c

370

wr32(hw, IAVF_VFINT_DYN_CTL01,

sys/dev/iavf/iavf_lib.c

374

wr32(hw, IAVF_VFINT_ICR0_ENA1, IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK);

sys/dev/iavf/iavf_lib.c

376

rd32(hw, IAVF_VFGEN_RSTAT);

sys/dev/iavf/iavf_lib.c

386

iavf_disable_adminq_irq(struct iavf_hw *hw)

sys/dev/iavf/iavf_lib.c

388

wr32(hw, IAVF_VFINT_DYN_CTL01, 0);

sys/dev/iavf/iavf_lib.c

389

wr32(hw, IAVF_VFINT_ICR0_ENA1, 0);

sys/dev/iavf/iavf_lib.c

390

iavf_flush(hw);

sys/dev/iavf/iavf_lib.c

405

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_lib.c

420

while (!iavf_asq_done(hw)) {

sys/dev/iavf/iavf_lib.c

43

static void iavf_init_hw(struct iavf_hw *hw, device_t dev);

sys/dev/iavf/iavf_lib.c

537

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_lib.c

542

if (ETHER_IS_ZERO(hw->mac.addr)) {

sys/dev/iavf/iavf_lib.c

546

memcpy(hw->mac.addr, addr, sizeof(addr));

sys/dev/iavf/iavf_lib.c

549

memcpy(hw->mac.perm_addr, hw->mac.addr, ETHER_ADDR_LEN);

sys/dev/iavf/iavf_lib.c

653

&sc->hw.debug_mask, 0, "Shared code debug message level");

sys/dev/iavf/iavf_lib.c

757

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_lib.c

766

wr32(hw, IAVF_VFINT_ITRN1(IAVF_TX_ITR, i),

sys/dev/iavf/iavf_lib.c

782

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_lib.c

791

wr32(hw, IAVF_VFINT_ITRN1(IAVF_RX_ITR, i),

sys/dev/iavf/iavf_lib.c

96

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_lib.h

434

int iavf_reset_complete(struct iavf_hw *hw);

sys/dev/iavf/iavf_lib.h

437

void iavf_enable_adminq_irq(struct iavf_hw *hw);

sys/dev/iavf/iavf_lib.h

438

void iavf_disable_adminq_irq(struct iavf_hw *hw);

sys/dev/iavf/iavf_osdep.c

117

iavf_allocate_dma_mem(struct iavf_hw *hw, struct iavf_dma_mem *mem,

sys/dev/iavf/iavf_osdep.c

120

device_t dev = ((struct iavf_osdep *)hw->back)->dev;

sys/dev/iavf/iavf_osdep.c

186

iavf_free_dma_mem(struct iavf_hw *hw __unused, struct iavf_dma_mem *mem)

sys/dev/iavf/iavf_osdep.c

265

iavf_debug_shared(struct iavf_hw *hw, uint64_t mask, char *fmt, ...)

sys/dev/iavf/iavf_osdep.c

270

if (!(mask & ((struct iavf_hw *)hw)->debug_mask))

sys/dev/iavf/iavf_osdep.c

273

dev = ((struct iavf_osdep *)hw->back)->dev;

sys/dev/iavf/iavf_osdep.c

293

iavf_read_pci_cfg(struct iavf_hw *hw, u32 reg)

sys/dev/iavf/iavf_osdep.c

297

value = pci_read_config(((struct iavf_osdep *)hw->back)->dev,

sys/dev/iavf/iavf_osdep.c

313

iavf_write_pci_cfg(struct iavf_hw *hw, u32 reg, u16 value)

sys/dev/iavf/iavf_osdep.c

315

pci_write_config(((struct iavf_osdep *)hw->back)->dev,

sys/dev/iavf/iavf_osdep.c

331

iavf_rd32(struct iavf_hw *hw, uint32_t reg)

sys/dev/iavf/iavf_osdep.c

333

struct iavf_osdep *osdep = (struct iavf_osdep *)hw->back;

sys/dev/iavf/iavf_osdep.c

352

iavf_wr32(struct iavf_hw *hw, uint32_t reg, uint32_t val)

sys/dev/iavf/iavf_osdep.c

354

struct iavf_osdep *osdep = (struct iavf_osdep *)hw->back;

sys/dev/iavf/iavf_osdep.c

372

iavf_flush(struct iavf_hw *hw)

sys/dev/iavf/iavf_osdep.c

374

struct iavf_osdep *osdep = (struct iavf_osdep *)hw->back;

sys/dev/iavf/iavf_osdep.c

376

rd32(hw, osdep->flush_reg);

sys/dev/iavf/iavf_osdep.c

78

iavf_allocate_virt_mem(struct iavf_hw *hw __unused, struct iavf_virt_mem *mem,

sys/dev/iavf/iavf_osdep.c

95

iavf_free_virt_mem(struct iavf_hw *hw __unused, struct iavf_virt_mem *mem)

sys/dev/iavf/iavf_osdep.h

234

void iavf_debug_shared(struct iavf_hw *hw, uint64_t mask,

sys/dev/iavf/iavf_osdep.h

243

uint32_t iavf_rd32(struct iavf_hw *hw, uint32_t reg);

sys/dev/iavf/iavf_osdep.h

244

void iavf_wr32(struct iavf_hw *hw, uint32_t reg, uint32_t val);

sys/dev/iavf/iavf_osdep.h

245

void iavf_flush(struct iavf_hw *hw);

sys/dev/iavf/iavf_osdep.h

246

#define rd32(hw, reg) iavf_rd32(hw, reg)

sys/dev/iavf/iavf_osdep.h

247

#define wr32(hw, reg, val) iavf_wr32(hw, reg, val)

sys/dev/iavf/iavf_prototype.h

106

void iavf_vf_parse_hw_config(struct iavf_hw *hw,

sys/dev/iavf/iavf_prototype.h

108

enum iavf_status iavf_vf_reset(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

109

enum iavf_status iavf_aq_send_msg_to_pf(struct iavf_hw *hw,

sys/dev/iavf/iavf_prototype.h

114

enum iavf_status iavf_aq_debug_dump(struct iavf_hw *hw, u8 cluster_id,

sys/dev/iavf/iavf_prototype.h

119

enum iavf_status iavf_aq_clear_all_wol_filters(struct iavf_hw *hw,

sys/dev/iavf/iavf_prototype.h

47

enum iavf_status iavf_init_adminq(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

48

enum iavf_status iavf_shutdown_adminq(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

49

enum iavf_status iavf_init_asq(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

50

enum iavf_status iavf_init_arq(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

51

enum iavf_status iavf_alloc_adminq_asq_ring(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

52

enum iavf_status iavf_alloc_adminq_arq_ring(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

53

enum iavf_status iavf_shutdown_asq(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

54

enum iavf_status iavf_shutdown_arq(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

55

u16 iavf_clean_asq(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

56

void iavf_free_adminq_asq(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

57

void iavf_free_adminq_arq(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

59

void iavf_adminq_init_ring_data(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

60

enum iavf_status iavf_clean_arq_element(struct iavf_hw *hw,

sys/dev/iavf/iavf_prototype.h

63

enum iavf_status iavf_asq_send_command(struct iavf_hw *hw,

sys/dev/iavf/iavf_prototype.h

68

bool iavf_asq_done(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

71

void iavf_debug_aq(struct iavf_hw *hw, enum iavf_debug_mask mask,

sys/dev/iavf/iavf_prototype.h

74

void iavf_idle_aq(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

75

bool iavf_check_asq_alive(struct iavf_hw *hw);

sys/dev/iavf/iavf_prototype.h

76

enum iavf_status iavf_aq_queue_shutdown(struct iavf_hw *hw, bool unloading);

sys/dev/iavf/iavf_prototype.h

78

enum iavf_status iavf_aq_get_rss_lut(struct iavf_hw *hw, u16 seid,

sys/dev/iavf/iavf_prototype.h

80

enum iavf_status iavf_aq_set_rss_lut(struct iavf_hw *hw, u16 seid,

sys/dev/iavf/iavf_prototype.h

82

enum iavf_status iavf_aq_get_rss_key(struct iavf_hw *hw,

sys/dev/iavf/iavf_prototype.h

85

enum iavf_status iavf_aq_set_rss_key(struct iavf_hw *hw,

sys/dev/iavf/iavf_prototype.h

88

const char *iavf_aq_str(struct iavf_hw *hw, enum iavf_admin_queue_err aq_err);

sys/dev/iavf/iavf_prototype.h

89

const char *iavf_stat_str(struct iavf_hw *hw, enum iavf_status stat_err);

sys/dev/iavf/iavf_prototype.h

91

enum iavf_status iavf_set_mac_type(struct iavf_hw *hw);

sys/dev/iavf/iavf_sysctls_common.h

122

sc->hw.debug_mask = iavf_shared_debug_mask;

sys/dev/iavf/iavf_txrx_iflib.c

417

wr32(vsi->hw, txr->tail, pidx);

sys/dev/iavf/iavf_txrx_iflib.c

437

wr32(vsi->hw, txr->tail, 0);

sys/dev/iavf/iavf_txrx_iflib.c

607

wr32(vsi->hw, rxr->tail, pidx);

sys/dev/iavf/iavf_vc_common.c

1236

__func__, iavf_vc_stat_str(&sc->hw, v_retval),

sys/dev/iavf/iavf_vc_common.c

132

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_vc_common.c

148

status = iavf_clean_arq_element(hw, &event, NULL);

sys/dev/iavf/iavf_vc_common.c

239

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_vc_common.c

254

status = iavf_clean_arq_element(hw, &event, NULL);

sys/dev/iavf/iavf_vc_common.c

291

iavf_vf_parse_hw_config(hw, sc->vf_res);

sys/dev/iavf/iavf_vc_common.c

618

wr32(&sc->hw, IAVF_VFGEN_RSTAT, VIRTCHNL_VFR_INPROGRESS);

sys/dev/iavf/iavf_vc_common.c

62

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_vc_common.c

73

if (!iavf_check_asq_alive(hw)) {

sys/dev/iavf/iavf_vc_common.c

741

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/iavf_vc_common.c

743

if (hw->mac.type == IAVF_MAC_VF)

sys/dev/iavf/iavf_vc_common.c

745

else if (hw->mac.type == IAVF_MAC_X722_VF)

sys/dev/iavf/iavf_vc_common.c

85

status = iavf_aq_send_msg_to_pf(hw, op, IAVF_SUCCESS, msg, len, NULL);

sys/dev/iavf/iavf_vc_common.c

90

iavf_stat_str(hw, status),

sys/dev/iavf/iavf_vc_common.c

91

iavf_aq_str(hw, hw->aq.asq_last_status));

sys/dev/iavf/iavf_vc_common.c

918

iavf_vc_stat_str(struct iavf_hw *hw, enum virtchnl_status_code stat_err)

sys/dev/iavf/iavf_vc_common.c

939

snprintf(hw->err_str, sizeof(hw->err_str), "%d", stat_err);

sys/dev/iavf/iavf_vc_common.c

940

return hw->err_str;

sys/dev/iavf/iavf_vc_common.h

65

const char * iavf_vc_stat_str(struct iavf_hw *hw,

sys/dev/iavf/if_iavf_iflib.c

1128

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/if_iavf_iflib.c

1133

oldreg = reg = rd32(hw, hw->aq.arq.len);

sys/dev/iavf/if_iavf_iflib.c

1158

wr32(hw, hw->aq.arq.len, reg);

sys/dev/iavf/if_iavf_iflib.c

1160

oldreg = reg = rd32(hw, hw->aq.asq.len);

sys/dev/iavf/if_iavf_iflib.c

1177

wr32(hw, hw->aq.asq.len, reg);

sys/dev/iavf/if_iavf_iflib.c

1197

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/if_iavf_iflib.c

1221

status = iavf_clean_arq_element(hw, &event, pending);

sys/dev/iavf/if_iavf_iflib.c

1236

reg = rd32(hw, IAVF_VFINT_ICR0_ENA1);

sys/dev/iavf/if_iavf_iflib.c

1238

wr32(hw, IAVF_VFINT_ICR0_ENA1, reg);

sys/dev/iavf/if_iavf_iflib.c

1255

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/if_iavf_iflib.c

1268

iavf_enable_adminq_irq(hw);

sys/dev/iavf/if_iavf_iflib.c

1375

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/if_iavf_iflib.c

1382

val = rd32(hw, IAVF_VFGEN_RSTAT) &

sys/dev/iavf/if_iavf_iflib.c

1588

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/if_iavf_iflib.c

1596

reg = rd32(hw, IAVF_VFINT_ICR01);

sys/dev/iavf/if_iavf_iflib.c

1601

mask = rd32(hw, IAVF_VFINT_ICR0_ENA1);

sys/dev/iavf/if_iavf_iflib.c

1611

wr32(hw, IAVF_VFINT_ICR0_ENA1, mask);

sys/dev/iavf/if_iavf_iflib.c

1612

iavf_enable_adminq_irq(hw);

sys/dev/iavf/if_iavf_iflib.c

1626

struct iavf_hw *hw = vsi->hw;

sys/dev/iavf/if_iavf_iflib.c

1629

iavf_enable_adminq_irq(hw);

sys/dev/iavf/if_iavf_iflib.c

1631

iavf_enable_queue_irq(hw, que->rxr.me);

sys/dev/iavf/if_iavf_iflib.c

1645

struct iavf_hw *hw = vsi->hw;

sys/dev/iavf/if_iavf_iflib.c

1649

iavf_disable_queue_irq(hw, que->rxr.me);

sys/dev/iavf/if_iavf_iflib.c

1660

iavf_enable_queue_irq(struct iavf_hw *hw, int id)

sys/dev/iavf/if_iavf_iflib.c

1667

wr32(hw, IAVF_VFINT_DYN_CTLN1(id), reg);

sys/dev/iavf/if_iavf_iflib.c

1678

iavf_disable_queue_irq(struct iavf_hw *hw, int id)

sys/dev/iavf/if_iavf_iflib.c

1680

wr32(hw, IAVF_VFINT_DYN_CTLN1(id),

sys/dev/iavf/if_iavf_iflib.c

1682

rd32(hw, IAVF_VFGEN_RSTAT);

sys/dev/iavf/if_iavf_iflib.c

1708

struct iavf_hw *hw = vsi->hw;

sys/dev/iavf/if_iavf_iflib.c

1718

wr32(hw, IAVF_VFINT_ITRN1(IAVF_RX_ITR,

sys/dev/iavf/if_iavf_iflib.c

258

struct iavf_hw *hw;

sys/dev/iavf/if_iavf_iflib.c

270

hw = &sc->hw;

sys/dev/iavf/if_iavf_iflib.c

273

vsi->hw = &sc->hw;

sys/dev/iavf/if_iavf_iflib.c

297

error = iavf_set_mac_type(hw);

sys/dev/iavf/if_iavf_iflib.c

304

error = iavf_reset_complete(hw);

sys/dev/iavf/if_iavf_iflib.c

354

iflib_set_mac(ctx, hw->mac.addr);

sys/dev/iavf/if_iavf_iflib.c

389

iavf_shutdown_adminq(hw);

sys/dev/iavf/if_iavf_iflib.c

467

struct iavf_hw *hw;

sys/dev/iavf/if_iavf_iflib.c

475

hw = &sc->hw;

sys/dev/iavf/if_iavf_iflib.c

494

iavf_enable_adminq_irq(hw);

sys/dev/iavf/if_iavf_iflib.c

518

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/if_iavf_iflib.c

533

iavf_disable_adminq_irq(hw);

sys/dev/iavf/if_iavf_iflib.c

534

status = iavf_shutdown_adminq(&sc->hw);

sys/dev/iavf/if_iavf_iflib.c

538

iavf_stat_str(hw, status));

sys/dev/iavf/if_iavf_iflib.c

702

wr32(vsi->hw, rxr->tail, 0);

sys/dev/iavf/if_iavf_iflib.c

721

struct iavf_hw *hw = &sc->hw;

sys/dev/iavf/if_iavf_iflib.c

732

error = iavf_reset_complete(hw);

sys/dev/iavf/if_iavf_iflib.c

738

if (!iavf_check_asq_alive(hw)) {

sys/dev/iavf/if_iavf_iflib.c

742

status = iavf_shutdown_adminq(hw);

sys/dev/iavf/if_iavf_iflib.c

746

__func__, iavf_stat_str(hw, status));

sys/dev/iavf/if_iavf_iflib.c

750

status = iavf_init_adminq(hw);

sys/dev/iavf/if_iavf_iflib.c

754

__func__, iavf_stat_str(hw, status));

sys/dev/iavf/if_iavf_iflib.c

763

if (!cmp_etheraddr(hw->mac.addr, tmpaddr) &&

sys/dev/iavf/if_iavf_iflib.c

765

error = iavf_del_mac_filter(sc, hw->mac.addr);

sys/dev/iavf/if_iavf_iflib.c

769

bcopy(tmpaddr, hw->mac.addr, ETH_ALEN);

sys/dev/iavf/if_iavf_iflib.c

772

error = iavf_add_mac_filter(sc, hw->mac.addr, 0);

sys/dev/iavf/if_iavf_iflib.c

775

iflib_set_mac(ctx, hw->mac.addr);

sys/dev/iavf/if_iavf_iflib.c

921

struct iavf_hw *hw = vsi->hw;

sys/dev/iavf/if_iavf_iflib.c

924

iavf_enable_queue_irq(hw, rx_que->msix - 1);

sys/dev/iavf/if_iavf_iflib.c

942

struct iavf_hw *hw = vsi->hw;

sys/dev/iavf/if_iavf_iflib.c

945

iavf_enable_queue_irq(hw, tx_que->msix - 1);

sys/dev/ice/ice_common.c

1007

void ice_set_umac_shared(struct ice_hw *hw)

sys/dev/ice/ice_common.c

1009

hw->umac_shared = true;

sys/dev/ice/ice_common.c

1016

int ice_init_hw(struct ice_hw *hw)

sys/dev/ice/ice_common.c

1023

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_common.c

1026

status = ice_set_mac_type(hw);

sys/dev/ice/ice_common.c

1030

hw->pf_id = (u8)(rd32(hw, PF_FUNC_RID) &

sys/dev/ice/ice_common.c

1034

status = ice_reset(hw, ICE_RESET_PFR);

sys/dev/ice/ice_common.c

1037

ice_get_itr_intrl_gran(hw);

sys/dev/ice/ice_common.c

1039

hw->fw_vsi_num = ICE_DFLT_VSI_INVAL;

sys/dev/ice/ice_common.c

1041

status = ice_create_all_ctrlq(hw);

sys/dev/ice/ice_common.c

1045

ice_fwlog_set_support_ena(hw);

sys/dev/ice/ice_common.c

1046

status = ice_fwlog_set(hw, &hw->fwlog_cfg);

sys/dev/ice/ice_common.c

1048

ice_debug(hw, ICE_DBG_INIT, "Failed to enable FW logging, status %d.\n",

sys/dev/ice/ice_common.c

1051

if (hw->fwlog_cfg.options & ICE_FWLOG_OPTION_REGISTER_ON_INIT) {

sys/dev/ice/ice_common.c

1052

status = ice_fwlog_register(hw);

sys/dev/ice/ice_common.c

1054

ice_debug(hw, ICE_DBG_INIT, "Failed to register for FW logging events, status %d.\n",

sys/dev/ice/ice_common.c

1057

status = ice_fwlog_unregister(hw);

sys/dev/ice/ice_common.c

1059

ice_debug(hw, ICE_DBG_INIT, "Failed to unregister for FW logging events, status %d.\n",

sys/dev/ice/ice_common.c

1064

status = ice_init_nvm(hw);

sys/dev/ice/ice_common.c

1068

if (ice_get_fw_mode(hw) == ICE_FW_MODE_ROLLBACK)

sys/dev/ice/ice_common.c

1069

ice_print_rollback_msg(hw);

sys/dev/ice/ice_common.c

1071

if (!hw->skip_clear_pf) {

sys/dev/ice/ice_common.c

1072

status = ice_clear_pf_cfg(hw);

sys/dev/ice/ice_common.c

1077

ice_clear_pxe_mode(hw);

sys/dev/ice/ice_common.c

1079

status = ice_get_caps(hw);

sys/dev/ice/ice_common.c

1083

if (!hw->port_info)

sys/dev/ice/ice_common.c

1084

hw->port_info = (struct ice_port_info *)

sys/dev/ice/ice_common.c

1085

ice_malloc(hw, sizeof(*hw->port_info));

sys/dev/ice/ice_common.c

1086

if (!hw->port_info) {

sys/dev/ice/ice_common.c

1091

hw->port_info->loopback_mode = ICE_AQC_SET_P_PARAMS_LOOPBACK_MODE_NORMAL;

sys/dev/ice/ice_common.c

1094

hw->port_info->hw = hw;

sys/dev/ice/ice_common.c

1097

status = ice_get_initial_sw_cfg(hw);

sys/dev/ice/ice_common.c

1101

hw->evb_veb = true;

sys/dev/ice/ice_common.c

1103

status = ice_sched_query_res_alloc(hw);

sys/dev/ice/ice_common.c

1105

ice_debug(hw, ICE_DBG_SCHED, "Failed to get scheduler allocated resources\n");

sys/dev/ice/ice_common.c

1108

ice_sched_get_psm_clk_freq(hw);

sys/dev/ice/ice_common.c

1111

status = ice_sched_init_port(hw->port_info);

sys/dev/ice/ice_common.c

1115

ice_malloc(hw, sizeof(*pcaps));

sys/dev/ice/ice_common.c

1122

status = ice_aq_get_phy_caps(hw->port_info, false,

sys/dev/ice/ice_common.c

1124

ice_free(hw, pcaps);

sys/dev/ice/ice_common.c

1126

ice_warn(hw, "Get PHY capabilities failed status = %d, continuing anyway\n",

sys/dev/ice/ice_common.c

1130

status = ice_aq_get_link_info(hw->port_info, false, NULL, NULL);

sys/dev/ice/ice_common.c

1134

if (!hw->sw_entry_point_layer) {

sys/dev/ice/ice_common.c

1135

ice_debug(hw, ICE_DBG_SCHED, "invalid sw entry point\n");

sys/dev/ice/ice_common.c

1139

INIT_LIST_HEAD(&hw->agg_list);

sys/dev/ice/ice_common.c

1141

if (!hw->max_burst_size)

sys/dev/ice/ice_common.c

1142

ice_cfg_rl_burst_size(hw, ICE_SCHED_DFLT_BURST_SIZE);

sys/dev/ice/ice_common.c

1143

status = ice_init_fltr_mgmt_struct(hw);

sys/dev/ice/ice_common.c

1150

mac_buf = ice_calloc(hw, 2,

sys/dev/ice/ice_common.c

1159

status = ice_aq_manage_mac_read(hw, mac_buf, mac_buf_len, NULL);

sys/dev/ice/ice_common.c

1160

ice_free(hw, mac_buf);

sys/dev/ice/ice_common.c

1166

status = ice_aq_set_mac_cfg(hw, ICE_AQ_SET_MAC_FRAME_SIZE_MAX, false,

sys/dev/ice/ice_common.c

1171

status = ice_init_hw_tbls(hw);

sys/dev/ice/ice_common.c

1174

ice_init_lock(&hw->tnl_lock);

sys/dev/ice/ice_common.c

1179

ice_cleanup_fltr_mgmt_struct(hw);

sys/dev/ice/ice_common.c

1181

ice_sched_cleanup_all(hw);

sys/dev/ice/ice_common.c

1183

ice_free(hw, hw->port_info);

sys/dev/ice/ice_common.c

1184

hw->port_info = NULL;

sys/dev/ice/ice_common.c

1186

ice_destroy_all_ctrlq(hw);

sys/dev/ice/ice_common.c

1198

void ice_deinit_hw(struct ice_hw *hw)

sys/dev/ice/ice_common.c

1200

ice_cleanup_fltr_mgmt_struct(hw);

sys/dev/ice/ice_common.c

1202

ice_sched_cleanup_all(hw);

sys/dev/ice/ice_common.c

1203

ice_sched_clear_agg(hw);

sys/dev/ice/ice_common.c

1204

ice_free_seg(hw);

sys/dev/ice/ice_common.c

1205

ice_free_hw_tbls(hw);

sys/dev/ice/ice_common.c

1206

ice_destroy_lock(&hw->tnl_lock);

sys/dev/ice/ice_common.c

1208

if (hw->port_info) {

sys/dev/ice/ice_common.c

1209

ice_free(hw, hw->port_info);

sys/dev/ice/ice_common.c

1210

hw->port_info = NULL;

sys/dev/ice/ice_common.c

1213

ice_destroy_all_ctrlq(hw);

sys/dev/ice/ice_common.c

1216

ice_clear_all_vsi_ctx(hw);

sys/dev/ice/ice_common.c

1223

int ice_check_reset(struct ice_hw *hw)

sys/dev/ice/ice_common.c

1231

grst_timeout = ((rd32(hw, GLGEN_RSTCTL) & GLGEN_RSTCTL_GRSTDEL_M) >>

sys/dev/ice/ice_common.c

1236

reg = rd32(hw, GLGEN_RSTAT);

sys/dev/ice/ice_common.c

1242

ice_debug(hw, ICE_DBG_INIT, "Global reset polling failed to complete.\n");

sys/dev/ice/ice_common.c

1254

uld_mask = ICE_RESET_DONE_MASK | (hw->func_caps.common_cap.iwarp ?

sys/dev/ice/ice_common.c

1261

reg = rd32(hw, GLNVM_ULD) & uld_mask;

sys/dev/ice/ice_common.c

1263

ice_debug(hw, ICE_DBG_INIT, "Global reset processes done. %d\n", cnt);

sys/dev/ice/ice_common.c

1270

ice_debug(hw, ICE_DBG_INIT, "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n",

sys/dev/ice/ice_common.c

1285

static int ice_pf_reset(struct ice_hw *hw)

sys/dev/ice/ice_common.c

1294

if ((rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_DEVSTATE_M) ||

sys/dev/ice/ice_common.c

1295

(rd32(hw, GLNVM_ULD) & ICE_RESET_DONE_MASK) ^ ICE_RESET_DONE_MASK) {

sys/dev/ice/ice_common.c

1297

if (ice_check_reset(hw))

sys/dev/ice/ice_common.c

1304

reg = rd32(hw, PFGEN_CTRL);

sys/dev/ice/ice_common.c

1306

wr32(hw, PFGEN_CTRL, (reg | PFGEN_CTRL_PFSWR_M));

sys/dev/ice/ice_common.c

1316

reg = rd32(hw, PFGEN_CTRL);

sys/dev/ice/ice_common.c

1324

ice_debug(hw, ICE_DBG_INIT, "PF reset polling failed to complete.\n");

sys/dev/ice/ice_common.c

134

ice_dump_phy_type(struct ice_hw *hw, u64 low, u64 high, const char *prefix)

sys/dev/ice/ice_common.c

1343

int ice_reset(struct ice_hw *hw, enum ice_reset_req req)

sys/dev/ice/ice_common.c

1349

return ice_pf_reset(hw);

sys/dev/ice/ice_common.c

1351

ice_debug(hw, ICE_DBG_INIT, "CoreR requested\n");

sys/dev/ice/ice_common.c

1355

ice_debug(hw, ICE_DBG_INIT, "GlobalR requested\n");

sys/dev/ice/ice_common.c

1362

val |= rd32(hw, GLGEN_RTRIG);

sys/dev/ice/ice_common.c

1363

wr32(hw, GLGEN_RTRIG, val);

sys/dev/ice/ice_common.c

1364

ice_flush(hw);

sys/dev/ice/ice_common.c

1367

return ice_check_reset(hw);

sys/dev/ice/ice_common.c

1379

ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)

sys/dev/ice/ice_common.c

138

ice_debug(hw, ICE_DBG_PHY, "%s: phy_type_low: 0x%016llx\n", prefix,

sys/dev/ice/ice_common.c

1391

wr32(hw, QRX_CONTEXT(i, rxq_index),

sys/dev/ice/ice_common.c

1394

ice_debug(hw, ICE_DBG_QCTX, "qrxdata[%d]: %08X\n", i,

sys/dev/ice/ice_common.c

1410

ice_copy_rxq_ctx_from_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)

sys/dev/ice/ice_common.c

1424

*ctx = rd32(hw, QRX_CONTEXT(i, rxq_index));

sys/dev/ice/ice_common.c

1426

ice_debug(hw, ICE_DBG_QCTX, "qrxdata[%d]: %08X\n", i, *ctx);

sys/dev/ice/ice_common.c

143

ice_debug(hw, ICE_DBG_PHY, "%s: bit(%d): %s\n",

sys/dev/ice/ice_common.c

1469

ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,

sys/dev/ice/ice_common.c

147

ice_debug(hw, ICE_DBG_PHY, "%s: phy_type_high: 0x%016llx\n", prefix,

sys/dev/ice/ice_common.c

1479

ice_set_ctx(hw, (u8 *)rlan_ctx, ctx_buf, ice_rlan_ctx_info);

sys/dev/ice/ice_common.c

1480

return ice_copy_rxq_ctx_to_hw(hw, ctx_buf, rxq_index);

sys/dev/ice/ice_common.c

1493

ice_read_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,

sys/dev/ice/ice_common.c

1502

status = ice_copy_rxq_ctx_from_hw(hw, ctx_buf, rxq_index);

sys/dev/ice/ice_common.c

1516

int ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index)

sys/dev/ice/ice_common.c

152

ice_debug(hw, ICE_DBG_PHY, "%s: bit(%d): %s\n",

sys/dev/ice/ice_common.c

1525

wr32(hw, QRX_CONTEXT(i, rxq_index), 0);

sys/dev/ice/ice_common.c

1575

ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,

sys/dev/ice/ice_common.c

1588

wr32(hw, GLTCLAN_CQ_CNTX(i, tx_cmpltnq_index),

sys/dev/ice/ice_common.c

1591

ice_debug(hw, ICE_DBG_QCTX, "cmpltnqdata[%d]: %08X\n", i,

sys/dev/ice/ice_common.c

1624

ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,

sys/dev/ice/ice_common.c

1630

ice_set_ctx(hw, (u8 *)tx_cmpltnq_ctx, ctx_buf, ice_tx_cmpltnq_ctx_info);

sys/dev/ice/ice_common.c

1631

return ice_copy_tx_cmpltnq_ctx_to_hw(hw, ctx_buf, tx_cmpltnq_index);

sys/dev/ice/ice_common.c

164

int ice_set_mac_type(struct ice_hw *hw)

sys/dev/ice/ice_common.c

1642

ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)

sys/dev/ice/ice_common.c

1651

wr32(hw, GLTCLAN_CQ_CNTX(i, tx_cmpltnq_index), 0);

sys/dev/ice/ice_common.c

166

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_common.c

1665

ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,

sys/dev/ice/ice_common.c

1678

wr32(hw, QTX_COMM_DBLQ_CNTX(i, tx_drbell_q_index),

sys/dev/ice/ice_common.c

168

if (hw->vendor_id != ICE_INTEL_VENDOR_ID)

sys/dev/ice/ice_common.c

1681

ice_debug(hw, ICE_DBG_QCTX, "tx_drbell_qdata[%d]: %08X\n", i,

sys/dev/ice/ice_common.c

171

switch (hw->device_id) {

sys/dev/ice/ice_common.c

1715

ice_write_tx_drbell_q_ctx(struct ice_hw *hw,

sys/dev/ice/ice_common.c

1721

ice_set_ctx(hw, (u8 *)tx_drbell_q_ctx, ctx_buf,

sys/dev/ice/ice_common.c

1723

return ice_copy_tx_drbell_q_ctx_to_hw(hw, ctx_buf, tx_drbell_q_index);

sys/dev/ice/ice_common.c

1734

ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index)

sys/dev/ice/ice_common.c

1743

wr32(hw, QTX_COMM_DBLQ_CNTX(i, tx_drbell_q_index), 0);

sys/dev/ice/ice_common.c

1754

static struct ice_ctl_q_info *ice_get_sbq(struct ice_hw *hw)

sys/dev/ice/ice_common.c

1756

if (!ice_is_generic_mac(hw))

sys/dev/ice/ice_common.c

1757

return &hw->adminq;

sys/dev/ice/ice_common.c

1758

return &hw->sbq;

sys/dev/ice/ice_common.c

1770

ice_sbq_send_cmd(struct ice_hw *hw, struct ice_sbq_cmd_desc *desc,

sys/dev/ice/ice_common.c

1773

return ice_sq_send_cmd(hw, ice_get_sbq(hw), (struct ice_aq_desc *)desc,

sys/dev/ice/ice_common.c

178

hw->mac_type = ICE_MAC_E810;

sys/dev/ice/ice_common.c

1787

ice_sbq_send_cmd_nolock(struct ice_hw *hw, struct ice_sbq_cmd_desc *desc,

sys/dev/ice/ice_common.c

1790

return ice_sq_send_cmd_nolock(hw, ice_get_sbq(hw),

sys/dev/ice/ice_common.c

1803

int ice_sbq_rw_reg_lp(struct ice_hw *hw, struct ice_sbq_msg_input *in,

sys/dev/ice/ice_common.c

1832

status = ice_sbq_send_cmd(hw, &desc, &msg, msg_len, NULL);

sys/dev/ice/ice_common.c

1834

status = ice_sbq_send_cmd_nolock(hw, &desc, &msg, msg_len,

sys/dev/ice/ice_common.c

1848

int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in, u16 flag)

sys/dev/ice/ice_common.c

1850

return ice_sbq_rw_reg_lp(hw, in, flag, true);

sys/dev/ice/ice_common.c

1857

void ice_sbq_lock(struct ice_hw *hw)

sys/dev/ice/ice_common.c

1859

ice_acquire_lock(&ice_get_sbq(hw)->sq_lock);

sys/dev/ice/ice_common.c

1866

void ice_sbq_unlock(struct ice_hw *hw)

sys/dev/ice/ice_common.c

1868

ice_release_lock(&ice_get_sbq(hw)->sq_lock);

sys/dev/ice/ice_common.c

1914

ice_sq_send_cmd_retry(struct ice_hw *hw, struct ice_ctl_q_info *cq,

sys/dev/ice/ice_common.c

1931

buf_cpy = (u8 *)ice_malloc(hw, buf_size);

sys/dev/ice/ice_common.c

1941

status = ice_sq_send_cmd(hw, cq, desc, buf, buf_size, cd);

sys/dev/ice/ice_common.c

1944

hw->adminq.sq_last_status != ICE_AQ_RC_EBUSY)

sys/dev/ice/ice_common.c

1959

ice_free(hw, buf_cpy);

sys/dev/ice/ice_common.c

1975

ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,

sys/dev/ice/ice_common.c

1978

return ice_sq_send_cmd_retry(hw, &hw->adminq, desc, buf, buf_size, cd);

sys/dev/ice/ice_common.c

1988

int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)

sys/dev/ice/ice_common.c

199

hw->mac_type = ICE_MAC_GENERIC;

sys/dev/ice/ice_common.c

1998

status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

2001

hw->fw_branch = resp->fw_branch;

sys/dev/ice/ice_common.c

2002

hw->fw_maj_ver = resp->fw_major;

sys/dev/ice/ice_common.c

2003

hw->fw_min_ver = resp->fw_minor;

sys/dev/ice/ice_common.c

2004

hw->fw_patch = resp->fw_patch;

sys/dev/ice/ice_common.c

2005

hw->fw_build = LE32_TO_CPU(resp->fw_build);

sys/dev/ice/ice_common.c

2006

hw->api_branch = resp->api_branch;

sys/dev/ice/ice_common.c

2007

hw->api_maj_ver = resp->api_major;

sys/dev/ice/ice_common.c

2008

hw->api_min_ver = resp->api_minor;

sys/dev/ice/ice_common.c

2009

hw->api_patch = resp->api_patch;

sys/dev/ice/ice_common.c

2024

ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,

sys/dev/ice/ice_common.c

2049

return ice_aq_send_cmd(hw, &desc, dv->driver_string, len, cd);

sys/dev/ice/ice_common.c

205

hw->mac_type = ICE_MAC_GENERIC_3K_E825;

sys/dev/ice/ice_common.c

2060

int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)

sys/dev/ice/ice_common.c

2072

return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_common.c

2102

ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,

sys/dev/ice/ice_common.c

2110

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_common.c

2122

status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

2157

if (!status || hw->adminq.sq_last_status == ICE_AQ_RC_EBUSY)

sys/dev/ice/ice_common.c

2173

ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number,

sys/dev/ice/ice_common.c

2179

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_common.c

2188

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

2201

ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,

sys/dev/ice/ice_common.c

2209

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_common.c

2211

status = ice_aq_req_res(hw, res, access, 0, &time_left, NULL);

sys/dev/ice/ice_common.c

2222

ice_debug(hw, ICE_DBG_RES, "resource %d acquire type %d failed.\n", res, access);

sys/dev/ice/ice_common.c

2229

status = ice_aq_req_res(hw, res, access, 0, &time_left, NULL);

sys/dev/ice/ice_common.c

2240

ice_debug(hw, ICE_DBG_RES, "resource acquire timed out.\n");

sys/dev/ice/ice_common.c

2245

ice_debug(hw, ICE_DBG_RES, "resource indicates no work to do.\n");

sys/dev/ice/ice_common.c

2247

ice_debug(hw, ICE_DBG_RES, "Warning: ICE_ERR_AQ_NO_WORK not expected\n");

sys/dev/ice/ice_common.c

225

hw->mac_type = ICE_MAC_E830;

sys/dev/ice/ice_common.c

2259

void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)

sys/dev/ice/ice_common.c

2264

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_common.c

2266

status = ice_aq_release_res(hw, res, 0, NULL);

sys/dev/ice/ice_common.c

2272

(total_delay < hw->adminq.sq_cmd_timeout)) {

sys/dev/ice/ice_common.c

2274

status = ice_aq_release_res(hw, res, 0, NULL);

sys/dev/ice/ice_common.c

228

hw->mac_type = ICE_MAC_UNKNOWN;

sys/dev/ice/ice_common.c

2291

ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,

sys/dev/ice/ice_common.c

2298

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_common.c

2314

return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_common.c

232

ice_debug(hw, ICE_DBG_INIT, "mac_type: %d\n", hw->mac_type);

sys/dev/ice/ice_common.c

2326

ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)

sys/dev/ice/ice_common.c

2333

buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);

sys/dev/ice/ice_common.c

2344

status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,

sys/dev/ice/ice_common.c

2353

ice_free(hw, buf);

sys/dev/ice/ice_common.c

2364

int ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)

sys/dev/ice/ice_common.c

2371

buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);

sys/dev/ice/ice_common.c

2381

status = ice_aq_alloc_free_res(hw, num, buf, buf_len,

sys/dev/ice/ice_common.c

2384

ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n");

sys/dev/ice/ice_common.c

2386

ice_free(hw, buf);

sys/dev/ice/ice_common.c

2399

static u32 ice_get_num_per_func(struct ice_hw *hw, u32 max)

sys/dev/ice/ice_common.c

2404

funcs = ice_hweight8(hw->dev_caps.common_cap.valid_functions &

sys/dev/ice/ice_common.c

242

bool ice_is_generic_mac(struct ice_hw *hw)

sys/dev/ice/ice_common.c

2421

ice_print_led_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,

sys/dev/ice/ice_common.c

2427

ice_debug(hw, ICE_DBG_INIT, "%s: led_pin_num = %u\n", prefix,

sys/dev/ice/ice_common.c

2430

ice_info(hw, "%s: led_pin_num = %u\n", prefix,

sys/dev/ice/ice_common.c

2438

ice_debug(hw, ICE_DBG_INIT, "%s: led[%u] = %u\n",

sys/dev/ice/ice_common.c

244

return (hw->mac_type == ICE_MAC_GENERIC ||

sys/dev/ice/ice_common.c

2441

ice_info(hw, "%s: led[%u] = %u\n", prefix, i,

sys/dev/ice/ice_common.c

245

hw->mac_type == ICE_MAC_GENERIC_3K ||

sys/dev/ice/ice_common.c

2454

ice_print_sdp_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,

sys/dev/ice/ice_common.c

246

hw->mac_type == ICE_MAC_GENERIC_3K_E825);

sys/dev/ice/ice_common.c

2460

ice_debug(hw, ICE_DBG_INIT, "%s: sdp_pin_num = %u\n", prefix,

sys/dev/ice/ice_common.c

2463

ice_info(hw, "%s: sdp_pin_num = %u\n", prefix,

sys/dev/ice/ice_common.c

2471

ice_debug(hw, ICE_DBG_INIT, "%s: sdp[%u] = %u\n",

sys/dev/ice/ice_common.c

2474

ice_info(hw, "%s: sdp[%u] = %u\n", prefix,

sys/dev/ice/ice_common.c

2493

ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,

sys/dev/ice/ice_common.c

2505

ice_debug(hw, ICE_DBG_INIT, "%s: switching_mode = %u\n", prefix,

sys/dev/ice/ice_common.c

2511

ice_debug(hw, ICE_DBG_INIT, "%s: mgmt_mode = %u\n", prefix,

sys/dev/ice/ice_common.c

2513

ice_debug(hw, ICE_DBG_INIT, "%s: mgmt_protocols_mctp = %u\n", prefix,

sys/dev/ice/ice_common.c

2518

ice_debug(hw, ICE_DBG_INIT, "%s: os2bmc = %u\n", prefix, caps->os2bmc);

sys/dev/ice/ice_common.c

2522

ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = 0x%x\n", prefix,

sys/dev/ice/ice_common.c

2527

ice_debug(hw, ICE_DBG_INIT, "%s: sr_iov_1_1 = %u\n", prefix,

sys/dev/ice/ice_common.c

2532

ice_debug(hw, ICE_DBG_INIT, "%s: vmdq = %u\n", prefix, caps->vmdq);

sys/dev/ice/ice_common.c

2536

ice_debug(hw, ICE_DBG_INIT, "%s: evb_802_1_qbg = %u\n", prefix, number);

sys/dev/ice/ice_common.c

2540

ice_debug(hw, ICE_DBG_INIT, "%s: evb_802_1_qbh = %u\n", prefix, number);

sys/dev/ice/ice_common.c

2546

ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %u\n", prefix, caps->dcb);

sys/dev/ice/ice_common.c

2547

ice_debug(hw, ICE_DBG_INIT, "%s: active_tc_bitmap = 0x%x\n", prefix,

sys/dev/ice/ice_common.c

2549

ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %u\n", prefix, caps->maxtc);

sys/dev/ice/ice_common.c

255

bool ice_is_e810(struct ice_hw *hw)

sys/dev/ice/ice_common.c

2553

ice_debug(hw, ICE_DBG_INIT, "%s: iscsi = %u\n", prefix, caps->iscsi);

sys/dev/ice/ice_common.c

2558

ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %u\n", prefix,

sys/dev/ice/ice_common.c

2560

ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %u\n", prefix,

sys/dev/ice/ice_common.c

2566

ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %u\n", prefix,

sys/dev/ice/ice_common.c

2568

ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %u\n", prefix,

sys/dev/ice/ice_common.c

257

return hw->mac_type == ICE_MAC_E810;

sys/dev/ice/ice_common.c

2574

ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %u\n", prefix,

sys/dev/ice/ice_common.c

2576

ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %u\n", prefix,

sys/dev/ice/ice_common.c

2582

ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %u\n", prefix,

sys/dev/ice/ice_common.c

2584

ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %u\n", prefix,

sys/dev/ice/ice_common.c

2591

ice_debug(hw, ICE_DBG_INIT, "%s: sec_rev_disabled = %d\n", prefix,

sys/dev/ice/ice_common.c

2596

ice_debug(hw, ICE_DBG_INIT, "%s: update_disabled = %d\n", prefix,

sys/dev/ice/ice_common.c

2601

ice_debug(hw, ICE_DBG_INIT, "%s: nvm_unified_update = %d\n", prefix,

sys/dev/ice/ice_common.c

2606

ice_debug(hw, ICE_DBG_INIT, "%s: netlist_auth = %d\n", prefix,

sys/dev/ice/ice_common.c

2611

ice_debug(hw, ICE_DBG_INIT, "%s: mgmt_cem = %u\n", prefix,

sys/dev/ice/ice_common.c

2616

ice_debug(hw, ICE_DBG_INIT, "%s: iwarp = %u\n", prefix, caps->iwarp);

sys/dev/ice/ice_common.c

2620

ice_debug(hw, ICE_DBG_INIT, "%s: roce_lag = %u\n",

sys/dev/ice/ice_common.c

2627

ice_debug(hw, ICE_DBG_INIT, "%s: led[%u] = 1\n", prefix, phys_id);

sys/dev/ice/ice_common.c

2634

ice_debug(hw, ICE_DBG_INIT, "%s: sdp[%u] = 1\n", prefix, phys_id);

sys/dev/ice/ice_common.c

2640

ice_debug(hw, ICE_DBG_INIT, "%s: wr_csr_prot = 0x%llX\n", prefix,

sys/dev/ice/ice_common.c

2650

ice_debug(hw, ICE_DBG_INIT, "%s: num_wol_proxy_fltr = %u\n", prefix,

sys/dev/ice/ice_common.c

2652

ice_debug(hw, ICE_DBG_INIT, "%s: wol_proxy_vsi_seid = %u\n", prefix,

sys/dev/ice/ice_common.c

2654

ice_debug(hw, ICE_DBG_INIT, "%s: apm_wol_support = %u\n",

sys/dev/ice/ice_common.c

2659

ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %u\n",

sys/dev/ice/ice_common.c

266

bool ice_is_e810t(struct ice_hw *hw)

sys/dev/ice/ice_common.c

2664

ice_debug(hw, ICE_DBG_INIT,

sys/dev/ice/ice_common.c

2670

ice_debug(hw, ICE_DBG_INIT,

sys/dev/ice/ice_common.c

268

switch (hw->device_id) {

sys/dev/ice/ice_common.c

2692

ice_debug(hw, ICE_DBG_INIT,

sys/dev/ice/ice_common.c

2696

ice_debug(hw, ICE_DBG_INIT,

sys/dev/ice/ice_common.c

270

switch (hw->subsystem_device_id) {

sys/dev/ice/ice_common.c

2700

ice_debug(hw, ICE_DBG_INIT,

sys/dev/ice/ice_common.c

2704

ice_debug(hw, ICE_DBG_INIT,

sys/dev/ice/ice_common.c

2708

ice_debug(hw, ICE_DBG_INIT,

sys/dev/ice/ice_common.c

2712

ice_debug(hw, ICE_DBG_INIT,

sys/dev/ice/ice_common.c

2723

ice_debug(hw, ICE_DBG_INIT, "%s: dyn_flattening_en = %d\n",

sys/dev/ice/ice_common.c

2728

ice_debug(hw, ICE_DBG_INIT, "%s: orom_recovery_update = %d\n",

sys/dev/ice/ice_common.c

2733

ice_debug(hw, ICE_DBG_INIT, "%s: next_cluster_id_support = %d\n",

sys/dev/ice/ice_common.c

2754

ice_recalc_port_limited_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps)

sys/dev/ice/ice_common.c

2759

if (hw->dev_caps.num_funcs > 4) {

sys/dev/ice/ice_common.c

2762

ice_debug(hw, ICE_DBG_INIT, "reducing maxtc to %u (based on #ports)\n",

sys/dev/ice/ice_common.c

2765

ice_debug(hw, ICE_DBG_INIT, "forcing RDMA off\n");

sys/dev/ice/ice_common.c

2772

if (caps == &hw->dev_caps.common_cap)

sys/dev/ice/ice_common.c

2773

ice_info(hw, "RDMA functionality is not available with the current device configuration.\n");

sys/dev/ice/ice_common.c

2786

ice_parse_vf_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,

sys/dev/ice/ice_common.c

2794

ice_debug(hw, ICE_DBG_INIT, "func caps: num_allocd_vfs = %u\n",

sys/dev/ice/ice_common.c

2796

ice_debug(hw, ICE_DBG_INIT, "func caps: vf_base_id = %u\n",

sys/dev/ice/ice_common.c

2809

ice_parse_vsi_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,

sys/dev/ice/ice_common.c

281

switch (hw->subsystem_device_id) {

sys/dev/ice/ice_common.c

2812

func_p->guar_num_vsi = ice_get_num_per_func(hw, ICE_MAX_VSI);

sys/dev/ice/ice_common.c

2813

ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi (fw) = %u\n",

sys/dev/ice/ice_common.c

2815

ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi = %u\n",

sys/dev/ice/ice_common.c

2834

ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,

sys/dev/ice/ice_common.c

2848

found = ice_parse_common_caps(hw, &func_p->common_cap,

sys/dev/ice/ice_common.c

2853

ice_parse_vf_func_caps(hw, func_p, &cap_resp[i]);

sys/dev/ice/ice_common.c

2856

ice_parse_vsi_func_caps(hw, func_p, &cap_resp[i]);

sys/dev/ice/ice_common.c

2861

ice_debug(hw, ICE_DBG_INIT, "func caps: unknown capability[%d]: 0x%x\n",

sys/dev/ice/ice_common.c

2867

ice_print_led_caps(hw, &func_p->common_cap, "func caps", true);

sys/dev/ice/ice_common.c

2868

ice_print_sdp_caps(hw, &func_p->common_cap, "func caps", true);

sys/dev/ice/ice_common.c

2870

ice_recalc_port_limited_caps(hw, &func_p->common_cap);

sys/dev/ice/ice_common.c

2882

ice_parse_valid_functions_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,

sys/dev/ice/ice_common.c

2888

ice_debug(hw, ICE_DBG_INIT, "dev caps: num_funcs = %u\n",

sys/dev/ice/ice_common.c

2902

ice_parse_vf_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,

sys/dev/ice/ice_common.c

2908

ice_debug(hw, ICE_DBG_INIT, "dev_caps: num_vfs_exposed = %u\n",

sys/dev/ice/ice_common.c

2921

ice_parse_vsi_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,

sys/dev/ice/ice_common.c

2927

ice_debug(hw, ICE_DBG_INIT, "dev caps: num_vsi_allocd_to_host = %u\n",

sys/dev/ice/ice_common.c

2940

ice_parse_nac_topo_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,

sys/dev/ice/ice_common.c

2946

ice_info(hw, "PF is configured in %s mode with IP instance ID %u\n",

sys/dev/ice/ice_common.c

2950

ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_primary = %d\n",

sys/dev/ice/ice_common.c

2952

ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_dual = %d\n",

sys/dev/ice/ice_common.c

2954

ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology id = %u\n",

sys/dev/ice/ice_common.c

2968

ice_parse_sensor_reading_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,

sys/dev/ice/ice_common.c

2973

ice_debug(hw, ICE_DBG_INIT,

sys/dev/ice/ice_common.c

2993

ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,

sys/dev/ice/ice_common.c

3007

found = ice_parse_common_caps(hw, &dev_p->common_cap,

sys/dev/ice/ice_common.c

301

bool ice_is_e830(struct ice_hw *hw)

sys/dev/ice/ice_common.c

3012

ice_parse_valid_functions_cap(hw, dev_p, &cap_resp[i]);

sys/dev/ice/ice_common.c

3015

ice_parse_vf_dev_caps(hw, dev_p, &cap_resp[i]);

sys/dev/ice/ice_common.c

3018

ice_parse_vsi_dev_caps(hw, dev_p, &cap_resp[i]);

sys/dev/ice/ice_common.c

3021

ice_parse_nac_topo_dev_caps(hw, dev_p, &cap_resp[i]);

sys/dev/ice/ice_common.c

3024

ice_parse_sensor_reading_cap(hw, dev_p, &cap_resp[i]);

sys/dev/ice/ice_common.c

3029

ice_debug(hw, ICE_DBG_INIT, "dev caps: unknown capability[%u]: 0x%x\n",

sys/dev/ice/ice_common.c

303

return hw->mac_type == ICE_MAC_E830;

sys/dev/ice/ice_common.c

3035

ice_print_led_caps(hw, &dev_p->common_cap, "dev caps", true);

sys/dev/ice/ice_common.c

3036

ice_print_sdp_caps(hw, &dev_p->common_cap, "dev caps", true);

sys/dev/ice/ice_common.c

3038

ice_recalc_port_limited_caps(hw, &dev_p->common_cap);

sys/dev/ice/ice_common.c

3049

ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,

sys/dev/ice/ice_common.c

3057

if (ice_aq_send_cmd(hw, &desc, NULL, 0, NULL))

sys/dev/ice/ice_common.c

3087

ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number,

sys/dev/ice/ice_common.c

3103

status = ice_aq_get_netlist_node(hw, &cmd,

sys/dev/ice/ice_common.c

312

bool ice_is_e823(struct ice_hw *hw)

sys/dev/ice/ice_common.c

3136

ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,

sys/dev/ice/ice_common.c

314

switch (hw->device_id) {

sys/dev/ice/ice_common.c

3150

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_common.c

3167

ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps)

sys/dev/ice/ice_common.c

3173

cbuf = ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);

sys/dev/ice/ice_common.c

3183

status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count,

sys/dev/ice/ice_common.c

3186

ice_parse_dev_caps(hw, dev_caps, cbuf, cap_count);

sys/dev/ice/ice_common.c

3187

ice_free(hw, cbuf);

sys/dev/ice/ice_common.c

3201

ice_discover_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_caps)

sys/dev/ice/ice_common.c

3207

cbuf = ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);

sys/dev/ice/ice_common.c

3217

status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count,

sys/dev/ice/ice_common.c

3220

ice_parse_func_caps(hw, func_caps, cbuf, cap_count);

sys/dev/ice/ice_common.c

3221

ice_free(hw, cbuf);

sys/dev/ice/ice_common.c

3230

void ice_set_safe_mode_caps(struct ice_hw *hw)

sys/dev/ice/ice_common.c

3232

struct ice_hw_func_caps *func_caps = &hw->func_caps;

sys/dev/ice/ice_common.c

3233

struct ice_hw_dev_caps *dev_caps = &hw->dev_caps;

sys/dev/ice/ice_common.c

3293

int ice_get_caps(struct ice_hw *hw)

sys/dev/ice/ice_common.c

3297

status = ice_discover_dev_caps(hw, &hw->dev_caps);

sys/dev/ice/ice_common.c

3301

return ice_discover_func_caps(hw, &hw->func_caps);

sys/dev/ice/ice_common.c

3314

ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,

sys/dev/ice/ice_common.c

3326

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

3335

static int ice_aq_clear_pxe_mode(struct ice_hw *hw)

sys/dev/ice/ice_common.c

3342

return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_common.c

3352

void ice_clear_pxe_mode(struct ice_hw *hw)

sys/dev/ice/ice_common.c

3354

if (ice_check_sq_alive(hw, &hw->adminq))

sys/dev/ice/ice_common.c

3355

ice_aq_clear_pxe_mode(hw);

sys/dev/ice/ice_common.c

337

bool ice_is_e825c(struct ice_hw *hw)

sys/dev/ice/ice_common.c

3375

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_common.c

339

switch (hw->device_id) {

sys/dev/ice/ice_common.c

3393

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

3403

bool ice_is_100m_speed_supported(struct ice_hw *hw)

sys/dev/ice/ice_common.c

3405

switch (hw->device_id) {

sys/dev/ice/ice_common.c

357

int ice_clear_pf_cfg(struct ice_hw *hw)

sys/dev/ice/ice_common.c

3617

ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,

sys/dev/ice/ice_common.c

3628

ice_debug(hw, ICE_DBG_PHY, "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",

sys/dev/ice/ice_common.c

363

return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_common.c

3638

ice_debug(hw, ICE_DBG_LINK, "set phy cfg\n");

sys/dev/ice/ice_common.c

3639

ice_debug(hw, ICE_DBG_LINK, " phy_type_low = 0x%llx\n",

sys/dev/ice/ice_common.c

3641

ice_debug(hw, ICE_DBG_LINK, " phy_type_high = 0x%llx\n",

sys/dev/ice/ice_common.c

3643

ice_debug(hw, ICE_DBG_LINK, " caps = 0x%x\n", cfg->caps);

sys/dev/ice/ice_common.c

3644

ice_debug(hw, ICE_DBG_LINK, " low_power_ctrl_an = 0x%x\n",

sys/dev/ice/ice_common.c

3646

ice_debug(hw, ICE_DBG_LINK, " eee_cap = 0x%x\n", cfg->eee_cap);

sys/dev/ice/ice_common.c

3647

ice_debug(hw, ICE_DBG_LINK, " eeer_value = 0x%x\n", cfg->eeer_value);

sys/dev/ice/ice_common.c

3648

ice_debug(hw, ICE_DBG_LINK, " link_fec_opt = 0x%x\n",

sys/dev/ice/ice_common.c

3651

status = ice_aq_send_cmd(hw, &desc, cfg, sizeof(*cfg), cd);

sys/dev/ice/ice_common.c

3653

if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE)

sys/dev/ice/ice_common.c

3682

struct ice_hw *hw;

sys/dev/ice/ice_common.c

3684

hw = pi->hw;

sys/dev/ice/ice_common.c

3686

ice_malloc(hw, sizeof(*pcaps));

sys/dev/ice/ice_common.c

3698

ice_free(hw, pcaps);

sys/dev/ice/ice_common.c

3809

ice_malloc(pi->hw, sizeof(*pcaps));

sys/dev/ice/ice_common.c

3818

ice_free(pi->hw, pcaps);

sys/dev/ice/ice_common.c

382

ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,

sys/dev/ice/ice_common.c

3825

ice_free(pi->hw, pcaps);

sys/dev/ice/ice_common.c

3869

struct ice_hw *hw;

sys/dev/ice/ice_common.c

3876

hw = pi->hw;

sys/dev/ice/ice_common.c

3879

ice_malloc(hw, sizeof(*pcaps));

sys/dev/ice/ice_common.c

3911

status = ice_aq_set_phy_cfg(hw, pi, &cfg, NULL);

sys/dev/ice/ice_common.c

3936

ice_free(hw, pcaps);

sys/dev/ice/ice_common.c

399

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_common.c

4016

struct ice_hw *hw;

sys/dev/ice/ice_common.c

4022

hw = pi->hw;

sys/dev/ice/ice_common.c

4025

ice_malloc(hw, sizeof(*pcaps));

sys/dev/ice/ice_common.c

4030

(ice_fw_supports_report_dflt_cfg(hw) ?

sys/dev/ice/ice_common.c

4064

if (!ice_fw_supports_fec_dis_auto(hw)) {

sys/dev/ice/ice_common.c

407

ice_debug(hw, ICE_DBG_LAN, "got invalid MAC address\n");

sys/dev/ice/ice_common.c

4080

if (fec == ICE_FEC_AUTO && ice_fw_supports_link_override(pi->hw) &&

sys/dev/ice/ice_common.c

4081

!ice_fw_supports_report_dflt_cfg(pi->hw)) {

sys/dev/ice/ice_common.c

4093

ice_free(hw, pcaps);

sys/dev/ice/ice_common.c

4121

ice_debug(pi->hw, ICE_DBG_LINK, "get link status error, status = %d\n",

sys/dev/ice/ice_common.c

414

ice_memcpy(hw->port_info->mac.lan_addr,

sys/dev/ice/ice_common.c

4157

status = ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

417

ice_memcpy(hw->port_info->mac.perm_addr,

sys/dev/ice/ice_common.c

4179

ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,

sys/dev/ice/ice_common.c

4192

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

4204

ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd)

sys/dev/ice/ice_common.c

4215

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

4231

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_common.c

4243

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

4262

ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,

sys/dev/ice/ice_common.c

4288

status = ice_aq_send_cmd(hw, &desc, data, length, cd);

sys/dev/ice/ice_common.c

4302

ice_aq_prog_topo_dev_nvm(struct ice_hw *hw,

sys/dev/ice/ice_common.c

4316

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

4331

ice_aq_read_topo_dev_nvm(struct ice_hw *hw,

sys/dev/ice/ice_common.c

4353

status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

4420

__ice_aq_get_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *params, bool set)

sys/dev/ice/ice_common.c

4439

if (!lut || !lut_size || !ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_common.c

4448

vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);

sys/dev/ice/ice_common.c

4469

status = ice_aq_send_cmd(hw, &desc, lut, lut_size, NULL);

sys/dev/ice/ice_common.c

4482

ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params)

sys/dev/ice/ice_common.c

4484

return __ice_aq_get_set_rss_lut(hw, get_params, false);

sys/dev/ice/ice_common.c

4495

ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params)

sys/dev/ice/ice_common.c

4497

return __ice_aq_get_set_rss_lut(hw, set_params, true);

sys/dev/ice/ice_common.c

4509

static int __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id,

sys/dev/ice/ice_common.c

4531

return ice_aq_send_cmd(hw, &desc, key, key_size, NULL);

sys/dev/ice/ice_common.c

4543

ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_common.c

4546

if (!ice_is_vsi_valid(hw, vsi_handle) || !key)

sys/dev/ice/ice_common.c

4549

return __ice_aq_get_set_rss_key(hw, ice_get_hw_vsi_num(hw, vsi_handle),

sys/dev/ice/ice_common.c

4562

ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_common.c

4565

if (!ice_is_vsi_valid(hw, vsi_handle) || !keys)

sys/dev/ice/ice_common.c

4568

return __ice_aq_get_set_rss_key(hw, ice_get_hw_vsi_num(hw, vsi_handle),

sys/dev/ice/ice_common.c

4594

ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,

sys/dev/ice/ice_common.c

4603

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_common.c

4628

return ice_aq_send_cmd(hw, &desc, qg_list, buf_size, cd);

sys/dev/ice/ice_common.c

4644

ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,

sys/dev/ice/ice_common.c

4655

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_common.c

4681

CPU_TO_LE16((vmvf_num + hw->func_caps.vf_base_id) &

sys/dev/ice/ice_common.c

4716

status = ice_aq_send_cmd(hw, &desc, qg_list, buf_size, cd);

sys/dev/ice/ice_common.c

4719

ice_debug(hw, ICE_DBG_SCHED, "VM%d disable failed %d\n",

sys/dev/ice/ice_common.c

4720

vmvf_num, hw->adminq.sq_last_status);

sys/dev/ice/ice_common.c

4722

ice_debug(hw, ICE_DBG_SCHED, "disable queue %d failed %d\n",

sys/dev/ice/ice_common.c

4724

hw->adminq.sq_last_status);

sys/dev/ice/ice_common.c

4747

ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move,

sys/dev/ice/ice_common.c

4788

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_common.c

4793

if (hw->adminq.sq_last_status == ICE_AQ_RC_EAGAIN &&

sys/dev/ice/ice_common.c

4811

ice_aq_add_rdma_qsets(struct ice_hw *hw, u8 num_qset_grps,

sys/dev/ice/ice_common.c

4820

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_common.c

4847

return ice_aq_send_cmd(hw, &desc, qset_list, buf_size, cd);

sys/dev/ice/ice_common.c

5044

ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,

sys/dev/ice/ice_common.c

5055

ice_debug(hw, ICE_DBG_QCTX, "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n",

sys/dev/ice/ice_common.c

5097

ice_aq_get_internal_data(struct ice_hw *hw, u16 cluster_id, u16 table_id,

sys/dev/ice/ice_common.c

5117

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_common.c

531

struct ice_hw *hw;

sys/dev/ice/ice_common.c

5356

ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle)

sys/dev/ice/ice_common.c

5361

vsi = ice_get_vsi_ctx(hw, vsi_handle);

sys/dev/ice/ice_common.c

538

hw = pi->hw;

sys/dev/ice/ice_common.c

5393

struct ice_hw *hw;

sys/dev/ice/ice_common.c

5402

hw = pi->hw;

sys/dev/ice/ice_common.c

5404

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_common.c

5409

q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handle);

sys/dev/ice/ice_common.c

541

!ice_fw_supports_report_dflt_cfg(hw))

sys/dev/ice/ice_common.c

5411

ice_debug(hw, ICE_DBG_SCHED, "Enaq: invalid queue handle %d\n",

sys/dev/ice/ice_common.c

5452

status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);

sys/dev/ice/ice_common.c

5454

ice_debug(hw, ICE_DBG_SCHED, "enable queue %d failed %d\n",

sys/dev/ice/ice_common.c

5456

hw->adminq.sq_last_status);

sys/dev/ice/ice_common.c

5466

status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node, NULL);

sys/dev/ice/ice_common.c

5499

struct ice_hw *hw;

sys/dev/ice/ice_common.c

5505

hw = pi->hw;

sys/dev/ice/ice_common.c

551

status = ice_aq_send_cmd(hw, &desc, pcaps, pcaps_size, cd);

sys/dev/ice/ice_common.c

5513

return ice_aq_dis_lan_txq(hw, 0, NULL, 0, rst_src,

sys/dev/ice/ice_common.c

5519

qg_list = (struct ice_aqc_dis_txq_item *)ice_malloc(hw, buf_size);

sys/dev/ice/ice_common.c

553

ice_debug(hw, ICE_DBG_LINK, "get phy caps dump\n");

sys/dev/ice/ice_common.c

5531

q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handles[i]);

sys/dev/ice/ice_common.c

5533

ice_debug(hw, ICE_DBG_SCHED, "invalid queue handle%d\n",

sys/dev/ice/ice_common.c

5538

ice_debug(hw, ICE_DBG_SCHED, "Err:handles %d %d\n",

sys/dev/ice/ice_common.c

5545

status = ice_aq_dis_lan_txq(hw, 1, qg_list, buf_size, rst_src,

sys/dev/ice/ice_common.c

5554

ice_free(hw, qg_list);

sys/dev/ice/ice_common.c

5578

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_common.c

5650

struct ice_hw *hw;

sys/dev/ice/ice_common.c

5656

hw = pi->hw;

sys/dev/ice/ice_common.c

5658

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_common.c

5662

buf = (struct ice_aqc_add_rdma_qset_data *)ice_malloc(hw, buf_size);

sys/dev/ice/ice_common.c

5692

status = ice_aq_add_rdma_qsets(hw, 1, buf, buf_size, NULL);

sys/dev/ice/ice_common.c

5694

ice_debug(hw, ICE_DBG_RDMA, "add RDMA qset failed\n");

sys/dev/ice/ice_common.c

5700

status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1,

sys/dev/ice/ice_common.c

5708

ice_free(hw, buf);

sys/dev/ice/ice_common.c

572

ice_dump_phy_type(hw, LE64_TO_CPU(pcaps->phy_type_low),

sys/dev/ice/ice_common.c

5724

struct ice_hw *hw;

sys/dev/ice/ice_common.c

5732

hw = pi->hw;

sys/dev/ice/ice_common.c

5735

qg_list = (struct ice_aqc_dis_txq_item *)ice_malloc(hw, qg_size);

sys/dev/ice/ice_common.c

575

ice_debug(hw, ICE_DBG_LINK, "%s: report_mode = 0x%x\n",

sys/dev/ice/ice_common.c

5754

status = ice_aq_dis_lan_txq(hw, 1, qg_list, qg_size,

sys/dev/ice/ice_common.c

5763

ice_free(hw, qg_list);

sys/dev/ice/ice_common.c

577

ice_debug(hw, ICE_DBG_LINK, "%s: caps = 0x%x\n", prefix, pcaps->caps);

sys/dev/ice/ice_common.c

5778

ice_aq_get_sensor_reading(struct ice_hw *hw, u8 sensor, u8 format,

sys/dev/ice/ice_common.c

578

ice_debug(hw, ICE_DBG_LINK, "%s: low_power_ctrl_an = 0x%x\n", prefix,

sys/dev/ice/ice_common.c

5794

status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

580

ice_debug(hw, ICE_DBG_LINK, "%s: eee_cap = 0x%x\n", prefix,

sys/dev/ice/ice_common.c

5811

static bool ice_is_main_vsi(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_common.c

5813

return vsi_handle == ICE_MAIN_VSI_HANDLE && hw->vsi_ctx[vsi_handle];

sys/dev/ice/ice_common.c

582

ice_debug(hw, ICE_DBG_LINK, "%s: eeer_value = 0x%x\n", prefix,

sys/dev/ice/ice_common.c

5824

ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw)

sys/dev/ice/ice_common.c

5830

ice_rm_sw_replay_rule_info(hw, sw);

sys/dev/ice/ice_common.c

5838

ice_sched_replay_agg_vsi_preinit(hw);

sys/dev/ice/ice_common.c

584

ice_debug(hw, ICE_DBG_LINK, "%s: link_fec_options = 0x%x\n", prefix,

sys/dev/ice/ice_common.c

5840

status = ice_sched_replay_root_node_bw(hw->port_info);

sys/dev/ice/ice_common.c

5844

return ice_sched_replay_tc_node_bw(hw->port_info);

sys/dev/ice/ice_common.c

5855

int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_common.c

5857

struct ice_switch_info *sw = hw->switch_info;

sys/dev/ice/ice_common.c

5858

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_common.c

586

ice_debug(hw, ICE_DBG_LINK, "%s: module_compliance_enforcement = 0x%x\n",

sys/dev/ice/ice_common.c

5861

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_common.c

5865

if (ice_is_main_vsi(hw, vsi_handle)) {

sys/dev/ice/ice_common.c

5866

status = ice_replay_pre_init(hw, sw);

sys/dev/ice/ice_common.c

5871

status = ice_replay_rss_cfg(hw, vsi_handle);

sys/dev/ice/ice_common.c

5875

status = ice_replay_vsi_all_fltr(hw, pi, vsi_handle);

sys/dev/ice/ice_common.c

5877

status = ice_replay_vsi_agg(hw, vsi_handle);

sys/dev/ice/ice_common.c

588

ice_debug(hw, ICE_DBG_LINK, "%s: extended_compliance_code = 0x%x\n",

sys/dev/ice/ice_common.c

5887

void ice_replay_post(struct ice_hw *hw)

sys/dev/ice/ice_common.c

5890

ice_rm_all_sw_replay_rule_info(hw);

sys/dev/ice/ice_common.c

5891

ice_sched_replay_agg(hw);

sys/dev/ice/ice_common.c

590

ice_debug(hw, ICE_DBG_LINK, "%s: module_type[0] = 0x%x\n", prefix,

sys/dev/ice/ice_common.c

5903

ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,

sys/dev/ice/ice_common.c

5906

u64 new_data = rd64(hw, reg) & (BIT_ULL(40) - 1);

sys/dev/ice/ice_common.c

592

ice_debug(hw, ICE_DBG_LINK, "%s: module_type[1] = 0x%x\n", prefix,

sys/dev/ice/ice_common.c

594

ice_debug(hw, ICE_DBG_LINK, "%s: module_type[2] = 0x%x\n", prefix,

sys/dev/ice/ice_common.c

5940

ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,

sys/dev/ice/ice_common.c

5945

new_data = rd32(hw, reg);

sys/dev/ice/ice_common.c

5993

ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded,

sys/dev/ice/ice_common.c

5999

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_common.c

6002

vsi_num = ice_get_hw_vsi_num(hw, vsi_handle);

sys/dev/ice/ice_common.c

6006

wr32(hw, GLV_REPC(vsi_num), 0);

sys/dev/ice/ice_common.c

6010

repc = rd32(hw, GLV_REPC(vsi_num));

sys/dev/ice/ice_common.c

6015

wr32(hw, GLV_REPC(vsi_num), 0);

sys/dev/ice/ice_common.c

6033

ice_aq_alternate_write(struct ice_hw *hw, u32 reg_addr0, u32 reg_val0,

sys/dev/ice/ice_common.c

604

ice_debug(hw, ICE_DBG_LINK, "%s: media_type = 0x%x\n", prefix,

sys/dev/ice/ice_common.c

6048

status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_common.c

6066

ice_aq_alternate_read(struct ice_hw *hw, u32 reg_addr0, u32 *reg_val0,

sys/dev/ice/ice_common.c

6082

status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_common.c

6103

ice_aq_alternate_write_done(struct ice_hw *hw, u8 bios_mode, bool *reset_needed)

sys/dev/ice/ice_common.c

6117

status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_common.c

6132

int ice_aq_alternate_clear(struct ice_hw *hw)

sys/dev/ice/ice_common.c

6139

status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_common.c

6153

ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,

sys/dev/ice/ice_common.c

6162

status = ice_aq_query_sched_elems(hw, 1, buf, buf_size, &num_elem_ret,

sys/dev/ice/ice_common.c

6165

ice_debug(hw, ICE_DBG_SCHED, "query element failed\n");

sys/dev/ice/ice_common.c

6173

enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw)

sys/dev/ice/ice_common.c

6181

fw_mode = rd32(hw, GL_MNG_FWSM) & E800_GL_MNG_FWSM_FW_MODES_M;

sys/dev/ice/ice_common.c

6200

ice_get_cur_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status)

sys/dev/ice/ice_common.c

6202

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_common.c

6210

ret = ice_acquire_nvm(hw, ICE_RES_READ);

sys/dev/ice/ice_common.c

6214

ret = ice_aq_read_nvm(hw, ICE_AQC_NVM_LLDP_PRESERVED_MOD_ID,

sys/dev/ice/ice_common.c

6227

ice_release_nvm(hw);

sys/dev/ice/ice_common.c

623

int ice_aq_get_phy_equalization(struct ice_hw *hw, u16 data_in, u16 op_code,

sys/dev/ice/ice_common.c

6240

ice_get_dflt_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status)

sys/dev/ice/ice_common.c

6242

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_common.c

6251

ret = ice_acquire_nvm(hw, ICE_RES_READ);

sys/dev/ice/ice_common.c

6256

ret = ice_aq_read_nvm(hw, ICE_AQC_NVM_START_POINT,

sys/dev/ice/ice_common.c

6273

ret = ice_aq_read_nvm(hw, ICE_AQC_NVM_START_POINT, loc_data,

sys/dev/ice/ice_common.c

6287

ret = ice_aq_read_nvm(hw, ICE_AQC_NVM_START_POINT, loc_data,

sys/dev/ice/ice_common.c

6300

ice_release_nvm(hw);

sys/dev/ice/ice_common.c

631

if (!hw || !output)

sys/dev/ice/ice_common.c

6319

ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,

sys/dev/ice/ice_common.c

6341

status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

6369

ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,

sys/dev/ice/ice_common.c

6396

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

6410

ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,

sys/dev/ice/ice_common.c

6422

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

6437

ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,

sys/dev/ice/ice_common.c

6449

status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

6466

static bool ice_is_fw_api_min_ver(struct ice_hw *hw, u8 maj, u8 min, u8 patch)

sys/dev/ice/ice_common.c

6468

if (hw->api_maj_ver == maj) {

sys/dev/ice/ice_common.c

6469

if (hw->api_min_ver > min)

sys/dev/ice/ice_common.c

647

err = ice_aq_send_cmd(hw, &desc, &buf,

sys/dev/ice/ice_common.c

6471

if (hw->api_min_ver == min && hw->api_patch >= patch)

sys/dev/ice/ice_common.c

6473

} else if (hw->api_maj_ver > maj) {

sys/dev/ice/ice_common.c

6490

static bool ice_is_fw_min_ver(struct ice_hw *hw, u8 branch, u8 maj, u8 min,

sys/dev/ice/ice_common.c

6493

if (hw->fw_branch == branch) {

sys/dev/ice/ice_common.c

6494

if (hw->fw_maj_ver > maj)

sys/dev/ice/ice_common.c

6496

if (hw->fw_maj_ver == maj) {

sys/dev/ice/ice_common.c

6497

if (hw->fw_min_ver > min)

sys/dev/ice/ice_common.c

6499

if (hw->fw_min_ver == min && hw->fw_patch >= patch)

sys/dev/ice/ice_common.c

6513

bool ice_fw_supports_link_override(struct ice_hw *hw)

sys/dev/ice/ice_common.c

6515

return ice_is_fw_api_min_ver(hw, ICE_FW_API_LINK_OVERRIDE_MAJ,

sys/dev/ice/ice_common.c

6532

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_common.c

6535

status = ice_get_pfa_module_tlv(hw, &tlv, &tlv_len,

sys/dev/ice/ice_common.c

6538

ice_debug(hw, ICE_DBG_INIT, "Failed to read link override TLV.\n");

sys/dev/ice/ice_common.c

6547

status = ice_read_sr_word(hw, tlv_start, &buf);

sys/dev/ice/ice_common.c

6549

ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");

sys/dev/ice/ice_common.c

655

#define ice_get_link_status_data_ver(hw) ((hw)->mac_type == ICE_MAC_E830 ? \

sys/dev/ice/ice_common.c

6558

status = ice_read_sr_word(hw, offset, &buf);

sys/dev/ice/ice_common.c

6560

ice_debug(hw, ICE_DBG_INIT, "Failed to read override phy config.\n");

sys/dev/ice/ice_common.c

6568

status = ice_read_sr_word(hw, (offset + i), &buf);

sys/dev/ice/ice_common.c

6570

ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");

sys/dev/ice/ice_common.c

6581

status = ice_read_sr_word(hw, (offset + i), &buf);

sys/dev/ice/ice_common.c

6583

ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");

sys/dev/ice/ice_common.c

6615

bool ice_is_fw_health_report_supported(struct ice_hw *hw)

sys/dev/ice/ice_common.c

6617

if (hw->api_maj_ver > ICE_FW_API_HEALTH_REPORT_MAJ)

sys/dev/ice/ice_common.c

6620

if (hw->api_maj_ver == ICE_FW_API_HEALTH_REPORT_MAJ) {

sys/dev/ice/ice_common.c

6621

if (hw->api_min_ver > ICE_FW_API_HEALTH_REPORT_MIN)

sys/dev/ice/ice_common.c

6623

if (hw->api_min_ver == ICE_FW_API_HEALTH_REPORT_MIN &&

sys/dev/ice/ice_common.c

6624

hw->api_patch >= ICE_FW_API_HEALTH_REPORT_PATCH)

sys/dev/ice/ice_common.c

664

static u16 ice_get_link_status_datalen(struct ice_hw *hw)

sys/dev/ice/ice_common.c

6641

ice_aq_set_health_status_config(struct ice_hw *hw, u8 event_source,

sys/dev/ice/ice_common.c

6654

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

666

return (ice_get_link_status_data_ver(hw) ==

sys/dev/ice/ice_common.c

6674

ice_aq_get_port_options(struct ice_hw *hw,

sys/dev/ice/ice_common.c

6695

status = ice_aq_send_cmd(hw, &desc, options,

sys/dev/ice/ice_common.c

6702

ice_debug(hw, ICE_DBG_PHY, "options: %x\n", *option_count);

sys/dev/ice/ice_common.c

6709

ice_debug(hw, ICE_DBG_PHY, "active idx: %x\n",

sys/dev/ice/ice_common.c

6720

ice_debug(hw, ICE_DBG_PHY, "pending idx: %x\n",

sys/dev/ice/ice_common.c

6728

ice_debug(hw, ICE_DBG_PHY, "pmds: %x max speed: %x\n",

sys/dev/ice/ice_common.c

6746

ice_aq_set_port_option(struct ice_hw *hw, u8 lport, u8 lport_valid,

sys/dev/ice/ice_common.c

6763

return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_common.c

6777

ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,

sys/dev/ice/ice_common.c

6796

return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_common.c

6803

bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw)

sys/dev/ice/ice_common.c

6805

if (hw->mac_type != ICE_MAC_E810 && hw->mac_type != ICE_MAC_GENERIC)

sys/dev/ice/ice_common.c

6808

return ice_is_fw_api_min_ver(hw, ICE_FW_API_LLDP_FLTR_MAJ,

sys/dev/ice/ice_common.c

6820

ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add)

sys/dev/ice/ice_common.c

6836

return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_common.c

6843

int ice_lldp_execute_pending_mib(struct ice_hw *hw)

sys/dev/ice/ice_common.c

6849

return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_common.c

6858

bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw)

sys/dev/ice/ice_common.c

6860

return ice_is_fw_api_min_ver(hw, ICE_FW_API_REPORT_DFLT_CFG_MAJ,

sys/dev/ice/ice_common.c

690

struct ice_hw *hw;

sys/dev/ice/ice_common.c

6907

bool ice_fw_supports_fec_dis_auto(struct ice_hw *hw)

sys/dev/ice/ice_common.c

6909

if (ice_is_e830(hw))

sys/dev/ice/ice_common.c

6911

return ice_is_fw_min_ver(hw, ICE_FW_VER_BRANCH_E810,

sys/dev/ice/ice_common.c

6915

ice_is_fw_min_ver(hw, ICE_FW_VER_BRANCH_E82X,

sys/dev/ice/ice_common.c

6927

bool ice_is_fw_auto_drop_supported(struct ice_hw *hw)

sys/dev/ice/ice_common.c

6929

if (hw->api_maj_ver >= ICE_FW_API_AUTO_DROP_MAJ &&

sys/dev/ice/ice_common.c

6930

hw->api_min_ver >= ICE_FW_API_AUTO_DROP_MIN)

sys/dev/ice/ice_common.c

696

hw = pi->hw;

sys/dev/ice/ice_common.c

708

status = ice_aq_send_cmd(hw, &desc, &link_data,

sys/dev/ice/ice_common.c

709

ice_get_link_status_datalen(hw), cd);

sys/dev/ice/ice_common.c

744

ice_debug(hw, ICE_DBG_LINK, "get link info\n");

sys/dev/ice/ice_common.c

745

ice_debug(hw, ICE_DBG_LINK, " link_speed = 0x%x\n", li->link_speed);

sys/dev/ice/ice_common.c

746

ice_debug(hw, ICE_DBG_LINK, " phy_type_low = 0x%llx\n",

sys/dev/ice/ice_common.c

748

ice_debug(hw, ICE_DBG_LINK, " phy_type_high = 0x%llx\n",

sys/dev/ice/ice_common.c

750

ice_debug(hw, ICE_DBG_LINK, " link_info = 0x%x\n", li->link_info);

sys/dev/ice/ice_common.c

751

ice_debug(hw, ICE_DBG_LINK, " link_cfg_err = 0x%x\n", li->link_cfg_err);

sys/dev/ice/ice_common.c

752

ice_debug(hw, ICE_DBG_LINK, " an_info = 0x%x\n", li->an_info);

sys/dev/ice/ice_common.c

753

ice_debug(hw, ICE_DBG_LINK, " ext_info = 0x%x\n", li->ext_info);

sys/dev/ice/ice_common.c

754

ice_debug(hw, ICE_DBG_LINK, " fec_info = 0x%x\n", li->fec_info);

sys/dev/ice/ice_common.c

755

ice_debug(hw, ICE_DBG_LINK, " lse_ena = 0x%x\n", li->lse_ena);

sys/dev/ice/ice_common.c

756

ice_debug(hw, ICE_DBG_LINK, " max_frame = 0x%x\n",

sys/dev/ice/ice_common.c

758

ice_debug(hw, ICE_DBG_LINK, " pacing = 0x%x\n", li->pacing);

sys/dev/ice/ice_common.c

779

ice_fill_tx_timer_and_fc_thresh(struct ice_hw *hw,

sys/dev/ice/ice_common.c

794

if ((hw)->mac_type == ICE_MAC_E830) {

sys/dev/ice/ice_common.c

796

val = rd32(hw, E830_PRTMAC_CL01_PAUSE_QUANTA);

sys/dev/ice/ice_common.c

801

val = rd32(hw, E830_PRTMAC_CL01_QUANTA_THRESH);

sys/dev/ice/ice_common.c

805

val = rd32(hw, E800_PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(E800_IDX_OF_LFC));

sys/dev/ice/ice_common.c

811

val = rd32(hw, E800_PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(E800_IDX_OF_LFC));

sys/dev/ice/ice_common.c

828

ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, bool auto_drop,

sys/dev/ice/ice_common.c

843

if (ice_is_fw_auto_drop_supported(hw) && auto_drop)

sys/dev/ice/ice_common.c

845

ice_fill_tx_timer_and_fc_thresh(hw, cmd);

sys/dev/ice/ice_common.c

847

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_common.c

854

int ice_init_fltr_mgmt_struct(struct ice_hw *hw)

sys/dev/ice/ice_common.c

859

hw->switch_info = (struct ice_switch_info *)

sys/dev/ice/ice_common.c

860

ice_malloc(hw, sizeof(*hw->switch_info));

sys/dev/ice/ice_common.c

862

sw = hw->switch_info;

sys/dev/ice/ice_common.c

870

status = ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);

sys/dev/ice/ice_common.c

872

ice_free(hw, hw->switch_info);

sys/dev/ice/ice_common.c

884

ice_cleanup_fltr_mgmt_single(struct ice_hw *hw, struct ice_switch_info *sw)

sys/dev/ice/ice_common.c

897

ice_free(hw, v_pos_map);

sys/dev/ice/ice_common.c

908

ice_free(hw, rg_entry);

sys/dev/ice/ice_common.c

921

ice_free(hw, lst_itr->lkups);

sys/dev/ice/ice_common.c

922

ice_free(hw, lst_itr);

sys/dev/ice/ice_common.c

933

ice_free(hw, lst_itr);

sys/dev/ice/ice_common.c

937

ice_free(hw, recps[i].root_buf);

sys/dev/ice/ice_common.c

939

ice_rm_sw_replay_rule_info(hw, sw);

sys/dev/ice/ice_common.c

940

ice_free(hw, sw->recp_list);

sys/dev/ice/ice_common.c

941

ice_free(hw, sw);

sys/dev/ice/ice_common.c

948

void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)

sys/dev/ice/ice_common.c

950

ice_cleanup_fltr_mgmt_single(hw, hw->switch_info);

sys/dev/ice/ice_common.c

960

static void ice_get_itr_intrl_gran(struct ice_hw *hw)

sys/dev/ice/ice_common.c

962

u8 max_agg_bw = (rd32(hw, GL_PWR_MODE_CTL) &

sys/dev/ice/ice_common.c

970

hw->itr_gran = ICE_ITR_GRAN_ABOVE_25;

sys/dev/ice/ice_common.c

971

hw->intrl_gran = ICE_INTRL_GRAN_ABOVE_25;

sys/dev/ice/ice_common.c

974

hw->itr_gran = ICE_ITR_GRAN_MAX_25;

sys/dev/ice/ice_common.c

975

hw->intrl_gran = ICE_INTRL_GRAN_MAX_25;

sys/dev/ice/ice_common.c

984

void ice_print_rollback_msg(struct ice_hw *hw)

sys/dev/ice/ice_common.c

990

orom = &hw->flash.orom;

sys/dev/ice/ice_common.c

991

nvm = &hw->flash.nvm;

sys/dev/ice/ice_common.c

996

ice_warn(hw,

sys/dev/ice/ice_common.c

998

nvm_str, hw->fw_maj_ver, hw->fw_min_ver);

sys/dev/ice/ice_common.h

100

ice_aq_get_internal_data(struct ice_hw *hw, u16 cluster_id, u16 table_id,

sys/dev/ice/ice_common.h

105

int ice_set_mac_type(struct ice_hw *hw);

sys/dev/ice/ice_common.h

121

ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,

sys/dev/ice/ice_common.h

124

ice_read_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,

sys/dev/ice/ice_common.h

126

int ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index);

sys/dev/ice/ice_common.h

128

ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index);

sys/dev/ice/ice_common.h

130

ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,

sys/dev/ice/ice_common.h

134

ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index);

sys/dev/ice/ice_common.h

136

ice_write_tx_drbell_q_ctx(struct ice_hw *hw,

sys/dev/ice/ice_common.h

142

ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params);

sys/dev/ice/ice_common.h

144

ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params);

sys/dev/ice/ice_common.h

146

ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_common.h

149

ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_common.h

152

ice_aq_add_lan_txq(struct ice_hw *hw, u8 count,

sys/dev/ice/ice_common.h

156

ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move,

sys/dev/ice/ice_common.h

163

ice_aq_add_rdma_qsets(struct ice_hw *hw, u8 num_qset_grps,

sys/dev/ice/ice_common.h

167

bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);

sys/dev/ice/ice_common.h

168

int ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);

sys/dev/ice/ice_common.h

172

ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,

sys/dev/ice/ice_common.h

178

ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,

sys/dev/ice/ice_common.h

180

int ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);

sys/dev/ice/ice_common.h

183

ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,

sys/dev/ice/ice_common.h

194

ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,

sys/dev/ice/ice_common.h

197

ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number,

sys/dev/ice/ice_common.h

203

ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,

sys/dev/ice/ice_common.h

206

ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,

sys/dev/ice/ice_common.h

209

int ice_clear_pf_cfg(struct ice_hw *hw);

sys/dev/ice/ice_common.h

211

ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,

sys/dev/ice/ice_common.h

213

bool ice_fw_supports_link_override(struct ice_hw *hw);

sys/dev/ice/ice_common.h

214

bool ice_fw_supports_fec_dis_auto(struct ice_hw *hw);

sys/dev/ice/ice_common.h

219

int ice_aq_get_phy_equalization(struct ice_hw *hw, u16 data_in, u16 op_code,

sys/dev/ice/ice_common.h

240

ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, bool auto_drop,

sys/dev/ice/ice_common.h

246

ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,

sys/dev/ice/ice_common.h

249

ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);

sys/dev/ice/ice_common.h

255

ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,

sys/dev/ice/ice_common.h

261

ice_aq_prog_topo_dev_nvm(struct ice_hw *hw,

sys/dev/ice/ice_common.h

265

ice_aq_read_topo_dev_nvm(struct ice_hw *hw,

sys/dev/ice/ice_common.h

271

ice_aq_get_port_options(struct ice_hw *hw,

sys/dev/ice/ice_common.h

277

ice_aq_set_port_option(struct ice_hw *hw, u8 lport, u8 lport_valid,

sys/dev/ice/ice_common.h

280

__ice_write_sr_word(struct ice_hw *hw, u32 offset, const u16 *data);

sys/dev/ice/ice_common.h

282

__ice_write_sr_buf(struct ice_hw *hw, u32 offset, u16 words, const u16 *data);

sys/dev/ice/ice_common.h

305

ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw);

sys/dev/ice/ice_common.h

306

int ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);

sys/dev/ice/ice_common.h

307

void ice_replay_post(struct ice_hw *hw);

sys/dev/ice/ice_common.h

309

ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle);

sys/dev/ice/ice_common.h

310

int ice_sbq_rw_reg_lp(struct ice_hw *hw, struct ice_sbq_msg_input *in,

sys/dev/ice/ice_common.h

312

void ice_sbq_lock(struct ice_hw *hw);

sys/dev/ice/ice_common.h

313

void ice_sbq_unlock(struct ice_hw *hw);

sys/dev/ice/ice_common.h

314

int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in, u16 flag);

sys/dev/ice/ice_common.h

316

ice_aq_get_sensor_reading(struct ice_hw *hw, u8 sensor, u8 format,

sys/dev/ice/ice_common.h

320

ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,

sys/dev/ice/ice_common.h

323

ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,

sys/dev/ice/ice_common.h

326

ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded,

sys/dev/ice/ice_common.h

328

enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw);

sys/dev/ice/ice_common.h

329

void ice_print_rollback_msg(struct ice_hw *hw);

sys/dev/ice/ice_common.h

330

bool ice_is_generic_mac(struct ice_hw *hw);

sys/dev/ice/ice_common.h

331

bool ice_is_e810(struct ice_hw *hw);

sys/dev/ice/ice_common.h

332

bool ice_is_e810t(struct ice_hw *hw);

sys/dev/ice/ice_common.h

333

bool ice_is_e830(struct ice_hw *hw);

sys/dev/ice/ice_common.h

334

bool ice_is_e825c(struct ice_hw *hw);

sys/dev/ice/ice_common.h

335

bool ice_is_e823(struct ice_hw *hw);

sys/dev/ice/ice_common.h

337

ice_aq_alternate_write(struct ice_hw *hw, u32 reg_addr0, u32 reg_val0,

sys/dev/ice/ice_common.h

340

ice_aq_alternate_read(struct ice_hw *hw, u32 reg_addr0, u32 *reg_val0,

sys/dev/ice/ice_common.h

343

ice_aq_alternate_write_done(struct ice_hw *hw, u8 bios_mode,

sys/dev/ice/ice_common.h

345

int ice_aq_alternate_clear(struct ice_hw *hw);

sys/dev/ice/ice_common.h

347

ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,

sys/dev/ice/ice_common.h

350

ice_get_cur_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status);

sys/dev/ice/ice_common.h

352

ice_get_dflt_lldp_persist_status(struct ice_hw *hw, u32 *lldp_status);

sys/dev/ice/ice_common.h

354

ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,

sys/dev/ice/ice_common.h

357

ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,

sys/dev/ice/ice_common.h

359

bool ice_is_100m_speed_supported(struct ice_hw *hw);

sys/dev/ice/ice_common.h

360

int ice_get_netlist_ver_info(struct ice_hw *hw, struct ice_netlist_info *netlist);

sys/dev/ice/ice_common.h

362

ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,

sys/dev/ice/ice_common.h

364

bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);

sys/dev/ice/ice_common.h

366

ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);

sys/dev/ice/ice_common.h

367

int ice_lldp_execute_pending_mib(struct ice_hw *hw);

sys/dev/ice/ice_common.h

369

ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,

sys/dev/ice/ice_common.h

373

ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,

sys/dev/ice/ice_common.h

377

ice_aq_set_health_status_config(struct ice_hw *hw, u8 event_source,

sys/dev/ice/ice_common.h

379

bool ice_is_fw_health_report_supported(struct ice_hw *hw);

sys/dev/ice/ice_common.h

380

bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw);

sys/dev/ice/ice_common.h

382

bool ice_is_fw_auto_drop_supported(struct ice_hw *hw);

sys/dev/ice/ice_common.h

54

void ice_idle_aq(struct ice_hw *hw, struct ice_ctl_q_info *cq);

sys/dev/ice/ice_common.h

55

bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq);

sys/dev/ice/ice_common.h

57

int ice_init_fltr_mgmt_struct(struct ice_hw *hw);

sys/dev/ice/ice_common.h

58

void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw);

sys/dev/ice/ice_common.h

59

void ice_set_umac_shared(struct ice_hw *hw);

sys/dev/ice/ice_common.h

60

int ice_init_hw(struct ice_hw *hw);

sys/dev/ice/ice_common.h

61

void ice_deinit_hw(struct ice_hw *hw);

sys/dev/ice/ice_common.h

62

int ice_check_reset(struct ice_hw *hw);

sys/dev/ice/ice_common.h

63

int ice_reset(struct ice_hw *hw, enum ice_reset_req req);

sys/dev/ice/ice_common.h

64

int ice_create_all_ctrlq(struct ice_hw *hw);

sys/dev/ice/ice_common.h

65

int ice_init_all_ctrlq(struct ice_hw *hw);

sys/dev/ice/ice_common.h

66

void ice_shutdown_all_ctrlq(struct ice_hw *hw, bool unloading);

sys/dev/ice/ice_common.h

67

void ice_destroy_all_ctrlq(struct ice_hw *hw);

sys/dev/ice/ice_common.h

69

ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,

sys/dev/ice/ice_common.h

75

ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,

sys/dev/ice/ice_common.h

77

void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);

sys/dev/ice/ice_common.h

79

ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);

sys/dev/ice/ice_common.h

81

ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);

sys/dev/ice/ice_common.h

83

ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,

sys/dev/ice/ice_common.h

87

ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,

sys/dev/ice/ice_common.h

91

ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,

sys/dev/ice/ice_common.h

94

void ice_clear_pxe_mode(struct ice_hw *hw);

sys/dev/ice/ice_common.h

95

int ice_get_caps(struct ice_hw *hw);

sys/dev/ice/ice_common.h

97

void ice_set_safe_mode_caps(struct ice_hw *hw);

sys/dev/ice/ice_controlq.c

1000

bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

1005

return rd32(hw, cq->sq.head) == cq->sq.next_to_use;

sys/dev/ice/ice_controlq.c

1022

ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,

sys/dev/ice/ice_controlq.c

1035

if (hw->reset_ongoing)

sys/dev/ice/ice_controlq.c

1041

ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send queue not initialized.\n");

sys/dev/ice/ice_controlq.c

1053

ice_debug(hw, ICE_DBG_AQ_MSG, "Invalid buffer size for Control Send queue: %d.\n",

sys/dev/ice/ice_controlq.c

106

bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

1064

val = rd32(hw, cq->sq.head);

sys/dev/ice/ice_controlq.c

1066

ice_debug(hw, ICE_DBG_AQ_MSG, "head overrun at %d in the Control Send Queue ring\n",

sys/dev/ice/ice_controlq.c

1077

if (ice_clean_sq(hw, cq) == 0) {

sys/dev/ice/ice_controlq.c

1078

ice_debug(hw, ICE_DBG_AQ_MSG, "Error: Control Send Queue is full.\n");

sys/dev/ice/ice_controlq.c

110

return (rd32(hw, cq->sq.len) & (cq->sq.len_mask |

sys/dev/ice/ice_controlq.c

1107

ice_debug(hw, ICE_DBG_AQ_DESC, "ATQ: Control Send queue desc and buffer:\n");

sys/dev/ice/ice_controlq.c

1108

ice_debug_cq(hw, cq, (void *)desc_on_ring, buf, buf_size, false);

sys/dev/ice/ice_controlq.c

1113

wr32(hw, cq->sq.tail, cq->sq.next_to_use);

sys/dev/ice/ice_controlq.c

1114

ice_flush(hw);

sys/dev/ice/ice_controlq.c

1122

if (ice_sq_done(hw, cq))

sys/dev/ice/ice_controlq.c

1130

if (ice_sq_done(hw, cq)) {

sys/dev/ice/ice_controlq.c

1138

ice_debug(hw, ICE_DBG_AQ_MSG, "Return len %d > than buf len %d\n",

sys/dev/ice/ice_controlq.c

1148

ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send Queue command 0x%04X completed with error 0x%X\n",

sys/dev/ice/ice_controlq.c

1161

ice_debug(hw, ICE_DBG_AQ_MSG, "ATQ: desc and buffer writeback:\n");

sys/dev/ice/ice_controlq.c

1162

ice_debug_cq(hw, cq, (void *)desc, buf, buf_size, true);

sys/dev/ice/ice_controlq.c

1171

if (rd32(hw, cq->rq.len) & cq->rq.len_crit_mask ||

sys/dev/ice/ice_controlq.c

1172

rd32(hw, cq->sq.len) & cq->sq.len_crit_mask) {

sys/dev/ice/ice_controlq.c

1173

ice_debug(hw, ICE_DBG_AQ_MSG, "Critical FW error.\n");

sys/dev/ice/ice_controlq.c

1176

ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send Queue Writeback timeout.\n");

sys/dev/ice/ice_controlq.c

1199

ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,

sys/dev/ice/ice_controlq.c

1206

if (hw->reset_ongoing)

sys/dev/ice/ice_controlq.c

1210

status = ice_sq_send_cmd_nolock(hw, cq, desc, buf, buf_size, cd);

sys/dev/ice/ice_controlq.c

123

ice_alloc_ctrlq_sq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

1243

ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,

sys/dev/ice/ice_controlq.c

1263

ice_debug(hw, ICE_DBG_AQ_MSG, "Control Receive queue not initialized.\n");

sys/dev/ice/ice_controlq.c

1269

ntu = (u16)(rd32(hw, cq->rq.head) & cq->rq.head_mask);

sys/dev/ice/ice_controlq.c

127

cq->sq.desc_buf.va = ice_alloc_dma_mem(hw, &cq->sq.desc_buf, size);

sys/dev/ice/ice_controlq.c

1285

ice_debug(hw, ICE_DBG_AQ_MSG, "Control Receive Queue Event 0x%04X received with error 0x%X\n",

sys/dev/ice/ice_controlq.c

1295

ice_debug(hw, ICE_DBG_AQ_DESC, "ARQ: desc and buffer:\n");

sys/dev/ice/ice_controlq.c

1296

ice_debug_cq(hw, cq, (void *)desc, e->msg_buf, cq->rq_buf_size, true);

sys/dev/ice/ice_controlq.c

1312

wr32(hw, cq->rq.tail, ntc);

sys/dev/ice/ice_controlq.c

1324

ntu = (u16)(rd32(hw, cq->rq.head) & cq->rq.head_mask);

sys/dev/ice/ice_controlq.c

140

ice_alloc_ctrlq_rq_ring(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

144

cq->rq.desc_buf.va = ice_alloc_dma_mem(hw, &cq->rq.desc_buf, size);

sys/dev/ice/ice_controlq.c

158

static void ice_free_cq_ring(struct ice_hw *hw, struct ice_ctl_q_ring *ring)

sys/dev/ice/ice_controlq.c

160

ice_free_dma_mem(hw, &ring->desc_buf);

sys/dev/ice/ice_controlq.c

169

ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

176

cq->rq.dma_head = ice_calloc(hw, cq->num_rq_entries,

sys/dev/ice/ice_controlq.c

188

bi->va = ice_alloc_dma_mem(hw, bi, cq->rq_buf_size);

sys/dev/ice/ice_controlq.c

219

ice_free_dma_mem(hw, &cq->rq.r.rq_bi[i]);

sys/dev/ice/ice_controlq.c

221

ice_free(hw, cq->rq.dma_head);

sys/dev/ice/ice_controlq.c

233

ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

238

cq->sq.dma_head = ice_calloc(hw, cq->num_sq_entries,

sys/dev/ice/ice_controlq.c

249

bi->va = ice_alloc_dma_mem(hw, bi, cq->sq_buf_size);

sys/dev/ice/ice_controlq.c

259

ice_free_dma_mem(hw, &cq->sq.r.sq_bi[i]);

sys/dev/ice/ice_controlq.c

261

ice_free(hw, cq->sq.dma_head);

sys/dev/ice/ice_controlq.c

268

ice_cfg_cq_regs(struct ice_hw *hw, struct ice_ctl_q_ring *ring, u16 num_entries)

sys/dev/ice/ice_controlq.c

271

wr32(hw, ring->head, 0);

sys/dev/ice/ice_controlq.c

272

wr32(hw, ring->tail, 0);

sys/dev/ice/ice_controlq.c

275

wr32(hw, ring->len, (num_entries | ring->len_ena_mask));

sys/dev/ice/ice_controlq.c

276

wr32(hw, ring->bal, ICE_LO_DWORD(ring->desc_buf.pa));

sys/dev/ice/ice_controlq.c

277

wr32(hw, ring->bah, ICE_HI_DWORD(ring->desc_buf.pa));

sys/dev/ice/ice_controlq.c

280

if (rd32(hw, ring->bal) != ICE_LO_DWORD(ring->desc_buf.pa))

sys/dev/ice/ice_controlq.c

294

ice_cfg_sq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

296

return ice_cfg_cq_regs(hw, &cq->sq, cq->num_sq_entries);

sys/dev/ice/ice_controlq.c

307

ice_cfg_rq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

311

status = ice_cfg_cq_regs(hw, &cq->rq, cq->num_rq_entries);

sys/dev/ice/ice_controlq.c

316

wr32(hw, cq->rq.tail, (u32)(cq->num_rq_entries - 1));

sys/dev/ice/ice_controlq.c

321

#define ICE_FREE_CQ_BUFS(hw, qi, ring) \

sys/dev/ice/ice_controlq.c

329

ice_free_dma_mem((hw), \

sys/dev/ice/ice_controlq.c

333

ice_free(hw, (qi)->ring.dma_head); \

sys/dev/ice/ice_controlq.c

350

static int ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

354

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_controlq.c

372

ret_code = ice_alloc_ctrlq_sq_ring(hw, cq);

sys/dev/ice/ice_controlq.c

377

ret_code = ice_alloc_sq_bufs(hw, cq);

sys/dev/ice/ice_controlq.c

382

ret_code = ice_cfg_sq_regs(hw, cq);

sys/dev/ice/ice_controlq.c

391

ICE_FREE_CQ_BUFS(hw, cq, sq);

sys/dev/ice/ice_controlq.c

392

ice_free_cq_ring(hw, &cq->sq);

sys/dev/ice/ice_controlq.c

412

static int ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

416

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_controlq.c

434

ret_code = ice_alloc_ctrlq_rq_ring(hw, cq);

sys/dev/ice/ice_controlq.c

439

ret_code = ice_alloc_rq_bufs(hw, cq);

sys/dev/ice/ice_controlq.c

444

ret_code = ice_cfg_rq_regs(hw, cq);

sys/dev/ice/ice_controlq.c

453

ICE_FREE_CQ_BUFS(hw, cq, rq);

sys/dev/ice/ice_controlq.c

454

ice_free_cq_ring(hw, &cq->rq);

sys/dev/ice/ice_controlq.c

468

ice_shutdown_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

472

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_controlq.c

482

wr32(hw, cq->sq.head, 0);

sys/dev/ice/ice_controlq.c

483

wr32(hw, cq->sq.tail, 0);

sys/dev/ice/ice_controlq.c

484

wr32(hw, cq->sq.len, 0);

sys/dev/ice/ice_controlq.c

485

wr32(hw, cq->sq.bal, 0);

sys/dev/ice/ice_controlq.c

486

wr32(hw, cq->sq.bah, 0);

sys/dev/ice/ice_controlq.c

491

ICE_FREE_CQ_BUFS(hw, cq, sq);

sys/dev/ice/ice_controlq.c

492

ice_free_cq_ring(hw, &cq->sq);

sys/dev/ice/ice_controlq.c

507

static bool ice_aq_ver_check(struct ice_hw *hw)

sys/dev/ice/ice_controlq.c

509

u8 exp_fw_api_ver_major = EXP_FW_API_VER_MAJOR_BY_MAC(hw);

sys/dev/ice/ice_controlq.c

510

u8 exp_fw_api_ver_minor = EXP_FW_API_VER_MINOR_BY_MAC(hw);

sys/dev/ice/ice_controlq.c

512

if (hw->api_maj_ver > exp_fw_api_ver_major) {

sys/dev/ice/ice_controlq.c

514

ice_warn(hw, "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");

sys/dev/ice/ice_controlq.c

516

} else if (hw->api_maj_ver == exp_fw_api_ver_major) {

sys/dev/ice/ice_controlq.c

517

if (hw->api_min_ver > (exp_fw_api_ver_minor + 2))

sys/dev/ice/ice_controlq.c

518

ice_info(hw, "The driver for the device detected a newer version (%u.%u) of the NVM image than expected (%u.%u). Please install the most recent version of the network driver.\n",

sys/dev/ice/ice_controlq.c

519

hw->api_maj_ver, hw->api_min_ver,

sys/dev/ice/ice_controlq.c

521

else if ((hw->api_min_ver + 2) < exp_fw_api_ver_minor)

sys/dev/ice/ice_controlq.c

522

ice_info(hw, "The driver for the device detected an older version (%u.%u) of the NVM image than expected (%u.%u). Please update the NVM image.\n",

sys/dev/ice/ice_controlq.c

523

hw->api_maj_ver, hw->api_min_ver,

sys/dev/ice/ice_controlq.c

527

ice_info(hw, "The driver for the device detected an older version (%u.%u) of the NVM image than expected (%u.%u). Please update the NVM image.\n",

sys/dev/ice/ice_controlq.c

528

hw->api_maj_ver, hw->api_min_ver,

sys/dev/ice/ice_controlq.c

542

ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

546

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_controlq.c

556

wr32(hw, cq->rq.head, 0);

sys/dev/ice/ice_controlq.c

557

wr32(hw, cq->rq.tail, 0);

sys/dev/ice/ice_controlq.c

558

wr32(hw, cq->rq.len, 0);

sys/dev/ice/ice_controlq.c

559

wr32(hw, cq->rq.bal, 0);

sys/dev/ice/ice_controlq.c

560

wr32(hw, cq->rq.bah, 0);

sys/dev/ice/ice_controlq.c

566

ICE_FREE_CQ_BUFS(hw, cq, rq);

sys/dev/ice/ice_controlq.c

567

ice_free_cq_ring(hw, &cq->rq);

sys/dev/ice/ice_controlq.c

579

void ice_idle_aq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

581

wr32(hw, cq->sq.len, 0);

sys/dev/ice/ice_controlq.c

582

wr32(hw, cq->rq.len, 0);

sys/dev/ice/ice_controlq.c

591

static int ice_init_check_adminq(struct ice_hw *hw)

sys/dev/ice/ice_controlq.c

593

struct ice_ctl_q_info *cq = &hw->adminq;

sys/dev/ice/ice_controlq.c

596

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_controlq.c

598

status = ice_aq_get_fw_ver(hw, NULL);

sys/dev/ice/ice_controlq.c

602

if (!ice_aq_ver_check(hw)) {

sys/dev/ice/ice_controlq.c

610

ice_shutdown_rq(hw, cq);

sys/dev/ice/ice_controlq.c

611

ice_shutdown_sq(hw, cq);

sys/dev/ice/ice_controlq.c

62

static void ice_adminq_init_regs(struct ice_hw *hw)

sys/dev/ice/ice_controlq.c

629

static int ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type)

sys/dev/ice/ice_controlq.c

634

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_controlq.c

638

ice_adminq_init_regs(hw);

sys/dev/ice/ice_controlq.c

639

cq = &hw->adminq;

sys/dev/ice/ice_controlq.c

64

struct ice_ctl_q_info *cq = &hw->adminq;

sys/dev/ice/ice_controlq.c

642

ice_sb_init_regs(hw);

sys/dev/ice/ice_controlq.c

643

cq = &hw->sbq;

sys/dev/ice/ice_controlq.c

646

ice_mailbox_init_regs(hw);

sys/dev/ice/ice_controlq.c

647

cq = &hw->mailboxq;

sys/dev/ice/ice_controlq.c

66

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_controlq.c

664

ret_code = ice_init_sq(hw, cq);

sys/dev/ice/ice_controlq.c

669

ret_code = ice_init_rq(hw, cq);

sys/dev/ice/ice_controlq.c

677

ice_shutdown_sq(hw, cq);

sys/dev/ice/ice_controlq.c

688

static bool ice_is_sbq_supported(struct ice_hw *hw)

sys/dev/ice/ice_controlq.c

690

return ice_is_generic_mac(hw);

sys/dev/ice/ice_controlq.c

702

ice_shutdown_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type,

sys/dev/ice/ice_controlq.c

707

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_controlq.c

711

cq = &hw->adminq;

sys/dev/ice/ice_controlq.c

712

if (ice_check_sq_alive(hw, cq))

sys/dev/ice/ice_controlq.c

713

ice_aq_q_shutdown(hw, unloading);

sys/dev/ice/ice_controlq.c

716

cq = &hw->sbq;

sys/dev/ice/ice_controlq.c

719

cq = &hw->mailboxq;

sys/dev/ice/ice_controlq.c

725

ice_shutdown_sq(hw, cq);

sys/dev/ice/ice_controlq.c

726

ice_shutdown_rq(hw, cq);

sys/dev/ice/ice_controlq.c

738

void ice_shutdown_all_ctrlq(struct ice_hw *hw, bool unloading)

sys/dev/ice/ice_controlq.c

740

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_controlq.c

742

ice_shutdown_ctrlq(hw, ICE_CTL_Q_ADMIN, unloading);

sys/dev/ice/ice_controlq.c

744

if (ice_is_sbq_supported(hw))

sys/dev/ice/ice_controlq.c

745

ice_shutdown_ctrlq(hw, ICE_CTL_Q_SB, unloading);

sys/dev/ice/ice_controlq.c

747

ice_shutdown_ctrlq(hw, ICE_CTL_Q_MAILBOX, unloading);

sys/dev/ice/ice_controlq.c

763

int ice_init_all_ctrlq(struct ice_hw *hw)

sys/dev/ice/ice_controlq.c

768

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_controlq.c

77

static void ice_mailbox_init_regs(struct ice_hw *hw)

sys/dev/ice/ice_controlq.c

772

status = ice_init_ctrlq(hw, ICE_CTL_Q_ADMIN);

sys/dev/ice/ice_controlq.c

776

status = ice_init_check_adminq(hw);

sys/dev/ice/ice_controlq.c

780

ice_debug(hw, ICE_DBG_AQ_MSG, "Retry Admin Queue init due to FW critical error\n");

sys/dev/ice/ice_controlq.c

781

ice_shutdown_ctrlq(hw, ICE_CTL_Q_ADMIN, true);

sys/dev/ice/ice_controlq.c

79

struct ice_ctl_q_info *cq = &hw->mailboxq;

sys/dev/ice/ice_controlq.c

791

if (ice_is_sbq_supported(hw)) {

sys/dev/ice/ice_controlq.c

792

status = ice_init_ctrlq(hw, ICE_CTL_Q_SB);

sys/dev/ice/ice_controlq.c

797

return ice_init_ctrlq(hw, ICE_CTL_Q_MAILBOX);

sys/dev/ice/ice_controlq.c

828

int ice_create_all_ctrlq(struct ice_hw *hw)

sys/dev/ice/ice_controlq.c

830

ice_init_ctrlq_locks(&hw->adminq);

sys/dev/ice/ice_controlq.c

831

if (ice_is_sbq_supported(hw))

sys/dev/ice/ice_controlq.c

832

ice_init_ctrlq_locks(&hw->sbq);

sys/dev/ice/ice_controlq.c

833

ice_init_ctrlq_locks(&hw->mailboxq);

sys/dev/ice/ice_controlq.c

835

return ice_init_all_ctrlq(hw);

sys/dev/ice/ice_controlq.c

859

void ice_destroy_all_ctrlq(struct ice_hw *hw)

sys/dev/ice/ice_controlq.c

862

ice_shutdown_all_ctrlq(hw, true);

sys/dev/ice/ice_controlq.c

864

ice_destroy_ctrlq_locks(&hw->adminq);

sys/dev/ice/ice_controlq.c

865

if (ice_is_sbq_supported(hw))

sys/dev/ice/ice_controlq.c

866

ice_destroy_ctrlq_locks(&hw->sbq);

sys/dev/ice/ice_controlq.c

867

ice_destroy_ctrlq_locks(&hw->mailboxq);

sys/dev/ice/ice_controlq.c

877

static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)

sys/dev/ice/ice_controlq.c

886

head = rd32(hw, sq->head);

sys/dev/ice/ice_controlq.c

888

ice_debug(hw, ICE_DBG_AQ_MSG,

sys/dev/ice/ice_controlq.c

895

ice_debug(hw, ICE_DBG_AQ_MSG,

sys/dev/ice/ice_controlq.c

90

static void ice_sb_init_regs(struct ice_hw *hw)

sys/dev/ice/ice_controlq.c

904

head = rd32(hw, sq->head);

sys/dev/ice/ice_controlq.c

906

ice_debug(hw, ICE_DBG_AQ_MSG,

sys/dev/ice/ice_controlq.c

92

struct ice_ctl_q_info *cq = &hw->sbq;

sys/dev/ice/ice_controlq.c

94

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_controlq.c

952

ice_debug_cq(struct ice_hw *hw, struct ice_ctl_q_info *cq,

sys/dev/ice/ice_controlq.c

958

if (!((ICE_DBG_AQ_DESC | ICE_DBG_AQ_DESC_BUF) & hw->debug_mask))

sys/dev/ice/ice_controlq.c

967

ice_debug(hw, ICE_DBG_AQ_DESC, "%s %s: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",

sys/dev/ice/ice_controlq.c

971

ice_debug(hw, ICE_DBG_AQ_DESC, "\tcookie (h,l) 0x%08X 0x%08X\n",

sys/dev/ice/ice_controlq.c

974

ice_debug(hw, ICE_DBG_AQ_DESC, "\tparam (0,1) 0x%08X 0x%08X\n",

sys/dev/ice/ice_controlq.c

977

ice_debug(hw, ICE_DBG_AQ_DESC, "\taddr (h,l) 0x%08X 0x%08X\n",

sys/dev/ice/ice_controlq.c

986

ice_debug(hw, ICE_DBG_AQ_DESC_BUF, "Buffer:\n");

sys/dev/ice/ice_controlq.c

987

ice_debug_array(hw, ICE_DBG_AQ_DESC_BUF, 16, 1, (u8 *)buf,

sys/dev/ice/ice_controlq.h

60

#define EXP_FW_API_VER_BRANCH_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? \

sys/dev/ice/ice_controlq.h

64

#define EXP_FW_API_VER_MAJOR_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? \

sys/dev/ice/ice_controlq.h

68

#define EXP_FW_API_VER_MINOR_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? \

sys/dev/ice/ice_dcb.c

108

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_dcb.c

1146

ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_LOCAL,

sys/dev/ice/ice_dcb.c

1153

ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,

sys/dev/ice/ice_dcb.c

1156

if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)

sys/dev/ice/ice_dcb.c

1178

ret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);

sys/dev/ice/ice_dcb.c

1183

} else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {

sys/dev/ice/ice_dcb.c

1237

int ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)

sys/dev/ice/ice_dcb.c

1239

struct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;

sys/dev/ice/ice_dcb.c

1242

if (!hw->func_caps.common_cap.dcb)

sys/dev/ice/ice_dcb.c

1248

qos_cfg->dcbx_status = ice_get_dcbx_status(hw);

sys/dev/ice/ice_dcb.c

1254

ret = ice_get_dcb_cfg(hw->port_info);

sys/dev/ice/ice_dcb.c

1264

ret = ice_aq_cfg_lldp_mib_change(hw, true, NULL);

sys/dev/ice/ice_dcb.c

1279

int ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib)

sys/dev/ice/ice_dcb.c

1281

struct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;

sys/dev/ice/ice_dcb.c

1284

if (!hw->func_caps.common_cap.dcb)

sys/dev/ice/ice_dcb.c

1288

qos_cfg->dcbx_status = ice_get_dcbx_status(hw);

sys/dev/ice/ice_dcb.c

1293

ret = ice_aq_cfg_lldp_mib_change(hw, ena_mib, NULL);

sys/dev/ice/ice_dcb.c

134

ice_aq_add_delete_lldp_tlv(struct ice_hw *hw, u8 bridge_type, bool add_lldp_tlv,

sys/dev/ice/ice_dcb.c

159

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_dcb.c

1735

struct ice_hw *hw;

sys/dev/ice/ice_dcb.c

1742

hw = pi->hw;

sys/dev/ice/ice_dcb.c

1747

lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);

sys/dev/ice/ice_dcb.c

1756

ret = ice_aq_set_lldp_mib(hw, mib_type, (void *)lldpmib, miblen,

sys/dev/ice/ice_dcb.c

1759

ice_free(hw, lldpmib);

sys/dev/ice/ice_dcb.c

1788

status = ice_aq_send_cmd(pi->hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_dcb.c

183

ice_aq_update_lldp_tlv(struct ice_hw *hw, u8 bridge_type, void *buf,

sys/dev/ice/ice_dcb.c

1844

status = ice_sched_query_elem(pi->hw, teid2, &elem);

sys/dev/ice/ice_dcb.c

206

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_dcb.c

225

ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent, bool persist,

sys/dev/ice/ice_dcb.c

241

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_dcb.c

253

ice_aq_start_lldp(struct ice_hw *hw, bool persist, struct ice_sq_cd *cd)

sys/dev/ice/ice_dcb.c

267

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_dcb.c

276

u8 ice_get_dcbx_status(struct ice_hw *hw)

sys/dev/ice/ice_dcb.c

280

reg = rd32(hw, PRTDCB_GENS);

sys/dev/ice/ice_dcb.c

50

ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,

sys/dev/ice/ice_dcb.c

71

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_dcb.c

784

ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,

sys/dev/ice/ice_dcb.c

791

lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);

sys/dev/ice/ice_dcb.c

795

ret = ice_aq_get_lldp_mib(hw, bridgetype, mib_type, (void *)lldpmib,

sys/dev/ice/ice_dcb.c

802

ice_free(hw, lldpmib);

sys/dev/ice/ice_dcb.c

819

ice_aq_dcb_ignore_pfc(struct ice_hw *hw, u8 tcmap, bool request, u8 *tcmap_ret,

sys/dev/ice/ice_dcb.c

835

status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_dcb.c

858

ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,

sys/dev/ice/ice_dcb.c

875

status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_dcb.c

895

ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,

sys/dev/ice/ice_dcb.c

903

return ice_aq_send_cmd(hw, &desc, (void *)buff, sizeof(*buff), cd);

sys/dev/ice/ice_dcb.c

916

ice_aq_query_pfc_mode(struct ice_hw *hw, u8 *pfcmode_ret, struct ice_sq_cd *cd)

sys/dev/ice/ice_dcb.c

92

ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,

sys/dev/ice/ice_dcb.c

926

status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_dcb.c

944

ice_aq_set_pfc_mode(struct ice_hw *hw, u8 pfc_mode, struct ice_sq_cd *cd)

sys/dev/ice/ice_dcb.c

959

status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_dcb.c

984

ice_aq_set_dcb_parameters(struct ice_hw *hw, bool dcb_enable,

sys/dev/ice/ice_dcb.c

998

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_dcb.h

219

ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,

sys/dev/ice/ice_dcb.h

223

ice_aq_add_delete_lldp_tlv(struct ice_hw *hw, u8 bridge_type, bool add_lldp_tlv,

sys/dev/ice/ice_dcb.h

227

ice_aq_update_lldp_tlv(struct ice_hw *hw, u8 bridge_type, void *buf,

sys/dev/ice/ice_dcb.h

231

ice_aq_dcb_ignore_pfc(struct ice_hw *hw, u8 tcmap, bool request, u8 *tcmap_ret,

sys/dev/ice/ice_dcb.h

234

ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,

sys/dev/ice/ice_dcb.h

238

ice_aq_query_pfc_mode(struct ice_hw *hw, u8 *pfcmode_ret, struct ice_sq_cd *cd);

sys/dev/ice/ice_dcb.h

240

ice_aq_set_dcb_parameters(struct ice_hw *hw, bool dcb_enable,

sys/dev/ice/ice_dcb.h

243

ice_aq_set_pfc_mode(struct ice_hw *hw, u8 pfc_mode, struct ice_sq_cd *cd);

sys/dev/ice/ice_dcb.h

245

u8 ice_get_dcbx_status(struct ice_hw *hw);

sys/dev/ice/ice_dcb.h

247

ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,

sys/dev/ice/ice_dcb.h

253

int ice_init_dcb(struct ice_hw *hw, bool enable_mib_change);

sys/dev/ice/ice_dcb.h

267

ice_aq_stop_lldp(struct ice_hw *hw, bool shutdown_lldp_agent, bool persist,

sys/dev/ice/ice_dcb.h

270

ice_aq_start_lldp(struct ice_hw *hw, bool persist, struct ice_sq_cd *cd);

sys/dev/ice/ice_dcb.h

272

ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,

sys/dev/ice/ice_dcb.h

274

int ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib);

sys/dev/ice/ice_dcb.h

276

ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,

sys/dev/ice/ice_ddp_common.c

103

return ice_aq_send_cmd(hw, &desc, pkg_buf, buf_size, cd);

sys/dev/ice/ice_ddp_common.c

1079

void ice_free_seg(struct ice_hw *hw)

sys/dev/ice/ice_ddp_common.c

1081

if (hw->pkg_copy) {

sys/dev/ice/ice_ddp_common.c

1082

ice_free(hw, hw->pkg_copy);

sys/dev/ice/ice_ddp_common.c

1083

hw->pkg_copy = NULL;

sys/dev/ice/ice_ddp_common.c

1084

hw->pkg_size = 0;

sys/dev/ice/ice_ddp_common.c

1086

hw->seg = NULL;

sys/dev/ice/ice_ddp_common.c

1120

ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,

sys/dev/ice/ice_ddp_common.c

1129

state = ice_chk_pkg_version(&hw->pkg_ver);

sys/dev/ice/ice_ddp_common.c

1131

ice_debug(hw, ICE_DBG_INIT, "Package version check failed.\n");

sys/dev/ice/ice_ddp_common.c

1136

*seg = (struct ice_seg *)ice_find_seg_in_pkg(hw, hw->pkg_seg_id,

sys/dev/ice/ice_ddp_common.c

1139

ice_debug(hw, ICE_DBG_INIT, "no ice segment in package.\n");

sys/dev/ice/ice_ddp_common.c

1145

pkg = (struct ice_aqc_get_pkg_info_resp *)ice_malloc(hw, size);

sys/dev/ice/ice_ddp_common.c

1149

if (ice_aq_get_pkg_info_list(hw, pkg, size, NULL)) {

sys/dev/ice/ice_ddp_common.c

1163

ice_debug(hw, ICE_DBG_INIT, "OS package is not compatible with NVM.\n");

sys/dev/ice/ice_ddp_common.c

1169

ice_free(hw, pkg);

sys/dev/ice/ice_ddp_common.c

119

ice_aq_update_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf, u16 buf_size,

sys/dev/ice/ice_ddp_common.c

1212

static int ice_get_prof_index_max(struct ice_hw *hw)

sys/dev/ice/ice_ddp_common.c

1223

if (!hw->seg)

sys/dev/ice/ice_ddp_common.c

1226

ice_seg = hw->seg;

sys/dev/ice/ice_ddp_common.c

1239

for (j = 0; j < hw->blk[ICE_BLK_SW].es.fvw; j++)

sys/dev/ice/ice_ddp_common.c

1250

hw->switch_info->max_used_prof_index = max_prof_index;

sys/dev/ice/ice_ddp_common.c

1262

ice_get_ddp_pkg_state(struct ice_hw *hw, bool already_loaded)

sys/dev/ice/ice_ddp_common.c

1264

if (hw->pkg_ver.major == hw->active_pkg_ver.major &&

sys/dev/ice/ice_ddp_common.c

1265

hw->pkg_ver.minor == hw->active_pkg_ver.minor &&

sys/dev/ice/ice_ddp_common.c

1266

hw->pkg_ver.update == hw->active_pkg_ver.update &&

sys/dev/ice/ice_ddp_common.c

1267

hw->pkg_ver.draft == hw->active_pkg_ver.draft &&

sys/dev/ice/ice_ddp_common.c

1268

!memcmp(hw->pkg_name, hw->active_pkg_name, sizeof(hw->pkg_name))) {

sys/dev/ice/ice_ddp_common.c

1273

} else if (hw->active_pkg_ver.major != ICE_PKG_SUPP_VER_MAJ ||

sys/dev/ice/ice_ddp_common.c

1274

hw->active_pkg_ver.minor != ICE_PKG_SUPP_VER_MNR) {

sys/dev/ice/ice_ddp_common.c

1285

static void ice_init_pkg_regs(struct ice_hw *hw)

sys/dev/ice/ice_ddp_common.c

1292

wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L);

sys/dev/ice/ice_ddp_common.c

1293

wr32(hw, GL_PREEXT_L2_PMASK1(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_H);

sys/dev/ice/ice_ddp_common.c

1321

enum ice_ddp_state ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)

sys/dev/ice/ice_ddp_common.c

1334

ice_debug(hw, ICE_DBG_INIT, "failed to verify pkg (err: %d)\n",

sys/dev/ice/ice_ddp_common.c

1340

state = ice_init_pkg_info(hw, pkg);

sys/dev/ice/ice_ddp_common.c

1347

state = ice_chk_pkg_compat(hw, pkg, &seg);

sys/dev/ice/ice_ddp_common.c

1352

ice_init_pkg_hints(hw, seg);

sys/dev/ice/ice_ddp_common.c

1353

state = ice_download_pkg(hw, pkg, seg);

sys/dev/ice/ice_ddp_common.c

1356

ice_debug(hw, ICE_DBG_INIT, "package previously loaded - no work.\n");

sys/dev/ice/ice_ddp_common.c

1364

state = ice_get_pkg_info(hw);

sys/dev/ice/ice_ddp_common.c

1366

state = ice_get_ddp_pkg_state(hw, already_loaded);

sys/dev/ice/ice_ddp_common.c

1370

hw->seg = seg;

sys/dev/ice/ice_ddp_common.c

1375

ice_init_pkg_regs(hw);

sys/dev/ice/ice_ddp_common.c

1376

ice_fill_blk_tbls(hw);

sys/dev/ice/ice_ddp_common.c

1377

ice_get_prof_index_max(hw);

sys/dev/ice/ice_ddp_common.c

1379

ice_debug(hw, ICE_DBG_INIT, "package load failed, %d\n",

sys/dev/ice/ice_ddp_common.c

139

status = ice_aq_send_cmd(hw, &desc, pkg_buf, buf_size, cd);

sys/dev/ice/ice_ddp_common.c

1410

ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len)

sys/dev/ice/ice_ddp_common.c

1418

buf_copy = (u8 *)ice_memdup(hw, buf, len, ICE_NONDMA_TO_NONDMA);

sys/dev/ice/ice_ddp_common.c

1420

state = ice_init_pkg(hw, buf_copy, len);

sys/dev/ice/ice_ddp_common.c

1423

ice_free(hw, buf_copy);

sys/dev/ice/ice_ddp_common.c

1426

hw->pkg_copy = buf_copy;

sys/dev/ice/ice_ddp_common.c

1427

hw->pkg_size = len;

sys/dev/ice/ice_ddp_common.c

1456

struct ice_buf_build *ice_pkg_buf_alloc(struct ice_hw *hw)

sys/dev/ice/ice_ddp_common.c

1461

bld = (struct ice_buf_build *)ice_malloc(hw, sizeof(*bld));

sys/dev/ice/ice_ddp_common.c

1498

ice_get_sw_prof_type(struct ice_hw *hw, struct ice_fv *fv, u32 prof_idx)

sys/dev/ice/ice_ddp_common.c

1509

for (i = 0; i < hw->blk[ICE_BLK_SW].es.fvw; i++) {

sys/dev/ice/ice_ddp_common.c

1533

ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type req_profs,

sys/dev/ice/ice_ddp_common.c

1542

ice_seg = hw->seg;

sys/dev/ice/ice_ddp_common.c

1554

prof_type = ice_get_sw_prof_type(hw, fv, offset);

sys/dev/ice/ice_ddp_common.c

1578

ice_get_sw_fv_list(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,

sys/dev/ice/ice_ddp_common.c

1590

if (!lkups->n_val_words || !hw->seg)

sys/dev/ice/ice_ddp_common.c

1593

ice_seg = hw->seg;

sys/dev/ice/ice_ddp_common.c

1613

for (j = 0; j < hw->blk[ICE_BLK_SW].es.fvw; j++)

sys/dev/ice/ice_ddp_common.c

1618

if (j >= hw->blk[ICE_BLK_SW].es.fvw)

sys/dev/ice/ice_ddp_common.c

1622

ice_malloc(hw, sizeof(*fvl));

sys/dev/ice/ice_ddp_common.c

1633

ice_warn(hw, "Required profiles not found in currently loaded DDP package");

sys/dev/ice/ice_ddp_common.c

1642

ice_free(hw, fvl);

sys/dev/ice/ice_ddp_common.c

165

ice_find_seg_in_pkg(struct ice_hw *hw, u32 seg_type,

sys/dev/ice/ice_ddp_common.c

1652

void ice_init_prof_result_bm(struct ice_hw *hw)

sys/dev/ice/ice_ddp_common.c

1660

if (!hw->seg)

sys/dev/ice/ice_ddp_common.c

1663

ice_seg = hw->seg;

sys/dev/ice/ice_ddp_common.c

1675

ice_zero_bitmap(hw->switch_info->prof_res_bm[off],

sys/dev/ice/ice_ddp_common.c

1686

hw->switch_info->prof_res_bm[off]);

sys/dev/ice/ice_ddp_common.c

1697

void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld)

sys/dev/ice/ice_ddp_common.c

1699

ice_free(hw, bld);

sys/dev/ice/ice_ddp_common.c

170

ice_debug(hw, ICE_DBG_PKG, "Package format version: %d.%d.%d.%d\n",

sys/dev/ice/ice_ddp_common.c

1807

ice_pkg_buf_alloc_single_section(struct ice_hw *hw, u32 type, u16 size,

sys/dev/ice/ice_ddp_common.c

1815

buf = ice_pkg_buf_alloc(hw);

sys/dev/ice/ice_ddp_common.c

1829

ice_pkg_buf_free(hw, buf);

sys/dev/ice/ice_ddp_common.c

2230

void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg)

sys/dev/ice/ice_ddp_common.c

2237

ice_memset(&hw->tnl, 0, sizeof(hw->tnl), ICE_NONDMA_MEM);

sys/dev/ice/ice_ddp_common.c

2250

ice_add_tunnel_hint(hw, label_name, val);

sys/dev/ice/ice_ddp_common.c

2256

for (i = 0; i < hw->tnl.count; i++) {

sys/dev/ice/ice_ddp_common.c

2257

ice_find_boost_entry(ice_seg, hw->tnl.tbl[i].boost_addr,

sys/dev/ice/ice_ddp_common.c

2258

&hw->tnl.tbl[i].boost_entry);

sys/dev/ice/ice_ddp_common.c

2259

if (hw->tnl.tbl[i].boost_entry)

sys/dev/ice/ice_ddp_common.c

2260

hw->tnl.tbl[i].valid = true;

sys/dev/ice/ice_ddp_common.c

2281

ice_acquire_global_cfg_lock(struct ice_hw *hw,

sys/dev/ice/ice_ddp_common.c

2286

status = ice_acquire_res(hw, ICE_GLOBAL_CFG_LOCK_RES_ID, access,

sys/dev/ice/ice_ddp_common.c

2290

ice_debug(hw, ICE_DBG_PKG, "Global config lock: No work to do\n");

sys/dev/ice/ice_ddp_common.c

2301

void ice_release_global_cfg_lock(struct ice_hw *hw)

sys/dev/ice/ice_ddp_common.c

2303

ice_release_res(hw, ICE_GLOBAL_CFG_LOCK_RES_ID);

sys/dev/ice/ice_ddp_common.c

2314

ice_acquire_change_lock(struct ice_hw *hw, enum ice_aq_res_access_type access)

sys/dev/ice/ice_ddp_common.c

2316

return ice_acquire_res(hw, ICE_CHANGE_LOCK_RES_ID, access,

sys/dev/ice/ice_ddp_common.c

2326

void ice_release_change_lock(struct ice_hw *hw)

sys/dev/ice/ice_ddp_common.c

2328

ice_release_res(hw, ICE_CHANGE_LOCK_RES_ID);

sys/dev/ice/ice_ddp_common.c

2338

ice_is_get_tx_sched_new_format(struct ice_hw *hw)

sys/dev/ice/ice_ddp_common.c

2340

if (ice_is_e830(hw))

sys/dev/ice/ice_ddp_common.c

2342

if (ice_is_e825c(hw))

sys/dev/ice/ice_ddp_common.c

2359

ice_get_set_tx_topo(struct ice_hw *hw, u8 *buf, u16 buf_size,

sys/dev/ice/ice_ddp_common.c

2380

if (!ice_is_get_tx_sched_new_format(hw))

sys/dev/ice/ice_ddp_common.c

2384

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_ddp_common.c

2403

int ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len)

sys/dev/ice/ice_ddp_common.c

2419

if (!hw->func_caps.common_cap.tx_sched_topo_comp_mode_en) {

sys/dev/ice/ice_ddp_common.c

2420

ice_debug(hw, ICE_DBG_INIT, "FW doesn't support compatibility mode\n");

sys/dev/ice/ice_ddp_common.c

2424

current_topo = (u8 *)ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);

sys/dev/ice/ice_ddp_common.c

2429

status = ice_get_set_tx_topo(hw, current_topo, ICE_AQ_MAX_BUF_LEN, NULL,

sys/dev/ice/ice_ddp_common.c

2431

ice_free(hw, current_topo);

sys/dev/ice/ice_ddp_common.c

2434

ice_debug(hw, ICE_DBG_INIT, "Get current topology is failed\n");

sys/dev/ice/ice_ddp_common.c

2440

hw->num_tx_sched_layers == 9) {

sys/dev/ice/ice_ddp_common.c

2441

ice_debug(hw, ICE_DBG_INIT, "Loaded default topology\n");

sys/dev/ice/ice_ddp_common.c

2448

hw->num_tx_sched_layers == 5) {

sys/dev/ice/ice_ddp_common.c

2449

ice_debug(hw, ICE_DBG_INIT, "Loaded new topology\n");

sys/dev/ice/ice_ddp_common.c

2456

ice_debug(hw, ICE_DBG_INIT, "Update tx topology was done by another PF\n");

sys/dev/ice/ice_ddp_common.c

2465

hw->num_tx_sched_layers == 5) {

sys/dev/ice/ice_ddp_common.c

2466

ice_debug(hw, ICE_DBG_INIT, "Change topology from 5 to 9 layers\n");

sys/dev/ice/ice_ddp_common.c

2473

ice_debug(hw, ICE_DBG_INIT, "failed to verify pkg (err: %d)\n",

sys/dev/ice/ice_ddp_common.c

2480

ice_find_seg_in_pkg(hw, SEGMENT_TYPE_ICE_RUN_TIME_CFG, pkg_hdr);

sys/dev/ice/ice_ddp_common.c

2482

ice_debug(hw, ICE_DBG_INIT, "5 layer topology segment is missing\n");

sys/dev/ice/ice_ddp_common.c

2487

ice_debug(hw, ICE_DBG_INIT, "5 layer topology segment count(%d) is wrong\n",

sys/dev/ice/ice_ddp_common.c

2496

ice_debug(hw, ICE_DBG_INIT, "5 layer topology section type is wrong\n");

sys/dev/ice/ice_ddp_common.c

2503

ice_debug(hw, ICE_DBG_INIT, "5 layer topology section size is wrong\n");

sys/dev/ice/ice_ddp_common.c

2509

ice_debug(hw, ICE_DBG_INIT, "5 layer topology buffer > 4K\n");

sys/dev/ice/ice_ddp_common.c

2520

status = ice_acquire_res(hw, ICE_GLOBAL_CFG_LOCK_RES_ID, ICE_RES_WRITE,

sys/dev/ice/ice_ddp_common.c

2523

ice_debug(hw, ICE_DBG_INIT, "Failed to acquire global lock\n");

sys/dev/ice/ice_ddp_common.c

2528

reg = rd32(hw, GLGEN_RSTAT);

sys/dev/ice/ice_ddp_common.c

2531

ice_debug(hw, ICE_DBG_INIT, "Reset is in progress. layer topology might be applied already\n");

sys/dev/ice/ice_ddp_common.c

2532

ice_check_reset(hw);

sys/dev/ice/ice_ddp_common.c

2537

status = ice_get_set_tx_topo(hw, new_topo, size, NULL, NULL, true);

sys/dev/ice/ice_ddp_common.c

2539

ice_debug(hw, ICE_DBG_INIT, "Set tx topology is failed\n");

sys/dev/ice/ice_ddp_common.c

2546

ice_reset(hw, ICE_RESET_CORER);

sys/dev/ice/ice_ddp_common.c

259

ice_update_pkg_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 count)

sys/dev/ice/ice_ddp_common.c

269

status = ice_aq_update_pkg(hw, bh, LE16_TO_CPU(bh->data_end),

sys/dev/ice/ice_ddp_common.c

273

ice_debug(hw, ICE_DBG_PKG, "Update pkg failed: err %d off %d inf %d\n",

sys/dev/ice/ice_ddp_common.c

291

ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count)

sys/dev/ice/ice_ddp_common.c

295

status = ice_acquire_change_lock(hw, ICE_RES_WRITE);

sys/dev/ice/ice_ddp_common.c

299

status = ice_update_pkg_no_lock(hw, bufs, count);

sys/dev/ice/ice_ddp_common.c

301

ice_release_change_lock(hw);

sys/dev/ice/ice_ddp_common.c

377

ice_dwnld_cfg_bufs_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 start,

sys/dev/ice/ice_ddp_common.c

405

status = ice_aq_download_pkg(hw, bh, ICE_PKG_BUF_SIZE, last,

sys/dev/ice/ice_ddp_common.c

410

ice_debug(hw, ICE_DBG_PKG, "Pkg download failed: err %d off %d inf %d\n",

sys/dev/ice/ice_ddp_common.c

412

err = hw->adminq.sq_last_status;

sys/dev/ice/ice_ddp_common.c

434

ice_aq_get_pkg_info_list(struct ice_hw *hw,

sys/dev/ice/ice_ddp_common.c

442

return ice_aq_send_cmd(hw, &desc, pkg_info, buf_size, cd);

sys/dev/ice/ice_ddp_common.c

499

static void ice_get_signing_req(struct ice_hw *hw)

sys/dev/ice/ice_ddp_common.c

50

ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,

sys/dev/ice/ice_ddp_common.c

501

hw->pkg_seg_id = ice_get_pkg_segment_id(hw->mac_type);

sys/dev/ice/ice_ddp_common.c

502

hw->pkg_sign_type = ice_get_pkg_sign_type(hw->mac_type);

sys/dev/ice/ice_ddp_common.c

511

ice_download_pkg_sig_seg(struct ice_hw *hw, struct ice_sign_seg *seg)

sys/dev/ice/ice_ddp_common.c

515

state = ice_dwnld_cfg_bufs_no_lock(hw, seg->buf_tbl.buf_array, 0,

sys/dev/ice/ice_ddp_common.c

534

ice_download_pkg_config_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr,

sys/dev/ice/ice_ddp_common.c

552

state = ice_dwnld_cfg_bufs_no_lock(hw, bufs->buf_array, start, count,

sys/dev/ice/ice_ddp_common.c

567

ice_dwnld_sign_and_cfg_segs(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr,

sys/dev/ice/ice_ddp_common.c

592

state = ice_download_pkg_sig_seg(hw, seg);

sys/dev/ice/ice_ddp_common.c

604

state = ice_download_pkg_config_seg(hw, pkg_hdr, conf_idx, start,

sys/dev/ice/ice_ddp_common.c

639

ice_post_dwnld_pkg_actions(struct ice_hw *hw)

sys/dev/ice/ice_ddp_common.c

644

status = ice_set_vlan_mode(hw);

sys/dev/ice/ice_ddp_common.c

646

ice_debug(hw, ICE_DBG_PKG, "Failed to set VLAN mode: err %d\n",

sys/dev/ice/ice_ddp_common.c

660

ice_download_pkg_with_sig_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)

sys/dev/ice/ice_ddp_common.c

662

enum ice_aq_err aq_err = hw->adminq.sq_last_status;

sys/dev/ice/ice_ddp_common.c

667

ice_debug(hw, ICE_DBG_INIT, "Segment ID %d\n", hw->pkg_seg_id);

sys/dev/ice/ice_ddp_common.c

668

ice_debug(hw, ICE_DBG_INIT, "Signature type %d\n", hw->pkg_sign_type);

sys/dev/ice/ice_ddp_common.c

670

status = ice_acquire_global_cfg_lock(hw, ICE_RES_WRITE);

sys/dev/ice/ice_ddp_common.c

680

if (!ice_is_signing_seg_type_at_idx(pkg_hdr, i, hw->pkg_seg_id,

sys/dev/ice/ice_ddp_common.c

681

hw->pkg_sign_type))

sys/dev/ice/ice_ddp_common.c

684

state = ice_dwnld_sign_and_cfg_segs(hw, pkg_hdr, i);

sys/dev/ice/ice_ddp_common.c

690

state = ice_post_dwnld_pkg_actions(hw);

sys/dev/ice/ice_ddp_common.c

692

ice_release_global_cfg_lock(hw);

sys/dev/ice/ice_ddp_common.c

70

status = ice_aq_send_cmd(hw, &desc, pkg_buf, buf_size, cd);

sys/dev/ice/ice_ddp_common.c

707

ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)

sys/dev/ice/ice_ddp_common.c

724

status = ice_acquire_global_cfg_lock(hw, ICE_RES_WRITE);

sys/dev/ice/ice_ddp_common.c

728

return ice_map_aq_err_to_ddp_state(hw->adminq.sq_last_status);

sys/dev/ice/ice_ddp_common.c

731

state = ice_dwnld_cfg_bufs_no_lock(hw, bufs, 0, count, true);

sys/dev/ice/ice_ddp_common.c

733

state = ice_post_dwnld_pkg_actions(hw);

sys/dev/ice/ice_ddp_common.c

735

ice_release_global_cfg_lock(hw);

sys/dev/ice/ice_ddp_common.c

748

ice_download_pkg_without_sig_seg(struct ice_hw *hw, struct ice_seg *ice_seg)

sys/dev/ice/ice_ddp_common.c

753

ice_debug(hw, ICE_DBG_PKG, "Segment format version: %d.%d.%d.%d\n",

sys/dev/ice/ice_ddp_common.c

759

ice_debug(hw, ICE_DBG_PKG, "Seg: type 0x%X, size %d, name %s\n",

sys/dev/ice/ice_ddp_common.c

765

ice_debug(hw, ICE_DBG_PKG, "Seg buf count: %d\n",

sys/dev/ice/ice_ddp_common.c

768

state = ice_dwnld_cfg_bufs(hw, ice_buf_tbl->buf_array,

sys/dev/ice/ice_ddp_common.c

783

ice_download_pkg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr,

sys/dev/ice/ice_ddp_common.c

788

if (ice_match_signing_seg(pkg_hdr, hw->pkg_seg_id, hw->pkg_sign_type))

sys/dev/ice/ice_ddp_common.c

789

state = ice_download_pkg_with_sig_seg(hw, pkg_hdr);

sys/dev/ice/ice_ddp_common.c

791

state = ice_download_pkg_without_sig_seg(hw, ice_seg);

sys/dev/ice/ice_ddp_common.c

793

ice_post_pkg_dwnld_vlan_mode_cfg(hw);

sys/dev/ice/ice_ddp_common.c

806

ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)

sys/dev/ice/ice_ddp_common.c

813

ice_get_signing_req(hw);

sys/dev/ice/ice_ddp_common.c

815

ice_debug(hw, ICE_DBG_INIT, "Pkg using segment id: 0x%08X\n",

sys/dev/ice/ice_ddp_common.c

816

hw->pkg_seg_id);

sys/dev/ice/ice_ddp_common.c

819

ice_find_seg_in_pkg(hw, hw->pkg_seg_id, pkg_hdr);

sys/dev/ice/ice_ddp_common.c

831

ice_debug(hw, ICE_DBG_INIT, "Did not find ice metadata section in package\n");

sys/dev/ice/ice_ddp_common.c

835

hw->pkg_ver = meta->ver;

sys/dev/ice/ice_ddp_common.c

836

ice_memcpy(hw->pkg_name, meta->name, sizeof(meta->name),

sys/dev/ice/ice_ddp_common.c

839

ice_debug(hw, ICE_DBG_PKG, "Pkg: %d.%d.%d.%d, %s\n",

sys/dev/ice/ice_ddp_common.c

843

hw->ice_seg_fmt_ver = seg_hdr->seg_format_ver;

sys/dev/ice/ice_ddp_common.c

844

ice_memcpy(hw->ice_seg_id, seg_hdr->seg_id,

sys/dev/ice/ice_ddp_common.c

845

sizeof(hw->ice_seg_id), ICE_NONDMA_TO_NONDMA);

sys/dev/ice/ice_ddp_common.c

847

ice_debug(hw, ICE_DBG_PKG, "Ice Seg: %d.%d.%d.%d, %s\n",

sys/dev/ice/ice_ddp_common.c

854

ice_debug(hw, ICE_DBG_INIT, "Did not find ice segment in driver package\n");

sys/dev/ice/ice_ddp_common.c

867

enum ice_ddp_state ice_get_pkg_info(struct ice_hw *hw)

sys/dev/ice/ice_ddp_common.c

875

pkg_info = (struct ice_aqc_get_pkg_info_resp *)ice_malloc(hw, size);

sys/dev/ice/ice_ddp_common.c

879

if (ice_aq_get_pkg_info_list(hw, pkg_info, size, NULL)) {

sys/dev/ice/ice_ddp_common.c

891

hw->active_pkg_ver = pkg_info->pkg_info[i].ver;

sys/dev/ice/ice_ddp_common.c

892

hw->active_track_id =

sys/dev/ice/ice_ddp_common.c

894

ice_memcpy(hw->active_pkg_name,

sys/dev/ice/ice_ddp_common.c

898

hw->active_pkg_in_nvm = pkg_info->pkg_info[i].is_in_nvm;

sys/dev/ice/ice_ddp_common.c

907

ice_debug(hw, ICE_DBG_PKG, "Pkg[%d]: %d.%d.%d.%d,%s,%s\n",

sys/dev/ice/ice_ddp_common.c

916

ice_free(hw, pkg_info);

sys/dev/ice/ice_ddp_common.c

95

ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,

sys/dev/ice/ice_ddp_common.h

421

ice_acquire_change_lock(struct ice_hw *hw, enum ice_aq_res_access_type access);

sys/dev/ice/ice_ddp_common.h

422

void ice_release_change_lock(struct ice_hw *hw);

sys/dev/ice/ice_ddp_common.h

424

struct ice_buf_build *ice_pkg_buf_alloc(struct ice_hw *hw);

sys/dev/ice/ice_ddp_common.h

430

ice_get_sw_fv_list(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups,

sys/dev/ice/ice_ddp_common.h

438

ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count);

sys/dev/ice/ice_ddp_common.h

440

ice_update_pkg_no_lock(struct ice_hw *hw, struct ice_buf *bufs, u32 count);

sys/dev/ice/ice_ddp_common.h

441

void ice_release_global_cfg_lock(struct ice_hw *hw);

sys/dev/ice/ice_ddp_common.h

443

ice_find_seg_in_pkg(struct ice_hw *hw, u32 seg_type,

sys/dev/ice/ice_ddp_common.h

448

ice_get_pkg_info(struct ice_hw *hw);

sys/dev/ice/ice_ddp_common.h

449

void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg);

sys/dev/ice/ice_ddp_common.h

452

ice_acquire_global_cfg_lock(struct ice_hw *hw,

sys/dev/ice/ice_ddp_common.h

468

enum ice_ddp_state ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len);

sys/dev/ice/ice_ddp_common.h

470

ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len);

sys/dev/ice/ice_ddp_common.h

472

void ice_free_seg(struct ice_hw *hw);

sys/dev/ice/ice_ddp_common.h

475

ice_pkg_buf_alloc_single_section(struct ice_hw *hw, u32 type, u16 size,

sys/dev/ice/ice_ddp_common.h

478

void ice_pkg_buf_free(struct ice_hw *hw, struct ice_buf_build *bld);

sys/dev/ice/ice_ddp_common.h

480

int ice_cfg_tx_topo(struct ice_hw *hw, u8 *buf, u32 len);

sys/dev/ice/ice_flex_pipe.c

1020

ice_vsig_update_xlt2_sect(struct ice_hw *hw, enum ice_block blk, u16 vsi,

sys/dev/ice/ice_flex_pipe.c

1027

bld = ice_pkg_buf_alloc_single_section(hw, ice_sect_id(blk, ICE_XLT2),

sys/dev/ice/ice_flex_pipe.c

1037

status = ice_update_pkg(hw, ice_pkg_buf(bld), 1);

sys/dev/ice/ice_flex_pipe.c

1039

ice_pkg_buf_free(hw, bld);

sys/dev/ice/ice_flex_pipe.c

1052

int ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk)

sys/dev/ice/ice_flex_pipe.c

1058

if (hw->blk[blk].xlt2.vsis[vsi].changed) {

sys/dev/ice/ice_flex_pipe.c

1062

vsig = hw->blk[blk].xlt2.vsis[vsi].vsig;

sys/dev/ice/ice_flex_pipe.c

1063

status = ice_vsig_update_xlt2_sect(hw, blk, vsi, vsig);

sys/dev/ice/ice_flex_pipe.c

1067

hw->blk[blk].xlt2.vsis[vsi].changed = 0;

sys/dev/ice/ice_flex_pipe.c

1085

ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig)

sys/dev/ice/ice_flex_pipe.c

1094

*vsig = hw->blk[blk].xlt2.vsis[vsi].vsig;

sys/dev/ice/ice_flex_pipe.c

1107

static u16 ice_vsig_alloc_val(struct ice_hw *hw, enum ice_block blk, u16 vsig)

sys/dev/ice/ice_flex_pipe.c

1111

if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use) {

sys/dev/ice/ice_flex_pipe.c

1112

INIT_LIST_HEAD(&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst);

sys/dev/ice/ice_flex_pipe.c

1113

hw->blk[blk].xlt2.vsig_tbl[idx].in_use = true;

sys/dev/ice/ice_flex_pipe.c

1116

return ICE_VSIG_VALUE(idx, hw->pf_id);

sys/dev/ice/ice_flex_pipe.c

1127

static u16 ice_vsig_alloc(struct ice_hw *hw, enum ice_block blk)

sys/dev/ice/ice_flex_pipe.c

1132

if (!hw->blk[blk].xlt2.vsig_tbl[i].in_use)

sys/dev/ice/ice_flex_pipe.c

1133

return ice_vsig_alloc_val(hw, blk, i);

sys/dev/ice/ice_flex_pipe.c

1154

ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flex_pipe.c

1157

struct ice_xlt2 *xlt2 = &hw->blk[blk].xlt2;

sys/dev/ice/ice_flex_pipe.c

1163

*vsig = ICE_VSIG_VALUE(i, hw->pf_id);

sys/dev/ice/ice_flex_pipe.c

1180

ice_vsig_free(struct ice_hw *hw, enum ice_block blk, u16 vsig)

sys/dev/ice/ice_flex_pipe.c

1190

if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)

sys/dev/ice/ice_flex_pipe.c

1193

hw->blk[blk].xlt2.vsig_tbl[idx].in_use = false;

sys/dev/ice/ice_flex_pipe.c

1195

vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;

sys/dev/ice/ice_flex_pipe.c

1211

hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi = NULL;

sys/dev/ice/ice_flex_pipe.c

1216

&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,

sys/dev/ice/ice_flex_pipe.c

1219

ice_free(hw, del);

sys/dev/ice/ice_flex_pipe.c

1225

INIT_LIST_HEAD(&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst);

sys/dev/ice/ice_flex_pipe.c

1241

ice_vsig_remove_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)

sys/dev/ice/ice_flex_pipe.c

1251

if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)

sys/dev/ice/ice_flex_pipe.c

1258

vsi_head = &hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;

sys/dev/ice/ice_flex_pipe.c

1262

vsi_tgt = &hw->blk[blk].xlt2.vsis[vsi];

sys/dev/ice/ice_flex_pipe.c

1299

ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)

sys/dev/ice/ice_flex_pipe.c

130

void ice_add_tunnel_hint(struct ice_hw *hw, char *label_name, u16 val)

sys/dev/ice/ice_flex_pipe.c

1313

if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use &&

sys/dev/ice/ice_flex_pipe.c

1317

status = ice_vsig_find_vsi(hw, blk, vsi, &orig_vsig);

sys/dev/ice/ice_flex_pipe.c

132

if (hw->tnl.count < ICE_TUNNEL_MAX_ENTRIES) {

sys/dev/ice/ice_flex_pipe.c

1327

status = ice_vsig_remove_vsi(hw, blk, vsi, orig_vsig);

sys/dev/ice/ice_flex_pipe.c

1336

hw->blk[blk].xlt2.vsis[vsi].vsig = vsig;

sys/dev/ice/ice_flex_pipe.c

1337

hw->blk[blk].xlt2.vsis[vsi].changed = 1;

sys/dev/ice/ice_flex_pipe.c

1340

tmp = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;

sys/dev/ice/ice_flex_pipe.c

1341

hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi =

sys/dev/ice/ice_flex_pipe.c

1342

&hw->blk[blk].xlt2.vsis[vsi];

sys/dev/ice/ice_flex_pipe.c

1343

hw->blk[blk].xlt2.vsis[vsi].next_vsi = tmp;

sys/dev/ice/ice_flex_pipe.c

1344

hw->blk[blk].xlt2.t[vsi] = vsig;

sys/dev/ice/ice_flex_pipe.c

1357

ice_find_prof_id(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flex_pipe.c

1360

struct ice_es *es = &hw->blk[blk].es;

sys/dev/ice/ice_flex_pipe.c

1428

ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, bool btm,

sys/dev/ice/ice_flex_pipe.c

1436

return ice_alloc_hw_res(hw, res_type, 1, btm, tcam_idx);

sys/dev/ice/ice_flex_pipe.c

1448

ice_free_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 tcam_idx)

sys/dev/ice/ice_flex_pipe.c

1455

return ice_free_hw_res(hw, res_type, 1, &tcam_idx);

sys/dev/ice/ice_flex_pipe.c

146

if ((label_name[len] - '0') == hw->pf_id) {

sys/dev/ice/ice_flex_pipe.c

1468

ice_alloc_prof_id(struct ice_hw *hw, enum ice_block blk, u8 *prof_id)

sys/dev/ice/ice_flex_pipe.c

147

hw->tnl.tbl[hw->tnl.count].type = tnls[i].type;

sys/dev/ice/ice_flex_pipe.c

1477

status = ice_alloc_hw_res(hw, res_type, 1, false, &get_prof);

sys/dev/ice/ice_flex_pipe.c

148

hw->tnl.tbl[hw->tnl.count].valid = false;

sys/dev/ice/ice_flex_pipe.c

149

hw->tnl.tbl[hw->tnl.count].in_use = false;

sys/dev/ice/ice_flex_pipe.c

1493

ice_free_prof_id(struct ice_hw *hw, enum ice_block blk, u8 prof_id)

sys/dev/ice/ice_flex_pipe.c

150

hw->tnl.tbl[hw->tnl.count].marked = false;

sys/dev/ice/ice_flex_pipe.c

1501

return ice_free_hw_res(hw, res_type, 1, &tmp_prof_id);

sys/dev/ice/ice_flex_pipe.c

151

hw->tnl.tbl[hw->tnl.count].boost_addr = val;

sys/dev/ice/ice_flex_pipe.c

1511

ice_prof_inc_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)

sys/dev/ice/ice_flex_pipe.c

1513

if (prof_id > hw->blk[blk].es.count)

sys/dev/ice/ice_flex_pipe.c

1516

hw->blk[blk].es.ref_count[prof_id]++;

sys/dev/ice/ice_flex_pipe.c

152

hw->tnl.tbl[hw->tnl.count].port = 0;

sys/dev/ice/ice_flex_pipe.c

1529

ice_write_es(struct ice_hw *hw, enum ice_block blk, u8 prof_id,

sys/dev/ice/ice_flex_pipe.c

153

hw->tnl.count++;

sys/dev/ice/ice_flex_pipe.c

1534

off = prof_id * hw->blk[blk].es.fvw;

sys/dev/ice/ice_flex_pipe.c

1536

ice_memset(&hw->blk[blk].es.t[off], 0, hw->blk[blk].es.fvw *

sys/dev/ice/ice_flex_pipe.c

1538

hw->blk[blk].es.written[prof_id] = false;

sys/dev/ice/ice_flex_pipe.c

1540

ice_memcpy(&hw->blk[blk].es.t[off], fv, hw->blk[blk].es.fvw *

sys/dev/ice/ice_flex_pipe.c

1552

ice_prof_dec_ref(struct ice_hw *hw, enum ice_block blk, u8 prof_id)

sys/dev/ice/ice_flex_pipe.c

1554

if (prof_id > hw->blk[blk].es.count)

sys/dev/ice/ice_flex_pipe.c

1557

if (hw->blk[blk].es.ref_count[prof_id] > 0) {

sys/dev/ice/ice_flex_pipe.c

1558

if (!--hw->blk[blk].es.ref_count[prof_id]) {

sys/dev/ice/ice_flex_pipe.c

1559

ice_write_es(hw, blk, prof_id, NULL);

sys/dev/ice/ice_flex_pipe.c

1560

return ice_free_prof_id(hw, blk, prof_id);

sys/dev/ice/ice_flex_pipe.c

1615

static void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk)

sys/dev/ice/ice_flex_pipe.c

1619

for (pt = 0; pt < hw->blk[blk].xlt1.count; pt++) {

sys/dev/ice/ice_flex_pipe.c

1622

ptg = hw->blk[blk].xlt1.t[pt];

sys/dev/ice/ice_flex_pipe.c

1624

ice_ptg_alloc_val(hw, blk, ptg);

sys/dev/ice/ice_flex_pipe.c

1625

ice_ptg_add_mv_ptype(hw, blk, pt, ptg);

sys/dev/ice/ice_flex_pipe.c

1635

static void ice_init_sw_xlt2_db(struct ice_hw *hw, enum ice_block blk)

sys/dev/ice/ice_flex_pipe.c

1639

for (vsi = 0; vsi < hw->blk[blk].xlt2.count; vsi++) {

sys/dev/ice/ice_flex_pipe.c

1642

vsig = hw->blk[blk].xlt2.t[vsi];

sys/dev/ice/ice_flex_pipe.c

1644

ice_vsig_alloc_val(hw, blk, vsig);

sys/dev/ice/ice_flex_pipe.c

1645

ice_vsig_add_mv_vsi(hw, blk, vsi, vsig);

sys/dev/ice/ice_flex_pipe.c

1649

hw->blk[blk].xlt2.vsis[vsi].changed = 0;

sys/dev/ice/ice_flex_pipe.c

1658

static void ice_init_sw_db(struct ice_hw *hw)

sys/dev/ice/ice_flex_pipe.c

1663

ice_init_sw_xlt1_db(hw, (enum ice_block)i);

sys/dev/ice/ice_flex_pipe.c

1664

ice_init_sw_xlt2_db(hw, (enum ice_block)i);

sys/dev/ice/ice_flex_pipe.c

1680

static void ice_fill_tbl(struct ice_hw *hw, enum ice_block block_id, u32 sid)

sys/dev/ice/ice_flex_pipe.c

1696

if (!hw->seg) {

sys/dev/ice/ice_flex_pipe.c

1697

ice_debug(hw, ICE_DBG_PKG, "hw->seg is NULL, tables are not filled\n");

sys/dev/ice/ice_flex_pipe.c

1703

sect = ice_pkg_enum_section(hw->seg, &state, sid);

sys/dev/ice/ice_flex_pipe.c

1715

sizeof(*hw->blk[block_id].xlt1.t);

sys/dev/ice/ice_flex_pipe.c

1716

dst = hw->blk[block_id].xlt1.t;

sys/dev/ice/ice_flex_pipe.c

1717

dst_len = hw->blk[block_id].xlt1.count *

sys/dev/ice/ice_flex_pipe.c

1718

sizeof(*hw->blk[block_id].xlt1.t);

sys/dev/ice/ice_flex_pipe.c

1728

sizeof(*hw->blk[block_id].xlt2.t);

sys/dev/ice/ice_flex_pipe.c

1729

dst = (u8 *)hw->blk[block_id].xlt2.t;

sys/dev/ice/ice_flex_pipe.c

1730

dst_len = hw->blk[block_id].xlt2.count *

sys/dev/ice/ice_flex_pipe.c

1731

sizeof(*hw->blk[block_id].xlt2.t);

sys/dev/ice/ice_flex_pipe.c

1741

sizeof(*hw->blk[block_id].prof.t);

sys/dev/ice/ice_flex_pipe.c

1742

dst = (u8 *)hw->blk[block_id].prof.t;

sys/dev/ice/ice_flex_pipe.c

1743

dst_len = hw->blk[block_id].prof.count *

sys/dev/ice/ice_flex_pipe.c

1744

sizeof(*hw->blk[block_id].prof.t);

sys/dev/ice/ice_flex_pipe.c

1754

sizeof(*hw->blk[block_id].prof_redir.t);

sys/dev/ice/ice_flex_pipe.c

1755

dst = hw->blk[block_id].prof_redir.t;

sys/dev/ice/ice_flex_pipe.c

1756

dst_len = hw->blk[block_id].prof_redir.count *

sys/dev/ice/ice_flex_pipe.c

1757

sizeof(*hw->blk[block_id].prof_redir.t);

sys/dev/ice/ice_flex_pipe.c

1767

hw->blk[block_id].es.fvw) *

sys/dev/ice/ice_flex_pipe.c

1768

sizeof(*hw->blk[block_id].es.t);

sys/dev/ice/ice_flex_pipe.c

1769

dst = (u8 *)hw->blk[block_id].es.t;

sys/dev/ice/ice_flex_pipe.c

1770

dst_len = (u32)(hw->blk[block_id].es.count *

sys/dev/ice/ice_flex_pipe.c

1771

hw->blk[block_id].es.fvw) *

sys/dev/ice/ice_flex_pipe.c

1772

sizeof(*hw->blk[block_id].es.t);

sys/dev/ice/ice_flex_pipe.c

1804

void ice_init_flow_profs(struct ice_hw *hw, u8 blk_idx)

sys/dev/ice/ice_flex_pipe.c

1806

ice_init_lock(&hw->fl_profs_locks[blk_idx]);

sys/dev/ice/ice_flex_pipe.c

1807

INIT_LIST_HEAD(&hw->fl_profs[blk_idx]);

sys/dev/ice/ice_flex_pipe.c

1814

int ice_init_hw_tbls(struct ice_hw *hw)

sys/dev/ice/ice_flex_pipe.c

1818

ice_init_lock(&hw->rss_locks);

sys/dev/ice/ice_flex_pipe.c

1819

INIT_LIST_HEAD(&hw->rss_list_head);

sys/dev/ice/ice_flex_pipe.c

1821

struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;

sys/dev/ice/ice_flex_pipe.c

1822

struct ice_prof_tcam *prof = &hw->blk[i].prof;

sys/dev/ice/ice_flex_pipe.c

1823

struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;

sys/dev/ice/ice_flex_pipe.c

1824

struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;

sys/dev/ice/ice_flex_pipe.c

1825

struct ice_es *es = &hw->blk[i].es;

sys/dev/ice/ice_flex_pipe.c

1828

if (hw->blk[i].is_list_init)

sys/dev/ice/ice_flex_pipe.c

1831

ice_init_flow_profs(hw, i);

sys/dev/ice/ice_flex_pipe.c

1834

hw->blk[i].is_list_init = true;

sys/dev/ice/ice_flex_pipe.c

1836

hw->blk[i].overwrite = blk_sizes[i].overwrite;

sys/dev/ice/ice_flex_pipe.c

1843

ice_calloc(hw, xlt1->count, sizeof(*xlt1->ptypes));

sys/dev/ice/ice_flex_pipe.c

1849

ice_calloc(hw, ICE_MAX_PTGS, sizeof(*xlt1->ptg_tbl));

sys/dev/ice/ice_flex_pipe.c

1854

xlt1->t = (u8 *)ice_calloc(hw, xlt1->count, sizeof(*xlt1->t));

sys/dev/ice/ice_flex_pipe.c

1862

ice_calloc(hw, xlt2->count, sizeof(*xlt2->vsis));

sys/dev/ice/ice_flex_pipe.c

1868

ice_calloc(hw, xlt2->count, sizeof(*xlt2->vsig_tbl));

sys/dev/ice/ice_flex_pipe.c

1875

xlt2->t = (u16 *)ice_calloc(hw, xlt2->count, sizeof(*xlt2->t));

sys/dev/ice/ice_flex_pipe.c

1884

ice_calloc(hw, prof->count, sizeof(*prof->t));

sys/dev/ice/ice_flex_pipe.c

1891

prof_redir->t = (u8 *)ice_calloc(hw, prof_redir->count,

sys/dev/ice/ice_flex_pipe.c

1901

ice_calloc(hw, (u32)(es->count * es->fvw),

sys/dev/ice/ice_flex_pipe.c

1907

ice_calloc(hw, es->count, sizeof(*es->ref_count));

sys/dev/ice/ice_flex_pipe.c

1913

ice_calloc(hw, es->count, sizeof(*es->written));

sys/dev/ice/ice_flex_pipe.c

1922

ice_free_hw_tbls(hw);

sys/dev/ice/ice_flex_pipe.c

1934

void ice_fill_blk_tbls(struct ice_hw *hw)

sys/dev/ice/ice_flex_pipe.c

1941

ice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt1.sid);

sys/dev/ice/ice_flex_pipe.c

1942

ice_fill_tbl(hw, blk_id, hw->blk[blk_id].xlt2.sid);

sys/dev/ice/ice_flex_pipe.c

1943

ice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof.sid);

sys/dev/ice/ice_flex_pipe.c

1944

ice_fill_tbl(hw, blk_id, hw->blk[blk_id].prof_redir.sid);

sys/dev/ice/ice_flex_pipe.c

1945

ice_fill_tbl(hw, blk_id, hw->blk[blk_id].es.sid);

sys/dev/ice/ice_flex_pipe.c

1948

ice_init_sw_db(hw);

sys/dev/ice/ice_flex_pipe.c

1956

static void ice_free_prof_map(struct ice_hw *hw, u8 blk_idx)

sys/dev/ice/ice_flex_pipe.c

1958

struct ice_es *es = &hw->blk[blk_idx].es;

sys/dev/ice/ice_flex_pipe.c

1965

ice_free(hw, del);

sys/dev/ice/ice_flex_pipe.c

1976

static void ice_free_flow_profs(struct ice_hw *hw, u8 blk_idx)

sys/dev/ice/ice_flex_pipe.c

1980

ice_acquire_lock(&hw->fl_profs_locks[blk_idx]);

sys/dev/ice/ice_flex_pipe.c

1981

LIST_FOR_EACH_ENTRY_SAFE(p, tmp, &hw->fl_profs[blk_idx],

sys/dev/ice/ice_flex_pipe.c

1985

ice_free(hw, p);

sys/dev/ice/ice_flex_pipe.c

1987

ice_release_lock(&hw->fl_profs_locks[blk_idx]);

sys/dev/ice/ice_flex_pipe.c

1992

INIT_LIST_HEAD(&hw->fl_profs[blk_idx]);

sys/dev/ice/ice_flex_pipe.c

2000

static void ice_free_vsig_tbl(struct ice_hw *hw, enum ice_block blk)

sys/dev/ice/ice_flex_pipe.c

2004

if (!hw->blk[blk].xlt2.vsig_tbl)

sys/dev/ice/ice_flex_pipe.c

2008

if (hw->blk[blk].xlt2.vsig_tbl[i].in_use)

sys/dev/ice/ice_flex_pipe.c

2009

ice_vsig_free(hw, blk, i);

sys/dev/ice/ice_flex_pipe.c

2016

void ice_free_hw_tbls(struct ice_hw *hw)

sys/dev/ice/ice_flex_pipe.c

2022

if (hw->blk[i].is_list_init) {

sys/dev/ice/ice_flex_pipe.c

2023

struct ice_es *es = &hw->blk[i].es;

sys/dev/ice/ice_flex_pipe.c

2025

ice_free_prof_map(hw, i);

sys/dev/ice/ice_flex_pipe.c

2028

ice_free_flow_profs(hw, i);

sys/dev/ice/ice_flex_pipe.c

2029

ice_destroy_lock(&hw->fl_profs_locks[i]);

sys/dev/ice/ice_flex_pipe.c

2031

hw->blk[i].is_list_init = false;

sys/dev/ice/ice_flex_pipe.c

2033

ice_free_vsig_tbl(hw, (enum ice_block)i);

sys/dev/ice/ice_flex_pipe.c

2034

ice_free(hw, hw->blk[i].xlt1.ptypes);

sys/dev/ice/ice_flex_pipe.c

2035

ice_free(hw, hw->blk[i].xlt1.ptg_tbl);

sys/dev/ice/ice_flex_pipe.c

2036

ice_free(hw, hw->blk[i].xlt1.t);

sys/dev/ice/ice_flex_pipe.c

2037

ice_free(hw, hw->blk[i].xlt2.t);

sys/dev/ice/ice_flex_pipe.c

2038

ice_free(hw, hw->blk[i].xlt2.vsig_tbl);

sys/dev/ice/ice_flex_pipe.c

2039

ice_free(hw, hw->blk[i].xlt2.vsis);

sys/dev/ice/ice_flex_pipe.c

2040

ice_free(hw, hw->blk[i].prof.t);

sys/dev/ice/ice_flex_pipe.c

2041

ice_free(hw, hw->blk[i].prof_redir.t);

sys/dev/ice/ice_flex_pipe.c

2042

ice_free(hw, hw->blk[i].es.t);

sys/dev/ice/ice_flex_pipe.c

2043

ice_free(hw, hw->blk[i].es.ref_count);

sys/dev/ice/ice_flex_pipe.c

2044

ice_free(hw, hw->blk[i].es.written);

sys/dev/ice/ice_flex_pipe.c

2047

LIST_FOR_EACH_ENTRY_SAFE(r, rt, &hw->rss_list_head,

sys/dev/ice/ice_flex_pipe.c

2050

ice_free(hw, r);

sys/dev/ice/ice_flex_pipe.c

2052

ice_destroy_lock(&hw->rss_locks);

sys/dev/ice/ice_flex_pipe.c

2053

ice_memset(hw->blk, 0, sizeof(hw->blk), ICE_NONDMA_MEM);

sys/dev/ice/ice_flex_pipe.c

2060

void ice_clear_hw_tbls(struct ice_hw *hw)

sys/dev/ice/ice_flex_pipe.c

2065

struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;

sys/dev/ice/ice_flex_pipe.c

2066

struct ice_prof_tcam *prof = &hw->blk[i].prof;

sys/dev/ice/ice_flex_pipe.c

2067

struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;

sys/dev/ice/ice_flex_pipe.c

2068

struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;

sys/dev/ice/ice_flex_pipe.c

2069

struct ice_es *es = &hw->blk[i].es;

sys/dev/ice/ice_flex_pipe.c

2071

if (hw->blk[i].is_list_init) {

sys/dev/ice/ice_flex_pipe.c

2072

ice_free_prof_map(hw, i);

sys/dev/ice/ice_flex_pipe.c

2073

ice_free_flow_profs(hw, i);

sys/dev/ice/ice_flex_pipe.c

2076

ice_free_vsig_tbl(hw, (enum ice_block)i);

sys/dev/ice/ice_flex_pipe.c

2147

ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,

sys/dev/ice/ice_flex_pipe.c

2158

switch (hw->blk[blk].prof.cdid_bits) {

sys/dev/ice/ice_flex_pipe.c

2180

ice_debug(hw, ICE_DBG_PKG, "Error in profile config\n");

sys/dev/ice/ice_flex_pipe.c

2203

ice_tcam_write_entry(struct ice_hw *hw, enum ice_block blk, u16 idx,

sys/dev/ice/ice_flex_pipe.c

2212

status = ice_prof_gen_key(hw, blk, ptg, vsig, cdid, flags, vl_msk,

sys/dev/ice/ice_flex_pipe.c

2213

dc_msk, nm_msk, hw->blk[blk].prof.t[idx].key);

sys/dev/ice/ice_flex_pipe.c

2215

hw->blk[blk].prof.t[idx].addr = CPU_TO_LE16(idx);

sys/dev/ice/ice_flex_pipe.c

2216

hw->blk[blk].prof.t[idx].prof_id = prof_id;

sys/dev/ice/ice_flex_pipe.c

2230

ice_vsig_get_ref(struct ice_hw *hw, enum ice_block blk, u16 vsig, u16 *refs)

sys/dev/ice/ice_flex_pipe.c

2237

if (!hw->blk[blk].xlt2.vsig_tbl[idx].in_use)

sys/dev/ice/ice_flex_pipe.c

2240

ptr = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;

sys/dev/ice/ice_flex_pipe.c

2257

ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)

sys/dev/ice/ice_flex_pipe.c

2262

LIST_FOR_EACH_ENTRY(ent, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,

sys/dev/ice/ice_flex_pipe.c

2267

ice_debug(hw, ICE_DBG_INIT, "Characteristic list for VSI group %d not found.\n",

sys/dev/ice/ice_flex_pipe.c

2280

ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flex_pipe.c

2283

u16 vec_size = hw->blk[blk].es.fvw * sizeof(struct ice_fv_word);

sys/dev/ice/ice_flex_pipe.c

2288

u16 off = tmp->prof_id * hw->blk[blk].es.fvw;

sys/dev/ice/ice_flex_pipe.c

2306

ice_memcpy(p->es, &hw->blk[blk].es.t[off], vec_size,

sys/dev/ice/ice_flex_pipe.c

2321

ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flex_pipe.c

2346

&hw->blk[blk].prof.t[tmp->tcam_idx].key,

sys/dev/ice/ice_flex_pipe.c

2347

sizeof(hw->blk[blk].prof.t->key),

sys/dev/ice/ice_flex_pipe.c

2438

ice_upd_prof_hw(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flex_pipe.c

2478

b = ice_pkg_buf_alloc(hw);

sys/dev/ice/ice_flex_pipe.c

2488

status = ice_prof_bld_es(hw, blk, b, chgs);

sys/dev/ice/ice_flex_pipe.c

2494

status = ice_prof_bld_tcam(hw, blk, b, chgs);

sys/dev/ice/ice_flex_pipe.c

2522

status = ice_update_pkg(hw, ice_pkg_buf(b), 1);

sys/dev/ice/ice_flex_pipe.c

2524

ice_debug(hw, ICE_DBG_INIT, "Unable to update HW profile\n");

sys/dev/ice/ice_flex_pipe.c

2527

ice_pkg_buf_free(hw, b);

sys/dev/ice/ice_flex_pipe.c

2545

ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id,

sys/dev/ice/ice_flex_pipe.c

2556

ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

2559

status = ice_find_prof_id(hw, blk, es, &prof_id);

sys/dev/ice/ice_flex_pipe.c

2562

status = ice_alloc_prof_id(hw, blk, &prof_id);

sys/dev/ice/ice_flex_pipe.c

2567

ice_write_es(hw, blk, prof_id, es);

sys/dev/ice/ice_flex_pipe.c

2570

ice_prof_inc_ref(hw, blk, prof_id);

sys/dev/ice/ice_flex_pipe.c

2574

prof = (struct ice_prof_map *)ice_malloc(hw, sizeof(*prof));

sys/dev/ice/ice_flex_pipe.c

2590

if (ice_ptg_find_ptype(hw, blk, ptype, &ptg))

sys/dev/ice/ice_flex_pipe.c

2604

LIST_ADD(&prof->list, &hw->blk[blk].es.prof_map);

sys/dev/ice/ice_flex_pipe.c

2608

ice_release_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

2622

ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id)

sys/dev/ice/ice_flex_pipe.c

2627

LIST_FOR_EACH_ENTRY(map, &hw->blk[blk].es.prof_map, ice_prof_map, list)

sys/dev/ice/ice_flex_pipe.c

2644

ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt)

sys/dev/ice/ice_flex_pipe.c

2649

ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

2650

entry = ice_search_prof_id(hw, blk, id);

sys/dev/ice/ice_flex_pipe.c

2655

ice_release_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

2667

ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt)

sys/dev/ice/ice_flex_pipe.c

2672

ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

2673

entry = ice_search_prof_id(hw, blk, id);

sys/dev/ice/ice_flex_pipe.c

2678

ice_release_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

2689

ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)

sys/dev/ice/ice_flex_pipe.c

2694

LIST_FOR_EACH_ENTRY(p, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,

sys/dev/ice/ice_flex_pipe.c

2708

ice_rel_tcam_idx(struct ice_hw *hw, enum ice_block blk, u16 idx)

sys/dev/ice/ice_flex_pipe.c

2717

status = ice_tcam_write_entry(hw, blk, idx, 0, 0, 0, 0, 0, vl_msk,

sys/dev/ice/ice_flex_pipe.c

2723

status = ice_free_tcam_ent(hw, blk, idx);

sys/dev/ice/ice_flex_pipe.c

2735

ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flex_pipe.c

2744

status = ice_rel_tcam_idx(hw, blk,

sys/dev/ice/ice_flex_pipe.c

2761

ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,

sys/dev/ice/ice_flex_pipe.c

2770

&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,

sys/dev/ice/ice_flex_pipe.c

2774

status = ice_rem_prof_id(hw, blk, d);

sys/dev/ice/ice_flex_pipe.c

2779

ice_free(hw, d);

sys/dev/ice/ice_flex_pipe.c

2783

vsi_cur = hw->blk[blk].xlt2.vsig_tbl[idx].first_vsi;

sys/dev/ice/ice_flex_pipe.c

2792

p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));

sys/dev/ice/ice_flex_pipe.c

2799

p->vsi = (u16)(vsi_cur - hw->blk[blk].xlt2.vsis);

sys/dev/ice/ice_flex_pipe.c

2806

return ice_vsig_free(hw, blk, vsig);

sys/dev/ice/ice_flex_pipe.c

2818

ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,

sys/dev/ice/ice_flex_pipe.c

2825

&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,

sys/dev/ice/ice_flex_pipe.c

2830

if (ice_vsig_prof_id_count(hw, blk, vsig) == 1)

sys/dev/ice/ice_flex_pipe.c

2832

return ice_rem_vsig(hw, blk, vsig, chg);

sys/dev/ice/ice_flex_pipe.c

2834

status = ice_rem_prof_id(hw, blk, p);

sys/dev/ice/ice_flex_pipe.c

2837

ice_free(hw, p);

sys/dev/ice/ice_flex_pipe.c

2852

ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)

sys/dev/ice/ice_flex_pipe.c

2862

if (hw->blk[blk].xlt2.vsig_tbl[i].in_use) {

sys/dev/ice/ice_flex_pipe.c

2863

if (ice_has_prof_vsig(hw, blk, i, id)) {

sys/dev/ice/ice_flex_pipe.c

2864

status = ice_rem_prof_id_vsig(hw, blk, i, id,

sys/dev/ice/ice_flex_pipe.c

2871

status = ice_upd_prof_hw(hw, blk, &chg);

sys/dev/ice/ice_flex_pipe.c

2876

ice_free(hw, del);

sys/dev/ice/ice_flex_pipe.c

2892

int ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)

sys/dev/ice/ice_flex_pipe.c

2897

ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

2899

pmap = ice_search_prof_id(hw, blk, id);

sys/dev/ice/ice_flex_pipe.c

2906

status = ice_rem_flow_all(hw, blk, pmap->profile_cookie);

sys/dev/ice/ice_flex_pipe.c

2911

ice_prof_dec_ref(hw, blk, pmap->prof_id);

sys/dev/ice/ice_flex_pipe.c

2914

ice_free(hw, pmap);

sys/dev/ice/ice_flex_pipe.c

2917

ice_release_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

2929

ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,

sys/dev/ice/ice_flex_pipe.c

2937

ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

2939

map = ice_search_prof_id(hw, blk, hdl);

sys/dev/ice/ice_flex_pipe.c

2946

if (!hw->blk[blk].es.written[map->prof_id]) {

sys/dev/ice/ice_flex_pipe.c

2948

p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));

sys/dev/ice/ice_flex_pipe.c

2962

hw->blk[blk].es.written[map->prof_id] = true;

sys/dev/ice/ice_flex_pipe.c

2968

ice_release_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

2983

ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,

sys/dev/ice/ice_flex_pipe.c

2989

LIST_FOR_EACH_ENTRY(ent1, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,

sys/dev/ice/ice_flex_pipe.c

2994

p = (struct ice_vsig_prof *)ice_memdup(hw, ent1, sizeof(*p),

sys/dev/ice/ice_flex_pipe.c

3007

ice_free(hw, ent1);

sys/dev/ice/ice_flex_pipe.c

3021

ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flex_pipe.c

3029

ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

3030

map = ice_search_prof_id(hw, blk, hdl);

sys/dev/ice/ice_flex_pipe.c

3036

p = (struct ice_vsig_prof *)ice_malloc(hw, sizeof(*p));

sys/dev/ice/ice_flex_pipe.c

3055

ice_release_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

3068

ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig,

sys/dev/ice/ice_flex_pipe.c

3075

p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));

sys/dev/ice/ice_flex_pipe.c

3079

status = ice_vsig_find_vsi(hw, blk, vsi, &orig_vsig);

sys/dev/ice/ice_flex_pipe.c

3081

status = ice_vsig_add_mv_vsi(hw, blk, vsi, vsig);

sys/dev/ice/ice_flex_pipe.c

3084

ice_free(hw, p);

sys/dev/ice/ice_flex_pipe.c

3105

ice_rem_chg_tcam_ent(struct ice_hw *hw, u16 idx, struct LIST_HEAD_TYPE *chg)

sys/dev/ice/ice_flex_pipe.c

3112

ice_free(hw, tmp);

sys/dev/ice/ice_flex_pipe.c

3128

ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,

sys/dev/ice/ice_flex_pipe.c

3141

status = ice_rel_tcam_idx(hw, blk, tcam->tcam_idx);

sys/dev/ice/ice_flex_pipe.c

3147

ice_rem_chg_tcam_ent(hw, tcam->tcam_idx, chg);

sys/dev/ice/ice_flex_pipe.c

3154

status = ice_alloc_tcam_ent(hw, blk, true, &tcam->tcam_idx);

sys/dev/ice/ice_flex_pipe.c

3159

p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));

sys/dev/ice/ice_flex_pipe.c

3163

status = ice_tcam_write_entry(hw, blk, tcam->tcam_idx, tcam->prof_id,

sys/dev/ice/ice_flex_pipe.c

3184

ice_free(hw, p);

sys/dev/ice/ice_flex_pipe.c

3196

ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,

sys/dev/ice/ice_flex_pipe.c

3216

LIST_FOR_EACH_ENTRY(t, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,

sys/dev/ice/ice_flex_pipe.c

3233

status = ice_prof_tcam_ena_dis(hw, blk, false,

sys/dev/ice/ice_flex_pipe.c

3243

status = ice_prof_tcam_ena_dis(hw, blk, true,

sys/dev/ice/ice_flex_pipe.c

3269

ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,

sys/dev/ice/ice_flex_pipe.c

3283

if (ice_has_prof_vsig(hw, blk, vsig, hdl))

sys/dev/ice/ice_flex_pipe.c

3287

t = (struct ice_vsig_prof *)ice_malloc(hw, sizeof(*t));

sys/dev/ice/ice_flex_pipe.c

3291

ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

3293

map = ice_search_prof_id(hw, blk, hdl);

sys/dev/ice/ice_flex_pipe.c

3308

p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));

sys/dev/ice/ice_flex_pipe.c

3315

status = ice_alloc_tcam_ent(hw, blk, true, &tcam_idx);

sys/dev/ice/ice_flex_pipe.c

3317

ice_free(hw, p);

sys/dev/ice/ice_flex_pipe.c

3334

status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx,

sys/dev/ice/ice_flex_pipe.c

3339

ice_free(hw, p);

sys/dev/ice/ice_flex_pipe.c

3351

&hw->blk[blk].xlt2.vsig_tbl[vsig_idx].prop_lst);

sys/dev/ice/ice_flex_pipe.c

3354

&hw->blk[blk].xlt2.vsig_tbl[vsig_idx].prop_lst);

sys/dev/ice/ice_flex_pipe.c

3356

ice_release_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

3360

ice_release_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flex_pipe.c

3362

ice_free(hw, t);

sys/dev/ice/ice_flex_pipe.c

3375

ice_create_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl,

sys/dev/ice/ice_flex_pipe.c

3382

p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));

sys/dev/ice/ice_flex_pipe.c

3386

new_vsig = ice_vsig_alloc(hw, blk);

sys/dev/ice/ice_flex_pipe.c

339

static bool ice_tunnel_port_in_use_hlpr(struct ice_hw *hw, u16 port, u16 *index)

sys/dev/ice/ice_flex_pipe.c

3392

status = ice_move_vsi(hw, blk, vsi, new_vsig, chg);

sys/dev/ice/ice_flex_pipe.c

3396

status = ice_add_prof_id_vsig(hw, blk, new_vsig, hdl, false, chg);

sys/dev/ice/ice_flex_pipe.c

3411

ice_free(hw, p);

sys/dev/ice/ice_flex_pipe.c

3425

ice_create_vsig_from_lst(struct ice_hw *hw, enum ice_block blk, u16 vsi,

sys/dev/ice/ice_flex_pipe.c

343

for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)

sys/dev/ice/ice_flex_pipe.c

3433

vsig = ice_vsig_alloc(hw, blk);

sys/dev/ice/ice_flex_pipe.c

3437

status = ice_move_vsi(hw, blk, vsi, vsig, chg);

sys/dev/ice/ice_flex_pipe.c

344

if (hw->tnl.tbl[i].in_use && hw->tnl.tbl[i].port == port) {

sys/dev/ice/ice_flex_pipe.c

3443

status = ice_add_prof_id_vsig(hw, blk, vsig, t->profile_cookie,

sys/dev/ice/ice_flex_pipe.c

3462

ice_find_prof_vsig(struct ice_hw *hw, enum ice_block blk, u64 hdl, u16 *vsig)

sys/dev/ice/ice_flex_pipe.c

3470

t = (struct ice_vsig_prof *)ice_malloc(hw, sizeof(*t));

sys/dev/ice/ice_flex_pipe.c

3477

status = ice_find_dup_props_vsig(hw, blk, &lst, vsig);

sys/dev/ice/ice_flex_pipe.c

3480

ice_free(hw, t);

sys/dev/ice/ice_flex_pipe.c

3500

ice_add_vsi_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)

sys/dev/ice/ice_flex_pipe.c

3513

status = ice_move_vsi(hw, blk, vsi, vsig, &chg);

sys/dev/ice/ice_flex_pipe.c

3516

status = ice_upd_prof_hw(hw, blk, &chg);

sys/dev/ice/ice_flex_pipe.c

3520

ice_free(hw, del);

sys/dev/ice/ice_flex_pipe.c

3538

ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)

sys/dev/ice/ice_flex_pipe.c

3551

status = ice_get_prof(hw, blk, hdl, &chg);

sys/dev/ice/ice_flex_pipe.c

3556

status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);

sys/dev/ice/ice_flex_pipe.c

3569

if (ice_has_prof_vsig(hw, blk, vsig, hdl)) {

sys/dev/ice/ice_flex_pipe.c

3575

status = ice_vsig_get_ref(hw, blk, vsig, &ref);

sys/dev/ice/ice_flex_pipe.c

3583

status = ice_get_profs_vsig(hw, blk, vsig, &union_lst);

sys/dev/ice/ice_flex_pipe.c

3587

status = ice_add_prof_to_lst(hw, blk, &union_lst, hdl);

sys/dev/ice/ice_flex_pipe.c

3592

status = ice_find_dup_props_vsig(hw, blk, &union_lst, &vsig);

sys/dev/ice/ice_flex_pipe.c

3595

status = ice_move_vsi(hw, blk, vsi, vsig, &chg);

sys/dev/ice/ice_flex_pipe.c

3603

status = ice_rem_vsig(hw, blk, or_vsig, &chg);

sys/dev/ice/ice_flex_pipe.c

3613

status = ice_add_prof_id_vsig(hw, blk, vsig, hdl, false,

sys/dev/ice/ice_flex_pipe.c

3619

status = ice_adj_prof_priorities(hw, blk, vsig, &chg);

sys/dev/ice/ice_flex_pipe.c

362

bool ice_tunnel_port_in_use(struct ice_hw *hw, u16 port, u16 *index)

sys/dev/ice/ice_flex_pipe.c

3624

status = ice_create_vsig_from_lst(hw, blk, vsi,

sys/dev/ice/ice_flex_pipe.c

3631

status = ice_adj_prof_priorities(hw, blk, vsig, &chg);

sys/dev/ice/ice_flex_pipe.c

3638

if (ice_find_prof_vsig(hw, blk, hdl, &vsig)) {

sys/dev/ice/ice_flex_pipe.c

3641

status = ice_move_vsi(hw, blk, vsi, vsig, &chg);

sys/dev/ice/ice_flex_pipe.c

3647

status = ice_create_prof_id_vsig(hw, blk, vsi, hdl,

sys/dev/ice/ice_flex_pipe.c

3656

status = ice_upd_prof_hw(hw, blk, &chg);

sys/dev/ice/ice_flex_pipe.c

366

ice_acquire_lock(&hw->tnl_lock);

sys/dev/ice/ice_flex_pipe.c

3661

ice_free(hw, del);

sys/dev/ice/ice_flex_pipe.c

3666

ice_free(hw, del1);

sys/dev/ice/ice_flex_pipe.c

367

res = ice_tunnel_port_in_use_hlpr(hw, port, index);

sys/dev/ice/ice_flex_pipe.c

368

ice_release_lock(&hw->tnl_lock);

sys/dev/ice/ice_flex_pipe.c

3685

ice_add_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,

sys/dev/ice/ice_flex_pipe.c

3693

status = ice_add_prof_id_flow(hw, blk, vsi[i], id);

sys/dev/ice/ice_flex_pipe.c

3708

ice_rem_prof_from_list(struct ice_hw *hw, struct LIST_HEAD_TYPE *lst, u64 hdl)

sys/dev/ice/ice_flex_pipe.c

3715

ice_free(hw, ent);

sys/dev/ice/ice_flex_pipe.c

3734

ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)

sys/dev/ice/ice_flex_pipe.c

3746

status = ice_vsig_find_vsi(hw, blk, vsi, &vsig);

sys/dev/ice/ice_flex_pipe.c

3753

last_profile = ice_vsig_prof_id_count(hw, blk, vsig) == 1;

sys/dev/ice/ice_flex_pipe.c

3754

status = ice_vsig_get_ref(hw, blk, vsig, &ref);

sys/dev/ice/ice_flex_pipe.c

3770

status = ice_rem_vsig(hw, blk, vsig, &chg);

sys/dev/ice/ice_flex_pipe.c

3774

status = ice_rem_prof_id_vsig(hw, blk, vsig,

sys/dev/ice/ice_flex_pipe.c

3780

status = ice_adj_prof_priorities(hw, blk, vsig,

sys/dev/ice/ice_flex_pipe.c

3788

status = ice_get_profs_vsig(hw, blk, vsig, &copy);

sys/dev/ice/ice_flex_pipe.c

3793

status = ice_rem_prof_from_list(hw, &copy, hdl);

sys/dev/ice/ice_flex_pipe.c

3798

status = ice_move_vsi(hw, blk, vsi,

sys/dev/ice/ice_flex_pipe.c

3803

} else if (!ice_find_dup_props_vsig(hw, blk, &copy,

sys/dev/ice/ice_flex_pipe.c

3812

status = ice_move_vsi(hw, blk, vsi, vsig, &chg);

sys/dev/ice/ice_flex_pipe.c

382

ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type)

sys/dev/ice/ice_flex_pipe.c

3820

status = ice_create_vsig_from_lst(hw, blk, vsi,

sys/dev/ice/ice_flex_pipe.c

3827

status = ice_adj_prof_priorities(hw, blk, vsig,

sys/dev/ice/ice_flex_pipe.c

3839

status = ice_upd_prof_hw(hw, blk, &chg);

sys/dev/ice/ice_flex_pipe.c

3844

ice_free(hw, del);

sys/dev/ice/ice_flex_pipe.c

3849

ice_free(hw, del1);

sys/dev/ice/ice_flex_pipe.c

3868

ice_rem_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,

sys/dev/ice/ice_flex_pipe.c

387

ice_acquire_lock(&hw->tnl_lock);

sys/dev/ice/ice_flex_pipe.c

3876

status = ice_rem_prof_id_flow(hw, blk, vsi[i], id);

sys/dev/ice/ice_flex_pipe.c

389

for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)

sys/dev/ice/ice_flex_pipe.c

390

if (hw->tnl.tbl[i].in_use && hw->tnl.tbl[i].port == port) {

sys/dev/ice/ice_flex_pipe.c

391

*type = hw->tnl.tbl[i].type;

sys/dev/ice/ice_flex_pipe.c

396

ice_release_lock(&hw->tnl_lock);

sys/dev/ice/ice_flex_pipe.c

410

ice_find_free_tunnel_entry(struct ice_hw *hw, enum ice_tunnel_type type,

sys/dev/ice/ice_flex_pipe.c

415

for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)

sys/dev/ice/ice_flex_pipe.c

416

if (hw->tnl.tbl[i].valid && !hw->tnl.tbl[i].in_use &&

sys/dev/ice/ice_flex_pipe.c

417

hw->tnl.tbl[i].type == type) {

sys/dev/ice/ice_flex_pipe.c

433

ice_get_open_tunnel_port(struct ice_hw *hw, enum ice_tunnel_type type,

sys/dev/ice/ice_flex_pipe.c

439

ice_acquire_lock(&hw->tnl_lock);

sys/dev/ice/ice_flex_pipe.c

441

for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)

sys/dev/ice/ice_flex_pipe.c

442

if (hw->tnl.tbl[i].valid && hw->tnl.tbl[i].in_use &&

sys/dev/ice/ice_flex_pipe.c

443

(type == TNL_ALL || hw->tnl.tbl[i].type == type)) {

sys/dev/ice/ice_flex_pipe.c

444

*port = hw->tnl.tbl[i].port;

sys/dev/ice/ice_flex_pipe.c

449

ice_release_lock(&hw->tnl_lock);

sys/dev/ice/ice_flex_pipe.c

465

ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port)

sys/dev/ice/ice_flex_pipe.c

472

ice_acquire_lock(&hw->tnl_lock);

sys/dev/ice/ice_flex_pipe.c

474

if (ice_tunnel_port_in_use_hlpr(hw, port, &index)) {

sys/dev/ice/ice_flex_pipe.c

475

hw->tnl.tbl[index].ref++;

sys/dev/ice/ice_flex_pipe.c

480

if (!ice_find_free_tunnel_entry(hw, type, &index)) {

sys/dev/ice/ice_flex_pipe.c

485

bld = ice_pkg_buf_alloc(hw);

sys/dev/ice/ice_flex_pipe.c

510

ice_memcpy(sect_rx->tcam, hw->tnl.tbl[index].boost_entry,

sys/dev/ice/ice_flex_pipe.c

525

status = ice_update_pkg(hw, ice_pkg_buf(bld), 1);

sys/dev/ice/ice_flex_pipe.c

527

hw->tnl.tbl[index].port = port;

sys/dev/ice/ice_flex_pipe.c

528

hw->tnl.tbl[index].in_use = true;

sys/dev/ice/ice_flex_pipe.c

529

hw->tnl.tbl[index].ref = 1;

sys/dev/ice/ice_flex_pipe.c

533

ice_pkg_buf_free(hw, bld);

sys/dev/ice/ice_flex_pipe.c

536

ice_release_lock(&hw->tnl_lock);

sys/dev/ice/ice_flex_pipe.c

551

int ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all)

sys/dev/ice/ice_flex_pipe.c

561

ice_acquire_lock(&hw->tnl_lock);

sys/dev/ice/ice_flex_pipe.c

563

if (!all && ice_tunnel_port_in_use_hlpr(hw, port, &index))

sys/dev/ice/ice_flex_pipe.c

564

if (hw->tnl.tbl[index].ref > 1) {

sys/dev/ice/ice_flex_pipe.c

565

hw->tnl.tbl[index].ref--;

sys/dev/ice/ice_flex_pipe.c

571

for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)

sys/dev/ice/ice_flex_pipe.c

572

if (hw->tnl.tbl[i].valid && hw->tnl.tbl[i].in_use &&

sys/dev/ice/ice_flex_pipe.c

573

(all || hw->tnl.tbl[i].port == port))

sys/dev/ice/ice_flex_pipe.c

584

bld = ice_pkg_buf_alloc(hw);

sys/dev/ice/ice_flex_pipe.c

611

for (i = 0, j = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++)

sys/dev/ice/ice_flex_pipe.c

612

if (hw->tnl.tbl[i].valid && hw->tnl.tbl[i].in_use &&

sys/dev/ice/ice_flex_pipe.c

613

(all || hw->tnl.tbl[i].port == port)) {

sys/dev/ice/ice_flex_pipe.c

615

hw->tnl.tbl[i].boost_entry,

sys/dev/ice/ice_flex_pipe.c

619

hw->tnl.tbl[i].boost_entry,

sys/dev/ice/ice_flex_pipe.c

622

hw->tnl.tbl[i].marked = true;

sys/dev/ice/ice_flex_pipe.c

626

status = ice_update_pkg(hw, ice_pkg_buf(bld), 1);

sys/dev/ice/ice_flex_pipe.c

628

for (i = 0; i < hw->tnl.count &&

sys/dev/ice/ice_flex_pipe.c

630

if (hw->tnl.tbl[i].marked) {

sys/dev/ice/ice_flex_pipe.c

631

hw->tnl.tbl[i].ref = 0;

sys/dev/ice/ice_flex_pipe.c

632

hw->tnl.tbl[i].port = 0;

sys/dev/ice/ice_flex_pipe.c

633

hw->tnl.tbl[i].in_use = false;

sys/dev/ice/ice_flex_pipe.c

634

hw->tnl.tbl[i].marked = false;

sys/dev/ice/ice_flex_pipe.c

638

ice_pkg_buf_free(hw, bld);

sys/dev/ice/ice_flex_pipe.c

641

ice_release_lock(&hw->tnl_lock);

sys/dev/ice/ice_flex_pipe.c

652

int ice_replay_tunnels(struct ice_hw *hw)

sys/dev/ice/ice_flex_pipe.c

657

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_flex_pipe.c

659

for (i = 0; i < hw->tnl.count && i < ICE_TUNNEL_MAX_ENTRIES; i++) {

sys/dev/ice/ice_flex_pipe.c

660

enum ice_tunnel_type type = hw->tnl.tbl[i].type;

sys/dev/ice/ice_flex_pipe.c

661

u16 refs = hw->tnl.tbl[i].ref;

sys/dev/ice/ice_flex_pipe.c

662

u16 port = hw->tnl.tbl[i].port;

sys/dev/ice/ice_flex_pipe.c

664

if (!hw->tnl.tbl[i].in_use)

sys/dev/ice/ice_flex_pipe.c

670

hw->tnl.tbl[i].ref = 1; /* make sure to destroy in one call */

sys/dev/ice/ice_flex_pipe.c

671

status = ice_destroy_tunnel(hw, port, false);

sys/dev/ice/ice_flex_pipe.c

673

ice_debug(hw, ICE_DBG_PKG, "ERR: 0x%x - destroy tunnel port 0x%x\n",

sys/dev/ice/ice_flex_pipe.c

675

hw->tnl.tbl[i].ref = refs;

sys/dev/ice/ice_flex_pipe.c

679

status = ice_create_tunnel(hw, type, port);

sys/dev/ice/ice_flex_pipe.c

681

ice_debug(hw, ICE_DBG_PKG, "ERR: 0x%x - create tunnel port 0x%x\n",

sys/dev/ice/ice_flex_pipe.c

687

hw->tnl.tbl[i].ref = refs;

sys/dev/ice/ice_flex_pipe.c

703

ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 fv_idx,

sys/dev/ice/ice_flex_pipe.c

708

if (prof >= hw->blk[blk].es.count)

sys/dev/ice/ice_flex_pipe.c

711

if (fv_idx >= hw->blk[blk].es.fvw)

sys/dev/ice/ice_flex_pipe.c

714

fv_ext = hw->blk[blk].es.t + (prof * hw->blk[blk].es.fvw);

sys/dev/ice/ice_flex_pipe.c

732

int ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk)

sys/dev/ice/ice_flex_pipe.c

739

bld = ice_pkg_buf_alloc_single_section(hw, ice_sect_id(blk, ICE_XLT1),

sys/dev/ice/ice_flex_pipe.c

749

sect->value[index] = hw->blk[blk].xlt1.ptypes[index].ptg;

sys/dev/ice/ice_flex_pipe.c

751

status = ice_update_pkg(hw, ice_pkg_buf(bld), 1);

sys/dev/ice/ice_flex_pipe.c

753

ice_pkg_buf_free(hw, bld);

sys/dev/ice/ice_flex_pipe.c

770

ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg)

sys/dev/ice/ice_flex_pipe.c

775

*ptg = hw->blk[blk].xlt1.ptypes[ptype].ptg;

sys/dev/ice/ice_flex_pipe.c

788

static void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg)

sys/dev/ice/ice_flex_pipe.c

790

hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true;

sys/dev/ice/ice_flex_pipe.c

802

void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg)

sys/dev/ice/ice_flex_pipe.c

806

hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = false;

sys/dev/ice/ice_flex_pipe.c

807

p = hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;

sys/dev/ice/ice_flex_pipe.c

815

hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype = NULL;

sys/dev/ice/ice_flex_pipe.c

829

ice_ptg_remove_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)

sys/dev/ice/ice_flex_pipe.c

837

if (!hw->blk[blk].xlt1.ptg_tbl[ptg].in_use)

sys/dev/ice/ice_flex_pipe.c

841

if (!hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype)

sys/dev/ice/ice_flex_pipe.c

845

p = hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;

sys/dev/ice/ice_flex_pipe.c

846

ch = &hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;

sys/dev/ice/ice_flex_pipe.c

848

if (ptype == (p - hw->blk[blk].xlt1.ptypes)) {

sys/dev/ice/ice_flex_pipe.c

857

hw->blk[blk].xlt1.ptypes[ptype].ptg = ICE_DEFAULT_PTG;

sys/dev/ice/ice_flex_pipe.c

858

hw->blk[blk].xlt1.ptypes[ptype].next_ptype = NULL;

sys/dev/ice/ice_flex_pipe.c

876

ice_ptg_add_mv_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 ptg)

sys/dev/ice/ice_flex_pipe.c

884

if (!hw->blk[blk].xlt1.ptg_tbl[ptg].in_use && ptg != ICE_DEFAULT_PTG)

sys/dev/ice/ice_flex_pipe.c

887

status = ice_ptg_find_ptype(hw, blk, ptype, &original_ptg);

sys/dev/ice/ice_flex_pipe.c

897

ice_ptg_remove_ptype(hw, blk, ptype, original_ptg);

sys/dev/ice/ice_flex_pipe.c

904

hw->blk[blk].xlt1.ptypes[ptype].next_ptype =

sys/dev/ice/ice_flex_pipe.c

905

hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype;

sys/dev/ice/ice_flex_pipe.c

906

hw->blk[blk].xlt1.ptg_tbl[ptg].first_ptype =

sys/dev/ice/ice_flex_pipe.c

907

&hw->blk[blk].xlt1.ptypes[ptype];

sys/dev/ice/ice_flex_pipe.c

909

hw->blk[blk].xlt1.ptypes[ptype].ptg = ptg;

sys/dev/ice/ice_flex_pipe.c

910

hw->blk[blk].xlt1.t[ptype] = ptg;

sys/dev/ice/ice_flex_pipe.h

105

void ice_add_tunnel_hint(struct ice_hw *hw, char *label_name, u16 val);

sys/dev/ice/ice_flex_pipe.h

38

ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 fv_idx,

sys/dev/ice/ice_flex_pipe.h

44

ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type,

sys/dev/ice/ice_flex_pipe.h

47

ice_init_prof_result_bm(struct ice_hw *hw);

sys/dev/ice/ice_flex_pipe.h

49

ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf,

sys/dev/ice/ice_flex_pipe.h

52

ice_get_open_tunnel_port(struct ice_hw *hw, enum ice_tunnel_type type,

sys/dev/ice/ice_flex_pipe.h

55

ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port);

sys/dev/ice/ice_flex_pipe.h

56

int ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all);

sys/dev/ice/ice_flex_pipe.h

57

bool ice_tunnel_port_in_use(struct ice_hw *hw, u16 port, u16 *index);

sys/dev/ice/ice_flex_pipe.h

59

ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type);

sys/dev/ice/ice_flex_pipe.h

60

int ice_replay_tunnels(struct ice_hw *hw);

sys/dev/ice/ice_flex_pipe.h

63

int ice_ptg_update_xlt1(struct ice_hw *hw, enum ice_block blk);

sys/dev/ice/ice_flex_pipe.h

64

void ice_ptg_free(struct ice_hw *hw, enum ice_block blk, u8 ptg);

sys/dev/ice/ice_flex_pipe.h

67

int ice_vsig_update_xlt2(struct ice_hw *hw, enum ice_block blk);

sys/dev/ice/ice_flex_pipe.h

69

ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig);

sys/dev/ice/ice_flex_pipe.h

71

ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id,

sys/dev/ice/ice_flex_pipe.h

74

ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id);

sys/dev/ice/ice_flex_pipe.h

76

ice_add_vsi_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig);

sys/dev/ice/ice_flex_pipe.h

78

ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);

sys/dev/ice/ice_flex_pipe.h

80

ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);

sys/dev/ice/ice_flex_pipe.h

82

ice_set_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 cntxt);

sys/dev/ice/ice_flex_pipe.h

84

ice_get_prof_context(struct ice_hw *hw, enum ice_block blk, u64 id, u64 *cntxt);

sys/dev/ice/ice_flex_pipe.h

85

int ice_init_hw_tbls(struct ice_hw *hw);

sys/dev/ice/ice_flex_pipe.h

86

void ice_fill_blk_tbls(struct ice_hw *hw);

sys/dev/ice/ice_flex_pipe.h

87

void ice_clear_hw_tbls(struct ice_hw *hw);

sys/dev/ice/ice_flex_pipe.h

88

void ice_free_hw_tbls(struct ice_hw *hw);

sys/dev/ice/ice_flex_pipe.h

90

ice_add_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,

sys/dev/ice/ice_flex_pipe.h

93

ice_rem_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi[], u8 count,

sys/dev/ice/ice_flex_pipe.h

96

ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id);

sys/dev/ice/ice_flex_pipe.h

98

void ice_fill_blk_tbls(struct ice_hw *hw);

sys/dev/ice/ice_flow.c

1006

ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,

sys/dev/ice/ice_flow.c

1011

if (!ice_is_vsi_valid(hw, vsi_handle) || blk >= ICE_BLK_COUNT)

sys/dev/ice/ice_flow.c

1014

ice_acquire_lock(&hw->fl_profs_locks[blk]);

sys/dev/ice/ice_flow.c

1015

status = ice_add_vsi_flow(hw, blk, ice_get_hw_vsi_num(hw, vsi_handle),

sys/dev/ice/ice_flow.c

1017

ice_release_lock(&hw->fl_profs_locks[blk]);

sys/dev/ice/ice_flow.c

1033

ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flow.c

1039

status = ice_add_prof_id_flow(hw, blk,

sys/dev/ice/ice_flow.c

1040

ice_get_hw_vsi_num(hw,

sys/dev/ice/ice_flow.c

1046

ice_debug(hw, ICE_DBG_FLOW, "HW profile add failed, %d\n",

sys/dev/ice/ice_flow.c

1064

ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flow.c

1070

status = ice_rem_prof_id_flow(hw, blk,

sys/dev/ice/ice_flow.c

1071

ice_get_hw_vsi_num(hw,

sys/dev/ice/ice_flow.c

1077

ice_debug(hw, ICE_DBG_FLOW, "HW profile remove failed, %d\n",

sys/dev/ice/ice_flow.c

1097

ice_flow_add_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,

sys/dev/ice/ice_flow.c

1117

ice_acquire_lock(&hw->fl_profs_locks[blk]);

sys/dev/ice/ice_flow.c

1119

status = ice_flow_add_prof_sync(hw, blk, dir, prof_id, segs, segs_cnt,

sys/dev/ice/ice_flow.c

1122

LIST_ADD(&(*prof)->l_entry, &hw->fl_profs[blk]);

sys/dev/ice/ice_flow.c

1124

ice_release_lock(&hw->fl_profs_locks[blk]);

sys/dev/ice/ice_flow.c

1136

ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id)

sys/dev/ice/ice_flow.c

1141

ice_acquire_lock(&hw->fl_profs_locks[blk]);

sys/dev/ice/ice_flow.c

1143

prof = ice_flow_find_prof_id(hw, blk, prof_id);

sys/dev/ice/ice_flow.c

1150

status = ice_flow_rem_prof_sync(hw, blk, prof);

sys/dev/ice/ice_flow.c

1153

ice_release_lock(&hw->fl_profs_locks[blk]);

sys/dev/ice/ice_flow.c

1335

void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_flow.c

1339

if (LIST_EMPTY(&hw->rss_list_head))

sys/dev/ice/ice_flow.c

1342

ice_acquire_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

1343

LIST_FOR_EACH_ENTRY_SAFE(r, tmp, &hw->rss_list_head,

sys/dev/ice/ice_flow.c

1348

ice_free(hw, r);

sys/dev/ice/ice_flow.c

1350

ice_release_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

1362

int ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_flow.c

1369

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_flow.c

1372

if (LIST_EMPTY(&hw->fl_profs[blk]))

sys/dev/ice/ice_flow.c

1375

ice_acquire_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

1376

LIST_FOR_EACH_ENTRY_SAFE(p, t, &hw->fl_profs[blk], ice_flow_prof,

sys/dev/ice/ice_flow.c

1381

ret = ice_vsig_find_vsi(hw, blk,

sys/dev/ice/ice_flow.c

1382

ice_get_hw_vsi_num(hw, vsi_handle),

sys/dev/ice/ice_flow.c

1388

status = ice_flow_disassoc_prof(hw, blk, p, vsi_handle);

sys/dev/ice/ice_flow.c

1393

status = ice_flow_rem_prof(hw, blk, p->id);

sys/dev/ice/ice_flow.c

1399

ice_release_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

1439

ice_rem_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)

sys/dev/ice/ice_flow.c

1457

LIST_FOR_EACH_ENTRY_SAFE(r, tmp, &hw->rss_list_head,

sys/dev/ice/ice_flow.c

1465

ice_free(hw, r);

sys/dev/ice/ice_flow.c

1480

ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)

sys/dev/ice/ice_flow.c

1493

LIST_FOR_EACH_ENTRY(r, &hw->rss_list_head,

sys/dev/ice/ice_flow.c

1502

rss_cfg = (struct ice_rss_cfg *)ice_malloc(hw, sizeof(*rss_cfg));

sys/dev/ice/ice_flow.c

1512

LIST_ADD_TAIL(&rss_cfg->l_entry, &hw->rss_list_head);

sys/dev/ice/ice_flow.c

1548

ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_flow.c

1564

segs = (struct ice_flow_seg_info *)ice_calloc(hw, segs_cnt,

sys/dev/ice/ice_flow.c

1578

prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, segs_cnt,

sys/dev/ice/ice_flow.c

1590

prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, segs_cnt,

sys/dev/ice/ice_flow.c

1593

status = ice_flow_disassoc_prof(hw, blk, prof, vsi_handle);

sys/dev/ice/ice_flow.c

1595

ice_rem_rss_list(hw, vsi_handle, prof);

sys/dev/ice/ice_flow.c

1601

status = ice_flow_rem_prof(hw, blk, prof->id);

sys/dev/ice/ice_flow.c

1610

prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, segs_cnt,

sys/dev/ice/ice_flow.c

1614

status = ice_flow_assoc_prof(hw, blk, prof, vsi_handle);

sys/dev/ice/ice_flow.c

1616

status = ice_add_rss_list(hw, vsi_handle, prof);

sys/dev/ice/ice_flow.c

1623

status = ice_flow_add_prof(hw, blk, ICE_FLOW_RX,

sys/dev/ice/ice_flow.c

1631

status = ice_flow_assoc_prof(hw, blk, prof, vsi_handle);

sys/dev/ice/ice_flow.c

1636

ice_flow_rem_prof(hw, blk, prof->id);

sys/dev/ice/ice_flow.c

1640

status = ice_add_rss_list(hw, vsi_handle, prof);

sys/dev/ice/ice_flow.c

1645

ice_free(hw, segs);

sys/dev/ice/ice_flow.c

1660

ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_flow.c

1666

if (!ice_is_vsi_valid(hw, vsi_handle) || !cfg ||

sys/dev/ice/ice_flow.c

1671

ice_acquire_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

1674

status = ice_add_rss_cfg_sync(hw, vsi_handle, &local_cfg);

sys/dev/ice/ice_flow.c

1677

status = ice_add_rss_cfg_sync(hw, vsi_handle, &local_cfg);

sys/dev/ice/ice_flow.c

1680

status = ice_add_rss_cfg_sync(hw, vsi_handle,

sys/dev/ice/ice_flow.c

1684

ice_release_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

1698

ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_flow.c

1710

segs = (struct ice_flow_seg_info *)ice_calloc(hw, segs_cnt,

sys/dev/ice/ice_flow.c

1720

prof = ice_flow_find_prof_conds(hw, blk, ICE_FLOW_RX, segs, segs_cnt,

sys/dev/ice/ice_flow.c

1728

status = ice_flow_disassoc_prof(hw, blk, prof, vsi_handle);

sys/dev/ice/ice_flow.c

1735

ice_rem_rss_list(hw, vsi_handle, prof);

sys/dev/ice/ice_flow.c

1738

status = ice_flow_rem_prof(hw, blk, prof->id);

sys/dev/ice/ice_flow.c

1741

ice_free(hw, segs);

sys/dev/ice/ice_flow.c

1758

ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_flow.c

1764

if (!ice_is_vsi_valid(hw, vsi_handle) || !cfg ||

sys/dev/ice/ice_flow.c

1769

ice_acquire_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

1772

status = ice_rem_rss_cfg_sync(hw, vsi_handle, &local_cfg);

sys/dev/ice/ice_flow.c

1775

status = ice_rem_rss_cfg_sync(hw, vsi_handle, &local_cfg);

sys/dev/ice/ice_flow.c

1778

status = ice_rem_rss_cfg_sync(hw, vsi_handle,

sys/dev/ice/ice_flow.c

1782

ice_release_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

1829

int ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash)

sys/dev/ice/ice_flow.c

1836

!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_flow.c

1908

status = ice_add_rss_cfg(hw, vsi_handle, &hcfg);

sys/dev/ice/ice_flow.c

1921

int ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_flow.c

1926

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_flow.c

1929

ice_acquire_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

1930

LIST_FOR_EACH_ENTRY(r, &hw->rss_list_head,

sys/dev/ice/ice_flow.c

1933

status = ice_add_rss_cfg_sync(hw, vsi_handle, &r->hash);

sys/dev/ice/ice_flow.c

1938

ice_release_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

1952

u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs)

sys/dev/ice/ice_flow.c

1958

if (hdrs == ICE_FLOW_SEG_HDR_NONE || !ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_flow.c

1961

ice_acquire_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

1962

LIST_FOR_EACH_ENTRY(r, &hw->rss_list_head,

sys/dev/ice/ice_flow.c

1969

ice_release_lock(&hw->rss_locks);

sys/dev/ice/ice_flow.c

561

ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,

sys/dev/ice/ice_flow.c

565

u8 fv_words = (u8)hw->blk[params->blk].es.fvw;

sys/dev/ice/ice_flow.c

693

if (hw->blk[params->blk].es.reverse)

sys/dev/ice/ice_flow.c

718

ice_flow_create_xtrct_seq(struct ice_hw *hw,

sys/dev/ice/ice_flow.c

731

status = ice_flow_xtract_fld(hw, params, i, j);

sys/dev/ice/ice_flow.c

747

ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)

sys/dev/ice/ice_flow.c

755

status = ice_flow_create_xtrct_seq(hw, params);

sys/dev/ice/ice_flow.c

785

ice_flow_find_prof_conds(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flow.c

791

ice_acquire_lock(&hw->fl_profs_locks[blk]);

sys/dev/ice/ice_flow.c

792

LIST_FOR_EACH_ENTRY(p, &hw->fl_profs[blk], ice_flow_prof, l_entry)

sys/dev/ice/ice_flow.c

799

ice_is_vsi_valid(hw, vsi_handle) &&

sys/dev/ice/ice_flow.c

821

ice_release_lock(&hw->fl_profs_locks[blk]);

sys/dev/ice/ice_flow.c

835

ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,

sys/dev/ice/ice_flow.c

840

p = ice_flow_find_prof_conds(hw, blk, dir, segs, segs_cnt,

sys/dev/ice/ice_flow.c

853

ice_flow_find_prof_id(struct ice_hw *hw, enum ice_block blk, u64 prof_id)

sys/dev/ice/ice_flow.c

857

LIST_FOR_EACH_ENTRY(p, &hw->fl_profs[blk], ice_flow_prof, l_entry)

sys/dev/ice/ice_flow.c

872

ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,

sys/dev/ice/ice_flow.c

878

ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flow.c

879

map = ice_search_prof_id(hw, blk, prof_id);

sys/dev/ice/ice_flow.c

884

ice_release_lock(&hw->blk[blk].es.prof_map_lock);

sys/dev/ice/ice_flow.c

903

ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flow.c

916

params = (struct ice_flow_prof_params *)ice_malloc(hw, sizeof(*params));

sys/dev/ice/ice_flow.c

921

ice_malloc(hw, sizeof(*params->prof));

sys/dev/ice/ice_flow.c

945

status = ice_flow_proc_segs(hw, params);

sys/dev/ice/ice_flow.c

947

ice_debug(hw, ICE_DBG_FLOW, "Error processing a flow's packet segments\n");

sys/dev/ice/ice_flow.c

952

status = ice_add_prof(hw, blk, prof_id, params->ptypes, params->es);

sys/dev/ice/ice_flow.c

954

ice_debug(hw, ICE_DBG_FLOW, "Error adding a HW flow profile\n");

sys/dev/ice/ice_flow.c

962

ice_free(hw, params->prof);

sys/dev/ice/ice_flow.c

965

ice_free(hw, params);

sys/dev/ice/ice_flow.c

979

ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,

sys/dev/ice/ice_flow.c

985

status = ice_rem_prof(hw, blk, prof->id);

sys/dev/ice/ice_flow.c

988

ice_free(hw, prof);

sys/dev/ice/ice_flow.h

331

ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir,

sys/dev/ice/ice_flow.h

334

ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle,

sys/dev/ice/ice_flow.h

337

ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,

sys/dev/ice/ice_flow.h

342

void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle);

sys/dev/ice/ice_flow.h

343

int ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle);

sys/dev/ice/ice_flow.h

345

ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds);

sys/dev/ice/ice_flow.h

346

int ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle);

sys/dev/ice/ice_flow.h

348

ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_flow.h

351

ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_flow.h

353

u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs);

sys/dev/ice/ice_fw_logging.c

153

struct ice_fwlog_cfg *cfg = &sc->hw.fwlog_cfg;

sys/dev/ice/ice_fw_logging.c

188

struct ice_fwlog_cfg *cfg = &sc->hw.fwlog_cfg;

sys/dev/ice/ice_fw_logging.c

225

struct ice_fwlog_cfg *cfg = &sc->hw.fwlog_cfg;

sys/dev/ice/ice_fw_logging.c

246

if (!ice_check_sq_alive(&sc->hw, &sc->hw.adminq))

sys/dev/ice/ice_fw_logging.c

250

status = ice_fwlog_register(&sc->hw);

sys/dev/ice/ice_fw_logging.c

254

status = ice_fwlog_unregister(&sc->hw);

sys/dev/ice/ice_fw_logging.c

276

struct ice_fwlog_cfg *cfg = &sc->hw.fwlog_cfg;

sys/dev/ice/ice_fw_logging.c

347

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_fw_logging.c

353

cfg = &hw->fwlog_cfg;

sys/dev/ice/ice_fw_logging.c

372

hw->pf_id = ice_get_pf_id(hw);

sys/dev/ice/ice_fw_logging.c

373

if (hw->pf_id == 0) {

sys/dev/ice/ice_fw_logging.c

426

ice_fwlog_event_dump(&sc->hw, desc, buf);

sys/dev/ice/ice_fw_logging.c

84

ice_fwlog_init(&sc->hw, cfg);

sys/dev/ice/ice_fw_logging.c

86

if (!ice_check_sq_alive(&sc->hw, &sc->hw.adminq))

sys/dev/ice/ice_fw_logging.c

89

if (!ice_fwlog_supported(&sc->hw))

sys/dev/ice/ice_fw_logging.c

92

status = ice_fwlog_set(&sc->hw, cfg);

sys/dev/ice/ice_fw_logging.c

97

ice_aq_str(sc->hw.adminq.sq_last_status));

sys/dev/ice/ice_fwlog.c

102

ice_debug(hw, ICE_DBG_FW_LOG, "Unsupported log_resolution %u, must be between %u and %u\n",

sys/dev/ice/ice_fwlog.c

108

if (!valid_module_entries(hw, cfg->module_entries,

sys/dev/ice/ice_fwlog.c

125

ice_fwlog_init(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)

sys/dev/ice/ice_fwlog.c

127

if (!valid_cfg(hw, cfg))

sys/dev/ice/ice_fwlog.c

130

cache_cfg(hw, cfg);

sys/dev/ice/ice_fwlog.c

144

ice_aq_fwlog_set(struct ice_hw *hw, struct ice_fwlog_module_entry *entries,

sys/dev/ice/ice_fwlog.c

154

ice_calloc(hw, num_entries, sizeof(*fw_modules));

sys/dev/ice/ice_fwlog.c

178

status = ice_aq_send_cmd(hw, &desc, fw_modules,

sys/dev/ice/ice_fwlog.c

182

ice_free(hw, fw_modules);

sys/dev/ice/ice_fwlog.c

194

bool ice_fwlog_supported(struct ice_hw *hw)

sys/dev/ice/ice_fwlog.c

196

return hw->fwlog_support_ena;

sys/dev/ice/ice_fwlog.c

213

ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)

sys/dev/ice/ice_fwlog.c

217

if (!ice_fwlog_supported(hw))

sys/dev/ice/ice_fwlog.c

220

if (!valid_cfg(hw, cfg))

sys/dev/ice/ice_fwlog.c

223

status = ice_aq_fwlog_set(hw, cfg->module_entries,

sys/dev/ice/ice_fwlog.c

227

cache_cfg(hw, cfg);

sys/dev/ice/ice_fwlog.c

239

update_cached_entries(struct ice_hw *hw, struct ice_fwlog_module_entry *entries,

sys/dev/ice/ice_fwlog.c

250

&hw->fwlog_cfg.module_entries[j];

sys/dev/ice/ice_fwlog.c

273

ice_fwlog_update_modules(struct ice_hw *hw,

sys/dev/ice/ice_fwlog.c

280

if (!ice_fwlog_supported(hw))

sys/dev/ice/ice_fwlog.c

283

if (!valid_module_entries(hw, entries, num_entries))

sys/dev/ice/ice_fwlog.c

286

cfg = (struct ice_fwlog_cfg *)ice_calloc(hw, 1, sizeof(*cfg));

sys/dev/ice/ice_fwlog.c

290

status = ice_fwlog_get(hw, cfg);

sys/dev/ice/ice_fwlog.c

294

status = ice_aq_fwlog_set(hw, entries, num_entries, cfg->options,

sys/dev/ice/ice_fwlog.c

297

update_cached_entries(hw, entries, num_entries);

sys/dev/ice/ice_fwlog.c

300

ice_free(hw, cfg);

sys/dev/ice/ice_fwlog.c

309

static int ice_aq_fwlog_register(struct ice_hw *hw, bool reg)

sys/dev/ice/ice_fwlog.c

318

return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_fwlog.c

328

int ice_fwlog_register(struct ice_hw *hw)

sys/dev/ice/ice_fwlog.c

332

if (!ice_fwlog_supported(hw))

sys/dev/ice/ice_fwlog.c

335

status = ice_aq_fwlog_register(hw, true);

sys/dev/ice/ice_fwlog.c

337

ice_debug(hw, ICE_DBG_FW_LOG, "Failed to register for firmware logging events over ARQ\n");

sys/dev/ice/ice_fwlog.c

339

hw->fwlog_cfg.options |= ICE_FWLOG_OPTION_IS_REGISTERED;

sys/dev/ice/ice_fwlog.c

348

int ice_fwlog_unregister(struct ice_hw *hw)

sys/dev/ice/ice_fwlog.c

352

if (!ice_fwlog_supported(hw))

sys/dev/ice/ice_fwlog.c

355

status = ice_aq_fwlog_register(hw, false);

sys/dev/ice/ice_fwlog.c

357

ice_debug(hw, ICE_DBG_FW_LOG, "Failed to unregister from firmware logging events over ARQ\n");

sys/dev/ice/ice_fwlog.c

359

hw->fwlog_cfg.options &= ~ICE_FWLOG_OPTION_IS_REGISTERED;

sys/dev/ice/ice_fwlog.c

370

ice_aq_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)

sys/dev/ice/ice_fwlog.c

381

buf = ice_calloc(hw, 1, ICE_AQ_MAX_BUF_LEN);

sys/dev/ice/ice_fwlog.c

390

status = ice_aq_send_cmd(hw, &desc, buf, ICE_AQ_MAX_BUF_LEN, NULL);

sys/dev/ice/ice_fwlog.c

392

ice_debug(hw, ICE_DBG_FW_LOG, "Failed to get FW log configuration\n");

sys/dev/ice/ice_fwlog.c

398

ice_debug(hw, ICE_DBG_FW_LOG, "FW returned less than the expected number of FW log module IDs\n");

sys/dev/ice/ice_fwlog.c

401

ice_debug(hw, ICE_DBG_FW_LOG, "FW returned more than expected number of FW log module IDs, setting module_id_cnt to software expected max %u\n",

sys/dev/ice/ice_fwlog.c

41

static void cache_cfg(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)

sys/dev/ice/ice_fwlog.c

425

ice_free(hw, buf);

sys/dev/ice/ice_fwlog.c

43

hw->fwlog_cfg = *cfg;

sys/dev/ice/ice_fwlog.c

439

void ice_fwlog_set_support_ena(struct ice_hw *hw)

sys/dev/ice/ice_fwlog.c

444

hw->fwlog_support_ena = false;

sys/dev/ice/ice_fwlog.c

446

cfg = (struct ice_fwlog_cfg *)ice_calloc(hw, 1, sizeof(*cfg));

sys/dev/ice/ice_fwlog.c

454

status = ice_aq_fwlog_get(hw, cfg);

sys/dev/ice/ice_fwlog.c

456

ice_debug(hw, ICE_DBG_FW_LOG, "ice_fwlog_get failed, FW logging is not supported on this version of FW, status %d\n",

sys/dev/ice/ice_fwlog.c

459

hw->fwlog_support_ena = true;

sys/dev/ice/ice_fwlog.c

461

ice_free(hw, cfg);

sys/dev/ice/ice_fwlog.c

470

ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)

sys/dev/ice/ice_fwlog.c

474

if (!ice_fwlog_supported(hw))

sys/dev/ice/ice_fwlog.c

480

status = ice_aq_fwlog_get(hw, cfg);

sys/dev/ice/ice_fwlog.c

484

cache_cfg(hw, cfg);

sys/dev/ice/ice_fwlog.c

499

ice_fwlog_event_dump(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf)

sys/dev/ice/ice_fwlog.c

501

if (!ice_fwlog_supported(hw))

sys/dev/ice/ice_fwlog.c

504

ice_info_fwlog(hw, 32, 1, (u8 *)buf, LE16_TO_CPU(desc->datalen));

sys/dev/ice/ice_fwlog.c

53

valid_module_entries(struct ice_hw *hw, struct ice_fwlog_module_entry *entries,

sys/dev/ice/ice_fwlog.c

59

ice_debug(hw, ICE_DBG_FW_LOG, "Null ice_fwlog_module_entry array\n");

sys/dev/ice/ice_fwlog.c

64

ice_debug(hw, ICE_DBG_FW_LOG, "num_entries must be non-zero\n");

sys/dev/ice/ice_fwlog.c

72

ice_debug(hw, ICE_DBG_FW_LOG, "Invalid module_id %u, max valid module_id is %u\n",

sys/dev/ice/ice_fwlog.c

78

ice_debug(hw, ICE_DBG_FW_LOG, "Invalid log_level %u, max valid log_level is %u\n",

sys/dev/ice/ice_fwlog.c

93

static bool valid_cfg(struct ice_hw *hw, struct ice_fwlog_cfg *cfg)

sys/dev/ice/ice_fwlog.c

96

ice_debug(hw, ICE_DBG_FW_LOG, "Null ice_fwlog_cfg\n");

sys/dev/ice/ice_fwlog.h

77

void ice_fwlog_set_support_ena(struct ice_hw *hw);

sys/dev/ice/ice_fwlog.h

78

bool ice_fwlog_supported(struct ice_hw *hw);

sys/dev/ice/ice_fwlog.h

79

int ice_fwlog_init(struct ice_hw *hw, struct ice_fwlog_cfg *cfg);

sys/dev/ice/ice_fwlog.h

80

int ice_fwlog_set(struct ice_hw *hw, struct ice_fwlog_cfg *cfg);

sys/dev/ice/ice_fwlog.h

81

int ice_fwlog_get(struct ice_hw *hw, struct ice_fwlog_cfg *cfg);

sys/dev/ice/ice_fwlog.h

83

ice_fwlog_update_modules(struct ice_hw *hw,

sys/dev/ice/ice_fwlog.h

86

int ice_fwlog_register(struct ice_hw *hw);

sys/dev/ice/ice_fwlog.h

87

int ice_fwlog_unregister(struct ice_hw *hw);

sys/dev/ice/ice_fwlog.h

89

ice_fwlog_event_dump(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf);

sys/dev/ice/ice_hw_autogen.h

2640

#define GL_PREEXT_CDMD_L1SEL_RX_SEL_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PREEXT_CDMD_L1SEL_RX_SEL_M : E800_GL_PREEXT_CDMD_L1SEL_RX_SEL_M)

sys/dev/ice/ice_hw_autogen.h

2644

#define GL_PREEXT_CDMD_L1SEL_TX_SEL_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PREEXT_CDMD_L1SEL_TX_SEL_M : E800_GL_PREEXT_CDMD_L1SEL_TX_SEL_M)

sys/dev/ice/ice_hw_autogen.h

2648

#define GL_PREEXT_CDMD_L1SEL_AUX0_SEL_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PREEXT_CDMD_L1SEL_AUX0_SEL_M : E800_GL_PREEXT_CDMD_L1SEL_AUX0_SEL_M)

sys/dev/ice/ice_hw_autogen.h

2652

#define GL_PREEXT_CDMD_L1SEL_AUX1_SEL_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PREEXT_CDMD_L1SEL_AUX1_SEL_M : E800_GL_PREEXT_CDMD_L1SEL_AUX1_SEL_M)

sys/dev/ice/ice_hw_autogen.h

2676

#define GL_PREEXT_FLGS_L1SEL0_1_FLS0_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PREEXT_FLGS_L1SEL0_1_FLS0_M : E800_GL_PREEXT_FLGS_L1SEL0_1_FLS0_M)

sys/dev/ice/ice_hw_autogen.h

2680

#define GL_PREEXT_FLGS_L1SEL0_1_FLS1_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PREEXT_FLGS_L1SEL0_1_FLS1_M : E800_GL_PREEXT_FLGS_L1SEL0_1_FLS1_M)

sys/dev/ice/ice_hw_autogen.h

2686

#define GL_PREEXT_FLGS_L1SEL2_3_FLS2_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PREEXT_FLGS_L1SEL2_3_FLS2_M : E800_GL_PREEXT_FLGS_L1SEL2_3_FLS2_M)

sys/dev/ice/ice_hw_autogen.h

2690

#define GL_PREEXT_FLGS_L1SEL2_3_FLS3_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PREEXT_FLGS_L1SEL2_3_FLS3_M : E800_GL_PREEXT_FLGS_L1SEL2_3_FLS3_M)

sys/dev/ice/ice_hw_autogen.h

2850

#define GL_PSTEXT_CDMD_L1SEL_RX_SEL_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PSTEXT_CDMD_L1SEL_RX_SEL_M : E800_GL_PSTEXT_CDMD_L1SEL_RX_SEL_M)

sys/dev/ice/ice_hw_autogen.h

2854

#define GL_PSTEXT_CDMD_L1SEL_TX_SEL_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PSTEXT_CDMD_L1SEL_TX_SEL_M : E800_GL_PSTEXT_CDMD_L1SEL_TX_SEL_M)

sys/dev/ice/ice_hw_autogen.h

2858

#define GL_PSTEXT_CDMD_L1SEL_AUX0_SEL_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PSTEXT_CDMD_L1SEL_AUX0_SEL_M : E800_GL_PSTEXT_CDMD_L1SEL_AUX0_SEL_M)

sys/dev/ice/ice_hw_autogen.h

2862

#define GL_PSTEXT_CDMD_L1SEL_AUX1_SEL_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PSTEXT_CDMD_L1SEL_AUX1_SEL_M : E800_GL_PSTEXT_CDMD_L1SEL_AUX1_SEL_M)

sys/dev/ice/ice_hw_autogen.h

2894

#define GL_PSTEXT_FLGS_L1SEL0_1_FLS0_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PSTEXT_FLGS_L1SEL0_1_FLS0_M : E800_GL_PSTEXT_FLGS_L1SEL0_1_FLS0_M)

sys/dev/ice/ice_hw_autogen.h

2898

#define GL_PSTEXT_FLGS_L1SEL0_1_FLS1_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PSTEXT_FLGS_L1SEL0_1_FLS1_M : E800_GL_PSTEXT_FLGS_L1SEL0_1_FLS1_M)

sys/dev/ice/ice_hw_autogen.h

2904

#define GL_PSTEXT_FLGS_L1SEL2_3_FLS2_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PSTEXT_FLGS_L1SEL2_3_FLS2_M : E800_GL_PSTEXT_FLGS_L1SEL2_3_FLS2_M)

sys/dev/ice/ice_hw_autogen.h

2908

#define GL_PSTEXT_FLGS_L1SEL2_3_FLS3_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_PSTEXT_FLGS_L1SEL2_3_FLS3_M : E800_GL_PSTEXT_FLGS_L1SEL2_3_FLS3_M)

sys/dev/ice/ice_hw_autogen.h

37

#define PRTMAC_CTL_TX_PAUSE_ENABLE_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_CTL_TX_PAUSE_ENABLE : E800_PRTMAC_HSEC_CTL_TX_PAUSE_ENABLE)

sys/dev/ice/ice_hw_autogen.h

38

#define PRTMAC_CTL_TX_PAUSE_ENABLE_TX_PAUSE_ENABLE_S_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_CTL_TX_PAUSE_ENABLE_TX_PAUSE_ENABLE_S : E800_PRTMAC_HSEC_CTL_TX_PAUSE_ENABLE_HSEC_CTL_TX_PAUSE_ENABLE_S)

sys/dev/ice/ice_hw_autogen.h

39

#define PRTMAC_CTL_TX_PAUSE_ENABLE_TX_PAUSE_ENABLE_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_CTL_TX_PAUSE_ENABLE_TX_PAUSE_ENABLE_M : E800_PRTMAC_HSEC_CTL_TX_PAUSE_ENABLE_HSEC_CTL_TX_PAUSE_ENABLE_M)

sys/dev/ice/ice_hw_autogen.h

40

#define PRTMAC_CTL_RX_PAUSE_ENABLE_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_CTL_RX_PAUSE_ENABLE : E800_PRTMAC_HSEC_CTL_RX_PAUSE_ENABLE)

sys/dev/ice/ice_hw_autogen.h

41

#define PRTMAC_CTL_RX_PAUSE_ENABLE_RX_PAUSE_ENABLE_S_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_CTL_RX_PAUSE_ENABLE_RX_PAUSE_ENABLE_S : E800_PRTMAC_HSEC_CTL_RX_PAUSE_ENABLE_HSEC_CTL_RX_PAUSE_ENABLE_S)

sys/dev/ice/ice_hw_autogen.h

42

#define PRTMAC_CTL_RX_PAUSE_ENABLE_RX_PAUSE_ENABLE_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_CTL_RX_PAUSE_ENABLE_RX_PAUSE_ENABLE_M : E800_PRTMAC_HSEC_CTL_RX_PAUSE_ENABLE_HSEC_CTL_RX_PAUSE_ENABLE_M)

sys/dev/ice/ice_hw_autogen.h

4640

#define GLINT_TSYN_PHY_PHY_INDX_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLINT_TSYN_PHY_PHY_INDX_M : E800_GLINT_TSYN_PHY_PHY_INDX_M)

sys/dev/ice/ice_hw_autogen.h

4702

#define PF0INT_OICR_CPM_RSV1_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PF0INT_OICR_CPM_RSV1_M : E800_PF0INT_OICR_CPM_RSV1_M)

sys/dev/ice/ice_hw_autogen.h

4795

#define PF0INT_OICR_HLP_RSV1_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PF0INT_OICR_HLP_RSV1_M : E800_PF0INT_OICR_HLP_RSV1_M)

sys/dev/ice/ice_hw_autogen.h

4846

#define PF0INT_OICR_PSM_RSV1_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PF0INT_OICR_PSM_RSV1_M : E800_PF0INT_OICR_PSM_RSV1_M)

sys/dev/ice/ice_hw_autogen.h

486

#define PF0INT_OICR_CPM_PAGE_RSV1_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PF0INT_OICR_CPM_PAGE_RSV1_M : E800_PF0INT_OICR_CPM_PAGE_RSV1_M)

sys/dev/ice/ice_hw_autogen.h

4971

#define PFINT_OICR_RSV1_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PFINT_OICR_RSV1_M : E800_PFINT_OICR_RSV1_M)

sys/dev/ice/ice_hw_autogen.h

5041

#define PFINT_TSYN_MSK_PHY_INDX_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PFINT_TSYN_MSK_PHY_INDX_M : E800_PFINT_TSYN_MSK_PHY_INDX_M)

sys/dev/ice/ice_hw_autogen.h

5357

#define PRTMAC_LINK_DOWN_COUNTER_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_LINK_DOWN_COUNTER : E800_PRTMAC_LINK_DOWN_COUNTER)

sys/dev/ice/ice_hw_autogen.h

5362

#define PRTMAC_MD_OVRRIDE_ENABLE_BY_MAC(hw, _i) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_MD_OVRRIDE_ENABLE(_i) : E800_PRTMAC_MD_OVRRIDE_ENABLE(_i))

sys/dev/ice/ice_hw_autogen.h

5365

#define PRTMAC_MD_OVRRIDE_ENABLE_MAX_INDEX_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_MD_OVRRIDE_ENABLE_MAX_INDEX : E800_PRTMAC_MD_OVRRIDE_ENABLE_MAX_INDEX)

sys/dev/ice/ice_hw_autogen.h

5370

#define PRTMAC_MD_OVRRIDE_VAL_BY_MAC(hw, _i) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_MD_OVRRIDE_VAL(_i) : E800_PRTMAC_MD_OVRRIDE_VAL(_i))

sys/dev/ice/ice_hw_autogen.h

5373

#define PRTMAC_MD_OVRRIDE_VAL_MAX_INDEX_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_MD_OVRRIDE_VAL_MAX_INDEX : E800_PRTMAC_MD_OVRRIDE_VAL_MAX_INDEX)

sys/dev/ice/ice_hw_autogen.h

5381

#define PRTMAC_RX_PKT_DRP_CNT_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_RX_PKT_DRP_CNT : E800_PRTMAC_RX_PKT_DRP_CNT)

sys/dev/ice/ice_hw_autogen.h

5385

#define PRTMAC_RX_PKT_DRP_CNT_RX_PKT_DRP_CNT_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_RX_PKT_DRP_CNT_RX_PKT_DRP_CNT_M : E800_PRTMAC_RX_PKT_DRP_CNT_RX_PKT_DRP_CNT_M)

sys/dev/ice/ice_hw_autogen.h

5388

#define PRTMAC_RX_PKT_DRP_CNT_RX_MKR_PKT_DRP_CNT_S_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_RX_PKT_DRP_CNT_RX_MKR_PKT_DRP_CNT_S : E800_PRTMAC_RX_PKT_DRP_CNT_RX_MKR_PKT_DRP_CNT_S)

sys/dev/ice/ice_hw_autogen.h

5391

#define PRTMAC_RX_PKT_DRP_CNT_RX_MKR_PKT_DRP_CNT_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_RX_PKT_DRP_CNT_RX_MKR_PKT_DRP_CNT_M : E800_PRTMAC_RX_PKT_DRP_CNT_RX_MKR_PKT_DRP_CNT_M)

sys/dev/ice/ice_hw_autogen.h

5397

#define PRTMAC_TX_LNK_UP_CNT_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTMAC_TX_LNK_UP_CNT : E800_PRTMAC_TX_LNK_UP_CNT)

sys/dev/ice/ice_hw_autogen.h

552

#define PF0INT_OICR_HLP_PAGE_RSV1_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PF0INT_OICR_HLP_PAGE_RSV1_M : E800_PF0INT_OICR_HLP_PAGE_RSV1_M)

sys/dev/ice/ice_hw_autogen.h

5570

#define GL_MNG_FW_RAM_STAT_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_MNG_FW_RAM_STAT : E800_GL_MNG_FW_RAM_STAT)

sys/dev/ice/ice_hw_autogen.h

5579

#define GL_MNG_FWSM_FW_MODES_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_MNG_FWSM_FW_MODES_M : E800_GL_MNG_FWSM_FW_MODES_M)

sys/dev/ice/ice_hw_autogen.h

5582

#define GL_MNG_FWSM_RSV0_S_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_MNG_FWSM_RSV0_S : E800_GL_MNG_FWSM_RSV0_S)

sys/dev/ice/ice_hw_autogen.h

5585

#define GL_MNG_FWSM_RSV0_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_MNG_FWSM_RSV0_M : E800_GL_MNG_FWSM_RSV0_M)

sys/dev/ice/ice_hw_autogen.h

5611

#define GL_MNG_SHA_EXTEND_BY_MAC(hw, _i) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_MNG_SHA_EXTEND(_i) : E800_GL_MNG_SHA_EXTEND(_i))

sys/dev/ice/ice_hw_autogen.h

5614

#define GL_MNG_SHA_EXTEND_MAX_INDEX_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_MNG_SHA_EXTEND_MAX_INDEX : E800_GL_MNG_SHA_EXTEND_MAX_INDEX)

sys/dev/ice/ice_hw_autogen.h

5619

#define GL_MNG_SHA_EXTEND_ROM_BY_MAC(hw, _i) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_MNG_SHA_EXTEND_ROM(_i) : E800_GL_MNG_SHA_EXTEND_ROM(_i))

sys/dev/ice/ice_hw_autogen.h

5622

#define GL_MNG_SHA_EXTEND_ROM_MAX_INDEX_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_MNG_SHA_EXTEND_ROM_MAX_INDEX : E800_GL_MNG_SHA_EXTEND_ROM_MAX_INDEX)

sys/dev/ice/ice_hw_autogen.h

603

#define PF0INT_OICR_PSM_PAGE_RSV1_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PF0INT_OICR_PSM_PAGE_RSV1_M : E800_PF0INT_OICR_PSM_PAGE_RSV1_M)

sys/dev/ice/ice_hw_autogen.h

7252

#define GLRPB_DHW_DHW_TCN_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLRPB_DHW_DHW_TCN_M : E800_GLRPB_DHW_DHW_TCN_M)

sys/dev/ice/ice_hw_autogen.h

7258

#define GLRPB_DLW_DLW_TCN_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLRPB_DLW_DLW_TCN_M : E800_GLRPB_DLW_DLW_TCN_M)

sys/dev/ice/ice_hw_autogen.h

7264

#define GLRPB_DPS_DPS_TCN_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLRPB_DPS_DPS_TCN_M : E800_GLRPB_DPS_DPS_TCN_M)

sys/dev/ice/ice_hw_autogen.h

7275

#define GLRPB_SHW_SHW_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLRPB_SHW_SHW_M : E800_GLRPB_SHW_SHW_M)

sys/dev/ice/ice_hw_autogen.h

7281

#define GLRPB_SLW_SLW_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLRPB_SLW_SLW_M : E800_GLRPB_SLW_SLW_M)

sys/dev/ice/ice_hw_autogen.h

7287

#define GLRPB_SPS_SPS_TCN_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLRPB_SPS_SPS_TCN_M : E800_GLRPB_SPS_SPS_TCN_M)

sys/dev/ice/ice_hw_autogen.h

7299

#define GLRPB_TCHW_TCHW_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLRPB_TCHW_TCHW_M : E800_GLRPB_TCHW_TCHW_M)

sys/dev/ice/ice_hw_autogen.h

7305

#define GLRPB_TCLW_TCLW_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLRPB_TCLW_TCLW_M : E800_GLRPB_TCLW_TCLW_M)

sys/dev/ice/ice_hw_autogen.h

7320

#define GLQF_FD_CNT_FD_GCNT_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLQF_FD_CNT_FD_GCNT_M : E800_GLQF_FD_CNT_FD_GCNT_M)

sys/dev/ice/ice_hw_autogen.h

7324

#define GLQF_FD_CNT_FD_BCNT_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLQF_FD_CNT_FD_BCNT_M : E800_GLQF_FD_CNT_FD_BCNT_M)

sys/dev/ice/ice_hw_autogen.h

7336

#define GLQF_FD_SIZE_FD_GSIZE_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLQF_FD_SIZE_FD_GSIZE_M : E800_GLQF_FD_SIZE_FD_GSIZE_M)

sys/dev/ice/ice_hw_autogen.h

7340

#define GLQF_FD_SIZE_FD_BSIZE_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLQF_FD_SIZE_FD_BSIZE_M : E800_GLQF_FD_SIZE_FD_BSIZE_M)

sys/dev/ice/ice_hw_autogen.h

7345

#define GLQF_FDCNT_0_BUCKETCNT_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GLQF_FDCNT_0_BUCKETCNT_M : E800_GLQF_FDCNT_0_BUCKETCNT_M)

sys/dev/ice/ice_hw_autogen.h

7571

#define PFQF_FD_CNT_FD_GCNT_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PFQF_FD_CNT_FD_GCNT_M : E800_PFQF_FD_CNT_FD_GCNT_M)

sys/dev/ice/ice_hw_autogen.h

7575

#define PFQF_FD_CNT_FD_BCNT_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PFQF_FD_CNT_FD_BCNT_M : E800_PFQF_FD_CNT_FD_BCNT_M)

sys/dev/ice/ice_hw_autogen.h

7583

#define PFQF_FD_SIZE_FD_GSIZE_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PFQF_FD_SIZE_FD_GSIZE_M : E800_PFQF_FD_SIZE_FD_GSIZE_M)

sys/dev/ice/ice_hw_autogen.h

7587

#define PFQF_FD_SIZE_FD_BSIZE_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PFQF_FD_SIZE_FD_BSIZE_M : E800_PFQF_FD_SIZE_FD_BSIZE_M)

sys/dev/ice/ice_hw_autogen.h

7592

#define PFQF_FD_SUBTRACT_FD_GCNT_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PFQF_FD_SUBTRACT_FD_GCNT_M : E800_PFQF_FD_SUBTRACT_FD_GCNT_M)

sys/dev/ice/ice_hw_autogen.h

7596

#define PFQF_FD_SUBTRACT_FD_BCNT_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_PFQF_FD_SUBTRACT_FD_BCNT_M : E800_PFQF_FD_SUBTRACT_FD_BCNT_M)

sys/dev/ice/ice_hw_autogen.h

81

#define GL_RDPU_CNTRL_REQ_WB_PM_TH_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_RDPU_CNTRL_REQ_WB_PM_TH_M : E800_GL_RDPU_CNTRL_REQ_WB_PM_TH_M)

sys/dev/ice/ice_hw_autogen.h

84

#define GL_RDPU_CNTRL_ECO_S_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_RDPU_CNTRL_ECO_S : E800_GL_RDPU_CNTRL_ECO_S)

sys/dev/ice/ice_hw_autogen.h

87

#define GL_RDPU_CNTRL_ECO_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_GL_RDPU_CNTRL_ECO_M : E800_GL_RDPU_CNTRL_ECO_M)

sys/dev/ice/ice_hw_autogen.h

9050

#define VSIQF_FD_CNT_FD_GCNT_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_VSIQF_FD_CNT_FD_GCNT_M : E800_VSIQF_FD_CNT_FD_GCNT_M)

sys/dev/ice/ice_hw_autogen.h

9054

#define VSIQF_FD_CNT_FD_BCNT_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_VSIQF_FD_CNT_FD_BCNT_M : E800_VSIQF_FD_CNT_FD_BCNT_M)

sys/dev/ice/ice_hw_autogen.h

9080

#define VSIQF_FD_SIZE_FD_GSIZE_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_VSIQF_FD_SIZE_FD_GSIZE_M : E800_VSIQF_FD_SIZE_FD_GSIZE_M)

sys/dev/ice/ice_hw_autogen.h

9084

#define VSIQF_FD_SIZE_FD_BSIZE_M_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_VSIQF_FD_SIZE_FD_BSIZE_M : E800_VSIQF_FD_SIZE_FD_BSIZE_M)

sys/dev/ice/ice_hw_autogen.h

9210

#define PRTPM_SAH_BY_MAC(hw, _i) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTPM_SAH(_i) : E800_PRTPM_SAH(_i))

sys/dev/ice/ice_hw_autogen.h

9222

#define PRTPM_SAL_BY_MAC(hw, _i) ((hw)->mac_type == ICE_MAC_E830 ? E830_PRTPM_SAL(_i) : E800_PRTPM_SAL(_i))

sys/dev/ice/ice_hw_autogen.h

9237

#define VFPE_MRTEIDXMASK_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_VFPE_MRTEIDXMASK : E800_VFPE_MRTEIDXMASK)

sys/dev/ice/ice_hw_autogen.h

9342

#define VFINT_ITRN_BY_MAC(hw, _i, _j) ((hw)->mac_type == ICE_MAC_E830 ? E830_VFINT_ITRN(_i, _j) : E800_VFINT_ITRN(_i, _j))

sys/dev/ice/ice_hw_autogen.h

9345

#define VFINT_ITRN_MAX_INDEX_BY_MAC(hw) ((hw)->mac_type == ICE_MAC_E830 ? E830_VFINT_ITRN_MAX_INDEX : E800_VFINT_ITRN_MAX_INDEX)

sys/dev/ice/ice_iflib.h

265

struct ice_hw hw;

sys/dev/ice/ice_iflib_txrx.c

230

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iflib_txrx.c

232

wr32(hw, txq->tail, pidx);

sys/dev/ice/ice_iflib_txrx.c

544

wr32(&sc->hw, rxq->tail, pidx);

sys/dev/ice/ice_iflib_txrx.c

586

local_dcbx_cfg = &sc->hw.port_info->qos_cfg.local_dcbx_cfg;

sys/dev/ice/ice_iflib_txrx.c

664

struct ice_hw *hw = &mif->back->hw;

sys/dev/ice/ice_iflib_txrx.c

666

wr32(hw, txq->tail, pidx);

sys/dev/ice/ice_iov.c

1061

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_CONFIG_VSI_QUEUES,

sys/dev/ice/ice_iov.c

1078

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

1104

status = ice_aq_set_rss_key(hw, vsi->idx, &keydata);

sys/dev/ice/ice_iov.c

1108

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_iov.c

1114

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_CONFIG_RSS_KEY,

sys/dev/ice/ice_iov.c

1129

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

1157

status = ice_aq_set_rss_lut(hw, &lut_params);

sys/dev/ice/ice_iov.c

1162

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_iov.c

1167

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_CONFIG_RSS_LUT,

sys/dev/ice/ice_iov.c

1183

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

1197

status = ice_rem_vsi_rss_cfg(hw, vsi->idx);

sys/dev/ice/ice_iov.c

1208

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_iov.c

1209

status = ice_add_avf_rss_cfg(hw, vsi->idx, vrh->hena);

sys/dev/ice/ice_iov.c

1214

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_iov.c

1217

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_SET_RSS_HENA,

sys/dev/ice/ice_iov.c

1235

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

1282

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_ENABLE_QUEUES,

sys/dev/ice/ice_iov.c

1301

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

1322

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_DISABLE_QUEUES,

sys/dev/ice/ice_iov.c

1340

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

1423

ice_configure_rxq_interrupt(hw, vsi->rx_qmap[i],

sys/dev/ice/ice_iov.c

1428

ice_configure_txq_interrupt(hw, vsi->tx_qmap[i],

sys/dev/ice/ice_iov.c

1431

ice_flush(hw);

sys/dev/ice/ice_iov.c

1434

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_CONFIG_IRQ_MAP,

sys/dev/ice/ice_iov.c

1482

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

1490

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_GET_STATS,

sys/dev/ice/ice_iov.c

1497

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_GET_STATS,

sys/dev/ice/ice_iov.c

1513

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

1565

status = ice_get_vsi_promisc(hw, vsi->idx, old_promisc_mask, &vid);

sys/dev/ice/ice_iov.c

1571

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_iov.c

1583

status = ice_clear_vsi_promisc(hw, vsi->idx,

sys/dev/ice/ice_iov.c

1590

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_iov.c

1597

status = ice_set_vsi_promisc(hw, vsi->idx, set_promisc_mask, 0);

sys/dev/ice/ice_iov.c

1603

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_iov.c

1610

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,

sys/dev/ice/ice_iov.c

1641

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

1648

hw->port_info->phy.link_info.link_speed);

sys/dev/ice/ice_iov.c

1650

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_EVENT,

sys/dev/ice/ice_iov.c

1666

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

1689

ice_aq_send_msg_to_vf(hw, v_id, v_opcode, VIRTCHNL_STATUS_ERR_PARAM, NULL, 0, NULL);

sys/dev/ice/ice_iov.c

1746

ice_aq_send_msg_to_vf(hw, v_id, v_opcode,

sys/dev/ice/ice_iov.c

1769

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

1776

u16 abs_vf_first_irq_idx = hw->func_caps.common_cap.msix_vector_first_id +

sys/dev/ice/ice_iov.c

1779

u16 abs_vf_num = vf->vf_num + hw->func_caps.vf_base_id;

sys/dev/ice/ice_iov.c

1784

wr32(hw, VPINT_ALLOC(vf->vf_num),

sys/dev/ice/ice_iov.c

1788

wr32(hw, VPINT_ALLOC_PCI(vf->vf_num),

sys/dev/ice/ice_iov.c

1796

wr32(hw, GLINT_VECT2FUNC(v),

sys/dev/ice/ice_iov.c

1798

((hw->pf_id << GLINT_VECT2FUNC_PF_NUM_S) & GLINT_VECT2FUNC_PF_NUM_M)));

sys/dev/ice/ice_iov.c

1802

wr32(hw, VPINT_MBX_CTL(abs_vf_num),

sys/dev/ice/ice_iov.c

1808

wr32(hw, VPLAN_TXQ_MAPENA(vf->vf_num), VPLAN_TXQ_MAPENA_TX_ENA_M);

sys/dev/ice/ice_iov.c

1811

wr32(hw, VPLAN_TX_QBASE(vf->vf_num), VPLAN_TX_QBASE_VFQTABLE_ENA_M);

sys/dev/ice/ice_iov.c

1813

wr32(hw, VPLAN_TX_QTABLE(i, vf->vf_num),

sys/dev/ice/ice_iov.c

1818

wr32(hw, VPLAN_RXQ_MAPENA(vf->vf_num), VPLAN_RXQ_MAPENA_RX_ENA_M);

sys/dev/ice/ice_iov.c

1819

wr32(hw, VPLAN_RX_QBASE(vf->vf_num), VPLAN_RX_QBASE_VFQTABLE_ENA_M);

sys/dev/ice/ice_iov.c

1821

wr32(hw, VPLAN_RX_QTABLE(i, vf->vf_num),

sys/dev/ice/ice_iov.c

482

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

489

reg_idx = (hw->func_caps.vf_base_id + vf->vf_num) / 32;

sys/dev/ice/ice_iov.c

490

bit_idx = (hw->func_caps.vf_base_id + vf->vf_num) % 32;

sys/dev/ice/ice_iov.c

491

reg = rd32(hw, GLGEN_VFLRSTAT(reg_idx));

sys/dev/ice/ice_iov.c

509

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

513

reg = rd32(hw, VPGEN_VFRTRIG(vf->vf_num));

sys/dev/ice/ice_iov.c

515

wr32(hw, VPGEN_VFRTRIG(vf->vf_num), reg);

sys/dev/ice/ice_iov.c

521

wr32(hw, VFGEN_RSTAT(vf->vf_num), VIRTCHNL_VFR_VFACTIVE);

sys/dev/ice/ice_iov.c

523

ice_flush(hw);

sys/dev/ice/ice_iov.c

544

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

549

global_vf_num = vf->vf_num + hw->func_caps.vf_base_id;

sys/dev/ice/ice_iov.c

552

reg = rd32(hw, VPGEN_VFRTRIG(vf->vf_num));

sys/dev/ice/ice_iov.c

554

wr32(hw, VPGEN_VFRTRIG(vf->vf_num), reg);

sys/dev/ice/ice_iov.c

560

wr32(hw, GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));

sys/dev/ice/ice_iov.c

561

ice_flush(hw);

sys/dev/ice/ice_iov.c

564

wr32(hw, PF_PCI_CIAA,

sys/dev/ice/ice_iov.c

568

reg = rd32(hw, PF_PCI_CIAD);

sys/dev/ice/ice_iov.c

579

status = ice_dis_vsi_txq(hw->port_info, vf->vsi->idx, 0, 0, NULL, NULL,

sys/dev/ice/ice_iov.c

585

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_iov.c

589

reg = rd32(hw, VPGEN_VFRSTAT(vf->vf_num));

sys/dev/ice/ice_iov.c

618

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

656

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_GET_VF_RESOURCES,

sys/dev/ice/ice_iov.c

678

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

700

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_VERSION,

sys/dev/ice/ice_iov.c

749

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

799

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_ADD_ETH_ADDR,

sys/dev/ice/ice_iov.c

817

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

842

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_DEL_ETH_ADDR,

sys/dev/ice/ice_iov.c

857

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

884

ice_aq_str(sc->hw.adminq.sq_last_status));

sys/dev/ice/ice_iov.c

892

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_ADD_VLAN,

sys/dev/ice/ice_iov.c

907

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_iov.c

929

ice_aq_str(sc->hw.adminq.sq_last_status));

sys/dev/ice/ice_iov.c

940

ice_aq_send_msg_to_vf(hw, vf->vf_num, VIRTCHNL_OP_DEL_VLAN,

sys/dev/ice/ice_iov.c

970

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

10059

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

10124

status = ice_handle_nvm_access(hw, cmd, data);

sys/dev/ice/ice_lib.c

10126

ice_debug(hw, ICE_DBG_NVM,

sys/dev/ice/ice_lib.c

10175

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

10189

status = ice_aq_sff_eeprom(hw, 0, dev_addr,

sys/dev/ice/ice_lib.c

10197

hw->adminq.sq_last_status == ICE_AQ_RC_EBUSY) {

sys/dev/ice/ice_lib.c

102

static void ice_print_bus_link_data(device_t dev, struct ice_hw *hw);

sys/dev/ice/ice_lib.c

10202

hw->adminq.sq_last_status == ICE_AQ_RC_EACCES) {

sys/dev/ice/ice_lib.c

10208

hw->adminq.sq_last_status == ICE_AQ_RC_EPERM) {

sys/dev/ice/ice_lib.c

10218

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

103

static void ice_set_pci_link_status_data(struct ice_hw *hw, u16 link_status);

sys/dev/ice/ice_lib.c

10356

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

10360

if (hw->func_caps.common_cap.num_msix_vectors > ICE_MAX_MSIX_VECTORS) {

sys/dev/ice/ice_lib.c

10363

hw->func_caps.common_cap.num_msix_vectors);

sys/dev/ice/ice_lib.c

10369

hw->func_caps.common_cap.num_msix_vectors);

sys/dev/ice/ice_lib.c

10378

(u16 *)malloc(sizeof(u16) * hw->func_caps.common_cap.num_msix_vectors,

sys/dev/ice/ice_lib.c

10385

(u16 *)malloc(sizeof(u16) * hw->func_caps.common_cap.num_msix_vectors,

sys/dev/ice/ice_lib.c

10392

for (u32 i = 0; i < hw->func_caps.common_cap.num_msix_vectors; i++) {

sys/dev/ice/ice_lib.c

10507

status = ice_aq_set_health_status_config(&sc->hw, health_mask, NULL);

sys/dev/ice/ice_lib.c

10512

ice_aq_str(sc->hw.adminq.sq_last_status));

sys/dev/ice/ice_lib.c

10707

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

10718

pi = hw->port_info;

sys/dev/ice/ice_lib.c

10731

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

10784

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

10795

is_sw_lldp = hw->port_info->qos_cfg.is_sw_lldp;

sys/dev/ice/ice_lib.c

10801

dcbcfg = &hw->port_info->qos_cfg.local_dcbx_cfg;

sys/dev/ice/ice_lib.c

10805

status = ice_aq_get_dcb_cfg(hw, (u8)arg2,

sys/dev/ice/ice_lib.c

10808

hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {

sys/dev/ice/ice_lib.c

10816

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

10821

status = ice_aq_get_cee_dcb_cfg(hw, &cee_cfg, NULL);

sys/dev/ice/ice_lib.c

10824

else if (hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)

sys/dev/ice/ice_lib.c

10829

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

10831

maxtcs = hw->func_caps.common_cap.maxtc;

sys/dev/ice/ice_lib.c

10832

dcbx_status = ice_get_dcbx_status(hw);

sys/dev/ice/ice_lib.c

10870

(rd32(hw, PRTDCB_GENC) & PRTDCB_GENC_NUMTC_M)

sys/dev/ice/ice_lib.c

10873

(rd32(hw, PRTDCB_TUP2TC)));

sys/dev/ice/ice_lib.c

10875

(rd32(hw, PRTDCB_RUP2TC)));

sys/dev/ice/ice_lib.c

10877

(rd32(hw, GLDCB_TC2PFC)));

sys/dev/ice/ice_lib.c

10902

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

10914

ctx.vsi_num = ice_get_hw_vsi_num(hw, sc->pf_vsi.idx);

sys/dev/ice/ice_lib.c

10916

status = ice_aq_get_vsi_params(hw, &ctx, NULL);

sys/dev/ice/ice_lib.c

10921

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

10972

ice_get_tx_rx_equalizations(struct ice_hw *hw, u8 serdes_num,

sys/dev/ice/ice_lib.c

10981

ice_aq_get_phy_equalization(hw, equ, dir, serdes_num, &(ptr->value))

sys/dev/ice/ice_lib.c

11051

ice_fec_counter_read(struct ice_hw *hw, u32 receiver_id, u32 reg_offset,

sys/dev/ice/ice_lib.c

11064

err = ice_sbq_rw_reg(hw, &msg, flag);

sys/dev/ice/ice_lib.c

11082

ice_get_port_fec_stats(struct ice_hw *hw, u16 pcs_quad, u16 pcs_port,

sys/dev/ice/ice_lib.c

11127

err = ice_fec_counter_read(hw, receiver_id, corr_low_reg,

sys/dev/ice/ice_lib.c

11132

err = ice_fec_counter_read(hw, receiver_id, corr_high_reg,

sys/dev/ice/ice_lib.c

11137

err = ice_fec_counter_read(hw, receiver_id, uncorr_low_reg,

sys/dev/ice/ice_lib.c

11142

err = ice_fec_counter_read(hw, receiver_id, uncorr_high_reg,

sys/dev/ice/ice_lib.c

11163

ice_is_serdes_muxed(struct ice_hw *hw)

sys/dev/ice/ice_lib.c

11165

return (rd32(hw, 0xB81E0) & 0x4);

sys/dev/ice/ice_lib.c

11175

ice_get_maxspeed(struct ice_hw *hw, u8 lport, u8 *max_speed)

sys/dev/ice/ice_lib.c

11183

status = ice_aq_get_port_options(hw, options, &option_count,

sys/dev/ice/ice_lib.c

11188

ice_debug(hw, ICE_DBG_PHY, "Port split read err: %d\n", status);

sys/dev/ice/ice_lib.c

11193

ice_debug(hw, ICE_DBG_PHY, "Active idx: %d\n", active_idx);

sys/dev/ice/ice_lib.c

11195

ice_debug(hw, ICE_DBG_PHY, "No valid Active option\n");

sys/dev/ice/ice_lib.c

11275

ice_get_port_topology(struct ice_hw *hw, u8 lport,

sys/dev/ice/ice_lib.c

11285

if (!hw || !port_topology)

sys/dev/ice/ice_lib.c

11288

if (hw->device_id >= ICE_DEV_ID_E810_XXV_BACKPLANE) {

sys/dev/ice/ice_lib.c

11312

err = ice_aq_get_netlist_node(hw, &cmd, &cage_type, &node_handle);

sys/dev/ice/ice_lib.c

11316

is_muxed = ice_is_serdes_muxed(hw);

sys/dev/ice/ice_lib.c

11329

err = ice_get_maxspeed(hw, port_topology->primary_serdes_lane,

sys/dev/ice/ice_lib.c

11335

device_printf(ice_hw_to_dev(hw),

sys/dev/ice/ice_lib.c

11349

ice_debug(hw, ICE_DBG_PHY, "%s: Port Topology (lport %d):\n",

sys/dev/ice/ice_lib.c

11351

ice_debug(hw, ICE_DBG_PHY, "serdes lane count %d\n",

sys/dev/ice/ice_lib.c

11353

ice_debug(hw, ICE_DBG_PHY, "pcs quad select %d\n",

sys/dev/ice/ice_lib.c

11355

ice_debug(hw, ICE_DBG_PHY, "pcs port %d\n",

sys/dev/ice/ice_lib.c

11357

ice_debug(hw, ICE_DBG_PHY, "primary serdes lane %d\n",

sys/dev/ice/ice_lib.c

11376

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

11384

pi = hw->port_info;

sys/dev/ice/ice_lib.c

11398

if (ice_get_port_topology(hw, pi->lport, &port_topology) != 0) {

sys/dev/ice/ice_lib.c

11417

err = ice_get_tx_rx_equalizations(hw, serdes_num,

sys/dev/ice/ice_lib.c

11453

err = ice_get_port_fec_stats(hw, port_topology.pcs_quad_select,

sys/dev/ice/ice_lib.c

11541

(ice_read_pba_string(&sc->hw, pba_string, sizeof(pba_string)) == 0))

sys/dev/ice/ice_lib.c

11557

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

11570

pi = hw->port_info;

sys/dev/ice/ice_lib.c

11577

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

11630

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

11648

pi = hw->port_info;

sys/dev/ice/ice_lib.c

11669

if (!hw->port_info->qos_cfg.is_sw_lldp) {

sys/dev/ice/ice_lib.c

11697

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

11715

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

11789

status = ice_aq_get_internal_data(hw, ddc->cluster_id, ddc->table_id, ddc->offset,

sys/dev/ice/ice_lib.c

11792

ice_debug(hw, ICE_DBG_DIAG, "%s: ret_buf_size %d, ret_next_table %d, ret_next_index %d\n",

sys/dev/ice/ice_lib.c

11799

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

11857

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

11877

if (!ice_fw_supports_fec_dis_auto(hw)) {

sys/dev/ice/ice_lib.c

11915

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

11925

status = ice_aq_get_sensor_reading(hw, ICE_AQC_INT_TEMP_SENSOR,

sys/dev/ice/ice_lib.c

11931

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

11935

ice_debug(hw, ICE_DBG_DIAG, "%s: Warning Temp Threshold: %d\n", __func__,

sys/dev/ice/ice_lib.c

11937

ice_debug(hw, ICE_DBG_DIAG, "%s: Critical Temp Threshold: %d\n", __func__,

sys/dev/ice/ice_lib.c

11939

ice_debug(hw, ICE_DBG_DIAG, "%s: Fatal Temp Threshold: %d\n", __func__,

sys/dev/ice/ice_lib.c

1296

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

1318

ice_aq_str(sc->hw.adminq.sq_last_status));

sys/dev/ice/ice_lib.c

1384

ice_configure_rxq_interrupt(struct ice_hw *hw, u16 rxqid, u16 vector, u8 itr_idx)

sys/dev/ice/ice_lib.c

1393

wr32(hw, QINT_RQCTL(rxqid), val);

sys/dev/ice/ice_lib.c

1405

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

1411

ice_configure_rxq_interrupt(hw, vsi->rx_qmap[rxq->me],

sys/dev/ice/ice_lib.c

1414

ice_debug(hw, ICE_DBG_INIT,

sys/dev/ice/ice_lib.c

1419

ice_flush(hw);

sys/dev/ice/ice_lib.c

1432

ice_configure_txq_interrupt(struct ice_hw *hw, u16 txqid, u16 vector, u8 itr_idx)

sys/dev/ice/ice_lib.c

1441

wr32(hw, QINT_TQCTL(txqid), val);

sys/dev/ice/ice_lib.c

1453

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

1459

ice_configure_txq_interrupt(hw, vsi->tx_qmap[txq->me],

sys/dev/ice/ice_lib.c

1463

ice_flush(hw);

sys/dev/ice/ice_lib.c

1480

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

1489

val = rd32(hw, QINT_RQCTL(reg));

sys/dev/ice/ice_lib.c

1491

wr32(hw, QINT_RQCTL(reg), val);

sys/dev/ice/ice_lib.c

1493

ice_flush(hw);

sys/dev/ice/ice_lib.c

1498

wr32(hw, GLINT_DYN_CTL(rxq->irqv->me),

sys/dev/ice/ice_lib.c

1517

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

1526

val = rd32(hw, QINT_TQCTL(reg));

sys/dev/ice/ice_lib.c

1528

wr32(hw, QINT_TQCTL(reg), val);

sys/dev/ice/ice_lib.c

1530

ice_flush(hw);

sys/dev/ice/ice_lib.c

1535

wr32(hw, GLINT_DYN_CTL(txq->irqv->me),

sys/dev/ice/ice_lib.c

1549

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

1557

wr32(hw, GLINT_ITR(ICE_RX_ITR, rxq->irqv->me),

sys/dev/ice/ice_lib.c

1558

ice_itr_to_reg(hw, vsi->rx_itr));

sys/dev/ice/ice_lib.c

1561

ice_flush(hw);

sys/dev/ice/ice_lib.c

1573

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

1581

wr32(hw, GLINT_ITR(ICE_TX_ITR, txq->irqv->me),

sys/dev/ice/ice_lib.c

1582

ice_itr_to_reg(hw, vsi->tx_itr));

sys/dev/ice/ice_lib.c

1585

ice_flush(hw);

sys/dev/ice/ice_lib.c

1599

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

1601

tlan_ctx->port_num = hw->port_info->lport;

sys/dev/ice/ice_lib.c

1609

tlan_ctx->pf_num = hw->pf_id;

sys/dev/ice/ice_lib.c

1621

tlan_ctx->vmvf_num = hw->func_caps.vf_base_id + vsi->vf_num;

sys/dev/ice/ice_lib.c

1628

tlan_ctx->src_vsi = ice_get_hw_vsi_num(hw, vsi->idx);

sys/dev/ice/ice_lib.c

1659

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

1688

ice_set_ctx(hw, (u8 *)&tlan_ctx, qg->txqs[0].txq_ctx,

sys/dev/ice/ice_lib.c

1691

status = ice_ena_vsi_txq(hw->port_info, vsi->idx, txq->tc,

sys/dev/ice/ice_lib.c

1698

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

1729

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

1768

regval = rd32(hw, QRXFLXP_CNTXT(pf_q));

sys/dev/ice/ice_lib.c

1777

wr32(hw, QRXFLXP_CNTXT(pf_q), regval);

sys/dev/ice/ice_lib.c

1780

status = ice_write_rxq_ctx(hw, &rlan_ctx, pf_q);

sys/dev/ice/ice_lib.c

1784

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

1788

wr32(hw, rxq->tail, 0);

sys/dev/ice/ice_lib.c

1836

ice_is_rxq_ready(struct ice_hw *hw, int pf_q, u32 *reg)

sys/dev/ice/ice_lib.c

1842

qrx_ctrl = rd32(hw, QRX_CTRL(pf_q));

sys/dev/ice/ice_lib.c

1874

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

1882

err = ice_is_rxq_ready(hw, pf_q, &qrx_ctrl);

sys/dev/ice/ice_lib.c

1898

wr32(hw, QRX_CTRL(pf_q), qrx_ctrl);

sys/dev/ice/ice_lib.c

190

static int ice_get_tx_rx_equalizations(struct ice_hw *hw, u8 serdes_num,

sys/dev/ice/ice_lib.c

1901

err = ice_is_rxq_ready(hw, pf_q, &qrx_ctrl);

sys/dev/ice/ice_lib.c

192

static int ice_fec_counter_read(struct ice_hw *hw, u32 receiver_id,

sys/dev/ice/ice_lib.c

194

static int ice_get_port_fec_stats(struct ice_hw *hw, u16 pcs_quad, u16 pcs_port,

sys/dev/ice/ice_lib.c

196

static bool ice_is_serdes_muxed(struct ice_hw *hw);

sys/dev/ice/ice_lib.c

197

static int ice_get_maxspeed(struct ice_hw *hw, u8 lport, u8 *max_speed);

sys/dev/ice/ice_lib.c

201

static int ice_get_port_topology(struct ice_hw *hw, u8 lport,

sys/dev/ice/ice_lib.c

2014

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

2025

status = ice_add_mac(hw, &mac_addr_list);

sys/dev/ice/ice_lib.c

2033

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

2052

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2056

err = ice_add_vsi_mac_filter(vsi, hw->port_info->mac.lan_addr);

sys/dev/ice/ice_lib.c

2084

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

2095

status = ice_remove_mac(hw, &mac_addr_list);

sys/dev/ice/ice_lib.c

2103

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

2122

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2126

err = ice_remove_vsi_mac_filter(vsi, hw->port_info->mac.lan_addr);

sys/dev/ice/ice_lib.c

2152

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2158

val = rd32(hw, cq->rq.len);

sys/dev/ice/ice_lib.c

2174

wr32(hw, cq->rq.len, val);

sys/dev/ice/ice_lib.c

2177

val = rd32(hw, cq->sq.len);

sys/dev/ice/ice_lib.c

2193

wr32(hw, cq->sq.len, val);

sys/dev/ice/ice_lib.c

2209

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

2210

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2247

if (status && hw->adminq.sq_last_status != ICE_AQ_RC_EMODE)

sys/dev/ice/ice_lib.c

2251

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

2320

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2328

cq = &hw->adminq;

sys/dev/ice/ice_lib.c

2332

cq = &hw->sbq;

sys/dev/ice/ice_lib.c

2336

cq = &hw->mailboxq;

sys/dev/ice/ice_lib.c

2362

status = ice_clean_rq_elem(hw, cq, &event, pending);

sys/dev/ice/ice_lib.c

2445

ice_os_pkg_version_str(struct ice_hw *hw, struct sbuf *buf)

sys/dev/ice/ice_lib.c

2450

if (pkg_ver_empty(&hw->pkg_ver, hw->pkg_name)) {

sys/dev/ice/ice_lib.c

2461

strlcpy(name_buf, (char *)hw->pkg_name, ICE_PKG_NAME_SIZE);

sys/dev/ice/ice_lib.c

2465

hw->pkg_ver.major,

sys/dev/ice/ice_lib.c

2466

hw->pkg_ver.minor,

sys/dev/ice/ice_lib.c

2467

hw->pkg_ver.update,

sys/dev/ice/ice_lib.c

2468

hw->pkg_ver.draft);

sys/dev/ice/ice_lib.c

2480

ice_active_pkg_version_str(struct ice_hw *hw, struct sbuf *buf)

sys/dev/ice/ice_lib.c

2485

if (pkg_ver_empty(&hw->active_pkg_ver, hw->active_pkg_name)) {

sys/dev/ice/ice_lib.c

2496

strlcpy(name_buf, (char *)hw->active_pkg_name, ICE_PKG_NAME_SIZE);

sys/dev/ice/ice_lib.c

2500

hw->active_pkg_ver.major,

sys/dev/ice/ice_lib.c

2501

hw->active_pkg_ver.minor,

sys/dev/ice/ice_lib.c

2502

hw->active_pkg_ver.update,

sys/dev/ice/ice_lib.c

2503

hw->active_pkg_ver.draft);

sys/dev/ice/ice_lib.c

2505

if (hw->active_track_id != 0)

sys/dev/ice/ice_lib.c

2506

sbuf_printf(buf, ", track id 0x%08x", hw->active_track_id);

sys/dev/ice/ice_lib.c

2519

ice_nvm_version_str(struct ice_hw *hw, struct sbuf *buf)

sys/dev/ice/ice_lib.c

2521

struct ice_nvm_info *nvm = &hw->flash.nvm;

sys/dev/ice/ice_lib.c

2522

struct ice_orom_info *orom = &hw->flash.orom;

sys/dev/ice/ice_lib.c

2523

struct ice_netlist_info *netlist = &hw->flash.netlist;

sys/dev/ice/ice_lib.c

2533

hw->fw_maj_ver, hw->fw_min_ver, hw->fw_patch,

sys/dev/ice/ice_lib.c

2534

hw->api_maj_ver, hw->api_min_ver,

sys/dev/ice/ice_lib.c

2551

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2556

ice_nvm_version_str(hw, sbuf);

sys/dev/ice/ice_lib.c

2589

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

2592

if (!ice_is_vsi_valid(hw, vsi->idx))

sys/dev/ice/ice_lib.c

2595

vsi_num = ice_get_hw_vsi_num(hw, vsi->idx); /* HW absolute index of a VSI */

sys/dev/ice/ice_lib.c

2600

ice_stat_update40(hw, name ## L(vsi_num), \

sys/dev/ice/ice_lib.c

2605

ice_stat_update32(hw, name(vsi_num), \

sys/dev/ice/ice_lib.c

2620

ice_stat_update_repc(hw, vsi->idx, vsi->hw_stats.offsets_loaded,

sys/dev/ice/ice_lib.c

2657

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2660

MPASS(hw->port_info);

sys/dev/ice/ice_lib.c

2664

lport = hw->port_info->lport;

sys/dev/ice/ice_lib.c

2667

ice_stat_update40(hw, name(lport, index), \

sys/dev/ice/ice_lib.c

2672

ice_stat_update40(hw, name ## L(lport), \

sys/dev/ice/ice_lib.c

2677

ice_stat_update32(hw, name(lport), \

sys/dev/ice/ice_lib.c

2690

ice_stat_update32(hw, PRTRPB_RDPC,

sys/dev/ice/ice_lib.c

2770

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2780

ice_nvm_version_str(hw, sbuf);

sys/dev/ice/ice_lib.c

2801

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2811

status = ice_read_pba_string(hw, pba_string, sizeof(pba_string));

sys/dev/ice/ice_lib.c

2816

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

2837

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2847

ice_active_pkg_version_str(hw, sbuf);

sys/dev/ice/ice_lib.c

2868

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2878

ice_os_pkg_version_str(hw, sbuf);

sys/dev/ice/ice_lib.c

2899

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

2909

sbuf_printf(sbuf, "%s", ice_aq_speed_to_str(hw->port_info));

sys/dev/ice/ice_lib.c

3225

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

3226

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_lib.c

323

ice_set_ctrlq_len(struct ice_hw *hw)

sys/dev/ice/ice_lib.c

325

hw->adminq.num_rq_entries = ICE_AQ_LEN;

sys/dev/ice/ice_lib.c

326

hw->adminq.num_sq_entries = ICE_AQ_LEN;

sys/dev/ice/ice_lib.c

3261

ice_aq_str(sc->hw.adminq.sq_last_status));

sys/dev/ice/ice_lib.c

327

hw->adminq.rq_buf_size = ICE_AQ_MAX_BUF_LEN;

sys/dev/ice/ice_lib.c

328

hw->adminq.sq_buf_size = ICE_AQ_MAX_BUF_LEN;

sys/dev/ice/ice_lib.c

330

hw->mailboxq.num_rq_entries = ICE_MBXQ_LEN;

sys/dev/ice/ice_lib.c

3304

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

331

hw->mailboxq.num_sq_entries = ICE_MBXQ_LEN;

sys/dev/ice/ice_lib.c

332

hw->mailboxq.rq_buf_size = ICE_MBXQ_MAX_BUF_LEN;

sys/dev/ice/ice_lib.c

333

hw->mailboxq.sq_buf_size = ICE_MBXQ_MAX_BUF_LEN;

sys/dev/ice/ice_lib.c

335

hw->sbq.num_rq_entries = ICE_SBQ_LEN;

sys/dev/ice/ice_lib.c

336

hw->sbq.num_sq_entries = ICE_SBQ_LEN;

sys/dev/ice/ice_lib.c

3369

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

337

hw->sbq.rq_buf_size = ICE_SBQ_MAX_BUF_LEN;

sys/dev/ice/ice_lib.c

338

hw->sbq.sq_buf_size = ICE_SBQ_MAX_BUF_LEN;

sys/dev/ice/ice_lib.c

3432

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

3443

strlcpy(neg_fec, ice_negotiated_fec_mode(hw->port_info), sizeof(neg_fec));

sys/dev/ice/ice_lib.c

3475

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

3478

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

3498

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

3575

if ((hw->port_info->qos_cfg.is_sw_lldp) &&

sys/dev/ice/ice_lib.c

3576

(hw->port_info->qos_cfg.local_dcbx_cfg.pfc.pfcena != 0) &&

sys/dev/ice/ice_lib.c

3606

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

3635

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

3646

status = ice_aq_get_phy_caps(hw->port_info, false, ICE_AQC_REPORT_ACTIVE_CFG,

sys/dev/ice/ice_lib.c

3652

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

3665

ice_copy_phy_caps_to_cfg(hw->port_info, &pcaps, &cfg);

sys/dev/ice/ice_lib.c

3668

cfg.phy_type_high = types & hw->port_info->phy.phy_type_high;

sys/dev/ice/ice_lib.c

3670

cfg.phy_type_low = types & hw->port_info->phy.phy_type_low;

sys/dev/ice/ice_lib.c

3673

status = ice_aq_set_phy_cfg(hw, hw->port_info, &cfg, NULL);

sys/dev/ice/ice_lib.c

3678

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

3734

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

3735

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_lib.c

3754

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

3831

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

3832

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_lib.c

3856

status = ice_aq_send_cmd(hw, &desc, &link_data, sizeof(link_data), NULL);

sys/dev/ice/ice_lib.c

3861

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

3885

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

3897

status = ice_get_cur_lldp_persist_status(hw, &lldp_state);

sys/dev/ice/ice_lib.c

3901

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

3926

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

3938

status = ice_get_dflt_lldp_persist_status(hw, &lldp_state);

sys/dev/ice/ice_lib.c

3942

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

3991

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

4004

status = ice_get_cur_lldp_persist_status(hw, &old_state);

sys/dev/ice/ice_lib.c

4008

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

4013

status = ice_get_dflt_lldp_persist_status(hw, &old_state);

sys/dev/ice/ice_lib.c

4018

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

4038

local_dcbx_cfg = &hw->port_info->qos_cfg.local_dcbx_cfg;

sys/dev/ice/ice_lib.c

4047

status = ice_aq_stop_lldp(hw, true, true, NULL);

sys/dev/ice/ice_lib.c

4049

if (status && hw->adminq.sq_last_status != ICE_AQ_RC_EPERM) {

sys/dev/ice/ice_lib.c

4053

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

4056

ice_aq_set_dcb_parameters(hw, true, NULL);

sys/dev/ice/ice_lib.c

4057

hw->port_info->qos_cfg.is_sw_lldp = true;

sys/dev/ice/ice_lib.c

4062

status = ice_aq_start_lldp(hw, true, NULL);

sys/dev/ice/ice_lib.c

4064

switch (hw->adminq.sq_last_status) {

sys/dev/ice/ice_lib.c

4080

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

4089

status = ice_init_dcb(hw, true);

sys/dev/ice/ice_lib.c

4094

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

4095

hw->port_info->qos_cfg.dcbx_status = ICE_DCBX_STATUS_NOT_STARTED;

sys/dev/ice/ice_lib.c

4127

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

4147

pi = hw->port_info;

sys/dev/ice/ice_lib.c

4168

if (!hw->port_info->qos_cfg.is_sw_lldp)

sys/dev/ice/ice_lib.c

4203

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

4237

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

4258

pi = hw->port_info;

sys/dev/ice/ice_lib.c

4279

if (!hw->port_info->qos_cfg.is_sw_lldp)

sys/dev/ice/ice_lib.c

4301

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

4325

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

4330

pi = hw->port_info;

sys/dev/ice/ice_lib.c

4349

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

4383

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

4399

pi = hw->port_info;

sys/dev/ice/ice_lib.c

4411

if (!hw->port_info->qos_cfg.is_sw_lldp)

sys/dev/ice/ice_lib.c

4450

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

4466

pi = hw->port_info;

sys/dev/ice/ice_lib.c

4477

if (!hw->port_info->qos_cfg.is_sw_lldp)

sys/dev/ice/ice_lib.c

4495

status = ice_aq_set_pfc_mode(hw, aq_pfc_mode, NULL);

sys/dev/ice/ice_lib.c

4506

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

4735

ice_log_hmc_error(struct ice_hw *hw, device_t dev)

sys/dev/ice/ice_lib.c

4741

info = rd32(hw, PFHMC_ERRORINFO);

sys/dev/ice/ice_lib.c

4742

data = rd32(hw, PFHMC_ERRORDATA);

sys/dev/ice/ice_lib.c

4794

wr32(hw, PFHMC_ERRORINFO, 0);

sys/dev/ice/ice_lib.c

5268

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

5272

rd32(hw, PFINT_OICR);

sys/dev/ice/ice_lib.c

5283

wr32(hw, PFINT_OICR_ENA, val);

sys/dev/ice/ice_lib.c

5292

wr32(hw, PFINT_OICR_CTL, PFINT_OICR_CTL_CAUSE_ENA_M);

sys/dev/ice/ice_lib.c

5295

wr32(hw, PFINT_MBX_CTL, PFINT_MBX_CTL_CAUSE_ENA_M);

sys/dev/ice/ice_lib.c

5298

wr32(hw, PFINT_SB_CTL, PFINT_SB_CTL_CAUSE_ENA_M);

sys/dev/ice/ice_lib.c

5301

wr32(hw, PFINT_FW_CTL, PFINT_FW_CTL_CAUSE_ENA_M);

sys/dev/ice/ice_lib.c

5364

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

5365

struct ice_switch_info *sw = hw->switch_info;

sys/dev/ice/ice_lib.c

5440

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

5441

struct ice_switch_info *sw = hw->switch_info;

sys/dev/ice/ice_lib.c

5498

status = ice_add_mac(hw, &data.add_list);

sys/dev/ice/ice_lib.c

5502

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

5507

status = ice_remove_mac(hw, &remove_list);

sys/dev/ice/ice_lib.c

5511

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

5534

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

5559

status = ice_add_vlan(hw, &vlan_list);

sys/dev/ice/ice_lib.c

5599

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

5624

status = ice_remove_vlan(hw, &vlan_list);

sys/dev/ice/ice_lib.c

5690

increment = sc->hw.itr_gran ? : 2;

sys/dev/ice/ice_lib.c

5743

increment = sc->hw.itr_gran ? : 2;

sys/dev/ice/ice_lib.c

5934

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

5935

struct ice_switch_info *sw = hw->switch_info;

sys/dev/ice/ice_lib.c

6003

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

6004

struct ice_switch_info *sw = hw->switch_info;

sys/dev/ice/ice_lib.c

6073

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

6074

struct ice_switch_info *sw = hw->switch_info;

sys/dev/ice/ice_lib.c

6144

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

6145

struct ice_switch_info *sw = hw->switch_info;

sys/dev/ice/ice_lib.c

6316

&sc->hw.debug_mask, 0,

sys/dev/ice/ice_lib.c

6376

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

6442

if (rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_DEVSTATE_M) {

sys/dev/ice/ice_lib.c

6460

status = ice_reset(hw, reset_type);

sys/dev/ice/ice_lib.c

652

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

6526

if (ice_is_e830(&sc->hw))

sys/dev/ice/ice_lib.c

6562

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

658

rule.vsi_idx = ice_get_hw_vsi_num(hw, vsi->mirror_src_vsi);

sys/dev/ice/ice_lib.c

6585

ice_debug(hw, ICE_DBG_DIAG, "%s: dumping cluster id %d\n", __func__,

sys/dev/ice/ice_lib.c

6597

ice_debug(hw, ICE_DBG_DIAG, "---\n");

sys/dev/ice/ice_lib.c

6598

ice_debug(hw, ICE_DBG_DIAG,

sys/dev/ice/ice_lib.c

6602

status = ice_aq_get_internal_data(hw, cluster_id, table_id,

sys/dev/ice/ice_lib.c

6609

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

661

dest_vsi = ice_get_hw_vsi_num(hw, vsi->idx);

sys/dev/ice/ice_lib.c

6613

ice_debug(hw, ICE_DBG_DIAG,

sys/dev/ice/ice_lib.c

663

status = ice_aq_add_update_mir_rule(hw, ICE_AQC_RULE_TYPE_VPORT_INGRESS,

sys/dev/ice/ice_lib.c

6696

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

6699

ice_debug(hw, ICE_DBG_DIAG, "%s: Debug Dump running...\n", __func__);

sys/dev/ice/ice_lib.c

670

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

6701

if (ice_is_e830(hw)) {

sys/dev/ice/ice_lib.c

677

status = ice_aq_add_update_mir_rule(hw, ICE_AQC_RULE_TYPE_VPORT_EGRESS,

sys/dev/ice/ice_lib.c

683

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

6939

ICE_CTLFLAG_DEBUG | CTLFLAG_RD, &sc->hw.fw_build, 0,

sys/dev/ice/ice_lib.c

699

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

704

status = ice_aq_delete_mir_rule(hw, vsi->rule_mir_ingress, keep_alloc, NULL);

sys/dev/ice/ice_lib.c

7043

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

708

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

7094

status = ice_dis_vsi_txq(hw->port_info, vsi->idx, tc, buf_idx,

sys/dev/ice/ice_lib.c

7105

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

713

status = ice_aq_delete_mir_rule(hw, vsi->rule_mir_egress, keep_alloc, NULL);

sys/dev/ice/ice_lib.c

7139

cap = &sc->hw.func_caps.common_cap;

sys/dev/ice/ice_lib.c

717

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

733

struct ice_hw *hw = &vsi->sc->hw;

sys/dev/ice/ice_lib.c

7354

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

7363

status = ice_aq_set_rss_key(hw, vsi->idx, &keydata);

sys/dev/ice/ice_lib.c

7367

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

7387

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

7398

status = ice_add_rss_cfg(hw, vsi->idx, &rss_cfg);

sys/dev/ice/ice_lib.c

7402

vsi->idx, ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

7407

status = ice_add_rss_cfg(hw, vsi->idx, &rss_cfg);

sys/dev/ice/ice_lib.c

7411

vsi->idx, ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

7416

status = ice_add_rss_cfg(hw, vsi->idx, &rss_cfg);

sys/dev/ice/ice_lib.c

7420

vsi->idx, ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

7425

status = ice_add_rss_cfg(hw, vsi->idx, &rss_cfg);

sys/dev/ice/ice_lib.c

7429

vsi->idx, ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

7434

status = ice_add_rss_cfg(hw, vsi->idx, &rss_cfg);

sys/dev/ice/ice_lib.c

7438

vsi->idx, ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

7443

status = ice_add_rss_cfg(hw, vsi->idx, &rss_cfg);

sys/dev/ice/ice_lib.c

7447

vsi->idx, ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

7473

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

75

static int ice_is_rxq_ready(struct ice_hw *hw, int pf_q, u32 *reg);

sys/dev/ice/ice_lib.c

7501

status = ice_aq_set_rss_lut(hw, &lut_params);

sys/dev/ice/ice_lib.c

7505

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

7554

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

7559

ice_active_pkg_version_str(hw, active_pkg);

sys/dev/ice/ice_lib.c

7563

ice_os_pkg_version_str(hw, os_pkg);

sys/dev/ice/ice_lib.c

760

ctx.info.sw_id = hw->port_info->sw_id;

sys/dev/ice/ice_lib.c

7602

if (pkg_ver_empty(&hw->active_pkg_ver, hw->active_pkg_name)) {

sys/dev/ice/ice_lib.c

7604

if (pkg_ver_compatible(&hw->pkg_ver) > 0) {

sys/dev/ice/ice_lib.c

7609

} else if (pkg_ver_compatible(&hw->pkg_ver) < 0) {

sys/dev/ice/ice_lib.c

7622

if (pkg_ver_compatible(&hw->active_pkg_ver) > 0) {

sys/dev/ice/ice_lib.c

7627

} else if (pkg_ver_compatible(&hw->active_pkg_ver) < 0) {

sys/dev/ice/ice_lib.c

7689

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

7710

cached_layer_count = hw->num_tx_sched_layers;

sys/dev/ice/ice_lib.c

7715

status = ice_cfg_tx_topo(&sc->hw, buf_copy, pkg->datasize);

sys/dev/ice/ice_lib.c

772

status = ice_add_vsi(hw, vsi->idx, &ctx, NULL);

sys/dev/ice/ice_lib.c

7742

state = ice_copy_and_init_pkg(hw, (const u8 *)pkg->data, pkg->datasize);

sys/dev/ice/ice_lib.c

777

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

7826

ice_save_pci_info(struct ice_hw *hw, device_t dev)

sys/dev/ice/ice_lib.c

7828

hw->vendor_id = pci_get_vendor(dev);

sys/dev/ice/ice_lib.c

7829

hw->device_id = pci_get_device(dev);

sys/dev/ice/ice_lib.c

7830

hw->subsystem_vendor_id = pci_get_subvendor(dev);

sys/dev/ice/ice_lib.c

7831

hw->subsystem_device_id = pci_get_subdevice(dev);

sys/dev/ice/ice_lib.c

7832

hw->revision_id = pci_get_revid(dev);

sys/dev/ice/ice_lib.c

7833

hw->bus.device = pci_get_slot(dev);

sys/dev/ice/ice_lib.c

7834

hw->bus.func = pci_get_function(dev);

sys/dev/ice/ice_lib.c

7848

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

785

status = ice_cfg_vsi_lan(hw->port_info, vsi->idx,

sys/dev/ice/ice_lib.c

7858

status = ice_replay_vsi(hw, vsi->idx);

sys/dev/ice/ice_lib.c

7862

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

7868

ice_replay_post(hw);

sys/dev/ice/ice_lib.c

7888

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

7892

status = ice_rem_vsi_rss_cfg(hw, vsi->idx);

sys/dev/ice/ice_lib.c

7899

ice_rem_vsi_rss_list(hw, vsi->idx);

sys/dev/ice/ice_lib.c

791

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

8018

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

8022

speed = ice_aq_speed_to_str(hw->port_info);

sys/dev/ice/ice_lib.c

8023

req_fec = ice_requested_fec_mode(hw->port_info);

sys/dev/ice/ice_lib.c

8024

neg_fec = ice_negotiated_fec_mode(hw->port_info);

sys/dev/ice/ice_lib.c

8025

autoneg = ice_autoneg_mode(hw->port_info);

sys/dev/ice/ice_lib.c

8026

flowcontrol = ice_flowcontrol_mode(hw->port_info);

sys/dev/ice/ice_lib.c

8048

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

8052

if (!memcmp(lladdr, hw->port_info->mac.lan_addr, ETHER_ADDR_LEN))

sys/dev/ice/ice_lib.c

8059

status = ice_aq_manage_mac_write(hw, lladdr, ICE_AQC_MAN_MAC_UPDATE_LAA_WOL, NULL);

sys/dev/ice/ice_lib.c

8063

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

8068

bcopy(lladdr, hw->port_info->mac.lan_addr, ETHER_ADDR_LEN);

sys/dev/ice/ice_lib.c

8089

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

8094

if (!ice_is_e810(hw) && !ice_is_e830(hw))

sys/dev/ice/ice_lib.c

8101

ice_set_pci_link_status_data(hw, pci_link_status);

sys/dev/ice/ice_lib.c

8104

ice_print_bus_link_data(dev, hw);

sys/dev/ice/ice_lib.c

814

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

8184

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

8188

MPASS(hw->port_info);

sys/dev/ice/ice_lib.c

8190

num_ports = bitcount32(hw->func_caps.common_cap.valid_functions);

sys/dev/ice/ice_lib.c

8191

port_speed = ice_phy_types_to_max_rate(hw->port_info);

sys/dev/ice/ice_lib.c

8192

pcie_speed = ice_pcie_bus_speed_to_rate(hw->bus.speed);

sys/dev/ice/ice_lib.c

8193

pcie_width = ice_pcie_lnk_width_to_int(hw->bus.width);

sys/dev/ice/ice_lib.c

8200

((port_speed == IF_Gbps(100) && ice_is_e810(hw)) ||

sys/dev/ice/ice_lib.c

8201

(port_speed == IF_Gbps(200) && ice_is_e830(hw))))

sys/dev/ice/ice_lib.c

8213

ice_print_bus_link_data(device_t dev, struct ice_hw *hw)

sys/dev/ice/ice_lib.c

8216

((hw->bus.speed == ice_pcie_speed_32_0GT) ? "32.0GT/s" :

sys/dev/ice/ice_lib.c

8217

(hw->bus.speed == ice_pcie_speed_16_0GT) ? "16.0GT/s" :

sys/dev/ice/ice_lib.c

8218

(hw->bus.speed == ice_pcie_speed_8_0GT) ? "8.0GT/s" :

sys/dev/ice/ice_lib.c

8219

(hw->bus.speed == ice_pcie_speed_5_0GT) ? "5.0GT/s" :

sys/dev/ice/ice_lib.c

822

status = ice_rm_vsi_lan_cfg(hw->port_info, vsi->idx);

sys/dev/ice/ice_lib.c

8220

(hw->bus.speed == ice_pcie_speed_2_5GT) ? "2.5GT/s" : "Unknown"),

sys/dev/ice/ice_lib.c

8221

(hw->bus.width == ice_pcie_lnk_x32) ? "x32" :

sys/dev/ice/ice_lib.c

8222

(hw->bus.width == ice_pcie_lnk_x16) ? "x16" :

sys/dev/ice/ice_lib.c

8223

(hw->bus.width == ice_pcie_lnk_x12) ? "x12" :

sys/dev/ice/ice_lib.c

8224

(hw->bus.width == ice_pcie_lnk_x8) ? "x8" :

sys/dev/ice/ice_lib.c

8225

(hw->bus.width == ice_pcie_lnk_x4) ? "x4" :

sys/dev/ice/ice_lib.c

8226

(hw->bus.width == ice_pcie_lnk_x2) ? "x2" :

sys/dev/ice/ice_lib.c

8227

(hw->bus.width == ice_pcie_lnk_x1) ? "x1" : "Unknown");

sys/dev/ice/ice_lib.c

8238

ice_set_pci_link_status_data(struct ice_hw *hw, u16 link_status)

sys/dev/ice/ice_lib.c

8242

hw->bus.type = ice_bus_pci_express;

sys/dev/ice/ice_lib.c

8254

hw->bus.width = (enum ice_pcie_link_width)reg;

sys/dev/ice/ice_lib.c

8257

hw->bus.width = ice_pcie_lnk_width_unknown;

sys/dev/ice/ice_lib.c

8269

hw->bus.speed = (enum ice_pcie_bus_speed)reg;

sys/dev/ice/ice_lib.c

8272

hw->bus.speed = ice_pcie_speed_unknown;

sys/dev/ice/ice_lib.c

8288

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

8298

status = ice_aq_set_event_mask(hw, hw->port_info->lport, ~wanted_events, NULL);

sys/dev/ice/ice_lib.c

8302

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

8307

status = ice_aq_get_link_info(hw->port_info, true, NULL, NULL);

sys/dev/ice/ice_lib.c

8311

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

8334

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

834

status = ice_free_vsi(hw, vsi->idx, &ctx, false, NULL);

sys/dev/ice/ice_lib.c

8342

reg = rd32(hw, GL_MDET_TX_TCLAN);

sys/dev/ice/ice_lib.c

8355

if (pf_num == hw->pf_id)

sys/dev/ice/ice_lib.c

8356

wr32(hw, GL_MDET_TX_TCLAN, 0xffffffff);

sys/dev/ice/ice_lib.c

8362

reg = rd32(hw, GL_MDET_TX_PQM);

sys/dev/ice/ice_lib.c

8375

if (pf_num == hw->pf_id)

sys/dev/ice/ice_lib.c

8376

wr32(hw, GL_MDET_TX_PQM, 0xffffffff);

sys/dev/ice/ice_lib.c

8381

reg = rd32(hw, GL_MDET_RX);

sys/dev/ice/ice_lib.c

839

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

8394

if (pf_num == hw->pf_id)

sys/dev/ice/ice_lib.c

8395

wr32(hw, GL_MDET_RX, 0xffffffff);

sys/dev/ice/ice_lib.c

84

static void ice_nvm_version_str(struct ice_hw *hw, struct sbuf *buf);

sys/dev/ice/ice_lib.c

8404

reg = rd32(hw, PF_MDET_TX_TCLAN);

sys/dev/ice/ice_lib.c

8406

wr32(hw, PF_MDET_TX_TCLAN, 0xffff);

sys/dev/ice/ice_lib.c

8411

reg = rd32(hw, PF_MDET_TX_PQM);

sys/dev/ice/ice_lib.c

8413

wr32(hw, PF_MDET_TX_PQM, 0xffff);

sys/dev/ice/ice_lib.c

8418

reg = rd32(hw, PF_MDET_RX);

sys/dev/ice/ice_lib.c

8420

wr32(hw, PF_MDET_RX, 0xffff);

sys/dev/ice/ice_lib.c

8432

ice_flush(hw);

sys/dev/ice/ice_lib.c

8447

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

8452

hw->port_info->qos_cfg.dcbx_status = ice_get_dcbx_status(hw);

sys/dev/ice/ice_lib.c

8454

if (hw->port_info->qos_cfg.dcbx_status != ICE_DCBX_STATUS_DONE &&

sys/dev/ice/ice_lib.c

8455

hw->port_info->qos_cfg.dcbx_status != ICE_DCBX_STATUS_IN_PROGRESS) {

sys/dev/ice/ice_lib.c

8461

status = ice_aq_start_stop_dcbx(hw, true, &dcbx_agent_status, NULL);

sys/dev/ice/ice_lib.c

8462

if (status && hw->adminq.sq_last_status != ICE_AQ_RC_EPERM)

sys/dev/ice/ice_lib.c

8466

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

8484

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

8499

status = ice_init_dcb(hw, true);

sys/dev/ice/ice_lib.c

8508

hw->adminq.sq_last_status == ICE_AQ_RC_EPERM)) {

sys/dev/ice/ice_lib.c

8511

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

8513

hw->port_info->qos_cfg.dcbx_status = ICE_DCBX_STATUS_NOT_STARTED;

sys/dev/ice/ice_lib.c

8516

switch (hw->port_info->qos_cfg.dcbx_status) {

sys/dev/ice/ice_lib.c

8518

ice_debug(hw, ICE_DBG_DCB, "DCBX disabled\n");

sys/dev/ice/ice_lib.c

8521

ice_debug(hw, ICE_DBG_DCB, "DCBX not started\n");

sys/dev/ice/ice_lib.c

8524

ice_debug(hw, ICE_DBG_DCB, "DCBX detected multiple peers\n");

sys/dev/ice/ice_lib.c

8531

if (hw->port_info->qos_cfg.is_sw_lldp) {

sys/dev/ice/ice_lib.c

8537

status = ice_aq_query_pfc_mode(hw, &pfcmode_ret, NULL);

sys/dev/ice/ice_lib.c

8541

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

8543

local_dcbx_cfg = &hw->port_info->qos_cfg.local_dcbx_cfg;

sys/dev/ice/ice_lib.c

86

static void ice_active_pkg_version_str(struct ice_hw *hw, struct sbuf *buf);

sys/dev/ice/ice_lib.c

8656

ice_debug(&sc->hw, ICE_DBG_DCB, "LLDP MIB Change Event (%s, %s, %s)\n",

sys/dev/ice/ice_lib.c

8664

ice_debug(&sc->hw, ICE_DBG_DCB, "- %s contents:\n", mib_type_strings[mib_type]);

sys/dev/ice/ice_lib.c

8665

ice_debug_array(&sc->hw, ICE_DBG_DCB, 16, 1, event->msg_buf,

sys/dev/ice/ice_lib.c

8682

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

8687

ice_debug(hw, ICE_DBG_DCB,

sys/dev/ice/ice_lib.c

8699

ice_debug(hw, ICE_DBG_DCB, "ETS UP2TC changed\n");

sys/dev/ice/ice_lib.c

87

static void ice_os_pkg_version_str(struct ice_hw *hw, struct sbuf *buf);

sys/dev/ice/ice_lib.c

8707

ice_debug(hw, ICE_DBG_DCB, "ETS TCBW table changed\n");

sys/dev/ice/ice_lib.c

8714

ice_debug(hw, ICE_DBG_DCB, "ETS TSA table changed\n");

sys/dev/ice/ice_lib.c

8721

ice_debug(hw, ICE_DBG_DCB, "PFC config changed\n");

sys/dev/ice/ice_lib.c

8727

ice_debug(hw, ICE_DBG_DCB, "APP Table changed\n");

sys/dev/ice/ice_lib.c

8729

ice_debug(hw, ICE_DBG_DCB, "%s result: %d\n", __func__, needs_reconfig);

sys/dev/ice/ice_lib.c

8859

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

8883

status = ice_update_vsi(hw, vsi->idx, &ctx, NULL);

sys/dev/ice/ice_lib.c

8888

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

8897

if (hw->debug_mask & ICE_DBG_DCB) {

sys/dev/ice/ice_lib.c

8905

status = ice_cfg_vsi_lan(hw->port_info, vsi->idx, vsi->tc_map,

sys/dev/ice/ice_lib.c

8911

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

8961

&sc->hw.port_info->qos_cfg.local_dcbx_cfg;

sys/dev/ice/ice_lib.c

8998

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9002

pi = hw->port_info;

sys/dev/ice/ice_lib.c

9006

maxtcs = hw->func_caps.common_cap.maxtc;

sys/dev/ice/ice_lib.c

9049

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9054

pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

9062

status = ice_lldp_execute_pending_mib(hw);

sys/dev/ice/ice_lib.c

9064

(hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)) {

sys/dev/ice/ice_lib.c

9071

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9094

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9124

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9133

pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

9149

status = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,

sys/dev/ice/ice_lib.c

9156

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9177

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9206

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9218

status = ice_aq_send_driver_ver(hw, &driver_version, NULL);

sys/dev/ice/ice_lib.c

9221

ice_status_str(status), ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9241

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9243

ice_debug(hw, ICE_DBG_DCB, "LAN overflow event detected, prtdcb_ruptq=0x%08x, qtx_ctl=0x%08x\n",

sys/dev/ice/ice_lib.c

9302

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9333

status = ice_add_eth_mac(hw, &ethertype_list);

sys/dev/ice/ice_lib.c

9338

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9360

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9370

if (ice_fw_supports_lldp_fltr_ctrl(hw)) {

sys/dev/ice/ice_lib.c

9371

vsi_num = ice_get_hw_vsi_num(hw, vsi->idx);

sys/dev/ice/ice_lib.c

9372

status = ice_lldp_fltr_add_remove(hw, vsi_num, true);

sys/dev/ice/ice_lib.c

9377

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9397

status = ice_add_eth_mac(hw, &ethertype_list);

sys/dev/ice/ice_lib.c

9402

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9428

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9446

if (ice_fw_supports_lldp_fltr_ctrl(hw)) {

sys/dev/ice/ice_lib.c

9447

vsi_num = ice_get_hw_vsi_num(hw, vsi->idx);

sys/dev/ice/ice_lib.c

9448

status = ice_lldp_fltr_add_remove(hw, vsi_num, false);

sys/dev/ice/ice_lib.c

9453

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9471

status = ice_remove_eth_mac(hw, &ethertype_list);

sys/dev/ice/ice_lib.c

9478

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9497

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

9498

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9507

if (hw->adminq.sq_last_status == ICE_AQ_RC_EAGAIN) {

sys/dev/ice/ice_lib.c

9509

ice_debug(hw, ICE_DBG_LINK,

sys/dev/ice/ice_lib.c

9520

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9539

if (status && hw->adminq.sq_last_status != ICE_AQ_RC_EMODE)

sys/dev/ice/ice_lib.c

9543

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9562

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

9677

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

9739

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

9741

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9749

ice_debug(hw, ICE_DBG_LINK, "Settings out-of-bounds: %u\n",

sys/dev/ice/ice_lib.c

9759

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9793

status = ice_aq_set_phy_cfg(hw, pi, &cfg, NULL);

sys/dev/ice/ice_lib.c

9800

(hw->adminq.sq_last_status == ICE_AQ_RC_EBUSY)) {

sys/dev/ice/ice_lib.c

9809

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9852

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

9860

if (!(ice_fw_supports_link_override(&sc->hw)))

sys/dev/ice/ice_lib.c

9868

ice_aq_str(sc->hw.adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9872

if (sc->hw.debug_mask & ICE_DBG_LINK)

sys/dev/ice/ice_lib.c

9882

ice_fw_supports_report_dflt_cfg(&sc->hw)) {

sys/dev/ice/ice_lib.c

9913

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9926

status = ice_aq_set_link_restart_an(hw->port_info, false, NULL);

sys/dev/ice/ice_lib.c

9928

if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE)

sys/dev/ice/ice_lib.c

9936

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.c

9957

struct ice_port_info *pi = sc->hw.port_info;

sys/dev/ice/ice_lib.c

9959

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_lib.c

9979

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/ice_lib.h

356

static inline u16 ice_itr_to_reg(struct ice_hw *hw, u16 itr_setting)

sys/dev/ice/ice_lib.h

358

return itr_setting / hw->itr_gran;

sys/dev/ice/ice_lib.h

849

ice_enable_intr(struct ice_hw *hw, int vector)

sys/dev/ice/ice_lib.h

856

wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl);

sys/dev/ice/ice_lib.h

867

ice_disable_intr(struct ice_hw *hw, int vector)

sys/dev/ice/ice_lib.h

873

wr32(hw, GLINT_DYN_CTL(vector), dyn_ctl);

sys/dev/ice/ice_lib.h

903

ice_get_pf_id(struct ice_hw *hw)

sys/dev/ice/ice_lib.h

905

return (u8)((rd32(hw, PF_FUNC_RID) & PF_FUNC_RID_FUNCTION_NUMBER_M) >>

sys/dev/ice/ice_lib.h

934

void ice_set_ctrlq_len(struct ice_hw *hw);

sys/dev/ice/ice_lib.h

946

void ice_configure_rxq_interrupt(struct ice_hw *hw, u16 rxqid, u16 vector, u8 itr_idx);

sys/dev/ice/ice_lib.h

948

void ice_configure_txq_interrupt(struct ice_hw *hw, u16 txqid, u16 vector, u8 itr_idx);

sys/dev/ice/ice_lib.h

964

void ice_log_hmc_error(struct ice_hw *hw, device_t dev);

sys/dev/ice/ice_lib.h

997

void ice_save_pci_info(struct ice_hw *hw, device_t dev);

sys/dev/ice/ice_nvm.c

1014

for (offset = 0; (offset + 512) <= hw->flash.banks.orom_size; offset += 512) {

sys/dev/ice/ice_nvm.c

1017

status = ice_read_flash_module(hw, bank, ICE_SR_1ST_OROM_BANK_PTR,

sys/dev/ice/ice_nvm.c

1020

ice_debug(hw, ICE_DBG_NVM, "Unable to read Option ROM data\n");

sys/dev/ice/ice_nvm.c

1028

ice_debug(hw, ICE_DBG_NVM, "Found CIVD section at offset %u\n",

sys/dev/ice/ice_nvm.c

1031

status = ice_read_flash_module(hw, bank, ICE_SR_1ST_OROM_BANK_PTR,

sys/dev/ice/ice_nvm.c

1035

ice_debug(hw, ICE_DBG_NVM, "Unable to read CIVD data\n");

sys/dev/ice/ice_nvm.c

104

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

1044

ice_debug(hw, ICE_DBG_NVM, "Found CIVD data with invalid checksum of %u\n",

sys/dev/ice/ice_nvm.c

1056

ice_debug(hw, ICE_DBG_NVM, "Unable to locate CIVD data within the Option ROM\n");

sys/dev/ice/ice_nvm.c

1072

ice_get_orom_ver_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_orom_info *orom)

sys/dev/ice/ice_nvm.c

1078

status = ice_get_orom_civd_data(hw, bank, &civd);

sys/dev/ice/ice_nvm.c

1080

ice_debug(hw, ICE_DBG_NVM, "Failed to locate valid Option ROM CIVD data\n");

sys/dev/ice/ice_nvm.c

109

if (read_shadow_ram && ((offset + inlen) > (hw->flash.sr_words * 2u))) {

sys/dev/ice/ice_nvm.c

1090

status = ice_get_orom_srev(hw, bank, &orom->srev);

sys/dev/ice/ice_nvm.c

1092

ice_debug(hw, ICE_DBG_NVM, "Failed to read Option ROM security revision.\n");

sys/dev/ice/ice_nvm.c

110

ice_debug(hw, ICE_DBG_NVM, "NVM error: requested data is beyond Shadow RAM limit\n");

sys/dev/ice/ice_nvm.c

1108

int ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_info *orom)

sys/dev/ice/ice_nvm.c

1110

return ice_get_orom_ver_info(hw, ICE_INACTIVE_FLASH_BANK, orom);

sys/dev/ice/ice_nvm.c

1124

ice_get_netlist_info(struct ice_hw *hw, enum ice_bank_select bank,

sys/dev/ice/ice_nvm.c

1131

status = ice_read_netlist_module(hw, bank, ICE_NETLIST_TYPE_OFFSET, &module_id);

sys/dev/ice/ice_nvm.c

1136

ice_debug(hw, ICE_DBG_NVM, "Expected netlist module_id ID of 0x%04x, but got 0x%04x\n",

sys/dev/ice/ice_nvm.c

1141

status = ice_read_netlist_module(hw, bank, ICE_LINK_TOPO_MODULE_LEN, &length);

sys/dev/ice/ice_nvm.c

1147

ice_debug(hw, ICE_DBG_NVM, "Netlist Link Topology module too small. Expected at least %u words, but got %u words.\n",

sys/dev/ice/ice_nvm.c

1152

status = ice_read_netlist_module(hw, bank, ICE_LINK_TOPO_NODE_COUNT, &node_count);

sys/dev/ice/ice_nvm.c

1157

id_blk = (u16 *)ice_calloc(hw, ICE_NETLIST_ID_BLK_SIZE, sizeof(*id_blk));

sys/dev/ice/ice_nvm.c

1162

status = ice_read_flash_module(hw, bank, ICE_SR_NETLIST_BANK_PTR,

sys/dev/ice/ice_nvm.c

1185

ice_free(hw, id_blk);

sys/dev/ice/ice_nvm.c

1197

int ice_get_netlist_ver_info(struct ice_hw *hw, struct ice_netlist_info *netlist)

sys/dev/ice/ice_nvm.c

1199

return ice_get_netlist_info(hw, ICE_ACTIVE_FLASH_BANK, netlist);

sys/dev/ice/ice_nvm.c

1211

int ice_get_inactive_netlist_ver(struct ice_hw *hw, struct ice_netlist_info *netlist)

sys/dev/ice/ice_nvm.c

1213

return ice_get_netlist_info(hw, ICE_INACTIVE_FLASH_BANK, netlist);

sys/dev/ice/ice_nvm.c

1224

static int ice_discover_flash_size(struct ice_hw *hw)

sys/dev/ice/ice_nvm.c

1229

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

1231

status = ice_acquire_nvm(hw, ICE_RES_READ);

sys/dev/ice/ice_nvm.c

1240

status = ice_read_flat_nvm(hw, offset, &len, &data, false);

sys/dev/ice/ice_nvm.c

1242

hw->adminq.sq_last_status == ICE_AQ_RC_EINVAL) {

sys/dev/ice/ice_nvm.c

1243

ice_debug(hw, ICE_DBG_NVM, "%s: New upper bound of %u bytes\n",

sys/dev/ice/ice_nvm.c

1248

ice_debug(hw, ICE_DBG_NVM, "%s: New lower bound of %u bytes\n",

sys/dev/ice/ice_nvm.c

1257

ice_debug(hw, ICE_DBG_NVM, "Predicted flash size is %u bytes\n", max_size);

sys/dev/ice/ice_nvm.c

1259

hw->flash.flash_size = max_size;

sys/dev/ice/ice_nvm.c

1262

ice_release_nvm(hw);

sys/dev/ice/ice_nvm.c

1281

static int ice_read_sr_pointer(struct ice_hw *hw, u16 offset, u32 *pointer)

sys/dev/ice/ice_nvm.c

1286

status = ice_read_sr_word(hw, offset, &value);

sys/dev/ice/ice_nvm.c

1312

static int ice_read_sr_area_size(struct ice_hw *hw, u16 offset, u32 *size)

sys/dev/ice/ice_nvm.c

1317

status = ice_read_sr_word(hw, offset, &value);

sys/dev/ice/ice_nvm.c

132

status = ice_aq_read_nvm(hw, ICE_AQC_NVM_START_POINT,

sys/dev/ice/ice_nvm.c

1337

static int ice_determine_active_flash_banks(struct ice_hw *hw)

sys/dev/ice/ice_nvm.c

1339

struct ice_bank_info *banks = &hw->flash.banks;

sys/dev/ice/ice_nvm.c

1343

status = ice_read_sr_word(hw, ICE_SR_NVM_CTRL_WORD, &ctrl_word);

sys/dev/ice/ice_nvm.c

1345

ice_debug(hw, ICE_DBG_NVM, "Failed to read the Shadow RAM control word\n");

sys/dev/ice/ice_nvm.c

1351

ice_debug(hw, ICE_DBG_NVM, "Shadow RAM control word is invalid\n");

sys/dev/ice/ice_nvm.c

1370

status = ice_read_sr_pointer(hw, ICE_SR_1ST_NVM_BANK_PTR, &banks->nvm_ptr);

sys/dev/ice/ice_nvm.c

1372

ice_debug(hw, ICE_DBG_NVM, "Failed to read NVM bank pointer\n");

sys/dev/ice/ice_nvm.c

1376

status = ice_read_sr_area_size(hw, ICE_SR_NVM_BANK_SIZE, &banks->nvm_size);

sys/dev/ice/ice_nvm.c

1378

ice_debug(hw, ICE_DBG_NVM, "Failed to read NVM bank area size\n");

sys/dev/ice/ice_nvm.c

1382

status = ice_read_sr_pointer(hw, ICE_SR_1ST_OROM_BANK_PTR, &banks->orom_ptr);

sys/dev/ice/ice_nvm.c

1384

ice_debug(hw, ICE_DBG_NVM, "Failed to read OROM bank pointer\n");

sys/dev/ice/ice_nvm.c

1388

status = ice_read_sr_area_size(hw, ICE_SR_OROM_BANK_SIZE, &banks->orom_size);

sys/dev/ice/ice_nvm.c

1390

ice_debug(hw, ICE_DBG_NVM, "Failed to read OROM bank area size\n");

sys/dev/ice/ice_nvm.c

1394

status = ice_read_sr_pointer(hw, ICE_SR_NETLIST_BANK_PTR, &banks->netlist_ptr);

sys/dev/ice/ice_nvm.c

1396

ice_debug(hw, ICE_DBG_NVM, "Failed to read Netlist bank pointer\n");

sys/dev/ice/ice_nvm.c

1400

status = ice_read_sr_area_size(hw, ICE_SR_NETLIST_BANK_SIZE, &banks->netlist_size);

sys/dev/ice/ice_nvm.c

1402

ice_debug(hw, ICE_DBG_NVM, "Failed to read Netlist bank area size\n");

sys/dev/ice/ice_nvm.c

1416

int ice_init_nvm(struct ice_hw *hw)

sys/dev/ice/ice_nvm.c

1418

struct ice_flash_info *flash = &hw->flash;

sys/dev/ice/ice_nvm.c

1423

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

1428

gens_stat = rd32(hw, GLNVM_GENS);

sys/dev/ice/ice_nvm.c

1435

fla = rd32(hw, GLNVM_FLA);

sys/dev/ice/ice_nvm.c

1441

ice_debug(hw, ICE_DBG_NVM, "NVM init error: unsupported blank mode.\n");

sys/dev/ice/ice_nvm.c

1445

status = ice_discover_flash_size(hw);

sys/dev/ice/ice_nvm.c

1447

ice_debug(hw, ICE_DBG_NVM, "NVM init error: failed to discover flash size.\n");

sys/dev/ice/ice_nvm.c

1451

status = ice_determine_active_flash_banks(hw);

sys/dev/ice/ice_nvm.c

1453

ice_debug(hw, ICE_DBG_NVM, "Failed to determine active flash banks.\n");

sys/dev/ice/ice_nvm.c

1457

status = ice_get_nvm_ver_info(hw, ICE_ACTIVE_FLASH_BANK, &flash->nvm);

sys/dev/ice/ice_nvm.c

1459

ice_debug(hw, ICE_DBG_INIT, "Failed to read NVM info.\n");

sys/dev/ice/ice_nvm.c

1463

status = ice_get_orom_ver_info(hw, ICE_ACTIVE_FLASH_BANK, &flash->orom);

sys/dev/ice/ice_nvm.c

1465

ice_debug(hw, ICE_DBG_INIT, "Failed to read Option ROM info.\n");

sys/dev/ice/ice_nvm.c

1468

status = ice_get_netlist_info(hw, ICE_ACTIVE_FLASH_BANK, &flash->netlist);

sys/dev/ice/ice_nvm.c

1470

ice_debug(hw, ICE_DBG_INIT, "Failed to read netlist info.\n");

sys/dev/ice/ice_nvm.c

1487

ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)

sys/dev/ice/ice_nvm.c

1491

status = ice_acquire_nvm(hw, ICE_RES_READ);

sys/dev/ice/ice_nvm.c

1493

status = ice_read_sr_buf_aq(hw, offset, words, data);

sys/dev/ice/ice_nvm.c

1494

ice_release_nvm(hw);

sys/dev/ice/ice_nvm.c

1512

__ice_write_sr_word(struct ice_hw *hw, u32 offset, const u16 *data)

sys/dev/ice/ice_nvm.c

1516

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

1519

return ice_write_sr_aq(hw, offset, 1, &data_local, false);

sys/dev/ice/ice_nvm.c

1535

__ice_write_sr_buf(struct ice_hw *hw, u32 offset, u16 words, const u16 *data)

sys/dev/ice/ice_nvm.c

1542

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

1544

vmem = ice_calloc(hw, words, sizeof(u16));

sys/dev/ice/ice_nvm.c

1555

status = ice_write_sr_aq(hw, offset, words, data_local, false);

sys/dev/ice/ice_nvm.c

1557

ice_free(hw, vmem);

sys/dev/ice/ice_nvm.c

1572

static int ice_calc_sr_checksum(struct ice_hw *hw, u16 *checksum)

sys/dev/ice/ice_nvm.c

1582

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

1584

vmem = ice_calloc(hw, ICE_SR_SECTOR_SIZE_IN_WORDS, sizeof(u16));

sys/dev/ice/ice_nvm.c

1590

status = ice_read_sr_word_aq(hw, ICE_SR_VPD_PTR, &vpd_module);

sys/dev/ice/ice_nvm.c

1595

status = ice_read_sr_word_aq(hw, ICE_SR_PCIE_ALT_AUTO_LOAD_PTR,

sys/dev/ice/ice_nvm.c

1603

for (i = 0; i < hw->flash.sr_words; i++) {

sys/dev/ice/ice_nvm.c

1608

status = ice_read_sr_buf_aq(hw, i, &words, data);

sys/dev/ice/ice_nvm.c

161

ice_aq_update_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset,

sys/dev/ice/ice_nvm.c

1631

ice_free(hw, vmem);

sys/dev/ice/ice_nvm.c

1643

int ice_update_sr_checksum(struct ice_hw *hw)

sys/dev/ice/ice_nvm.c

1649

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

1651

status = ice_calc_sr_checksum(hw, &checksum);

sys/dev/ice/ice_nvm.c

1654

status = ice_write_sr_aq(hw, ICE_SR_SW_CHECKSUM_WORD, 1,

sys/dev/ice/ice_nvm.c

1668

int ice_validate_sr_checksum(struct ice_hw *hw, u16 *checksum)

sys/dev/ice/ice_nvm.c

1674

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

1676

status = ice_acquire_nvm(hw, ICE_RES_READ);

sys/dev/ice/ice_nvm.c

1678

status = ice_calc_sr_checksum(hw, &checksum_local);

sys/dev/ice/ice_nvm.c

1679

ice_release_nvm(hw);

sys/dev/ice/ice_nvm.c

168

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

1686

ice_read_sr_word(hw, ICE_SR_SW_CHECKSUM_WORD, &checksum_sr);

sys/dev/ice/ice_nvm.c

1707

int ice_nvm_validate_checksum(struct ice_hw *hw)

sys/dev/ice/ice_nvm.c

1713

status = ice_acquire_nvm(hw, ICE_RES_READ);

sys/dev/ice/ice_nvm.c

1722

status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_nvm.c

1723

ice_release_nvm(hw);

sys/dev/ice/ice_nvm.c

1738

int ice_nvm_recalculate_checksum(struct ice_hw *hw)

sys/dev/ice/ice_nvm.c

1744

status = ice_acquire_nvm(hw, ICE_RES_READ);

sys/dev/ice/ice_nvm.c

1753

status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_nvm.c

1755

ice_release_nvm(hw);

sys/dev/ice/ice_nvm.c

1780

int ice_nvm_write_activate(struct ice_hw *hw, u16 cmd_flags, u8 *response_flags)

sys/dev/ice/ice_nvm.c

1792

err = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_nvm.c

1808

ice_get_nvm_minsrevs(struct ice_hw *hw, struct ice_minsrev_info *minsrevs)

sys/dev/ice/ice_nvm.c

1814

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

1816

status = ice_acquire_nvm(hw, ICE_RES_READ);

sys/dev/ice/ice_nvm.c

1820

status = ice_aq_read_nvm(hw, ICE_AQC_NVM_MINSREV_MOD_ID, 0, sizeof(data),

sys/dev/ice/ice_nvm.c

1823

ice_release_nvm(hw);

sys/dev/ice/ice_nvm.c

1866

ice_update_nvm_minsrevs(struct ice_hw *hw, struct ice_minsrev_info *minsrevs)

sys/dev/ice/ice_nvm.c

1871

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

1874

ice_debug(hw, ICE_DBG_NVM, "At least one of NVM and OROM MinSrev must be valid");

sys/dev/ice/ice_nvm.c

1878

status = ice_acquire_nvm(hw, ICE_RES_WRITE);

sys/dev/ice/ice_nvm.c

1883

status = ice_aq_read_nvm(hw, ICE_AQC_NVM_MINSREV_MOD_ID, 0, sizeof(data),

sys/dev/ice/ice_nvm.c

190

return ice_aq_send_cmd(hw, &desc, data, length, cd);

sys/dev/ice/ice_nvm.c

1901

status = ice_aq_update_nvm(hw, ICE_AQC_NVM_MINSREV_MOD_ID, 0, sizeof(data), &data,

sys/dev/ice/ice_nvm.c

1907

status = ice_nvm_write_activate(hw, 0, NULL);

sys/dev/ice/ice_nvm.c

1910

ice_release_nvm(hw);

sys/dev/ice/ice_nvm.c

201

int ice_aq_erase_nvm(struct ice_hw *hw, u16 module_typeid, struct ice_sq_cd *cd)

sys/dev/ice/ice_nvm.c

2043

ice_nvm_access_read(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,

sys/dev/ice/ice_nvm.c

2048

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

2058

ice_debug(hw, ICE_DBG_NVM, "NVM access: reading register %08x\n",

sys/dev/ice/ice_nvm.c

2062

data->regval = rd32(hw, cmd->offset);

sys/dev/ice/ice_nvm.c

2076

ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,

sys/dev/ice/ice_nvm.c

208

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

2081

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

2089

if (hw->mac_type == ICE_MAC_E830) {

sys/dev/ice/ice_nvm.c

2100

ice_debug(hw, ICE_DBG_NVM, "NVM access: writing register %08x with value %08x\n",

sys/dev/ice/ice_nvm.c

2104

wr32(hw, cmd->offset, data->regval);

sys/dev/ice/ice_nvm.c

2123

ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,

sys/dev/ice/ice_nvm.c

2128

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

213

status = ice_aq_read_nvm(hw, 0, 2 * module_typeid + 2, 2, &len, true,

sys/dev/ice/ice_nvm.c

2136

if (adapter_info != hw->device_id)

sys/dev/ice/ice_nvm.c

2153

return ice_nvm_access_read(hw, cmd, data);

sys/dev/ice/ice_nvm.c

2155

return ice_nvm_access_write(hw, cmd, data);

sys/dev/ice/ice_nvm.c

2169

s32 ice_nvm_sanitize_operate(struct ice_hw *hw)

sys/dev/ice/ice_nvm.c

2177

status = ice_nvm_sanitize(hw, cmd_flags, &values);

sys/dev/ice/ice_nvm.c

2201

s32 ice_nvm_sanitize(struct ice_hw *hw, u8 cmd_flags, u8 *values)

sys/dev/ice/ice_nvm.c

2211

status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_nvm.c

227

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_nvm.c

243

ice_aq_read_nvm_cfg(struct ice_hw *hw, u8 cmd_flags, u16 field_id, void *data,

sys/dev/ice/ice_nvm.c

250

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

259

status = ice_aq_send_cmd(hw, &desc, data, buf_size, cd);

sys/dev/ice/ice_nvm.c

278

ice_aq_write_nvm_cfg(struct ice_hw *hw, u8 cmd_flags, void *data, u16 buf_size,

sys/dev/ice/ice_nvm.c

284

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

294

return ice_aq_send_cmd(hw, &desc, data, buf_size, cd);

sys/dev/ice/ice_nvm.c

304

ice_check_sr_access_params(struct ice_hw *hw, u32 offset, u16 words)

sys/dev/ice/ice_nvm.c

306

if ((offset + words) > hw->flash.sr_words) {

sys/dev/ice/ice_nvm.c

307

ice_debug(hw, ICE_DBG_NVM, "NVM error: offset beyond SR lmt.\n");

sys/dev/ice/ice_nvm.c

313

ice_debug(hw, ICE_DBG_NVM, "NVM error: tried to access %d words, limit is %d.\n",

sys/dev/ice/ice_nvm.c

321

ice_debug(hw, ICE_DBG_NVM, "NVM error: cannot spread over two sectors.\n");

sys/dev/ice/ice_nvm.c

336

int ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data)

sys/dev/ice/ice_nvm.c

342

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

348

status = ice_read_flat_nvm(hw, offset * sizeof(u16), &bytes,

sys/dev/ice/ice_nvm.c

368

ice_write_sr_aq(struct ice_hw *hw, u32 offset, u16 words, __le16 *data,

sys/dev/ice/ice_nvm.c

373

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

375

status = ice_check_sr_access_params(hw, offset, words);

sys/dev/ice/ice_nvm.c

377

status = ice_aq_update_nvm(hw, 0, 2 * offset, 2 * words, data,

sys/dev/ice/ice_nvm.c

394

ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)

sys/dev/ice/ice_nvm.c

399

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

404

status = ice_read_flat_nvm(hw, offset * 2, &bytes, (u8 *)data, true);

sys/dev/ice/ice_nvm.c

423

int ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)

sys/dev/ice/ice_nvm.c

425

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

426

if (hw->flash.blank_nvm_mode)

sys/dev/ice/ice_nvm.c

429

return ice_acquire_res(hw, ICE_NVM_RES_ID, access, ICE_NVM_TIMEOUT);

sys/dev/ice/ice_nvm.c

438

void ice_release_nvm(struct ice_hw *hw)

sys/dev/ice/ice_nvm.c

440

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

442

if (hw->flash.blank_nvm_mode)

sys/dev/ice/ice_nvm.c

445

ice_release_res(hw, ICE_NVM_RES_ID);

sys/dev/ice/ice_nvm.c

460

static u32 ice_get_flash_bank_offset(struct ice_hw *hw, enum ice_bank_select bank, u16 module)

sys/dev/ice/ice_nvm.c

462

struct ice_bank_info *banks = &hw->flash.banks;

sys/dev/ice/ice_nvm.c

484

ice_debug(hw, ICE_DBG_NVM, "Unexpected value for flash module: 0x%04x\n", module);

sys/dev/ice/ice_nvm.c

496

ice_debug(hw, ICE_DBG_NVM, "Unexpected value for active flash bank: %u\n",

sys/dev/ice/ice_nvm.c

50

ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,

sys/dev/ice/ice_nvm.c

512

ice_debug(hw, ICE_DBG_NVM, "Unexpected value for flash bank selection: %u\n", bank);

sys/dev/ice/ice_nvm.c

534

ice_read_flash_module(struct ice_hw *hw, enum ice_bank_select bank, u16 module,

sys/dev/ice/ice_nvm.c

540

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

542

start = ice_get_flash_bank_offset(hw, bank, module);

sys/dev/ice/ice_nvm.c

544

ice_debug(hw, ICE_DBG_NVM, "Unable to calculate flash bank offset for module 0x%04x\n",

sys/dev/ice/ice_nvm.c

549

status = ice_acquire_nvm(hw, ICE_RES_READ);

sys/dev/ice/ice_nvm.c

553

status = ice_read_flat_nvm(hw, start + offset, &length, data, false);

sys/dev/ice/ice_nvm.c

555

ice_release_nvm(hw);

sys/dev/ice/ice_nvm.c

57

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_nvm.c

571

ice_read_nvm_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)

sys/dev/ice/ice_nvm.c

576

status = ice_read_flash_module(hw, bank, ICE_SR_1ST_NVM_BANK_PTR, offset * sizeof(u16),

sys/dev/ice/ice_nvm.c

594

ice_get_nvm_css_hdr_len(struct ice_hw *hw, enum ice_bank_select bank,

sys/dev/ice/ice_nvm.c

601

status = ice_read_nvm_module(hw, bank, ICE_NVM_CSS_HDR_LEN_L,

sys/dev/ice/ice_nvm.c

606

status = ice_read_nvm_module(hw, bank, ICE_NVM_CSS_HDR_LEN_H,

sys/dev/ice/ice_nvm.c

631

ice_read_nvm_sr_copy(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)

sys/dev/ice/ice_nvm.c

636

status = ice_get_nvm_css_hdr_len(hw, bank, &hdr_len);

sys/dev/ice/ice_nvm.c

642

return ice_read_nvm_module(hw, bank, hdr_len + offset, data);

sys/dev/ice/ice_nvm.c

657

ice_read_orom_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)

sys/dev/ice/ice_nvm.c

662

status = ice_read_flash_module(hw, bank, ICE_SR_1ST_OROM_BANK_PTR, offset * sizeof(u16),

sys/dev/ice/ice_nvm.c

680

ice_read_netlist_module(struct ice_hw *hw, enum ice_bank_select bank, u32 offset, u16 *data)

sys/dev/ice/ice_nvm.c

685

status = ice_read_flash_module(hw, bank, ICE_SR_NETLIST_BANK_PTR, offset * sizeof(u16),

sys/dev/ice/ice_nvm.c

701

int ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data)

sys/dev/ice/ice_nvm.c

705

status = ice_acquire_nvm(hw, ICE_RES_READ);

sys/dev/ice/ice_nvm.c

707

status = ice_read_sr_word_aq(hw, offset, data);

sys/dev/ice/ice_nvm.c

708

ice_release_nvm(hw);

sys/dev/ice/ice_nvm.c

728

ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,

sys/dev/ice/ice_nvm.c

734

status = ice_read_sr_word(hw, ICE_SR_PFA_PTR, &pfa_ptr);

sys/dev/ice/ice_nvm.c

736

ice_debug(hw, ICE_DBG_INIT, "Preserved Field Array pointer.\n");

sys/dev/ice/ice_nvm.c

739

status = ice_read_sr_word(hw, pfa_ptr, &pfa_len);

sys/dev/ice/ice_nvm.c

741

ice_debug(hw, ICE_DBG_INIT, "Failed to read PFA length.\n");

sys/dev/ice/ice_nvm.c

746

ice_debug(hw, ICE_DBG_INIT, "PFA starts at offset %u. PFA length of %u caused 16-bit arithmetic overflow.\n",

sys/dev/ice/ice_nvm.c

765

status = ice_read_sr_word(hw, (u16)next_tlv,

sys/dev/ice/ice_nvm.c

768

ice_debug(hw, ICE_DBG_INIT, "Failed to read TLV type.\n");

sys/dev/ice/ice_nvm.c

77

return ice_aq_send_cmd(hw, &desc, data, length, cd);

sys/dev/ice/ice_nvm.c

772

status = ice_read_sr_word(hw, (u16)(next_tlv + 1), &tlv_len);

sys/dev/ice/ice_nvm.c

774

ice_debug(hw, ICE_DBG_INIT, "Failed to read TLV length.\n");

sys/dev/ice/ice_nvm.c

788

ice_debug(hw, ICE_DBG_INIT, "TLV of type %u and length 0x%04x caused 16-bit arithmetic overflow. The PFA starts at 0x%04x and has length of 0x%04x\n",

sys/dev/ice/ice_nvm.c

805

int ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)

sys/dev/ice/ice_nvm.c

812

status = ice_get_pfa_module_tlv(hw, &pba_tlv, &pba_tlv_len,

sys/dev/ice/ice_nvm.c

815

ice_debug(hw, ICE_DBG_INIT, "Failed to read PBA Block TLV.\n");

sys/dev/ice/ice_nvm.c

820

status = ice_read_sr_word(hw, (pba_tlv + 2), &pba_size);

sys/dev/ice/ice_nvm.c

822

ice_debug(hw, ICE_DBG_INIT, "Failed to read PBA Section size.\n");

sys/dev/ice/ice_nvm.c

827

ice_debug(hw, ICE_DBG_INIT, "Invalid PBA Block TLV size.\n");

sys/dev/ice/ice_nvm.c

836

ice_debug(hw, ICE_DBG_INIT, "Buffer too small for PBA data.\n");

sys/dev/ice/ice_nvm.c

841

status = ice_read_sr_word(hw, (pba_tlv + 2 + 1) + i, &pba_word);

sys/dev/ice/ice_nvm.c

843

ice_debug(hw, ICE_DBG_INIT, "Failed to read PBA Block word %d.\n", i);

sys/dev/ice/ice_nvm.c

864

static int ice_get_nvm_srev(struct ice_hw *hw, enum ice_bank_select bank, u32 *srev)

sys/dev/ice/ice_nvm.c

869

status = ice_read_nvm_module(hw, bank, ICE_NVM_CSS_SREV_L, &srev_l);

sys/dev/ice/ice_nvm.c

873

status = ice_read_nvm_module(hw, bank, ICE_NVM_CSS_SREV_H, &srev_h);

sys/dev/ice/ice_nvm.c

892

ice_get_nvm_ver_info(struct ice_hw *hw, enum ice_bank_select bank, struct ice_nvm_info *nvm)

sys/dev/ice/ice_nvm.c

897

status = ice_read_nvm_sr_copy(hw, bank, ICE_SR_NVM_DEV_STARTER_VER, &ver);

sys/dev/ice/ice_nvm.c

899

ice_debug(hw, ICE_DBG_NVM, "Failed to read DEV starter version.\n");

sys/dev/ice/ice_nvm.c

906

status = ice_read_nvm_sr_copy(hw, bank, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);

sys/dev/ice/ice_nvm.c

908

ice_debug(hw, ICE_DBG_NVM, "Failed to read EETRACK lo.\n");

sys/dev/ice/ice_nvm.c

911

status = ice_read_nvm_sr_copy(hw, bank, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);

sys/dev/ice/ice_nvm.c

913

ice_debug(hw, ICE_DBG_NVM, "Failed to read EETRACK hi.\n");

sys/dev/ice/ice_nvm.c

919

status = ice_get_nvm_srev(hw, bank, &nvm->srev);

sys/dev/ice/ice_nvm.c

921

ice_debug(hw, ICE_DBG_NVM, "Failed to read NVM security revision.\n");

sys/dev/ice/ice_nvm.c

935

int ice_get_inactive_nvm_ver(struct ice_hw *hw, struct ice_nvm_info *nvm)

sys/dev/ice/ice_nvm.c

937

return ice_get_nvm_ver_info(hw, ICE_INACTIVE_FLASH_BANK, nvm);

sys/dev/ice/ice_nvm.c

949

static int ice_get_orom_srev(struct ice_hw *hw, enum ice_bank_select bank, u32 *srev)

sys/dev/ice/ice_nvm.c

951

u32 orom_size_word = hw->flash.banks.orom_size / 2;

sys/dev/ice/ice_nvm.c

957

status = ice_get_nvm_css_hdr_len(hw, bank, &hdr_len);

sys/dev/ice/ice_nvm.c

96

ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,

sys/dev/ice/ice_nvm.c

962

ice_debug(hw, ICE_DBG_NVM, "Unexpected Option ROM Size of %u\n",

sys/dev/ice/ice_nvm.c

963

hw->flash.banks.orom_size);

sys/dev/ice/ice_nvm.c

971

status = ice_read_orom_module(hw, bank, css_start + ICE_NVM_CSS_SREV_L, &srev_l);

sys/dev/ice/ice_nvm.c

975

status = ice_read_orom_module(hw, bank, css_start + ICE_NVM_CSS_SREV_H, &srev_h);

sys/dev/ice/ice_nvm.c

994

ice_get_orom_civd_data(struct ice_hw *hw, enum ice_bank_select bank,

sys/dev/ice/ice_nvm.h

100

ice_nvm_access_read(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,

sys/dev/ice/ice_nvm.h

103

ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,

sys/dev/ice/ice_nvm.h

109

ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,

sys/dev/ice/ice_nvm.h

113

ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access);

sys/dev/ice/ice_nvm.h

114

void ice_release_nvm(struct ice_hw *hw);

sys/dev/ice/ice_nvm.h

116

ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,

sys/dev/ice/ice_nvm.h

120

ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,

sys/dev/ice/ice_nvm.h

123

ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,

sys/dev/ice/ice_nvm.h

126

ice_get_nvm_minsrevs(struct ice_hw *hw, struct ice_minsrev_info *minsrevs);

sys/dev/ice/ice_nvm.h

128

ice_update_nvm_minsrevs(struct ice_hw *hw, struct ice_minsrev_info *minsrevs);

sys/dev/ice/ice_nvm.h

130

ice_get_inactive_orom_ver(struct ice_hw *hw, struct ice_orom_info *orom);

sys/dev/ice/ice_nvm.h

132

ice_get_inactive_nvm_ver(struct ice_hw *hw, struct ice_nvm_info *nvm);

sys/dev/ice/ice_nvm.h

134

ice_get_inactive_netlist_ver(struct ice_hw *hw, struct ice_netlist_info *netlist);

sys/dev/ice/ice_nvm.h

136

ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size);

sys/dev/ice/ice_nvm.h

137

int ice_init_nvm(struct ice_hw *hw);

sys/dev/ice/ice_nvm.h

138

int ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);

sys/dev/ice/ice_nvm.h

139

int ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data);

sys/dev/ice/ice_nvm.h

141

ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data);

sys/dev/ice/ice_nvm.h

143

ice_aq_erase_nvm(struct ice_hw *hw, u16 module_typeid, struct ice_sq_cd *cd);

sys/dev/ice/ice_nvm.h

145

ice_aq_update_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset,

sys/dev/ice/ice_nvm.h

149

ice_aq_read_nvm_cfg(struct ice_hw *hw, u8 cmd_flags, u16 field_id, void *data,

sys/dev/ice/ice_nvm.h

152

ice_aq_write_nvm_cfg(struct ice_hw *hw, u8 cmd_flags, void *data, u16 buf_size,

sys/dev/ice/ice_nvm.h

154

int ice_update_sr_checksum(struct ice_hw *hw);

sys/dev/ice/ice_nvm.h

155

int ice_validate_sr_checksum(struct ice_hw *hw, u16 *checksum);

sys/dev/ice/ice_nvm.h

156

int ice_nvm_validate_checksum(struct ice_hw *hw);

sys/dev/ice/ice_nvm.h

157

int ice_nvm_recalculate_checksum(struct ice_hw *hw);

sys/dev/ice/ice_nvm.h

159

ice_nvm_write_activate(struct ice_hw *hw, u16 cmd_flags, u8 *response_flags);

sys/dev/ice/ice_nvm.h

160

s32 ice_nvm_sanitize_operate(struct ice_hw *hw);

sys/dev/ice/ice_nvm.h

161

s32 ice_nvm_sanitize(struct ice_hw *hw, u8 cmd_flags, u8 *values);

sys/dev/ice/ice_osdep.c

100

device_t dev = ice_hw_to_dev(hw);

sys/dev/ice/ice_osdep.c

103

if (!(mask & hw->debug_mask))

sys/dev/ice/ice_osdep.c

128

ice_debug_array(struct ice_hw *hw, uint64_t mask, uint32_t rowsize,

sys/dev/ice/ice_osdep.c

131

device_t dev = ice_hw_to_dev(hw);

sys/dev/ice/ice_osdep.c

134

if (!(mask & hw->debug_mask))

sys/dev/ice/ice_osdep.c

163

ice_info_fwlog(struct ice_hw *hw, uint32_t rowsize, uint32_t __unused groupsize,

sys/dev/ice/ice_osdep.c

166

device_t dev = ice_hw_to_dev(hw);

sys/dev/ice/ice_osdep.c

169

if (!ice_fwlog_supported(hw))

sys/dev/ice/ice_osdep.c

191

rd32(struct ice_hw *hw, uint32_t reg)

sys/dev/ice/ice_osdep.c

193

struct ice_softc *sc = __containerof(hw, struct ice_softc, hw);

sys/dev/ice/ice_osdep.c

209

rd64(struct ice_hw *hw, uint32_t reg)

sys/dev/ice/ice_osdep.c

211

struct ice_softc *sc = __containerof(hw, struct ice_softc, hw);

sys/dev/ice/ice_osdep.c

237

wr32(struct ice_hw *hw, uint32_t reg, uint32_t val)

sys/dev/ice/ice_osdep.c

239

struct ice_softc *sc = __containerof(hw, struct ice_softc, hw);

sys/dev/ice/ice_osdep.c

256

wr64(struct ice_hw *hw, uint32_t reg, uint64_t val)

sys/dev/ice/ice_osdep.c

258

struct ice_softc *sc = __containerof(hw, struct ice_softc, hw);

sys/dev/ice/ice_osdep.c

370

ice_alloc_dma_mem(struct ice_hw *hw, struct ice_dma_mem *mem, u64 size)

sys/dev/ice/ice_osdep.c

372

device_t dev = ice_hw_to_dev(hw);

sys/dev/ice/ice_osdep.c

435

ice_free_dma_mem(struct ice_hw __unused *hw, struct ice_dma_mem *mem)

sys/dev/ice/ice_osdep.c

81

ice_hw_to_dev(struct ice_hw *hw) {

sys/dev/ice/ice_osdep.c

82

struct ice_softc *sc = __containerof(hw, struct ice_softc, hw);

sys/dev/ice/ice_osdep.c

98

ice_debug(struct ice_hw *hw, uint64_t mask, char *fmt, ...)

sys/dev/ice/ice_osdep.h

105

ice_calloc(struct ice_hw __unused *hw, size_t count, size_t size)

sys/dev/ice/ice_osdep.h

119

ice_malloc(struct ice_hw __unused *hw, size_t size)

sys/dev/ice/ice_osdep.h

136

ice_memdup(struct ice_hw __unused *hw, const void *src, size_t size,

sys/dev/ice/ice_osdep.h

156

ice_free(struct ice_hw __unused *hw, void *mem)

sys/dev/ice/ice_osdep.h

401

void * ice_alloc_dma_mem(struct ice_hw *hw, struct ice_dma_mem *mem, u64 size);

sys/dev/ice/ice_osdep.h

402

void ice_free_dma_mem(struct ice_hw __unused *hw, struct ice_dma_mem *mem);

sys/dev/ice/ice_osdep.h

65

device_t ice_hw_to_dev(struct ice_hw *hw);

sys/dev/ice/ice_osdep.h

68

void ice_debug(struct ice_hw *hw, uint64_t mask, char *fmt, ...) __printflike(3, 4);

sys/dev/ice/ice_osdep.h

69

void ice_debug_array(struct ice_hw *hw, uint64_t mask, uint32_t rowsize,

sys/dev/ice/ice_osdep.h

71

void ice_info_fwlog(struct ice_hw *hw, uint32_t rowsize, uint32_t groupsize,

sys/dev/ice/ice_osdep.h

85

uint32_t rd32(struct ice_hw *hw, uint32_t reg);

sys/dev/ice/ice_osdep.h

86

uint64_t rd64(struct ice_hw *hw, uint32_t reg);

sys/dev/ice/ice_osdep.h

87

void wr32(struct ice_hw *hw, uint32_t reg, uint32_t val);

sys/dev/ice/ice_osdep.h

88

void wr64(struct ice_hw *hw, uint32_t reg, uint64_t val);

sys/dev/ice/ice_rdma.c

170

struct ice_hw *hw = &sc->hw;

sys/dev/ice/ice_rdma.c

197

qset_teid = (uint32_t *)ice_calloc(hw, count, sizeof(*qset_teid));

sys/dev/ice/ice_rdma.c

201

qs_handle = (uint16_t *)ice_calloc(hw, count, sizeof(*qs_handle));

sys/dev/ice/ice_rdma.c

203

ice_free(hw, qset_teid);

sys/dev/ice/ice_rdma.c

211

ice_get_hw_vsi_num(hw, sc->all_vsi[i]->idx) == vsi_id) {

sys/dev/ice/ice_rdma.c

218

ice_debug(hw, ICE_DBG_RDMA, "RDMA QSet invalid VSI\n");

sys/dev/ice/ice_rdma.c

223

ice_debug(hw, ICE_DBG_RDMA, "VSI is tied to unexpected device\n");

sys/dev/ice/ice_rdma.c

233

ice_debug(hw, ICE_DBG_RDMA, "RDMA QSet invalid VSI requested %d %d\n",

sys/dev/ice/ice_rdma.c

245

dcbx_cfg = &hw->port_info->qos_cfg.local_dcbx_cfg;

sys/dev/ice/ice_rdma.c

248

ice_debug(hw, ICE_DBG_RDMA, "%s:%d ena_tc=%x\n", __func__, __LINE__, ena_tc);

sys/dev/ice/ice_rdma.c

249

status = ice_cfg_vsi_rdma(hw->port_info, vsi->idx, ena_tc,

sys/dev/ice/ice_rdma.c

252

ice_debug(hw, ICE_DBG_RDMA, "Failed VSI RDMA qset config\n");

sys/dev/ice/ice_rdma.c

261

status = ice_ena_vsi_rdma_qset(hw->port_info, vsi->idx,

sys/dev/ice/ice_rdma.c

265

ice_debug(hw, ICE_DBG_RDMA, "Failed VSI RDMA qset enable\n");

sys/dev/ice/ice_rdma.c

273

status = ice_dis_vsi_rdma_qset(hw->port_info, count, qset_teid, qs_handle);

sys/dev/ice/ice_rdma.c

283

ice_free(hw, qs_handle);

sys/dev/ice/ice_rdma.c

284

ice_free(hw, qset_teid);

sys/dev/ice/ice_rdma.c

308

ret = ice_cfg_iwarp_fltr(&sc->hw, vsi->idx, enable);

sys/dev/ice/ice_rdma.c

360

ice_rdma_cp_qos_info(struct ice_hw *hw, struct ice_dcbx_cfg *dcbx_cfg,

sys/dev/ice/ice_rdma.c

381

up2tc = rd32(hw, PRTDCB_TUP2TC);

sys/dev/ice/ice_rdma.c

531

ice_rdma_cp_qos_info(&sc->hw, &sc->hw.port_info->qos_cfg.local_dcbx_cfg,

sys/dev/ice/ice_rdma.c

644

entry->peer.pf_id = sc->hw.pf_id;

sys/dev/ice/ice_rdma.c

646

entry->peer.pf_vsi_num = ice_get_hw_vsi_num(&sc->hw, sc->pf_vsi.idx);

sys/dev/ice/ice_rdma.c

655

ice_rdma_cp_qos_info(&sc->hw, &sc->hw.port_info->qos_cfg.local_dcbx_cfg,

sys/dev/ice/ice_rdma.c

71

static void ice_rdma_cp_qos_info(struct ice_hw *hw,

sys/dev/ice/ice_rdma.c

878

ice_rdma_cp_qos_info(&sc->hw, &pi->qos_cfg.local_dcbx_cfg, &event.port_qos);

sys/dev/ice/ice_sched.c

1000

buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);

sys/dev/ice/ice_sched.c

1023

status = ice_aq_add_sched_elems(hw, 1, buf, buf_size,

sys/dev/ice/ice_sched.c

1026

ice_debug(hw, ICE_DBG_SCHED, "add node failed FW Error %d\n",

sys/dev/ice/ice_sched.c

1027

hw->adminq.sq_last_status);

sys/dev/ice/ice_sched.c

1028

ice_free(hw, buf);

sys/dev/ice/ice_sched.c

1041

ice_debug(hw, ICE_DBG_SCHED, "add nodes in SW DB failed status =%d\n",

sys/dev/ice/ice_sched.c

1049

ice_debug(hw, ICE_DBG_SCHED, "Node is missing for teid =%d\n", teid);

sys/dev/ice/ice_sched.c

1073

ice_free(hw, buf);

sys/dev/ice/ice_sched.c

1103

if (!parent || layer < pi->hw->sw_entry_point_layer)

sys/dev/ice/ice_sched.c

1107

max_child_nodes = pi->hw->max_children[parent->tx_sched_layer];

sys/dev/ice/ice_sched.c

1157

ice_debug(pi->hw, ICE_DBG_SCHED, "added extra nodes %d %d\n", num_nodes,

sys/dev/ice/ice_sched.c

1169

max_child_nodes = pi->hw->max_children[parent->tx_sched_layer];

sys/dev/ice/ice_sched.c

1196

static u8 ice_sched_get_qgrp_layer(struct ice_hw *hw)

sys/dev/ice/ice_sched.c

1199

return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;

sys/dev/ice/ice_sched.c

1208

static u8 ice_sched_get_vsi_layer(struct ice_hw *hw)

sys/dev/ice/ice_sched.c

1216

if (hw->num_tx_sched_layers == ICE_SCHED_9_LAYERS)

sys/dev/ice/ice_sched.c

1217

return hw->num_tx_sched_layers - ICE_VSI_LAYER_OFFSET;

sys/dev/ice/ice_sched.c

1218

else if (hw->num_tx_sched_layers == ICE_SCHED_5_LAYERS)

sys/dev/ice/ice_sched.c

1220

return hw->num_tx_sched_layers - ICE_QGRP_LAYER_OFFSET;

sys/dev/ice/ice_sched.c

1221

return hw->sw_entry_point_layer;

sys/dev/ice/ice_sched.c

1230

static u8 ice_sched_get_agg_layer(struct ice_hw *hw)

sys/dev/ice/ice_sched.c

1237

if (hw->num_tx_sched_layers == ICE_SCHED_9_LAYERS)

sys/dev/ice/ice_sched.c

1238

return hw->num_tx_sched_layers - ICE_AGG_LAYER_OFFSET;

sys/dev/ice/ice_sched.c

1239

return hw->sw_entry_point_layer;

sys/dev/ice/ice_sched.c

1264

status = ice_sched_remove_elems(pi->hw, node->parent, 1, &teid);

sys/dev/ice/ice_sched.c

1286

if (node->tx_sched_layer >= pi->hw->sw_entry_point_layer &&

sys/dev/ice/ice_sched.c

130

ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,

sys/dev/ice/ice_sched.c

1310

struct ice_hw *hw;

sys/dev/ice/ice_sched.c

1318

hw = pi->hw;

sys/dev/ice/ice_sched.c

1321

buf = (struct ice_aqc_get_topo_elem *)ice_malloc(hw,

sys/dev/ice/ice_sched.c

1327

status = ice_aq_get_dflt_topo(hw, pi->lport, buf, ICE_AQ_MAX_BUF_LEN,

sys/dev/ice/ice_sched.c

1334

ice_debug(hw, ICE_DBG_SCHED, "num_branches unexpected %d\n",

sys/dev/ice/ice_sched.c

1345

ice_debug(hw, ICE_DBG_SCHED, "num_elems unexpected %d\n",

sys/dev/ice/ice_sched.c

1376

hw->sw_entry_point_layer = j;

sys/dev/ice/ice_sched.c

1392

INIT_LIST_HEAD(&hw->rl_prof_list[i]);

sys/dev/ice/ice_sched.c

1400

ice_free(hw, buf);

sys/dev/ice/ice_sched.c

142

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_sched.c

1425

ice_debug(pi->hw, ICE_DBG_SCHED, "Node not found for teid=0x%x\n", teid);

sys/dev/ice/ice_sched.c

1436

int ice_sched_query_res_alloc(struct ice_hw *hw)

sys/dev/ice/ice_sched.c

1443

if (hw->layer_info)

sys/dev/ice/ice_sched.c

1447

ice_malloc(hw, sizeof(*buf));

sys/dev/ice/ice_sched.c

1451

status = ice_aq_query_sched_res(hw, sizeof(*buf), buf, NULL);

sys/dev/ice/ice_sched.c

1455

hw->num_tx_sched_layers =

sys/dev/ice/ice_sched.c

1457

hw->num_tx_sched_phys_layers =

sys/dev/ice/ice_sched.c

1459

hw->flattened_layers = buf->sched_props.flattening_bitmap;

sys/dev/ice/ice_sched.c

1460

hw->max_cgds = buf->sched_props.max_pf_cgds;

sys/dev/ice/ice_sched.c

1469

for (i = 0; i < hw->num_tx_sched_layers - 1; i++) {

sys/dev/ice/ice_sched.c

1471

hw->max_children[i] = LE16_TO_CPU(max_sibl);

sys/dev/ice/ice_sched.c

1474

hw->layer_info = (struct ice_aqc_layer_props *)

sys/dev/ice/ice_sched.c

1475

ice_memdup(hw, buf->layer_props,

sys/dev/ice/ice_sched.c

1476

(hw->num_tx_sched_layers *

sys/dev/ice/ice_sched.c

1477

sizeof(*hw->layer_info)),

sys/dev/ice/ice_sched.c

1479

if (!hw->layer_info) {

sys/dev/ice/ice_sched.c

1485

ice_free(hw, buf);

sys/dev/ice/ice_sched.c

1495

void ice_sched_get_psm_clk_freq(struct ice_hw *hw)

sys/dev/ice/ice_sched.c

1499

val = rd32(hw, GLGEN_CLKSTAT_SRC);

sys/dev/ice/ice_sched.c

1505

hw->psm_clk_freq = ICE_PSM_CLK_367MHZ_IN_HZ;

sys/dev/ice/ice_sched.c

1508

hw->psm_clk_freq = ICE_PSM_CLK_416MHZ_IN_HZ;

sys/dev/ice/ice_sched.c

1511

hw->psm_clk_freq = ICE_PSM_CLK_446MHZ_IN_HZ;

sys/dev/ice/ice_sched.c

1514

hw->psm_clk_freq = ICE_PSM_CLK_390MHZ_IN_HZ;

sys/dev/ice/ice_sched.c

1535

ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,

sys/dev/ice/ice_sched.c

1552

if (ice_sched_find_node_in_subtree(hw, child, node))

sys/dev/ice/ice_sched.c

1590

if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))

sys/dev/ice/ice_sched.c

161

ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,

sys/dev/ice/ice_sched.c

1623

qgrp_layer = ice_sched_get_qgrp_layer(pi->hw);

sys/dev/ice/ice_sched.c

1624

vsi_layer = ice_sched_get_vsi_layer(pi->hw);

sys/dev/ice/ice_sched.c

1625

max_children = pi->hw->max_children[qgrp_layer];

sys/dev/ice/ice_sched.c

1627

vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);

sys/dev/ice/ice_sched.c

1645

if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))

sys/dev/ice/ice_sched.c

165

return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,

sys/dev/ice/ice_sched.c

1672

vsi_layer = ice_sched_get_vsi_layer(pi->hw);

sys/dev/ice/ice_sched.c

1699

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

1702

if (!hw)

sys/dev/ice/ice_sched.c

1704

agg_layer = ice_sched_get_agg_layer(hw);

sys/dev/ice/ice_sched.c

1724

static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)

sys/dev/ice/ice_sched.c

1731

status = ice_sched_query_elem(hw, node_teid, &buf);

sys/dev/ice/ice_sched.c

1736

ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",

sys/dev/ice/ice_sched.c

1754

ice_sched_calc_vsi_child_nodes(struct ice_hw *hw, u16 num_qs, u16 *num_nodes)

sys/dev/ice/ice_sched.c

1759

qgl = ice_sched_get_qgrp_layer(hw);

sys/dev/ice/ice_sched.c

1760

vsil = ice_sched_get_vsi_layer(hw);

sys/dev/ice/ice_sched.c

1765

num = DIVIDE_AND_ROUND_UP(num, hw->max_children[i]);

sys/dev/ice/ice_sched.c

1789

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

1794

qgl = ice_sched_get_qgrp_layer(hw);

sys/dev/ice/ice_sched.c

1795

vsil = ice_sched_get_vsi_layer(hw);

sys/dev/ice/ice_sched.c

1847

vsil = ice_sched_get_vsi_layer(pi->hw);

sys/dev/ice/ice_sched.c

1848

for (i = vsil; i >= pi->hw->sw_entry_point_layer; i--)

sys/dev/ice/ice_sched.c

1862

pi->hw->max_children[i])

sys/dev/ice/ice_sched.c

187

struct ice_hw *hw;

sys/dev/ice/ice_sched.c

1900

vsil = ice_sched_get_vsi_layer(pi->hw);

sys/dev/ice/ice_sched.c

1901

for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {

sys/dev/ice/ice_sched.c

193

hw = pi->hw;

sys/dev/ice/ice_sched.c

1974

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

1986

vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);

sys/dev/ice/ice_sched.c

199

ice_debug(hw, ICE_DBG_SCHED, "Parent Node not found for parent_teid=0x%x\n",

sys/dev/ice/ice_sched.c

1998

status = ice_alloc_lan_q_ctx(hw, vsi_handle, tc, new_numqs);

sys/dev/ice/ice_sched.c

2002

status = ice_alloc_rdma_q_ctx(hw, vsi_handle, tc, new_numqs);

sys/dev/ice/ice_sched.c

2008

ice_sched_calc_vsi_child_nodes(hw, new_numqs, new_num_nodes);

sys/dev/ice/ice_sched.c

2047

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

2050

ice_debug(pi->hw, ICE_DBG_SCHED, "add/config VSI %d\n", vsi_handle);

sys/dev/ice/ice_sched.c

2054

vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);

sys/dev/ice/ice_sched.c

2064

status = ice_sched_suspend_resume_elems(hw, 1, &teid,

sys/dev/ice/ice_sched.c

207

status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);

sys/dev/ice/ice_sched.c

2102

status = ice_sched_suspend_resume_elems(hw, 1, &teid, false);

sys/dev/ice/ice_sched.c

2123

LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &pi->hw->agg_list,

sys/dev/ice/ice_sched.c

2134

ice_free(pi->hw, agg_vsi_info);

sys/dev/ice/ice_sched.c

214

node = (struct ice_sched_node *)ice_malloc(hw, sizeof(*node));

sys/dev/ice/ice_sched.c

217

if (hw->max_children[layer]) {

sys/dev/ice/ice_sched.c

2173

ice_debug(pi->hw, ICE_DBG_SCHED, "removing VSI %d\n", vsi_handle);

sys/dev/ice/ice_sched.c

2174

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_sched.c

2177

vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);

sys/dev/ice/ice_sched.c

219

ice_calloc(hw, hw->max_children[layer],

sys/dev/ice/ice_sched.c

2194

ice_debug(pi->hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", i);

sys/dev/ice/ice_sched.c

222

ice_free(hw, node);

sys/dev/ice/ice_sched.c

2264

bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)

sys/dev/ice/ice_sched.c

2274

if (!ice_sched_is_tree_balanced(hw, node->children[i]))

sys/dev/ice/ice_sched.c

2277

return ice_sched_check_node(hw, node);

sys/dev/ice/ice_sched.c

2292

ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,

sys/dev/ice/ice_sched.c

2302

return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_sched.c

2314

ice_get_agg_info(struct ice_hw *hw, u32 agg_id)

sys/dev/ice/ice_sched.c

2318

LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,

sys/dev/ice/ice_sched.c

2336

ice_sched_get_free_vsi_parent(struct ice_hw *hw, struct ice_sched_node *node,

sys/dev/ice/ice_sched.c

2342

vsil = ice_sched_get_vsi_layer(hw);

sys/dev/ice/ice_sched.c

2346

return (node->num_children < hw->max_children[l]) ? node : NULL;

sys/dev/ice/ice_sched.c

2351

if (node->num_children < hw->max_children[l])

sys/dev/ice/ice_sched.c

2360

parent = ice_sched_get_free_vsi_parent(hw, node->children[i],

sys/dev/ice/ice_sched.c

2418

struct ice_hw *hw;

sys/dev/ice/ice_sched.c

2422

hw = pi->hw;

sys/dev/ice/ice_sched.c

2429

hw->max_children[parent->tx_sched_layer])

sys/dev/ice/ice_sched.c

2433

buf = (struct ice_aqc_move_elem *)ice_malloc(hw, buf_len);

sys/dev/ice/ice_sched.c

2448

status = ice_aq_move_sched_elems(hw, 1, buf, buf_len,

sys/dev/ice/ice_sched.c

2460

ice_free(hw, buf);

sys/dev/ice/ice_sched.c

247

ice_aq_delete_sched_elems(struct ice_hw *hw, u16 grps_req,

sys/dev/ice/ice_sched.c

2498

if (ice_sched_find_node_in_subtree(pi->hw, agg_node, vsi_node))

sys/dev/ice/ice_sched.c

2501

aggl = ice_sched_get_agg_layer(pi->hw);

sys/dev/ice/ice_sched.c

2502

vsil = ice_sched_get_vsi_layer(pi->hw);

sys/dev/ice/ice_sched.c

251

return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_delete_sched_elems,

sys/dev/ice/ice_sched.c

2510

parent = ice_sched_get_free_vsi_parent(pi->hw,

sys/dev/ice/ice_sched.c

2581

ice_free(pi->hw, agg_vsi_info);

sys/dev/ice/ice_sched.c

2600

vsil = ice_sched_get_vsi_layer(pi->hw);

sys/dev/ice/ice_sched.c

2624

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

2641

while (agg_node->tx_sched_layer > hw->sw_entry_point_layer) {

sys/dev/ice/ice_sched.c

266

ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,

sys/dev/ice/ice_sched.c

2707

agg_info = ice_get_agg_info(pi->hw, agg_id);

sys/dev/ice/ice_sched.c

2729

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

2744

aggl = ice_sched_get_agg_layer(hw);

sys/dev/ice/ice_sched.c

275

buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);

sys/dev/ice/ice_sched.c

2753

for (i = hw->sw_entry_point_layer; i < aggl; i++) {

sys/dev/ice/ice_sched.c

2758

if (parent->num_children < hw->max_children[i])

sys/dev/ice/ice_sched.c

2770

for (i = hw->sw_entry_point_layer; i <= aggl; i++) {

sys/dev/ice/ice_sched.c

2819

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

2823

agg_info = ice_get_agg_info(hw, agg_id);

sys/dev/ice/ice_sched.c

2827

ice_malloc(hw, sizeof(*agg_info));

sys/dev/ice/ice_sched.c

2839

LIST_ADD(&agg_info->list_entry, &hw->agg_list);

sys/dev/ice/ice_sched.c

284

status = ice_aq_delete_sched_elems(hw, 1, buf, buf_size,

sys/dev/ice/ice_sched.c

287

ice_debug(hw, ICE_DBG_SCHED, "remove node failed FW error %d\n",

sys/dev/ice/ice_sched.c

288

hw->adminq.sq_last_status);

sys/dev/ice/ice_sched.c

290

ice_free(hw, buf);

sys/dev/ice/ice_sched.c

2924

ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_sched.c

2928

LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,

sys/dev/ice/ice_sched.c

2956

agg_info = ice_get_agg_info(pi->hw, agg_id);

sys/dev/ice/ice_sched.c

2985

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

2989

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_sched.c

2991

agg_info = ice_get_agg_info(hw, agg_id);

sys/dev/ice/ice_sched.c

2997

old_agg_info = ice_get_vsi_agg_info(hw, vsi_handle);

sys/dev/ice/ice_sched.c

3013

ice_malloc(hw, sizeof(*agg_vsi_info));

sys/dev/ice/ice_sched.c

3037

ice_free(pi->hw, old_agg_vsi_info);

sys/dev/ice/ice_sched.c

3049

static void ice_sched_rm_unused_rl_prof(struct ice_hw *hw)

sys/dev/ice/ice_sched.c

3053

for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {

sys/dev/ice/ice_sched.c

3058

&hw->rl_prof_list[ln],

sys/dev/ice/ice_sched.c

3060

if (!ice_sched_del_rl_profile(hw, rl_prof_elem))

sys/dev/ice/ice_sched.c

3061

ice_debug(hw, ICE_DBG_SCHED, "Removed rl profile\n");

sys/dev/ice/ice_sched.c

3078

ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,

sys/dev/ice/ice_sched.c

3099

status = ice_aq_cfg_sched_elems(hw, num_elems, &buf, sizeof(buf),

sys/dev/ice/ice_sched.c

3102

ice_debug(hw, ICE_DBG_SCHED, "Config sched elem error\n");

sys/dev/ice/ice_sched.c

3123

ice_sched_cfg_node_bw_alloc(struct ice_hw *hw, struct ice_sched_node *node,

sys/dev/ice/ice_sched.c

3143

status = ice_sched_update_elem(hw, node, &buf);

sys/dev/ice/ice_sched.c

3188

agg_info = ice_get_agg_info(pi->hw, agg_id);

sys/dev/ice/ice_sched.c

3207

ice_free(pi->hw, agg_info);

sys/dev/ice/ice_sched.c

3210

ice_sched_rm_unused_rl_prof(pi->hw);

sys/dev/ice/ice_sched.c

3269

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_sched.c

3271

vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);

sys/dev/ice/ice_sched.c

3362

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_sched.c

3364

vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);

sys/dev/ice/ice_sched.c

340

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

3414

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_sched.c

3416

vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);

sys/dev/ice/ice_sched.c

3441

agg_info = ice_get_agg_info(pi->hw, agg_id);

sys/dev/ice/ice_sched.c

3475

agg_info = ice_get_agg_info(pi->hw, agg_id);

sys/dev/ice/ice_sched.c

351

if (node->tx_sched_layer >= hw->sw_entry_point_layer &&

sys/dev/ice/ice_sched.c

357

ice_sched_remove_elems(hw, node->parent, 1, &teid);

sys/dev/ice/ice_sched.c

3776

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

3781

LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,

sys/dev/ice/ice_sched.c

3798

if (num_vsis > hw->max_children[agg_node->tx_sched_layer])

sys/dev/ice/ice_sched.c

3808

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_sched.c

3825

if (ice_sched_find_node_in_subtree(hw, agg_node, vsi_node)) {

sys/dev/ice/ice_sched.c

3861

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_sched.c

3881

status = ice_sched_cfg_node_bw_alloc(pi->hw, vsi_node, rl_type,

sys/dev/ice/ice_sched.c

391

ice_free(hw, node->children);

sys/dev/ice/ice_sched.c

3912

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

3917

LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,

sys/dev/ice/ice_sched.c

392

ice_free(hw, node);

sys/dev/ice/ice_sched.c

3943

status = ice_sched_cfg_node_bw_alloc(hw, agg_node, rl_type,

sys/dev/ice/ice_sched.c

3965

static u16 ice_sched_calc_wakeup(struct ice_hw *hw, s32 bw)

sys/dev/ice/ice_sched.c

3973

wakeup_int = DIV_S64(hw->psm_clk_freq, bytes_per_sec);

sys/dev/ice/ice_sched.c

3982

hw->psm_clk_freq, bytes_per_sec);

sys/dev/ice/ice_sched.c

4009

ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,

sys/dev/ice/ice_sched.c

4030

ts_rate = DIV_S64((s64)hw->psm_clk_freq,

sys/dev/ice/ice_sched.c

4054

wm = ice_sched_calc_wakeup(hw, bw);

sys/dev/ice/ice_sched.c

407

ice_aq_get_dflt_topo(struct ice_hw *hw, u8 lport,

sys/dev/ice/ice_sched.c

4080

ice_sched_add_rl_profile(struct ice_hw *hw, enum ice_rl_type rl_type,

sys/dev/ice/ice_sched.c

4089

if (!hw || layer_num >= hw->num_tx_sched_layers)

sys/dev/ice/ice_sched.c

4105

LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],

sys/dev/ice/ice_sched.c

4114

ice_malloc(hw, sizeof(*rl_prof_elem));

sys/dev/ice/ice_sched.c

4119

status = ice_sched_bw_to_rl_profile(hw, bw, &rl_prof_elem->profile);

sys/dev/ice/ice_sched.c

4127

rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);

sys/dev/ice/ice_sched.c

4131

status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),

sys/dev/ice/ice_sched.c

4138

LIST_ADD(&rl_prof_elem->list_entry, &hw->rl_prof_list[layer_num]);

sys/dev/ice/ice_sched.c

4142

ice_free(hw, rl_prof_elem);

sys/dev/ice/ice_sched.c

4156

ice_sched_cfg_node_bw_lmt(struct ice_hw *hw, struct ice_sched_node *node,

sys/dev/ice/ice_sched.c

418

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_sched.c

4183

return ice_sched_update_elem(hw, node, &buf);

sys/dev/ice/ice_sched.c

4234

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

4236

if (layer_index >= hw->num_tx_sched_layers)

sys/dev/ice/ice_sched.c

4240

if (hw->layer_info[layer_index].max_cir_rl_profiles)

sys/dev/ice/ice_sched.c

4244

if (hw->layer_info[layer_index].max_eir_rl_profiles)

sys/dev/ice/ice_sched.c

4251

if (hw->layer_info[layer_index].max_srl_profiles)

sys/dev/ice/ice_sched.c

4253

else if (layer_index < hw->num_tx_sched_layers - 1 &&

sys/dev/ice/ice_sched.c

4254

hw->layer_info[layer_index + 1].max_srl_profiles)

sys/dev/ice/ice_sched.c

4257

hw->layer_info[layer_index - 1].max_srl_profiles)

sys/dev/ice/ice_sched.c

4300

ice_sched_rm_rl_profile(struct ice_hw *hw, u8 layer_num, u8 profile_type,

sys/dev/ice/ice_sched.c

4306

if (!hw || layer_num >= hw->num_tx_sched_layers)

sys/dev/ice/ice_sched.c

4309

LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],

sys/dev/ice/ice_sched.c

4319

status = ice_sched_del_rl_profile(hw, rl_prof_elem);

sys/dev/ice/ice_sched.c

4321

ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");

sys/dev/ice/ice_sched.c

4345

struct ice_hw *hw;

sys/dev/ice/ice_sched.c

4351

hw = pi->hw;

sys/dev/ice/ice_sched.c

437

ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,

sys/dev/ice/ice_sched.c

4372

status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);

sys/dev/ice/ice_sched.c

4381

return ice_sched_rm_rl_profile(hw, layer_num, profile_type, old_id);

sys/dev/ice/ice_sched.c

4401

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

4405

rl_prof_info = ice_sched_add_rl_profile(hw, rl_type, bw, layer_num);

sys/dev/ice/ice_sched.c

441

return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_add_sched_elems,

sys/dev/ice/ice_sched.c

4414

status = ice_sched_cfg_node_bw_lmt(hw, node, rl_type, rl_prof_id);

sys/dev/ice/ice_sched.c

4427

return ice_sched_rm_rl_profile(hw, layer_num,

sys/dev/ice/ice_sched.c

4454

return ice_sched_update_elem(pi->hw, node, &buf);

sys/dev/ice/ice_sched.c

4481

return ice_sched_update_elem(pi->hw, node, &buf);

sys/dev/ice/ice_sched.c

4501

struct ice_hw *hw;

sys/dev/ice/ice_sched.c

4506

hw = pi->hw;

sys/dev/ice/ice_sched.c

4508

ice_sched_rm_unused_rl_prof(hw);

sys/dev/ice/ice_sched.c

4512

if (layer_num >= hw->num_tx_sched_layers)

sys/dev/ice/ice_sched.c

458

ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,

sys/dev/ice/ice_sched.c

4612

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_sched.c

4615

q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handle);

sys/dev/ice/ice_sched.c

462

return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,

sys/dev/ice/ice_sched.c

4620

ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong q_teid\n");

sys/dev/ice/ice_sched.c

4634

if (sel_layer >= pi->hw->num_tx_sched_layers) {

sys/dev/ice/ice_sched.c

47

struct ice_hw *hw;

sys/dev/ice/ice_sched.c

4759

status = ice_sched_update_elem(pi->hw, tc_node, &buf);

sys/dev/ice/ice_sched.c

479

ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,

sys/dev/ice/ice_sched.c

483

return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_move_sched_elems,

sys/dev/ice/ice_sched.c

4861

status = ice_sched_cfg_node_bw_alloc(pi->hw, tc_node, rl_type,

sys/dev/ice/ice_sched.c

4905

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_sched.c

4907

vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);

sys/dev/ice/ice_sched.c

4960

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_sched.c

4963

vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);

sys/dev/ice/ice_sched.c

500

ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,

sys/dev/ice/ice_sched.c

503

return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,

sys/dev/ice/ice_sched.c

5031

ice_debug(pi->hw, ICE_DBG_SCHED, "Wrong id, agg type, or tc\n");

sys/dev/ice/ice_sched.c

5059

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_sched.c

5083

if (layer_num >= pi->hw->num_tx_sched_layers)

sys/dev/ice/ice_sched.c

5158

if (layer_num >= pi->hw->num_tx_sched_layers)

sys/dev/ice/ice_sched.c

52

hw = pi->hw;

sys/dev/ice/ice_sched.c

520

ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,

sys/dev/ice/ice_sched.c

5204

if (!ice_is_vsi_valid(pi->hw, vsi_handle))

sys/dev/ice/ice_sched.c

523

return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,

sys/dev/ice/ice_sched.c

5253

LIST_FOR_EACH_ENTRY(agg_info, &pi->hw->agg_list, ice_sched_agg_info,

sys/dev/ice/ice_sched.c

5280

if (layer_num >= pi->hw->num_tx_sched_layers)

sys/dev/ice/ice_sched.c

5311

LIST_FOR_EACH_ENTRY_SAFE(agg_info, tmp, &pi->hw->agg_list,

sys/dev/ice/ice_sched.c

538

ice_aq_query_sched_res(struct ice_hw *hw, u16 buf_size,

sys/dev/ice/ice_sched.c

5388

if (layer_num >= pi->hw->num_tx_sched_layers)

sys/dev/ice/ice_sched.c

54

root = (struct ice_sched_node *)ice_malloc(hw, sizeof(*root));

sys/dev/ice/ice_sched.c

545

return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_sched.c

5513

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

5516

if (!hw)

sys/dev/ice/ice_sched.c

5527

status = ice_sched_update_elem(hw, node, &buf);

sys/dev/ice/ice_sched.c

5540

int ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)

sys/dev/ice/ice_sched.c

5568

hw->max_burst_size = burst_size_to_prog;

sys/dev/ice/ice_sched.c

558

ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,

sys/dev/ice/ice_sched.c

5582

ice_sched_replay_node_prio(struct ice_hw *hw, struct ice_sched_node *node,

sys/dev/ice/ice_sched.c

5595

status = ice_sched_update_elem(hw, node, &buf);

sys/dev/ice/ice_sched.c

5609

ice_sched_replay_node_bw(struct ice_hw *hw, struct ice_sched_node *node,

sys/dev/ice/ice_sched.c

5612

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_sched.c

5621

status = ice_sched_replay_node_prio(hw, node,

sys/dev/ice/ice_sched.c

5634

status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MIN_BW,

sys/dev/ice/ice_sched.c

5647

status = ice_sched_cfg_node_bw_alloc(hw, node, ICE_MAX_BW,

sys/dev/ice/ice_sched.c

566

buf = (__le32 *)ice_malloc(hw, buf_size);

sys/dev/ice/ice_sched.c

5667

ice_sched_replay_agg_bw(struct ice_hw *hw, struct ice_sched_agg_info *agg_info)

sys/dev/ice/ice_sched.c

5679

tc_node = ice_sched_get_tc_node(hw->port_info, tc);

sys/dev/ice/ice_sched.c

5684

agg_node = ice_sched_get_agg_node(hw->port_info, tc_node,

sys/dev/ice/ice_sched.c

5690

status = ice_sched_replay_node_bw(hw, agg_node,

sys/dev/ice/ice_sched.c

5729

void ice_sched_replay_agg(struct ice_hw *hw)

sys/dev/ice/ice_sched.c

5731

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_sched.c

5735

LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,

sys/dev/ice/ice_sched.c

574

status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,

sys/dev/ice/ice_sched.c

5749

status = ice_sched_cfg_agg(hw->port_info,

sys/dev/ice/ice_sched.c

5754

ice_info(hw, "Replay agg id[%d] failed\n",

sys/dev/ice/ice_sched.c

5760

status = ice_sched_replay_agg_bw(hw, agg_info);

sys/dev/ice/ice_sched.c

5762

ice_info(hw, "Replay agg bw [id=%d] failed\n",

sys/dev/ice/ice_sched.c

5775

void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)

sys/dev/ice/ice_sched.c

5777

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_sched.c

578

status = ice_aq_resume_sched_elems(hw, num_nodes, buf,

sys/dev/ice/ice_sched.c

5781

LIST_FOR_EACH_ENTRY(agg_info, &hw->agg_list, ice_sched_agg_info,

sys/dev/ice/ice_sched.c

5803

if (!pi->hw)

sys/dev/ice/ice_sched.c

5807

status = ice_sched_replay_node_bw(pi->hw, pi->root,

sys/dev/ice/ice_sched.c

582

ice_debug(hw, ICE_DBG_SCHED, "suspend/resume failed\n");

sys/dev/ice/ice_sched.c

5824

if (!pi->hw)

sys/dev/ice/ice_sched.c

5833

status = ice_sched_replay_node_bw(pi->hw, tc_node,

sys/dev/ice/ice_sched.c

584

ice_free(hw, buf);

sys/dev/ice/ice_sched.c

5852

ice_sched_replay_vsi_bw(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_sched.c

5856

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_sched.c

5862

vsi_ctx = ice_get_vsi_ctx(pi->hw, vsi_handle);

sys/dev/ice/ice_sched.c

5875

status = ice_sched_replay_node_bw(hw, vsi_node, bw_t_info);

sys/dev/ice/ice_sched.c

5892

ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_sched.c

5896

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_sched.c

59

ice_calloc(hw, hw->max_children[0], sizeof(*root->children));

sys/dev/ice/ice_sched.c

5901

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_sched.c

5903

agg_info = ice_get_vsi_agg_info(hw, vsi_handle);

sys/dev/ice/ice_sched.c

5912

status = ice_sched_cfg_agg(hw->port_info, agg_info->agg_id,

sys/dev/ice/ice_sched.c

5917

status = ice_sched_replay_agg_bw(hw, agg_info);

sys/dev/ice/ice_sched.c

5930

return ice_sched_replay_vsi_bw(hw, vsi_handle,

sys/dev/ice/ice_sched.c

5942

int ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_sched.c

5944

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/ice_sched.c

5948

status = ice_sched_replay_vsi_agg(hw, vsi_handle);

sys/dev/ice/ice_sched.c

596

ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)

sys/dev/ice/ice_sched.c

5970

return ice_sched_replay_node_bw(pi->hw, q_node, &q_ctx->bw_t_info);

sys/dev/ice/ice_sched.c

601

vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);

sys/dev/ice/ice_sched.c

607

ice_calloc(hw, new_numqs, sizeof(*q_ctx));

sys/dev/ice/ice_sched.c

61

ice_free(hw, root);

sys/dev/ice/ice_sched.c

618

ice_calloc(hw, new_numqs, sizeof(*q_ctx));

sys/dev/ice/ice_sched.c

623

ice_free(hw, vsi_ctx->lan_q_ctx[tc]);

sys/dev/ice/ice_sched.c

638

ice_alloc_rdma_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)

sys/dev/ice/ice_sched.c

643

vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);

sys/dev/ice/ice_sched.c

649

ice_calloc(hw, new_numqs, sizeof(*q_ctx));

sys/dev/ice/ice_sched.c

660

ice_calloc(hw, new_numqs, sizeof(*q_ctx));

sys/dev/ice/ice_sched.c

665

ice_free(hw, vsi_ctx->rdma_q_ctx[tc]);

sys/dev/ice/ice_sched.c

685

ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,

sys/dev/ice/ice_sched.c

698

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_sched.c

716

ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,

sys/dev/ice/ice_sched.c

720

return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles,

sys/dev/ice/ice_sched.c

735

ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,

sys/dev/ice/ice_sched.c

739

return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,

sys/dev/ice/ice_sched.c

755

ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,

sys/dev/ice/ice_sched.c

759

return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,

sys/dev/ice/ice_sched.c

774

ice_sched_del_rl_profile(struct ice_hw *hw,

sys/dev/ice/ice_sched.c

787

status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),

sys/dev/ice/ice_sched.c

794

ice_free(hw, rl_info);

sys/dev/ice/ice_sched.c

807

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.c

809

for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {

sys/dev/ice/ice_sched.c

814

&hw->rl_prof_list[ln],

sys/dev/ice/ice_sched.c

819

status = ice_sched_del_rl_profile(hw, rl_prof_elem);

sys/dev/ice/ice_sched.c

821

ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");

sys/dev/ice/ice_sched.c

824

ice_free(hw, rl_prof_elem);

sys/dev/ice/ice_sched.c

837

void ice_sched_clear_agg(struct ice_hw *hw)

sys/dev/ice/ice_sched.c

842

LIST_FOR_EACH_ENTRY_SAFE(agg_info, atmp, &hw->agg_list,

sys/dev/ice/ice_sched.c

852

ice_free(hw, agg_vsi_info);

sys/dev/ice/ice_sched.c

855

ice_free(hw, agg_info);

sys/dev/ice/ice_sched.c

901

void ice_sched_cleanup_all(struct ice_hw *hw)

sys/dev/ice/ice_sched.c

903

if (!hw)

sys/dev/ice/ice_sched.c

906

if (hw->layer_info) {

sys/dev/ice/ice_sched.c

907

ice_free(hw, hw->layer_info);

sys/dev/ice/ice_sched.c

908

hw->layer_info = NULL;

sys/dev/ice/ice_sched.c

911

ice_sched_clear_port(hw->port_info);

sys/dev/ice/ice_sched.c

913

hw->num_tx_sched_layers = 0;

sys/dev/ice/ice_sched.c

914

hw->num_tx_sched_phys_layers = 0;

sys/dev/ice/ice_sched.c

915

hw->flattened_layers = 0;

sys/dev/ice/ice_sched.c

916

hw->max_cgds = 0;

sys/dev/ice/ice_sched.c

930

ice_aq_cfg_node_attr(struct ice_hw *hw, u16 num_nodes,

sys/dev/ice/ice_sched.c

943

return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_sched.c

957

ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,

sys/dev/ice/ice_sched.c

969

return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_sched.c

994

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_sched.h

114

ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,

sys/dev/ice/ice_sched.h

118

ice_aq_cfg_node_attr(struct ice_hw *hw, u16 num_nodes,

sys/dev/ice/ice_sched.h

122

ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,

sys/dev/ice/ice_sched.h

126

ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,

sys/dev/ice/ice_sched.h

130

ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,

sys/dev/ice/ice_sched.h

160

int ice_sched_query_res_alloc(struct ice_hw *hw);

sys/dev/ice/ice_sched.h

161

void ice_sched_get_psm_clk_freq(struct ice_hw *hw);

sys/dev/ice/ice_sched.h

165

void ice_sched_cleanup_all(struct ice_hw *hw);

sys/dev/ice/ice_sched.h

166

void ice_sched_clear_agg(struct ice_hw *hw);

sys/dev/ice/ice_sched.h

193

bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);

sys/dev/ice/ice_sched.h

195

ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,

sys/dev/ice/ice_sched.h

261

ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,

sys/dev/ice/ice_sched.h

285

int ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes);

sys/dev/ice/ice_sched.h

286

void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw);

sys/dev/ice/ice_sched.h

287

void ice_sched_replay_agg(struct ice_hw *hw);

sys/dev/ice/ice_sched.h

289

int ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);

sys/dev/ice/ice_switch.c

1013

ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,

sys/dev/ice/ice_switch.c

1019

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_switch.c

1031

status = ice_aq_send_cmd(hw, &desc, rule_list, rule_list_sz, cd);

sys/dev/ice/ice_switch.c

1033

hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)

sys/dev/ice/ice_switch.c

1059

ice_debug(pi->hw, ICE_DBG_SW, "incorrect VSI/port type received\n");

sys/dev/ice/ice_switch.c

1067

int ice_get_initial_sw_cfg(struct ice_hw *hw)

sys/dev/ice/ice_switch.c

1080

ice_malloc(hw, ICE_SW_CFG_MAX_BUF_LEN);

sys/dev/ice/ice_switch.c

1093

status = ice_aq_get_sw_cfg(hw, rbuf, ICE_SW_CFG_MAX_BUF_LEN,

sys/dev/ice/ice_switch.c

1121

if (hw->fw_vsi_num != ICE_DFLT_VSI_INVAL)

sys/dev/ice/ice_switch.c

1122

ice_debug(hw, ICE_DBG_SW, "fw_vsi_num %d -> %d\n",

sys/dev/ice/ice_switch.c

1123

hw->fw_vsi_num, vsi_port_num);

sys/dev/ice/ice_switch.c

1124

hw->fw_vsi_num = vsi_port_num;

sys/dev/ice/ice_switch.c

1129

ice_debug(hw, ICE_DBG_SW, "more ports than expected\n");

sys/dev/ice/ice_switch.c

1133

ice_init_port_info(hw->port_info,

sys/dev/ice/ice_switch.c

1145

ice_free(hw, rbuf);

sys/dev/ice/ice_switch.c

1158

static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)

sys/dev/ice/ice_switch.c

1190

if (hw->evb_veb) {

sys/dev/ice/ice_switch.c

1225

ice_fill_sw_rule(struct ice_hw *hw, struct ice_fltr_info *f_info,

sys/dev/ice/ice_switch.c

125

ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp_elem *buf,

sys/dev/ice/ice_switch.c

1250

ice_fill_sw_info(hw, f_info);

sys/dev/ice/ice_switch.c

1367

ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,

sys/dev/ice/ice_switch.c

137

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_switch.c

1395

lg_act = (struct ice_sw_rule_lg_act *)ice_malloc(hw, rules_size);

sys/dev/ice/ice_switch.c

1435

ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,

sys/dev/ice/ice_switch.c

1449

status = ice_aq_sw_rules(hw, lg_act, rules_size, 2,

sys/dev/ice/ice_switch.c

1456

ice_free(hw, lg_act);

sys/dev/ice/ice_switch.c

1468

ice_add_counter_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,

sys/dev/ice/ice_switch.c

1493

lg_act = (struct ice_sw_rule_lg_act *)ice_malloc(hw, rules_size);

sys/dev/ice/ice_switch.c

152

int ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id)

sys/dev/ice/ice_switch.c

1525

ice_fill_sw_rule(hw, &m_ent->fltr_info, rx_tx,

sys/dev/ice/ice_switch.c

1539

status = ice_aq_sw_rules(hw, lg_act, rules_size, 2,

sys/dev/ice/ice_switch.c

1546

ice_free(hw, lg_act);

sys/dev/ice/ice_switch.c

1561

ice_create_vsi_list_map(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,

sys/dev/ice/ice_switch.c

1564

struct ice_switch_info *sw = hw->switch_info;

sys/dev/ice/ice_switch.c

1568

v_map = (struct ice_vsi_list_map_info *)ice_malloc(hw, sizeof(*v_map));

sys/dev/ice/ice_switch.c

159

sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);

sys/dev/ice/ice_switch.c

1595

ice_update_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,

sys/dev/ice/ice_switch.c

1625

s_rule = (struct ice_sw_rule_vsi_list *)ice_malloc(hw, s_rule_size);

sys/dev/ice/ice_switch.c

1629

if (!ice_is_vsi_valid(hw, vsi_handle_arr[i])) {

sys/dev/ice/ice_switch.c

1635

CPU_TO_LE16(ice_get_hw_vsi_num(hw, vsi_handle_arr[i]));

sys/dev/ice/ice_switch.c

1642

status = ice_aq_sw_rules(hw, s_rule, s_rule_size, 1, opc, NULL);

sys/dev/ice/ice_switch.c

1645

ice_free(hw, s_rule);

sys/dev/ice/ice_switch.c

1658

ice_create_vsi_list_rule(struct ice_hw *hw, u16 *vsi_handle_arr, u16 num_vsi,

sys/dev/ice/ice_switch.c

1663

status = ice_aq_alloc_free_vsi_list(hw, vsi_list_id, lkup_type,

sys/dev/ice/ice_switch.c

1669

return ice_update_vsi_list_rule(hw, vsi_handle_arr, num_vsi,

sys/dev/ice/ice_switch.c

168

status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len, ice_aqc_opc_alloc_res, NULL);

sys/dev/ice/ice_switch.c

1685

ice_create_pkt_fwd_rule(struct ice_hw *hw, struct ice_sw_recipe *recp_list,

sys/dev/ice/ice_switch.c

1693

ice_malloc(hw, ice_struct_size(s_rule, hdr_data,

sys/dev/ice/ice_switch.c

1698

ice_malloc(hw, sizeof(*fm_entry));

sys/dev/ice/ice_switch.c

170

ice_debug(hw, ICE_DBG_RES, "Failed to allocate %s RSS global LUT, status %d\n",

sys/dev/ice/ice_switch.c

1712

ice_fill_sw_rule(hw, &fm_entry->fltr_info, s_rule,

sys/dev/ice/ice_switch.c

1715

status = ice_aq_sw_rules(hw, s_rule,

sys/dev/ice/ice_switch.c

1720

ice_free(hw, fm_entry);

sys/dev/ice/ice_switch.c

1733

ice_free(hw, s_rule);

sys/dev/ice/ice_switch.c

1746

ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)

sys/dev/ice/ice_switch.c

1752

ice_malloc(hw, ice_struct_size(s_rule, hdr_data,

sys/dev/ice/ice_switch.c

1757

ice_fill_sw_rule(hw, f_info, s_rule, ice_aqc_opc_update_sw_rules);

sys/dev/ice/ice_switch.c

1762

status = ice_aq_sw_rules(hw, s_rule,

sys/dev/ice/ice_switch.c

1767

ice_free(hw, s_rule);

sys/dev/ice/ice_switch.c

1777

int ice_update_sw_rule_bridge_mode(struct ice_hw *hw)

sys/dev/ice/ice_switch.c

178

ice_free(hw, sw_buf);

sys/dev/ice/ice_switch.c

1785

sw = hw->switch_info;

sys/dev/ice/ice_switch.c

1804

status = ice_update_pkt_fwd_rule(hw, fi);

sys/dev/ice/ice_switch.c

1837

ice_add_update_vsi_list(struct ice_hw *hw,

sys/dev/ice/ice_switch.c

1869

status = ice_create_vsi_list_rule(hw, &vsi_handle_arr[0], 2,

sys/dev/ice/ice_switch.c

187

int ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id)

sys/dev/ice/ice_switch.c

1882

status = ice_update_pkt_fwd_rule(hw, &tmp_fltr);

sys/dev/ice/ice_switch.c

1889

ice_create_vsi_list_map(hw, &vsi_handle_arr[0], 2,

sys/dev/ice/ice_switch.c

1900

ice_add_marker_act(hw, m_entry,

sys/dev/ice/ice_switch.c

1920

status = ice_update_vsi_list_rule(hw, &vsi_handle, 1,

sys/dev/ice/ice_switch.c

194

sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);

sys/dev/ice/ice_switch.c

202

status = ice_aq_alloc_free_res(hw, num_elems, sw_buf, buf_len, ice_aqc_opc_free_res, NULL);

sys/dev/ice/ice_switch.c

2022

ice_add_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,

sys/dev/ice/ice_switch.c

2030

if (!ice_is_vsi_valid(hw, f_entry->fltr_info.vsi_handle))

sys/dev/ice/ice_switch.c

2036

ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle);

sys/dev/ice/ice_switch.c

204

ice_debug(hw, ICE_DBG_RES, "Failed to free RSS global LUT %d, status %d\n",

sys/dev/ice/ice_switch.c

2046

ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle);

sys/dev/ice/ice_switch.c

2050

status = ice_create_pkt_fwd_rule(hw, recp_list, f_entry);

sys/dev/ice/ice_switch.c

2055

status = ice_add_update_vsi_list(hw, m_entry, cur_fltr, new_fltr);

sys/dev/ice/ice_switch.c

207

ice_free(hw, sw_buf);

sys/dev/ice/ice_switch.c

2072

ice_remove_vsi_list_rule(struct ice_hw *hw, u16 vsi_list_id,

sys/dev/ice/ice_switch.c

2078

return ice_aq_alloc_free_vsi_list(hw, &vsi_list_id, lkup_type,

sys/dev/ice/ice_switch.c

2090

ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

2107

status = ice_update_vsi_list_rule(hw, &vsi_handle, 1, vsi_list_id, true,

sys/dev/ice/ice_switch.c

2124

if (!ice_is_vsi_valid(hw, rem_vsi_handle))

sys/dev/ice/ice_switch.c

2128

status = ice_update_vsi_list_rule(hw, &rem_vsi_handle, 1,

sys/dev/ice/ice_switch.c

2137

ice_get_hw_vsi_num(hw, rem_vsi_handle);

sys/dev/ice/ice_switch.c

2139

status = ice_update_pkt_fwd_rule(hw, &tmp_fltr_info);

sys/dev/ice/ice_switch.c

2141

ice_debug(hw, ICE_DBG_SW, "Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\n",

sys/dev/ice/ice_switch.c

2155

status = ice_remove_vsi_list_rule(hw, vsi_list_id, lkup_type);

sys/dev/ice/ice_switch.c

2157

ice_debug(hw, ICE_DBG_SW, "Failed to remove VSI list %d, error %d\n",

sys/dev/ice/ice_switch.c

2163

ice_free(hw, vsi_list_info);

sys/dev/ice/ice_switch.c

2177

ice_remove_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,

sys/dev/ice/ice_switch.c

2186

if (!ice_is_vsi_valid(hw, f_entry->fltr_info.vsi_handle))

sys/dev/ice/ice_switch.c

2189

ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle);

sys/dev/ice/ice_switch.c

222

ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,

sys/dev/ice/ice_switch.c

2221

status = ice_rem_update_vsi_list(hw, vsi_handle, list_elem);

sys/dev/ice/ice_switch.c

2234

ice_malloc(hw, ice_struct_size(s_rule, hdr_data, 0));

sys/dev/ice/ice_switch.c

2240

ice_fill_sw_rule(hw, &list_elem->fltr_info, s_rule,

sys/dev/ice/ice_switch.c

2243

status = ice_aq_sw_rules(hw, s_rule,

sys/dev/ice/ice_switch.c

2248

ice_free(hw, s_rule);

sys/dev/ice/ice_switch.c

2254

ice_free(hw, list_elem);

sys/dev/ice/ice_switch.c

2274

ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,

sys/dev/ice/ice_switch.c

2291

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_switch.c

231

sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);

sys/dev/ice/ice_switch.c

2311

ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,

sys/dev/ice/ice_switch.c

2319

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_switch.c

2336

status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);

sys/dev/ice/ice_switch.c

2357

ice_add_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,

sys/dev/ice/ice_switch.c

2382

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_switch.c

2384

hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);

sys/dev/ice/ice_switch.c

2394

if (IS_UNICAST_ETHER_ADDR(add) && !hw->umac_shared) {

sys/dev/ice/ice_switch.c

2405

(IS_UNICAST_ETHER_ADDR(add) && hw->umac_shared)) {

sys/dev/ice/ice_switch.c

2407

ice_add_rule_internal(hw, recp_list, lport,

sys/dev/ice/ice_switch.c

2424

ice_calloc(hw, num_unicast, s_rule_size);

sys/dev/ice/ice_switch.c

2437

ice_fill_sw_rule(hw, &m_list_itr->fltr_info, r_iter,

sys/dev/ice/ice_switch.c

2453

status = ice_aq_sw_rules(hw, entry, elem_sent * s_rule_size,

sys/dev/ice/ice_switch.c

246

status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,

sys/dev/ice/ice_switch.c

2476

ice_malloc(hw, sizeof(*fm_entry));

sys/dev/ice/ice_switch.c

2496

ice_free(hw, s_rule);

sys/dev/ice/ice_switch.c

2507

int ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)

sys/dev/ice/ice_switch.c

2509

if (!m_list || !hw)

sys/dev/ice/ice_switch.c

2512

return ice_add_mac_rule(hw, m_list, hw->switch_info,

sys/dev/ice/ice_switch.c

2513

hw->port_info->lport);

sys/dev/ice/ice_switch.c

2523

ice_add_vlan_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,

sys/dev/ice/ice_switch.c

2533

if (!ice_is_vsi_valid(hw, f_entry->fltr_info.vsi_handle))

sys/dev/ice/ice_switch.c

2537

ice_get_hw_vsi_num(hw, f_entry->fltr_info.vsi_handle);

sys/dev/ice/ice_switch.c

2566

status = ice_create_vsi_list_rule(hw,

sys/dev/ice/ice_switch.c

2579

status = ice_create_pkt_fwd_rule(hw, recp_list, f_entry);

sys/dev/ice/ice_switch.c

2593

ice_create_vsi_list_map(hw, &vsi_handle,

sys/dev/ice/ice_switch.c

2602

status = ice_add_update_vsi_list(hw, v_list_itr, cur_fltr,

sys/dev/ice/ice_switch.c

2619

ice_debug(hw, ICE_DBG_SW, "Invalid configuration: Optimization to reuse VSI list with more than one VSI is not being done yet\n");

sys/dev/ice/ice_switch.c

262

ice_malloc(hw, buf_len);

sys/dev/ice/ice_switch.c

2636

status = ice_create_vsi_list_rule(hw, &vsi_handle_arr[0], 2,

sys/dev/ice/ice_switch.c

2648

status = ice_update_pkt_fwd_rule(hw, &tmp_fltr);

sys/dev/ice/ice_switch.c

2660

ice_create_vsi_list_map(hw, &vsi_handle_arr[0], 2,

sys/dev/ice/ice_switch.c

2677

ice_add_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list,

sys/dev/ice/ice_switch.c

2689

v_list_itr->status = ice_add_vlan_internal(hw, recp_list,

sys/dev/ice/ice_switch.c

2704

int ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)

sys/dev/ice/ice_switch.c

2706

if (!v_list || !hw)

sys/dev/ice/ice_switch.c

2709

return ice_add_vlan_rule(hw, v_list, hw->switch_info);

sys/dev/ice/ice_switch.c

2724

ice_add_eth_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list,

sys/dev/ice/ice_switch.c

2741

em_list_itr->status = ice_add_rule_internal(hw, recp_list,

sys/dev/ice/ice_switch.c

2758

ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)

sys/dev/ice/ice_switch.c

276

status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,

sys/dev/ice/ice_switch.c

2760

if (!em_list || !hw)

sys/dev/ice/ice_switch.c

2763

return ice_add_eth_mac_rule(hw, em_list, hw->switch_info,

sys/dev/ice/ice_switch.c

2764

hw->port_info->lport);

sys/dev/ice/ice_switch.c

2774

ice_remove_eth_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list,

sys/dev/ice/ice_switch.c

2791

em_list_itr->status = ice_remove_rule_internal(hw, recp_list,

sys/dev/ice/ice_switch.c

280

ice_free(hw, counter_buf);

sys/dev/ice/ice_switch.c

2806

ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)

sys/dev/ice/ice_switch.c

2808

if (!em_list || !hw)

sys/dev/ice/ice_switch.c

2811

return ice_remove_eth_mac_rule(hw, em_list, hw->switch_info);

sys/dev/ice/ice_switch.c

285

ice_free(hw, counter_buf);

sys/dev/ice/ice_switch.c

2859

ice_alloc_res_lg_act(struct ice_hw *hw, u16 *l_id, u16 num_acts)

sys/dev/ice/ice_switch.c

2874

sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);

sys/dev/ice/ice_switch.c

2881

status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,

sys/dev/ice/ice_switch.c

2886

ice_free(hw, sw_buf);

sys/dev/ice/ice_switch.c

289

ice_free(hw, sw_buf);

sys/dev/ice/ice_switch.c

2897

ice_rem_sw_rule_info(struct ice_hw *hw, struct LIST_HEAD_TYPE *rule_head)

sys/dev/ice/ice_switch.c

2906

ice_free(hw, entry);

sys/dev/ice/ice_switch.c

2915

void ice_rem_all_sw_rules_info(struct ice_hw *hw)

sys/dev/ice/ice_switch.c

2917

struct ice_switch_info *sw = hw->switch_info;

sys/dev/ice/ice_switch.c

2925

ice_rem_sw_rule_info(hw, rule_head);

sys/dev/ice/ice_switch.c

2946

struct ice_hw *hw = pi->hw;

sys/dev/ice/ice_switch.c

2951

recp_list = &pi->hw->switch_info->recp_list[ICE_SW_LKUP_DFLT];

sys/dev/ice/ice_switch.c

2953

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_switch.c

2956

hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);

sys/dev/ice/ice_switch.c

2976

status = ice_add_rule_internal(hw, recp_list, lport,

sys/dev/ice/ice_switch.c

2979

status = ice_remove_rule_internal(hw, recp_list,

sys/dev/ice/ice_switch.c

3002

recp_list = &pi->hw->switch_info->recp_list[ICE_SW_LKUP_DFLT];

sys/dev/ice/ice_switch.c

305

int ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)

sys/dev/ice/ice_switch.c

3067

ice_remove_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,

sys/dev/ice/ice_switch.c

3087

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_switch.c

3091

ice_get_hw_vsi_num(hw, vsi_handle);

sys/dev/ice/ice_switch.c

3092

if (IS_UNICAST_ETHER_ADDR(add) && !hw->umac_shared) {

sys/dev/ice/ice_switch.c

3105

list_itr->status = ice_remove_rule_internal(hw, recp_list,

sys/dev/ice/ice_switch.c

3119

int ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)

sys/dev/ice/ice_switch.c

312

sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);

sys/dev/ice/ice_switch.c

3123

recp_list = &hw->switch_info->recp_list[ICE_SW_LKUP_MAC];

sys/dev/ice/ice_switch.c

3124

return ice_remove_mac_rule(hw, m_list, recp_list);

sys/dev/ice/ice_switch.c

3134

ice_remove_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list,

sys/dev/ice/ice_switch.c

3145

v_list_itr->status = ice_remove_rule_internal(hw, recp_list,

sys/dev/ice/ice_switch.c

3160

ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)

sys/dev/ice/ice_switch.c

3164

if (!v_list || !hw)

sys/dev/ice/ice_switch.c

3167

recp_list = &hw->switch_info->recp_list[ICE_SW_LKUP_VLAN];

sys/dev/ice/ice_switch.c

3168

return ice_remove_vlan_rule(hw, v_list, recp_list);

sys/dev/ice/ice_switch.c

3201

ice_add_entry_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

3210

tmp = (struct ice_fltr_list_entry *)ice_malloc(hw, sizeof(*tmp));

sys/dev/ice/ice_switch.c

3223

tmp->fltr_info.fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);

sys/dev/ice/ice_switch.c

3244

ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

325

ret_status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,

sys/dev/ice/ice_switch.c

3252

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_switch.c

3260

status = ice_add_entry_to_vsi_fltr_list(hw, vsi_handle,

sys/dev/ice/ice_switch.c

329

ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n");

sys/dev/ice/ice_switch.c

3323

_ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

333

ice_malloc(hw, buf_len);

sys/dev/ice/ice_switch.c

3332

if (!ice_is_vsi_valid(hw, vsi_handle) ||

sys/dev/ice/ice_switch.c

335

ice_free(hw, sw_buf);

sys/dev/ice/ice_switch.c

3369

ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

3372

if (!vid || !promisc_mask || !hw)

sys/dev/ice/ice_switch.c

3375

return _ice_get_vsi_promisc(hw, vsi_handle, promisc_mask,

sys/dev/ice/ice_switch.c

3376

vid, hw->switch_info, ICE_SW_LKUP_PROMISC);

sys/dev/ice/ice_switch.c

3387

ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

3390

if (!hw || !promisc_mask || !vid)

sys/dev/ice/ice_switch.c

3393

return _ice_get_vsi_promisc(hw, vsi_handle, promisc_mask,

sys/dev/ice/ice_switch.c

3394

vid, hw->switch_info,

sys/dev/ice/ice_switch.c

3405

ice_remove_promisc(struct ice_hw *hw, u8 recp_id,

sys/dev/ice/ice_switch.c

3411

recp_list = &hw->switch_info->recp_list[recp_id];

sys/dev/ice/ice_switch.c

3415

ice_remove_rule_internal(hw, recp_list, v_list_itr);

sys/dev/ice/ice_switch.c

3431

_ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

3445

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_switch.c

347

status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,

sys/dev/ice/ice_switch.c

3481

status = ice_add_entry_to_vsi_fltr_list(hw, vsi_handle,

sys/dev/ice/ice_switch.c

3491

status = ice_remove_promisc(hw, recipe_id, &remove_list_head);

sys/dev/ice/ice_switch.c

3497

ice_free(hw, fm_entry);

sys/dev/ice/ice_switch.c

350

ice_debug(hw, ICE_DBG_SW, "VEB counter resource could not be freed\n");

sys/dev/ice/ice_switch.c

3511

ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

3514

if (!hw || !promisc_mask)

sys/dev/ice/ice_switch.c

3517

return _ice_clear_vsi_promisc(hw, vsi_handle, promisc_mask,

sys/dev/ice/ice_switch.c

3518

vid, hw->switch_info);

sys/dev/ice/ice_switch.c

3531

_ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

354

ice_free(hw, counter_buf);

sys/dev/ice/ice_switch.c

3545

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_switch.c

3547

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_switch.c

3549

hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);

sys/dev/ice/ice_switch.c

355

ice_free(hw, sw_buf);

sys/dev/ice/ice_switch.c

3645

status = ice_add_rule_internal(hw, recp_list, lport,

sys/dev/ice/ice_switch.c

3663

ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

3666

if (!hw || !promisc_mask)

sys/dev/ice/ice_switch.c

3669

return _ice_set_vsi_promisc(hw, vsi_handle, promisc_mask, vid,

sys/dev/ice/ice_switch.c

3670

hw->port_info->lport,

sys/dev/ice/ice_switch.c

3671

hw->switch_info);

sys/dev/ice/ice_switch.c

368

ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.c

3686

_ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

3701

status = ice_add_to_vsi_fltr_list(hw, vsi_handle, vlan_head,

sys/dev/ice/ice_switch.c

3712

if (ice_is_dvm_ena(hw) &&

sys/dev/ice/ice_switch.c

3718

status = _ice_clear_vsi_promisc(hw, vsi_handle,

sys/dev/ice/ice_switch.c

3722

status = _ice_set_vsi_promisc(hw, vsi_handle,

sys/dev/ice/ice_switch.c

3733

ice_free(hw, list_itr);

sys/dev/ice/ice_switch.c

3748

ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

3751

if (!hw || !promisc_mask)

sys/dev/ice/ice_switch.c

3754

return _ice_set_vlan_vsi_promisc(hw, vsi_handle, promisc_mask,

sys/dev/ice/ice_switch.c

3755

rm_vlan_promisc, hw->port_info->lport,

sys/dev/ice/ice_switch.c

3756

hw->switch_info);

sys/dev/ice/ice_switch.c

3767

ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

3782

status = ice_add_to_vsi_fltr_list(hw, vsi_handle, rule_head,

sys/dev/ice/ice_switch.c

3790

ice_remove_mac_rule(hw, &remove_list_head, &recp_list[lkup]);

sys/dev/ice/ice_switch.c

3793

ice_remove_vlan_rule(hw, &remove_list_head, &recp_list[lkup]);

sys/dev/ice/ice_switch.c

3797

ice_remove_promisc(hw, (u8)lkup, &remove_list_head);

sys/dev/ice/ice_switch.c

3800

ice_debug(hw, ICE_DBG_SW, "MAC VLAN look up is not supported yet\n");

sys/dev/ice/ice_switch.c

3804

ice_remove_eth_mac(hw, &remove_list_head);

sys/dev/ice/ice_switch.c

3807

ice_debug(hw, ICE_DBG_SW, "Remove filters for this lookup type hasn't been implemented yet\n");

sys/dev/ice/ice_switch.c

3810

ice_debug(hw, ICE_DBG_SW, "Unsupported lookup type\n");

sys/dev/ice/ice_switch.c

3818

ice_free(hw, fm_entry);

sys/dev/ice/ice_switch.c

3829

ice_remove_vsi_fltr_rule(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.c

3832

ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);

sys/dev/ice/ice_switch.c

3834

ice_remove_vsi_lkup_fltr(hw, vsi_handle,

sys/dev/ice/ice_switch.c

3836

ice_remove_vsi_lkup_fltr(hw, vsi_handle,

sys/dev/ice/ice_switch.c

3838

ice_remove_vsi_lkup_fltr(hw, vsi_handle,

sys/dev/ice/ice_switch.c

3840

ice_remove_vsi_lkup_fltr(hw, vsi_handle,

sys/dev/ice/ice_switch.c

3842

ice_remove_vsi_lkup_fltr(hw, vsi_handle,

sys/dev/ice/ice_switch.c

3844

ice_remove_vsi_lkup_fltr(hw, vsi_handle,

sys/dev/ice/ice_switch.c

3846

ice_remove_vsi_lkup_fltr(hw, vsi_handle,

sys/dev/ice/ice_switch.c

3848

ice_remove_vsi_lkup_fltr(hw, vsi_handle,

sys/dev/ice/ice_switch.c

3857

void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_switch.c

3859

ice_remove_vsi_fltr_rule(hw, vsi_handle, hw->switch_info);

sys/dev/ice/ice_switch.c

3871

ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,

sys/dev/ice/ice_switch.c

3880

buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);

sys/dev/ice/ice_switch.c

3888

status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,

sys/dev/ice/ice_switch.c

3896

ice_free(hw, buf);

sys/dev/ice/ice_switch.c

390

status = ice_aq_send_cmd(hw, &desc, &vsi_ctx->info,

sys/dev/ice/ice_switch.c

3909

ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,

sys/dev/ice/ice_switch.c

3918

buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);

sys/dev/ice/ice_switch.c

3927

status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,

sys/dev/ice/ice_switch.c

3930

ice_debug(hw, ICE_DBG_SW, "counter resource could not be freed\n");

sys/dev/ice/ice_switch.c

3932

ice_free(hw, buf);

sys/dev/ice/ice_switch.c

3941

int ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id)

sys/dev/ice/ice_switch.c

3943

return ice_alloc_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,

sys/dev/ice/ice_switch.c

3953

int ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id)

sys/dev/ice/ice_switch.c

3955

return ice_free_res_cntr(hw, ICE_AQC_RES_TYPE_VLAN_COUNTER,

sys/dev/ice/ice_switch.c

3967

ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,

sys/dev/ice/ice_switch.c

3988

if (!ice_is_vsi_valid(hw, f_info->vsi_handle))

sys/dev/ice/ice_switch.c

3990

f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);

sys/dev/ice/ice_switch.c

4001

ret = ice_add_mac_rule(hw, &l_head, hw->switch_info,

sys/dev/ice/ice_switch.c

4002

hw->port_info->lport);

sys/dev/ice/ice_switch.c

4008

recp_list = &hw->switch_info->recp_list[ICE_SW_LKUP_MAC];

sys/dev/ice/ice_switch.c

4033

ret = ice_alloc_res_lg_act(hw, &lg_act_id, 3);

sys/dev/ice/ice_switch.c

4041

ret = ice_add_marker_act(hw, m_entry, sw_marker, lg_act_id);

sys/dev/ice/ice_switch.c

4051

ret = ice_remove_mac(hw, &l_head);

sys/dev/ice/ice_switch.c

4063

ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info)

sys/dev/ice/ice_switch.c

4081

if (!ice_is_vsi_valid(hw, f_info->vsi_handle))

sys/dev/ice/ice_switch.c

4083

f_info->fwd_id.hw_vsi_id = ice_get_hw_vsi_num(hw, f_info->vsi_handle);

sys/dev/ice/ice_switch.c

4084

recp_list = &hw->switch_info->recp_list[ICE_SW_LKUP_MAC];

sys/dev/ice/ice_switch.c

4098

ret = ice_add_mac_rule(hw, &l_head, hw->switch_info,

sys/dev/ice/ice_switch.c

4099

hw->port_info->lport);

sys/dev/ice/ice_switch.c

412

ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.c

4125

ret = ice_alloc_vlan_res_counter(hw, &counter_id);

sys/dev/ice/ice_switch.c

4132

ret = ice_alloc_res_lg_act(hw, &lg_act_id, 2);

sys/dev/ice/ice_switch.c

4140

ret = ice_add_counter_act(hw, m_entry, counter_id, lg_act_id);

sys/dev/ice/ice_switch.c

4150

ret = ice_remove_mac(hw, &l_head);

sys/dev/ice/ice_switch.c

4162

ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)

sys/dev/ice/ice_switch.c

4166

u8 lport = hw->port_info->lport;

sys/dev/ice/ice_switch.c

4173

recp_list = &hw->switch_info->recp_list[recp_id];

sys/dev/ice/ice_switch.c

4190

status = ice_add_rule_internal(hw, recp_list, lport,

sys/dev/ice/ice_switch.c

4200

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_switch.c

4206

ice_get_hw_vsi_num(hw, vsi_handle);

sys/dev/ice/ice_switch.c

4209

status = ice_add_vlan_internal(hw, recp_list,

sys/dev/ice/ice_switch.c

4212

status = ice_add_rule_internal(hw, recp_list,

sys/dev/ice/ice_switch.c

4221

ice_rem_sw_rule_info(hw, &l_head);

sys/dev/ice/ice_switch.c

4232

int ice_replay_all_fltr(struct ice_hw *hw)

sys/dev/ice/ice_switch.c

4234

struct ice_switch_info *sw = hw->switch_info;

sys/dev/ice/ice_switch.c

4241

status = ice_replay_fltr(hw, i, head);

sys/dev/ice/ice_switch.c

4261

ice_replay_vsi_fltr(struct ice_hw *hw, struct ice_port_info *pi,

sys/dev/ice/ice_switch.c

4273

hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);

sys/dev/ice/ice_switch.c

4285

status = ice_add_rule_internal(hw, recp_list,

sys/dev/ice/ice_switch.c

429

status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_switch.c

4301

status = ice_add_vlan_internal(hw, recp_list, &f_entry);

sys/dev/ice/ice_switch.c

4303

status = ice_add_rule_internal(hw, recp_list,

sys/dev/ice/ice_switch.c

4322

ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,

sys/dev/ice/ice_switch.c

4329

sw = hw->switch_info;

sys/dev/ice/ice_switch.c

4337

status = ice_replay_vsi_fltr(hw, pi, sw, vsi_handle, i,

sys/dev/ice/ice_switch.c

4353

void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw)

sys/dev/ice/ice_switch.c

4366

ice_rem_sw_rule_info(hw, l_head);

sys/dev/ice/ice_switch.c

4377

void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw)

sys/dev/ice/ice_switch.c

4379

ice_rm_sw_replay_rule_info(hw, hw->switch_info);

sys/dev/ice/ice_switch.c

447

ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.c

464

status = ice_aq_send_cmd(hw, &desc, &vsi_ctx->info,

sys/dev/ice/ice_switch.c

482

bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_switch.c

484

return vsi_handle < ICE_MAX_VSI && hw->vsi_ctx[vsi_handle];

sys/dev/ice/ice_switch.c

495

u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_switch.c

497

return hw->vsi_ctx[vsi_handle]->vsi_num;

sys/dev/ice/ice_switch.c

507

struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_switch.c

509

return (vsi_handle >= ICE_MAX_VSI) ? NULL : hw->vsi_ctx[vsi_handle];

sys/dev/ice/ice_switch.c

521

ice_save_vsi_ctx(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi)

sys/dev/ice/ice_switch.c

523

hw->vsi_ctx[vsi_handle] = vsi;

sys/dev/ice/ice_switch.c

531

void ice_clear_vsi_q_ctx(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_switch.c

536

vsi = ice_get_vsi_ctx(hw, vsi_handle);

sys/dev/ice/ice_switch.c

541

ice_free(hw, vsi->lan_q_ctx[i]);

sys/dev/ice/ice_switch.c

545

ice_free(hw, vsi->rdma_q_ctx[i]);

sys/dev/ice/ice_switch.c

558

static void ice_clear_vsi_ctx(struct ice_hw *hw, u16 vsi_handle)

sys/dev/ice/ice_switch.c

562

vsi = ice_get_vsi_ctx(hw, vsi_handle);

sys/dev/ice/ice_switch.c

564

ice_clear_vsi_q_ctx(hw, vsi_handle);

sys/dev/ice/ice_switch.c

565

ice_free(hw, vsi);

sys/dev/ice/ice_switch.c

566

hw->vsi_ctx[vsi_handle] = NULL;

sys/dev/ice/ice_switch.c

574

void ice_clear_all_vsi_ctx(struct ice_hw *hw)

sys/dev/ice/ice_switch.c

579

ice_clear_vsi_ctx(hw, i);

sys/dev/ice/ice_switch.c

594

ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.c

602

status = ice_aq_add_vsi(hw, vsi_ctx, cd);

sys/dev/ice/ice_switch.c

605

tmp_vsi_ctx = ice_get_vsi_ctx(hw, vsi_handle);

sys/dev/ice/ice_switch.c

609

ice_malloc(hw, sizeof(*tmp_vsi_ctx));

sys/dev/ice/ice_switch.c

611

ice_aq_free_vsi(hw, vsi_ctx, false, cd);

sys/dev/ice/ice_switch.c

616

ice_save_vsi_ctx(hw, vsi_handle, tmp_vsi_ctx);

sys/dev/ice/ice_switch.c

636

ice_free_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.c

641

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_switch.c

643

vsi_ctx->vsi_num = ice_get_hw_vsi_num(hw, vsi_handle);

sys/dev/ice/ice_switch.c

644

status = ice_aq_free_vsi(hw, vsi_ctx, keep_vsi_alloc, cd);

sys/dev/ice/ice_switch.c

646

ice_clear_vsi_ctx(hw, vsi_handle);

sys/dev/ice/ice_switch.c

660

ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.c

663

if (!ice_is_vsi_valid(hw, vsi_handle))

sys/dev/ice/ice_switch.c

665

vsi_ctx->vsi_num = ice_get_hw_vsi_num(hw, vsi_handle);

sys/dev/ice/ice_switch.c

666

return ice_aq_update_vsi(hw, vsi_ctx, cd);

sys/dev/ice/ice_switch.c

676

ice_cfg_iwarp_fltr(struct ice_hw *hw, u16 vsi_handle, bool enable)

sys/dev/ice/ice_switch.c

681

cached_ctx = ice_get_vsi_ctx(hw, vsi_handle);

sys/dev/ice/ice_switch.c

685

ctx = (struct ice_vsi_ctx *)ice_calloc(hw, 1, sizeof(*ctx));

sys/dev/ice/ice_switch.c

700

status = ice_update_vsi(hw, vsi_handle, ctx, NULL);

sys/dev/ice/ice_switch.c

706

ice_free(hw, ctx);

sys/dev/ice/ice_switch.c

719

ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.c

734

status = ice_aq_send_cmd(hw, &desc, &vsi_ctx->info,

sys/dev/ice/ice_switch.c

76

ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list)

sys/dev/ice/ice_switch.c

760

ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,

sys/dev/ice/ice_switch.c

778

mr_list = (_FORCE_ __le16 *)ice_malloc(hw, buf_size);

sys/dev/ice/ice_switch.c

791

ice_debug(hw, ICE_DBG_SW, "Error due to unsupported rule_type %u\n", rule_type);

sys/dev/ice/ice_switch.c

813

ice_debug(hw, ICE_DBG_SW, "Error VSI index (%u) out-of-range\n",

sys/dev/ice/ice_switch.c

815

ice_free(hw, mr_list);

sys/dev/ice/ice_switch.c

82

ice_calloc(hw, ICE_MAX_NUM_RECIPES, sizeof(*recps));

sys/dev/ice/ice_switch.c

838

status = ice_aq_send_cmd(hw, &desc, mr_list, buf_size, cd);

sys/dev/ice/ice_switch.c

842

ice_free(hw, mr_list);

sys/dev/ice/ice_switch.c

858

ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,

sys/dev/ice/ice_switch.c

877

return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);

sys/dev/ice/ice_switch.c

890

ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,

sys/dev/ice/ice_switch.c

900

sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);

sys/dev/ice/ice_switch.c

925

status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len, opc, NULL);

sys/dev/ice/ice_switch.c

935

ice_free(hw, sw_buf);

sys/dev/ice/ice_switch.c

949

ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,

sys/dev/ice/ice_switch.c

963

return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_switch.c

976

ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,

sys/dev/ice/ice_switch.c

984

status = ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);

sys/dev/ice/ice_switch.h

443

ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,

sys/dev/ice/ice_switch.h

447

ice_find_adv_rule_entry(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,

sys/dev/ice/ice_switch.h

452

ice_adv_add_update_vsi_list(struct ice_hw *hw,

sys/dev/ice/ice_switch.h

463

ice_aq_add_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.h

466

ice_aq_free_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.h

469

ice_aq_update_vsi(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.h

472

ice_add_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.h

475

ice_free_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.h

478

ice_update_vsi(struct ice_hw *hw, u16 vsi_handle, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.h

480

struct ice_vsi_ctx *ice_get_vsi_ctx(struct ice_hw *hw, u16 vsi_handle);

sys/dev/ice/ice_switch.h

481

void ice_clear_vsi_q_ctx(struct ice_hw *hw, u16 vsi_handle);

sys/dev/ice/ice_switch.h

482

void ice_clear_all_vsi_ctx(struct ice_hw *hw);

sys/dev/ice/ice_switch.h

484

ice_aq_get_vsi_params(struct ice_hw *hw, struct ice_vsi_ctx *vsi_ctx,

sys/dev/ice/ice_switch.h

487

ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,

sys/dev/ice/ice_switch.h

491

ice_aq_delete_mir_rule(struct ice_hw *hw, u16 rule_id, bool keep_allocd,

sys/dev/ice/ice_switch.h

494

ice_aq_get_storm_ctrl(struct ice_hw *hw, u32 *bcast_thresh, u32 *mcast_thresh,

sys/dev/ice/ice_switch.h

497

ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,

sys/dev/ice/ice_switch.h

500

int ice_get_initial_sw_cfg(struct ice_hw *hw);

sys/dev/ice/ice_switch.h

502

ice_alloc_vlan_res_counter(struct ice_hw *hw, u16 *counter_id);

sys/dev/ice/ice_switch.h

504

ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);

sys/dev/ice/ice_switch.h

506

int ice_update_sw_rule_bridge_mode(struct ice_hw *hw);

sys/dev/ice/ice_switch.h

507

int ice_alloc_rss_global_lut(struct ice_hw *hw, bool shared_res, u16 *global_lut_id);

sys/dev/ice/ice_switch.h

508

int ice_free_rss_global_lut(struct ice_hw *hw, u16 global_lut_id);

sys/dev/ice/ice_switch.h

510

ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,

sys/dev/ice/ice_switch.h

513

ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);

sys/dev/ice/ice_switch.h

515

ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,

sys/dev/ice/ice_switch.h

519

ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,

sys/dev/ice/ice_switch.h

523

ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);

sys/dev/ice/ice_switch.h

524

int ice_remove_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list);

sys/dev/ice/ice_switch.h

525

void ice_rem_all_sw_rules_info(struct ice_hw *hw);

sys/dev/ice/ice_switch.h

526

int ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);

sys/dev/ice/ice_switch.h

527

int ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);

sys/dev/ice/ice_switch.h

529

ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);

sys/dev/ice/ice_switch.h

531

ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list);

sys/dev/ice/ice_switch.h

533

ice_cfg_iwarp_fltr(struct ice_hw *hw, u16 vsi_handle, bool enable);

sys/dev/ice/ice_switch.h

536

ice_add_mac_with_sw_marker(struct ice_hw *hw, struct ice_fltr_info *f_info,

sys/dev/ice/ice_switch.h

539

ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info);

sys/dev/ice/ice_switch.h

540

void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle);

sys/dev/ice/ice_switch.h

549

ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.h

552

ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.h

555

ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.h

560

ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.h

563

ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle,

sys/dev/ice/ice_switch.h

566

int ice_replay_all_fltr(struct ice_hw *hw);

sys/dev/ice/ice_switch.h

569

ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list);

sys/dev/ice/ice_switch.h

570

u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);

sys/dev/ice/ice_switch.h

571

bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle);

sys/dev/ice/ice_switch.h

574

ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,

sys/dev/ice/ice_switch.h

576

void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw);

sys/dev/ice/ice_switch.h

577

void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw);

sys/dev/ice/ice_switch.h

579

ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,

sys/dev/ice/ice_type.h

1481

ice_is_nac_dual(struct ice_hw *hw)

sys/dev/ice/ice_type.h

1483

return !!(hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_DUAL_M);

sys/dev/ice/ice_type.h

953

struct ice_hw *hw; /* back pointer to HW instance */

sys/dev/ice/ice_vf_mbx.c

215

ice_mbx_traverse(struct ice_hw *hw,

sys/dev/ice/ice_vf_mbx.c

221

snap_buf = &hw->mbx_snapshot.mbx_buf;

sys/dev/ice/ice_vf_mbx.c

256

ice_mbx_detect_malvf(struct ice_hw *hw, struct ice_mbx_vf_info *vf_info,

sys/dev/ice/ice_vf_mbx.c

267

ice_mbx_traverse(hw, new_state);

sys/dev/ice/ice_vf_mbx.c

281

void ice_e830_mbx_vf_dec_trig(struct ice_hw *hw,

sys/dev/ice/ice_vf_mbx.c

286

wr32(hw, E830_MBX_VF_DEC_TRIG(vfid), 1);

sys/dev/ice/ice_vf_mbx.c

297

void ice_mbx_vf_clear_cnt_e830(struct ice_hw *hw, u16 vf_id)

sys/dev/ice/ice_vf_mbx.c

299

u32 reg = rd32(hw, E830_MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT(vf_id));

sys/dev/ice/ice_vf_mbx.c

301

wr32(hw, E830_MBX_VF_DEC_TRIG(vf_id), reg);

sys/dev/ice/ice_vf_mbx.c

328

ice_mbx_vf_state_handler(struct ice_hw *hw, struct ice_mbx_data *mbx_data,

sys/dev/ice/ice_vf_mbx.c

331

struct ice_mbx_snapshot *snap = &hw->mbx_snapshot;

sys/dev/ice/ice_vf_mbx.c

333

struct ice_ctl_q_info *cq = &hw->mailboxq;

sys/dev/ice/ice_vf_mbx.c

394

status = ice_mbx_detect_malvf(hw, vf_info, &new_state, &is_malvf);

sys/dev/ice/ice_vf_mbx.c

397

ice_mbx_traverse(hw, &new_state);

sys/dev/ice/ice_vf_mbx.c

403

ice_mbx_traverse(hw, &new_state);

sys/dev/ice/ice_vf_mbx.c

408

status = ice_mbx_detect_malvf(hw, vf_info, &new_state, &is_malvf);

sys/dev/ice/ice_vf_mbx.c

451

void ice_mbx_init_vf_info(struct ice_hw *hw, struct ice_mbx_vf_info *vf_info)

sys/dev/ice/ice_vf_mbx.c

453

struct ice_mbx_snapshot *snap = &hw->mbx_snapshot;

sys/dev/ice/ice_vf_mbx.c

465

void ice_mbx_init_snapshot(struct ice_hw *hw)

sys/dev/ice/ice_vf_mbx.c

467

struct ice_mbx_snapshot *snap = &hw->mbx_snapshot;

sys/dev/ice/ice_vf_mbx.c

51

ice_aq_send_msg_to_vf(struct ice_hw *hw, u16 vfid, u32 v_opcode, u32 v_retval,

sys/dev/ice/ice_vf_mbx.c

68

return ice_sq_send_cmd(hw, &hw->mailboxq, &desc, msg, msglen, cd);

sys/dev/ice/ice_vf_mbx.c

85

ice_aq_send_msg_to_pf(struct ice_hw *hw, enum virtchnl_ops v_opcode,

sys/dev/ice/ice_vf_mbx.c

98

return ice_sq_send_cmd(hw, &hw->mailboxq, &desc, msg, msglen, cd);

sys/dev/ice/ice_vf_mbx.h

49

ice_aq_send_msg_to_pf(struct ice_hw *hw, enum virtchnl_ops v_opcode,

sys/dev/ice/ice_vf_mbx.h

53

ice_aq_send_msg_to_vf(struct ice_hw *hw, u16 vfid, u32 v_opcode, u32 v_retval,

sys/dev/ice/ice_vf_mbx.h

58

void ice_e830_mbx_vf_dec_trig(struct ice_hw *hw,

sys/dev/ice/ice_vf_mbx.h

60

void ice_mbx_vf_clear_cnt_e830(struct ice_hw *hw, u16 vf_id);

sys/dev/ice/ice_vf_mbx.h

62

ice_mbx_vf_state_handler(struct ice_hw *hw, struct ice_mbx_data *mbx_data,

sys/dev/ice/ice_vf_mbx.h

65

void ice_mbx_init_vf_info(struct ice_hw *hw, struct ice_mbx_vf_info *vf_info);

sys/dev/ice/ice_vf_mbx.h

66

void ice_mbx_init_snapshot(struct ice_hw *hw);

sys/dev/ice/ice_vlan_mode.c

103

return ice_aq_send_cmd(hw, &desc, get_params, sizeof(*get_params),

sys/dev/ice/ice_vlan_mode.c

118

static bool ice_aq_is_dvm_ena(struct ice_hw *hw)

sys/dev/ice/ice_vlan_mode.c

123

status = ice_aq_get_vlan_mode(hw, &get_params);

sys/dev/ice/ice_vlan_mode.c

125

ice_debug(hw, ICE_DBG_AQ, "Failed to get VLAN mode, status %d\n",

sys/dev/ice/ice_vlan_mode.c

142

bool ice_is_dvm_ena(struct ice_hw *hw)

sys/dev/ice/ice_vlan_mode.c

144

return hw->dvm_ena;

sys/dev/ice/ice_vlan_mode.c

155

static void ice_cache_vlan_mode(struct ice_hw *hw)

sys/dev/ice/ice_vlan_mode.c

157

hw->dvm_ena = ice_aq_is_dvm_ena(hw) ? true : false;

sys/dev/ice/ice_vlan_mode.c

164

static bool ice_pkg_supports_dvm(struct ice_hw *hw)

sys/dev/ice/ice_vlan_mode.c

169

status = ice_pkg_get_supported_vlan_mode(hw, &pkg_supports_dvm);

sys/dev/ice/ice_vlan_mode.c

171

ice_debug(hw, ICE_DBG_PKG, "Failed to get supported VLAN mode, status %d\n",

sys/dev/ice/ice_vlan_mode.c

183

static bool ice_fw_supports_dvm(struct ice_hw *hw)

sys/dev/ice/ice_vlan_mode.c

191

status = ice_aq_get_vlan_mode(hw, &get_vlan_mode);

sys/dev/ice/ice_vlan_mode.c

193

ice_debug(hw, ICE_DBG_NVM, "Failed to get VLAN mode, status %d\n",

sys/dev/ice/ice_vlan_mode.c

211

static bool ice_is_dvm_supported(struct ice_hw *hw)

sys/dev/ice/ice_vlan_mode.c

213

if (!ice_pkg_supports_dvm(hw)) {

sys/dev/ice/ice_vlan_mode.c

214

ice_debug(hw, ICE_DBG_PKG, "DDP doesn't support DVM\n");

sys/dev/ice/ice_vlan_mode.c

218

if (!ice_fw_supports_dvm(hw)) {

sys/dev/ice/ice_vlan_mode.c

219

ice_debug(hw, ICE_DBG_PKG, "FW doesn't support DVM\n");

sys/dev/ice/ice_vlan_mode.c

234

ice_aq_set_vlan_mode(struct ice_hw *hw,

sys/dev/ice/ice_vlan_mode.c

260

return ice_aq_send_cmd(hw, &desc, set_params, sizeof(*set_params),

sys/dev/ice/ice_vlan_mode.c

268

static int ice_set_svm(struct ice_hw *hw)

sys/dev/ice/ice_vlan_mode.c

273

status = ice_aq_set_port_params(hw->port_info, 0, false, false, false, NULL);

sys/dev/ice/ice_vlan_mode.c

275

ice_debug(hw, ICE_DBG_INIT, "Failed to set port parameters for single VLAN mode\n");

sys/dev/ice/ice_vlan_mode.c

280

ice_malloc(hw, sizeof(*set_params));

sys/dev/ice/ice_vlan_mode.c

289

status = ice_aq_set_vlan_mode(hw, set_params);

sys/dev/ice/ice_vlan_mode.c

291

ice_debug(hw, ICE_DBG_INIT, "Failed to configure port in single VLAN mode\n");

sys/dev/ice/ice_vlan_mode.c

293

ice_free(hw, set_params);

sys/dev/ice/ice_vlan_mode.c

301

int ice_set_vlan_mode(struct ice_hw *hw)

sys/dev/ice/ice_vlan_mode.c

303

if (!ice_is_dvm_supported(hw))

sys/dev/ice/ice_vlan_mode.c

306

return ice_set_svm(hw);

sys/dev/ice/ice_vlan_mode.c

322

void ice_post_pkg_dwnld_vlan_mode_cfg(struct ice_hw *hw)

sys/dev/ice/ice_vlan_mode.c

324

ice_cache_vlan_mode(hw);

sys/dev/ice/ice_vlan_mode.c

41

ice_pkg_get_supported_vlan_mode(struct ice_hw *hw, bool *dvm)

sys/dev/ice/ice_vlan_mode.c

51

bld = ice_pkg_buf_alloc_single_section(hw,

sys/dev/ice/ice_vlan_mode.c

61

status = ice_aq_upload_section(hw,

sys/dev/ice/ice_vlan_mode.c

79

ice_pkg_buf_free(hw, bld);

sys/dev/ice/ice_vlan_mode.c

92

ice_aq_get_vlan_mode(struct ice_hw *hw,

sys/dev/ice/ice_vlan_mode.h

39

bool ice_is_dvm_ena(struct ice_hw *hw);

sys/dev/ice/ice_vlan_mode.h

40

int ice_set_vlan_mode(struct ice_hw *hw);

sys/dev/ice/ice_vlan_mode.h

41

void ice_post_pkg_dwnld_vlan_mode_cfg(struct ice_hw *hw);

sys/dev/ice/if_ice_iflib.c

1033

ice_deinit_hw(&sc->hw);

sys/dev/ice/if_ice_iflib.c

1036

status = ice_reset(&sc->hw, ICE_RESET_PFR);

sys/dev/ice/if_ice_iflib.c

1298

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

1312

oicr = rd32(hw, PFINT_OICR);

sys/dev/ice/if_ice_iflib.c

1338

reset = (rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_RESET_TYPE_M) >>

sys/dev/ice/if_ice_iflib.c

1362

hw->reset_ongoing = true;

sys/dev/ice/if_ice_iflib.c

1381

ice_log_hmc_error(hw, dev);

sys/dev/ice/if_ice_iflib.c

1773

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

1778

ice_enable_intr(hw, sc->irqvs[0].me);

sys/dev/ice/if_ice_iflib.c

1786

ice_enable_intr(hw, vsi->rx_queues[i].irqv->me);

sys/dev/ice/if_ice_iflib.c

1799

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

1813

for (i = 1; i < hw->func_caps.common_cap.num_msix_vectors; i++)

sys/dev/ice/if_ice_iflib.c

1814

ice_disable_intr(hw, i);

sys/dev/ice/if_ice_iflib.c

1831

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

1837

ice_enable_intr(hw, vsi->rx_queues[rxqid].irqv->me);

sys/dev/ice/if_ice_iflib.c

1855

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

1861

ice_enable_intr(hw, vsi->tx_queues[txqid].irqv->me);

sys/dev/ice/if_ice_iflib.c

1897

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

1911

status = ice_set_vsi_promisc(hw, sc->pf_vsi.idx,

sys/dev/ice/if_ice_iflib.c

1918

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

1922

status = ice_clear_vsi_promisc(hw, sc->pf_vsi.idx,

sys/dev/ice/if_ice_iflib.c

1929

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

1936

status = ice_set_vsi_promisc(hw, sc->pf_vsi.idx,

sys/dev/ice/if_ice_iflib.c

1944

hw->adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

1981

struct ice_link_status *li = &sc->hw.port_info->phy.link_info;

sys/dev/ice/if_ice_iflib.c

2192

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

2193

struct ice_port_info *pi = hw->port_info;

sys/dev/ice/if_ice_iflib.c

2199

if (ice_is_e830(hw) &&

sys/dev/ice/if_ice_iflib.c

2201

if (rd32(hw, GL_MNG_FWSM) & GL_MNG_FWSM_FW_LOADING_M)

sys/dev/ice/if_ice_iflib.c

2225

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

2364

ice_deinit_hw(&sc->hw);

sys/dev/ice/if_ice_iflib.c

2422

fw_mode = ice_get_fw_mode(&sc->hw);

sys/dev/ice/if_ice_iflib.c

2436

ice_print_rollback_msg(&sc->hw);

sys/dev/ice/if_ice_iflib.c

2462

if (ice_is_generic_mac(&sc->hw)) {

sys/dev/ice/if_ice_iflib.c

2497

ice_enable_intr(&sc->hw, sc->irqvs[0].me);

sys/dev/ice/if_ice_iflib.c

2513

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

2542

ice_clear_hw_tbls(hw);

sys/dev/ice/if_ice_iflib.c

2544

if (hw->port_info)

sys/dev/ice/if_ice_iflib.c

2545

ice_sched_cleanup_all(hw);

sys/dev/ice/if_ice_iflib.c

2547

ice_shutdown_all_ctrlq(hw, false);

sys/dev/ice/if_ice_iflib.c

2624

ice_enable_intr(&sc->hw, sc->irqvs[0].me);

sys/dev/ice/if_ice_iflib.c

2652

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

2675

status = ice_init_all_ctrlq(hw);

sys/dev/ice/if_ice_iflib.c

2683

status = ice_sched_query_res_alloc(hw);

sys/dev/ice/if_ice_iflib.c

2688

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

2694

if (hw->pf_id == 0)

sys/dev/ice/if_ice_iflib.c

2695

status = ice_fwlog_set(hw, &hw->fwlog_cfg);

sys/dev/ice/if_ice_iflib.c

2703

if (hw->fwlog_cfg.options & ICE_FWLOG_OPTION_IS_REGISTERED) {

sys/dev/ice/if_ice_iflib.c

2704

status = ice_fwlog_register(hw);

sys/dev/ice/if_ice_iflib.c

2708

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

2713

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

2726

status = ice_clear_pf_cfg(hw);

sys/dev/ice/if_ice_iflib.c

2735

ice_clear_pxe_mode(hw);

sys/dev/ice/if_ice_iflib.c

2737

status = ice_get_caps(hw);

sys/dev/ice/if_ice_iflib.c

2744

status = ice_sched_init_port(hw->port_info);

sys/dev/ice/if_ice_iflib.c

2753

pkg_state = ice_init_pkg(hw, hw->pkg_copy, hw->pkg_size);

sys/dev/ice/if_ice_iflib.c

2792

if (hw->port_info->qos_cfg.is_sw_lldp)

sys/dev/ice/if_ice_iflib.c

2807

ice_enable_intr(&sc->hw, sc->irqvs[0].me);

sys/dev/ice/if_ice_iflib.c

2829

if (hw->port_info->qos_cfg.is_sw_lldp)

sys/dev/ice/if_ice_iflib.c

2844

ice_sched_cleanup_all(hw);

sys/dev/ice/if_ice_iflib.c

2846

ice_shutdown_all_ctrlq(hw, false);

sys/dev/ice/if_ice_iflib.c

2866

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

2887

if ((ice_is_e830(hw) || ice_is_e825c(hw)) &&

sys/dev/ice/if_ice_iflib.c

2888

(((rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_RESET_TYPE_M) >>

sys/dev/ice/if_ice_iflib.c

2892

status = ice_check_reset(hw);

sys/dev/ice/if_ice_iflib.c

2906

sc->hw.reset_ongoing = false;

sys/dev/ice/if_ice_iflib.c

2932

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

2947

status = ice_reset(hw, ICE_RESET_PFR);

sys/dev/ice/if_ice_iflib.c

2970

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

2986

if (ice_is_e810(hw))

sys/dev/ice/if_ice_iflib.c

2989

if (ice_is_e825c(hw))

sys/dev/ice/if_ice_iflib.c

2992

if (!hw->func_caps.common_cap.rss_table_size)

sys/dev/ice/if_ice_iflib.c

2994

if (!hw->func_caps.common_cap.iwarp || !ice_enable_irdma)

sys/dev/ice/if_ice_iflib.c

2996

if (!hw->func_caps.common_cap.dcb)

sys/dev/ice/if_ice_iflib.c

2999

if (!ice_is_fw_health_report_supported(hw))

sys/dev/ice/if_ice_iflib.c

3001

if (!ice_fwlog_supported(hw))

sys/dev/ice/if_ice_iflib.c

3003

if (hw->fwlog_cfg.options & ICE_FWLOG_OPTION_IS_REGISTERED) {

sys/dev/ice/if_ice_iflib.c

3007

ice_fwlog_unregister(hw);

sys/dev/ice/if_ice_iflib.c

3021

if (hw->dev_caps.supported_sensors & ICE_SENSOR_SUPPORT_E810_INT_TEMP) {

sys/dev/ice/if_ice_iflib.c

3026

if (hw->func_caps.common_cap.next_cluster_id_support ||

sys/dev/ice/if_ice_iflib.c

3027

hw->dev_caps.common_cap.next_cluster_id_support) {

sys/dev/ice/if_ice_iflib.c

3090

ice_aq_str(sc->hw.adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

3120

ice_aq_str(sc->hw.adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

3405

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

3411

if (ice_is_e830(hw) &&

sys/dev/ice/if_ice_iflib.c

3412

(rd32(hw, GL_MNG_FWSM) & GL_MNG_FWSM_FW_LOADING_M)) {

sys/dev/ice/if_ice_iflib.c

3779

ice_debug(&sc->hw, ICE_DBG_INIT,

sys/dev/ice/if_ice_iflib.c

3782

ice_debug(&sc->hw, ICE_DBG_INIT, "(HW num: VSI %d to %d)\n",

sys/dev/ice/if_ice_iflib.c

3783

ice_get_hw_vsi_num(&sc->hw, vsi->mirror_src_vsi),

sys/dev/ice/if_ice_iflib.c

3784

ice_get_hw_vsi_num(&sc->hw, vsi->idx));

sys/dev/ice/if_ice_iflib.c

390

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

3923

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

3930

ice_debug(hw, ICE_DBG_INIT, "%s: Last rid: %d\n", __func__, sc->last_rid);

sys/dev/ice/if_ice_iflib.c

3965

ice_debug(hw, ICE_DBG_INIT, "%s: New last rid: %d\n", __func__,

sys/dev/ice/if_ice_iflib.c

416

scctx->isc_ntxqsets = hw->func_caps.common_cap.rss_table_size;

sys/dev/ice/if_ice_iflib.c

418

scctx->isc_nrxqsets = hw->func_caps.common_cap.rss_table_size;

sys/dev/ice/if_ice_iflib.c

420

scctx->isc_ntxqsets_max = hw->func_caps.common_cap.num_txq;

sys/dev/ice/if_ice_iflib.c

421

scctx->isc_nrxqsets_max = hw->func_caps.common_cap.num_rxq;

sys/dev/ice/if_ice_iflib.c

4326

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

4334

ice_enable_intr(hw, vsi->rx_queues[i].irqv->me);

sys/dev/ice/if_ice_iflib.c

4352

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

4358

ice_enable_intr(hw, vsi->rx_queues[rxqid].irqv->me);

sys/dev/ice/if_ice_iflib.c

4377

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

4383

ice_enable_intr(hw, vsi->tx_queues[txqid].irqv->me);

sys/dev/ice/if_ice_iflib.c

444

scctx->isc_rss_table_size = hw->func_caps.common_cap.rss_table_size;

sys/dev/ice/if_ice_iflib.c

484

struct ice_hw *hw;

sys/dev/ice/if_ice_iflib.c

501

hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

502

hw->back = sc;

sys/dev/ice/if_ice_iflib.c

517

ice_save_pci_info(hw, dev);

sys/dev/ice/if_ice_iflib.c

523

ice_set_ctrlq_len(hw);

sys/dev/ice/if_ice_iflib.c

527

fw_mode = ice_get_fw_mode(hw);

sys/dev/ice/if_ice_iflib.c

539

status = ice_init_hw(hw);

sys/dev/ice/if_ice_iflib.c

556

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

577

ice_deinit_hw(hw);

sys/dev/ice/if_ice_iflib.c

591

status = ice_set_vlan_mode(hw);

sys/dev/ice/if_ice_iflib.c

596

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

603

iflib_set_mac(ctx, hw->port_info->mac.lan_addr);

sys/dev/ice/if_ice_iflib.c

609

err = ice_resmgr_init(&sc->tx_qmgr, hw->func_caps.common_cap.num_txq);

sys/dev/ice/if_ice_iflib.c

617

err = ice_resmgr_init(&sc->rx_qmgr, hw->func_caps.common_cap.num_rxq);

sys/dev/ice/if_ice_iflib.c

632

hw->func_caps.guar_num_vsi);

sys/dev/ice/if_ice_iflib.c

678

ice_deinit_hw(hw);

sys/dev/ice/if_ice_iflib.c

733

struct ice_hw *hw = &sc->hw;

sys/dev/ice/if_ice_iflib.c

743

uint64_t baudrate = ice_aq_speed_to_rate(sc->hw.port_info);

sys/dev/ice/if_ice_iflib.c

745

if (!(hw->port_info->phy.link_info_old.link_info & ICE_AQ_LINK_UP))

sys/dev/ice/if_ice_iflib.c

768

ice_aq_str(hw->adminq.sq_last_status));

sys/dev/ice/if_ice_iflib.c

851

status = ice_aq_set_pfc_mode(&sc->hw, ICE_AQC_PFC_VLAN_BASED_PFC, NULL);

sys/dev/ice/if_ice_iflib.c

875

ice_enable_intr(&sc->hw, sc->irqvs[0].me);

sys/dev/ice/if_ice_iflib.c

909

ice_enable_intr(&sc->hw, sc->irqvs[0].me);

sys/dev/ichiic/ig4_iic.c

750

ig4iic_clk_params(const struct ig4_hw *hw, int speed,

sys/dev/ichiic/ig4_iic.c

775

sda_fall_time = hw->sda_fall_time == 0 ? tf_max : hw->sda_fall_time;

sys/dev/ichiic/ig4_iic.c

777

((hw->ic_clock_rate * (thigh + sda_fall_time) + 500) / 1000 - 3);

sys/dev/ichiic/ig4_iic.c

779

scl_fall_time = hw->scl_fall_time == 0 ? tf_max : hw->scl_fall_time;

sys/dev/ichiic/ig4_iic.c

781

((hw->ic_clock_rate * (tlow + scl_fall_time) + 500) / 1000 - 1);

sys/dev/ichiic/ig4_iic.c

787

if (hw->sda_hold_time != 0)

sys/dev/ichiic/ig4_iic.c

789

((hw->ic_clock_rate * hw->sda_hold_time + 500) / 1000);

sys/dev/ichiic/ig4_iic.c

829

const struct ig4_hw *hw;

sys/dev/ichiic/ig4_iic.c

862

hw = &ig4iic_hw[sc->version];

sys/dev/ichiic/ig4_iic.c

864

ig4iic_clk_params(hw, IG4_CTL_SPEED_STD, &sc->cfg.ss_scl_hcnt,

sys/dev/ichiic/ig4_iic.c

866

ig4iic_clk_params(hw, IG4_CTL_SPEED_FAST, &sc->cfg.fs_scl_hcnt,

sys/dev/ichiic/ig4_iic.c

868

if (hw->txfifo_depth != 0)

sys/dev/ichiic/ig4_iic.c

869

sc->cfg.txfifo_depth = hw->txfifo_depth;

sys/dev/ichiic/ig4_iic.c

870

if (hw->rxfifo_depth != 0)

sys/dev/ichiic/ig4_iic.c

871

sc->cfg.rxfifo_depth = hw->rxfifo_depth;

sys/dev/igc/if_igc.c

1023

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

1072

IGC_WRITE_REG(hw, IGC_EITR(que->msix), que->eitr_setting);

sys/dev/igc/if_igc.c

1085

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

1091

reg_icr = IGC_READ_REG(hw, IGC_ICR);

sys/dev/igc/if_igc.c

1130

IGC_WRITE_REG(&sc->hw, IGC_EIMS, rxq->eims);

sys/dev/igc/if_igc.c

1140

IGC_WRITE_REG(&sc->hw, IGC_EIMS, txq->eims);

sys/dev/igc/if_igc.c

1175

MPASS(sc->hw.back != NULL);

sys/dev/igc/if_igc.c

1176

reg_icr = IGC_READ_REG(&sc->hw, IGC_ICR);

sys/dev/igc/if_igc.c

1185

IGC_WRITE_REG(&sc->hw, IGC_IMS, IGC_IMS_LSC);

sys/dev/igc/if_igc.c

1186

IGC_WRITE_REG(&sc->hw, IGC_EIMS, sc->link_mask);

sys/dev/igc/if_igc.c

1197

sc->hw.mac.get_link_status = true;

sys/dev/igc/if_igc.c

1267

sc->hw.mac.autoneg = DO_AUTO_NEG;

sys/dev/igc/if_igc.c

1271

sc->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;

sys/dev/igc/if_igc.c

1274

sc->hw.phy.autoneg_advertised = ADVERTISE_2500_FULL;

sys/dev/igc/if_igc.c

1277

sc->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;

sys/dev/igc/if_igc.c

1281

sc->hw.phy.autoneg_advertised = ADVERTISE_100_FULL;

sys/dev/igc/if_igc.c

1283

sc->hw.phy.autoneg_advertised = ADVERTISE_100_HALF;

sys/dev/igc/if_igc.c

1287

sc->hw.phy.autoneg_advertised = ADVERTISE_10_FULL;

sys/dev/igc/if_igc.c

1289

sc->hw.phy.autoneg_advertised = ADVERTISE_10_HALF;

sys/dev/igc/if_igc.c

1308

reg_rctl = IGC_READ_REG(&sc->hw, IGC_RCTL);

sys/dev/igc/if_igc.c

1318

IGC_WRITE_REG(&sc->hw, IGC_RCTL, reg_rctl);

sys/dev/igc/if_igc.c

1325

IGC_WRITE_REG(&sc->hw, IGC_RCTL, reg_rctl);

sys/dev/igc/if_igc.c

1329

IGC_WRITE_REG(&sc->hw, IGC_RCTL, reg_rctl);

sys/dev/igc/if_igc.c

1370

reg_rctl = IGC_READ_REG(&sc->hw, IGC_RCTL);

sys/dev/igc/if_igc.c

1385

igc_update_mc_addr_list(&sc->hw, mta, mcnt);

sys/dev/igc/if_igc.c

1387

IGC_WRITE_REG(&sc->hw, IGC_RCTL, reg_rctl);

sys/dev/igc/if_igc.c

1412

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

1418

switch (hw->phy.media_type) {

sys/dev/igc/if_igc.c

1420

if (hw->mac.get_link_status == true) {

sys/dev/igc/if_igc.c

1422

igc_check_for_link(hw);

sys/dev/igc/if_igc.c

1423

link_check = !hw->mac.get_link_status;

sys/dev/igc/if_igc.c

1428

igc_check_for_link(hw);

sys/dev/igc/if_igc.c

1429

link_check = !hw->mac.get_link_status;

sys/dev/igc/if_igc.c

1437

igc_get_speed_and_duplex(hw, &sc->link_speed,

sys/dev/igc/if_igc.c

1481

igc_reset_hw(&sc->hw);

sys/dev/igc/if_igc.c

1482

IGC_WRITE_REG(&sc->hw, IGC_WUC, 0);

sys/dev/igc/if_igc.c

1497

sc->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);

sys/dev/igc/if_igc.c

1500

sc->hw.vendor_id = pci_get_vendor(dev);

sys/dev/igc/if_igc.c

1501

sc->hw.device_id = pci_get_device(dev);

sys/dev/igc/if_igc.c

1502

sc->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1);

sys/dev/igc/if_igc.c

1503

sc->hw.subsystem_vendor_id =

sys/dev/igc/if_igc.c

1505

sc->hw.subsystem_device_id =

sys/dev/igc/if_igc.c

1509

if (igc_set_mac_type(&sc->hw)) {

sys/dev/igc/if_igc.c

1533

if (!igc_is_device_id_i226(&sc->hw))

sys/dev/igc/if_igc.c

1562

sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle;

sys/dev/igc/if_igc.c

1564

sc->hw.back = &sc->osdep;

sys/dev/igc/if_igc.c

1651

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

1657

IGC_WRITE_REG(hw, IGC_GPIE,

sys/dev/igc/if_igc.c

1665

ivar = IGC_READ_REG_ARRAY(hw, IGC_IVAR0, index);

sys/dev/igc/if_igc.c

1674

IGC_WRITE_REG_ARRAY(hw, IGC_IVAR0, index, ivar);

sys/dev/igc/if_igc.c

1679

ivar = IGC_READ_REG_ARRAY(hw, IGC_IVAR0, index);

sys/dev/igc/if_igc.c

1688

IGC_WRITE_REG_ARRAY(hw, IGC_IVAR0, index, ivar);

sys/dev/igc/if_igc.c

1695

IGC_WRITE_REG(hw, IGC_IVAR_MISC, ivar);

sys/dev/igc/if_igc.c

1703

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

1713

IGC_WRITE_REG(hw, IGC_EITR(rx_que->msix),

sys/dev/igc/if_igc.c

1768

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

1777

IGC_WRITE_REG(hw, IGC_DMACR, reg);

sys/dev/igc/if_igc.c

1783

IGC_WRITE_REG(hw, IGC_DMCTXTH, 0);

sys/dev/igc/if_igc.c

1788

reg = IGC_READ_REG(hw, IGC_FCRTC);

sys/dev/igc/if_igc.c

1792

IGC_WRITE_REG(hw, IGC_FCRTC, reg);

sys/dev/igc/if_igc.c

1797

reg = IGC_READ_REG(hw, IGC_DMACR);

sys/dev/igc/if_igc.c

1811

status = IGC_READ_REG(hw, IGC_STATUS);

sys/dev/igc/if_igc.c

1818

IGC_WRITE_REG(hw, IGC_DMACR, reg);

sys/dev/igc/if_igc.c

1820

IGC_WRITE_REG(hw, IGC_DMCRTRH, 0);

sys/dev/igc/if_igc.c

1823

reg = IGC_READ_REG(hw, IGC_DMCTLX);

sys/dev/igc/if_igc.c

1830

status = IGC_READ_REG(hw, IGC_STATUS);

sys/dev/igc/if_igc.c

1837

IGC_WRITE_REG(hw, IGC_DMCTLX, reg);

sys/dev/igc/if_igc.c

1840

IGC_WRITE_REG(hw, IGC_DMCTXTH, (IGC_TXPBSIZE -

sys/dev/igc/if_igc.c

1844

reg = IGC_READ_REG(hw, IGC_PCIEMISC);

sys/dev/igc/if_igc.c

1846

IGC_WRITE_REG(hw, IGC_PCIEMISC, reg);

sys/dev/igc/if_igc.c

1860

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

1893

hw->fc.high_water = rx_buffer_size -

sys/dev/igc/if_igc.c

1894

roundup2(sc->hw.mac.max_frame_size, 1024);

sys/dev/igc/if_igc.c

1896

hw->fc.low_water = hw->fc.high_water - 16;

sys/dev/igc/if_igc.c

1899

hw->fc.requested_mode = sc->fc;

sys/dev/igc/if_igc.c

1901

hw->fc.requested_mode = igc_fc_full;

sys/dev/igc/if_igc.c

1903

hw->fc.pause_time = IGC_FC_PAUSE_TIME;

sys/dev/igc/if_igc.c

1905

hw->fc.send_xon = true;

sys/dev/igc/if_igc.c

1908

igc_reset_hw(hw);

sys/dev/igc/if_igc.c

1909

IGC_WRITE_REG(hw, IGC_WUC, 0);

sys/dev/igc/if_igc.c

1912

if (igc_init_hw(hw) < 0) {

sys/dev/igc/if_igc.c

1923

IGC_WRITE_REG(hw, IGC_VET, ETHERTYPE_VLAN);

sys/dev/igc/if_igc.c

1924

igc_get_phy_info(hw);

sys/dev/igc/if_igc.c

1925

igc_check_for_link(hw);

sys/dev/igc/if_igc.c

1937

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

1988

IGC_WRITE_REG(hw, IGC_RETA(i >> 2), reta);

sys/dev/igc/if_igc.c

2004

IGC_WRITE_REG_ARRAY(hw, IGC_RSSRK(0), i, rss_key[i]);

sys/dev/igc/if_igc.c

2018

IGC_WRITE_REG(hw, IGC_MRQC, mrqc);

sys/dev/igc/if_igc.c

2203

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

2222

IGC_WRITE_REG(hw, IGC_TDLEN(i),

sys/dev/igc/if_igc.c

2224

IGC_WRITE_REG(hw, IGC_TDBAH(i),

sys/dev/igc/if_igc.c

2226

IGC_WRITE_REG(hw, IGC_TDBAL(i),

sys/dev/igc/if_igc.c

2229

IGC_WRITE_REG(hw, IGC_TDT(i), 0);

sys/dev/igc/if_igc.c

2230

IGC_WRITE_REG(hw, IGC_TDH(i), 0);

sys/dev/igc/if_igc.c

2233

IGC_READ_REG(&sc->hw, IGC_TDBAL(i)),

sys/dev/igc/if_igc.c

2234

IGC_READ_REG(&sc->hw, IGC_TDLEN(i)));

sys/dev/igc/if_igc.c

2244

IGC_WRITE_REG(hw, IGC_TXDCTL(i), txdctl);

sys/dev/igc/if_igc.c

2248

tctl = IGC_READ_REG(&sc->hw, IGC_TCTL);

sys/dev/igc/if_igc.c

2254

IGC_WRITE_REG(&sc->hw, IGC_TCTL, tctl);

sys/dev/igc/if_igc.c

2270

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

2281

rctl = IGC_READ_REG(hw, IGC_RCTL);

sys/dev/igc/if_igc.c

2282

IGC_WRITE_REG(hw, IGC_RCTL, rctl & ~IGC_RCTL_EN);

sys/dev/igc/if_igc.c

2288

(hw->mac.mc_filter_type << IGC_RCTL_MO_SHIFT);

sys/dev/igc/if_igc.c

2303

rxcsum = IGC_READ_REG(hw, IGC_RXCSUM);

sys/dev/igc/if_igc.c

2316

IGC_WRITE_REG(hw, IGC_RXCSUM, rxcsum);

sys/dev/igc/if_igc.c

2326

IGC_WRITE_REG(&sc->hw, IGC_RLPML, psize);

sys/dev/igc/if_igc.c

2360

IGC_WRITE_REG(hw, IGC_RDLEN(i),

sys/dev/igc/if_igc.c

2362

IGC_WRITE_REG(hw, IGC_RDBAH(i), (uint32_t)(bus_addr >> 32));

sys/dev/igc/if_igc.c

2363

IGC_WRITE_REG(hw, IGC_RDBAL(i), (uint32_t)bus_addr);

sys/dev/igc/if_igc.c

2364

IGC_WRITE_REG(hw, IGC_SRRCTL(i), srrctl);

sys/dev/igc/if_igc.c

2366

IGC_WRITE_REG(hw, IGC_RDH(i), 0);

sys/dev/igc/if_igc.c

2367

IGC_WRITE_REG(hw, IGC_RDT(i), 0);

sys/dev/igc/if_igc.c

2369

rxdctl = IGC_READ_REG(hw, IGC_RXDCTL(i));

sys/dev/igc/if_igc.c

2375

IGC_WRITE_REG(hw, IGC_RXDCTL(i), rxdctl);

sys/dev/igc/if_igc.c

2382

IGC_WRITE_REG(hw, IGC_RCTL, rctl);

sys/dev/igc/if_igc.c

2391

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

2399

reg = IGC_READ_REG(hw, IGC_CTRL);

sys/dev/igc/if_igc.c

2401

IGC_WRITE_REG(hw, IGC_CTRL, reg);

sys/dev/igc/if_igc.c

2403

reg = IGC_READ_REG(hw, IGC_CTRL);

sys/dev/igc/if_igc.c

2405

IGC_WRITE_REG(hw, IGC_CTRL, reg);

sys/dev/igc/if_igc.c

2413

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

2418

IGC_WRITE_REG(hw, IGC_EIAC, mask);

sys/dev/igc/if_igc.c

2419

IGC_WRITE_REG(hw, IGC_EIAM, mask);

sys/dev/igc/if_igc.c

2420

IGC_WRITE_REG(hw, IGC_EIMS, mask);

sys/dev/igc/if_igc.c

2421

IGC_WRITE_REG(hw, IGC_IMS, IGC_IMS_LSC);

sys/dev/igc/if_igc.c

2423

IGC_WRITE_REG(hw, IGC_IMS, IMS_ENABLE_MASK);

sys/dev/igc/if_igc.c

2424

IGC_WRITE_FLUSH(hw);

sys/dev/igc/if_igc.c

2431

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

2434

IGC_WRITE_REG(hw, IGC_EIMC, 0xffffffff);

sys/dev/igc/if_igc.c

2435

IGC_WRITE_REG(hw, IGC_EIAC, 0);

sys/dev/igc/if_igc.c

2437

IGC_WRITE_REG(hw, IGC_IMC, 0xffffffff);

sys/dev/igc/if_igc.c

2438

IGC_WRITE_FLUSH(hw);

sys/dev/igc/if_igc.c

2455

ctrl_ext = IGC_READ_REG(&sc->hw, IGC_CTRL_EXT);

sys/dev/igc/if_igc.c

2456

IGC_WRITE_REG(&sc->hw, IGC_CTRL_EXT,

sys/dev/igc/if_igc.c

2471

ctrl_ext = IGC_READ_REG(&sc->hw, IGC_CTRL_EXT);

sys/dev/igc/if_igc.c

2472

IGC_WRITE_REG(&sc->hw, IGC_CTRL_EXT,

sys/dev/igc/if_igc.c

2501

eeprom_data = IGC_READ_REG(&sc->hw, IGC_WUC);

sys/dev/igc/if_igc.c

2536

rctl = IGC_READ_REG(&sc->hw, IGC_RCTL);

sys/dev/igc/if_igc.c

2538

IGC_WRITE_REG(&sc->hw, IGC_RCTL, rctl);

sys/dev/igc/if_igc.c

2545

ctrl = IGC_READ_REG(&sc->hw, IGC_CTRL);

sys/dev/igc/if_igc.c

2547

IGC_WRITE_REG(&sc->hw, IGC_CTRL, ctrl);

sys/dev/igc/if_igc.c

2550

IGC_WRITE_REG(&sc->hw, IGC_WUC, IGC_WUC_PME_EN);

sys/dev/igc/if_igc.c

2551

IGC_WRITE_REG(&sc->hw, IGC_WUFC, sc->wol);

sys/dev/igc/if_igc.c

2570

sc->stats.crcerrs += IGC_READ_REG(&sc->hw, IGC_CRCERRS);

sys/dev/igc/if_igc.c

2571

sc->stats.mpc += IGC_READ_REG(&sc->hw, IGC_MPC);

sys/dev/igc/if_igc.c

2572

sc->stats.scc += IGC_READ_REG(&sc->hw, IGC_SCC);

sys/dev/igc/if_igc.c

2573

sc->stats.ecol += IGC_READ_REG(&sc->hw, IGC_ECOL);

sys/dev/igc/if_igc.c

2575

sc->stats.mcc += IGC_READ_REG(&sc->hw, IGC_MCC);

sys/dev/igc/if_igc.c

2576

sc->stats.latecol += IGC_READ_REG(&sc->hw, IGC_LATECOL);

sys/dev/igc/if_igc.c

2577

sc->stats.colc += IGC_READ_REG(&sc->hw, IGC_COLC);

sys/dev/igc/if_igc.c

2578

sc->stats.colc += IGC_READ_REG(&sc->hw, IGC_RERC);

sys/dev/igc/if_igc.c

2579

sc->stats.dc += IGC_READ_REG(&sc->hw, IGC_DC);

sys/dev/igc/if_igc.c

2580

sc->stats.rlec += IGC_READ_REG(&sc->hw, IGC_RLEC);

sys/dev/igc/if_igc.c

2581

sc->stats.xonrxc += IGC_READ_REG(&sc->hw, IGC_XONRXC);

sys/dev/igc/if_igc.c

2582

sc->stats.xontxc += IGC_READ_REG(&sc->hw, IGC_XONTXC);

sys/dev/igc/if_igc.c

2583

sc->stats.xoffrxc += IGC_READ_REG(&sc->hw, IGC_XOFFRXC);

sys/dev/igc/if_igc.c

2590

sc->stats.xofftxc += IGC_READ_REG(&sc->hw, IGC_XOFFTXC);

sys/dev/igc/if_igc.c

2591

sc->stats.fcruc += IGC_READ_REG(&sc->hw, IGC_FCRUC);

sys/dev/igc/if_igc.c

2592

sc->stats.prc64 += IGC_READ_REG(&sc->hw, IGC_PRC64);

sys/dev/igc/if_igc.c

2593

sc->stats.prc127 += IGC_READ_REG(&sc->hw, IGC_PRC127);

sys/dev/igc/if_igc.c

2594

sc->stats.prc255 += IGC_READ_REG(&sc->hw, IGC_PRC255);

sys/dev/igc/if_igc.c

2595

sc->stats.prc511 += IGC_READ_REG(&sc->hw, IGC_PRC511);

sys/dev/igc/if_igc.c

2596

sc->stats.prc1023 += IGC_READ_REG(&sc->hw, IGC_PRC1023);

sys/dev/igc/if_igc.c

2597

sc->stats.prc1522 += IGC_READ_REG(&sc->hw, IGC_PRC1522);

sys/dev/igc/if_igc.c

2598

sc->stats.tlpic += IGC_READ_REG(&sc->hw, IGC_TLPIC);

sys/dev/igc/if_igc.c

2599

sc->stats.rlpic += IGC_READ_REG(&sc->hw, IGC_RLPIC);

sys/dev/igc/if_igc.c

2600

sc->stats.gprc += IGC_READ_REG(&sc->hw, IGC_GPRC);

sys/dev/igc/if_igc.c

2601

sc->stats.bprc += IGC_READ_REG(&sc->hw, IGC_BPRC);

sys/dev/igc/if_igc.c

2602

sc->stats.mprc += IGC_READ_REG(&sc->hw, IGC_MPRC);

sys/dev/igc/if_igc.c

2603

sc->stats.gptc += IGC_READ_REG(&sc->hw, IGC_GPTC);

sys/dev/igc/if_igc.c

2608

sc->stats.gorc += IGC_READ_REG(&sc->hw, IGC_GORCL) +

sys/dev/igc/if_igc.c

2609

((u64)IGC_READ_REG(&sc->hw, IGC_GORCH) << 32);

sys/dev/igc/if_igc.c

2610

sc->stats.gotc += IGC_READ_REG(&sc->hw, IGC_GOTCL) +

sys/dev/igc/if_igc.c

2611

((u64)IGC_READ_REG(&sc->hw, IGC_GOTCH) << 32);

sys/dev/igc/if_igc.c

2613

sc->stats.rnbc += IGC_READ_REG(&sc->hw, IGC_RNBC);

sys/dev/igc/if_igc.c

2614

sc->stats.ruc += IGC_READ_REG(&sc->hw, IGC_RUC);

sys/dev/igc/if_igc.c

2615

sc->stats.rfc += IGC_READ_REG(&sc->hw, IGC_RFC);

sys/dev/igc/if_igc.c

2616

sc->stats.roc += IGC_READ_REG(&sc->hw, IGC_ROC);

sys/dev/igc/if_igc.c

2617

sc->stats.rjc += IGC_READ_REG(&sc->hw, IGC_RJC);

sys/dev/igc/if_igc.c

2619

sc->stats.mgprc += IGC_READ_REG(&sc->hw, IGC_MGTPRC);

sys/dev/igc/if_igc.c

2620

sc->stats.mgpdc += IGC_READ_REG(&sc->hw, IGC_MGTPDC);

sys/dev/igc/if_igc.c

2621

sc->stats.mgptc += IGC_READ_REG(&sc->hw, IGC_MGTPTC);

sys/dev/igc/if_igc.c

2623

sc->stats.tor += IGC_READ_REG(&sc->hw, IGC_TORH);

sys/dev/igc/if_igc.c

2624

sc->stats.tot += IGC_READ_REG(&sc->hw, IGC_TOTH);

sys/dev/igc/if_igc.c

2626

sc->stats.tpr += IGC_READ_REG(&sc->hw, IGC_TPR);

sys/dev/igc/if_igc.c

2627

sc->stats.tpt += IGC_READ_REG(&sc->hw, IGC_TPT);

sys/dev/igc/if_igc.c

2628

sc->stats.ptc64 += IGC_READ_REG(&sc->hw, IGC_PTC64);

sys/dev/igc/if_igc.c

2629

sc->stats.ptc127 += IGC_READ_REG(&sc->hw, IGC_PTC127);

sys/dev/igc/if_igc.c

2630

sc->stats.ptc255 += IGC_READ_REG(&sc->hw, IGC_PTC255);

sys/dev/igc/if_igc.c

2631

sc->stats.ptc511 += IGC_READ_REG(&sc->hw, IGC_PTC511);

sys/dev/igc/if_igc.c

2632

sc->stats.ptc1023 += IGC_READ_REG(&sc->hw, IGC_PTC1023);

sys/dev/igc/if_igc.c

2633

sc->stats.ptc1522 += IGC_READ_REG(&sc->hw, IGC_PTC1522);

sys/dev/igc/if_igc.c

2634

sc->stats.mptc += IGC_READ_REG(&sc->hw, IGC_MPTC);

sys/dev/igc/if_igc.c

2635

sc->stats.bptc += IGC_READ_REG(&sc->hw, IGC_BPTC);

sys/dev/igc/if_igc.c

2638

sc->stats.iac += IGC_READ_REG(&sc->hw, IGC_IAC);

sys/dev/igc/if_igc.c

2639

sc->stats.rxdmtc += IGC_READ_REG(&sc->hw, IGC_RXDMTC);

sys/dev/igc/if_igc.c

2641

sc->stats.algnerrc += IGC_READ_REG(&sc->hw, IGC_ALGNERRC);

sys/dev/igc/if_igc.c

2642

sc->stats.tncrs += IGC_READ_REG(&sc->hw, IGC_TNCRS);

sys/dev/igc/if_igc.c

2643

sc->stats.htdpmc += IGC_READ_REG(&sc->hw, IGC_HTDPMC);

sys/dev/igc/if_igc.c

2644

sc->stats.tsctc += IGC_READ_REG(&sc->hw, IGC_TSCTC);

sys/dev/igc/if_igc.c

2695

val = IGC_READ_REG(&sc->hw, oidp->oid_arg2);

sys/dev/igc/if_igc.c

2705

struct igc_hw *hw;

sys/dev/igc/if_igc.c

2713

hw = &tque->sc->hw;

sys/dev/igc/if_igc.c

2714

reg = IGC_READ_REG(hw, IGC_EITR(tque->msix));

sys/dev/igc/if_igc.c

2717

hw = &rque->sc->hw;

sys/dev/igc/if_igc.c

2718

reg = IGC_READ_REG(hw, IGC_EITR(rque->msix));

sys/dev/igc/if_igc.c

2776

CTLFLAG_RD, &sc->hw.fc.high_water, 0,

sys/dev/igc/if_igc.c

2779

CTLFLAG_RD, &sc->hw.fc.low_water, 0,

sys/dev/igc/if_igc.c

3004

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

3009

igc_get_fw_version(hw, fw_ver);

sys/dev/igc/if_igc.c

3136

igc_read_nvm(&sc->hw, i, 1, &eeprom_data);

sys/dev/igc/if_igc.c

3167

val = IGC_READ_REG(&sc->hw, reg);

sys/dev/igc/if_igc.c

3175

IGC_WRITE_REG(&sc->hw, reg, val);

sys/dev/igc/if_igc.c

3207

sc->hw.fc.requested_mode = input;

sys/dev/igc/if_igc.c

321

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

3215

sc->hw.fc.current_mode = sc->hw.fc.requested_mode;

sys/dev/igc/if_igc.c

3216

igc_force_mac_fc(&sc->hw);

sys/dev/igc/if_igc.c

3280

value = sc->hw.dev_spec._i225.eee_disable;

sys/dev/igc/if_igc.c

3285

sc->hw.dev_spec._i225.eee_disable = (value != 0);

sys/dev/igc/if_igc.c

3360

IGC_READ_REG(&sc->hw, IGC_TDH(i)),

sys/dev/igc/if_igc.c

3361

IGC_READ_REG(&sc->hw, IGC_TDT(i)));

sys/dev/igc/if_igc.c

3367

IGC_READ_REG(&sc->hw, IGC_RDH(j)),

sys/dev/igc/if_igc.c

3368

IGC_READ_REG(&sc->hw, IGC_RDT(j)));

sys/dev/igc/if_igc.c

344

regs_buff[0] = IGC_READ_REG(hw, IGC_CTRL);

sys/dev/igc/if_igc.c

345

regs_buff[1] = IGC_READ_REG(hw, IGC_STATUS);

sys/dev/igc/if_igc.c

346

regs_buff[2] = IGC_READ_REG(hw, IGC_CTRL_EXT);

sys/dev/igc/if_igc.c

347

regs_buff[3] = IGC_READ_REG(hw, IGC_ICR);

sys/dev/igc/if_igc.c

348

regs_buff[4] = IGC_READ_REG(hw, IGC_RCTL);

sys/dev/igc/if_igc.c

349

regs_buff[5] = IGC_READ_REG(hw, IGC_RDLEN(0));

sys/dev/igc/if_igc.c

350

regs_buff[6] = IGC_READ_REG(hw, IGC_RDH(0));

sys/dev/igc/if_igc.c

351

regs_buff[7] = IGC_READ_REG(hw, IGC_RDT(0));

sys/dev/igc/if_igc.c

352

regs_buff[8] = IGC_READ_REG(hw, IGC_RXDCTL(0));

sys/dev/igc/if_igc.c

353

regs_buff[9] = IGC_READ_REG(hw, IGC_RDBAL(0));

sys/dev/igc/if_igc.c

354

regs_buff[10] = IGC_READ_REG(hw, IGC_RDBAH(0));

sys/dev/igc/if_igc.c

355

regs_buff[11] = IGC_READ_REG(hw, IGC_TCTL);

sys/dev/igc/if_igc.c

356

regs_buff[12] = IGC_READ_REG(hw, IGC_TDBAL(0));

sys/dev/igc/if_igc.c

357

regs_buff[13] = IGC_READ_REG(hw, IGC_TDBAH(0));

sys/dev/igc/if_igc.c

358

regs_buff[14] = IGC_READ_REG(hw, IGC_TDLEN(0));

sys/dev/igc/if_igc.c

359

regs_buff[15] = IGC_READ_REG(hw, IGC_TDH(0));

sys/dev/igc/if_igc.c

360

regs_buff[16] = IGC_READ_REG(hw, IGC_TDT(0));

sys/dev/igc/if_igc.c

361

regs_buff[17] = IGC_READ_REG(hw, IGC_TXDCTL(0));

sys/dev/igc/if_igc.c

467

struct igc_hw *hw;

sys/dev/igc/if_igc.c

485

hw = &sc->hw;

sys/dev/igc/if_igc.c

604

error = igc_setup_init_funcs(hw, true);

sys/dev/igc/if_igc.c

613

igc_get_bus_info(hw);

sys/dev/igc/if_igc.c

615

hw->mac.autoneg = DO_AUTO_NEG;

sys/dev/igc/if_igc.c

616

hw->phy.autoneg_wait_to_complete = false;

sys/dev/igc/if_igc.c

617

hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;

sys/dev/igc/if_igc.c

620

if (hw->phy.media_type == igc_media_type_copper) {

sys/dev/igc/if_igc.c

621

hw->phy.mdix = AUTO_ALL_MODES;

sys/dev/igc/if_igc.c

628

scctx->isc_max_frame_size = sc->hw.mac.max_frame_size =

sys/dev/igc/if_igc.c

642

if (igc_check_reset_block(hw))

sys/dev/igc/if_igc.c

647

sc->hw.dev_spec._i225.eee_disable = igc_eee_setting;

sys/dev/igc/if_igc.c

660

igc_reset_hw(hw);

sys/dev/igc/if_igc.c

663

if (igc_validate_nvm_checksum(hw) < 0) {

sys/dev/igc/if_igc.c

669

if (igc_validate_nvm_checksum(hw) < 0) {

sys/dev/igc/if_igc.c

678

if (igc_read_mac_addr(hw) < 0) {

sys/dev/igc/if_igc.c

685

if (!igc_is_valid_ether_addr(hw->mac.addr)) {

sys/dev/igc/if_igc.c

706

iflib_set_mac(ctx, hw->mac.addr);

sys/dev/igc/if_igc.c

723

struct igc_hw *hw = &sc->hw;

sys/dev/igc/if_igc.c

736

hw->mac.get_link_status = true;

sys/dev/igc/if_igc.c

772

igc_phy_hw_reset(&sc->hw);

sys/dev/igc/if_igc.c

835

scctx->isc_max_frame_size = sc->hw.mac.max_frame_size =

sys/dev/igc/if_igc.c

861

bcopy(if_getlladdr(ifp), sc->hw.mac.addr,

sys/dev/igc/if_igc.c

865

igc_rar_set(&sc->hw, sc->hw.mac.addr, 0);

sys/dev/igc/if_igc.c

886

IGC_WRITE_REG(&sc->hw, IGC_VET, ETHERTYPE_VLAN);

sys/dev/igc/if_igc.c

902

igc_clear_hw_cntrs_base_generic(&sc->hw);

sys/dev/igc/if_igc.c

909

IGC_READ_REG(&sc->hw, IGC_ICR);

sys/dev/igc/if_igc.c

910

IGC_WRITE_REG(&sc->hw, IGC_ICS, IGC_ICS_LSC);

sys/dev/igc/if_igc.c

916

igc_set_eee_i225(&sc->hw, true, true, true);

sys/dev/igc/if_igc.h

343

struct igc_hw hw;

sys/dev/igc/igc_api.c

104

switch (hw->device_id) {

sys/dev/igc/igc_api.c

144

s32 igc_setup_init_funcs(struct igc_hw *hw, bool init_device)

sys/dev/igc/igc_api.c

149

ret_val = igc_set_mac_type(hw);

sys/dev/igc/igc_api.c

155

if (!hw->hw_addr) {

sys/dev/igc/igc_api.c

165

igc_init_mac_ops_generic(hw);

sys/dev/igc/igc_api.c

166

igc_init_phy_ops_generic(hw);

sys/dev/igc/igc_api.c

167

igc_init_nvm_ops_generic(hw);

sys/dev/igc/igc_api.c

17

s32 igc_init_mac_params(struct igc_hw *hw)

sys/dev/igc/igc_api.c

174

switch (hw->mac.type) {

sys/dev/igc/igc_api.c

176

igc_init_function_pointers_i225(hw);

sys/dev/igc/igc_api.c

189

ret_val = igc_init_mac_params(hw);

sys/dev/igc/igc_api.c

193

ret_val = igc_init_nvm_params(hw);

sys/dev/igc/igc_api.c

197

ret_val = igc_init_phy_params(hw);

sys/dev/igc/igc_api.c

21

if (hw->mac.ops.init_params) {

sys/dev/igc/igc_api.c

214

s32 igc_get_bus_info(struct igc_hw *hw)

sys/dev/igc/igc_api.c

216

if (hw->mac.ops.get_bus_info)

sys/dev/igc/igc_api.c

217

return hw->mac.ops.get_bus_info(hw);

sys/dev/igc/igc_api.c

22

ret_val = hw->mac.ops.init_params(hw);

sys/dev/igc/igc_api.c

229

void igc_clear_vfta(struct igc_hw *hw)

sys/dev/igc/igc_api.c

231

if (hw->mac.ops.clear_vfta)

sys/dev/igc/igc_api.c

232

hw->mac.ops.clear_vfta(hw);

sys/dev/igc/igc_api.c

244

void igc_write_vfta(struct igc_hw *hw, u32 offset, u32 value)

sys/dev/igc/igc_api.c

246

if (hw->mac.ops.write_vfta)

sys/dev/igc/igc_api.c

247

hw->mac.ops.write_vfta(hw, offset, value);

sys/dev/igc/igc_api.c

259

void igc_update_mc_addr_list(struct igc_hw *hw, u8 *mc_addr_list,

sys/dev/igc/igc_api.c

262

if (hw->mac.ops.update_mc_addr_list)

sys/dev/igc/igc_api.c

263

hw->mac.ops.update_mc_addr_list(hw, mc_addr_list,

sys/dev/igc/igc_api.c

275

s32 igc_force_mac_fc(struct igc_hw *hw)

sys/dev/igc/igc_api.c

277

return igc_force_mac_fc_generic(hw);

sys/dev/igc/igc_api.c

288

s32 igc_check_for_link(struct igc_hw *hw)

sys/dev/igc/igc_api.c

290

if (hw->mac.ops.check_for_link)

sys/dev/igc/igc_api.c

291

return hw->mac.ops.check_for_link(hw);

sys/dev/igc/igc_api.c

303

s32 igc_reset_hw(struct igc_hw *hw)

sys/dev/igc/igc_api.c

305

if (hw->mac.ops.reset_hw)

sys/dev/igc/igc_api.c

306

return hw->mac.ops.reset_hw(hw);

sys/dev/igc/igc_api.c

318

s32 igc_init_hw(struct igc_hw *hw)

sys/dev/igc/igc_api.c

320

if (hw->mac.ops.init_hw)

sys/dev/igc/igc_api.c

321

return hw->mac.ops.init_hw(hw);

sys/dev/igc/igc_api.c

334

s32 igc_setup_link(struct igc_hw *hw)

sys/dev/igc/igc_api.c

336

if (hw->mac.ops.setup_link)

sys/dev/igc/igc_api.c

337

return hw->mac.ops.setup_link(hw);

sys/dev/igc/igc_api.c

352

s32 igc_get_speed_and_duplex(struct igc_hw *hw, u16 *speed, u16 *duplex)

sys/dev/igc/igc_api.c

354

if (hw->mac.ops.get_link_up_info)

sys/dev/igc/igc_api.c

355

return hw->mac.ops.get_link_up_info(hw, speed, duplex);

sys/dev/igc/igc_api.c

368

s32 igc_disable_pcie_master(struct igc_hw *hw)

sys/dev/igc/igc_api.c

370

return igc_disable_pcie_master_generic(hw);

sys/dev/igc/igc_api.c

380

void igc_config_collision_dist(struct igc_hw *hw)

sys/dev/igc/igc_api.c

382

if (hw->mac.ops.config_collision_dist)

sys/dev/igc/igc_api.c

383

hw->mac.ops.config_collision_dist(hw);

sys/dev/igc/igc_api.c

394

int igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index)

sys/dev/igc/igc_api.c

396

if (hw->mac.ops.rar_set)

sys/dev/igc/igc_api.c

397

return hw->mac.ops.rar_set(hw, addr, index);

sys/dev/igc/igc_api.c

408

s32 igc_validate_mdi_setting(struct igc_hw *hw)

sys/dev/igc/igc_api.c

410

if (hw->mac.ops.validate_mdi_setting)

sys/dev/igc/igc_api.c

411

return hw->mac.ops.validate_mdi_setting(hw);

sys/dev/igc/igc_api.c

425

u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr)

sys/dev/igc/igc_api.c

427

return igc_hash_mc_addr_generic(hw, mc_addr);

sys/dev/igc/igc_api.c

43

s32 igc_init_nvm_params(struct igc_hw *hw)

sys/dev/igc/igc_api.c

437

s32 igc_check_reset_block(struct igc_hw *hw)

sys/dev/igc/igc_api.c

439

if (hw->phy.ops.check_reset_block)

sys/dev/igc/igc_api.c

440

return hw->phy.ops.check_reset_block(hw);

sys/dev/igc/igc_api.c

454

s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data)

sys/dev/igc/igc_api.c

456

if (hw->phy.ops.read_reg)

sys/dev/igc/igc_api.c

457

return hw->phy.ops.read_reg(hw, offset, data);

sys/dev/igc/igc_api.c

47

if (hw->nvm.ops.init_params) {

sys/dev/igc/igc_api.c

471

s32 igc_write_phy_reg(struct igc_hw *hw, u32 offset, u16 data)

sys/dev/igc/igc_api.c

473

if (hw->phy.ops.write_reg)

sys/dev/igc/igc_api.c

474

return hw->phy.ops.write_reg(hw, offset, data);

sys/dev/igc/igc_api.c

48

ret_val = hw->nvm.ops.init_params(hw);

sys/dev/igc/igc_api.c

486

void igc_release_phy(struct igc_hw *hw)

sys/dev/igc/igc_api.c

488

if (hw->phy.ops.release)

sys/dev/igc/igc_api.c

489

hw->phy.ops.release(hw);

sys/dev/igc/igc_api.c

499

s32 igc_acquire_phy(struct igc_hw *hw)

sys/dev/igc/igc_api.c

501

if (hw->phy.ops.acquire)

sys/dev/igc/igc_api.c

502

return hw->phy.ops.acquire(hw);

sys/dev/igc/igc_api.c

515

s32 igc_get_phy_info(struct igc_hw *hw)

sys/dev/igc/igc_api.c

517

if (hw->phy.ops.get_info)

sys/dev/igc/igc_api.c

518

return hw->phy.ops.get_info(hw);

sys/dev/igc/igc_api.c

530

s32 igc_phy_hw_reset(struct igc_hw *hw)

sys/dev/igc/igc_api.c

532

if (hw->phy.ops.reset)

sys/dev/igc/igc_api.c

533

return hw->phy.ops.reset(hw);

sys/dev/igc/igc_api.c

552

s32 igc_set_d0_lplu_state(struct igc_hw *hw, bool active)

sys/dev/igc/igc_api.c

554

if (hw->phy.ops.set_d0_lplu_state)

sys/dev/igc/igc_api.c

555

return hw->phy.ops.set_d0_lplu_state(hw, active);

sys/dev/igc/igc_api.c

574

s32 igc_set_d3_lplu_state(struct igc_hw *hw, bool active)

sys/dev/igc/igc_api.c

576

if (hw->phy.ops.set_d3_lplu_state)

sys/dev/igc/igc_api.c

577

return hw->phy.ops.set_d3_lplu_state(hw, active);

sys/dev/igc/igc_api.c

590

s32 igc_read_mac_addr(struct igc_hw *hw)

sys/dev/igc/igc_api.c

592

if (hw->mac.ops.read_mac_addr)

sys/dev/igc/igc_api.c

593

return hw->mac.ops.read_mac_addr(hw);

sys/dev/igc/igc_api.c

595

return igc_read_mac_addr_generic(hw);

sys/dev/igc/igc_api.c

609

s32 igc_read_pba_string(struct igc_hw *hw, u8 *pba_num, u32 pba_num_size)

sys/dev/igc/igc_api.c

611

return igc_read_pba_string_generic(hw, pba_num, pba_num_size);

sys/dev/igc/igc_api.c

621

s32 igc_validate_nvm_checksum(struct igc_hw *hw)

sys/dev/igc/igc_api.c

623

if (hw->nvm.ops.validate)

sys/dev/igc/igc_api.c

624

return hw->nvm.ops.validate(hw);

sys/dev/igc/igc_api.c

636

s32 igc_update_nvm_checksum(struct igc_hw *hw)

sys/dev/igc/igc_api.c

638

if (hw->nvm.ops.update)

sys/dev/igc/igc_api.c

639

return hw->nvm.ops.update(hw);

sys/dev/igc/igc_api.c

651

void igc_reload_nvm(struct igc_hw *hw)

sys/dev/igc/igc_api.c

653

if (hw->nvm.ops.reload)

sys/dev/igc/igc_api.c

654

hw->nvm.ops.reload(hw);

sys/dev/igc/igc_api.c

667

s32 igc_read_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/igc/igc_api.c

669

if (hw->nvm.ops.read)

sys/dev/igc/igc_api.c

670

return hw->nvm.ops.read(hw, offset, words, data);

sys/dev/igc/igc_api.c

685

s32 igc_write_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/igc/igc_api.c

687

if (hw->nvm.ops.write)

sys/dev/igc/igc_api.c

688

return hw->nvm.ops.write(hw, offset, words, data);

sys/dev/igc/igc_api.c

69

s32 igc_init_phy_params(struct igc_hw *hw)

sys/dev/igc/igc_api.c

700

void igc_power_up_phy(struct igc_hw *hw)

sys/dev/igc/igc_api.c

702

if (hw->phy.ops.power_up)

sys/dev/igc/igc_api.c

703

hw->phy.ops.power_up(hw);

sys/dev/igc/igc_api.c

705

igc_setup_link(hw);

sys/dev/igc/igc_api.c

715

void igc_power_down_phy(struct igc_hw *hw)

sys/dev/igc/igc_api.c

717

if (hw->phy.ops.power_down)

sys/dev/igc/igc_api.c

718

hw->phy.ops.power_down(hw);

sys/dev/igc/igc_api.c

73

if (hw->phy.ops.init_params) {

sys/dev/igc/igc_api.c

74

ret_val = hw->phy.ops.init_params(hw);

sys/dev/igc/igc_api.c

97

s32 igc_set_mac_type(struct igc_hw *hw)

sys/dev/igc/igc_api.c

99

struct igc_mac_info *mac = &hw->mac;

sys/dev/igc/igc_api.h

12

extern void igc_init_function_pointers_i225(struct igc_hw *hw);

sys/dev/igc/igc_api.h

14

s32 igc_set_mac_type(struct igc_hw *hw);

sys/dev/igc/igc_api.h

15

s32 igc_setup_init_funcs(struct igc_hw *hw, bool init_device);

sys/dev/igc/igc_api.h

16

s32 igc_init_mac_params(struct igc_hw *hw);

sys/dev/igc/igc_api.h

17

s32 igc_init_nvm_params(struct igc_hw *hw);

sys/dev/igc/igc_api.h

18

s32 igc_init_phy_params(struct igc_hw *hw);

sys/dev/igc/igc_api.h

19

s32 igc_get_bus_info(struct igc_hw *hw);

sys/dev/igc/igc_api.h

20

void igc_clear_vfta(struct igc_hw *hw);

sys/dev/igc/igc_api.h

21

void igc_write_vfta(struct igc_hw *hw, u32 offset, u32 value);

sys/dev/igc/igc_api.h

22

s32 igc_force_mac_fc(struct igc_hw *hw);

sys/dev/igc/igc_api.h

23

s32 igc_check_for_link(struct igc_hw *hw);

sys/dev/igc/igc_api.h

24

s32 igc_reset_hw(struct igc_hw *hw);

sys/dev/igc/igc_api.h

25

s32 igc_init_hw(struct igc_hw *hw);

sys/dev/igc/igc_api.h

26

s32 igc_setup_link(struct igc_hw *hw);

sys/dev/igc/igc_api.h

27

s32 igc_get_speed_and_duplex(struct igc_hw *hw, u16 *speed, u16 *duplex);

sys/dev/igc/igc_api.h

28

s32 igc_disable_pcie_master(struct igc_hw *hw);

sys/dev/igc/igc_api.h

29

void igc_config_collision_dist(struct igc_hw *hw);

sys/dev/igc/igc_api.h

30

int igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index);

sys/dev/igc/igc_api.h

31

u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr);

sys/dev/igc/igc_api.h

32

void igc_update_mc_addr_list(struct igc_hw *hw, u8 *mc_addr_list,

sys/dev/igc/igc_api.h

34

s32 igc_check_reset_block(struct igc_hw *hw);

sys/dev/igc/igc_api.h

35

s32 igc_get_cable_length(struct igc_hw *hw);

sys/dev/igc/igc_api.h

36

s32 igc_validate_mdi_setting(struct igc_hw *hw);

sys/dev/igc/igc_api.h

37

s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data);

sys/dev/igc/igc_api.h

38

s32 igc_write_phy_reg(struct igc_hw *hw, u32 offset, u16 data);

sys/dev/igc/igc_api.h

39

s32 igc_get_phy_info(struct igc_hw *hw);

sys/dev/igc/igc_api.h

40

void igc_release_phy(struct igc_hw *hw);

sys/dev/igc/igc_api.h

41

s32 igc_acquire_phy(struct igc_hw *hw);

sys/dev/igc/igc_api.h

42

s32 igc_phy_hw_reset(struct igc_hw *hw);

sys/dev/igc/igc_api.h

43

void igc_power_up_phy(struct igc_hw *hw);

sys/dev/igc/igc_api.h

44

void igc_power_down_phy(struct igc_hw *hw);

sys/dev/igc/igc_api.h

45

s32 igc_read_mac_addr(struct igc_hw *hw);

sys/dev/igc/igc_api.h

46

s32 igc_read_pba_string(struct igc_hw *hw, u8 *pba_num, u32 pba_num_size);

sys/dev/igc/igc_api.h

47

void igc_reload_nvm(struct igc_hw *hw);

sys/dev/igc/igc_api.h

48

s32 igc_update_nvm_checksum(struct igc_hw *hw);

sys/dev/igc/igc_api.h

49

s32 igc_validate_nvm_checksum(struct igc_hw *hw);

sys/dev/igc/igc_api.h

50

s32 igc_read_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data);

sys/dev/igc/igc_api.h

51

s32 igc_write_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data);

sys/dev/igc/igc_api.h

52

s32 igc_set_d3_lplu_state(struct igc_hw *hw, bool active);

sys/dev/igc/igc_api.h

53

s32 igc_set_d0_lplu_state(struct igc_hw *hw, bool active);

sys/dev/igc/igc_base.c

104

if (phy->ops.check_reset_block(hw))

sys/dev/igc/igc_base.c

105

igc_power_down_phy_copper(hw);

sys/dev/igc/igc_base.c

119

void igc_rx_fifo_flush_base(struct igc_hw *hw)

sys/dev/igc/igc_base.c

127

rfctl = IGC_READ_REG(hw, IGC_RFCTL);

sys/dev/igc/igc_base.c

129

IGC_WRITE_REG(hw, IGC_RFCTL, rfctl);

sys/dev/igc/igc_base.c

131

if (!(IGC_READ_REG(hw, IGC_MANC) & IGC_MANC_RCV_TCO_EN))

sys/dev/igc/igc_base.c

136

rxdctl[i] = IGC_READ_REG(hw, IGC_RXDCTL(i));

sys/dev/igc/igc_base.c

137

IGC_WRITE_REG(hw, IGC_RXDCTL(i),

sys/dev/igc/igc_base.c

145

rx_enabled |= IGC_READ_REG(hw, IGC_RXDCTL(i));

sys/dev/igc/igc_base.c

157

IGC_WRITE_REG(hw, IGC_RFCTL, rfctl & ~IGC_RFCTL_LEF);

sys/dev/igc/igc_base.c

159

rlpml = IGC_READ_REG(hw, IGC_RLPML);

sys/dev/igc/igc_base.c

160

IGC_WRITE_REG(hw, IGC_RLPML, 0);

sys/dev/igc/igc_base.c

162

rctl = IGC_READ_REG(hw, IGC_RCTL);

sys/dev/igc/igc_base.c

166

IGC_WRITE_REG(hw, IGC_RCTL, temp_rctl);

sys/dev/igc/igc_base.c

167

IGC_WRITE_REG(hw, IGC_RCTL, temp_rctl | IGC_RCTL_EN);

sys/dev/igc/igc_base.c

168

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_base.c

175

IGC_WRITE_REG(hw, IGC_RXDCTL(i), rxdctl[i]);

sys/dev/igc/igc_base.c

176

IGC_WRITE_REG(hw, IGC_RCTL, rctl);

sys/dev/igc/igc_base.c

177

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_base.c

179

IGC_WRITE_REG(hw, IGC_RLPML, rlpml);

sys/dev/igc/igc_base.c

180

IGC_WRITE_REG(hw, IGC_RFCTL, rfctl);

sys/dev/igc/igc_base.c

183

IGC_READ_REG(hw, IGC_ROC);

sys/dev/igc/igc_base.c

184

IGC_READ_REG(hw, IGC_RNBC);

sys/dev/igc/igc_base.c

185

IGC_READ_REG(hw, IGC_MPC);

sys/dev/igc/igc_base.c

19

s32 igc_acquire_phy_base(struct igc_hw *hw)

sys/dev/igc/igc_base.c

199

bool igc_is_device_id_i226(struct igc_hw *hw)

sys/dev/igc/igc_base.c

201

switch (hw->device_id) {

sys/dev/igc/igc_base.c

25

if (hw->bus.func == IGC_FUNC_1)

sys/dev/igc/igc_base.c

28

return hw->mac.ops.acquire_swfw_sync(hw, mask);

sys/dev/igc/igc_base.c

37

void igc_release_phy_base(struct igc_hw *hw)

sys/dev/igc/igc_base.c

43

if (hw->bus.func == IGC_FUNC_1)

sys/dev/igc/igc_base.c

46

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/igc/igc_base.c

55

s32 igc_init_hw_base(struct igc_hw *hw)

sys/dev/igc/igc_base.c

57

struct igc_mac_info *mac = &hw->mac;

sys/dev/igc/igc_base.c

64

igc_init_rx_addrs_generic(hw, rar_count);

sys/dev/igc/igc_base.c

69

IGC_WRITE_REG_ARRAY(hw, IGC_MTA, i, 0);

sys/dev/igc/igc_base.c

74

IGC_WRITE_REG_ARRAY(hw, IGC_UTA, i, 0);

sys/dev/igc/igc_base.c

77

ret_val = mac->ops.setup_link(hw);

sys/dev/igc/igc_base.c

84

igc_clear_hw_cntrs_base_generic(hw);

sys/dev/igc/igc_base.c

96

void igc_power_down_phy_copper_base(struct igc_hw *hw)

sys/dev/igc/igc_base.c

98

struct igc_phy_info *phy = &hw->phy;

sys/dev/igc/igc_base.h

11

s32 igc_init_hw_base(struct igc_hw *hw);

sys/dev/igc/igc_base.h

12

void igc_power_down_phy_copper_base(struct igc_hw *hw);

sys/dev/igc/igc_base.h

13

extern void igc_rx_fifo_flush_base(struct igc_hw *hw);

sys/dev/igc/igc_base.h

14

s32 igc_acquire_phy_base(struct igc_hw *hw);

sys/dev/igc/igc_base.h

15

void igc_release_phy_base(struct igc_hw *hw);

sys/dev/igc/igc_base.h

16

bool igc_is_device_id_i226(struct igc_hw *hw);

sys/dev/igc/igc_hw.h

414

s32 (*get_invariants)(struct igc_hw *hw);

sys/dev/igc/igc_hw.h

541

s32 igc_read_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);

sys/dev/igc/igc_hw.h

542

s32 igc_write_pcie_cap_reg(struct igc_hw *hw, u32 reg, u16 *value);

sys/dev/igc/igc_hw.h

543

void igc_read_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);

sys/dev/igc/igc_hw.h

544

void igc_write_pci_cfg(struct igc_hw *hw, u32 reg, u16 *value);

sys/dev/igc/igc_i225.c

10

static s32 igc_init_nvm_params_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.c

1010

ret_val = igc_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/igc/igc_i225.c

1021

ret_val = igc_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/igc/igc_i225.c

1033

igc_check_downshift_generic(hw);

sys/dev/igc/igc_i225.c

1045

mac->ops.config_collision_dist(hw);

sys/dev/igc/igc_i225.c

1052

ret_val = igc_config_fc_after_link_up_generic(hw);

sys/dev/igc/igc_i225.c

1059

ret_val = igc_set_ltr_i225(hw, link);

sys/dev/igc/igc_i225.c

1069

void igc_init_function_pointers_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

1071

igc_init_mac_ops_generic(hw);

sys/dev/igc/igc_i225.c

1072

igc_init_phy_ops_generic(hw);

sys/dev/igc/igc_i225.c

1073

igc_init_nvm_ops_generic(hw);

sys/dev/igc/igc_i225.c

1074

hw->mac.ops.init_params = igc_init_mac_params_i225;

sys/dev/igc/igc_i225.c

1075

hw->nvm.ops.init_params = igc_init_nvm_params_i225;

sys/dev/igc/igc_i225.c

1076

hw->phy.ops.init_params = igc_init_phy_params_i225;

sys/dev/igc/igc_i225.c

1084

s32 igc_init_hw_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

1090

ret_val = igc_init_hw_base(hw);

sys/dev/igc/igc_i225.c

11

static s32 igc_init_mac_params_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.c

1102

s32 igc_set_d0_lplu_state_i225(struct igc_hw *hw, bool active)

sys/dev/igc/igc_i225.c

1108

data = IGC_READ_REG(hw, IGC_I225_PHPM);

sys/dev/igc/igc_i225.c

1118

IGC_WRITE_REG(hw, IGC_I225_PHPM, data);

sys/dev/igc/igc_i225.c

1130

s32 igc_set_d3_lplu_state_i225(struct igc_hw *hw, bool active)

sys/dev/igc/igc_i225.c

1136

data = IGC_READ_REG(hw, IGC_I225_PHPM);

sys/dev/igc/igc_i225.c

1148

IGC_WRITE_REG(hw, IGC_I225_PHPM, data);

sys/dev/igc/igc_i225.c

1162

s32 igc_set_eee_i225(struct igc_hw *hw, bool adv2p5G, bool adv1G,

sys/dev/igc/igc_i225.c

1169

if (hw->mac.type != igc_i225 ||

sys/dev/igc/igc_i225.c

1170

hw->phy.media_type != igc_media_type_copper)

sys/dev/igc/igc_i225.c

1172

ipcnfg = IGC_READ_REG(hw, IGC_IPCNFG);

sys/dev/igc/igc_i225.c

1173

eeer = IGC_READ_REG(hw, IGC_EEER);

sys/dev/igc/igc_i225.c

1176

if (!(hw->dev_spec._i225.eee_disable)) {

sys/dev/igc/igc_i225.c

1177

u32 eee_su = IGC_READ_REG(hw, IGC_EEE_SU);

sys/dev/igc/igc_i225.c

12

static s32 igc_init_phy_params_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.c

1206

IGC_WRITE_REG(hw, IGC_IPCNFG, ipcnfg);

sys/dev/igc/igc_i225.c

1207

IGC_WRITE_REG(hw, IGC_EEER, eeer);

sys/dev/igc/igc_i225.c

1208

IGC_READ_REG(hw, IGC_IPCNFG);

sys/dev/igc/igc_i225.c

1209

IGC_READ_REG(hw, IGC_EEER);

sys/dev/igc/igc_i225.c

13

static s32 igc_reset_hw_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.c

133

static s32 igc_init_phy_params_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

135

struct igc_phy_info *phy = &hw->phy;

sys/dev/igc/igc_i225.c

14

static s32 igc_acquire_nvm_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.c

141

if (hw->phy.media_type != igc_media_type_copper) {

sys/dev/igc/igc_i225.c

15

static void igc_release_nvm_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.c

16

static s32 igc_get_hw_semaphore_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.c

165

ret_val = hw->phy.ops.reset(hw);

sys/dev/igc/igc_i225.c

169

ret_val = igc_get_phy_id(hw);

sys/dev/igc/igc_i225.c

17

static s32 __igc_write_nvm_srwr(struct igc_hw *hw, u16 offset, u16 words,

sys/dev/igc/igc_i225.c

182

static s32 igc_reset_hw_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

19

static s32 igc_pool_flash_update_done_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.c

193

ret_val = igc_disable_pcie_master_generic(hw);

sys/dev/igc/igc_i225.c

198

IGC_WRITE_REG(hw, IGC_IMC, 0xffffffff);

sys/dev/igc/igc_i225.c

200

IGC_WRITE_REG(hw, IGC_RCTL, 0);

sys/dev/igc/igc_i225.c

201

IGC_WRITE_REG(hw, IGC_TCTL, IGC_TCTL_PSP);

sys/dev/igc/igc_i225.c

202

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_i225.c

206

ctrl = IGC_READ_REG(hw, IGC_CTRL);

sys/dev/igc/igc_i225.c

209

IGC_WRITE_REG(hw, IGC_CTRL, ctrl | IGC_CTRL_DEV_RST);

sys/dev/igc/igc_i225.c

211

ret_val = igc_get_auto_rd_done_generic(hw);

sys/dev/igc/igc_i225.c

222

IGC_WRITE_REG(hw, IGC_IMC, 0xffffffff);

sys/dev/igc/igc_i225.c

223

IGC_READ_REG(hw, IGC_ICR);

sys/dev/igc/igc_i225.c

226

ret_val = igc_check_alt_mac_addr_generic(hw);

sys/dev/igc/igc_i225.c

239

static s32 igc_acquire_nvm_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

245

ret_val = igc_acquire_swfw_sync_i225(hw, IGC_SWFW_EEP_SM);

sys/dev/igc/igc_i225.c

25

static s32 igc_init_nvm_params_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

256

static void igc_release_nvm_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

260

igc_release_swfw_sync_i225(hw, IGC_SWFW_EEP_SM);

sys/dev/igc/igc_i225.c

27

struct igc_nvm_info *nvm = &hw->nvm;

sys/dev/igc/igc_i225.c

270

s32 igc_acquire_swfw_sync_i225(struct igc_hw *hw, u16 mask)

sys/dev/igc/igc_i225.c

28

u32 eecd = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_i225.c

281

if (igc_get_hw_semaphore_i225(hw)) {

sys/dev/igc/igc_i225.c

286

swfw_sync = IGC_READ_REG(hw, IGC_SW_FW_SYNC);

sys/dev/igc/igc_i225.c

293

igc_put_hw_semaphore_generic(hw);

sys/dev/igc/igc_i225.c

305

IGC_WRITE_REG(hw, IGC_SW_FW_SYNC, swfw_sync);

sys/dev/igc/igc_i225.c

307

igc_put_hw_semaphore_generic(hw);

sys/dev/igc/igc_i225.c

320

void igc_release_swfw_sync_i225(struct igc_hw *hw, u16 mask)

sys/dev/igc/igc_i225.c

326

while (igc_get_hw_semaphore_i225(hw) != IGC_SUCCESS)

sys/dev/igc/igc_i225.c

329

swfw_sync = IGC_READ_REG(hw, IGC_SW_FW_SYNC);

sys/dev/igc/igc_i225.c

331

IGC_WRITE_REG(hw, IGC_SW_FW_SYNC, swfw_sync);

sys/dev/igc/igc_i225.c

333

igc_put_hw_semaphore_generic(hw);

sys/dev/igc/igc_i225.c

344

s32 igc_setup_copper_link_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

352

ctrl = IGC_READ_REG(hw, IGC_CTRL);

sys/dev/igc/igc_i225.c

355

IGC_WRITE_REG(hw, IGC_CTRL, ctrl);

sys/dev/igc/igc_i225.c

357

phpm_reg = IGC_READ_REG(hw, IGC_I225_PHPM);

sys/dev/igc/igc_i225.c

359

IGC_WRITE_REG(hw, IGC_I225_PHPM, phpm_reg);

sys/dev/igc/igc_i225.c

361

ret_val = igc_setup_copper_link_generic(hw);

sys/dev/igc/igc_i225.c

371

static s32 igc_get_hw_semaphore_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

374

s32 timeout = hw->nvm.word_size + 1;

sys/dev/igc/igc_i225.c

381

swsm = IGC_READ_REG(hw, IGC_SWSM);

sys/dev/igc/igc_i225.c

393

if (hw->dev_spec._i225.clear_semaphore_once) {

sys/dev/igc/igc_i225.c

394

hw->dev_spec._i225.clear_semaphore_once = false;

sys/dev/igc/igc_i225.c

395

igc_put_hw_semaphore_generic(hw);

sys/dev/igc/igc_i225.c

397

swsm = IGC_READ_REG(hw, IGC_SWSM);

sys/dev/igc/igc_i225.c

415

swsm = IGC_READ_REG(hw, IGC_SWSM);

sys/dev/igc/igc_i225.c

416

IGC_WRITE_REG(hw, IGC_SWSM, swsm | IGC_SWSM_SWESMBI);

sys/dev/igc/igc_i225.c

419

if (IGC_READ_REG(hw, IGC_SWSM) & IGC_SWSM_SWESMBI)

sys/dev/igc/igc_i225.c

427

igc_put_hw_semaphore_generic(hw);

sys/dev/igc/igc_i225.c

444

s32 igc_read_nvm_srrd_i225(struct igc_hw *hw, u16 offset, u16 words,

sys/dev/igc/igc_i225.c

459

if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {

sys/dev/igc/igc_i225.c

460

status = igc_read_nvm_eerd(hw, offset, count,

sys/dev/igc/igc_i225.c

462

hw->nvm.ops.release(hw);

sys/dev/igc/igc_i225.c

489

s32 igc_write_nvm_srwr_i225(struct igc_hw *hw, u16 offset, u16 words,

sys/dev/igc/igc_i225.c

504

if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {

sys/dev/igc/igc_i225.c

505

status = __igc_write_nvm_srwr(hw, offset, count,

sys/dev/igc/igc_i225.c

507

hw->nvm.ops.release(hw);

sys/dev/igc/igc_i225.c

530

static s32 __igc_write_nvm_srwr(struct igc_hw *hw, u16 offset, u16 words,

sys/dev/igc/igc_i225.c

533

struct igc_nvm_info *nvm = &hw->nvm;

sys/dev/igc/igc_i225.c

555

IGC_WRITE_REG(hw, IGC_SRWR, eewr);

sys/dev/igc/igc_i225.c

559

IGC_READ_REG(hw, IGC_SRWR)) {

sys/dev/igc/igc_i225.c

582

s32 igc_validate_nvm_checksum_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

589

if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {

sys/dev/igc/igc_i225.c

594

read_op_ptr = hw->nvm.ops.read;

sys/dev/igc/igc_i225.c

595

hw->nvm.ops.read = igc_read_nvm_eerd;

sys/dev/igc/igc_i225.c

597

status = igc_validate_nvm_checksum_generic(hw);

sys/dev/igc/igc_i225.c

600

hw->nvm.ops.read = read_op_ptr;

sys/dev/igc/igc_i225.c

602

hw->nvm.ops.release(hw);

sys/dev/igc/igc_i225.c

617

s32 igc_update_nvm_checksum_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

62

if (igc_get_flash_presence_i225(hw)) {

sys/dev/igc/igc_i225.c

629

ret_val = igc_read_nvm_eerd(hw, 0, 1, &nvm_data);

sys/dev/igc/igc_i225.c

63

hw->nvm.type = igc_nvm_flash_hw;

sys/dev/igc/igc_i225.c

635

if (hw->nvm.ops.acquire(hw) == IGC_SUCCESS) {

sys/dev/igc/igc_i225.c

642

ret_val = igc_read_nvm_eerd(hw, i, 1, &nvm_data);

sys/dev/igc/igc_i225.c

644

hw->nvm.ops.release(hw);

sys/dev/igc/igc_i225.c

652

ret_val = __igc_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,

sys/dev/igc/igc_i225.c

655

hw->nvm.ops.release(hw);

sys/dev/igc/igc_i225.c

660

hw->nvm.ops.release(hw);

sys/dev/igc/igc_i225.c

662

ret_val = igc_update_flash_i225(hw);

sys/dev/igc/igc_i225.c

673

bool igc_get_flash_presence_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

680

eec = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_i225.c

69

hw->nvm.type = igc_nvm_invm;

sys/dev/igc/igc_i225.c

694

s32 igc_set_flsw_flash_burst_counter_i225(struct igc_hw *hw,

sys/dev/igc/igc_i225.c

704

IGC_WRITE_REG(hw, IGC_I225_FLSWCNT, burst_counter);

sys/dev/igc/igc_i225.c

719

s32 igc_write_erase_flash_command_i225(struct igc_hw *hw, u32 opcode,

sys/dev/igc/igc_i225.c

728

flswctl = IGC_READ_REG(hw, IGC_I225_FLSWCTL);

sys/dev/igc/igc_i225.c

734

flswctl = IGC_READ_REG(hw, IGC_I225_FLSWCTL);

sys/dev/igc/igc_i225.c

745

IGC_WRITE_REG(hw, IGC_I225_FLSWCTL, flswctl);

sys/dev/igc/igc_i225.c

748

flswctl = IGC_READ_REG(hw, IGC_I225_FLSWCTL);

sys/dev/igc/igc_i225.c

765

s32 igc_update_flash_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

777

block_sw_protect = IGC_READ_REG(hw, IGC_I225_FLSECU) &

sys/dev/igc/igc_i225.c

779

fw_valid_bit = IGC_READ_REG(hw, IGC_FWSM) &

sys/dev/igc/igc_i225.c

782

ret_val = igc_pool_flash_update_done_i225(hw);

sys/dev/igc/igc_i225.c

788

flup = IGC_READ_REG(hw, IGC_EECD) | IGC_EECD_FLUPD_I225;

sys/dev/igc/igc_i225.c

789

IGC_WRITE_REG(hw, IGC_EECD, flup);

sys/dev/igc/igc_i225.c

791

ret_val = igc_pool_flash_update_done_i225(hw);

sys/dev/igc/igc_i225.c

803

if (IGC_READ_REG(hw, IGC_EECD) & IGC_EECD_SEC1VAL_I225)

sys/dev/igc/igc_i225.c

807

ret_val = igc_write_erase_flash_command_i225(hw,

sys/dev/igc/igc_i225.c

82

static s32 igc_init_mac_params_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

820

ret_val = igc_set_flsw_flash_burst_counter_i225(hw,

sys/dev/igc/igc_i225.c

826

ret_val = igc_write_erase_flash_command_i225(hw,

sys/dev/igc/igc_i225.c

832

ret_val = igc_read_nvm_eerd(hw, current_offset,

sys/dev/igc/igc_i225.c

84

struct igc_mac_info *mac = &hw->mac;

sys/dev/igc/igc_i225.c

840

IGC_WRITE_REG(hw, IGC_I225_FLSWDATA,

sys/dev/igc/igc_i225.c

845

ret_val = igc_poll_eerd_eewr_done(hw,

sys/dev/igc/igc_i225.c

85

struct igc_dev_spec_i225 *dev_spec = &hw->dev_spec._i225;

sys/dev/igc/igc_i225.c

860

s32 igc_pool_flash_update_done_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

868

reg = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_i225.c

886

static s32 igc_set_ltr_i225(struct igc_hw *hw, bool link)

sys/dev/igc/igc_i225.c

896

hw->mac.ops.get_link_up_info(hw, &speed, &duplex);

sys/dev/igc/igc_i225.c

90

igc_init_mac_ops_generic(hw);

sys/dev/igc/igc_i225.c

901

if ((hw->phy.media_type == igc_media_type_copper) &&

sys/dev/igc/igc_i225.c

902

!(hw->dev_spec._i225.eee_disable) &&

sys/dev/igc/igc_i225.c

905

ltrc = IGC_READ_REG(hw, IGC_LTRC) |

sys/dev/igc/igc_i225.c

907

IGC_WRITE_REG(hw, IGC_LTRC, ltrc);

sys/dev/igc/igc_i225.c

911

tw_system = ((IGC_READ_REG(hw, IGC_EEE_SU) &

sys/dev/igc/igc_i225.c

915

tw_system = (IGC_READ_REG(hw, IGC_EEE_SU) &

sys/dev/igc/igc_i225.c

923

size = IGC_READ_REG(hw, IGC_RXPBS) &

sys/dev/igc/igc_i225.c

927

if (IGC_READ_REG(hw, IGC_DMACR) & IGC_DMACR_DMAC_EN) {

sys/dev/igc/igc_i225.c

928

size -= (IGC_READ_REG(hw, IGC_DMACR) &

sys/dev/igc/igc_i225.c

93

hw->phy.media_type = igc_media_type_copper;

sys/dev/igc/igc_i225.c

938

size -= hw->dev_spec._i225.mtu;

sys/dev/igc/igc_i225.c

963

ltrv = IGC_READ_REG(hw, IGC_LTRMINV);

sys/dev/igc/igc_i225.c

967

IGC_WRITE_REG(hw, IGC_LTRMINV, ltrv);

sys/dev/igc/igc_i225.c

970

ltrv = IGC_READ_REG(hw, IGC_LTRMAXV);

sys/dev/igc/igc_i225.c

974

IGC_WRITE_REG(hw, IGC_LTRMAXV, ltrv);

sys/dev/igc/igc_i225.c

988

s32 igc_check_for_link_i225(struct igc_hw *hw)

sys/dev/igc/igc_i225.c

990

struct igc_mac_info *mac = &hw->mac;

sys/dev/igc/igc_i225.h

10

bool igc_get_flash_presence_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.h

11

s32 igc_update_flash_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.h

12

s32 igc_update_nvm_checksum_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.h

13

s32 igc_validate_nvm_checksum_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.h

14

s32 igc_write_nvm_srwr_i225(struct igc_hw *hw, u16 offset,

sys/dev/igc/igc_i225.h

16

s32 igc_read_nvm_srrd_i225(struct igc_hw *hw, u16 offset,

sys/dev/igc/igc_i225.h

18

s32 igc_set_flsw_flash_burst_counter_i225(struct igc_hw *hw,

sys/dev/igc/igc_i225.h

20

s32 igc_write_erase_flash_command_i225(struct igc_hw *hw, u32 opcode,

sys/dev/igc/igc_i225.h

22

s32 igc_check_for_link_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.h

23

s32 igc_acquire_swfw_sync_i225(struct igc_hw *hw, u16 mask);

sys/dev/igc/igc_i225.h

24

void igc_release_swfw_sync_i225(struct igc_hw *hw, u16 mask);

sys/dev/igc/igc_i225.h

25

s32 igc_init_hw_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.h

26

s32 igc_setup_copper_link_i225(struct igc_hw *hw);

sys/dev/igc/igc_i225.h

27

s32 igc_set_d0_lplu_state_i225(struct igc_hw *hw, bool active);

sys/dev/igc/igc_i225.h

28

s32 igc_set_d3_lplu_state_i225(struct igc_hw *hw, bool active);

sys/dev/igc/igc_i225.h

29

s32 igc_set_eee_i225(struct igc_hw *hw, bool adv2p5G, bool adv1G,

sys/dev/igc/igc_mac.c

10

static void igc_config_collision_dist_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.c

1023

s32 igc_disable_pcie_master_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

1030

ctrl = IGC_READ_REG(hw, IGC_CTRL);

sys/dev/igc/igc_mac.c

1032

IGC_WRITE_REG(hw, IGC_CTRL, ctrl);

sys/dev/igc/igc_mac.c

1035

if (!(IGC_READ_REG(hw, IGC_STATUS) &

sys/dev/igc/igc_mac.c

104

int igc_null_rar_set(struct igc_hw IGC_UNUSEDARG *hw,

sys/dev/igc/igc_mac.c

117

void igc_set_lan_id_single_port(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

119

struct igc_bus_info *bus = &hw->bus;

sys/dev/igc/igc_mac.c

131

void igc_clear_vfta_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

138

IGC_WRITE_REG_ARRAY(hw, IGC_VFTA, offset, 0);

sys/dev/igc/igc_mac.c

139

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_mac.c

152

void igc_write_vfta_generic(struct igc_hw *hw, u32 offset, u32 value)

sys/dev/igc/igc_mac.c

156

IGC_WRITE_REG_ARRAY(hw, IGC_VFTA, offset, value);

sys/dev/igc/igc_mac.c

157

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_mac.c

169

void igc_init_rx_addrs_generic(struct igc_hw *hw, u16 rar_count)

sys/dev/igc/igc_mac.c

179

hw->mac.ops.rar_set(hw, hw->mac.addr, 0);

sys/dev/igc/igc_mac.c

18

void igc_init_mac_ops_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

184

hw->mac.ops.rar_set(hw, mac_addr, i);

sys/dev/igc/igc_mac.c

199

s32 igc_check_alt_mac_addr_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

20

struct igc_mac_info *mac = &hw->mac;

sys/dev/igc/igc_mac.c

208

ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &nvm_data);

sys/dev/igc/igc_mac.c

213

ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,

sys/dev/igc/igc_mac.c

225

if (hw->bus.func == IGC_FUNC_1)

sys/dev/igc/igc_mac.c

229

ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);

sys/dev/igc/igc_mac.c

249

hw->mac.ops.rar_set(hw, alt_mac_addr, 0);

sys/dev/igc/igc_mac.c

263

int igc_rar_set_generic(struct igc_hw *hw, u8 *addr, u32 index)

sys/dev/igc/igc_mac.c

285

IGC_WRITE_REG(hw, IGC_RAL(index), rar_low);

sys/dev/igc/igc_mac.c

286

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_mac.c

287

IGC_WRITE_REG(hw, IGC_RAH(index), rar_high);

sys/dev/igc/igc_mac.c

288

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_mac.c

301

u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr)

sys/dev/igc/igc_mac.c

309

hash_mask = (hw->mac.mta_reg_count * 32) - 1;

sys/dev/igc/igc_mac.c

33

s32 igc_null_ops_generic(struct igc_hw IGC_UNUSEDARG *hw)

sys/dev/igc/igc_mac.c

342

switch (hw->mac.mc_filter_type) {

sys/dev/igc/igc_mac.c

372

void igc_update_mc_addr_list_generic(struct igc_hw *hw,

sys/dev/igc/igc_mac.c

381

memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow));

sys/dev/igc/igc_mac.c

385

hash_value = igc_hash_mc_addr_generic(hw, mc_addr_list);

sys/dev/igc/igc_mac.c

387

hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);

sys/dev/igc/igc_mac.c

390

hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit);

sys/dev/igc/igc_mac.c

395

for (i = hw->mac.mta_reg_count - 1; i >= 0; i--)

sys/dev/igc/igc_mac.c

396

IGC_WRITE_REG_ARRAY(hw, IGC_MTA, i, hw->mac.mta_shadow[i]);

sys/dev/igc/igc_mac.c

397

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_mac.c

406

void igc_clear_hw_cntrs_base_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

410

IGC_READ_REG(hw, IGC_CRCERRS);

sys/dev/igc/igc_mac.c

411

IGC_READ_REG(hw, IGC_MPC);

sys/dev/igc/igc_mac.c

412

IGC_READ_REG(hw, IGC_SCC);

sys/dev/igc/igc_mac.c

413

IGC_READ_REG(hw, IGC_ECOL);

sys/dev/igc/igc_mac.c

414

IGC_READ_REG(hw, IGC_MCC);

sys/dev/igc/igc_mac.c

415

IGC_READ_REG(hw, IGC_LATECOL);

sys/dev/igc/igc_mac.c

416

IGC_READ_REG(hw, IGC_COLC);

sys/dev/igc/igc_mac.c

417

IGC_READ_REG(hw, IGC_RERC);

sys/dev/igc/igc_mac.c

418

IGC_READ_REG(hw, IGC_DC);

sys/dev/igc/igc_mac.c

419

IGC_READ_REG(hw, IGC_RLEC);

sys/dev/igc/igc_mac.c

420

IGC_READ_REG(hw, IGC_XONRXC);

sys/dev/igc/igc_mac.c

421

IGC_READ_REG(hw, IGC_XONTXC);

sys/dev/igc/igc_mac.c

422

IGC_READ_REG(hw, IGC_XOFFRXC);

sys/dev/igc/igc_mac.c

423

IGC_READ_REG(hw, IGC_XOFFTXC);

sys/dev/igc/igc_mac.c

424

IGC_READ_REG(hw, IGC_FCRUC);

sys/dev/igc/igc_mac.c

425

IGC_READ_REG(hw, IGC_GPRC);

sys/dev/igc/igc_mac.c

426

IGC_READ_REG(hw, IGC_BPRC);

sys/dev/igc/igc_mac.c

427

IGC_READ_REG(hw, IGC_MPRC);

sys/dev/igc/igc_mac.c

428

IGC_READ_REG(hw, IGC_GPTC);

sys/dev/igc/igc_mac.c

429

IGC_READ_REG(hw, IGC_GORCL);

sys/dev/igc/igc_mac.c

43

void igc_null_mac_generic(struct igc_hw IGC_UNUSEDARG *hw)

sys/dev/igc/igc_mac.c

430

IGC_READ_REG(hw, IGC_GORCH);

sys/dev/igc/igc_mac.c

431

IGC_READ_REG(hw, IGC_GOTCL);

sys/dev/igc/igc_mac.c

432

IGC_READ_REG(hw, IGC_GOTCH);

sys/dev/igc/igc_mac.c

433

IGC_READ_REG(hw, IGC_RNBC);

sys/dev/igc/igc_mac.c

434

IGC_READ_REG(hw, IGC_RUC);

sys/dev/igc/igc_mac.c

435

IGC_READ_REG(hw, IGC_RFC);

sys/dev/igc/igc_mac.c

436

IGC_READ_REG(hw, IGC_ROC);

sys/dev/igc/igc_mac.c

437

IGC_READ_REG(hw, IGC_RJC);

sys/dev/igc/igc_mac.c

438

IGC_READ_REG(hw, IGC_TORL);

sys/dev/igc/igc_mac.c

439

IGC_READ_REG(hw, IGC_TORH);

sys/dev/igc/igc_mac.c

440

IGC_READ_REG(hw, IGC_TOTL);

sys/dev/igc/igc_mac.c

441

IGC_READ_REG(hw, IGC_TOTH);

sys/dev/igc/igc_mac.c

442

IGC_READ_REG(hw, IGC_TPR);

sys/dev/igc/igc_mac.c

443

IGC_READ_REG(hw, IGC_TPT);

sys/dev/igc/igc_mac.c

444

IGC_READ_REG(hw, IGC_MPTC);

sys/dev/igc/igc_mac.c

445

IGC_READ_REG(hw, IGC_BPTC);

sys/dev/igc/igc_mac.c

446

IGC_READ_REG(hw, IGC_TLPIC);

sys/dev/igc/igc_mac.c

447

IGC_READ_REG(hw, IGC_RLPIC);

sys/dev/igc/igc_mac.c

448

IGC_READ_REG(hw, IGC_RXDMTC);

sys/dev/igc/igc_mac.c

459

s32 igc_check_for_copper_link_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

461

struct igc_mac_info *mac = &hw->mac;

sys/dev/igc/igc_mac.c

479

ret_val = igc_phy_has_link_generic(hw, 1, 0, &link);

sys/dev/igc/igc_mac.c

491

igc_check_downshift_generic(hw);

sys/dev/igc/igc_mac.c

503

mac->ops.config_collision_dist(hw);

sys/dev/igc/igc_mac.c

510

ret_val = igc_config_fc_after_link_up_generic(hw);

sys/dev/igc/igc_mac.c

527

s32 igc_setup_link_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

536

if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))

sys/dev/igc/igc_mac.c

542

if (hw->fc.requested_mode == igc_fc_default) {

sys/dev/igc/igc_mac.c

543

hw->fc.requested_mode = igc_fc_full;

sys/dev/igc/igc_mac.c

549

hw->fc.current_mode = hw->fc.requested_mode;

sys/dev/igc/igc_mac.c

55

s32 igc_null_link_info(struct igc_hw IGC_UNUSEDARG *hw,

sys/dev/igc/igc_mac.c

552

hw->fc.current_mode);

sys/dev/igc/igc_mac.c

555

ret_val = hw->mac.ops.setup_physical_interface(hw);

sys/dev/igc/igc_mac.c

565

IGC_WRITE_REG(hw, IGC_FCT, FLOW_CONTROL_TYPE);

sys/dev/igc/igc_mac.c

566

IGC_WRITE_REG(hw, IGC_FCAH, FLOW_CONTROL_ADDRESS_HIGH);

sys/dev/igc/igc_mac.c

567

IGC_WRITE_REG(hw, IGC_FCAL, FLOW_CONTROL_ADDRESS_LOW);

sys/dev/igc/igc_mac.c

569

IGC_WRITE_REG(hw, IGC_FCTTV, hw->fc.pause_time);

sys/dev/igc/igc_mac.c

571

return igc_set_fc_watermarks_generic(hw);

sys/dev/igc/igc_mac.c

581

static void igc_config_collision_dist_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

587

tctl = IGC_READ_REG(hw, IGC_TCTL);

sys/dev/igc/igc_mac.c

592

IGC_WRITE_REG(hw, IGC_TCTL, tctl);

sys/dev/igc/igc_mac.c

593

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_mac.c

604

s32 igc_set_fc_watermarks_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

616

if (hw->fc.current_mode & igc_fc_tx_pause) {

sys/dev/igc/igc_mac.c

621

fcrtl = hw->fc.low_water;

sys/dev/igc/igc_mac.c

622

if (hw->fc.send_xon)

sys/dev/igc/igc_mac.c

625

fcrth = hw->fc.high_water;

sys/dev/igc/igc_mac.c

627

IGC_WRITE_REG(hw, IGC_FCRTL, fcrtl);

sys/dev/igc/igc_mac.c

628

IGC_WRITE_REG(hw, IGC_FCRTH, fcrth);

sys/dev/igc/igc_mac.c

643

s32 igc_force_mac_fc_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

649

ctrl = IGC_READ_REG(hw, IGC_CTRL);

sys/dev/igc/igc_mac.c

66

bool igc_null_mng_mode(struct igc_hw IGC_UNUSEDARG *hw)

sys/dev/igc/igc_mac.c

668

DEBUGOUT1("hw->fc.current_mode = %u\n", hw->fc.current_mode);

sys/dev/igc/igc_mac.c

670

switch (hw->fc.current_mode) {

sys/dev/igc/igc_mac.c

690

IGC_WRITE_REG(hw, IGC_CTRL, ctrl);

sys/dev/igc/igc_mac.c

705

s32 igc_config_fc_after_link_up_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

707

struct igc_mac_info *mac = &hw->mac;

sys/dev/igc/igc_mac.c

729

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);

sys/dev/igc/igc_mac.c

732

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);

sys/dev/igc/igc_mac.c

747

ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,

sys/dev/igc/igc_mac.c

751

ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,

sys/dev/igc/igc_mac.c

78

void igc_null_update_mc(struct igc_hw IGC_UNUSEDARG *hw,

sys/dev/igc/igc_mac.c

797

if (hw->fc.requested_mode == igc_fc_full) {

sys/dev/igc/igc_mac.c

798

hw->fc.current_mode = igc_fc_full;

sys/dev/igc/igc_mac.c

801

hw->fc.current_mode = igc_fc_rx_pause;

sys/dev/igc/igc_mac.c

816

hw->fc.current_mode = igc_fc_tx_pause;

sys/dev/igc/igc_mac.c

830

hw->fc.current_mode = igc_fc_rx_pause;

sys/dev/igc/igc_mac.c

836

hw->fc.current_mode = igc_fc_none;

sys/dev/igc/igc_mac.c

844

ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);

sys/dev/igc/igc_mac.c

851

hw->fc.current_mode = igc_fc_none;

sys/dev/igc/igc_mac.c

856

ret_val = igc_force_mac_fc_generic(hw);

sys/dev/igc/igc_mac.c

875

s32 igc_get_speed_and_duplex_copper_generic(struct igc_hw *hw, u16 *speed,

sys/dev/igc/igc_mac.c

882

status = IGC_READ_REG(hw, IGC_STATUS);

sys/dev/igc/igc_mac.c

888

if ((hw->mac.type == igc_i225) &&

sys/dev/igc/igc_mac.c

91

void igc_null_write_vfta(struct igc_hw IGC_UNUSEDARG *hw,

sys/dev/igc/igc_mac.c

921

s32 igc_get_hw_semaphore_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

924

s32 timeout = hw->nvm.word_size + 1;

sys/dev/igc/igc_mac.c

931

swsm = IGC_READ_REG(hw, IGC_SWSM);

sys/dev/igc/igc_mac.c

946

swsm = IGC_READ_REG(hw, IGC_SWSM);

sys/dev/igc/igc_mac.c

947

IGC_WRITE_REG(hw, IGC_SWSM, swsm | IGC_SWSM_SWESMBI);

sys/dev/igc/igc_mac.c

950

if (IGC_READ_REG(hw, IGC_SWSM) & IGC_SWSM_SWESMBI)

sys/dev/igc/igc_mac.c

958

igc_put_hw_semaphore_generic(hw);

sys/dev/igc/igc_mac.c

972

void igc_put_hw_semaphore_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

978

swsm = IGC_READ_REG(hw, IGC_SWSM);

sys/dev/igc/igc_mac.c

982

IGC_WRITE_REG(hw, IGC_SWSM, swsm);

sys/dev/igc/igc_mac.c

991

s32 igc_get_auto_rd_done_generic(struct igc_hw *hw)

sys/dev/igc/igc_mac.c

998

if (IGC_READ_REG(hw, IGC_EECD) & IGC_EECD_AUTO_RD)

sys/dev/igc/igc_mac.h

10

void igc_init_mac_ops_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

11

void igc_null_mac_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

12

s32 igc_null_ops_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

13

s32 igc_null_link_info(struct igc_hw *hw, u16 *s, u16 *d);

sys/dev/igc/igc_mac.h

14

bool igc_null_mng_mode(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

15

void igc_null_update_mc(struct igc_hw *hw, u8 *h, u32 a);

sys/dev/igc/igc_mac.h

16

void igc_null_write_vfta(struct igc_hw *hw, u32 a, u32 b);

sys/dev/igc/igc_mac.h

17

int igc_null_rar_set(struct igc_hw *hw, u8 *h, u32 a);

sys/dev/igc/igc_mac.h

18

s32 igc_check_for_copper_link_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

19

s32 igc_config_fc_after_link_up_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

20

s32 igc_disable_pcie_master_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

21

s32 igc_force_mac_fc_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

22

s32 igc_get_auto_rd_done_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

23

s32 igc_get_bus_info_pcie_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

24

void igc_set_lan_id_single_port(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

25

s32 igc_get_hw_semaphore_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

26

s32 igc_get_speed_and_duplex_copper_generic(struct igc_hw *hw, u16 *speed,

sys/dev/igc/igc_mac.h

28

void igc_update_mc_addr_list_generic(struct igc_hw *hw,

sys/dev/igc/igc_mac.h

30

int igc_rar_set_generic(struct igc_hw *hw, u8 *addr, u32 index);

sys/dev/igc/igc_mac.h

31

s32 igc_set_fc_watermarks_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

32

s32 igc_setup_link_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

33

s32 igc_validate_mdi_setting_crossover_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

35

u32 igc_hash_mc_addr_generic(struct igc_hw *hw, u8 *mc_addr);

sys/dev/igc/igc_mac.h

37

void igc_clear_hw_cntrs_base_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

38

void igc_clear_vfta_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

39

void igc_init_rx_addrs_generic(struct igc_hw *hw, u16 rar_count);

sys/dev/igc/igc_mac.h

40

void igc_pcix_mmrbc_workaround_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

41

void igc_put_hw_semaphore_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

42

s32 igc_check_alt_mac_addr_generic(struct igc_hw *hw);

sys/dev/igc/igc_mac.h

43

void igc_set_pcie_no_snoop_generic(struct igc_hw *hw, u32 no_snoop);

sys/dev/igc/igc_mac.h

44

void igc_write_vfta_generic(struct igc_hw *hw, u32 offset, u32 value);

sys/dev/igc/igc_nvm.c

10

static void igc_reload_nvm_generic(struct igc_hw *hw);

sys/dev/igc/igc_nvm.c

100

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_nvm.c

101

usec_delay(hw->nvm.delay_usec);

sys/dev/igc/igc_nvm.c

114

static void igc_shift_out_eec_bits(struct igc_hw *hw, u16 data, u16 count)

sys/dev/igc/igc_nvm.c

116

struct igc_nvm_info *nvm = &hw->nvm;

sys/dev/igc/igc_nvm.c

117

u32 eecd = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_nvm.c

132

IGC_WRITE_REG(hw, IGC_EECD, eecd);

sys/dev/igc/igc_nvm.c

133

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_nvm.c

137

igc_raise_eec_clk(hw, &eecd);

sys/dev/igc/igc_nvm.c

138

igc_lower_eec_clk(hw, &eecd);

sys/dev/igc/igc_nvm.c

144

IGC_WRITE_REG(hw, IGC_EECD, eecd);

sys/dev/igc/igc_nvm.c

158

static u16 igc_shift_in_eec_bits(struct igc_hw *hw, u16 count)

sys/dev/igc/igc_nvm.c

166

eecd = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_nvm.c

173

igc_raise_eec_clk(hw, &eecd);

sys/dev/igc/igc_nvm.c

175

eecd = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_nvm.c

18

void igc_init_nvm_ops_generic(struct igc_hw *hw)

sys/dev/igc/igc_nvm.c

181

igc_lower_eec_clk(hw, &eecd);

sys/dev/igc/igc_nvm.c

195

s32 igc_poll_eerd_eewr_done(struct igc_hw *hw, int ee_reg)

sys/dev/igc/igc_nvm.c

20

struct igc_nvm_info *nvm = &hw->nvm;

sys/dev/igc/igc_nvm.c

204

reg = IGC_READ_REG(hw, IGC_EERD);

sys/dev/igc/igc_nvm.c

206

reg = IGC_READ_REG(hw, IGC_EEWR);

sys/dev/igc/igc_nvm.c

225

s32 igc_acquire_nvm_generic(struct igc_hw *hw)

sys/dev/igc/igc_nvm.c

227

u32 eecd = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_nvm.c

232

IGC_WRITE_REG(hw, IGC_EECD, eecd | IGC_EECD_REQ);

sys/dev/igc/igc_nvm.c

233

eecd = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_nvm.c

239

eecd = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_nvm.c

245

IGC_WRITE_REG(hw, IGC_EECD, eecd);

sys/dev/igc/igc_nvm.c

259

static void igc_standby_nvm(struct igc_hw *hw)

sys/dev/igc/igc_nvm.c

261

struct igc_nvm_info *nvm = &hw->nvm;

sys/dev/igc/igc_nvm.c

262

u32 eecd = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_nvm.c

269

IGC_WRITE_REG(hw, IGC_EECD, eecd);

sys/dev/igc/igc_nvm.c

270

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_nvm.c

273

IGC_WRITE_REG(hw, IGC_EECD, eecd);

sys/dev/igc/igc_nvm.c

274

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_nvm.c

285

static void igc_stop_nvm(struct igc_hw *hw)

sys/dev/igc/igc_nvm.c

291

eecd = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_nvm.c

292

if (hw->nvm.type == igc_nvm_eeprom_spi) {

sys/dev/igc/igc_nvm.c

295

igc_lower_eec_clk(hw, &eecd);

sys/dev/igc/igc_nvm.c

305

void igc_release_nvm_generic(struct igc_hw *hw)

sys/dev/igc/igc_nvm.c

311

igc_stop_nvm(hw);

sys/dev/igc/igc_nvm.c

313

eecd = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_nvm.c

315

IGC_WRITE_REG(hw, IGC_EECD, eecd);

sys/dev/igc/igc_nvm.c

324

static s32 igc_ready_nvm_eeprom(struct igc_hw *hw)

sys/dev/igc/igc_nvm.c

326

struct igc_nvm_info *nvm = &hw->nvm;

sys/dev/igc/igc_nvm.c

327

u32 eecd = IGC_READ_REG(hw, IGC_EECD);

sys/dev/igc/igc_nvm.c

337

IGC_WRITE_REG(hw, IGC_EECD, eecd);

sys/dev/igc/igc_nvm.c

338

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_nvm.c

347

igc_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,

sys/dev/igc/igc_nvm.c

348

hw->nvm.opcode_bits);

sys/dev/igc/igc_nvm.c

349

spi_stat_reg = (u8)igc_shift_in_eec_bits(hw, 8);

sys/dev/igc/igc_nvm.c

354

igc_standby_nvm(hw);

sys/dev/igc/igc_nvm.c

376

s32 igc_read_nvm_eerd(struct igc_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/igc/igc_nvm.c

378

struct igc_nvm_info *nvm = &hw->nvm;

sys/dev/igc/igc_nvm.c

397

IGC_WRITE_REG(hw, IGC_EERD, eerd);

sys/dev/igc/igc_nvm.c

398

ret_val = igc_poll_eerd_eewr_done(hw, IGC_NVM_POLL_READ);

sys/dev/igc/igc_nvm.c

402

data[i] = (IGC_READ_REG(hw, IGC_EERD) >>

sys/dev/igc/igc_nvm.c

41

s32 igc_null_read_nvm(struct igc_hw IGC_UNUSEDARG *hw,

sys/dev/igc/igc_nvm.c

424

s32 igc_write_nvm_spi(struct igc_hw *hw, u16 offset, u16 words, u16 *data)

sys/dev/igc/igc_nvm.c

426

struct igc_nvm_info *nvm = &hw->nvm;

sys/dev/igc/igc_nvm.c

444

ret_val = nvm->ops.acquire(hw);

sys/dev/igc/igc_nvm.c

448

ret_val = igc_ready_nvm_eeprom(hw);

sys/dev/igc/igc_nvm.c

450

nvm->ops.release(hw);

sys/dev/igc/igc_nvm.c

454

igc_standby_nvm(hw);

sys/dev/igc/igc_nvm.c

457

igc_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,

sys/dev/igc/igc_nvm.c

460

igc_standby_nvm(hw);

sys/dev/igc/igc_nvm.c

469

igc_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);

sys/dev/igc/igc_nvm.c

470

igc_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),

sys/dev/igc/igc_nvm.c

477

igc_shift_out_eec_bits(hw, word_out, 16);

sys/dev/igc/igc_nvm.c

481

igc_standby_nvm(hw);

sys/dev/igc/igc_nvm.c

486

nvm->ops.release(hw);

sys/dev/igc/igc_nvm.c

501

s32 igc_read_pba_string_generic(struct igc_hw *hw, u8 *pba_num,

sys/dev/igc/igc_nvm.c

517

ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);

sys/dev/igc/igc_nvm.c

523

ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);

sys/dev/igc/igc_nvm.c

53

void igc_null_nvm_generic(struct igc_hw IGC_UNUSEDARG *hw)

sys/dev/igc/igc_nvm.c

568

ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);

sys/dev/igc/igc_nvm.c

589

ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);

sys/dev/igc/igc_nvm.c

614

s32 igc_read_mac_addr_generic(struct igc_hw *hw)

sys/dev/igc/igc_nvm.c

620

rar_high = IGC_READ_REG(hw, IGC_RAH(0));

sys/dev/igc/igc_nvm.c

621

rar_low = IGC_READ_REG(hw, IGC_RAL(0));

sys/dev/igc/igc_nvm.c

624

hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));

sys/dev/igc/igc_nvm.c

627

hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));

sys/dev/igc/igc_nvm.c

630

hw->mac.addr[i] = hw->mac.perm_addr[i];

sys/dev/igc/igc_nvm.c

642

s32 igc_validate_nvm_checksum_generic(struct igc_hw *hw)

sys/dev/igc/igc_nvm.c

651

ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);

sys/dev/igc/igc_nvm.c

66

s32 igc_null_write_nvm(struct igc_hw IGC_UNUSEDARG *hw,

sys/dev/igc/igc_nvm.c

675

s32 igc_update_nvm_checksum_generic(struct igc_hw *hw)

sys/dev/igc/igc_nvm.c

684

ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);

sys/dev/igc/igc_nvm.c

692

ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);

sys/dev/igc/igc_nvm.c

706

static void igc_reload_nvm_generic(struct igc_hw *hw)

sys/dev/igc/igc_nvm.c

713

ctrl_ext = IGC_READ_REG(hw, IGC_CTRL_EXT);

sys/dev/igc/igc_nvm.c

715

IGC_WRITE_REG(hw, IGC_CTRL_EXT, ctrl_ext);

sys/dev/igc/igc_nvm.c

716

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_nvm.c

726

void igc_get_fw_version(struct igc_hw *hw, struct igc_fw_version *fw_vers)

sys/dev/igc/igc_nvm.c

738

switch (hw->mac.type) {

sys/dev/igc/igc_nvm.c

740

hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);

sys/dev/igc/igc_nvm.c

742

hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);

sys/dev/igc/igc_nvm.c

744

hw->nvm.ops.read(hw, NVM_COMB_VER_OFF + comb_offset + 1,

sys/dev/igc/igc_nvm.c

746

hw->nvm.ops.read(hw, NVM_COMB_VER_OFF + comb_offset,

sys/dev/igc/igc_nvm.c

766

hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);

sys/dev/igc/igc_nvm.c

769

hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);

sys/dev/igc/igc_nvm.c

790

hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl);

sys/dev/igc/igc_nvm.c

791

hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh);

sys/dev/igc/igc_nvm.c

795

hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh);

sys/dev/igc/igc_nvm.c

796

hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl);

sys/dev/igc/igc_nvm.c

81

static void igc_raise_eec_clk(struct igc_hw *hw, u32 *eecd)

sys/dev/igc/igc_nvm.c

84

IGC_WRITE_REG(hw, IGC_EECD, *eecd);

sys/dev/igc/igc_nvm.c

85

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_nvm.c

86

usec_delay(hw->nvm.delay_usec);

sys/dev/igc/igc_nvm.c

96

static void igc_lower_eec_clk(struct igc_hw *hw, u32 *eecd)

sys/dev/igc/igc_nvm.c

99

IGC_WRITE_REG(hw, IGC_EECD, *eecd);

sys/dev/igc/igc_nvm.h

26

void igc_init_nvm_ops_generic(struct igc_hw *hw);

sys/dev/igc/igc_nvm.h

27

s32 igc_null_read_nvm(struct igc_hw *hw, u16 a, u16 b, u16 *c);

sys/dev/igc/igc_nvm.h

28

void igc_null_nvm_generic(struct igc_hw *hw);

sys/dev/igc/igc_nvm.h

29

s32 igc_null_led_default(struct igc_hw *hw, u16 *data);

sys/dev/igc/igc_nvm.h

30

s32 igc_null_write_nvm(struct igc_hw *hw, u16 a, u16 b, u16 *c);

sys/dev/igc/igc_nvm.h

31

s32 igc_acquire_nvm_generic(struct igc_hw *hw);

sys/dev/igc/igc_nvm.h

33

s32 igc_poll_eerd_eewr_done(struct igc_hw *hw, int ee_reg);

sys/dev/igc/igc_nvm.h

34

s32 igc_read_mac_addr_generic(struct igc_hw *hw);

sys/dev/igc/igc_nvm.h

35

s32 igc_read_pba_string_generic(struct igc_hw *hw, u8 *pba_num,

sys/dev/igc/igc_nvm.h

37

s32 igc_read_nvm_eerd(struct igc_hw *hw, u16 offset, u16 words,

sys/dev/igc/igc_nvm.h

39

s32 igc_valid_led_default_generic(struct igc_hw *hw, u16 *data);

sys/dev/igc/igc_nvm.h

40

s32 igc_validate_nvm_checksum_generic(struct igc_hw *hw);

sys/dev/igc/igc_nvm.h

41

s32 igc_write_nvm_spi(struct igc_hw *hw, u16 offset, u16 words,

sys/dev/igc/igc_nvm.h

43

s32 igc_update_nvm_checksum_generic(struct igc_hw *hw);

sys/dev/igc/igc_nvm.h

44

void igc_release_nvm_generic(struct igc_hw *hw);

sys/dev/igc/igc_nvm.h

45

void igc_get_fw_version(struct igc_hw *hw,

sys/dev/igc/igc_osdep.h

100

((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \

sys/dev/igc/igc_osdep.h

101

IGC_REGISTER(hw, reg), value)

sys/dev/igc/igc_osdep.h

103

#define IGC_READ_REG_ARRAY(hw, reg, index) \

sys/dev/igc/igc_osdep.h

104

bus_space_read_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/igc/igc_osdep.h

105

((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \

sys/dev/igc/igc_osdep.h

106

IGC_REGISTER(hw, reg) + ((index)<< 2))

sys/dev/igc/igc_osdep.h

108

#define IGC_WRITE_REG_ARRAY(hw, reg, index, value) \

sys/dev/igc/igc_osdep.h

109

bus_space_write_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/igc/igc_osdep.h

110

((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \

sys/dev/igc/igc_osdep.h

111

IGC_REGISTER(hw, reg) + ((index)<< 2), value)

sys/dev/igc/igc_osdep.h

116

#define IGC_READ_REG_ARRAY_BYTE(hw, reg, index) \

sys/dev/igc/igc_osdep.h

117

bus_space_read_1(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/igc/igc_osdep.h

118

((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \

sys/dev/igc/igc_osdep.h

119

IGC_REGISTER(hw, reg) + index)

sys/dev/igc/igc_osdep.h

121

#define IGC_WRITE_REG_ARRAY_BYTE(hw, reg, index, value) \

sys/dev/igc/igc_osdep.h

122

bus_space_write_1(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/igc/igc_osdep.h

123

((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \

sys/dev/igc/igc_osdep.h

124

IGC_REGISTER(hw, reg) + index, value)

sys/dev/igc/igc_osdep.h

126

#define IGC_WRITE_REG_ARRAY_WORD(hw, reg, index, value) \

sys/dev/igc/igc_osdep.h

127

bus_space_write_2(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/igc/igc_osdep.h

128

((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \

sys/dev/igc/igc_osdep.h

129

IGC_REGISTER(hw, reg) + (index << 1), value)

sys/dev/igc/igc_osdep.h

77

#define IGC_REGISTER(hw, reg) reg

sys/dev/igc/igc_osdep.h

82

#define IGC_READ_OFFSET(hw, offset) \

sys/dev/igc/igc_osdep.h

83

bus_space_read_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/igc/igc_osdep.h

84

((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, offset)

sys/dev/igc/igc_osdep.h

87

#define IGC_WRITE_OFFSET(hw, offset, value) \

sys/dev/igc/igc_osdep.h

88

bus_space_write_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/igc/igc_osdep.h

89

((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, offset, value)

sys/dev/igc/igc_osdep.h

93

#define IGC_READ_REG(hw, reg) \

sys/dev/igc/igc_osdep.h

94

bus_space_read_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/igc/igc_osdep.h

95

((struct igc_osdep *)(hw)->back)->mem_bus_space_handle, \

sys/dev/igc/igc_osdep.h

96

IGC_REGISTER(hw, reg))

sys/dev/igc/igc_osdep.h

98

#define IGC_WRITE_REG(hw, reg, value) \

sys/dev/igc/igc_osdep.h

99

bus_space_write_4(((struct igc_osdep *)(hw)->back)->mem_bus_space_tag, \

sys/dev/igc/igc_phy.c

10

static s32 igc_wait_autoneg(struct igc_hw *hw);

sys/dev/igc/igc_phy.c

1011

static s32 __igc_access_xmdio_reg(struct igc_hw *hw, u16 address,

sys/dev/igc/igc_phy.c

1018

ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, dev_addr);

sys/dev/igc/igc_phy.c

1022

ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAAD, address);

sys/dev/igc/igc_phy.c

1026

ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, IGC_MMDAC_FUNC_DATA |

sys/dev/igc/igc_phy.c

1032

ret_val = hw->phy.ops.read_reg(hw, IGC_MMDAAD, data);

sys/dev/igc/igc_phy.c

1034

ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAAD, *data);

sys/dev/igc/igc_phy.c

1039

ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, 0);

sys/dev/igc/igc_phy.c

1053

s32 igc_read_xmdio_reg(struct igc_hw *hw, u16 addr, u8 dev_addr, u16 *data)

sys/dev/igc/igc_phy.c

1057

return __igc_access_xmdio_reg(hw, addr, dev_addr, data, true);

sys/dev/igc/igc_phy.c

1067

s32 igc_write_xmdio_reg(struct igc_hw *hw, u16 addr, u8 dev_addr, u16 data)

sys/dev/igc/igc_phy.c

1071

return __igc_access_xmdio_reg(hw, addr, dev_addr, &data, false);

sys/dev/igc/igc_phy.c

112

s32 igc_check_reset_block_generic(struct igc_hw *hw)

sys/dev/igc/igc_phy.c

118

manc = IGC_READ_REG(hw, IGC_MANC);

sys/dev/igc/igc_phy.c

131

s32 igc_get_phy_id(struct igc_hw *hw)

sys/dev/igc/igc_phy.c

133

struct igc_phy_info *phy = &hw->phy;

sys/dev/igc/igc_phy.c

142

ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);

sys/dev/igc/igc_phy.c

148

ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);

sys/dev/igc/igc_phy.c

167

s32 igc_read_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 *data)

sys/dev/igc/igc_phy.c

169

struct igc_phy_info *phy = &hw->phy;

sys/dev/igc/igc_phy.c

18

void igc_init_phy_ops_generic(struct igc_hw *hw)

sys/dev/igc/igc_phy.c

187

IGC_WRITE_REG(hw, IGC_MDIC, mdic);

sys/dev/igc/igc_phy.c

195

mdic = IGC_READ_REG(hw, IGC_MDIC);

sys/dev/igc/igc_phy.c

20

struct igc_phy_info *phy = &hw->phy;

sys/dev/igc/igc_phy.c

226

s32 igc_write_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 data)

sys/dev/igc/igc_phy.c

228

struct igc_phy_info *phy = &hw->phy;

sys/dev/igc/igc_phy.c

247

IGC_WRITE_REG(hw, IGC_MDIC, mdic);

sys/dev/igc/igc_phy.c

255

mdic = IGC_READ_REG(hw, IGC_MDIC);

sys/dev/igc/igc_phy.c

286

static s32 igc_phy_setup_autoneg(struct igc_hw *hw)

sys/dev/igc/igc_phy.c

288

struct igc_phy_info *phy = &hw->phy;

sys/dev/igc/igc_phy.c

299

ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);

sys/dev/igc/igc_phy.c

305

ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL,

sys/dev/igc/igc_phy.c

313

ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK <<

sys/dev/igc/igc_phy.c

404

switch (hw->fc.current_mode) {

sys/dev/igc/igc_phy.c

441

ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);

sys/dev/igc/igc_phy.c

448

ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL,

sys/dev/igc/igc_phy.c

452

ret_val = phy->ops.write_reg(hw,

sys/dev/igc/igc_phy.c

470

static s32 igc_copper_link_autoneg(struct igc_hw *hw)

sys/dev/igc/igc_phy.c

472

struct igc_phy_info *phy = &hw->phy;

sys/dev/igc/igc_phy.c

49

s32 igc_null_set_page(struct igc_hw IGC_UNUSEDARG *hw,

sys/dev/igc/igc_phy.c

490

ret_val = igc_phy_setup_autoneg(hw);

sys/dev/igc/igc_phy.c

500

ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);

sys/dev/igc/igc_phy.c

505

ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);

sys/dev/igc/igc_phy.c

513

ret_val = igc_wait_autoneg(hw);

sys/dev/igc/igc_phy.c

520

hw->mac.get_link_status = true;

sys/dev/igc/igc_phy.c

534

s32 igc_setup_copper_link_generic(struct igc_hw *hw)

sys/dev/igc/igc_phy.c

541

if (hw->mac.autoneg) {

sys/dev/igc/igc_phy.c

545

ret_val = igc_copper_link_autoneg(hw);

sys/dev/igc/igc_phy.c

553

ret_val = hw->phy.ops.force_speed_duplex(hw);

sys/dev/igc/igc_phy.c

563

ret_val = igc_phy_has_link_generic(hw, COPPER_LINK_UP_LIMIT, 10,

sys/dev/igc/igc_phy.c

570

hw->mac.ops.config_collision_dist(hw);

sys/dev/igc/igc_phy.c

571

ret_val = igc_config_fc_after_link_up_generic(hw);

sys/dev/igc/igc_phy.c

591

void igc_phy_force_speed_duplex_setup(struct igc_hw *hw, u16 *phy_ctrl)

sys/dev/igc/igc_phy.c

593

struct igc_mac_info *mac = &hw->mac;

sys/dev/igc/igc_phy.c

599

hw->fc.current_mode = igc_fc_none;

sys/dev/igc/igc_phy.c

602

ctrl = IGC_READ_REG(hw, IGC_CTRL);

sys/dev/igc/igc_phy.c

62

s32 igc_null_read_reg(struct igc_hw IGC_UNUSEDARG *hw,

sys/dev/igc/igc_phy.c

635

hw->mac.ops.config_collision_dist(hw);

sys/dev/igc/igc_phy.c

637

IGC_WRITE_REG(hw, IGC_CTRL, ctrl);

sys/dev/igc/igc_phy.c

654

s32 igc_set_d3_lplu_state_generic(struct igc_hw *hw, bool active)

sys/dev/igc/igc_phy.c

656

struct igc_phy_info *phy = &hw->phy;

sys/dev/igc/igc_phy.c

662

if (!hw->phy.ops.read_reg)

sys/dev/igc/igc_phy.c

665

ret_val = phy->ops.read_reg(hw, IGP02IGC_PHY_POWER_MGMT, &data);

sys/dev/igc/igc_phy.c

671

ret_val = phy->ops.write_reg(hw, IGP02IGC_PHY_POWER_MGMT,

sys/dev/igc/igc_phy.c

681

ret_val = phy->ops.read_reg(hw,

sys/dev/igc/igc_phy.c

688

ret_val = phy->ops.write_reg(hw,

sys/dev/igc/igc_phy.c

694

ret_val = phy->ops.read_reg(hw,

sys/dev/igc/igc_phy.c

701

ret_val = phy->ops.write_reg(hw,

sys/dev/igc/igc_phy.c

711

ret_val = phy->ops.write_reg(hw, IGP02IGC_PHY_POWER_MGMT,

sys/dev/igc/igc_phy.c

717

ret_val = phy->ops.read_reg(hw, IGP01IGC_PHY_PORT_CONFIG,

sys/dev/igc/igc_phy.c

723

ret_val = phy->ops.write_reg(hw, IGP01IGC_PHY_PORT_CONFIG,

sys/dev/igc/igc_phy.c

73

void igc_null_phy_generic(struct igc_hw IGC_UNUSEDARG *hw)

sys/dev/igc/igc_phy.c

738

s32 igc_check_downshift_generic(struct igc_hw *hw)

sys/dev/igc/igc_phy.c

740

struct igc_phy_info *phy = &hw->phy;

sys/dev/igc/igc_phy.c

763

static s32 igc_wait_autoneg(struct igc_hw *hw)

sys/dev/igc/igc_phy.c

770

if (!hw->phy.ops.read_reg)

sys/dev/igc/igc_phy.c

775

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/igc/igc_phy.c

778

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/igc/igc_phy.c

801

s32 igc_phy_has_link_generic(struct igc_hw *hw, u32 iterations,

sys/dev/igc/igc_phy.c

809

if (!hw->phy.ops.read_reg)

sys/dev/igc/igc_phy.c

817

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/igc/igc_phy.c

828

ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);

sys/dev/igc/igc_phy.c

84

s32 igc_null_lplu_state(struct igc_hw IGC_UNUSEDARG *hw,

sys/dev/igc/igc_phy.c

853

s32 igc_phy_hw_reset_generic(struct igc_hw *hw)

sys/dev/igc/igc_phy.c

855

struct igc_phy_info *phy = &hw->phy;

sys/dev/igc/igc_phy.c

862

ret_val = phy->ops.check_reset_block(hw);

sys/dev/igc/igc_phy.c

867

ret_val = phy->ops.acquire(hw);

sys/dev/igc/igc_phy.c

871

phpm = IGC_READ_REG(hw, IGC_I225_PHPM);

sys/dev/igc/igc_phy.c

873

ctrl = IGC_READ_REG(hw, IGC_CTRL);

sys/dev/igc/igc_phy.c

874

IGC_WRITE_REG(hw, IGC_CTRL, ctrl | IGC_CTRL_PHY_RST);

sys/dev/igc/igc_phy.c

875

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_phy.c

879

IGC_WRITE_REG(hw, IGC_CTRL, ctrl);

sys/dev/igc/igc_phy.c

880

IGC_WRITE_FLUSH(hw);

sys/dev/igc/igc_phy.c

885

phpm = IGC_READ_REG(hw, IGC_I225_PHPM);

sys/dev/igc/igc_phy.c

893

phy->ops.release(hw);

sys/dev/igc/igc_phy.c

906

void igc_power_up_phy_copper(struct igc_hw *hw)

sys/dev/igc/igc_phy.c

911

hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);

sys/dev/igc/igc_phy.c

913

hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);

sys/dev/igc/igc_phy.c

925

void igc_power_down_phy_copper(struct igc_hw *hw)

sys/dev/igc/igc_phy.c

930

hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);

sys/dev/igc/igc_phy.c

932

hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);

sys/dev/igc/igc_phy.c

944

s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data)

sys/dev/igc/igc_phy.c

954

ret_val = hw->phy.ops.acquire(hw);

sys/dev/igc/igc_phy.c

957

ret_val = igc_write_phy_reg_mdic(hw, offset, data);

sys/dev/igc/igc_phy.c

960

hw->phy.ops.release(hw);

sys/dev/igc/igc_phy.c

962

ret_val = igc_write_xmdio_reg(hw, (u16)offset, dev_addr,

sys/dev/igc/igc_phy.c

97

s32 igc_null_write_reg(struct igc_hw IGC_UNUSEDARG *hw,

sys/dev/igc/igc_phy.c

978

s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data)

sys/dev/igc/igc_phy.c

988

ret_val = hw->phy.ops.acquire(hw);

sys/dev/igc/igc_phy.c

991

ret_val = igc_read_phy_reg_mdic(hw, offset, data);

sys/dev/igc/igc_phy.c

994

hw->phy.ops.release(hw);

sys/dev/igc/igc_phy.c

996

ret_val = igc_read_xmdio_reg(hw, (u16)offset, dev_addr,

sys/dev/igc/igc_phy.h

10

void igc_init_phy_ops_generic(struct igc_hw *hw);

sys/dev/igc/igc_phy.h

11

s32 igc_null_read_reg(struct igc_hw *hw, u32 offset, u16 *data);

sys/dev/igc/igc_phy.h

12

void igc_null_phy_generic(struct igc_hw *hw);

sys/dev/igc/igc_phy.h

13

s32 igc_null_lplu_state(struct igc_hw *hw, bool active);

sys/dev/igc/igc_phy.h

14

s32 igc_null_write_reg(struct igc_hw *hw, u32 offset, u16 data);

sys/dev/igc/igc_phy.h

15

s32 igc_null_set_page(struct igc_hw *hw, u16 data);

sys/dev/igc/igc_phy.h

16

s32 igc_check_downshift_generic(struct igc_hw *hw);

sys/dev/igc/igc_phy.h

17

s32 igc_check_reset_block_generic(struct igc_hw *hw);

sys/dev/igc/igc_phy.h

18

s32 igc_get_phy_id(struct igc_hw *hw);

sys/dev/igc/igc_phy.h

19

void igc_phy_force_speed_duplex_setup(struct igc_hw *hw, u16 *phy_ctrl);

sys/dev/igc/igc_phy.h

20

s32 igc_phy_hw_reset_generic(struct igc_hw *hw);

sys/dev/igc/igc_phy.h

21

s32 igc_phy_reset_dsp_generic(struct igc_hw *hw);

sys/dev/igc/igc_phy.h

22

s32 igc_set_d3_lplu_state_generic(struct igc_hw *hw, bool active);

sys/dev/igc/igc_phy.h

23

s32 igc_setup_copper_link_generic(struct igc_hw *hw);

sys/dev/igc/igc_phy.h

24

s32 igc_phy_has_link_generic(struct igc_hw *hw, u32 iterations,

sys/dev/igc/igc_phy.h

27

s32 igc_determine_phy_address(struct igc_hw *hw);

sys/dev/igc/igc_phy.h

28

s32 igc_enable_phy_wakeup_reg_access_bm(struct igc_hw *hw, u16 *phy_reg);

sys/dev/igc/igc_phy.h

29

s32 igc_disable_phy_wakeup_reg_access_bm(struct igc_hw *hw, u16 *phy_reg);

sys/dev/igc/igc_phy.h

30

void igc_power_up_phy_copper(struct igc_hw *hw);

sys/dev/igc/igc_phy.h

31

void igc_power_down_phy_copper(struct igc_hw *hw);

sys/dev/igc/igc_phy.h

32

s32 igc_read_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 *data);

sys/dev/igc/igc_phy.h

33

s32 igc_write_phy_reg_mdic(struct igc_hw *hw, u32 offset, u16 data);

sys/dev/igc/igc_phy.h

35

s32 igc_read_xmdio_reg(struct igc_hw *hw, u16 addr, u8 dev_addr,

sys/dev/igc/igc_phy.h

37

s32 igc_write_xmdio_reg(struct igc_hw *hw, u16 addr, u8 dev_addr,

sys/dev/igc/igc_phy.h

39

s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data);

sys/dev/igc/igc_phy.h

40

s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data);

sys/dev/igc/igc_txrx.c

351

IGC_WRITE_REG(&sc->hw, IGC_TDT(txr->me), pidx);

sys/dev/igc/igc_txrx.c

443

IGC_WRITE_REG(&sc->hw, IGC_RDT(rxr->me), pidx);

sys/dev/iicbus/iichid.c

1021

struct hid_device_info *hw)

sys/dev/iicbus/iichid.c

1025

hw->idBus = BUS_I2C;

sys/dev/iicbus/iichid.c

1026

hw->idVendor = le16toh(desc->wVendorID);

sys/dev/iicbus/iichid.c

1027

hw->idProduct = le16toh(desc->wProductID);

sys/dev/iicbus/iichid.c

1028

hw->idVersion = le16toh(desc->wVersionID);

sys/dev/iicbus/iichid.c

1035

strlcpy(hw->idPnP, device_info->HardwareId.String,

sys/dev/iicbus/iichid.c

1037

snprintf(hw->name, sizeof(hw->name), "%s:%02lX %04X:%04X",

sys/dev/iicbus/iichid.c

1046

strlcpy(hw->serial, "", sizeof(hw->serial));

sys/dev/iicbus/iichid.c

1047

hw->rdescsize = le16toh(desc->wReportDescLength);

sys/dev/iicbus/iichid.c

1049

hid_add_dynamic_quirk(hw, HQ_NOWRITE);

sys/dev/iicbus/iichid.c

1109

if (iichid_fill_device_info(&sc->desc, handle, &sc->hw) != 0) {

sys/dev/iicbus/iichid.c

1114

if (hid_test_quirk(&sc->hw, HQ_HID_IGNORE))

sys/dev/iicbus/iichid.c

1120

device_set_descf(dev, "%s I2C HID device", sc->hw.name);

sys/dev/iicbus/iichid.c

1197

hid_add_dynamic_quirk(&sc->hw, HQ_IICHID_SAMPLING);

sys/dev/iicbus/iichid.c

1241

device_set_ivars(child, &sc->hw);

sys/dev/iicbus/iichid.c

166

struct hid_device_info hw;

sys/dev/irdma/fbsd_kcompat.c

1111

irdma_allocate_dma_mem(struct irdma_hw *hw, struct irdma_dma_mem *mem,

sys/dev/irdma/fbsd_kcompat.c

1114

struct irdma_dev_ctx *dev_ctx = (struct irdma_dev_ctx *)hw->dev_context;

sys/dev/irdma/fbsd_kcompat.c

1173

irdma_free_dma_mem(struct irdma_hw *hw, struct irdma_dma_mem *mem)

sys/dev/irdma/fbsd_kcompat.c

1207

irdma_free_dma_mem(rf->sc_dev.hw, &iwqp->q2_ctx_mem);

sys/dev/irdma/fbsd_kcompat.c

1208

irdma_free_dma_mem(rf->sc_dev.hw, &iwqp->kqp.dma_mem);

sys/dev/irdma/fbsd_kcompat.c

156

hw_to_dev(struct irdma_hw *hw)

sys/dev/irdma/fbsd_kcompat.c

160

rf = container_of(hw, struct irdma_pci_f, hw);

sys/dev/irdma/fbsd_kcompat.c

611

val = rd32(&rf->hw, GL_RDPU_CNTRL);

sys/dev/irdma/fbsd_kcompat.c

617

wr32(&rf->hw, GL_RDPU_CNTRL, val);

sys/dev/irdma/fbsd_kcompat.c

618

val = rd32(&rf->hw, GL_RDPU_CNTRL);

sys/dev/irdma/icrdma.c

547

rf->hw.dev_context = &rf->dev_ctx;

sys/dev/irdma/icrdma.c

548

rf->hw.hw_addr = (u8 *)rman_get_virtual(peer->pci_mem);

sys/dev/irdma/icrdma_hw.c

207

hw_addr = dev->hw->hw_addr;

sys/dev/irdma/icrdma_hw.c

239

disable_tx_spad(dev->hw);

sys/dev/irdma/icrdma_hw.c

240

disable_prefetch(dev->hw);

sys/dev/irdma/icrdma_hw.c

241

rdpu_ackreqpmthresh(dev->hw);

sys/dev/irdma/icrdma_hw.c

276

temp = rd32(vsi->dev->hw, rx_pause_enable + 4 * fn_id);

sys/dev/irdma/icrdma_hw.c

278

temp = rd32(vsi->dev->hw, tx_pause_enable + 4 * fn_id);

sys/dev/irdma/icrdma_hw.c

280

lfc &= rd32(vsi->dev->hw,

sys/dev/irdma/icrdma_hw.c

293

value = rd32(vsi->dev->hw, reg_offset);

sys/dev/irdma/icrdma_hw.c

317

pause = (rd32(vsi->dev->hw, rx_pause_enable + 4 * fn_id) >>

sys/dev/irdma/icrdma_hw.c

319

pause &= (rd32(vsi->dev->hw, tx_pause_enable + 4 * fn_id) >>

sys/dev/irdma/icrdma_hw.c

40

void disable_prefetch(struct irdma_hw *hw);

sys/dev/irdma/icrdma_hw.c

407

disable_prefetch(struct irdma_hw *hw)

sys/dev/irdma/icrdma_hw.c

411

wr32(hw, GLPE_WQMTXIDXADDR, 0x12);

sys/dev/irdma/icrdma_hw.c

414

wqm_data = rd32(hw, GLPE_WQMTXIDXDATA);

sys/dev/irdma/icrdma_hw.c

416

wr32(hw, GLPE_WQMTXIDXDATA, wqm_data);

sys/dev/irdma/icrdma_hw.c

42

void disable_tx_spad(struct irdma_hw *hw);

sys/dev/irdma/icrdma_hw.c

420

disable_tx_spad(struct irdma_hw *hw)

sys/dev/irdma/icrdma_hw.c

424

wr32(hw, GLPE_WQMTXIDXADDR, 0x12);

sys/dev/irdma/icrdma_hw.c

427

wqm_data = rd32(hw, GLPE_WQMTXIDXDATA);

sys/dev/irdma/icrdma_hw.c

429

wr32(hw, GLPE_WQMTXIDXDATA, wqm_data);

sys/dev/irdma/icrdma_hw.c

434

rdpu_ackreqpmthresh(struct irdma_hw *hw)

sys/dev/irdma/icrdma_hw.c

438

val = rd32(hw, GL_RDPU_CNTRL);

sys/dev/irdma/icrdma_hw.c

44

void rdpu_ackreqpmthresh(struct irdma_hw *hw);

sys/dev/irdma/icrdma_hw.c

441

wr32(hw, GL_RDPU_CNTRL, val);

sys/dev/irdma/irdma_cm.c

3685

irdma_free_dma_mem(iwdev->rf->sc_dev.hw,

sys/dev/irdma/irdma_cm.c

3747

iwqp->ietf_mem.va = irdma_allocate_dma_mem(dev->hw, &iwqp->ietf_mem,

sys/dev/irdma/irdma_ctrl.c

2028

vsi->pestat->hw = vsi->dev->hw;

sys/dev/irdma/irdma_ctrl.c

2033

stats_buff_mem->va = irdma_allocate_dma_mem(vsi->pestat->hw,

sys/dev/irdma/irdma_ctrl.c

2064

irdma_free_dma_mem(vsi->pestat->hw,

sys/dev/irdma/irdma_ctrl.c

3197

cqp->sdbuf.va = irdma_allocate_dma_mem(cqp->dev->hw, &cqp->sdbuf,

sys/dev/irdma/irdma_ctrl.c

3279

irdma_free_dma_mem(cqp->dev->hw, &cqp->sdbuf);

sys/dev/irdma/irdma_ctrl.c

3360

irdma_free_dma_mem(cqp->dev->hw, &cqp->sdbuf);

sys/dev/irdma/irdma_ctrl.c

4767

feat_buf.va = irdma_allocate_dma_mem(dev->hw, &feat_buf, feat_buf.size,

sys/dev/irdma/irdma_ctrl.c

4784

irdma_free_dma_mem(dev->hw, &feat_buf);

sys/dev/irdma/irdma_ctrl.c

4786

feat_buf.va = irdma_allocate_dma_mem(dev->hw, &feat_buf,

sys/dev/irdma/irdma_ctrl.c

4819

irdma_free_dma_mem(dev->hw, &feat_buf);

sys/dev/irdma/irdma_ctrl.c

5473

dev->hw = info->hw;

sys/dev/irdma/irdma_ctrl.c

5474

dev->hw->hw_addr = info->bar0;

sys/dev/irdma/irdma_hmc.c

305

ret_code = irdma_add_sd_table_entry(dev->hw, info->hmc_info, j,

sys/dev/irdma/irdma_hmc.c

401

irdma_free_dma_mem(dev->hw, mem);

sys/dev/irdma/irdma_hmc.c

523

irdma_add_sd_table_entry(struct irdma_hw *hw,

sys/dev/irdma/irdma_hmc.c

540

dma_mem.va = irdma_allocate_dma_mem(hw, &dma_mem, dma_mem.size,

sys/dev/irdma/irdma_hmc.c

551

irdma_free_dma_mem(hw, &dma_mem);

sys/dev/irdma/irdma_hmc.c

621

page->va = irdma_allocate_dma_mem(dev->hw, page,

sys/dev/irdma/irdma_hmc.c

699

irdma_free_dma_mem(dev->hw, mem);

sys/dev/irdma/irdma_hmc.h

176

int irdma_copy_dma_mem(struct irdma_hw *hw, void *dest_buf,

sys/dev/irdma/irdma_hmc.h

187

int irdma_add_sd_table_entry(struct irdma_hw *hw,

sys/dev/irdma/irdma_hw.c

1003

cqp->sq.va = irdma_allocate_dma_mem(dev->hw, &cqp->sq, cqp->sq.size,

sys/dev/irdma/irdma_hw.c

1069

irdma_free_dma_mem(dev->hw, &cqp->sq);

sys/dev/irdma/irdma_hw.c

1101

ccq->mem_cq.va = irdma_allocate_dma_mem(dev->hw, &ccq->mem_cq,

sys/dev/irdma/irdma_hw.c

1129

irdma_free_dma_mem(dev->hw, &ccq->mem_cq);

sys/dev/irdma/irdma_hw.c

1302

iwceq->mem.va = irdma_allocate_dma_mem(dev->hw, &iwceq->mem,

sys/dev/irdma/irdma_hw.c

1328

irdma_free_dma_mem(dev->hw, &iwceq->mem);

sys/dev/irdma/irdma_hw.c

1467

status = irdma_map_vm_page_list(&rf->hw, aeq->mem.va, pg_arr, pg_cnt);

sys/dev/irdma/irdma_hw.c

1500

aeq->mem.va = irdma_allocate_dma_mem(dev->hw, &aeq->mem, aeq->mem.size,

sys/dev/irdma/irdma_hw.c

1535

irdma_free_dma_mem(dev->hw, &aeq->mem);

sys/dev/irdma/irdma_hw.c

1686

irdma_free_dma_mem(&rf->hw, &rf->obj_mem);

sys/dev/irdma/irdma_hw.c

1725

dev->hmc_info = &rf->hw.hmc;

sys/dev/irdma/irdma_hw.c

1745

info.bar0 = rf->hw.hw_addr;

sys/dev/irdma/irdma_hw.c

1751

info.hw = &rf->hw;

sys/dev/irdma/irdma_hw.c

1830

rf->obj_mem.va = irdma_allocate_dma_mem(&rf->hw, &rf->obj_mem,

sys/dev/irdma/irdma_hw.c

1856

irdma_free_dma_mem(&rf->hw, &rf->obj_mem);

sys/dev/irdma/irdma_hw.c

646

irdma_free_dma_mem(dev->hw, &cqp->sq);

sys/dev/irdma/irdma_hw.c

660

irdma_unmap_vm_page_list(&rf->hw, pg_arr, pg_cnt);

sys/dev/irdma/irdma_hw.c

696

irdma_free_dma_mem(dev->hw, &aeq->mem);

sys/dev/irdma/irdma_hw.c

730

irdma_free_dma_mem(dev->hw, &iwceq->mem);

sys/dev/irdma/irdma_hw.c

789

irdma_free_dma_mem(rf->sc_dev.hw, &iwceq->mem);

sys/dev/irdma/irdma_hw.c

814

irdma_free_dma_mem(dev->hw, &ccq->mem_cq);

sys/dev/irdma/irdma_kcompat.c

1066

iwcq->kmem.va = irdma_allocate_dma_mem(dev->hw, &iwcq->kmem,

sys/dev/irdma/irdma_kcompat.c

1074

iwcq->kmem_shadow.va = irdma_allocate_dma_mem(dev->hw,

sys/dev/irdma/irdma_kcompat.c

1137

irdma_free_dma_mem(dev->hw, &iwcq->kmem);

sys/dev/irdma/irdma_kcompat.c

1138

irdma_free_dma_mem(dev->hw, &iwcq->kmem_shadow);

sys/dev/irdma/irdma_kcompat.c

672

irdma_free_dma_mem(rf->sc_dev.hw, &iwqp->q2_ctx_mem);

sys/dev/irdma/irdma_kcompat.c

673

irdma_free_dma_mem(rf->sc_dev.hw, &iwqp->kqp.dma_mem);

sys/dev/irdma/irdma_kcompat.c

745

iwqp->q2_ctx_mem.va = irdma_allocate_dma_mem(dev->hw, &iwqp->q2_ctx_mem,

sys/dev/irdma/irdma_main.h

337

struct irdma_hw hw;

sys/dev/irdma/irdma_pble.c

134

ret_code = irdma_add_sd_table_entry(dev->hw, hmc_info,

sys/dev/irdma/irdma_pble.c

192

status = irdma_add_sd_table_entry(dev->hw, hmc_info, info->idx.sd_idx,

sys/dev/irdma/irdma_protos.h

102

void *irdma_allocate_dma_mem(struct irdma_hw *hw, struct irdma_dma_mem *mem,

sys/dev/irdma/irdma_protos.h

104

void *irdma_allocate_virt_mem(struct irdma_hw *hw, struct irdma_virt_mem *mem, u32 size);

sys/dev/irdma/irdma_protos.h

105

int irdma_free_dma_mem(struct irdma_hw *hw, struct irdma_dma_mem *mem);

sys/dev/irdma/irdma_puda.c

1043

buf->mem.va = irdma_allocate_dma_mem(rsrc->dev->hw, &buf->mem,

sys/dev/irdma/irdma_puda.c

1242

dma_sync_single_for_device(hw_to_dev(qp->dev->hw), buf->mem.pa, buf->mem.size, DMA_BIDIRECTIONAL);

sys/dev/irdma/irdma_puda.c

126

dma_sync_single_for_device(hw_to_dev(rsrc->dev->hw), buf->mem.pa, buf->mem.size, DMA_BIDIRECTIONAL);

sys/dev/irdma/irdma_puda.c

195

buf->mem.pa = dma_map_single(hw_to_dev(dev->hw), buf->mem.va, buf->mem.size, DMA_BIDIRECTIONAL);

sys/dev/irdma/irdma_puda.c

196

if (dma_mapping_error(hw_to_dev(dev->hw), buf->mem.pa)) {

sys/dev/irdma/irdma_puda.c

221

irdma_free_dma_mem(dev->hw, &buf->mem);

sys/dev/irdma/irdma_puda.c

406

dma_sync_single_for_cpu(hw_to_dev(dev->hw), buf->mem.pa, buf->mem.size, DMA_BIDIRECTIONAL);

sys/dev/irdma/irdma_puda.c

436

dma_sync_single_for_cpu(hw_to_dev(dev->hw), buf->mem.pa, buf->mem.size, DMA_BIDIRECTIONAL);

sys/dev/irdma/irdma_puda.c

596

dma_sync_single_for_cpu(hw_to_dev(rsrc->dev->hw), buf->mem.pa, buf->mem.size, DMA_BIDIRECTIONAL);

sys/dev/irdma/irdma_puda.c

709

rsrc->qpmem.va = irdma_allocate_dma_mem(rsrc->dev->hw, &rsrc->qpmem,

sys/dev/irdma/irdma_puda.c

746

irdma_free_dma_mem(rsrc->dev->hw, &rsrc->qpmem);

sys/dev/irdma/irdma_puda.c

763

irdma_free_dma_mem(rsrc->dev->hw, &rsrc->qpmem);

sys/dev/irdma/irdma_puda.c

841

rsrc->cqmem.va = irdma_allocate_dma_mem(dev->hw, &rsrc->cqmem,

sys/dev/irdma/irdma_puda.c

872

irdma_free_dma_mem(dev->hw, &rsrc->cqmem);

sys/dev/irdma/irdma_puda.c

989

irdma_free_dma_mem(dev->hw, &rsrc->qpmem);

sys/dev/irdma/irdma_puda.c

995

irdma_free_dma_mem(dev->hw, &rsrc->cqmem);

sys/dev/irdma/irdma_type.h

342

struct irdma_hw *hw;

sys/dev/irdma/irdma_type.h

633

struct irdma_hw *hw;

sys/dev/irdma/irdma_type.h

766

struct irdma_hw *hw;

sys/dev/irdma/irdma_utils.c

2122

irdma_map_vm_page_list(struct irdma_hw *hw, void *va, dma_addr_t * pg_dma,

sys/dev/irdma/irdma_utils.c

2135

pg_dma[i] = dma_map_page(hw_to_dev(hw), vm_page, 0, PAGE_SIZE, DMA_BIDIRECTIONAL);

sys/dev/irdma/irdma_utils.c

2136

if (dma_mapping_error(hw_to_dev(hw), pg_dma[i]))

sys/dev/irdma/irdma_utils.c

2145

irdma_unmap_vm_page_list(hw, pg_dma, i);

sys/dev/irdma/irdma_utils.c

2150

irdma_unmap_vm_page_list(struct irdma_hw *hw, dma_addr_t * pg_dma, u32 pg_cnt)

sys/dev/irdma/irdma_utils.c

2155

dma_unmap_page(hw_to_dev(hw), pg_dma[i], PAGE_SIZE, DMA_BIDIRECTIONAL);

sys/dev/irdma/irdma_utils.c

2168

irdma_unmap_vm_page_list(chunk->dev->hw, chunk->dmainfo.dmaaddrs,

sys/dev/irdma/irdma_utils.c

2199

if (irdma_map_vm_page_list(chunk->dev->hw, va, chunk->dmainfo.dmaaddrs,

sys/dev/irdma/irdma_utils.c

2349

dma_mem.va = irdma_allocate_dma_mem(dev->hw, &dma_mem, dma_mem.size, PAGE_SIZE);

sys/dev/irdma/irdma_utils.c

2378

irdma_free_dma_mem(dev->hw, &dma_mem);

sys/dev/irdma/irdma_verbs.c

1424

irdma_free_dma_mem(rf->sc_dev.hw, &iwcq->kmem);

sys/dev/irdma/irdma_verbs.c

1425

irdma_free_dma_mem(rf->sc_dev.hw, &iwcq->kmem_shadow);

sys/dev/irdma/irdma_verbs.c

1440

irdma_free_dma_mem(cq_buf->hw, &cq_buf->kmem_buf);

sys/dev/irdma/irdma_verbs.c

1557

kmem_buf.va = irdma_allocate_dma_mem(dev->hw, &kmem_buf,

sys/dev/irdma/irdma_verbs.c

1597

cq_buf->hw = dev->hw;

sys/dev/irdma/irdma_verbs.c

1611

irdma_free_dma_mem(dev->hw, &kmem_buf);

sys/dev/irdma/irdma_verbs.c

3094

dma_mem_mc->va = irdma_allocate_dma_mem(&rf->hw, dma_mem_mc,

sys/dev/irdma/irdma_verbs.c

3150

irdma_free_dma_mem(&rf->hw,

sys/dev/irdma/irdma_verbs.c

3213

irdma_free_dma_mem(&rf->hw,

sys/dev/irdma/irdma_verbs.c

518

mem->va = irdma_allocate_dma_mem(&iwdev->rf->hw, mem, mem->size,

sys/dev/irdma/irdma_verbs.h

117

struct irdma_hw *hw;

sys/dev/irdma/osdep.h

195

void *hw_to_dev(struct irdma_hw *hw);

sys/dev/irdma/osdep.h

234

void irdma_unmap_vm_page_list(struct irdma_hw *hw, u64 *pg_arr, u32 pg_cnt);

sys/dev/irdma/osdep.h

235

int irdma_map_vm_page_list(struct irdma_hw *hw, void *va,

sys/dev/iwi/if_iwi.c

1570

uint32_t hw;

sys/dev/iwi/if_iwi.c

1572

hw = CSR_READ_4(sc, IWI_CSR_RX_RIDX);

sys/dev/iwi/if_iwi.c

1574

for (; sc->rxq.cur != hw;) {

sys/dev/iwi/if_iwi.c

1604

hw = (hw == 0) ? IWI_RX_RING_COUNT - 1 : hw - 1;

sys/dev/iwi/if_iwi.c

1605

CSR_WRITE_4(sc, IWI_CSR_RX_WIDX, hw);

sys/dev/iwi/if_iwi.c

1612

uint32_t hw;

sys/dev/iwi/if_iwi.c

1614

hw = CSR_READ_4(sc, txq->csr_ridx);

sys/dev/iwi/if_iwi.c

1616

while (txq->next != hw) {

sys/dev/iwm/if_iwm.c

2267

const uint16_t *hw, *sw, *calib, *regulatory, *mac_override, *phy_sku;

sys/dev/iwm/if_iwm.c

2303

hw = (const uint16_t *) sections[sc->cfg->nvm_hw_section_num].data;

sys/dev/iwm/if_iwm.c

2314

return iwm_parse_nvm_data(sc, hw, sw, calib, mac_override,

sys/dev/iwm/if_iwm.c

5633

uint16_t hw;

sys/dev/iwm/if_iwm.c

5646

hw = le16toh(sc->rxq.stat->closed_rb_num) & 0xfff;

sys/dev/iwm/if_iwm.c

5651

while (sc->rxq.cur != hw) {

sys/dev/iwm/if_iwm.c

5659

"%s: hw = %d cur = %d\n", __func__, hw, ring->cur);

sys/dev/iwm/if_iwm.c

5671

hw = (hw == 0) ? count - 1 : hw - 1;

sys/dev/iwm/if_iwm.c

5672

IWM_WRITE(sc, wreg, rounddown2(hw, 8));

sys/dev/iwn/if_iwn.c

3980

uint16_t hw;

sys/dev/iwn/if_iwn.c

3986

hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;

sys/dev/iwn/if_iwn.c

3987

while (sc->rxq.cur != hw) {

sys/dev/iwn/if_iwn.c

4150

hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;

sys/dev/iwn/if_iwn.c

4151

IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);

sys/dev/iwx/if_iwx.c

9455

uint16_t hw;

sys/dev/iwx/if_iwx.c

9462

hw = le16toh(*status) & 0xfff;

sys/dev/iwx/if_iwx.c

9464

hw = le16toh(sc->rxq.stat->closed_rb_num) & 0xfff;

sys/dev/iwx/if_iwx.c

9465

hw &= (IWX_RX_MQ_RING_COUNT - 1);

sys/dev/iwx/if_iwx.c

9466

while (sc->rxq.cur != hw) {

sys/dev/iwx/if_iwx.c

9480

hw = (hw == 0) ? IWX_RX_MQ_RING_COUNT - 1 : hw - 1;

sys/dev/iwx/if_iwx.c

9481

IWX_WRITE(sc, IWX_RFH_Q0_FRBDCB_WIDX_TRG, hw & ~7);

sys/dev/ixgbe/if_bypass.c

118

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_bypass.c

127

if ((error = hw->mac.ops.bypass_rw(hw, cmd, &version) != 0))

sys/dev/ixgbe/if_bypass.c

131

if ((error = hw->mac.ops.bypass_rw(hw, cmd, &version) != 0))

sys/dev/ixgbe/if_bypass.c

158

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_bypass.c

164

error = hw->mac.ops.bypass_rw(hw, BYPASS_PAGE_CTL0, &state);

sys/dev/ixgbe/if_bypass.c

184

if ((error = hw->mac.ops.bypass_set(hw, BYPASS_PAGE_CTL0,

sys/dev/ixgbe/if_bypass.c

188

error = hw->mac.ops.bypass_set(hw, BYPASS_PAGE_CTL0,

sys/dev/ixgbe/if_bypass.c

219

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_bypass.c

225

error = hw->mac.ops.bypass_rw(hw, BYPASS_PAGE_CTL0, &timeout);

sys/dev/ixgbe/if_bypass.c

248

error = hw->mac.ops.bypass_set(hw, BYPASS_PAGE_CTL0,

sys/dev/ixgbe/if_bypass.c

262

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_bypass.c

267

error = hw->mac.ops.bypass_rw(hw, BYPASS_PAGE_CTL0, &main_on);

sys/dev/ixgbe/if_bypass.c

290

error = hw->mac.ops.bypass_set(hw, BYPASS_PAGE_CTL0,

sys/dev/ixgbe/if_bypass.c

304

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_bypass.c

309

error = hw->mac.ops.bypass_rw(hw, BYPASS_PAGE_CTL0, &main_off);

sys/dev/ixgbe/if_bypass.c

332

error = hw->mac.ops.bypass_set(hw, BYPASS_PAGE_CTL0,

sys/dev/ixgbe/if_bypass.c

346

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_bypass.c

351

error = hw->mac.ops.bypass_rw(hw, BYPASS_PAGE_CTL0, &aux_on);

sys/dev/ixgbe/if_bypass.c

374

error = hw->mac.ops.bypass_set(hw, BYPASS_PAGE_CTL0,

sys/dev/ixgbe/if_bypass.c

388

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_bypass.c

393

error = hw->mac.ops.bypass_rw(hw, BYPASS_PAGE_CTL0, &aux_off);

sys/dev/ixgbe/if_bypass.c

416

error = hw->mac.ops.bypass_set(hw, BYPASS_PAGE_CTL0,

sys/dev/ixgbe/if_bypass.c

435

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_bypass.c

442

error = hw->mac.ops.bypass_rw(hw, BYPASS_PAGE_CTL0, &tmp);

sys/dev/ixgbe/if_bypass.c

491

error = hw->mac.ops.bypass_set(hw, BYPASS_PAGE_CTL0, mask, arg);

sys/dev/ixgbe/if_bypass.c

506

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_bypass.c

524

error = hw->mac.ops.bypass_rw(hw, cmd, &reset_wd);

sys/dev/ixgbe/if_bypass.c

532

if (hw->mac.ops.bypass_rw(hw, BYPASS_PAGE_CTL1, &reset_wd)) {

sys/dev/ixgbe/if_bypass.c

536

} while (!hw->mac.ops.bypass_valid_rd(cmd, reset_wd));

sys/dev/ixgbe/if_bypass.c

552

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_bypass.c

573

error = hw->mac.ops.bypass_rw(hw, cmd, &status);

sys/dev/ixgbe/if_bypass.c

582

error = hw->mac.ops.bypass_rw(hw, cmd, &status);

sys/dev/ixgbe/if_bypass.c

602

error = hw->mac.ops.bypass_rd_eep(hw, log_off + i,

sys/dev/ixgbe/if_bypass.c

611

error = hw->mac.ops.bypass_rd_eep(hw,

sys/dev/ixgbe/if_bypass.c

682

error = hw->mac.ops.bypass_rw(hw, cmd, &status);

sys/dev/ixgbe/if_bypass.c

716

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_bypass.c

737

hw->mac.ops.bypass_set(hw, BYPASS_PAGE_CTL1, mask, value);

sys/dev/ixgbe/if_fdir.c

141

ixgbe_fdir_add_signature_filter_82599(&sc->hw,

sys/dev/ixgbe/if_fdir.c

46

sc->hw.mac.ops.setup_rxpba(&sc->hw, 0, hdrm,

sys/dev/ixgbe/if_fdir.c

48

ixgbe_init_fdir_signature_82599(&sc->hw, fdir_pballoc);

sys/dev/ixgbe/if_fdir.c

62

ixgbe_reinit_fdir_tables_82599(&sc->hw);

sys/dev/ixgbe/if_fdir.c

65

IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);

sys/dev/ixgbe/if_ix.c

1004

sc->hw.back = sc;

sys/dev/ixgbe/if_ix.c

1009

hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

1012

hw->vendor_id = pci_get_vendor(dev);

sys/dev/ixgbe/if_ix.c

1013

hw->device_id = pci_get_device(dev);

sys/dev/ixgbe/if_ix.c

1014

hw->revision_id = pci_get_revid(dev);

sys/dev/ixgbe/if_ix.c

1015

hw->subsystem_vendor_id = pci_get_subvendor(dev);

sys/dev/ixgbe/if_ix.c

1016

hw->subsystem_device_id = pci_get_subdevice(dev);

sys/dev/ixgbe/if_ix.c

1025

ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);

sys/dev/ixgbe/if_ix.c

1027

IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);

sys/dev/ixgbe/if_ix.c

1032

if (ixgbe_init_shared_code(hw) != 0) {

sys/dev/ixgbe/if_ix.c

1038

if (hw->mac.type == ixgbe_mac_E610)

sys/dev/ixgbe/if_ix.c

1039

ixgbe_init_aci(hw);

sys/dev/ixgbe/if_ix.c

1043

if (hw->mac.ops.fw_recovery_mode &&

sys/dev/ixgbe/if_ix.c

1044

hw->mac.ops.fw_recovery_mode(hw)) {

sys/dev/ixgbe/if_ix.c

1055

if (hw->mac.type >= ixgbe_mac_82599_vf) {

sys/dev/ixgbe/if_ix.c

1057

hw->mbx.ops[i].init_params(hw);

sys/dev/ixgbe/if_ix.c

1060

hw->allow_unsupported_sfp = allow_unsupported_sfp;

sys/dev/ixgbe/if_ix.c

1062

if (hw->mac.type != ixgbe_mac_82598EB)

sys/dev/ixgbe/if_ix.c

1063

hw->phy.smart_speed = ixgbe_smart_speed;

sys/dev/ixgbe/if_ix.c

1072

u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/if_ix.c

1077

ixgbe_init_swfw_semaphore(hw);

sys/dev/ixgbe/if_ix.c

1081

hw->mac.ops.setup_eee(hw, true);

sys/dev/ixgbe/if_ix.c

1084

hw->fc.requested_mode = ixgbe_flow_control;

sys/dev/ixgbe/if_ix.c

1086

hw->phy.reset_if_overtemp = true;

sys/dev/ixgbe/if_ix.c

1087

error = ixgbe_reset_hw(hw);

sys/dev/ixgbe/if_ix.c

1088

hw->phy.reset_if_overtemp = false;

sys/dev/ixgbe/if_ix.c

1108

if (ixgbe_validate_eeprom_checksum(&sc->hw, NULL) < 0) {

sys/dev/ixgbe/if_ix.c

1114

error = ixgbe_start_hw(hw);

sys/dev/ixgbe/if_ix.c

1136

if (hw->mac.type == ixgbe_mac_E610) {

sys/dev/ixgbe/if_ix.c

1141

ixgbe_fwlog_set_support_ena(hw);

sys/dev/ixgbe/if_ix.c

1146

iflib_set_mac(ctx, hw->mac.addr);

sys/dev/ixgbe/if_ix.c

1147

switch (sc->hw.mac.type) {

sys/dev/ixgbe/if_ix.c

1172

if (sc->hw.mac.type == ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

1192

ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT);

sys/dev/ixgbe/if_ix.c

1194

IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext);

sys/dev/ixgbe/if_ix.c

1197

if (hw->mac.type == ixgbe_mac_E610)

sys/dev/ixgbe/if_ix.c

1198

ixgbe_shutdown_aci(hw);

sys/dev/ixgbe/if_ix.c

1217

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_ix.c

1222

hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

1245

ixgbe_enable_tx_laser(hw);

sys/dev/ixgbe/if_ix.c

1248

ixgbe_set_phy_power(hw, true);

sys/dev/ixgbe/if_ix.c

1318

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

1322

sc->wol_support = hw->wol_enabled = 0;

sys/dev/ixgbe/if_ix.c

1323

ixgbe_get_device_caps(hw, &dev_caps);

sys/dev/ixgbe/if_ix.c

1326

hw->bus.func == 0))

sys/dev/ixgbe/if_ix.c

1327

sc->wol_support = hw->wol_enabled = 1;

sys/dev/ixgbe/if_ix.c

1330

sc->wufc = IXGBE_READ_REG(hw, IXGBE_WUFC);

sys/dev/ixgbe/if_ix.c

1352

sc->phy_layer = ixgbe_get_supported_physical_layer(&sc->hw);

sys/dev/ixgbe/if_ix.c

1402

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

1405

if (hw->phy.ops.read_i2c_byte == NULL)

sys/dev/ixgbe/if_ix.c

1408

hw->phy.ops.read_i2c_byte(hw, req->offset + i,

sys/dev/ixgbe/if_ix.c

1500

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

1554

error = ixgbe_handle_nvm_access(hw, cmd, data);

sys/dev/ixgbe/if_ix.c

1583

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

1646

error = ixgbe_aci_get_internal_data(hw, dd_cmd->cluster_id,

sys/dev/ixgbe/if_ix.c

1681

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

1685

layer = sc->phy_layer = ixgbe_get_supported_physical_layer(hw);

sys/dev/ixgbe/if_ix.c

1701

if (hw->mac.type == ixgbe_mac_X550) {

sys/dev/ixgbe/if_ix.c

1715

if (hw->phy.multispeed_fiber)

sys/dev/ixgbe/if_ix.c

1721

if (hw->phy.multispeed_fiber)

sys/dev/ixgbe/if_ix.c

1765

if (hw->device_id == IXGBE_DEV_ID_82598AT) {

sys/dev/ixgbe/if_ix.c

1778

ixgbe_is_sfp(struct ixgbe_hw *hw)

sys/dev/ixgbe/if_ix.c

1780

switch (hw->mac.type) {

sys/dev/ixgbe/if_ix.c

1782

if (hw->phy.type == ixgbe_phy_nl)

sys/dev/ixgbe/if_ix.c

1786

switch (hw->mac.ops.get_media_type(hw)) {

sys/dev/ixgbe/if_ix.c

1796

if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber)

sys/dev/ixgbe/if_ix.c

1811

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

1815

sfp = ixgbe_is_sfp(hw);

sys/dev/ixgbe/if_ix.c

1821

if (hw->mac.ops.check_link)

sys/dev/ixgbe/if_ix.c

1822

err = ixgbe_check_link(hw, &sc->link_speed,

sys/dev/ixgbe/if_ix.c

1826

autoneg = hw->phy.autoneg_advertised;

sys/dev/ixgbe/if_ix.c

1827

if ((!autoneg) && (hw->mac.ops.get_link_capabilities))

sys/dev/ixgbe/if_ix.c

1828

err = hw->mac.ops.get_link_capabilities(hw, &autoneg,

sys/dev/ixgbe/if_ix.c

1833

if (hw->mac.type == ixgbe_mac_X550 &&

sys/dev/ixgbe/if_ix.c

1834

hw->phy.autoneg_advertised == 0) {

sys/dev/ixgbe/if_ix.c

1862

if (hw->mac.type == ixgbe_mac_E610) {

sys/dev/ixgbe/if_ix.c

1863

hw->phy.ops.init(hw);

sys/dev/ixgbe/if_ix.c

1871

if (hw->mac.ops.setup_link)

sys/dev/ixgbe/if_ix.c

1872

err = hw->mac.ops.setup_link(hw, autoneg,

sys/dev/ixgbe/if_ix.c

1883

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

1889

stats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);

sys/dev/ixgbe/if_ix.c

1890

stats->illerrc += IXGBE_READ_REG(hw, IXGBE_ILLERRC);

sys/dev/ixgbe/if_ix.c

1891

stats->errbc += IXGBE_READ_REG(hw, IXGBE_ERRBC);

sys/dev/ixgbe/if_ix.c

1892

stats->mspdc += IXGBE_READ_REG(hw, IXGBE_MSPDC);

sys/dev/ixgbe/if_ix.c

1893

stats->mpc[0] += IXGBE_READ_REG(hw, IXGBE_MPC(0));

sys/dev/ixgbe/if_ix.c

1896

stats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));

sys/dev/ixgbe/if_ix.c

1897

stats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));

sys/dev/ixgbe/if_ix.c

1898

stats->qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));

sys/dev/ixgbe/if_ix.c

1900

stats->mlfc += IXGBE_READ_REG(hw, IXGBE_MLFC);

sys/dev/ixgbe/if_ix.c

1901

stats->mrfc += IXGBE_READ_REG(hw, IXGBE_MRFC);

sys/dev/ixgbe/if_ix.c

1902

stats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);

sys/dev/ixgbe/if_ix.c

1905

stats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);

sys/dev/ixgbe/if_ix.c

1908

if (hw->mac.type != ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

1909

stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL) +

sys/dev/ixgbe/if_ix.c

1910

((u64)IXGBE_READ_REG(hw, IXGBE_GORCH) << 32);

sys/dev/ixgbe/if_ix.c

1911

stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL) +

sys/dev/ixgbe/if_ix.c

1912

((u64)IXGBE_READ_REG(hw, IXGBE_GOTCH) << 32);

sys/dev/ixgbe/if_ix.c

1913

stats->tor += IXGBE_READ_REG(hw, IXGBE_TORL) +

sys/dev/ixgbe/if_ix.c

1914

((u64)IXGBE_READ_REG(hw, IXGBE_TORH) << 32);

sys/dev/ixgbe/if_ix.c

1915

stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);

sys/dev/ixgbe/if_ix.c

1916

lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);

sys/dev/ixgbe/if_ix.c

1919

stats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);

sys/dev/ixgbe/if_ix.c

1920

lxoffrxc = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);

sys/dev/ixgbe/if_ix.c

1923

stats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);

sys/dev/ixgbe/if_ix.c

1924

stats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);

sys/dev/ixgbe/if_ix.c

1925

stats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);

sys/dev/ixgbe/if_ix.c

1939

bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);

sys/dev/ixgbe/if_ix.c

1941

stats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);

sys/dev/ixgbe/if_ix.c

1942

if (hw->mac.type == ixgbe_mac_82598EB)

sys/dev/ixgbe/if_ix.c

1945

stats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);

sys/dev/ixgbe/if_ix.c

1946

stats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);

sys/dev/ixgbe/if_ix.c

1947

stats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);

sys/dev/ixgbe/if_ix.c

1948

stats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);

sys/dev/ixgbe/if_ix.c

1949

stats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);

sys/dev/ixgbe/if_ix.c

1950

stats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);

sys/dev/ixgbe/if_ix.c

1952

lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);

sys/dev/ixgbe/if_ix.c

1954

lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);

sys/dev/ixgbe/if_ix.c

1958

stats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);

sys/dev/ixgbe/if_ix.c

1959

stats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);

sys/dev/ixgbe/if_ix.c

1960

stats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);

sys/dev/ixgbe/if_ix.c

1966

stats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);

sys/dev/ixgbe/if_ix.c

1967

stats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);

sys/dev/ixgbe/if_ix.c

1968

stats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);

sys/dev/ixgbe/if_ix.c

1969

stats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);

sys/dev/ixgbe/if_ix.c

1970

stats->mngprc += IXGBE_READ_REG(hw, IXGBE_MNGPRC);

sys/dev/ixgbe/if_ix.c

1971

stats->mngpdc += IXGBE_READ_REG(hw, IXGBE_MNGPDC);

sys/dev/ixgbe/if_ix.c

1972

stats->mngptc += IXGBE_READ_REG(hw, IXGBE_MNGPTC);

sys/dev/ixgbe/if_ix.c

1973

stats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);

sys/dev/ixgbe/if_ix.c

1974

stats->tpt += IXGBE_READ_REG(hw, IXGBE_TPT);

sys/dev/ixgbe/if_ix.c

1975

stats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);

sys/dev/ixgbe/if_ix.c

1976

stats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);

sys/dev/ixgbe/if_ix.c

1977

stats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);

sys/dev/ixgbe/if_ix.c

1978

stats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);

sys/dev/ixgbe/if_ix.c

1979

stats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);

sys/dev/ixgbe/if_ix.c

1980

stats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);

sys/dev/ixgbe/if_ix.c

1981

stats->xec += IXGBE_READ_REG(hw, IXGBE_XEC);

sys/dev/ixgbe/if_ix.c

1982

stats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);

sys/dev/ixgbe/if_ix.c

1983

stats->fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST);

sys/dev/ixgbe/if_ix.c

1985

if (hw->mac.type != ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

1986

stats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);

sys/dev/ixgbe/if_ix.c

1987

stats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);

sys/dev/ixgbe/if_ix.c

1988

stats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);

sys/dev/ixgbe/if_ix.c

1989

stats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);

sys/dev/ixgbe/if_ix.c

1990

stats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);

sys/dev/ixgbe/if_ix.c

2226

val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDH(txr->me));

sys/dev/ixgbe/if_ix.c

2252

val = IXGBE_READ_REG(&txr->sc->hw, IXGBE_TDT(txr->me));

sys/dev/ixgbe/if_ix.c

2278

val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDH(rxr->me));

sys/dev/ixgbe/if_ix.c

2304

val = IXGBE_READ_REG(&rxr->sc->hw, IXGBE_RDT(rxr->me));

sys/dev/ixgbe/if_ix.c

2360

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

2378

if (hw->mac.type != ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

2379

ctrl = IXGBE_READ_REG(hw,

sys/dev/ixgbe/if_ix.c

2382

IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me),

sys/dev/ixgbe/if_ix.c

2387

ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);

sys/dev/ixgbe/if_ix.c

2391

if (hw->mac.type == ixgbe_mac_82598EB)

sys/dev/ixgbe/if_ix.c

2393

IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl);

sys/dev/ixgbe/if_ix.c

2402

if (hw->mac.type != ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

2403

ctrl = IXGBE_READ_REG(hw,

sys/dev/ixgbe/if_ix.c

2406

IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me),

sys/dev/ixgbe/if_ix.c

2421

IXGBE_WRITE_REG(hw, IXGBE_VFTA(i),

sys/dev/ixgbe/if_ix.c

2424

ctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);

sys/dev/ixgbe/if_ix.c

2430

if (hw->mac.type == ixgbe_mac_82598EB)

sys/dev/ixgbe/if_ix.c

2432

IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, ctrl);

sys/dev/ixgbe/if_ix.c

2445

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

2451

switch (hw->device_id) {

sys/dev/ixgbe/if_ix.c

2459

ixgbe_get_bus_info(hw);

sys/dev/ixgbe/if_ix.c

2465

switch (hw->mac.type) {

sys/dev/ixgbe/if_ix.c

2496

ixgbe_get_bus_info(hw);

sys/dev/ixgbe/if_ix.c

2501

ixgbe_set_pci_config_data_generic(hw, link);

sys/dev/ixgbe/if_ix.c

2505

((hw->bus.speed == ixgbe_bus_speed_16000) ? "16.0GT/s" :

sys/dev/ixgbe/if_ix.c

2506

(hw->bus.speed == ixgbe_bus_speed_8000) ? "8.0GT/s" :

sys/dev/ixgbe/if_ix.c

2507

(hw->bus.speed == ixgbe_bus_speed_5000) ? "5.0GT/s" :

sys/dev/ixgbe/if_ix.c

2508

(hw->bus.speed == ixgbe_bus_speed_2500) ? "2.5GT/s" :

sys/dev/ixgbe/if_ix.c

2510

((hw->bus.width == ixgbe_bus_width_pcie_x8) ? "x8" :

sys/dev/ixgbe/if_ix.c

2511

(hw->bus.width == ixgbe_bus_width_pcie_x4) ? "x4" :

sys/dev/ixgbe/if_ix.c

2512

(hw->bus.width == ixgbe_bus_width_pcie_x1) ? "x1" :

sys/dev/ixgbe/if_ix.c

2516

if ((hw->device_id != IXGBE_DEV_ID_82599_SFP_SF_QP) &&

sys/dev/ixgbe/if_ix.c

2517

((hw->bus.width <= ixgbe_bus_width_pcie_x4) &&

sys/dev/ixgbe/if_ix.c

2518

(hw->bus.speed == ixgbe_bus_speed_2500))) {

sys/dev/ixgbe/if_ix.c

2526

if ((hw->device_id == IXGBE_DEV_ID_82599_SFP_SF_QP) &&

sys/dev/ixgbe/if_ix.c

2527

((hw->bus.width <= ixgbe_bus_width_pcie_x8) &&

sys/dev/ixgbe/if_ix.c

2528

(hw->bus.speed < ixgbe_bus_speed_8000))) {

sys/dev/ixgbe/if_ix.c

2621

IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(que->msix),

sys/dev/ixgbe/if_ix.c

2652

if (sc->hw.mac.type == ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

2705

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

2849

if (hw->fc.current_mode == ixgbe_fc_rx_pause ||

sys/dev/ixgbe/if_ix.c

2850

hw->fc.current_mode == ixgbe_fc_full)

sys/dev/ixgbe/if_ix.c

2852

if (hw->fc.current_mode == ixgbe_fc_tx_pause ||

sys/dev/ixgbe/if_ix.c

2853

hw->fc.current_mode == ixgbe_fc_full)

sys/dev/ixgbe/if_ix.c

2868

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

2876

if (hw->phy.media_type == ixgbe_media_type_backplane)

sys/dev/ixgbe/if_ix.c

2936

hw->mac.autotry_restart = true;

sys/dev/ixgbe/if_ix.c

2937

hw->mac.ops.setup_link(hw, speed, true);

sys/dev/ixgbe/if_ix.c

2965

rctl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL);

sys/dev/ixgbe/if_ix.c

2975

IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl);

sys/dev/ixgbe/if_ix.c

2979

IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl);

sys/dev/ixgbe/if_ix.c

2983

IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, rctl);

sys/dev/ixgbe/if_ix.c

2995

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

3002

IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_OTHER);

sys/dev/ixgbe/if_ix.c

3005

eicr = IXGBE_READ_REG(hw, IXGBE_EICS);

sys/dev/ixgbe/if_ix.c

3009

IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);

sys/dev/ixgbe/if_ix.c

3013

IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);

sys/dev/ixgbe/if_ix.c

3018

IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FW_EVENT);

sys/dev/ixgbe/if_ix.c

3022

if (sc->hw.mac.type != ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

3029

IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_FLOW_DIR);

sys/dev/ixgbe/if_ix.c

3035

hw->mac.flags |=

sys/dev/ixgbe/if_ix.c

3037

ixgbe_reset_hw(hw);

sys/dev/ixgbe/if_ix.c

3038

IXGBE_WRITE_REG(hw, IXGBE_EICR,

sys/dev/ixgbe/if_ix.c

3044

switch (sc->hw.mac.type) {

sys/dev/ixgbe/if_ix.c

3048

IXGBE_WRITE_REG(hw, IXGBE_EIMC,

sys/dev/ixgbe/if_ix.c

3050

IXGBE_WRITE_REG(hw, IXGBE_EICR,

sys/dev/ixgbe/if_ix.c

3052

retval = hw->phy.ops.check_overtemp(hw);

sys/dev/ixgbe/if_ix.c

3064

retval = hw->phy.ops.check_overtemp(hw);

sys/dev/ixgbe/if_ix.c

3072

IXGBE_WRITE_REG(hw, IXGBE_EICR,

sys/dev/ixgbe/if_ix.c

3089

if (hw->mac.type != ixgbe_mac_E610 && ixgbe_is_sfp(hw)) {

sys/dev/ixgbe/if_ix.c

3091

if (hw->mac.type >= ixgbe_mac_X540)

sys/dev/ixgbe/if_ix.c

3094

eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);

sys/dev/ixgbe/if_ix.c

3097

IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);

sys/dev/ixgbe/if_ix.c

3101

if ((hw->mac.type == ixgbe_mac_82599EB) &&

sys/dev/ixgbe/if_ix.c

3102

(eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {

sys/dev/ixgbe/if_ix.c

3103

IXGBE_WRITE_REG(hw, IXGBE_EICR,

sys/dev/ixgbe/if_ix.c

3104

IXGBE_EICR_GPI_SDP1_BY_MAC(hw));

sys/dev/ixgbe/if_ix.c

3112

IXGBE_WRITE_REG(hw, IXGBE_EICR,

sys/dev/ixgbe/if_ix.c

3113

IXGBE_EICR_GPI_SDP1_BY_MAC(hw));

sys/dev/ixgbe/if_ix.c

3117

if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&

sys/dev/ixgbe/if_ix.c

3119

IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0_X540);

sys/dev/ixgbe/if_ix.c

3140

reg = IXGBE_READ_REG(&que->sc->hw, IXGBE_EITR(que->msix));

sys/dev/ixgbe/if_ix.c

3157

IXGBE_WRITE_REG(&que->sc->hw, IXGBE_EITR(que->msix), reg);

sys/dev/ixgbe/if_ix.c

3171

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

3198

error = ixgbe_aci_get_internal_data(hw, cluster_id, table_id,

sys/dev/ixgbe/if_ix.c

3205

__func__, error, hw->aci.last_status);

sys/dev/ixgbe/if_ix.c

3431

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

3487

if (hw->mac.type >= ixgbe_mac_X550)

sys/dev/ixgbe/if_ix.c

3494

if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {

sys/dev/ixgbe/if_ix.c

3507

if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) {

sys/dev/ixgbe/if_ix.c

3562

sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle;

sys/dev/ixgbe/if_ix.c

3593

ctrl_ext = IXGBE_READ_REG(&sc->hw, IXGBE_CTRL_EXT);

sys/dev/ixgbe/if_ix.c

3595

IXGBE_WRITE_REG(&sc->hw, IXGBE_CTRL_EXT, ctrl_ext);

sys/dev/ixgbe/if_ix.c

3599

if (sc->hw.mac.type == ixgbe_mac_E610) {

sys/dev/ixgbe/if_ix.c

3601

ixgbe_shutdown_aci(&sc->hw);

sys/dev/ixgbe/if_ix.c

3620

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

3624

if (!hw->wol_enabled)

sys/dev/ixgbe/if_ix.c

3625

ixgbe_set_phy_power(hw, false);

sys/dev/ixgbe/if_ix.c

3628

if (hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T &&

sys/dev/ixgbe/if_ix.c

3629

hw->phy.ops.enter_lplu) {

sys/dev/ixgbe/if_ix.c

3631

IXGBE_WRITE_REG(hw, IXGBE_GRC_BY_MAC(hw),

sys/dev/ixgbe/if_ix.c

3632

IXGBE_READ_REG(hw, IXGBE_GRC_BY_MAC(hw)) & ~(u32)2);

sys/dev/ixgbe/if_ix.c

3639

IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);

sys/dev/ixgbe/if_ix.c

3645

IXGBE_WRITE_REG(hw, IXGBE_WUFC, sc->wufc);

sys/dev/ixgbe/if_ix.c

3648

IXGBE_WRITE_REG(hw, IXGBE_WUC,

sys/dev/ixgbe/if_ix.c

3652

hw->phy.reset_disable = true;

sys/dev/ixgbe/if_ix.c

3654

error = hw->phy.ops.enter_lplu(hw);

sys/dev/ixgbe/if_ix.c

3658

hw->phy.reset_disable = false;

sys/dev/ixgbe/if_ix.c

3710

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

3716

wus = IXGBE_READ_REG(hw, IXGBE_WUS);

sys/dev/ixgbe/if_ix.c

3719

IXGBE_READ_REG(hw, IXGBE_WUS));

sys/dev/ixgbe/if_ix.c

3720

IXGBE_WRITE_REG(hw, IXGBE_WUS, 0xffffffff);

sys/dev/ixgbe/if_ix.c

3722

IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);

sys/dev/ixgbe/if_ix.c

3763

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

3774

hl = IXGBE_READ_REG(hw, IXGBE_HLREG0);

sys/dev/ixgbe/if_ix.c

3775

rxc = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);

sys/dev/ixgbe/if_ix.c

3798

IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hl);

sys/dev/ixgbe/if_ix.c

3799

IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rxc);

sys/dev/ixgbe/if_ix.c

3818

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

3833

ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, IXGBE_RAH_AV);

sys/dev/ixgbe/if_ix.c

3836

bcopy(if_getlladdr(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS);

sys/dev/ixgbe/if_ix.c

3837

ixgbe_set_rar(hw, 0, hw->mac.addr, sc->pool, 1);

sys/dev/ixgbe/if_ix.c

3838

hw->addr_ctrl.rar_used_count = 1;

sys/dev/ixgbe/if_ix.c

3840

ixgbe_init_hw(hw);

sys/dev/ixgbe/if_ix.c

3867

mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);

sys/dev/ixgbe/if_ix.c

3870

IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);

sys/dev/ixgbe/if_ix.c

3878

txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me));

sys/dev/ixgbe/if_ix.c

3890

IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl);

sys/dev/ixgbe/if_ix.c

3897

rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me));

sys/dev/ixgbe/if_ix.c

3898

if (hw->mac.type == ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

3908

IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl);

sys/dev/ixgbe/if_ix.c

3910

if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) &

sys/dev/ixgbe/if_ix.c

3920

rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);

sys/dev/ixgbe/if_ix.c

3921

if (hw->mac.type == ixgbe_mac_82598EB)

sys/dev/ixgbe/if_ix.c

3924

ixgbe_enable_rx_dma(hw, rxctrl);

sys/dev/ixgbe/if_ix.c

3930

if (hw->mac.type == ixgbe_mac_82598EB)

sys/dev/ixgbe/if_ix.c

3931

IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);

sys/dev/ixgbe/if_ix.c

3933

IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);

sys/dev/ixgbe/if_ix.c

3934

IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);

sys/dev/ixgbe/if_ix.c

3939

IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);

sys/dev/ixgbe/if_ix.c

3948

if (hw->phy.type == ixgbe_phy_none) {

sys/dev/ixgbe/if_ix.c

3949

err = hw->phy.ops.identify(hw);

sys/dev/ixgbe/if_ix.c

3958

IXGBE_WRITE_REG(hw, IXGBE_EITR(sc->vector), IXGBE_LINK_ITR);

sys/dev/ixgbe/if_ix.c

3961

ixgbe_set_phy_power(hw, true);

sys/dev/ixgbe/if_ix.c

3970

ixgbe_start_hw(hw);

sys/dev/ixgbe/if_ix.c

3983

ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);

sys/dev/ixgbe/if_ix.c

3985

IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);

sys/dev/ixgbe/if_ix.c

4002

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4007

switch (hw->mac.type) {

sys/dev/ixgbe/if_ix.c

4014

ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));

sys/dev/ixgbe/if_ix.c

4017

IXGBE_WRITE_REG(&sc->hw, IXGBE_IVAR(index), ivar);

sys/dev/ixgbe/if_ix.c

4027

ivar = IXGBE_READ_REG(hw, IXGBE_IVAR_MISC);

sys/dev/ixgbe/if_ix.c

4030

IXGBE_WRITE_REG(hw, IXGBE_IVAR_MISC, ivar);

sys/dev/ixgbe/if_ix.c

4033

ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(entry >> 1));

sys/dev/ixgbe/if_ix.c

4036

IXGBE_WRITE_REG(hw, IXGBE_IVAR(entry >> 1), ivar);

sys/dev/ixgbe/if_ix.c

4071

IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(rx_que->msix), newitr);

sys/dev/ixgbe/if_ix.c

4089

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4092

gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);

sys/dev/ixgbe/if_ix.c

4111

switch (hw->mac.type) {

sys/dev/ixgbe/if_ix.c

4123

IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);

sys/dev/ixgbe/if_ix.c

4135

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4141

switch (hw->mac.type) {

sys/dev/ixgbe/if_ix.c

4153

rxpb = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(0)) >> 10;

sys/dev/ixgbe/if_ix.c

4154

hw->fc.high_water[0] = rxpb - size;

sys/dev/ixgbe/if_ix.c

4157

switch (hw->mac.type) {

sys/dev/ixgbe/if_ix.c

4168

hw->fc.low_water[0] = IXGBE_BT2KB(tmp);

sys/dev/ixgbe/if_ix.c

4170

hw->fc.pause_time = IXGBE_FC_PAUSE;

sys/dev/ixgbe/if_ix.c

4171

hw->fc.send_xon = true;

sys/dev/ixgbe/if_ix.c

4213

ixgbe_update_mc_addr_list(&sc->hw, update_ptr, mcnt,

sys/dev/ixgbe/if_ix.c

4217

fctrl = IXGBE_READ_REG(&sc->hw, IXGBE_FCTRL);

sys/dev/ixgbe/if_ix.c

4228

IXGBE_WRITE_REG(&sc->hw, IXGBE_FCTRL, fctrl);

sys/dev/ixgbe/if_ix.c

4239

ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)

sys/dev/ixgbe/if_ix.c

4270

ixgbe_check_link(&sc->hw, &sc->link_speed, &sc->link_up, 0);

sys/dev/ixgbe/if_ix.c

4284

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4286

if (ixgbe_fw_recovery_mode(hw)) {

sys/dev/ixgbe/if_ix.c

4295

if (hw->adapter_stopped == FALSE)

sys/dev/ixgbe/if_ix.c

4315

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4319

if ((hw->phy.type == ixgbe_phy_nl) &&

sys/dev/ixgbe/if_ix.c

4320

(hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {

sys/dev/ixgbe/if_ix.c

4321

s32 ret = hw->phy.ops.identify_sfp(hw);

sys/dev/ixgbe/if_ix.c

4324

ret = hw->phy.ops.reset(hw);

sys/dev/ixgbe/if_ix.c

4350

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4354

if (sc->hw.need_crosstalk_fix) {

sys/dev/ixgbe/if_ix.c

4355

switch (hw->mac.type) {

sys/dev/ixgbe/if_ix.c

4357

cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &

sys/dev/ixgbe/if_ix.c

4362

cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &

sys/dev/ixgbe/if_ix.c

4373

err = hw->phy.ops.identify_sfp(hw);

sys/dev/ixgbe/if_ix.c

4380

if (hw->mac.type == ixgbe_mac_82598EB)

sys/dev/ixgbe/if_ix.c

4381

err = hw->phy.ops.reset(hw);

sys/dev/ixgbe/if_ix.c

4383

err = hw->mac.ops.setup_sfp(hw);

sys/dev/ixgbe/if_ix.c

4406

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4411

sc->phy_layer = ixgbe_get_supported_physical_layer(hw);

sys/dev/ixgbe/if_ix.c

4413

autoneg = hw->phy.autoneg_advertised;

sys/dev/ixgbe/if_ix.c

4414

if ((!autoneg) && (hw->mac.ops.get_link_capabilities))

sys/dev/ixgbe/if_ix.c

4415

hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiate);

sys/dev/ixgbe/if_ix.c

4416

if (hw->mac.ops.setup_link)

sys/dev/ixgbe/if_ix.c

4417

hw->mac.ops.setup_link(hw, autoneg, true);

sys/dev/ixgbe/if_ix.c

4433

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4436

error = hw->phy.ops.handle_lasi(hw);

sys/dev/ixgbe/if_ix.c

4460

error = ixgbe_configure_lse(&sc->hw, TRUE, mask);

sys/dev/ixgbe/if_ix.c

4475

error = ixgbe_configure_lse(&sc->hw, false, sc->lse_mask);

sys/dev/ixgbe/if_ix.c

4491

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4505

error = ixgbe_aci_get_event(hw, &event, &pending);

sys/dev/ixgbe/if_ix.c

4518

ixgbe_fwlog_event_dump(&sc->hw, &event.desc, event.msg_buf);

sys/dev/ixgbe/if_ix.c

4522

if (hw->adapter_stopped == FALSE)

sys/dev/ixgbe/if_ix.c

4550

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4554

ixgbe_reset_hw(hw);

sys/dev/ixgbe/if_ix.c

4555

hw->adapter_stopped = false;

sys/dev/ixgbe/if_ix.c

4556

ixgbe_stop_adapter(hw);

sys/dev/ixgbe/if_ix.c

4557

if (hw->mac.type == ixgbe_mac_82599EB)

sys/dev/ixgbe/if_ix.c

4558

ixgbe_stop_mac_link_on_d3_82599(hw);

sys/dev/ixgbe/if_ix.c

4560

ixgbe_disable_tx_laser(hw);

sys/dev/ixgbe/if_ix.c

4567

ixgbe_set_rar(&sc->hw, 0, sc->hw.mac.addr, 0, IXGBE_RAH_AV);

sys/dev/ixgbe/if_ix.c

4623

if (sc->hw.mac.type == ixgbe_mac_E610 &&

sys/dev/ixgbe/if_ix.c

4634

ixgbe_fc_enable(&sc->hw);

sys/dev/ixgbe/if_ix.c

4678

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4679

struct ixgbe_dmac_config *dcfg = &hw->mac.dmac_config;

sys/dev/ixgbe/if_ix.c

4681

if (hw->mac.type < ixgbe_mac_X550 || !hw->mac.ops.dmac_config)

sys/dev/ixgbe/if_ix.c

4694

hw->mac.ops.dmac_config(hw);

sys/dev/ixgbe/if_ix.c

4705

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4711

switch (sc->hw.mac.type) {

sys/dev/ixgbe/if_ix.c

4722

fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);

sys/dev/ixgbe/if_ix.c

4735

if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP ||

sys/dev/ixgbe/if_ix.c

4736

hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP ||

sys/dev/ixgbe/if_ix.c

4737

hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N ||

sys/dev/ixgbe/if_ix.c

4738

hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T)

sys/dev/ixgbe/if_ix.c

4739

mask |= IXGBE_EIMS_GPI_SDP0_BY_MAC(hw);

sys/dev/ixgbe/if_ix.c

4740

if (hw->phy.type == ixgbe_phy_x550em_ext_t)

sys/dev/ixgbe/if_ix.c

4761

IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);

sys/dev/ixgbe/if_ix.c

4772

IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask);

sys/dev/ixgbe/if_ix.c

4783

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/if_ix.c

4796

IXGBE_WRITE_REG(&sc->hw, IXGBE_EIAC, 0);

sys/dev/ixgbe/if_ix.c

4797

if (sc->hw.mac.type == ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

4798

IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, ~0);

sys/dev/ixgbe/if_ix.c

4800

IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC, 0xFFFF0000);

sys/dev/ixgbe/if_ix.c

4801

IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(0), ~0);

sys/dev/ixgbe/if_ix.c

4802

IXGBE_WRITE_REG(&sc->hw, IXGBE_EIMC_EX(1), ~0);

sys/dev/ixgbe/if_ix.c

4804

IXGBE_WRITE_FLUSH(&sc->hw);

sys/dev/ixgbe/if_ix.c

4814

struct ixgbe_hw *hw =

sys/dev/ixgbe/if_ix.c

4815

&((struct ixgbe_softc *)iflib_get_softc(ctx))->hw;

sys/dev/ixgbe/if_ix.c

4818

IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);

sys/dev/ixgbe/if_ix.c

4841

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4845

if (hw->mac.type == ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

4847

IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);

sys/dev/ixgbe/if_ix.c

4851

IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);

sys/dev/ixgbe/if_ix.c

4854

IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);

sys/dev/ixgbe/if_ix.c

4864

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4868

if (hw->mac.type == ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

4870

IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);

sys/dev/ixgbe/if_ix.c

4874

IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);

sys/dev/ixgbe/if_ix.c

4877

IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);

sys/dev/ixgbe/if_ix.c

4889

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

4893

eicr = IXGBE_READ_REG(hw, IXGBE_EICR);

sys/dev/ixgbe/if_ix.c

4906

IXGBE_WRITE_REG(hw, IXGBE_EIMS,

sys/dev/ixgbe/if_ix.c

4907

IXGBE_EICR_GPI_SDP1_BY_MAC(hw));

sys/dev/ixgbe/if_ix.c

4912

IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);

sys/dev/ixgbe/if_ix.c

4916

if (ixgbe_is_sfp(hw)) {

sys/dev/ixgbe/if_ix.c

4918

if (hw->mac.type >= ixgbe_mac_X540)

sys/dev/ixgbe/if_ix.c

4921

eicr_mask = IXGBE_EICR_GPI_SDP2_BY_MAC(hw);

sys/dev/ixgbe/if_ix.c

4924

IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);

sys/dev/ixgbe/if_ix.c

4928

if ((hw->mac.type == ixgbe_mac_82599EB) &&

sys/dev/ixgbe/if_ix.c

4929

(eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) {

sys/dev/ixgbe/if_ix.c

4930

IXGBE_WRITE_REG(hw, IXGBE_EICR,

sys/dev/ixgbe/if_ix.c

4931

IXGBE_EICR_GPI_SDP1_BY_MAC(hw));

sys/dev/ixgbe/if_ix.c

4937

if ((hw->phy.type == ixgbe_phy_x550em_ext_t) &&

sys/dev/ixgbe/if_ix.c

4982

fc = sc->hw.fc.requested_mode;

sys/dev/ixgbe/if_ix.c

4989

if (fc == sc->hw.fc.current_mode)

sys/dev/ixgbe/if_ix.c

5022

sc->hw.fc.requested_mode = fc;

sys/dev/ixgbe/if_ix.c

5025

sc->hw.fc.disable_fc_autoneg = true;

sys/dev/ixgbe/if_ix.c

5026

ixgbe_fc_enable(&sc->hw);

sys/dev/ixgbe/if_ix.c

5043

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

5049

srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));

sys/dev/ixgbe/if_ix.c

5051

IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);

sys/dev/ixgbe/if_ix.c

5056

IXGBE_WRITE_REG(hw, IXGBE_QDE,

sys/dev/ixgbe/if_ix.c

5069

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

5075

srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me));

sys/dev/ixgbe/if_ix.c

5077

IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl);

sys/dev/ixgbe/if_ix.c

5082

IXGBE_WRITE_REG(hw, IXGBE_QDE,

sys/dev/ixgbe/if_ix.c

5127

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_ix.c

5137

hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

5140

if (hw->phy.media_type == ixgbe_media_type_backplane)

sys/dev/ixgbe/if_ix.c

5143

if (!((hw->phy.media_type == ixgbe_media_type_copper) ||

sys/dev/ixgbe/if_ix.c

5144

(hw->phy.multispeed_fiber))) {

sys/dev/ixgbe/if_ix.c

5158

if (hw->mac.ops.get_link_capabilities) {

sys/dev/ixgbe/if_ix.c

5159

err = hw->mac.ops.get_link_capabilities(hw, &link_caps,

sys/dev/ixgbe/if_ix.c

5225

hw->mac.autotry_restart = true;

sys/dev/ixgbe/if_ix.c

5226

hw->mac.ops.setup_link(hw, speed, true);

sys/dev/ixgbe/if_ix.c

5247

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

5257

if (!(hw->phy.media_type == ixgbe_media_type_copper) &&

sys/dev/ixgbe/if_ix.c

5258

!(hw->phy.multispeed_fiber))

sys/dev/ixgbe/if_ix.c

5261

err = hw->mac.ops.get_link_capabilities(hw, &link_caps, &negotiate);

sys/dev/ixgbe/if_ix.c

5265

if (hw->mac.type == ixgbe_mac_X550) {

sys/dev/ixgbe/if_ix.c

5395

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

5399

new_wol_enabled = hw->wol_enabled;

sys/dev/ixgbe/if_ix.c

5404

if (new_wol_enabled == hw->wol_enabled)

sys/dev/ixgbe/if_ix.c

5410

hw->wol_enabled = new_wol_enabled;

sys/dev/ixgbe/if_ix.c

5465

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

5482

switch (sc->hw.mac.type) {

sys/dev/ixgbe/if_ix.c

5497

reg = IXGBE_READ_REG(hw, IXGBE_RETA(i));

sys/dev/ixgbe/if_ix.c

5500

reg = IXGBE_READ_REG(hw, IXGBE_ERETA(i - 32));

sys/dev/ixgbe/if_ix.c

5526

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

5532

if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {

sys/dev/ixgbe/if_ix.c

5538

if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP,

sys/dev/ixgbe/if_ix.c

5562

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

5568

if (hw->device_id != IXGBE_DEV_ID_X550EM_X_10G_T) {

sys/dev/ixgbe/if_ix.c

5574

if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS,

sys/dev/ixgbe/if_ix.c

5627

if (sc->hw.mac.type == ixgbe_mac_E610 &&

sys/dev/ixgbe/if_ix.c

5637

retval = ixgbe_setup_eee(&sc->hw, new_eee);

sys/dev/ixgbe/if_ix.c

5682

val = IXGBE_READ_REG(&sc->hw, reg);

sys/dev/ixgbe/if_ix.c

5690

IXGBE_WRITE_REG(&sc->hw, reg, val);

sys/dev/ixgbe/if_ix.c

5709

switch (sc->hw.mac.type) {

sys/dev/ixgbe/if_ix.c

5711

if (sc->hw.device_id == IXGBE_DEV_ID_82598AT)

sys/dev/ixgbe/if_ix.c

5717

if ((sc->hw.device_id == IXGBE_DEV_ID_X540_BYPASS) &&

sys/dev/ixgbe/if_ix.c

5718

(sc->hw.bus.func == 0))

sys/dev/ixgbe/if_ix.c

5731

if (sc->hw.device_id == IXGBE_DEV_ID_X550EM_X_KR)

sys/dev/ixgbe/if_ix.c

5739

if ((sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T) ||

sys/dev/ixgbe/if_ix.c

5740

(sc->hw.device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)) {

sys/dev/ixgbe/if_ix.c

5748

if ((sc->hw.device_id == IXGBE_DEV_ID_82599_BYPASS) &&

sys/dev/ixgbe/if_ix.c

5749

(sc->hw.bus.func == 0))

sys/dev/ixgbe/if_ix.c

5751

if (sc->hw.device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP)

sys/dev/ixgbe/if_ix.c

5758

error = ixgbe_get_caps(&sc->hw);

sys/dev/ixgbe/if_ix.c

5759

if (error == 0 && sc->hw.func_caps.common_cap.eee_support != 0)

sys/dev/ixgbe/if_ix.c

5827

mask = (in_interrupt) ? IXGBE_EICR_GPI_SDP1_BY_MAC(&sc->hw) :

sys/dev/ixgbe/if_ix.c

5839

ixgbe_sbuf_fw_version(struct ixgbe_hw *hw, struct sbuf *buf)

sys/dev/ixgbe/if_ix.c

5844

ixgbe_get_nvm_version(hw, &nvm_ver); /* NVM version */

sys/dev/ixgbe/if_ix.c

5845

ixgbe_get_oem_prod_version(hw, &nvm_ver); /* OEM's NVM version */

sys/dev/ixgbe/if_ix.c

5846

ixgbe_get_etk_id(hw, &nvm_ver); /* eTrack a build ID in Intel's SCM */

sys/dev/ixgbe/if_ix.c

5847

ixgbe_get_orom_version(hw, &nvm_ver); /* Option ROM */

sys/dev/ixgbe/if_ix.c

5906

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

5917

ixgbe_sbuf_fw_version(hw, buf);

sys/dev/ixgbe/if_ix.c

5935

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

5946

ixgbe_sbuf_fw_version(hw, buf);

sys/dev/ixgbe/if_ix.c

638

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

655

switch (sc->hw.mac.type) {

sys/dev/ixgbe/if_ix.c

693

IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);

sys/dev/ixgbe/if_ix.c

695

IXGBE_WRITE_REG(hw,

sys/dev/ixgbe/if_ix.c

703

IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), rss_key[i]);

sys/dev/ixgbe/if_ix.c

742

IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);

sys/dev/ixgbe/if_ix.c

755

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

766

ixgbe_disable_rx(hw);

sys/dev/ixgbe/if_ix.c

769

fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);

sys/dev/ixgbe/if_ix.c

771

if (sc->hw.mac.type == ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

775

IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);

sys/dev/ixgbe/if_ix.c

778

hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0);

sys/dev/ixgbe/if_ix.c

783

IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg);

sys/dev/ixgbe/if_ix.c

796

IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j),

sys/dev/ixgbe/if_ix.c

798

IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32));

sys/dev/ixgbe/if_ix.c

799

IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j),

sys/dev/ixgbe/if_ix.c

803

srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j));

sys/dev/ixgbe/if_ix.c

816

sc->hw.fc.requested_mode == ixgbe_fc_none) {

sys/dev/ixgbe/if_ix.c

822

IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl);

sys/dev/ixgbe/if_ix.c

825

IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0);

sys/dev/ixgbe/if_ix.c

826

IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0);

sys/dev/ixgbe/if_ix.c

832

if (sc->hw.mac.type != ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

837

IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);

sys/dev/ixgbe/if_ix.c

840

rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);

sys/dev/ixgbe/if_ix.c

856

IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);

sys/dev/ixgbe/if_ix.c

867

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

880

IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j),

sys/dev/ixgbe/if_ix.c

882

IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32));

sys/dev/ixgbe/if_ix.c

883

IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j),

sys/dev/ixgbe/if_ix.c

887

IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0);

sys/dev/ixgbe/if_ix.c

888

IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0);

sys/dev/ixgbe/if_ix.c

904

switch (hw->mac.type) {

sys/dev/ixgbe/if_ix.c

906

txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j));

sys/dev/ixgbe/if_ix.c

910

IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j));

sys/dev/ixgbe/if_ix.c

914

switch (hw->mac.type) {

sys/dev/ixgbe/if_ix.c

916

IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl);

sys/dev/ixgbe/if_ix.c

919

IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j),

sys/dev/ixgbe/if_ix.c

926

if (hw->mac.type != ixgbe_mac_82598EB) {

sys/dev/ixgbe/if_ix.c

929

dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);

sys/dev/ixgbe/if_ix.c

931

IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);

sys/dev/ixgbe/if_ix.c

933

rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);

sys/dev/ixgbe/if_ix.c

935

IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);

sys/dev/ixgbe/if_ix.c

936

IXGBE_WRITE_REG(hw, IXGBE_MTQC,

sys/dev/ixgbe/if_ix.c

939

IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);

sys/dev/ixgbe/if_ix.c

947

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix.c

948

if (hw->api_maj_ver > IXGBE_FW_API_VER_MAJOR) {

sys/dev/ixgbe/if_ix.c

954

} else if (hw->api_maj_ver == IXGBE_FW_API_VER_MAJOR &&

sys/dev/ixgbe/if_ix.c

955

hw->api_min_ver > (IXGBE_FW_API_VER_MINOR + 2)) {

sys/dev/ixgbe/if_ix.c

960

} else if (hw->api_maj_ver < IXGBE_FW_API_VER_MAJOR ||

sys/dev/ixgbe/if_ix.c

961

hw->api_min_ver < IXGBE_FW_API_VER_MINOR - 2) {

sys/dev/ixgbe/if_ix.c

994

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_ix_mdio.c

115

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix_mdio.c

118

if (! ixgbe_has_mdio_bus_clause22(hw))

sys/dev/ixgbe/if_ix_mdio.c

122

ret = ixgbe_write_mdio_c22(hw, phy, reg, data);

sys/dev/ixgbe/if_ix_mdio.c

139

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix_mdio.c

153

if (! ixgbe_has_mdio_bus_clause22(hw))

sys/dev/ixgbe/if_ix_mdio.c

51

ixgbe_has_mdio_bus_clause22(struct ixgbe_hw *hw)

sys/dev/ixgbe/if_ix_mdio.c

53

switch (hw->device_id) {

sys/dev/ixgbe/if_ix_mdio.c

83

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ix_mdio.c

87

if (! ixgbe_has_mdio_bus_clause22(hw))

sys/dev/ixgbe/if_ix_mdio.c

91

ret = ixgbe_read_mdio_c22(hw, phy, reg, &val);

sys/dev/ixgbe/if_ix_mdio_hw.c

106

command = IXGBE_READ_REG(hw, IXGBE_MSCA);

sys/dev/ixgbe/if_ix_mdio_hw.c

124

ixgbe_check_mdio_is_x550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/if_ix_mdio_hw.c

127

switch (hw->device_id) {

sys/dev/ixgbe/if_ix_mdio_hw.c

144

ixgbe_read_mdio_c22(struct ixgbe_hw *hw, u16 phy, u16 reg, u16 *phy_data)

sys/dev/ixgbe/if_ix_mdio_hw.c

146

u32 gssr = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/if_ix_mdio_hw.c

149

if (ixgbe_check_mdio_is_x550em(hw))

sys/dev/ixgbe/if_ix_mdio_hw.c

152

if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) {

sys/dev/ixgbe/if_ix_mdio_hw.c

157

ret = ixgbe_read_mdio_unlocked_c22(hw, phy, reg, phy_data);

sys/dev/ixgbe/if_ix_mdio_hw.c

161

hw->mac.ops.release_swfw_sync(hw, gssr);

sys/dev/ixgbe/if_ix_mdio_hw.c

166

ixgbe_write_mdio_c22(struct ixgbe_hw *hw, u16 phy, u16 reg, u16 data)

sys/dev/ixgbe/if_ix_mdio_hw.c

168

u32 gssr = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/if_ix_mdio_hw.c

171

if (ixgbe_check_mdio_is_x550em(hw))

sys/dev/ixgbe/if_ix_mdio_hw.c

174

if (hw->mac.ops.acquire_swfw_sync(hw, gssr))

sys/dev/ixgbe/if_ix_mdio_hw.c

177

ret = ixgbe_write_mdio_unlocked_c22(hw, phy, reg, data);

sys/dev/ixgbe/if_ix_mdio_hw.c

179

hw->mac.ops.release_swfw_sync(hw, gssr);

sys/dev/ixgbe/if_ix_mdio_hw.c

48

ixgbe_read_mdio_unlocked_c22(struct ixgbe_hw *hw, u16 phy, u16 reg, u16 *phy_data)

sys/dev/ixgbe/if_ix_mdio_hw.c

58

IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);

sys/dev/ixgbe/if_ix_mdio_hw.c

67

command = IXGBE_READ_REG(hw, IXGBE_MSCA);

sys/dev/ixgbe/if_ix_mdio_hw.c

76

data = IXGBE_READ_REG(hw, IXGBE_MSRWD);

sys/dev/ixgbe/if_ix_mdio_hw.c

84

ixgbe_write_mdio_unlocked_c22(struct ixgbe_hw *hw, u16 phy, u16 reg, u16 phy_data)

sys/dev/ixgbe/if_ix_mdio_hw.c

89

IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);

sys/dev/ixgbe/if_ix_mdio_hw.c

97

IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);

sys/dev/ixgbe/if_ix_mdio_hw.h

30

s32 ixgbe_read_mdio_c22(struct ixgbe_hw *hw, u16 phy, u16 reg, u16 *phy_data);

sys/dev/ixgbe/if_ix_mdio_hw.h

31

s32 ixgbe_write_mdio_c22(struct ixgbe_hw *hw, u16 phy, u16 reg, u16 data);

sys/dev/ixgbe/if_ixv.c

1002

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

1005

hw->vendor_id = pci_get_vendor(dev);

sys/dev/ixgbe/if_ixv.c

1006

hw->device_id = pci_get_device(dev);

sys/dev/ixgbe/if_ixv.c

1007

hw->revision_id = pci_get_revid(dev);

sys/dev/ixgbe/if_ixv.c

1008

hw->subsystem_vendor_id = pci_get_subvendor(dev);

sys/dev/ixgbe/if_ixv.c

1009

hw->subsystem_device_id = pci_get_subdevice(dev);

sys/dev/ixgbe/if_ixv.c

1012

switch (hw->device_id) {

sys/dev/ixgbe/if_ixv.c

1014

hw->mac.type = ixgbe_mac_82599_vf;

sys/dev/ixgbe/if_ixv.c

1017

hw->mac.type = ixgbe_mac_X540_vf;

sys/dev/ixgbe/if_ixv.c

1020

hw->mac.type = ixgbe_mac_X550_vf;

sys/dev/ixgbe/if_ixv.c

1023

hw->mac.type = ixgbe_mac_X550EM_x_vf;

sys/dev/ixgbe/if_ixv.c

1026

hw->mac.type = ixgbe_mac_X550EM_a_vf;

sys/dev/ixgbe/if_ixv.c

1029

hw->mac.type = ixgbe_mac_E610_vf;

sys/dev/ixgbe/if_ixv.c

1033

hw->mac.type = ixgbe_mac_unknown;

sys/dev/ixgbe/if_ixv.c

1095

if (sc->hw.mac.type == ixgbe_mac_82599_vf) {

sys/dev/ixgbe/if_ixv.c

1141

sc->hw.hw_addr = (u8 *)&sc->osdep.mem_bus_space_handle;

sys/dev/ixgbe/if_ixv.c

1247

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

1259

txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));

sys/dev/ixgbe/if_ixv.c

1261

IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);

sys/dev/ixgbe/if_ixv.c

1264

IXGBE_WRITE_REG(&sc->hw, IXGBE_VFTDH(j), 0);

sys/dev/ixgbe/if_ixv.c

1265

IXGBE_WRITE_REG(&sc->hw, IXGBE_VFTDT(j), 0);

sys/dev/ixgbe/if_ixv.c

1281

IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),

sys/dev/ixgbe/if_ixv.c

1283

IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));

sys/dev/ixgbe/if_ixv.c

1284

IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j),

sys/dev/ixgbe/if_ixv.c

1286

txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));

sys/dev/ixgbe/if_ixv.c

1288

IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);

sys/dev/ixgbe/if_ixv.c

1291

txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));

sys/dev/ixgbe/if_ixv.c

1293

IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);

sys/dev/ixgbe/if_ixv.c

1305

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

1321

IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), rss_key[i]);

sys/dev/ixgbe/if_ixv.c

1346

IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), reta);

sys/dev/ixgbe/if_ixv.c

1391

IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, mrqc);

sys/dev/ixgbe/if_ixv.c

1403

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

1422

IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);

sys/dev/ixgbe/if_ixv.c

1425

if (ixgbevf_rlpml_set_vf(hw, sc->max_frame_size) != 0) {

sys/dev/ixgbe/if_ixv.c

1440

rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));

sys/dev/ixgbe/if_ixv.c

1442

IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);

sys/dev/ixgbe/if_ixv.c

1444

if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) &

sys/dev/ixgbe/if_ixv.c

1452

IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),

sys/dev/ixgbe/if_ixv.c

1454

IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));

sys/dev/ixgbe/if_ixv.c

1455

IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j),

sys/dev/ixgbe/if_ixv.c

1459

IXGBE_WRITE_REG(hw, IXGBE_VFRDH(rxr->me), 0);

sys/dev/ixgbe/if_ixv.c

1460

IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rxr->me), 0);

sys/dev/ixgbe/if_ixv.c

1463

reg = IXGBE_READ_REG(hw, IXGBE_VFSRRCTL(j));

sys/dev/ixgbe/if_ixv.c

1468

IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(j), reg);

sys/dev/ixgbe/if_ixv.c

1475

IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);

sys/dev/ixgbe/if_ixv.c

1477

if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) &

sys/dev/ixgbe/if_ixv.c

1507

IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rxr->me), t);

sys/dev/ixgbe/if_ixv.c

1510

IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rxr->me),

sys/dev/ixgbe/if_ixv.c

1518

if (sc->hw.mac.type >= ixgbe_mac_X550_vf)

sys/dev/ixgbe/if_ixv.c

1530

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

1545

ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));

sys/dev/ixgbe/if_ixv.c

1547

IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), ctrl);

sys/dev/ixgbe/if_ixv.c

1582

while (hw->mac.ops.set_vfta(hw, vid, 0, true, false)) {

sys/dev/ixgbe/if_ixv.c

1635

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

1639

IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);

sys/dev/ixgbe/if_ixv.c

1643

IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);

sys/dev/ixgbe/if_ixv.c

1648

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/if_ixv.c

1658

IXGBE_WRITE_REG(&sc->hw, IXGBE_VTEIAC, 0);

sys/dev/ixgbe/if_ixv.c

1659

IXGBE_WRITE_REG(&sc->hw, IXGBE_VTEIMC, ~0);

sys/dev/ixgbe/if_ixv.c

1660

IXGBE_WRITE_FLUSH(&sc->hw);

sys/dev/ixgbe/if_ixv.c

1688

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

1694

ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);

sys/dev/ixgbe/if_ixv.c

1697

IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);

sys/dev/ixgbe/if_ixv.c

1700

ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(entry >> 1));

sys/dev/ixgbe/if_ixv.c

1703

IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(entry >> 1), ivar);

sys/dev/ixgbe/if_ixv.c

1723

IXGBE_WRITE_REG(&sc->hw, IXGBE_VTEITR(que->msix),

sys/dev/ixgbe/if_ixv.c

1762

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

1764

sc->stats.vf.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);

sys/dev/ixgbe/if_ixv.c

1765

sc->stats.vf.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);

sys/dev/ixgbe/if_ixv.c

1767

(((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);

sys/dev/ixgbe/if_ixv.c

1769

sc->stats.vf.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);

sys/dev/ixgbe/if_ixv.c

1770

sc->stats.vf.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);

sys/dev/ixgbe/if_ixv.c

1772

(((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);

sys/dev/ixgbe/if_ixv.c

1774

sc->stats.vf.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);

sys/dev/ixgbe/if_ixv.c

1785

u32 current = IXGBE_READ_REG(hw, reg); \

sys/dev/ixgbe/if_ixv.c

1795

u64 cur_lsb = IXGBE_READ_REG(hw, lsb); \

sys/dev/ixgbe/if_ixv.c

1796

u64 cur_msb = IXGBE_READ_REG(hw, msb); \

sys/dev/ixgbe/if_ixv.c

1811

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

1916

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

1919

IXGBE_READ_REG(hw, IXGBE_ERRBC));

sys/dev/ixgbe/if_ixv.c

1958

switch (sc->hw.mac.type) {

sys/dev/ixgbe/if_ixv.c

398

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_ixv.c

408

sc->hw.back = sc;

sys/dev/ixgbe/if_ixv.c

411

hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

431

error = ixgbe_init_ops_vf(hw);

sys/dev/ixgbe/if_ixv.c

439

ixgbe_init_mbx_params_vf(hw);

sys/dev/ixgbe/if_ixv.c

441

error = hw->mac.ops.reset_hw(hw);

sys/dev/ixgbe/if_ixv.c

452

error = hw->mac.ops.init_hw(hw);

sys/dev/ixgbe/if_ixv.c

469

error = hw->mac.ops.get_link_state(hw, &sc->link_enabled);

sys/dev/ixgbe/if_ixv.c

476

if (!ixv_check_ether_addr(hw->mac.addr)) {

sys/dev/ixgbe/if_ixv.c

478

(struct ether_addr *)hw->mac.addr);

sys/dev/ixgbe/if_ixv.c

479

bcopy(hw->mac.addr, hw->mac.perm_addr,

sys/dev/ixgbe/if_ixv.c

480

sizeof(hw->mac.perm_addr));

sys/dev/ixgbe/if_ixv.c

485

iflib_set_mac(ctx, hw->mac.addr);

sys/dev/ixgbe/if_ixv.c

486

switch (sc->hw.mac.type) {

sys/dev/ixgbe/if_ixv.c

610

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

614

hw->adapter_stopped = false;

sys/dev/ixgbe/if_ixv.c

615

hw->mac.ops.stop_adapter(hw);

sys/dev/ixgbe/if_ixv.c

618

hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);

sys/dev/ixgbe/if_ixv.c

621

bcopy(if_getlladdr(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS);

sys/dev/ixgbe/if_ixv.c

622

hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, 1);

sys/dev/ixgbe/if_ixv.c

625

hw->mac.ops.reset_hw(hw);

sys/dev/ixgbe/if_ixv.c

626

hw->mac.ops.start_hw(hw);

sys/dev/ixgbe/if_ixv.c

651

IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, IXGBE_EICS_RTX_QUEUE);

sys/dev/ixgbe/if_ixv.c

654

IXGBE_WRITE_REG(hw, IXGBE_VTEITR(sc->vector), IXGBE_LINK_ITR);

sys/dev/ixgbe/if_ixv.c

660

error = hw->mac.ops.get_link_state(hw, &sc->link_enabled);

sys/dev/ixgbe/if_ixv.c

667

hw->mac.ops.check_link(hw, &sc->link_speed, &sc->link_up,

sys/dev/ixgbe/if_ixv.c

682

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

687

IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);

sys/dev/ixgbe/if_ixv.c

696

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

701

IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, mask);

sys/dev/ixgbe/if_ixv.c

727

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

733

reg = IXGBE_READ_REG(hw, IXGBE_VTEICS);

sys/dev/ixgbe/if_ixv.c

735

IXGBE_WRITE_REG(hw, IXGBE_VTEICR, reg);

sys/dev/ixgbe/if_ixv.c

741

IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, IXGBE_EIMS_OTHER);

sys/dev/ixgbe/if_ixv.c

823

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

833

if (ixgbevf_negotiate_api_version(hw, mbx_api[i]) == 0)

sys/dev/ixgbe/if_ixv.c

875

sc->hw.mac.ops.update_mc_addr_list(&sc->hw, update_ptr, mcnt,

sys/dev/ixgbe/if_ixv.c

887

ixv_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq)

sys/dev/ixgbe/if_ixv.c

930

sc->hw.mac.get_link_status = true;

sys/dev/ixgbe/if_ixv.c

932

status = ixgbe_check_link(&sc->hw, &sc->link_speed,

sys/dev/ixgbe/if_ixv.c

935

if (status != IXGBE_SUCCESS && sc->hw.adapter_stopped == false) {

sys/dev/ixgbe/if_ixv.c

975

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_ixv.c

981

hw->mac.ops.reset_hw(hw);

sys/dev/ixgbe/if_ixv.c

982

sc->hw.adapter_stopped = false;

sys/dev/ixgbe/if_ixv.c

983

hw->mac.ops.stop_adapter(hw);

sys/dev/ixgbe/if_ixv.c

990

hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);

sys/dev/ixgbe/if_sriov.c

103

ixgbe_write_mbx(hw, &msg, 1, vf->pool);

sys/dev/ixgbe/if_sriov.c

110

ixgbe_send_vf_msg(&sc->hw, vf, msg | IXGBE_VT_MSGTYPE_SUCCESS);

sys/dev/ixgbe/if_sriov.c

117

ixgbe_send_vf_msg(&sc->hw, vf, msg | IXGBE_VT_MSGTYPE_FAILURE);

sys/dev/ixgbe/if_sriov.c

213

ixgbe_send_vf_msg(&sc->hw, vf, IXGBE_PF_CONTROL_MSG);

sys/dev/ixgbe/if_sriov.c

222

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_sriov.c

225

hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

229

vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf->pool));

sys/dev/ixgbe/if_sriov.c

253

IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf->pool), vmolr);

sys/dev/ixgbe/if_sriov.c

254

IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf->pool), vmvir);

sys/dev/ixgbe/if_sriov.c

265

if (sc->hw.mac.type != ixgbe_mac_82599EB)

sys/dev/ixgbe/if_sriov.c

310

ixgbe_clear_rar(&sc->hw, vf->rar_index);

sys/dev/ixgbe/if_sriov.c

311

ixgbe_toggle_txdctl(&sc->hw, vf->pool);

sys/dev/ixgbe/if_sriov.c

320

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_sriov.c

323

hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

326

vfte = IXGBE_READ_REG(hw, IXGBE_VFTE(vf_index));

sys/dev/ixgbe/if_sriov.c

328

IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_index), vfte);

sys/dev/ixgbe/if_sriov.c

335

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_sriov.c

338

hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

341

vfre = IXGBE_READ_REG(hw, IXGBE_VFRE(vf_index));

sys/dev/ixgbe/if_sriov.c

346

IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_index), vfre);

sys/dev/ixgbe/if_sriov.c

353

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_sriov.c

358

hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

365

ixgbe_clear_mbx(hw, vf->pool);

sys/dev/ixgbe/if_sriov.c

373

IXGBE_WRITE_REG(hw,

sys/dev/ixgbe/if_sriov.c

375

IXGBE_WRITE_REG(hw,

sys/dev/ixgbe/if_sriov.c

380

ixgbe_set_rar(&sc->hw, vf->rar_index, vf->ether_addr,

sys/dev/ixgbe/if_sriov.c

393

resp[3] = hw->mac.mc_filter_type;

sys/dev/ixgbe/if_sriov.c

394

ixgbe_write_mbx(hw, resp, IXGBE_VF_PERMADDR_MSG_LEN, vf->pool);

sys/dev/ixgbe/if_sriov.c

418

ixgbe_set_rar(&sc->hw, vf->rar_index, vf->ether_addr, vf->pool,

sys/dev/ixgbe/if_sriov.c

439

vmolr = IXGBE_READ_REG(&sc->hw, IXGBE_VMOLR(vf->pool));

sys/dev/ixgbe/if_sriov.c

448

mta_reg = IXGBE_READ_REG(&sc->hw, IXGBE_MTA(vec_reg));

sys/dev/ixgbe/if_sriov.c

450

IXGBE_WRITE_REG(&sc->hw, IXGBE_MTA(vec_reg), mta_reg);

sys/dev/ixgbe/if_sriov.c

457

IXGBE_WRITE_REG(&sc->hw, IXGBE_VMOLR(vf->pool), vmolr);

sys/dev/ixgbe/if_sriov.c

465

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_sriov.c

469

hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

484

ixgbe_set_vfta(hw, tag, vf->pool, enable, false);

sys/dev/ixgbe/if_sriov.c

492

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_sriov.c

495

hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

521

mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);

sys/dev/ixgbe/if_sriov.c

527

IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);

sys/dev/ixgbe/if_sriov.c

565

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_sriov.c

569

hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

588

ixgbe_write_mbx(hw, resp, IXGBE_VF_GET_QUEUES_RESP_LEN, vf->pool);

sys/dev/ixgbe/if_sriov.c

599

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_sriov.c

603

hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

605

error = ixgbe_read_mbx(hw, msg, IXGBE_VFMAILBOX_SIZE, vf->pool);

sys/dev/ixgbe/if_sriov.c

655

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_sriov.c

659

hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

665

if (hw->mbx.ops[vf->pool].check_for_rst(hw,

sys/dev/ixgbe/if_sriov.c

669

if (hw->mbx.ops[vf->pool].check_for_msg(hw,

sys/dev/ixgbe/if_sriov.c

673

if (hw->mbx.ops[vf->pool].check_for_ack(hw,

sys/dev/ixgbe/if_sriov.c

723

ixgbe_init_mbx_params_pf(&sc->hw);

sys/dev/ixgbe/if_sriov.c

741

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_sriov.c

746

hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

750

IXGBE_WRITE_REG(hw, IXGBE_VFRE(pf_reg), IXGBE_VF_BIT(sc->pool));

sys/dev/ixgbe/if_sriov.c

751

IXGBE_WRITE_REG(hw, IXGBE_VFTE(pf_reg), IXGBE_VF_BIT(sc->pool));

sys/dev/ixgbe/if_sriov.c

757

IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), 0);

sys/dev/ixgbe/if_sriov.c

758

IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), 0);

sys/dev/ixgbe/if_sriov.c

760

IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, 0);

sys/dev/ixgbe/if_sriov.c

771

struct ixgbe_hw *hw;

sys/dev/ixgbe/if_sriov.c

774

hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

780

pfmbimr = IXGBE_READ_REG(hw, IXGBE_PFMBIMR(vf_index));

sys/dev/ixgbe/if_sriov.c

782

IXGBE_WRITE_REG(hw, IXGBE_PFMBIMR(vf_index), pfmbimr);

sys/dev/ixgbe/if_sriov.c

789

ixgbe_set_rar(&sc->hw, vf->rar_index,

sys/dev/ixgbe/if_sriov.c

796

ixgbe_send_vf_msg(&sc->hw, vf, IXGBE_PF_CONTROL_MSG);

sys/dev/ixgbe/if_sriov.c

802

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/if_sriov.c

811

mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);

sys/dev/ixgbe/if_sriov.c

812

gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);

sys/dev/ixgbe/if_sriov.c

813

gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);

sys/dev/ixgbe/if_sriov.c

837

IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);

sys/dev/ixgbe/if_sriov.c

838

IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);

sys/dev/ixgbe/if_sriov.c

839

IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);

sys/dev/ixgbe/if_sriov.c

840

IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);

sys/dev/ixgbe/if_sriov.c

844

IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), IXGBE_VF_BIT(sc->pool));

sys/dev/ixgbe/if_sriov.c

845

IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), IXGBE_VF_BIT(sc->pool));

sys/dev/ixgbe/if_sriov.c

848

IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);

sys/dev/ixgbe/if_sriov.c

852

IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vt_ctl);

sys/dev/ixgbe/if_sriov.c

98

ixgbe_send_vf_msg(struct ixgbe_hw *hw, struct ixgbe_vf *vf, u32 msg)

sys/dev/ixgbe/ix_txrx.c

260

IXGBE_WRITE_REG(&sc->hw, txr->tail, pidx);

sys/dev/ixgbe/ix_txrx.c

356

IXGBE_WRITE_REG(&sc->hw, rxr->tail, pidx);

sys/dev/ixgbe/ixgbe.h

363

struct ixgbe_hw hw;

sys/dev/ixgbe/ixgbe_82598.c

1004

s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind,

sys/dev/ixgbe/ixgbe_82598.c

1027

bits = IXGBE_READ_REG(hw, IXGBE_VFTAVIND(vftabyte, regindex));

sys/dev/ixgbe/ixgbe_82598.c

103

pcie_devctl2 = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_DEVICE_CONTROL2);

sys/dev/ixgbe/ixgbe_82598.c

1030

IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vftabyte, regindex), bits);

sys/dev/ixgbe/ixgbe_82598.c

1035

bits = IXGBE_READ_REG(hw, IXGBE_VFTA(regindex));

sys/dev/ixgbe/ixgbe_82598.c

1042

IXGBE_WRITE_REG(hw, IXGBE_VFTA(regindex), bits);

sys/dev/ixgbe/ixgbe_82598.c

105

IXGBE_WRITE_PCIE_WORD(hw, IXGBE_PCI_DEVICE_CONTROL2, pcie_devctl2);

sys/dev/ixgbe/ixgbe_82598.c

1053

static s32 ixgbe_clear_vfta_82598(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

1060

for (offset = 0; offset < hw->mac.vft_size; offset++)

sys/dev/ixgbe/ixgbe_82598.c

1061

IXGBE_WRITE_REG(hw, IXGBE_VFTA(offset), 0);

sys/dev/ixgbe/ixgbe_82598.c

1064

for (offset = 0; offset < hw->mac.vft_size; offset++)

sys/dev/ixgbe/ixgbe_82598.c

1065

IXGBE_WRITE_REG(hw, IXGBE_VFTAVIND(vlanbyte, offset),

sys/dev/ixgbe/ixgbe_82598.c

1079

s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val)

sys/dev/ixgbe/ixgbe_82598.c

1085

IXGBE_WRITE_REG(hw, IXGBE_ATLASCTL,

sys/dev/ixgbe/ixgbe_82598.c

1087

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82598.c

1089

atlas_ctl = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);

sys/dev/ixgbe/ixgbe_82598.c

109

IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr);

sys/dev/ixgbe/ixgbe_82598.c

1103

s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val)

sys/dev/ixgbe/ixgbe_82598.c

1110

IXGBE_WRITE_REG(hw, IXGBE_ATLASCTL, atlas_ctl);

sys/dev/ixgbe/ixgbe_82598.c

1111

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82598.c

1126

static s32 ixgbe_read_i2c_phy_82598(struct ixgbe_hw *hw, u8 dev_addr,

sys/dev/ixgbe/ixgbe_82598.c

1138

if (IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1)

sys/dev/ixgbe/ixgbe_82598.c

1143

if (hw->mac.ops.acquire_swfw_sync(hw, gssr) != IXGBE_SUCCESS)

sys/dev/ixgbe/ixgbe_82598.c

1146

if (hw->phy.type == ixgbe_phy_nl) {

sys/dev/ixgbe/ixgbe_82598.c

1154

hw->phy.ops.write_reg_mdi(hw,

sys/dev/ixgbe/ixgbe_82598.c

1161

hw->phy.ops.read_reg_mdi(hw,

sys/dev/ixgbe/ixgbe_82598.c

1178

hw->phy.ops.read_reg_mdi(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA,

sys/dev/ixgbe/ixgbe_82598.c

1187

hw->mac.ops.release_swfw_sync(hw, gssr);

sys/dev/ixgbe/ixgbe_82598.c

119

s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

1199

s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_82598.c

1202

return ixgbe_read_i2c_phy_82598(hw, IXGBE_I2C_EEPROM_DEV_ADDR,

sys/dev/ixgbe/ixgbe_82598.c

121

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_82598.c

1214

static s32 ixgbe_read_i2c_sff8472_82598(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_82598.c

1217

return ixgbe_read_i2c_phy_82598(hw, IXGBE_I2C_EEPROM_DEV_ADDR2,

sys/dev/ixgbe/ixgbe_82598.c

122

struct ixgbe_phy_info *phy = &hw->phy;

sys/dev/ixgbe/ixgbe_82598.c

1227

u64 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

1230

u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82598.c

1237

hw->phy.ops.identify(hw);

sys/dev/ixgbe/ixgbe_82598.c

1241

switch (hw->phy.type) {

sys/dev/ixgbe/ixgbe_82598.c

1244

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/ixgbe/ixgbe_82598.c

127

ret_val = ixgbe_init_phy_ops_generic(hw);

sys/dev/ixgbe/ixgbe_82598.c

128

ret_val = ixgbe_init_ops_generic(hw);

sys/dev/ixgbe/ixgbe_82598.c

1284

if (hw->phy.type == ixgbe_phy_nl) {

sys/dev/ixgbe/ixgbe_82598.c

1285

hw->phy.ops.identify_sfp(hw);

sys/dev/ixgbe/ixgbe_82598.c

1287

switch (hw->phy.sfp_type) {

sys/dev/ixgbe/ixgbe_82598.c

1303

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_82598.c

1331

void ixgbe_set_lan_id_multi_port_pcie_82598(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

1333

struct ixgbe_bus_info *bus = &hw->bus;

sys/dev/ixgbe/ixgbe_82598.c

1339

ixgbe_set_lan_id_multi_port_pcie(hw);

sys/dev/ixgbe/ixgbe_82598.c

1342

hw->eeprom.ops.read(hw, IXGBE_PCIE_GENERAL_PTR, &pci_gen);

sys/dev/ixgbe/ixgbe_82598.c

1345

hw->eeprom.ops.read(hw, pci_gen + IXGBE_PCIE_CTRL2, &pci_ctrl2);

sys/dev/ixgbe/ixgbe_82598.c

1362

void ixgbe_enable_relaxed_ordering_82598(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

1370

for (i = 0; ((i < hw->mac.max_tx_queues) &&

sys/dev/ixgbe/ixgbe_82598.c

1372

regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));

sys/dev/ixgbe/ixgbe_82598.c

1374

IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval);

sys/dev/ixgbe/ixgbe_82598.c

1377

for (i = 0; ((i < hw->mac.max_rx_queues) &&

sys/dev/ixgbe/ixgbe_82598.c

1379

regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));

sys/dev/ixgbe/ixgbe_82598.c

1382

IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);

sys/dev/ixgbe/ixgbe_82598.c

1394

static void ixgbe_set_rxpba_82598(struct ixgbe_hw *hw, int num_pb,

sys/dev/ixgbe/ixgbe_82598.c

1410

IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize);

sys/dev/ixgbe/ixgbe_82598.c

1418

IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize);

sys/dev/ixgbe/ixgbe_82598.c

1424

IXGBE_WRITE_REG(hw, IXGBE_TXPBSIZE(i), IXGBE_TXPBSIZE_40KB);

sys/dev/ixgbe/ixgbe_82598.c

1434

s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval)

sys/dev/ixgbe/ixgbe_82598.c

1438

IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, regval);

sys/dev/ixgbe/ixgbe_82598.c

161

mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw);

sys/dev/ixgbe/ixgbe_82598.c

191

s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

193

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_82598.c

194

struct ixgbe_phy_info *phy = &hw->phy;

sys/dev/ixgbe/ixgbe_82598.c

201

phy->ops.identify(hw);

sys/dev/ixgbe/ixgbe_82598.c

204

if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) {

sys/dev/ixgbe/ixgbe_82598.c

210

switch (hw->phy.type) {

sys/dev/ixgbe/ixgbe_82598.c

221

ret_val = phy->ops.identify_sfp(hw);

sys/dev/ixgbe/ixgbe_82598.c

224

else if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) {

sys/dev/ixgbe/ixgbe_82598.c

230

ret_val = ixgbe_get_sfp_init_sequence_offsets(hw,

sys/dev/ixgbe/ixgbe_82598.c

254

s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

262

ret_val = ixgbe_start_hw_generic(hw);

sys/dev/ixgbe/ixgbe_82598.c

267

for (i = 0; ((i < hw->mac.max_tx_queues) &&

sys/dev/ixgbe/ixgbe_82598.c

269

regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));

sys/dev/ixgbe/ixgbe_82598.c

271

IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval);

sys/dev/ixgbe/ixgbe_82598.c

274

for (i = 0; ((i < hw->mac.max_rx_queues) &&

sys/dev/ixgbe/ixgbe_82598.c

276

regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));

sys/dev/ixgbe/ixgbe_82598.c

279

IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);

sys/dev/ixgbe/ixgbe_82598.c

283

ixgbe_set_pcie_completion_timeout(hw);

sys/dev/ixgbe/ixgbe_82598.c

296

static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82598.c

310

if (hw->mac.orig_link_settings_stored)

sys/dev/ixgbe/ixgbe_82598.c

311

autoc = hw->mac.orig_autoc;

sys/dev/ixgbe/ixgbe_82598.c

313

autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82598.c

355

static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

362

switch (hw->phy.type) {

sys/dev/ixgbe/ixgbe_82598.c

372

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_82598.c

408

s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

422

if (!hw->fc.pause_time) {

sys/dev/ixgbe/ixgbe_82598.c

429

if ((hw->fc.current_mode & ixgbe_fc_tx_pause) &&

sys/dev/ixgbe/ixgbe_82598.c

430

hw->fc.high_water[i]) {

sys/dev/ixgbe/ixgbe_82598.c

431

if (!hw->fc.low_water[i] ||

sys/dev/ixgbe/ixgbe_82598.c

432

hw->fc.low_water[i] >= hw->fc.high_water[i]) {

sys/dev/ixgbe/ixgbe_82598.c

445

hw->mac.ops.check_link(hw, &link_speed, &link_up, false);

sys/dev/ixgbe/ixgbe_82598.c

447

switch (hw->fc.requested_mode) {

sys/dev/ixgbe/ixgbe_82598.c

449

hw->fc.requested_mode = ixgbe_fc_tx_pause;

sys/dev/ixgbe/ixgbe_82598.c

452

hw->fc.requested_mode = ixgbe_fc_none;

sys/dev/ixgbe/ixgbe_82598.c

461

ixgbe_fc_autoneg(hw);

sys/dev/ixgbe/ixgbe_82598.c

464

fctrl_reg = IXGBE_READ_REG(hw, IXGBE_FCTRL);

sys/dev/ixgbe/ixgbe_82598.c

467

rmcs_reg = IXGBE_READ_REG(hw, IXGBE_RMCS);

sys/dev/ixgbe/ixgbe_82598.c

48

static s32 ixgbe_get_link_capabilities_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82598.c

480

switch (hw->fc.current_mode) {

sys/dev/ixgbe/ixgbe_82598.c

51

static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82598.c

519

IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg);

sys/dev/ixgbe/ixgbe_82598.c

52

static s32 ixgbe_start_mac_link_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82598.c

520

IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg);

sys/dev/ixgbe/ixgbe_82598.c

524

if ((hw->fc.current_mode & ixgbe_fc_tx_pause) &&

sys/dev/ixgbe/ixgbe_82598.c

525

hw->fc.high_water[i]) {

sys/dev/ixgbe/ixgbe_82598.c

526

fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE;

sys/dev/ixgbe/ixgbe_82598.c

527

fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN;

sys/dev/ixgbe/ixgbe_82598.c

528

IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), fcrtl);

sys/dev/ixgbe/ixgbe_82598.c

529

IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), fcrth);

sys/dev/ixgbe/ixgbe_82598.c

531

IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0);

sys/dev/ixgbe/ixgbe_82598.c

532

IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0);

sys/dev/ixgbe/ixgbe_82598.c

538

reg = hw->fc.pause_time * 0x00010001U;

sys/dev/ixgbe/ixgbe_82598.c

54

static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82598.c

540

IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);

sys/dev/ixgbe/ixgbe_82598.c

543

IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2);

sys/dev/ixgbe/ixgbe_82598.c

557

static s32 ixgbe_start_mac_link_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82598.c

568

autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82598.c

57

static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82598.c

570

IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);

sys/dev/ixgbe/ixgbe_82598.c

580

links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);

sys/dev/ixgbe/ixgbe_82598.c

60

static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82598.c

605

static s32 ixgbe_validate_link_ready(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

610

if (hw->device_id != IXGBE_DEV_ID_82598AT2)

sys/dev/ixgbe/ixgbe_82598.c

615

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/ixgbe/ixgbe_82598.c

63

static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82598.c

64

static s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

sys/dev/ixgbe/ixgbe_82598.c

642

static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82598.c

65

static s32 ixgbe_clear_vfta_82598(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82598.c

658

if (hw->phy.type == ixgbe_phy_nl) {

sys/dev/ixgbe/ixgbe_82598.c

659

hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg);

sys/dev/ixgbe/ixgbe_82598.c

66

static void ixgbe_set_rxpba_82598(struct ixgbe_hw *hw, int num_pb,

sys/dev/ixgbe/ixgbe_82598.c

660

hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg);

sys/dev/ixgbe/ixgbe_82598.c

661

hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV,

sys/dev/ixgbe/ixgbe_82598.c

664

for (i = 0; i < hw->mac.max_link_up_time; i++) {

sys/dev/ixgbe/ixgbe_82598.c

673

hw->phy.ops.read_reg(hw, 0xC79F,

sys/dev/ixgbe/ixgbe_82598.c

676

hw->phy.ops.read_reg(hw, 0xC00C,

sys/dev/ixgbe/ixgbe_82598.c

68

static s32 ixgbe_read_i2c_sff8472_82598(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_82598.c

691

links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);

sys/dev/ixgbe/ixgbe_82598.c

693

for (i = 0; i < hw->mac.max_link_up_time; i++) {

sys/dev/ixgbe/ixgbe_82598.c

701

links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);

sys/dev/ixgbe/ixgbe_82598.c

715

if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && (*link_up == true) &&

sys/dev/ixgbe/ixgbe_82598.c

716

(ixgbe_validate_link_ready(hw) != IXGBE_SUCCESS))

sys/dev/ixgbe/ixgbe_82598.c

731

static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82598.c

738

u32 curr_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82598.c

745

ixgbe_get_link_capabilities(hw, &link_capabilities, &autoneg);

sys/dev/ixgbe/ixgbe_82598.c

760

IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);

sys/dev/ixgbe/ixgbe_82598.c

769

status = ixgbe_start_mac_link_82598(hw,

sys/dev/ixgbe/ixgbe_82598.c

785

static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82598.c

794

status = hw->phy.ops.setup_link_speed(hw, speed,

sys/dev/ixgbe/ixgbe_82598.c

797

ixgbe_start_mac_link_82598(hw, autoneg_wait_to_complete);

sys/dev/ixgbe/ixgbe_82598.c

80

void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

810

static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82598.c

82

u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR);

sys/dev/ixgbe/ixgbe_82598.c

823

status = hw->mac.ops.stop_adapter(hw);

sys/dev/ixgbe/ixgbe_82598.c

832

hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);

sys/dev/ixgbe/ixgbe_82598.c

835

hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK,

sys/dev/ixgbe/ixgbe_82598.c

838

hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK,

sys/dev/ixgbe/ixgbe_82598.c

841

hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G,

sys/dev/ixgbe/ixgbe_82598.c

844

hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G,

sys/dev/ixgbe/ixgbe_82598.c

847

hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G,

sys/dev/ixgbe/ixgbe_82598.c

850

hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G,

sys/dev/ixgbe/ixgbe_82598.c

853

hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN,

sys/dev/ixgbe/ixgbe_82598.c

856

hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN,

sys/dev/ixgbe/ixgbe_82598.c

861

if (hw->phy.reset_disable == false) {

sys/dev/ixgbe/ixgbe_82598.c

865

phy_status = hw->phy.ops.init(hw);

sys/dev/ixgbe/ixgbe_82598.c

871

hw->phy.ops.reset(hw);

sys/dev/ixgbe/ixgbe_82598.c

879

ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL) | IXGBE_CTRL_RST;

sys/dev/ixgbe/ixgbe_82598.c

880

IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);

sys/dev/ixgbe/ixgbe_82598.c

881

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82598.c

886

ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);

sys/dev/ixgbe/ixgbe_82598.c

902

if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {

sys/dev/ixgbe/ixgbe_82598.c

903

hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;

sys/dev/ixgbe/ixgbe_82598.c

907

gheccr = IXGBE_READ_REG(hw, IXGBE_GHECCR);

sys/dev/ixgbe/ixgbe_82598.c

909

IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr);

sys/dev/ixgbe/ixgbe_82598.c

916

autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82598.c

917

if (hw->mac.orig_link_settings_stored == false) {

sys/dev/ixgbe/ixgbe_82598.c

918

hw->mac.orig_autoc = autoc;

sys/dev/ixgbe/ixgbe_82598.c

919

hw->mac.orig_link_settings_stored = true;

sys/dev/ixgbe/ixgbe_82598.c

920

} else if (autoc != hw->mac.orig_autoc) {

sys/dev/ixgbe/ixgbe_82598.c

921

IXGBE_WRITE_REG(hw, IXGBE_AUTOC, hw->mac.orig_autoc);

sys/dev/ixgbe/ixgbe_82598.c

925

hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);

sys/dev/ixgbe/ixgbe_82598.c

931

hw->mac.ops.init_rx_addrs(hw);

sys/dev/ixgbe/ixgbe_82598.c

946

s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

sys/dev/ixgbe/ixgbe_82598.c

949

u32 rar_entries = hw->mac.num_rar_entries;

sys/dev/ixgbe/ixgbe_82598.c

959

rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(rar));

sys/dev/ixgbe/ixgbe_82598.c

962

IXGBE_WRITE_REG(hw, IXGBE_RAH(rar), rar_high);

sys/dev/ixgbe/ixgbe_82598.c

972

static s32 ixgbe_clear_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

sys/dev/ixgbe/ixgbe_82598.c

975

u32 rar_entries = hw->mac.num_rar_entries;

sys/dev/ixgbe/ixgbe_82598.c

985

rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(rar));

sys/dev/ixgbe/ixgbe_82598.c

988

IXGBE_WRITE_REG(hw, IXGBE_RAH(rar), rar_high);

sys/dev/ixgbe/ixgbe_82598.h

38

u32 ixgbe_get_pcie_msix_count_82598(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82598.h

39

s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82598.h

40

s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82598.h

41

void ixgbe_enable_relaxed_ordering_82598(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82598.h

42

s32 ixgbe_set_vmdq_82598(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

sys/dev/ixgbe/ixgbe_82598.h

43

s32 ixgbe_set_vfta_82598(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,

sys/dev/ixgbe/ixgbe_82598.h

45

s32 ixgbe_read_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 *val);

sys/dev/ixgbe/ixgbe_82598.h

46

s32 ixgbe_write_analog_reg8_82598(struct ixgbe_hw *hw, u32 reg, u8 val);

sys/dev/ixgbe/ixgbe_82598.h

47

s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_82598.h

49

u64 ixgbe_get_supported_physical_layer_82598(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82598.h

50

s32 ixgbe_init_phy_ops_82598(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82598.h

51

void ixgbe_set_lan_id_multi_port_pcie_82598(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82598.h

52

void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82598.h

53

s32 ixgbe_enable_rx_dma_82598(struct ixgbe_hw *hw, u32 regval);

sys/dev/ixgbe/ixgbe_82599.c

1003

IXGBE_READ_REG(hw, IXGBE_LINKS);

sys/dev/ixgbe/ixgbe_82599.c

1032

static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

1041

status = hw->phy.ops.setup_link_speed(hw, speed,

sys/dev/ixgbe/ixgbe_82599.c

1044

ixgbe_start_mac_link_82599(hw, autoneg_wait_to_complete);

sys/dev/ixgbe/ixgbe_82599.c

1057

s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

1069

status = hw->mac.ops.stop_adapter(hw);

sys/dev/ixgbe/ixgbe_82599.c

1074

ixgbe_clear_tx_pending(hw);

sys/dev/ixgbe/ixgbe_82599.c

1079

status = hw->phy.ops.init(hw);

sys/dev/ixgbe/ixgbe_82599.c

1085

if (hw->phy.sfp_setup_needed) {

sys/dev/ixgbe/ixgbe_82599.c

1086

status = hw->mac.ops.setup_sfp(hw);

sys/dev/ixgbe/ixgbe_82599.c

1087

hw->phy.sfp_setup_needed = false;

sys/dev/ixgbe/ixgbe_82599.c

1094

if (hw->phy.reset_disable == false && hw->phy.ops.reset != NULL)

sys/dev/ixgbe/ixgbe_82599.c

1095

hw->phy.ops.reset(hw);

sys/dev/ixgbe/ixgbe_82599.c

1098

curr_lms = IXGBE_READ_REG(hw, IXGBE_AUTOC) & IXGBE_AUTOC_LMS_MASK;

sys/dev/ixgbe/ixgbe_82599.c

1108

if (!hw->force_full_reset) {

sys/dev/ixgbe/ixgbe_82599.c

1109

hw->mac.ops.check_link(hw, &link_speed, &link_up, false);

sys/dev/ixgbe/ixgbe_82599.c

1114

ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);

sys/dev/ixgbe/ixgbe_82599.c

1115

IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);

sys/dev/ixgbe/ixgbe_82599.c

1116

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

1121

ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);

sys/dev/ixgbe/ixgbe_82599.c

1138

if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {

sys/dev/ixgbe/ixgbe_82599.c

1139

hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;

sys/dev/ixgbe/ixgbe_82599.c

1148

autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82599.c

1149

autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);

sys/dev/ixgbe/ixgbe_82599.c

115

s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

1154

IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2);

sys/dev/ixgbe/ixgbe_82599.c

1155

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

1158

if (hw->mac.orig_link_settings_stored == false) {

sys/dev/ixgbe/ixgbe_82599.c

1159

hw->mac.orig_autoc = autoc;

sys/dev/ixgbe/ixgbe_82599.c

1160

hw->mac.orig_autoc2 = autoc2;

sys/dev/ixgbe/ixgbe_82599.c

1161

hw->mac.orig_link_settings_stored = true;

sys/dev/ixgbe/ixgbe_82599.c

117

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_82599.c

1170

if ((hw->phy.multispeed_fiber && ixgbe_mng_enabled(hw)) ||

sys/dev/ixgbe/ixgbe_82599.c

1171

hw->wol_enabled)

sys/dev/ixgbe/ixgbe_82599.c

1172

hw->mac.orig_autoc =

sys/dev/ixgbe/ixgbe_82599.c

1173

(hw->mac.orig_autoc & ~IXGBE_AUTOC_LMS_MASK) |

sys/dev/ixgbe/ixgbe_82599.c

1176

if (autoc != hw->mac.orig_autoc) {

sys/dev/ixgbe/ixgbe_82599.c

1177

status = hw->mac.ops.prot_autoc_write(hw,

sys/dev/ixgbe/ixgbe_82599.c

1178

hw->mac.orig_autoc,

sys/dev/ixgbe/ixgbe_82599.c

118

struct ixgbe_phy_info *phy = &hw->phy;

sys/dev/ixgbe/ixgbe_82599.c

1185

(hw->mac.orig_autoc2 & IXGBE_AUTOC2_UPPER_MASK)) {

sys/dev/ixgbe/ixgbe_82599.c

1187

autoc2 |= (hw->mac.orig_autoc2 &

sys/dev/ixgbe/ixgbe_82599.c

1189

IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2);

sys/dev/ixgbe/ixgbe_82599.c

1194

hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);

sys/dev/ixgbe/ixgbe_82599.c

1201

hw->mac.num_rar_entries = 128;

sys/dev/ixgbe/ixgbe_82599.c

1202

hw->mac.ops.init_rx_addrs(hw);

sys/dev/ixgbe/ixgbe_82599.c

1205

hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr);

sys/dev/ixgbe/ixgbe_82599.c

1208

if (ixgbe_validate_mac_addr(hw->mac.san_addr) == 0) {

sys/dev/ixgbe/ixgbe_82599.c

1210

hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1;

sys/dev/ixgbe/ixgbe_82599.c

1212

hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index,

sys/dev/ixgbe/ixgbe_82599.c

1213

hw->mac.san_addr, 0, IXGBE_RAH_AV);

sys/dev/ixgbe/ixgbe_82599.c

1216

hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index,

sys/dev/ixgbe/ixgbe_82599.c

1220

hw->mac.num_rar_entries--;

sys/dev/ixgbe/ixgbe_82599.c

1224

hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix,

sys/dev/ixgbe/ixgbe_82599.c

1225

&hw->mac.wwpn_prefix);

sys/dev/ixgbe/ixgbe_82599.c

1236

static s32 ixgbe_fdir_check_cmd_complete(struct ixgbe_hw *hw, u32 *fdircmd)

sys/dev/ixgbe/ixgbe_82599.c

124

if (hw->device_id == IXGBE_DEV_ID_82599_QSFP_SF_QP) {

sys/dev/ixgbe/ixgbe_82599.c

1241

*fdircmd = IXGBE_READ_REG(hw, IXGBE_FDIRCMD);

sys/dev/ixgbe/ixgbe_82599.c

1254

s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

1258

u32 fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL);

sys/dev/ixgbe/ixgbe_82599.c

126

hw->phy.qsfp_shared_i2c_bus = true;

sys/dev/ixgbe/ixgbe_82599.c

1268

err = ixgbe_fdir_check_cmd_complete(hw, &fdircmd);

sys/dev/ixgbe/ixgbe_82599.c

1274

IXGBE_WRITE_REG(hw, IXGBE_FDIRFREE, 0);

sys/dev/ixgbe/ixgbe_82599.c

1275

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

1283

IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,

sys/dev/ixgbe/ixgbe_82599.c

1284

(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) |

sys/dev/ixgbe/ixgbe_82599.c

1286

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

1287

IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,

sys/dev/ixgbe/ixgbe_82599.c

1288

(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) &

sys/dev/ixgbe/ixgbe_82599.c

129

esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_82599.c

1290

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

1295

IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, 0x00);

sys/dev/ixgbe/ixgbe_82599.c

1296

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

1298

IXGBE_WRITE_REG(hw, IXGBE_FDIRCTRL, fdirctrl);

sys/dev/ixgbe/ixgbe_82599.c

1299

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

1303

if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) &

sys/dev/ixgbe/ixgbe_82599.c

1314

IXGBE_READ_REG(hw, IXGBE_FDIRUSTAT);

sys/dev/ixgbe/ixgbe_82599.c

1315

IXGBE_READ_REG(hw, IXGBE_FDIRFSTAT);

sys/dev/ixgbe/ixgbe_82599.c

1316

IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);

sys/dev/ixgbe/ixgbe_82599.c

1317

IXGBE_READ_REG(hw, IXGBE_FDIRMISS);

sys/dev/ixgbe/ixgbe_82599.c

1318

IXGBE_READ_REG(hw, IXGBE_FDIRLEN);

sys/dev/ixgbe/ixgbe_82599.c

1328

static void ixgbe_fdir_enable_82599(struct ixgbe_hw *hw, u32 fdirctrl)

sys/dev/ixgbe/ixgbe_82599.c

1335

IXGBE_WRITE_REG(hw, IXGBE_FDIRHKEY, IXGBE_ATR_BUCKET_HASH_KEY);

sys/dev/ixgbe/ixgbe_82599.c

1336

IXGBE_WRITE_REG(hw, IXGBE_FDIRSKEY, IXGBE_ATR_SIGNATURE_HASH_KEY);

sys/dev/ixgbe/ixgbe_82599.c

135

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_82599.c

1351

IXGBE_WRITE_REG(hw, IXGBE_FDIRCTRL, fdirctrl);

sys/dev/ixgbe/ixgbe_82599.c

1352

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

1354

if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) &

sys/dev/ixgbe/ixgbe_82599.c

136

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

1370

s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl)

sys/dev/ixgbe/ixgbe_82599.c

1385

ixgbe_fdir_enable_82599(hw, fdirctrl);

sys/dev/ixgbe/ixgbe_82599.c

1397

s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,

sys/dev/ixgbe/ixgbe_82599.c

142

ret_val = phy->ops.identify(hw);

sys/dev/ixgbe/ixgbe_82599.c

1424

ixgbe_fdir_enable_82599(hw, fdirctrl);

sys/dev/ixgbe/ixgbe_82599.c

1434

void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue)

sys/dev/ixgbe/ixgbe_82599.c

1440

fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL);

sys/dev/ixgbe/ixgbe_82599.c

1445

if ((hw->mac.type == ixgbe_mac_X550) ||

sys/dev/ixgbe/ixgbe_82599.c

1446

(hw->mac.type == ixgbe_mac_X550EM_x) ||

sys/dev/ixgbe/ixgbe_82599.c

1447

(hw->mac.type == ixgbe_mac_X550EM_a))

sys/dev/ixgbe/ixgbe_82599.c

1450

IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,

sys/dev/ixgbe/ixgbe_82599.c

1451

(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) |

sys/dev/ixgbe/ixgbe_82599.c

1453

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

1454

IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,

sys/dev/ixgbe/ixgbe_82599.c

1455

(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) &

sys/dev/ixgbe/ixgbe_82599.c

1457

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

1460

ixgbe_fdir_enable_82599(hw, fdirctrl);

sys/dev/ixgbe/ixgbe_82599.c

147

ixgbe_init_mac_link_ops_82599(hw);

sys/dev/ixgbe/ixgbe_82599.c

148

if (hw->phy.sfp_type != ixgbe_sfp_type_unknown)

sys/dev/ixgbe/ixgbe_82599.c

149

hw->phy.ops.reset = NULL;

sys/dev/ixgbe/ixgbe_82599.c

152

if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) {

sys/dev/ixgbe/ixgbe_82599.c

1564

void ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

159

switch (hw->phy.type) {

sys/dev/ixgbe/ixgbe_82599.c

1611

IXGBE_WRITE_REG64(hw, IXGBE_FDIRHASH, fdirhashcmd);

sys/dev/ixgbe/ixgbe_82599.c

1723

s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

173

s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

180

if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) {

sys/dev/ixgbe/ixgbe_82599.c

181

ixgbe_init_mac_link_ops_82599(hw);

sys/dev/ixgbe/ixgbe_82599.c

183

hw->phy.ops.reset = NULL;

sys/dev/ixgbe/ixgbe_82599.c

1849

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRIP6M, fdirip6m);

sys/dev/ixgbe/ixgbe_82599.c

185

ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset,

sys/dev/ixgbe/ixgbe_82599.c

1855

IXGBE_WRITE_REG(hw, IXGBE_FDIRTCPM, 0xFFFFFFFF);

sys/dev/ixgbe/ixgbe_82599.c

1856

IXGBE_WRITE_REG(hw, IXGBE_FDIRUDPM, 0xFFFFFFFF);

sys/dev/ixgbe/ixgbe_82599.c

1857

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRDIP4M, 0xFFFFFFFF);

sys/dev/ixgbe/ixgbe_82599.c

1858

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIP4M, 0xFFFFFFFF);

sys/dev/ixgbe/ixgbe_82599.c

1859

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_82599.c

1863

IXGBE_WRITE_REG(hw, IXGBE_FDIRSCTPM, 0xFFFFFFFF);

sys/dev/ixgbe/ixgbe_82599.c

1871

IXGBE_WRITE_REG(hw, IXGBE_FDIRM, fdirm);

sys/dev/ixgbe/ixgbe_82599.c

1879

IXGBE_WRITE_REG(hw, IXGBE_FDIRTCPM, ~fdirtcpm);

sys/dev/ixgbe/ixgbe_82599.c

1880

IXGBE_WRITE_REG(hw, IXGBE_FDIRUDPM, ~fdirtcpm);

sys/dev/ixgbe/ixgbe_82599.c

1882

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_82599.c

1886

IXGBE_WRITE_REG(hw, IXGBE_FDIRSCTPM, ~fdirtcpm);

sys/dev/ixgbe/ixgbe_82599.c

1893

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIP4M,

sys/dev/ixgbe/ixgbe_82599.c

1895

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRDIP4M,

sys/dev/ixgbe/ixgbe_82599.c

1897

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRIP6M, 0xFFFFFFFF);

sys/dev/ixgbe/ixgbe_82599.c

1902

s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

191

ret_val = hw->mac.ops.acquire_swfw_sync(hw,

sys/dev/ixgbe/ixgbe_82599.c

1915

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(0),

sys/dev/ixgbe/ixgbe_82599.c

1917

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(1),

sys/dev/ixgbe/ixgbe_82599.c

1919

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(2),

sys/dev/ixgbe/ixgbe_82599.c

1923

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRIPSA,

sys/dev/ixgbe/ixgbe_82599.c

1928

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRIPDA,

sys/dev/ixgbe/ixgbe_82599.c

1935

IXGBE_WRITE_REG(hw, IXGBE_FDIRPORT, fdirport);

sys/dev/ixgbe/ixgbe_82599.c

1942

IXGBE_WRITE_REG(hw, IXGBE_FDIRVLAN, fdirvlan);

sys/dev/ixgbe/ixgbe_82599.c

1955

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(0), addr_low);

sys/dev/ixgbe/ixgbe_82599.c

1956

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(1), cloud_type);

sys/dev/ixgbe/ixgbe_82599.c

1957

IXGBE_WRITE_REG_BE32(hw, IXGBE_FDIRSIPv6(2), input->formatted.tni_vni);

sys/dev/ixgbe/ixgbe_82599.c

1963

IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, fdirhash);

sys/dev/ixgbe/ixgbe_82599.c

1969

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

198

if (hw->eeprom.ops.read(hw, ++data_offset, &data_value))

sys/dev/ixgbe/ixgbe_82599.c

1982

IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, fdircmd);

sys/dev/ixgbe/ixgbe_82599.c

1983

err = ixgbe_fdir_check_cmd_complete(hw, &fdircmd);

sys/dev/ixgbe/ixgbe_82599.c

1992

s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

2003

IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, fdirhash);

sys/dev/ixgbe/ixgbe_82599.c

2006

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

2009

IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, IXGBE_FDIRCMD_CMD_QUERY_REM_FILT);

sys/dev/ixgbe/ixgbe_82599.c

201

IXGBE_WRITE_REG(hw, IXGBE_CORECTL, data_value);

sys/dev/ixgbe/ixgbe_82599.c

2011

err = ixgbe_fdir_check_cmd_complete(hw, &fdircmd);

sys/dev/ixgbe/ixgbe_82599.c

2019

IXGBE_WRITE_REG(hw, IXGBE_FDIRHASH, fdirhash);

sys/dev/ixgbe/ixgbe_82599.c

202

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

2020

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

2021

IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,

sys/dev/ixgbe/ixgbe_82599.c

203

if (hw->eeprom.ops.read(hw, ++data_offset, &data_value))

sys/dev/ixgbe/ixgbe_82599.c

2040

s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

208

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);

sys/dev/ixgbe/ixgbe_82599.c

2085

err = ixgbe_fdir_set_input_mask_82599(hw, input_mask, cloud_mode);

sys/dev/ixgbe/ixgbe_82599.c

2093

return ixgbe_fdir_write_perfect_filter_82599(hw, input,

sys/dev/ixgbe/ixgbe_82599.c

2105

s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val)

sys/dev/ixgbe/ixgbe_82599.c

2111

IXGBE_WRITE_REG(hw, IXGBE_CORECTL, IXGBE_CORECTL_WRITE_CMD |

sys/dev/ixgbe/ixgbe_82599.c

2113

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

2115

core_ctl = IXGBE_READ_REG(hw, IXGBE_CORECTL);

sys/dev/ixgbe/ixgbe_82599.c

212

msec_delay(hw->eeprom.semaphore_delay);

sys/dev/ixgbe/ixgbe_82599.c

2129

s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val)

sys/dev/ixgbe/ixgbe_82599.c

2136

IXGBE_WRITE_REG(hw, IXGBE_CORECTL, core_ctl);

sys/dev/ixgbe/ixgbe_82599.c

2137

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

215

ret_val = hw->mac.ops.prot_autoc_write(hw,

sys/dev/ixgbe/ixgbe_82599.c

2151

s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

2157

ret_val = ixgbe_start_hw_generic(hw);

sys/dev/ixgbe/ixgbe_82599.c

216

hw->mac.orig_autoc | IXGBE_AUTOC_LMS_10G_SERIAL,

sys/dev/ixgbe/ixgbe_82599.c

2161

ixgbe_start_hw_gen2(hw);

sys/dev/ixgbe/ixgbe_82599.c

2164

hw->mac.autotry_restart = true;

sys/dev/ixgbe/ixgbe_82599.c

2167

ret_val = ixgbe_verify_fw_version_82599(hw);

sys/dev/ixgbe/ixgbe_82599.c

2180

s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

2187

status = ixgbe_identify_phy_generic(hw);

sys/dev/ixgbe/ixgbe_82599.c

2190

if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper)

sys/dev/ixgbe/ixgbe_82599.c

2193

status = ixgbe_identify_module_generic(hw);

sys/dev/ixgbe/ixgbe_82599.c

2197

if (hw->phy.type == ixgbe_phy_unknown) {

sys/dev/ixgbe/ixgbe_82599.c

2198

hw->phy.type = ixgbe_phy_none;

sys/dev/ixgbe/ixgbe_82599.c

2203

if (hw->phy.type == ixgbe_phy_sfp_unsupported)

sys/dev/ixgbe/ixgbe_82599.c

2215

u64 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

2218

u32 autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82599.c

2219

u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);

sys/dev/ixgbe/ixgbe_82599.c

2227

hw->phy.ops.identify(hw);

sys/dev/ixgbe/ixgbe_82599.c

2229

switch (hw->phy.type) {

sys/dev/ixgbe/ixgbe_82599.c

2232

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/ixgbe/ixgbe_82599.c

2291

physical_layer = ixgbe_get_supported_phy_sfp_layer_generic(hw);

sys/dev/ixgbe/ixgbe_82599.c

2303

s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval)

sys/dev/ixgbe/ixgbe_82599.c

2315

hw->mac.ops.disable_sec_rx_path(hw);

sys/dev/ixgbe/ixgbe_82599.c

2318

ixgbe_enable_rx(hw);

sys/dev/ixgbe/ixgbe_82599.c

232

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);

sys/dev/ixgbe/ixgbe_82599.c

2320

ixgbe_disable_rx(hw);

sys/dev/ixgbe/ixgbe_82599.c

2322

hw->mac.ops.enable_sec_rx_path(hw);

sys/dev/ixgbe/ixgbe_82599.c

2337

static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

234

msec_delay(hw->eeprom.semaphore_delay);

sys/dev/ixgbe/ixgbe_82599.c

2346

if (hw->phy.media_type != ixgbe_media_type_fiber) {

sys/dev/ixgbe/ixgbe_82599.c

2352

if (hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset)) {

sys/dev/ixgbe/ixgbe_82599.c

2362

if (hw->eeprom.ops.read(hw, (fw_offset +

sys/dev/ixgbe/ixgbe_82599.c

2376

if (hw->eeprom.ops.read(hw, (fw_ptp_cfg_offset +

sys/dev/ixgbe/ixgbe_82599.c

2398

bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

2407

status = hw->eeprom.ops.read(hw, IXGBE_FW_PTR, &fw_offset);

sys/dev/ixgbe/ixgbe_82599.c

2414

status = hw->eeprom.ops.read(hw, (fw_offset +

sys/dev/ixgbe/ixgbe_82599.c

2423

status = hw->eeprom.ops.read(hw, (fw_lesm_param_offset +

sys/dev/ixgbe/ixgbe_82599.c

2446

static s32 ixgbe_read_eeprom_buffer_82599(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_82599.c

2449

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_82599.c

2460

ret_val = ixgbe_read_eerd_buffer_generic(hw, offset, words,

sys/dev/ixgbe/ixgbe_82599.c

2463

ret_val = ixgbe_read_eeprom_buffer_bit_bang_generic(hw, offset,

sys/dev/ixgbe/ixgbe_82599.c

2480

static s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

2483

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_82599.c

2494

ret_val = ixgbe_read_eerd_generic(hw, offset, data);

sys/dev/ixgbe/ixgbe_82599.c

2496

ret_val = ixgbe_read_eeprom_bit_bang_generic(hw, offset, data);

sys/dev/ixgbe/ixgbe_82599.c

250

s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)

sys/dev/ixgbe/ixgbe_82599.c

2509

s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

2516

autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2);

sys/dev/ixgbe/ixgbe_82599.c

2519

IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg);

sys/dev/ixgbe/ixgbe_82599.c

2520

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

2523

autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82599.c

2526

IXGBE_WRITE_REG(hw, IXGBE_AUTOC,

sys/dev/ixgbe/ixgbe_82599.c

2531

anlp1_reg = IXGBE_READ_REG(hw, IXGBE_ANLP1);

sys/dev/ixgbe/ixgbe_82599.c

2546

IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);

sys/dev/ixgbe/ixgbe_82599.c

2547

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

256

if (ixgbe_verify_lesm_fw_enabled_82599(hw)) {

sys/dev/ixgbe/ixgbe_82599.c

2562

static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_82599.c

257

ret_val = hw->mac.ops.acquire_swfw_sync(hw,

sys/dev/ixgbe/ixgbe_82599.c

2571

if (hw->phy.qsfp_shared_i2c_bus == true) {

sys/dev/ixgbe/ixgbe_82599.c

2573

esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_82599.c

2575

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_82599.c

2576

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

2579

esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_82599.c

2595

status = ixgbe_read_i2c_byte_generic(hw, byte_offset, dev_addr, data);

sys/dev/ixgbe/ixgbe_82599.c

2599

if (hw->phy.qsfp_shared_i2c_bus == true) {

sys/dev/ixgbe/ixgbe_82599.c

2601

esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_82599.c

2603

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_82599.c

2604

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

2620

static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_82599.c

2629

if (hw->phy.qsfp_shared_i2c_bus == true) {

sys/dev/ixgbe/ixgbe_82599.c

2631

esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_82599.c

2633

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_82599.c

2634

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

2637

esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_82599.c

265

*reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82599.c

2653

status = ixgbe_write_i2c_byte_generic(hw, byte_offset, dev_addr, data);

sys/dev/ixgbe/ixgbe_82599.c

2657

if (hw->phy.qsfp_shared_i2c_bus == true) {

sys/dev/ixgbe/ixgbe_82599.c

2659

esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_82599.c

2661

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_82599.c

2662

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

279

s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 autoc, bool locked)

sys/dev/ixgbe/ixgbe_82599.c

284

if (ixgbe_check_reset_blocked(hw))

sys/dev/ixgbe/ixgbe_82599.c

291

if (!locked && ixgbe_verify_lesm_fw_enabled_82599(hw)) {

sys/dev/ixgbe/ixgbe_82599.c

292

ret_val = hw->mac.ops.acquire_swfw_sync(hw,

sys/dev/ixgbe/ixgbe_82599.c

300

IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc);

sys/dev/ixgbe/ixgbe_82599.c

301

ret_val = ixgbe_reset_pipeline_82599(hw);

sys/dev/ixgbe/ixgbe_82599.c

308

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);

sys/dev/ixgbe/ixgbe_82599.c

321

s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

323

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_82599.c

324

struct ixgbe_phy_info *phy = &hw->phy;

sys/dev/ixgbe/ixgbe_82599.c

325

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_82599.c

331

ixgbe_init_phy_ops_generic(hw);

sys/dev/ixgbe/ixgbe_82599.c

332

ret_val = ixgbe_init_ops_generic(hw);

sys/dev/ixgbe/ixgbe_82599.c

376

ixgbe_init_mac_link_ops_82599(hw);

sys/dev/ixgbe/ixgbe_82599.c

384

mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw);

sys/dev/ixgbe/ixgbe_82599.c

386

mac->arc_subsystem_valid = !!(IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw))

sys/dev/ixgbe/ixgbe_82599.c

390

hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_pf;

sys/dev/ixgbe/ixgbe_82599.c

422

s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

433

if (hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 ||

sys/dev/ixgbe/ixgbe_82599.c

434

hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 ||

sys/dev/ixgbe/ixgbe_82599.c

435

hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 ||

sys/dev/ixgbe/ixgbe_82599.c

436

hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 ||

sys/dev/ixgbe/ixgbe_82599.c

437

hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 ||

sys/dev/ixgbe/ixgbe_82599.c

438

hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1 ||

sys/dev/ixgbe/ixgbe_82599.c

439

hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core0 ||

sys/dev/ixgbe/ixgbe_82599.c

440

hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core1) {

sys/dev/ixgbe/ixgbe_82599.c

446

if (hw->phy.sfp_type == ixgbe_sfp_type_da_cu_core0 ||

sys/dev/ixgbe/ixgbe_82599.c

447

hw->phy.sfp_type == ixgbe_sfp_type_da_cu_core1) {

sys/dev/ixgbe/ixgbe_82599.c

451

if (hw->phy.multispeed_fiber)

sys/dev/ixgbe/ixgbe_82599.c

462

if (hw->mac.orig_link_settings_stored)

sys/dev/ixgbe/ixgbe_82599.c

463

autoc = hw->mac.orig_autoc;

sys/dev/ixgbe/ixgbe_82599.c

465

autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82599.c

48

static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

51

static s32 ixgbe_verify_fw_version_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.c

52

static s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

522

if (hw->phy.multispeed_fiber) {

sys/dev/ixgbe/ixgbe_82599.c

529

if (hw->phy.media_type == ixgbe_media_type_fiber_qsfp)

sys/dev/ixgbe/ixgbe_82599.c

54

static s32 ixgbe_read_eeprom_buffer_82599(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_82599.c

545

enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

552

switch (hw->phy.type) {

sys/dev/ixgbe/ixgbe_82599.c

56

static s32 ixgbe_read_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_82599.c

561

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_82599.c

58

static s32 ixgbe_write_i2c_byte_82599(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_82599.c

593

hw->phy.multispeed_fiber = true;

sys/dev/ixgbe/ixgbe_82599.c

61

void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

610

void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

617

status = ixgbe_read_eeprom(hw, IXGBE_EEPROM_CTRL_2, &ee_ctrl_2);

sys/dev/ixgbe/ixgbe_82599.c

620

!ixgbe_mng_present(hw) && !hw->wol_enabled &&

sys/dev/ixgbe/ixgbe_82599.c

622

autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2);

sys/dev/ixgbe/ixgbe_82599.c

624

IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg);

sys/dev/ixgbe/ixgbe_82599.c

63

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_82599.c

636

s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

651

if (ixgbe_verify_lesm_fw_enabled_82599(hw)) {

sys/dev/ixgbe/ixgbe_82599.c

652

status = hw->mac.ops.acquire_swfw_sync(hw,

sys/dev/ixgbe/ixgbe_82599.c

661

ixgbe_reset_pipeline_82599(hw);

sys/dev/ixgbe/ixgbe_82599.c

664

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);

sys/dev/ixgbe/ixgbe_82599.c

668

autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82599.c

677

links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);

sys/dev/ixgbe/ixgbe_82599.c

704

void ixgbe_disable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

706

u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_82599.c

709

if (ixgbe_check_reset_blocked(hw))

sys/dev/ixgbe/ixgbe_82599.c

71

if ((mac->ops.get_media_type(hw) == ixgbe_media_type_fiber) &&

sys/dev/ixgbe/ixgbe_82599.c

714

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg);

sys/dev/ixgbe/ixgbe_82599.c

715

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

72

!ixgbe_mng_enabled(hw)) {

sys/dev/ixgbe/ixgbe_82599.c

727

void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

729

u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_82599.c

733

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg);

sys/dev/ixgbe/ixgbe_82599.c

734

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

750

void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_82599.c

755

if (ixgbe_check_reset_blocked(hw))

sys/dev/ixgbe/ixgbe_82599.c

758

if (hw->mac.autotry_restart) {

sys/dev/ixgbe/ixgbe_82599.c

759

ixgbe_disable_tx_laser_multispeed_fiber(hw);

sys/dev/ixgbe/ixgbe_82599.c

760

ixgbe_enable_tx_laser_multispeed_fiber(hw);

sys/dev/ixgbe/ixgbe_82599.c

761

hw->mac.autotry_restart = false;

sys/dev/ixgbe/ixgbe_82599.c

772

void ixgbe_set_hard_rate_select_speed(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

775

u32 esdp_reg = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_82599.c

790

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp_reg);

sys/dev/ixgbe/ixgbe_82599.c

791

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_82599.c

802

s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

810

u32 autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_82599.c

815

hw->phy.autoneg_advertised = 0;

sys/dev/ixgbe/ixgbe_82599.c

818

hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL;

sys/dev/ixgbe/ixgbe_82599.c

821

hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL;

sys/dev/ixgbe/ixgbe_82599.c

824

hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL;

sys/dev/ixgbe/ixgbe_82599.c

834

hw->phy.smart_speed_active = false;

sys/dev/ixgbe/ixgbe_82599.c

836

status = ixgbe_setup_mac_link_82599(hw, speed,

sys/dev/ixgbe/ixgbe_82599.c

85

if (hw->phy.multispeed_fiber) {

sys/dev/ixgbe/ixgbe_82599.c

851

status = ixgbe_check_link(hw, &link_speed, &link_up,

sys/dev/ixgbe/ixgbe_82599.c

870

hw->phy.smart_speed_active = true;

sys/dev/ixgbe/ixgbe_82599.c

871

status = ixgbe_setup_mac_link_82599(hw, speed,

sys/dev/ixgbe/ixgbe_82599.c

886

status = ixgbe_check_link(hw, &link_speed, &link_up, false);

sys/dev/ixgbe/ixgbe_82599.c

895

hw->phy.smart_speed_active = false;

sys/dev/ixgbe/ixgbe_82599.c

896

status = ixgbe_setup_mac_link_82599(hw, speed,

sys/dev/ixgbe/ixgbe_82599.c

91

if (ixgbe_get_media_type(hw) == ixgbe_media_type_fiber_fixed)

sys/dev/ixgbe/ixgbe_82599.c

914

s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.c

921

u32 current_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC); /* holds the value of AUTOC register at this current point in time */

sys/dev/ixgbe/ixgbe_82599.c

924

u32 autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);

sys/dev/ixgbe/ixgbe_82599.c

933

status = ixgbe_get_link_capabilities(hw, &link_capabilities, &autoneg);

sys/dev/ixgbe/ixgbe_82599.c

945

if (hw->mac.orig_link_settings_stored)

sys/dev/ixgbe/ixgbe_82599.c

946

orig_autoc = hw->mac.orig_autoc;

sys/dev/ixgbe/ixgbe_82599.c

95

if ((ixgbe_get_media_type(hw) == ixgbe_media_type_backplane) &&

sys/dev/ixgbe/ixgbe_82599.c

96

(hw->phy.smart_speed == ixgbe_smart_speed_auto ||

sys/dev/ixgbe/ixgbe_82599.c

962

(hw->phy.smart_speed_active == false))

sys/dev/ixgbe/ixgbe_82599.c

97

hw->phy.smart_speed == ixgbe_smart_speed_on) &&

sys/dev/ixgbe/ixgbe_82599.c

98

!ixgbe_verify_lesm_fw_enabled_82599(hw)) {

sys/dev/ixgbe/ixgbe_82599.c

982

if (autoneg || hw->phy.type == ixgbe_phy_qsfp_intel)

sys/dev/ixgbe/ixgbe_82599.c

991

status = hw->mac.ops.prot_autoc_write(hw, autoc, false);

sys/dev/ixgbe/ixgbe_82599.h

38

s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.h

40

enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.h

41

void ixgbe_disable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.h

42

void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.h

43

void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.h

44

void ixgbe_set_hard_rate_select_speed(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.h

46

s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.h

49

s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_82599.h

51

s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_82599.h

53

s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.h

54

void ixgbe_init_mac_link_ops_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.h

55

s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.h

56

s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);

sys/dev/ixgbe/ixgbe_82599.h

57

s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);

sys/dev/ixgbe/ixgbe_82599.h

58

s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.h

59

s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.h

60

s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.h

61

u64 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_82599.h

62

s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval);

sys/dev/ixgbe/ixgbe_82599.h

63

s32 prot_autoc_read_82599(struct ixgbe_hw *hw, bool *locked, u32 *reg_val);

sys/dev/ixgbe/ixgbe_82599.h

64

s32 prot_autoc_write_82599(struct ixgbe_hw *hw, u32 reg_val, bool locked);

sys/dev/ixgbe/ixgbe_api.c

1000

return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,

sys/dev/ixgbe/ixgbe_api.c

1001

(hw, vmdq), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

101

status = ixgbe_init_ops_82599(hw);

sys/dev/ixgbe/ixgbe_api.c

1010

s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

sys/dev/ixgbe/ixgbe_api.c

1012

return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),

sys/dev/ixgbe/ixgbe_api.c

1024

s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1026

return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),

sys/dev/ixgbe/ixgbe_api.c

1034

u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1036

return hw->mac.num_rar_entries;

sys/dev/ixgbe/ixgbe_api.c

104

status = ixgbe_init_ops_X540(hw);

sys/dev/ixgbe/ixgbe_api.c

1050

s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,

sys/dev/ixgbe/ixgbe_api.c

1053

return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,

sys/dev/ixgbe/ixgbe_api.c

107

status = ixgbe_init_ops_X550(hw);

sys/dev/ixgbe/ixgbe_api.c

1071

s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,

sys/dev/ixgbe/ixgbe_api.c

1075

return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,

sys/dev/ixgbe/ixgbe_api.c

1086

s32 ixgbe_enable_mc(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1088

return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),

sys/dev/ixgbe/ixgbe_api.c

1098

s32 ixgbe_disable_mc(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

110

status = ixgbe_init_ops_X550EM_x(hw);

sys/dev/ixgbe/ixgbe_api.c

1100

return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),

sys/dev/ixgbe/ixgbe_api.c

1110

s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1112

return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),

sys/dev/ixgbe/ixgbe_api.c

1126

s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,

sys/dev/ixgbe/ixgbe_api.c

1129

return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,

sys/dev/ixgbe/ixgbe_api.c

113

status = ixgbe_init_ops_X550EM_a(hw);

sys/dev/ixgbe/ixgbe_api.c

1146

s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,

sys/dev/ixgbe/ixgbe_api.c

1149

return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,

sys/dev/ixgbe/ixgbe_api.c

116

status = ixgbe_init_ops_E610(hw);

sys/dev/ixgbe/ixgbe_api.c

1161

s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vf_number)

sys/dev/ixgbe/ixgbe_api.c

1163

return ixgbe_call_func(hw, hw->mac.ops.toggle_txdctl, (hw,

sys/dev/ixgbe/ixgbe_api.c

1173

s32 ixgbe_fc_enable(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1175

return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),

sys/dev/ixgbe/ixgbe_api.c

1185

s32 ixgbe_setup_fc(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1187

return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),

sys/dev/ixgbe/ixgbe_api.c

1201

s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,

sys/dev/ixgbe/ixgbe_api.c

1204

return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,

sys/dev/ixgbe/ixgbe_api.c

1216

s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1218

return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),

sys/dev/ixgbe/ixgbe_api.c

1228

s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1230

return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),

sys/dev/ixgbe/ixgbe_api.c

124

status = ixgbe_init_ops_vf(hw);

sys/dev/ixgbe/ixgbe_api.c

1241

s32 ixgbe_dmac_config(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1243

return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),

sys/dev/ixgbe/ixgbe_api.c

1253

s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1255

return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),

sys/dev/ixgbe/ixgbe_api.c

1266

s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1268

return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),

sys/dev/ixgbe/ixgbe_api.c

1282

s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)

sys/dev/ixgbe/ixgbe_api.c

1284

return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),

sys/dev/ixgbe/ixgbe_api.c

1294

void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,

sys/dev/ixgbe/ixgbe_api.c

1297

if (hw->mac.ops.set_source_address_pruning)

sys/dev/ixgbe/ixgbe_api.c

1298

hw->mac.ops.set_source_address_pruning(hw, enable, pool);

sys/dev/ixgbe/ixgbe_api.c

130

hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME;

sys/dev/ixgbe/ixgbe_api.c

1308

void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)

sys/dev/ixgbe/ixgbe_api.c

1310

if (hw->mac.ops.set_ethertype_anti_spoofing)

sys/dev/ixgbe/ixgbe_api.c

1311

hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);

sys/dev/ixgbe/ixgbe_api.c

1323

s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_api.c

1326

return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,

sys/dev/ixgbe/ixgbe_api.c

1339

s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_api.c

1342

return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,

sys/dev/ixgbe/ixgbe_api.c

1351

void ixgbe_disable_mdd(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1353

if (hw->mac.ops.disable_mdd)

sys/dev/ixgbe/ixgbe_api.c

1354

hw->mac.ops.disable_mdd(hw);

sys/dev/ixgbe/ixgbe_api.c

1362

void ixgbe_enable_mdd(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1364

if (hw->mac.ops.enable_mdd)

sys/dev/ixgbe/ixgbe_api.c

1365

hw->mac.ops.enable_mdd(hw);

sys/dev/ixgbe/ixgbe_api.c

1374

void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)

sys/dev/ixgbe/ixgbe_api.c

1376

if (hw->mac.ops.mdd_event)

sys/dev/ixgbe/ixgbe_api.c

1377

hw->mac.ops.mdd_event(hw, vf_bitmap);

sys/dev/ixgbe/ixgbe_api.c

1387

void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)

sys/dev/ixgbe/ixgbe_api.c

1389

if (hw->mac.ops.restore_mdd_vf)

sys/dev/ixgbe/ixgbe_api.c

1390

hw->mac.ops.restore_mdd_vf(hw, vf);

sys/dev/ixgbe/ixgbe_api.c

1398

bool ixgbe_fw_recovery_mode(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1400

if (hw->mac.ops.fw_recovery_mode)

sys/dev/ixgbe/ixgbe_api.c

1401

return hw->mac.ops.fw_recovery_mode(hw);

sys/dev/ixgbe/ixgbe_api.c

1412

s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1414

return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),

sys/dev/ixgbe/ixgbe_api.c

142

s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1429

s32 ixgbe_handle_lasi(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1431

return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw),

sys/dev/ixgbe/ixgbe_api.c

1443

s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status)

sys/dev/ixgbe/ixgbe_api.c

1445

return ixgbe_call_func(hw, hw->mac.ops.bypass_rw, (hw, cmd, status),

sys/dev/ixgbe/ixgbe_api.c

1461

bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg)

sys/dev/ixgbe/ixgbe_api.c

1463

return ixgbe_call_func(hw, hw->mac.ops.bypass_valid_rd,

sys/dev/ixgbe/ixgbe_api.c

1479

s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action)

sys/dev/ixgbe/ixgbe_api.c

148

if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {

sys/dev/ixgbe/ixgbe_api.c

1481

return ixgbe_call_func(hw, hw->mac.ops.bypass_set,

sys/dev/ixgbe/ixgbe_api.c

1482

(hw, cmd, event, action),

sys/dev/ixgbe/ixgbe_api.c

1492

s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value)

sys/dev/ixgbe/ixgbe_api.c

1494

return ixgbe_call_func(hw, hw->mac.ops.bypass_rd_eep,

sys/dev/ixgbe/ixgbe_api.c

1495

(hw, addr, value), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

150

"Unsupported vendor id: %x", hw->vendor_id);

sys/dev/ixgbe/ixgbe_api.c

1506

s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)

sys/dev/ixgbe/ixgbe_api.c

1508

return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,

sys/dev/ixgbe/ixgbe_api.c

1520

s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)

sys/dev/ixgbe/ixgbe_api.c

1522

return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,

sys/dev/ixgbe/ixgbe_api.c

1533

s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1535

return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),

sys/dev/ixgbe/ixgbe_api.c

154

hw->mvals = ixgbe_mvals_base;

sys/dev/ixgbe/ixgbe_api.c

1548

s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,

sys/dev/ixgbe/ixgbe_api.c

1551

return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,

sys/dev/ixgbe/ixgbe_api.c

156

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_api.c

1564

s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_api.c

1567

return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked,

sys/dev/ixgbe/ixgbe_api.c

1568

(hw, byte_offset, dev_addr, data),

sys/dev/ixgbe/ixgbe_api.c

1581

s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)

sys/dev/ixgbe/ixgbe_api.c

1583

return ixgbe_call_func(hw, hw->link.ops.read_link, (hw, addr,

sys/dev/ixgbe/ixgbe_api.c

1596

s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)

sys/dev/ixgbe/ixgbe_api.c

1598

return ixgbe_call_func(hw, hw->link.ops.read_link_unlocked,

sys/dev/ixgbe/ixgbe_api.c

1599

(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

1612

s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,

sys/dev/ixgbe/ixgbe_api.c

1615

return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,

sys/dev/ixgbe/ixgbe_api.c

1629

s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_api.c

1632

return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked,

sys/dev/ixgbe/ixgbe_api.c

1633

(hw, byte_offset, dev_addr, data),

sys/dev/ixgbe/ixgbe_api.c

1646

s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)

sys/dev/ixgbe/ixgbe_api.c

1648

return ixgbe_call_func(hw, hw->link.ops.write_link,

sys/dev/ixgbe/ixgbe_api.c

1649

(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

1661

s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)

sys/dev/ixgbe/ixgbe_api.c

1663

return ixgbe_call_func(hw, hw->link.ops.write_link_unlocked,

sys/dev/ixgbe/ixgbe_api.c

1664

(hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

1675

s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_api.c

1678

return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,

sys/dev/ixgbe/ixgbe_api.c

1679

(hw, byte_offset, eeprom_data),

sys/dev/ixgbe/ixgbe_api.c

169

hw->mac.type = ixgbe_mac_82598EB;

sys/dev/ixgbe/ixgbe_api.c

1691

s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)

sys/dev/ixgbe/ixgbe_api.c

1693

return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,

sys/dev/ixgbe/ixgbe_api.c

1694

(hw, byte_offset, eeprom_data),

sys/dev/ixgbe/ixgbe_api.c

1704

u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1706

return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,

sys/dev/ixgbe/ixgbe_api.c

1707

(hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);

sys/dev/ixgbe/ixgbe_api.c

1717

s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)

sys/dev/ixgbe/ixgbe_api.c

1719

return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,

sys/dev/ixgbe/ixgbe_api.c

1720

(hw, regval), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

1729

s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1731

return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,

sys/dev/ixgbe/ixgbe_api.c

1732

(hw), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

1741

s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1743

return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,

sys/dev/ixgbe/ixgbe_api.c

1744

(hw), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

1755

s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)

sys/dev/ixgbe/ixgbe_api.c

1757

return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,

sys/dev/ixgbe/ixgbe_api.c

1758

(hw, mask), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

1769

void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)

sys/dev/ixgbe/ixgbe_api.c

1771

if (hw->mac.ops.release_swfw_sync)

sys/dev/ixgbe/ixgbe_api.c

1772

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/ixgbe/ixgbe_api.c

1784

void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1786

if (hw->mac.ops.init_swfw_sync)

sys/dev/ixgbe/ixgbe_api.c

1787

hw->mac.ops.init_swfw_sync(hw);

sys/dev/ixgbe/ixgbe_api.c

1791

void ixgbe_disable_rx(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1793

if (hw->mac.ops.disable_rx)

sys/dev/ixgbe/ixgbe_api.c

1794

hw->mac.ops.disable_rx(hw);

sys/dev/ixgbe/ixgbe_api.c

1797

void ixgbe_enable_rx(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

1799

if (hw->mac.ops.enable_rx)

sys/dev/ixgbe/ixgbe_api.c

1800

hw->mac.ops.enable_rx(hw);

sys/dev/ixgbe/ixgbe_api.c

1810

void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)

sys/dev/ixgbe/ixgbe_api.c

1812

if (hw->mac.ops.set_rate_select_speed)

sys/dev/ixgbe/ixgbe_api.c

1813

hw->mac.ops.set_rate_select_speed(hw, speed);

sys/dev/ixgbe/ixgbe_api.c

187

hw->mac.type = ixgbe_mac_82599EB;

sys/dev/ixgbe/ixgbe_api.c

191

hw->mac.type = ixgbe_mac_82599_vf;

sys/dev/ixgbe/ixgbe_api.c

195

hw->mac.type = ixgbe_mac_X540_vf;

sys/dev/ixgbe/ixgbe_api.c

196

hw->mvals = ixgbe_mvals_X540;

sys/dev/ixgbe/ixgbe_api.c

201

hw->mac.type = ixgbe_mac_X540;

sys/dev/ixgbe/ixgbe_api.c

202

hw->mvals = ixgbe_mvals_X540;

sys/dev/ixgbe/ixgbe_api.c

206

hw->mac.type = ixgbe_mac_X550;

sys/dev/ixgbe/ixgbe_api.c

207

hw->mvals = ixgbe_mvals_X550;

sys/dev/ixgbe/ixgbe_api.c

215

hw->mac.type = ixgbe_mac_X550EM_x;

sys/dev/ixgbe/ixgbe_api.c

216

hw->mvals = ixgbe_mvals_X550EM_x;

sys/dev/ixgbe/ixgbe_api.c

229

hw->mac.type = ixgbe_mac_X550EM_a;

sys/dev/ixgbe/ixgbe_api.c

230

hw->mvals = ixgbe_mvals_X550EM_a;

sys/dev/ixgbe/ixgbe_api.c

234

hw->mac.type = ixgbe_mac_X550_vf;

sys/dev/ixgbe/ixgbe_api.c

235

hw->mvals = ixgbe_mvals_X550;

sys/dev/ixgbe/ixgbe_api.c

239

hw->mac.type = ixgbe_mac_X550EM_x_vf;

sys/dev/ixgbe/ixgbe_api.c

240

hw->mvals = ixgbe_mvals_X550EM_x;

sys/dev/ixgbe/ixgbe_api.c

244

hw->mac.type = ixgbe_mac_X550EM_a_vf;

sys/dev/ixgbe/ixgbe_api.c

245

hw->mvals = ixgbe_mvals_X550EM_a;

sys/dev/ixgbe/ixgbe_api.c

252

hw->mac.type = ixgbe_mac_E610;

sys/dev/ixgbe/ixgbe_api.c

253

hw->mvals = ixgbe_mvals_X550EM_a;

sys/dev/ixgbe/ixgbe_api.c

256

hw->mac.type = ixgbe_mac_E610_vf;

sys/dev/ixgbe/ixgbe_api.c

257

hw->mvals = ixgbe_mvals_X550EM_a;

sys/dev/ixgbe/ixgbe_api.c

263

hw->device_id);

sys/dev/ixgbe/ixgbe_api.c

268

hw->mac.type, ret_val);

sys/dev/ixgbe/ixgbe_api.c

278

s32 ixgbe_init_hw(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

280

return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),

sys/dev/ixgbe/ixgbe_api.c

291

s32 ixgbe_reset_hw(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

293

return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),

sys/dev/ixgbe/ixgbe_api.c

307

s32 ixgbe_start_hw(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

309

return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),

sys/dev/ixgbe/ixgbe_api.c

321

void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

323

if (hw->mac.ops.enable_relaxed_ordering)

sys/dev/ixgbe/ixgbe_api.c

324

hw->mac.ops.enable_relaxed_ordering(hw);

sys/dev/ixgbe/ixgbe_api.c

334

s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

336

return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),

sys/dev/ixgbe/ixgbe_api.c

346

enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

348

return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),

sys/dev/ixgbe/ixgbe_api.c

362

s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)

sys/dev/ixgbe/ixgbe_api.c

364

return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,

sys/dev/ixgbe/ixgbe_api.c

365

(hw, mac_addr), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

376

s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)

sys/dev/ixgbe/ixgbe_api.c

378

return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,

sys/dev/ixgbe/ixgbe_api.c

379

(hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

389

s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)

sys/dev/ixgbe/ixgbe_api.c

391

return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,

sys/dev/ixgbe/ixgbe_api.c

392

(hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

402

s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)

sys/dev/ixgbe/ixgbe_api.c

404

return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,

sys/dev/ixgbe/ixgbe_api.c

405

(hw, device_caps), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

417

s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,

sys/dev/ixgbe/ixgbe_api.c

420

return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,

sys/dev/ixgbe/ixgbe_api.c

421

(hw, wwnn_prefix, wwpn_prefix),

sys/dev/ixgbe/ixgbe_api.c

432

s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)

sys/dev/ixgbe/ixgbe_api.c

434

return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,

sys/dev/ixgbe/ixgbe_api.c

435

(hw, bs),

sys/dev/ixgbe/ixgbe_api.c

445

s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

447

return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),

sys/dev/ixgbe/ixgbe_api.c

457

u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

459

return hw->mac.max_tx_queues;

sys/dev/ixgbe/ixgbe_api.c

468

u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

470

return hw->mac.max_rx_queues;

sys/dev/ixgbe/ixgbe_api.c

482

s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

484

return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),

sys/dev/ixgbe/ixgbe_api.c

496

s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)

sys/dev/ixgbe/ixgbe_api.c

498

return ixgbe_call_func(hw, hw->eeprom.ops.read_pba_string,

sys/dev/ixgbe/ixgbe_api.c

499

(hw, pba_num, pba_num_size),

sys/dev/ixgbe/ixgbe_api.c

510

s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)

sys/dev/ixgbe/ixgbe_api.c

512

return ixgbe_read_pba_num_generic(hw, pba_num);

sys/dev/ixgbe/ixgbe_api.c

521

s32 ixgbe_identify_phy(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

525

if (hw->phy.type == ixgbe_phy_unknown) {

sys/dev/ixgbe/ixgbe_api.c

526

status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),

sys/dev/ixgbe/ixgbe_api.c

537

s32 ixgbe_reset_phy(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

541

if (hw->phy.type == ixgbe_phy_unknown) {

sys/dev/ixgbe/ixgbe_api.c

542

if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)

sys/dev/ixgbe/ixgbe_api.c

547

status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),

sys/dev/ixgbe/ixgbe_api.c

558

s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)

sys/dev/ixgbe/ixgbe_api.c

562

status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,

sys/dev/ixgbe/ixgbe_api.c

563

(hw, firmware_version),

sys/dev/ixgbe/ixgbe_api.c

577

s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

sys/dev/ixgbe/ixgbe_api.c

580

if (hw->phy.id == 0)

sys/dev/ixgbe/ixgbe_api.c

581

ixgbe_identify_phy(hw);

sys/dev/ixgbe/ixgbe_api.c

583

return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,

sys/dev/ixgbe/ixgbe_api.c

596

s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

sys/dev/ixgbe/ixgbe_api.c

599

if (hw->phy.id == 0)

sys/dev/ixgbe/ixgbe_api.c

600

ixgbe_identify_phy(hw);

sys/dev/ixgbe/ixgbe_api.c

602

return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,

sys/dev/ixgbe/ixgbe_api.c

612

s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

614

return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),

sys/dev/ixgbe/ixgbe_api.c

626

s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

628

return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),

sys/dev/ixgbe/ixgbe_api.c

641

s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_api.c

644

return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,

sys/dev/ixgbe/ixgbe_api.c

656

s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_api.c

659

return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,

sys/dev/ixgbe/ixgbe_api.c

669

s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)

sys/dev/ixgbe/ixgbe_api.c

67

void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)

sys/dev/ixgbe/ixgbe_api.c

671

return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),

sys/dev/ixgbe/ixgbe_api.c

684

s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_api.c

687

return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,

sys/dev/ixgbe/ixgbe_api.c

69

if (hw->mac.ops.get_rtrup2tc)

sys/dev/ixgbe/ixgbe_api.c

698

void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

70

hw->mac.ops.get_rtrup2tc(hw, map);

sys/dev/ixgbe/ixgbe_api.c

700

if (hw->mac.ops.disable_tx_laser)

sys/dev/ixgbe/ixgbe_api.c

701

hw->mac.ops.disable_tx_laser(hw);

sys/dev/ixgbe/ixgbe_api.c

710

void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

712

if (hw->mac.ops.enable_tx_laser)

sys/dev/ixgbe/ixgbe_api.c

713

hw->mac.ops.enable_tx_laser(hw);

sys/dev/ixgbe/ixgbe_api.c

724

void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

726

if (hw->mac.ops.flap_tx_laser)

sys/dev/ixgbe/ixgbe_api.c

727

hw->mac.ops.flap_tx_laser(hw);

sys/dev/ixgbe/ixgbe_api.c

739

s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_api.c

742

return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,

sys/dev/ixgbe/ixgbe_api.c

756

s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_api.c

759

return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,

sys/dev/ixgbe/ixgbe_api.c

772

s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_api.c

775

return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,

sys/dev/ixgbe/ixgbe_api.c

786

s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_api.c

788

return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),

sys/dev/ixgbe/ixgbe_api.c

799

s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_api.c

801

return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),

sys/dev/ixgbe/ixgbe_api.c

812

s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_api.c

814

return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),

sys/dev/ixgbe/ixgbe_api.c

825

s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_api.c

827

return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),

sys/dev/ixgbe/ixgbe_api.c

838

s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

840

return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),

sys/dev/ixgbe/ixgbe_api.c

85

s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

855

s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)

sys/dev/ixgbe/ixgbe_api.c

857

return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),

sys/dev/ixgbe/ixgbe_api.c

872

s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,

sys/dev/ixgbe/ixgbe_api.c

875

return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,

sys/dev/ixgbe/ixgbe_api.c

876

(hw, offset, words, data),

sys/dev/ixgbe/ixgbe_api.c

888

s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)

sys/dev/ixgbe/ixgbe_api.c

890

return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),

sys/dev/ixgbe/ixgbe_api.c

903

s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_api.c

906

return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,

sys/dev/ixgbe/ixgbe_api.c

907

(hw, offset, words, data),

sys/dev/ixgbe/ixgbe_api.c

918

s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)

sys/dev/ixgbe/ixgbe_api.c

920

return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,

sys/dev/ixgbe/ixgbe_api.c

921

(hw, checksum_val), IXGBE_NOT_IMPLEMENTED);

sys/dev/ixgbe/ixgbe_api.c

928

s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_api.c

930

return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),

sys/dev/ixgbe/ixgbe_api.c

94

ixgbe_set_mac_type(hw);

sys/dev/ixgbe/ixgbe_api.c

943

s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)

sys/dev/ixgbe/ixgbe_api.c

945

return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,

sys/dev/ixgbe/ixgbe_api.c

946

(hw, addr, vmdq),

sys/dev/ixgbe/ixgbe_api.c

96

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_api.c

960

s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

sys/dev/ixgbe/ixgbe_api.c

963

return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,

sys/dev/ixgbe/ixgbe_api.c

974

s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_api.c

976

return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),

sys/dev/ixgbe/ixgbe_api.c

98

status = ixgbe_init_ops_82598(hw);

sys/dev/ixgbe/ixgbe_api.c

986

s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

sys/dev/ixgbe/ixgbe_api.c

988

return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),

sys/dev/ixgbe/ixgbe_api.c

998

s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)

sys/dev/ixgbe/ixgbe_api.h

101

s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

102

s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);

sys/dev/ixgbe/ixgbe_api.h

103

s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_api.h

105

s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);

sys/dev/ixgbe/ixgbe_api.h

106

s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_api.h

109

s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);

sys/dev/ixgbe/ixgbe_api.h

110

s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

112

s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);

sys/dev/ixgbe/ixgbe_api.h

113

s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

sys/dev/ixgbe/ixgbe_api.h

115

s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_api.h

116

s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

sys/dev/ixgbe/ixgbe_api.h

117

s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq);

sys/dev/ixgbe/ixgbe_api.h

118

s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

sys/dev/ixgbe/ixgbe_api.h

119

s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

120

u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

121

s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,

sys/dev/ixgbe/ixgbe_api.h

123

s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,

sys/dev/ixgbe/ixgbe_api.h

126

void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);

sys/dev/ixgbe/ixgbe_api.h

127

s32 ixgbe_enable_mc(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

128

s32 ixgbe_disable_mc(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

129

s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

130

s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,

sys/dev/ixgbe/ixgbe_api.h

132

s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,

sys/dev/ixgbe/ixgbe_api.h

135

s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vf_number);

sys/dev/ixgbe/ixgbe_api.h

136

s32 ixgbe_fc_enable(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

137

s32 ixgbe_setup_fc(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

138

s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,

sys/dev/ixgbe/ixgbe_api.h

140

s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

141

s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

142

void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);

sys/dev/ixgbe/ixgbe_api.h

143

s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_api.h

145

s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);

sys/dev/ixgbe/ixgbe_api.h

146

s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);

sys/dev/ixgbe/ixgbe_api.h

147

s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

148

s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);

sys/dev/ixgbe/ixgbe_api.h

149

u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

150

s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);

sys/dev/ixgbe/ixgbe_api.h

151

s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

152

s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

153

s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

154

s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);

sys/dev/ixgbe/ixgbe_api.h

155

s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,

sys/dev/ixgbe/ixgbe_api.h

157

void ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_api.h

161

s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_api.h

163

s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_api.h

166

s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_api.h

169

s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_api.h

179

bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

180

s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,

sys/dev/ixgbe/ixgbe_api.h

182

s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_api.h

184

s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);

sys/dev/ixgbe/ixgbe_api.h

185

s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);

sys/dev/ixgbe/ixgbe_api.h

186

s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,

sys/dev/ixgbe/ixgbe_api.h

188

void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue);

sys/dev/ixgbe/ixgbe_api.h

189

s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_api.h

191

s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);

sys/dev/ixgbe/ixgbe_api.h

192

s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);

sys/dev/ixgbe/ixgbe_api.h

193

s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);

sys/dev/ixgbe/ixgbe_api.h

194

s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);

sys/dev/ixgbe/ixgbe_api.h

195

s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);

sys/dev/ixgbe/ixgbe_api.h

196

s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);

sys/dev/ixgbe/ixgbe_api.h

197

s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);

sys/dev/ixgbe/ixgbe_api.h

198

void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);

sys/dev/ixgbe/ixgbe_api.h

199

void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

200

s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,

sys/dev/ixgbe/ixgbe_api.h

202

s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs);

sys/dev/ixgbe/ixgbe_api.h

203

s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status);

sys/dev/ixgbe/ixgbe_api.h

204

s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);

sys/dev/ixgbe/ixgbe_api.h

205

s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value);

sys/dev/ixgbe/ixgbe_api.h

206

bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg);

sys/dev/ixgbe/ixgbe_api.h

207

s32 ixgbe_dmac_config(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

208

s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

209

s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

210

s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee);

sys/dev/ixgbe/ixgbe_api.h

211

void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,

sys/dev/ixgbe/ixgbe_api.h

213

void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable,

sys/dev/ixgbe/ixgbe_api.h

215

s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_api.h

217

s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_api.h

219

void ixgbe_disable_mdd(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

220

void ixgbe_enable_mdd(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

221

void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap);

sys/dev/ixgbe/ixgbe_api.h

222

void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf);

sys/dev/ixgbe/ixgbe_api.h

223

bool ixgbe_fw_recovery_mode(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

224

s32 ixgbe_enter_lplu(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

225

s32 ixgbe_handle_lasi(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

226

void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed);

sys/dev/ixgbe/ixgbe_api.h

227

void ixgbe_disable_rx(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

228

void ixgbe_enable_rx(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

229

s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,

sys/dev/ixgbe/ixgbe_api.h

40

void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map);

sys/dev/ixgbe/ixgbe_api.h

42

s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

44

extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

45

extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

46

extern s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

47

extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

48

extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

49

extern s32 ixgbe_init_ops_X550EM_x(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

50

extern s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

51

extern s32 ixgbe_init_ops_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

52

extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

54

s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

55

s32 ixgbe_init_hw(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

56

s32 ixgbe_reset_hw(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

57

s32 ixgbe_start_hw(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

58

void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

59

s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

60

enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

61

s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);

sys/dev/ixgbe/ixgbe_api.h

62

s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

63

u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

64

u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

65

s32 ixgbe_stop_adapter(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

66

s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);

sys/dev/ixgbe/ixgbe_api.h

67

s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);

sys/dev/ixgbe/ixgbe_api.h

69

s32 ixgbe_identify_phy(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

70

s32 ixgbe_reset_phy(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

71

s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

sys/dev/ixgbe/ixgbe_api.h

73

s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

sys/dev/ixgbe/ixgbe_api.h

76

s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

77

s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

78

s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_api.h

81

s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_api.h

85

void ixgbe_disable_tx_laser(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

86

void ixgbe_enable_tx_laser(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

87

void ixgbe_flap_tx_laser(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_api.h

88

s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_api.h

90

s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_api.h

92

s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_api.h

94

s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_api.h

96

s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_api.h

97

s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_api.h

98

s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_api.h

99

s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_common.c

1010

void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status)

sys/dev/ixgbe/ixgbe_common.c

1012

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_common.c

1014

if (hw->bus.type == ixgbe_bus_type_unknown)

sys/dev/ixgbe/ixgbe_common.c

1015

hw->bus.type = ixgbe_bus_type_pci_express;

sys/dev/ixgbe/ixgbe_common.c

1019

hw->bus.width = ixgbe_bus_width_pcie_x1;

sys/dev/ixgbe/ixgbe_common.c

1022

hw->bus.width = ixgbe_bus_width_pcie_x2;

sys/dev/ixgbe/ixgbe_common.c

1025

hw->bus.width = ixgbe_bus_width_pcie_x4;

sys/dev/ixgbe/ixgbe_common.c

1028

hw->bus.width = ixgbe_bus_width_pcie_x8;

sys/dev/ixgbe/ixgbe_common.c

1031

hw->bus.width = ixgbe_bus_width_unknown;

sys/dev/ixgbe/ixgbe_common.c

1037

hw->bus.speed = ixgbe_bus_speed_2500;

sys/dev/ixgbe/ixgbe_common.c

1040

hw->bus.speed = ixgbe_bus_speed_5000;

sys/dev/ixgbe/ixgbe_common.c

1043

hw->bus.speed = ixgbe_bus_speed_8000;

sys/dev/ixgbe/ixgbe_common.c

1046

hw->bus.speed = ixgbe_bus_speed_16000;

sys/dev/ixgbe/ixgbe_common.c

1049

hw->bus.speed = ixgbe_bus_speed_unknown;

sys/dev/ixgbe/ixgbe_common.c

1053

mac->ops.set_lan_id(hw);

sys/dev/ixgbe/ixgbe_common.c

1063

s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

1070

link_status = IXGBE_READ_PCIE_WORD(hw, hw->mac.type == ixgbe_mac_E610 ?

sys/dev/ixgbe/ixgbe_common.c

1074

ixgbe_set_pci_config_data_generic(hw, link_status);

sys/dev/ixgbe/ixgbe_common.c

1087

void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

1089

struct ixgbe_bus_info *bus = &hw->bus;

sys/dev/ixgbe/ixgbe_common.c

1095

reg = IXGBE_READ_REG(hw, IXGBE_STATUS);

sys/dev/ixgbe/ixgbe_common.c

1100

reg = IXGBE_READ_REG(hw, IXGBE_FACTPS_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

1105

if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP) {

sys/dev/ixgbe/ixgbe_common.c

1106

hw->eeprom.ops.read(hw, IXGBE_EEPROM_CTRL_4, &ee_ctrl_4);

sys/dev/ixgbe/ixgbe_common.c

1121

s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

1132

hw->adapter_stopped = true;

sys/dev/ixgbe/ixgbe_common.c

1135

ixgbe_disable_rx(hw);

sys/dev/ixgbe/ixgbe_common.c

1138

IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);

sys/dev/ixgbe/ixgbe_common.c

1141

IXGBE_READ_REG(hw, IXGBE_EICR);

sys/dev/ixgbe/ixgbe_common.c

1144

for (i = 0; i < hw->mac.max_tx_queues; i++)

sys/dev/ixgbe/ixgbe_common.c

1145

IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(i), IXGBE_TXDCTL_SWFLSH);

sys/dev/ixgbe/ixgbe_common.c

1148

for (i = 0; i < hw->mac.max_rx_queues; i++) {

sys/dev/ixgbe/ixgbe_common.c

1149

reg_val = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));

sys/dev/ixgbe/ixgbe_common.c

1152

IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(i), reg_val);

sys/dev/ixgbe/ixgbe_common.c

1156

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

1163

return ixgbe_disable_pcie_primary(hw);

sys/dev/ixgbe/ixgbe_common.c

1173

s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

1175

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_common.c

1179

led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);

sys/dev/ixgbe/ixgbe_common.c

1196

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_common.c

1212

s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_common.c

1214

u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);

sys/dev/ixgbe/ixgbe_common.c

1224

IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);

sys/dev/ixgbe/ixgbe_common.c

1225

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

1235

s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_common.c

1237

u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);

sys/dev/ixgbe/ixgbe_common.c

1247

IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);

sys/dev/ixgbe/ixgbe_common.c

1248

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

1260

s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

1262

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_common.c

1280

eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

1315

s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.c

1323

hw->eeprom.ops.init_params(hw);

sys/dev/ixgbe/ixgbe_common.c

1330

if (offset + words > hw->eeprom.word_size) {

sys/dev/ixgbe/ixgbe_common.c

1339

if ((hw->eeprom.word_page_size == 0) &&

sys/dev/ixgbe/ixgbe_common.c

1341

ixgbe_detect_eeprom_page_size_generic(hw, offset);

sys/dev/ixgbe/ixgbe_common.c

1351

status = ixgbe_write_eeprom_buffer_bit_bang(hw, offset + i,

sys/dev/ixgbe/ixgbe_common.c

1372

static s32 ixgbe_write_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.c

1384

status = ixgbe_acquire_eeprom(hw);

sys/dev/ixgbe/ixgbe_common.c

1387

if (ixgbe_ready_eeprom(hw) != IXGBE_SUCCESS) {

sys/dev/ixgbe/ixgbe_common.c

1388

ixgbe_release_eeprom(hw);

sys/dev/ixgbe/ixgbe_common.c

1395

ixgbe_standby_eeprom(hw);

sys/dev/ixgbe/ixgbe_common.c

1398

ixgbe_shift_out_eeprom_bits(hw,

sys/dev/ixgbe/ixgbe_common.c

1402

ixgbe_standby_eeprom(hw);

sys/dev/ixgbe/ixgbe_common.c

1408

if ((hw->eeprom.address_bits == 8) &&

sys/dev/ixgbe/ixgbe_common.c

1413

ixgbe_shift_out_eeprom_bits(hw, write_opcode,

sys/dev/ixgbe/ixgbe_common.c

1415

ixgbe_shift_out_eeprom_bits(hw, (u16)((offset + i) * 2),

sys/dev/ixgbe/ixgbe_common.c

1416

hw->eeprom.address_bits);

sys/dev/ixgbe/ixgbe_common.c

1418

page_size = hw->eeprom.word_page_size;

sys/dev/ixgbe/ixgbe_common.c

1424

ixgbe_shift_out_eeprom_bits(hw, word, 16);

sys/dev/ixgbe/ixgbe_common.c

1435

ixgbe_standby_eeprom(hw);

sys/dev/ixgbe/ixgbe_common.c

1439

ixgbe_release_eeprom(hw);

sys/dev/ixgbe/ixgbe_common.c

1454

s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data)

sys/dev/ixgbe/ixgbe_common.c

1460

hw->eeprom.ops.init_params(hw);

sys/dev/ixgbe/ixgbe_common.c

1462

if (offset >= hw->eeprom.word_size) {

sys/dev/ixgbe/ixgbe_common.c

1467

status = ixgbe_write_eeprom_buffer_bit_bang(hw, offset, 1, &data);

sys/dev/ixgbe/ixgbe_common.c

1482

s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.c

1490

hw->eeprom.ops.init_params(hw);

sys/dev/ixgbe/ixgbe_common.c

1497

if (offset + words > hw->eeprom.word_size) {

sys/dev/ixgbe/ixgbe_common.c

1511

status = ixgbe_read_eeprom_buffer_bit_bang(hw, offset + i,

sys/dev/ixgbe/ixgbe_common.c

1531

static s32 ixgbe_read_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.c

1542

status = ixgbe_acquire_eeprom(hw);

sys/dev/ixgbe/ixgbe_common.c

1545

if (ixgbe_ready_eeprom(hw) != IXGBE_SUCCESS) {

sys/dev/ixgbe/ixgbe_common.c

1546

ixgbe_release_eeprom(hw);

sys/dev/ixgbe/ixgbe_common.c

1553

ixgbe_standby_eeprom(hw);

sys/dev/ixgbe/ixgbe_common.c

1558

if ((hw->eeprom.address_bits == 8) &&

sys/dev/ixgbe/ixgbe_common.c

1563

ixgbe_shift_out_eeprom_bits(hw, read_opcode,

sys/dev/ixgbe/ixgbe_common.c

1565

ixgbe_shift_out_eeprom_bits(hw, (u16)((offset + i) * 2),

sys/dev/ixgbe/ixgbe_common.c

1566

hw->eeprom.address_bits);

sys/dev/ixgbe/ixgbe_common.c

1569

word_in = ixgbe_shift_in_eeprom_bits(hw, 16);

sys/dev/ixgbe/ixgbe_common.c

1574

ixgbe_release_eeprom(hw);

sys/dev/ixgbe/ixgbe_common.c

1588

s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.c

1595

hw->eeprom.ops.init_params(hw);

sys/dev/ixgbe/ixgbe_common.c

1597

if (offset >= hw->eeprom.word_size) {

sys/dev/ixgbe/ixgbe_common.c

1602

status = ixgbe_read_eeprom_buffer_bit_bang(hw, offset, 1, data);

sys/dev/ixgbe/ixgbe_common.c

1617

s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.c

1626

hw->eeprom.ops.init_params(hw);

sys/dev/ixgbe/ixgbe_common.c

1634

if (offset >= hw->eeprom.word_size) {

sys/dev/ixgbe/ixgbe_common.c

164

bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

1644

IXGBE_WRITE_REG(hw, IXGBE_EERD, eerd);

sys/dev/ixgbe/ixgbe_common.c

1645

status = ixgbe_poll_eerd_eewr_done(hw, IXGBE_NVM_POLL_READ);

sys/dev/ixgbe/ixgbe_common.c

1648

data[i] = (IXGBE_READ_REG(hw, IXGBE_EERD) >>

sys/dev/ixgbe/ixgbe_common.c

1668

static s32 ixgbe_detect_eeprom_page_size_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.c

1680

hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX;

sys/dev/ixgbe/ixgbe_common.c

1681

status = ixgbe_write_eeprom_buffer_bit_bang(hw, offset,

sys/dev/ixgbe/ixgbe_common.c

1683

hw->eeprom.word_page_size = 0;

sys/dev/ixgbe/ixgbe_common.c

1687

status = ixgbe_read_eeprom_buffer_bit_bang(hw, offset, 1, data);

sys/dev/ixgbe/ixgbe_common.c

1695

hw->eeprom.word_page_size = IXGBE_EEPROM_PAGE_SIZE_MAX - data[0];

sys/dev/ixgbe/ixgbe_common.c

1698

hw->eeprom.word_page_size);

sys/dev/ixgbe/ixgbe_common.c

1711

s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data)

sys/dev/ixgbe/ixgbe_common.c

1713

return ixgbe_read_eerd_buffer_generic(hw, offset, 1, data);

sys/dev/ixgbe/ixgbe_common.c

172

switch (hw->phy.media_type) {

sys/dev/ixgbe/ixgbe_common.c

1725

s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.c

1734

hw->eeprom.ops.init_params(hw);

sys/dev/ixgbe/ixgbe_common.c

1742

if (offset >= hw->eeprom.word_size) {

sys/dev/ixgbe/ixgbe_common.c

1753

status = ixgbe_poll_eerd_eewr_done(hw, IXGBE_NVM_POLL_WRITE);

sys/dev/ixgbe/ixgbe_common.c

1759

IXGBE_WRITE_REG(hw, IXGBE_EEWR, eewr);

sys/dev/ixgbe/ixgbe_common.c

1761

status = ixgbe_poll_eerd_eewr_done(hw, IXGBE_NVM_POLL_WRITE);

sys/dev/ixgbe/ixgbe_common.c

177

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_common.c

1780

s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data)

sys/dev/ixgbe/ixgbe_common.c

1782

return ixgbe_write_eewr_buffer_generic(hw, offset, 1, &data);

sys/dev/ixgbe/ixgbe_common.c

1793

s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg)

sys/dev/ixgbe/ixgbe_common.c

1803

reg = IXGBE_READ_REG(hw, IXGBE_EERD);

sys/dev/ixgbe/ixgbe_common.c

1805

reg = IXGBE_READ_REG(hw, IXGBE_EEWR);

sys/dev/ixgbe/ixgbe_common.c

1828

static s32 ixgbe_acquire_eeprom(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

1836

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM)

sys/dev/ixgbe/ixgbe_common.c

1841

eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

1845

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec);

sys/dev/ixgbe/ixgbe_common.c

1848

eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

1857

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec);

sys/dev/ixgbe/ixgbe_common.c

186

hw->mac.ops.check_link(hw, &speed, &link_up, false);

sys/dev/ixgbe/ixgbe_common.c

1860

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/ixgbe/ixgbe_common.c

1868

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec);

sys/dev/ixgbe/ixgbe_common.c

1869

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

1882

static s32 ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

1897

swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

1914

ixgbe_release_eeprom_semaphore(hw);

sys/dev/ixgbe/ixgbe_common.c

1922

swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

1930

swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

1934

IXGBE_WRITE_REG(hw, IXGBE_SWSM_BY_MAC(hw), swsm);

sys/dev/ixgbe/ixgbe_common.c

1940

swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

1954

ixgbe_release_eeprom_semaphore(hw);

sys/dev/ixgbe/ixgbe_common.c

197

if (hw->device_id == IXGBE_DEV_ID_X550EM_X_XFI)

sys/dev/ixgbe/ixgbe_common.c

1972

static void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

1978

swsm = IXGBE_READ_REG(hw, IXGBE_SWSM);

sys/dev/ixgbe/ixgbe_common.c

1982

IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);

sys/dev/ixgbe/ixgbe_common.c

1983

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

1990

static s32 ixgbe_ready_eeprom(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

2005

ixgbe_shift_out_eeprom_bits(hw, IXGBE_EEPROM_RDSR_OPCODE_SPI,

sys/dev/ixgbe/ixgbe_common.c

2007

spi_stat_reg = (u8)ixgbe_shift_in_eeprom_bits(hw, 8);

sys/dev/ixgbe/ixgbe_common.c

2012

ixgbe_standby_eeprom(hw);

sys/dev/ixgbe/ixgbe_common.c

2031

static void ixgbe_standby_eeprom(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

2037

eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

204

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_common.c

2041

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec);

sys/dev/ixgbe/ixgbe_common.c

2042

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

2045

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec);

sys/dev/ixgbe/ixgbe_common.c

2046

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

2056

static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data,

sys/dev/ixgbe/ixgbe_common.c

2065

eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

2086

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec);

sys/dev/ixgbe/ixgbe_common.c

2087

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

2091

ixgbe_raise_eeprom_clk(hw, &eec);

sys/dev/ixgbe/ixgbe_common.c

2092

ixgbe_lower_eeprom_clk(hw, &eec);

sys/dev/ixgbe/ixgbe_common.c

2103

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec);

sys/dev/ixgbe/ixgbe_common.c

2104

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

2112

static u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count)

sys/dev/ixgbe/ixgbe_common.c

2127

eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

2133

ixgbe_raise_eeprom_clk(hw, &eec);

sys/dev/ixgbe/ixgbe_common.c

2135

eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

2141

ixgbe_lower_eeprom_clk(hw, &eec);

sys/dev/ixgbe/ixgbe_common.c

2152

static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec)

sys/dev/ixgbe/ixgbe_common.c

2161

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), *eec);

sys/dev/ixgbe/ixgbe_common.c

2162

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

2171

static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec)

sys/dev/ixgbe/ixgbe_common.c

2180

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), *eec);

sys/dev/ixgbe/ixgbe_common.c

2181

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

2189

static void ixgbe_release_eeprom(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

2195

eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

2200

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec);

sys/dev/ixgbe/ixgbe_common.c

2201

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

2207

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), eec);

sys/dev/ixgbe/ixgbe_common.c

2209

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/ixgbe/ixgbe_common.c

2212

msec_delay(hw->eeprom.semaphore_delay);

sys/dev/ixgbe/ixgbe_common.c

2221

s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

2234

if (hw->eeprom.ops.read(hw, i, &word)) {

sys/dev/ixgbe/ixgbe_common.c

2243

if (hw->eeprom.ops.read(hw, i, &pointer)) {

sys/dev/ixgbe/ixgbe_common.c

2252

if (hw->eeprom.ops.read(hw, pointer, &length)) {

sys/dev/ixgbe/ixgbe_common.c

2261

if (hw->eeprom.ops.read(hw, j, &word)) {

sys/dev/ixgbe/ixgbe_common.c

2282

s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.c

229

hw->device_id);

sys/dev/ixgbe/ixgbe_common.c

2295

status = hw->eeprom.ops.read(hw, 0, &checksum);

sys/dev/ixgbe/ixgbe_common.c

2301

status = hw->eeprom.ops.calc_checksum(hw);

sys/dev/ixgbe/ixgbe_common.c

2307

status = hw->eeprom.ops.read(hw, IXGBE_EEPROM_CHECKSUM, &read_checksum);

sys/dev/ixgbe/ixgbe_common.c

2330

s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

2341

status = hw->eeprom.ops.read(hw, 0, &checksum);

sys/dev/ixgbe/ixgbe_common.c

2347

status = hw->eeprom.ops.calc_checksum(hw);

sys/dev/ixgbe/ixgbe_common.c

2353

status = hw->eeprom.ops.write(hw, IXGBE_EEPROM_CHECKSUM, checksum);

sys/dev/ixgbe/ixgbe_common.c

2394

s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

sys/dev/ixgbe/ixgbe_common.c

2398

u32 rar_entries = hw->mac.num_rar_entries;

sys/dev/ixgbe/ixgbe_common.c

240

s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

2410

hw->mac.ops.set_vmdq(hw, index, vmdq);

sys/dev/ixgbe/ixgbe_common.c

2425

rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(index));

sys/dev/ixgbe/ixgbe_common.c

2432

IXGBE_WRITE_REG(hw, IXGBE_RAL(index), rar_low);

sys/dev/ixgbe/ixgbe_common.c

2433

IXGBE_WRITE_REG(hw, IXGBE_RAH(index), rar_high);

sys/dev/ixgbe/ixgbe_common.c

2445

s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_common.c

2448

u32 rar_entries = hw->mac.num_rar_entries;

sys/dev/ixgbe/ixgbe_common.c

2464

rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(index));

sys/dev/ixgbe/ixgbe_common.c

2467

IXGBE_WRITE_REG(hw, IXGBE_RAL(index), 0);

sys/dev/ixgbe/ixgbe_common.c

2468

IXGBE_WRITE_REG(hw, IXGBE_RAH(index), rar_high);

sys/dev/ixgbe/ixgbe_common.c

2471

hw->mac.ops.clear_vmdq(hw, index, IXGBE_CLEAR_VMDQ_ALL);

sys/dev/ixgbe/ixgbe_common.c

2484

s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

2487

u32 rar_entries = hw->mac.num_rar_entries;

sys/dev/ixgbe/ixgbe_common.c

2496

if (ixgbe_validate_mac_addr(hw->mac.addr) ==

sys/dev/ixgbe/ixgbe_common.c

2499

hw->mac.ops.get_mac_addr(hw, hw->mac.addr);

sys/dev/ixgbe/ixgbe_common.c

250

if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {

sys/dev/ixgbe/ixgbe_common.c

2502

hw->mac.addr[0], hw->mac.addr[1],

sys/dev/ixgbe/ixgbe_common.c

2503

hw->mac.addr[2]);

sys/dev/ixgbe/ixgbe_common.c

2504

DEBUGOUT3("%.2X %.2X %.2X\n", hw->mac.addr[3],

sys/dev/ixgbe/ixgbe_common.c

2505

hw->mac.addr[4], hw->mac.addr[5]);

sys/dev/ixgbe/ixgbe_common.c

2510

hw->mac.addr[0], hw->mac.addr[1],

sys/dev/ixgbe/ixgbe_common.c

2511

hw->mac.addr[2]);

sys/dev/ixgbe/ixgbe_common.c

2512

DEBUGOUT3("%.2X %.2X %.2X\n", hw->mac.addr[3],

sys/dev/ixgbe/ixgbe_common.c

2513

hw->mac.addr[4], hw->mac.addr[5]);

sys/dev/ixgbe/ixgbe_common.c

2515

hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);

sys/dev/ixgbe/ixgbe_common.c

2519

hw->mac.ops.clear_vmdq(hw, 0, IXGBE_CLEAR_VMDQ_ALL);

sys/dev/ixgbe/ixgbe_common.c

2521

hw->addr_ctrl.overflow_promisc = 0;

sys/dev/ixgbe/ixgbe_common.c

2523

hw->addr_ctrl.rar_used_count = 1;

sys/dev/ixgbe/ixgbe_common.c

2528

IXGBE_WRITE_REG(hw, IXGBE_RAL(i), 0);

sys/dev/ixgbe/ixgbe_common.c

2529

IXGBE_WRITE_REG(hw, IXGBE_RAH(i), 0);

sys/dev/ixgbe/ixgbe_common.c

2533

hw->addr_ctrl.mta_in_use = 0;

sys/dev/ixgbe/ixgbe_common.c

2534

IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type);

sys/dev/ixgbe/ixgbe_common.c

2537

for (i = 0; i < hw->mac.mcft_size; i++)

sys/dev/ixgbe/ixgbe_common.c

2538

IXGBE_WRITE_REG(hw, IXGBE_MTA(i), 0);

sys/dev/ixgbe/ixgbe_common.c

2540

ixgbe_init_uta_tables(hw);

sys/dev/ixgbe/ixgbe_common.c

2553

void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)

sys/dev/ixgbe/ixgbe_common.c

2555

u32 rar_entries = hw->mac.num_rar_entries;

sys/dev/ixgbe/ixgbe_common.c

2567

if (hw->addr_ctrl.rar_used_count < rar_entries) {

sys/dev/ixgbe/ixgbe_common.c

2568

rar = hw->addr_ctrl.rar_used_count;

sys/dev/ixgbe/ixgbe_common.c

2569

hw->mac.ops.set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV);

sys/dev/ixgbe/ixgbe_common.c

2571

hw->addr_ctrl.rar_used_count++;

sys/dev/ixgbe/ixgbe_common.c

2573

hw->addr_ctrl.overflow_promisc++;

sys/dev/ixgbe/ixgbe_common.c

2593

s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list,

sys/dev/ixgbe/ixgbe_common.c

2598

u32 old_promisc_setting = hw->addr_ctrl.overflow_promisc;

sys/dev/ixgbe/ixgbe_common.c

2609

uc_addr_in_use = hw->addr_ctrl.rar_used_count - 1;

sys/dev/ixgbe/ixgbe_common.c

261

if (hw->fc.requested_mode == ixgbe_fc_default)

sys/dev/ixgbe/ixgbe_common.c

2610

hw->addr_ctrl.rar_used_count -= uc_addr_in_use;

sys/dev/ixgbe/ixgbe_common.c

2611

hw->addr_ctrl.overflow_promisc = 0;

sys/dev/ixgbe/ixgbe_common.c

2616

IXGBE_WRITE_REG(hw, IXGBE_RAL(1+i), 0);

sys/dev/ixgbe/ixgbe_common.c

2617

IXGBE_WRITE_REG(hw, IXGBE_RAH(1+i), 0);

sys/dev/ixgbe/ixgbe_common.c

262

hw->fc.requested_mode = ixgbe_fc_full;

sys/dev/ixgbe/ixgbe_common.c

2623

addr = next(hw, &addr_list, &vmdq);

sys/dev/ixgbe/ixgbe_common.c

2624

ixgbe_add_uc_addr(hw, addr, vmdq);

sys/dev/ixgbe/ixgbe_common.c

2627

if (hw->addr_ctrl.overflow_promisc) {

sys/dev/ixgbe/ixgbe_common.c

2629

if (!old_promisc_setting && !hw->addr_ctrl.user_set_promisc) {

sys/dev/ixgbe/ixgbe_common.c

2631

fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);

sys/dev/ixgbe/ixgbe_common.c

2633

IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);

sys/dev/ixgbe/ixgbe_common.c

2637

if (old_promisc_setting && !hw->addr_ctrl.user_set_promisc) {

sys/dev/ixgbe/ixgbe_common.c

2639

fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);

sys/dev/ixgbe/ixgbe_common.c

2641

IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);

sys/dev/ixgbe/ixgbe_common.c

2661

static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)

sys/dev/ixgbe/ixgbe_common.c

2667

switch (hw->mac.mc_filter_type) {

sys/dev/ixgbe/ixgbe_common.c

269

switch (hw->phy.media_type) {

sys/dev/ixgbe/ixgbe_common.c

2698

void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr)

sys/dev/ixgbe/ixgbe_common.c

2706

hw->addr_ctrl.mta_in_use++;

sys/dev/ixgbe/ixgbe_common.c

2708

vector = ixgbe_mta_vector(hw, mc_addr);

sys/dev/ixgbe/ixgbe_common.c

272

ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &reg_bp);

sys/dev/ixgbe/ixgbe_common.c

2722

hw->mac.mta_shadow[vector_reg] |= (1 << vector_bit);

sys/dev/ixgbe/ixgbe_common.c

2736

s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list,

sys/dev/ixgbe/ixgbe_common.c

2749

hw->addr_ctrl.num_mc_addrs = mc_addr_count;

sys/dev/ixgbe/ixgbe_common.c

2750

hw->addr_ctrl.mta_in_use = 0;

sys/dev/ixgbe/ixgbe_common.c

2755

memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow));

sys/dev/ixgbe/ixgbe_common.c

276

reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);

sys/dev/ixgbe/ixgbe_common.c

2761

ixgbe_set_mta(hw, next(hw, &mc_addr_list, &vmdq));

sys/dev/ixgbe/ixgbe_common.c

2765

for (i = 0; i < hw->mac.mcft_size; i++)

sys/dev/ixgbe/ixgbe_common.c

2766

IXGBE_WRITE_REG_ARRAY(hw, IXGBE_MTA(0), i,

sys/dev/ixgbe/ixgbe_common.c

2767

hw->mac.mta_shadow[i]);

sys/dev/ixgbe/ixgbe_common.c

2769

if (hw->addr_ctrl.mta_in_use > 0)

sys/dev/ixgbe/ixgbe_common.c

2770

IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL,

sys/dev/ixgbe/ixgbe_common.c

2771

IXGBE_MCSTCTRL_MFE | hw->mac.mc_filter_type);

sys/dev/ixgbe/ixgbe_common.c

2783

s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

2785

struct ixgbe_addr_filter_info *a = &hw->addr_ctrl;

sys/dev/ixgbe/ixgbe_common.c

2790

IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, IXGBE_MCSTCTRL_MFE |

sys/dev/ixgbe/ixgbe_common.c

2791

hw->mac.mc_filter_type);

sys/dev/ixgbe/ixgbe_common.c

2802

s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

2804

struct ixgbe_addr_filter_info *a = &hw->addr_ctrl;

sys/dev/ixgbe/ixgbe_common.c

2809

IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, hw->mac.mc_filter_type);

sys/dev/ixgbe/ixgbe_common.c

281

reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);

sys/dev/ixgbe/ixgbe_common.c

2820

s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

2831

if (!hw->fc.pause_time) {

sys/dev/ixgbe/ixgbe_common.c

2838

if ((hw->fc.current_mode & ixgbe_fc_tx_pause) &&

sys/dev/ixgbe/ixgbe_common.c

2839

hw->fc.high_water[i]) {

sys/dev/ixgbe/ixgbe_common.c

2840

if (!hw->fc.low_water[i] ||

sys/dev/ixgbe/ixgbe_common.c

2841

hw->fc.low_water[i] >= hw->fc.high_water[i]) {

sys/dev/ixgbe/ixgbe_common.c

285

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,

sys/dev/ixgbe/ixgbe_common.c

2850

hw->mac.ops.fc_autoneg(hw);

sys/dev/ixgbe/ixgbe_common.c

2853

mflcn_reg = IXGBE_READ_REG(hw, IXGBE_MFLCN);

sys/dev/ixgbe/ixgbe_common.c

2856

fccfg_reg = IXGBE_READ_REG(hw, IXGBE_FCCFG);

sys/dev/ixgbe/ixgbe_common.c

2869

switch (hw->fc.current_mode) {

sys/dev/ixgbe/ixgbe_common.c

2909

IXGBE_WRITE_REG(hw, IXGBE_MFLCN, mflcn_reg);

sys/dev/ixgbe/ixgbe_common.c

2910

IXGBE_WRITE_REG(hw, IXGBE_FCCFG, fccfg_reg);

sys/dev/ixgbe/ixgbe_common.c

2915

if ((hw->fc.current_mode & ixgbe_fc_tx_pause) &&

sys/dev/ixgbe/ixgbe_common.c

2916

hw->fc.high_water[i]) {

sys/dev/ixgbe/ixgbe_common.c

2917

fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE;

sys/dev/ixgbe/ixgbe_common.c

2918

IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), fcrtl);

sys/dev/ixgbe/ixgbe_common.c

2919

fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN;

sys/dev/ixgbe/ixgbe_common.c

2921

IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0);

sys/dev/ixgbe/ixgbe_common.c

2929

fcrth = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576;

sys/dev/ixgbe/ixgbe_common.c

2932

IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), fcrth);

sys/dev/ixgbe/ixgbe_common.c

2936

reg = hw->fc.pause_time * 0x00010001U;

sys/dev/ixgbe/ixgbe_common.c

2938

IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);

sys/dev/ixgbe/ixgbe_common.c

2941

IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2);

sys/dev/ixgbe/ixgbe_common.c

2960

s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,

sys/dev/ixgbe/ixgbe_common.c

2979

if (hw->fc.requested_mode == ixgbe_fc_full) {

sys/dev/ixgbe/ixgbe_common.c

2980

hw->fc.current_mode = ixgbe_fc_full;

sys/dev/ixgbe/ixgbe_common.c

2983

hw->fc.current_mode = ixgbe_fc_rx_pause;

sys/dev/ixgbe/ixgbe_common.c

2988

hw->fc.current_mode = ixgbe_fc_tx_pause;

sys/dev/ixgbe/ixgbe_common.c

2992

hw->fc.current_mode = ixgbe_fc_rx_pause;

sys/dev/ixgbe/ixgbe_common.c

2995

hw->fc.current_mode = ixgbe_fc_none;

sys/dev/ixgbe/ixgbe_common.c

3007

static s32 ixgbe_fc_autoneg_fiber(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

3018

linkstat = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);

sys/dev/ixgbe/ixgbe_common.c

302

switch (hw->fc.requested_mode) {

sys/dev/ixgbe/ixgbe_common.c

3025

pcs_anadv_reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);

sys/dev/ixgbe/ixgbe_common.c

3026

pcs_lpab_reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);

sys/dev/ixgbe/ixgbe_common.c

3028

ret_val = ixgbe_negotiate_fc(hw, pcs_anadv_reg,

sys/dev/ixgbe/ixgbe_common.c

3044

static s32 ixgbe_fc_autoneg_backplane(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

3054

links = IXGBE_READ_REG(hw, IXGBE_LINKS);

sys/dev/ixgbe/ixgbe_common.c

306

if (hw->phy.media_type == ixgbe_media_type_backplane)

sys/dev/ixgbe/ixgbe_common.c

3060

if (hw->mac.type == ixgbe_mac_82599EB) {

sys/dev/ixgbe/ixgbe_common.c

3061

links2 = IXGBE_READ_REG(hw, IXGBE_LINKS2);

sys/dev/ixgbe/ixgbe_common.c

3071

autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_common.c

3072

anlp1_reg = IXGBE_READ_REG(hw, IXGBE_ANLP1);

sys/dev/ixgbe/ixgbe_common.c

3074

ret_val = ixgbe_negotiate_fc(hw, autoc_reg,

sys/dev/ixgbe/ixgbe_common.c

3088

static s32 ixgbe_fc_autoneg_copper(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

309

else if (hw->phy.media_type == ixgbe_media_type_copper)

sys/dev/ixgbe/ixgbe_common.c

3093

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,

sys/dev/ixgbe/ixgbe_common.c

3096

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_LP,

sys/dev/ixgbe/ixgbe_common.c

3100

return ixgbe_negotiate_fc(hw, (u32)technology_ability_reg,

sys/dev/ixgbe/ixgbe_common.c

3113

void ixgbe_fc_autoneg(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

3127

if (hw->fc.disable_fc_autoneg) {

sys/dev/ixgbe/ixgbe_common.c

3134

hw->mac.ops.check_link(hw, &speed, &link_up, false);

sys/dev/ixgbe/ixgbe_common.c

3140

switch (hw->phy.media_type) {

sys/dev/ixgbe/ixgbe_common.c

3146

ret_val = ixgbe_fc_autoneg_fiber(hw);

sys/dev/ixgbe/ixgbe_common.c

3151

ret_val = ixgbe_fc_autoneg_backplane(hw);

sys/dev/ixgbe/ixgbe_common.c

3156

if (ixgbe_device_supports_autoneg_fc(hw))

sys/dev/ixgbe/ixgbe_common.c

3157

ret_val = ixgbe_fc_autoneg_copper(hw);

sys/dev/ixgbe/ixgbe_common.c

3166

hw->fc.fc_was_autonegged = true;

sys/dev/ixgbe/ixgbe_common.c

3168

hw->fc.fc_was_autonegged = false;

sys/dev/ixgbe/ixgbe_common.c

3169

hw->fc.current_mode = hw->fc.requested_mode;

sys/dev/ixgbe/ixgbe_common.c

3183

static u32 ixgbe_pcie_timeout_poll(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

3188

devctl2 = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_DEVICE_CONTROL2);

sys/dev/ixgbe/ixgbe_common.c

319

if (hw->phy.media_type == ixgbe_media_type_backplane) {

sys/dev/ixgbe/ixgbe_common.c

322

} else if (hw->phy.media_type == ixgbe_media_type_copper) {

sys/dev/ixgbe/ixgbe_common.c

3229

s32 ixgbe_disable_pcie_primary(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

3238

IXGBE_WRITE_REG(hw, IXGBE_CTRL, IXGBE_CTRL_GIO_DIS);

sys/dev/ixgbe/ixgbe_common.c

3241

if (!(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_GIO) ||

sys/dev/ixgbe/ixgbe_common.c

3242

IXGBE_REMOVED(hw->hw_addr))

sys/dev/ixgbe/ixgbe_common.c

3248

if (!(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_GIO))

sys/dev/ixgbe/ixgbe_common.c

3261

hw->mac.flags |= IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;

sys/dev/ixgbe/ixgbe_common.c

3263

if (hw->mac.type >= ixgbe_mac_X550)

sys/dev/ixgbe/ixgbe_common.c

3270

poll = ixgbe_pcie_timeout_poll(hw);

sys/dev/ixgbe/ixgbe_common.c

3273

value = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_DEVICE_STATUS);

sys/dev/ixgbe/ixgbe_common.c

3274

if (IXGBE_REMOVED(hw->hw_addr))

sys/dev/ixgbe/ixgbe_common.c

3296

s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask)

sys/dev/ixgbe/ixgbe_common.c

3311

if (ixgbe_get_eeprom_semaphore(hw))

sys/dev/ixgbe/ixgbe_common.c

3314

gssr = IXGBE_READ_REG(hw, IXGBE_GSSR);

sys/dev/ixgbe/ixgbe_common.c

3317

IXGBE_WRITE_REG(hw, IXGBE_GSSR, gssr);

sys/dev/ixgbe/ixgbe_common.c

3318

ixgbe_release_eeprom_semaphore(hw);

sys/dev/ixgbe/ixgbe_common.c

3322

ixgbe_release_eeprom_semaphore(hw);

sys/dev/ixgbe/ixgbe_common.c

3329

ixgbe_release_swfw_sync(hw, gssr & (fwmask | swmask));

sys/dev/ixgbe/ixgbe_common.c

3343

void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask)

sys/dev/ixgbe/ixgbe_common.c

3350

ixgbe_get_eeprom_semaphore(hw);

sys/dev/ixgbe/ixgbe_common.c

3352

gssr = IXGBE_READ_REG(hw, IXGBE_GSSR);

sys/dev/ixgbe/ixgbe_common.c

3354

IXGBE_WRITE_REG(hw, IXGBE_GSSR, gssr);

sys/dev/ixgbe/ixgbe_common.c

3356

ixgbe_release_eeprom_semaphore(hw);

sys/dev/ixgbe/ixgbe_common.c

3366

s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

3375

secrxreg = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);

sys/dev/ixgbe/ixgbe_common.c

3377

IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, secrxreg);

sys/dev/ixgbe/ixgbe_common.c

3379

secrxreg = IXGBE_READ_REG(hw, IXGBE_SECRXSTAT);

sys/dev/ixgbe/ixgbe_common.c

340

if (hw->phy.media_type == ixgbe_media_type_backplane)

sys/dev/ixgbe/ixgbe_common.c

3403

s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *locked, u32 *reg_val)

sys/dev/ixgbe/ixgbe_common.c

3406

*reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC);

sys/dev/ixgbe/ixgbe_common.c

3419

s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked)

sys/dev/ixgbe/ixgbe_common.c

3423

IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_val);

sys/dev/ixgbe/ixgbe_common.c

343

else if (hw->phy.media_type == ixgbe_media_type_copper)

sys/dev/ixgbe/ixgbe_common.c

3433

s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

3439

secrxreg = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL);

sys/dev/ixgbe/ixgbe_common.c

3441

IXGBE_WRITE_REG(hw, IXGBE_SECRXCTRL, secrxreg);

sys/dev/ixgbe/ixgbe_common.c

3442

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

3454

s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval)

sys/dev/ixgbe/ixgbe_common.c

3459

ixgbe_enable_rx(hw);

sys/dev/ixgbe/ixgbe_common.c

3461

ixgbe_disable_rx(hw);

sys/dev/ixgbe/ixgbe_common.c

3471

s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_common.c

3476

u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);

sys/dev/ixgbe/ixgbe_common.c

3489

hw->mac.ops.check_link(hw, &speed, &link_up, false);

sys/dev/ixgbe/ixgbe_common.c

3492

ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg);

sys/dev/ixgbe/ixgbe_common.c

3499

ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked);

sys/dev/ixgbe/ixgbe_common.c

3503

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

3509

IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);

sys/dev/ixgbe/ixgbe_common.c

3510

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

3521

s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_common.c

3524

u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);

sys/dev/ixgbe/ixgbe_common.c

3533

ret_val = hw->mac.ops.prot_autoc_read(hw, &locked, &autoc_reg);

sys/dev/ixgbe/ixgbe_common.c

354

if (hw->mac.type < ixgbe_mac_X540) {

sys/dev/ixgbe/ixgbe_common.c

3540

ret_val = hw->mac.ops.prot_autoc_write(hw, autoc_reg, locked);

sys/dev/ixgbe/ixgbe_common.c

3547

IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);

sys/dev/ixgbe/ixgbe_common.c

3548

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

3563

static s32 ixgbe_get_san_mac_addr_offset(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.c

3574

ret_val = hw->eeprom.ops.read(hw, IXGBE_SAN_MAC_ADDR_PTR,

sys/dev/ixgbe/ixgbe_common.c

359

IXGBE_WRITE_REG(hw, IXGBE_PCS1GANA, reg);

sys/dev/ixgbe/ixgbe_common.c

3595

s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr)

sys/dev/ixgbe/ixgbe_common.c

360

reg = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);

sys/dev/ixgbe/ixgbe_common.c

3607

ret_val = ixgbe_get_san_mac_addr_offset(hw, &san_mac_offset);

sys/dev/ixgbe/ixgbe_common.c

3612

hw->mac.ops.set_lan_id(hw);

sys/dev/ixgbe/ixgbe_common.c

3614

(hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) :

sys/dev/ixgbe/ixgbe_common.c

3617

ret_val = hw->eeprom.ops.read(hw, san_mac_offset,

sys/dev/ixgbe/ixgbe_common.c

363

if (hw->fc.strict_ieee)

sys/dev/ixgbe/ixgbe_common.c

3648

s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr)

sys/dev/ixgbe/ixgbe_common.c

3657

ret_val = ixgbe_get_san_mac_addr_offset(hw, &san_mac_offset);

sys/dev/ixgbe/ixgbe_common.c

366

IXGBE_WRITE_REG(hw, IXGBE_PCS1GLCTL, reg);

sys/dev/ixgbe/ixgbe_common.c

3662

hw->mac.ops.set_lan_id(hw);

sys/dev/ixgbe/ixgbe_common.c

3664

(hw->bus.func) ? (san_mac_offset += IXGBE_SAN_MAC_ADDR_PORT1_OFFSET) :

sys/dev/ixgbe/ixgbe_common.c

3670

hw->eeprom.ops.write(hw, san_mac_offset, san_mac_data);

sys/dev/ixgbe/ixgbe_common.c

3684

u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

3690

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_common.c

3712

msix_count = IXGBE_READ_PCIE_WORD(hw, pcie_offset);

sys/dev/ixgbe/ixgbe_common.c

3713

if (IXGBE_REMOVED(hw->hw_addr))

sys/dev/ixgbe/ixgbe_common.c

3735

s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)

sys/dev/ixgbe/ixgbe_common.c

375

if (hw->phy.media_type == ixgbe_media_type_backplane) {

sys/dev/ixgbe/ixgbe_common.c

3757

for (rar = 0; rar < hw->mac.rar_highwater; rar++) {

sys/dev/ixgbe/ixgbe_common.c

3758

rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(rar));

sys/dev/ixgbe/ixgbe_common.c

3764

rar_low = IXGBE_READ_REG(hw, IXGBE_RAL(rar));

sys/dev/ixgbe/ixgbe_common.c

377

ret_val = hw->mac.ops.prot_autoc_write(hw, reg_bp, locked);

sys/dev/ixgbe/ixgbe_common.c

3770

if (rar < hw->mac.rar_highwater) {

sys/dev/ixgbe/ixgbe_common.c

3772

ixgbe_set_vmdq(hw, rar, vmdq);

sys/dev/ixgbe/ixgbe_common.c

3776

ixgbe_set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV);

sys/dev/ixgbe/ixgbe_common.c

3777

} else if (rar == hw->mac.rar_highwater) {

sys/dev/ixgbe/ixgbe_common.c

3779

ixgbe_set_rar(hw, rar, addr, vmdq, IXGBE_RAH_AV);

sys/dev/ixgbe/ixgbe_common.c

3780

hw->mac.rar_highwater++;

sys/dev/ixgbe/ixgbe_common.c

3781

} else if (rar >= hw->mac.num_rar_entries) {

sys/dev/ixgbe/ixgbe_common.c

3790

ixgbe_clear_vmdq(hw, rar, 0);

sys/dev/ixgbe/ixgbe_common.c

380

} else if ((hw->phy.media_type == ixgbe_media_type_copper) &&

sys/dev/ixgbe/ixgbe_common.c

3801

s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

sys/dev/ixgbe/ixgbe_common.c

3804

u32 rar_entries = hw->mac.num_rar_entries;

sys/dev/ixgbe/ixgbe_common.c

381

(ixgbe_device_supports_autoneg_fc(hw))) {

sys/dev/ixgbe/ixgbe_common.c

3815

mpsar_lo = IXGBE_READ_REG(hw, IXGBE_MPSAR_LO(rar));

sys/dev/ixgbe/ixgbe_common.c

3816

mpsar_hi = IXGBE_READ_REG(hw, IXGBE_MPSAR_HI(rar));

sys/dev/ixgbe/ixgbe_common.c

3818

if (IXGBE_REMOVED(hw->hw_addr))

sys/dev/ixgbe/ixgbe_common.c

382

hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,

sys/dev/ixgbe/ixgbe_common.c

3826

IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), 0);

sys/dev/ixgbe/ixgbe_common.c

3827

mpsar_lo = IXGBE_READ_REG(hw, IXGBE_MPSAR_LO(rar));

sys/dev/ixgbe/ixgbe_common.c

3830

IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), 0);

sys/dev/ixgbe/ixgbe_common.c

3831

mpsar_hi = IXGBE_READ_REG(hw, IXGBE_MPSAR_HI(rar));

sys/dev/ixgbe/ixgbe_common.c

3835

IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), mpsar_lo);

sys/dev/ixgbe/ixgbe_common.c

3838

IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), mpsar_hi);

sys/dev/ixgbe/ixgbe_common.c

3843

rar != 0 && rar != hw->mac.san_mac_rar_index)

sys/dev/ixgbe/ixgbe_common.c

3844

hw->mac.ops.clear_rar(hw, rar);

sys/dev/ixgbe/ixgbe_common.c

3855

s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq)

sys/dev/ixgbe/ixgbe_common.c

3858

u32 rar_entries = hw->mac.num_rar_entries;

sys/dev/ixgbe/ixgbe_common.c

3870

mpsar = IXGBE_READ_REG(hw, IXGBE_MPSAR_LO(rar));

sys/dev/ixgbe/ixgbe_common.c

3872

IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), mpsar);

sys/dev/ixgbe/ixgbe_common.c

3874

mpsar = IXGBE_READ_REG(hw, IXGBE_MPSAR_HI(rar));

sys/dev/ixgbe/ixgbe_common.c

3876

IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), mpsar);

sys/dev/ixgbe/ixgbe_common.c

3892

s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq)

sys/dev/ixgbe/ixgbe_common.c

3894

u32 rar = hw->mac.san_mac_rar_index;

sys/dev/ixgbe/ixgbe_common.c

3899

IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), 1 << vmdq);

sys/dev/ixgbe/ixgbe_common.c

3900

IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), 0);

sys/dev/ixgbe/ixgbe_common.c

3902

IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(rar), 0);

sys/dev/ixgbe/ixgbe_common.c

3903

IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(rar), 1 << (vmdq - 32));

sys/dev/ixgbe/ixgbe_common.c

3913

s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

3921

IXGBE_WRITE_REG(hw, IXGBE_UTA(i), 0);

sys/dev/ixgbe/ixgbe_common.c

3937

s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass)

sys/dev/ixgbe/ixgbe_common.c

3961

bits = IXGBE_READ_REG(hw, IXGBE_VLVF(regindex));

sys/dev/ixgbe/ixgbe_common.c

3987

s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,

sys/dev/ixgbe/ixgbe_common.c

400

s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

4012

vfta = IXGBE_READ_REG(hw, IXGBE_VFTA(regidx));

sys/dev/ixgbe/ixgbe_common.c

4025

ret_val = ixgbe_set_vlvf_generic(hw, vlan, vind, vlan_on, &vfta_delta,

sys/dev/ixgbe/ixgbe_common.c

4036

IXGBE_WRITE_REG(hw, IXGBE_VFTA(regidx), vfta);

sys/dev/ixgbe/ixgbe_common.c

4054

s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,

sys/dev/ixgbe/ixgbe_common.c

4073

if (!(IXGBE_READ_REG(hw, IXGBE_VT_CTL) & IXGBE_VT_CTL_VT_ENABLE))

sys/dev/ixgbe/ixgbe_common.c

4076

vlvf_index = ixgbe_find_vlvf_slot(hw, vlan, vlvf_bypass);

sys/dev/ixgbe/ixgbe_common.c

4080

bits = IXGBE_READ_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + vind / 32));

sys/dev/ixgbe/ixgbe_common.c

409

hw->phy.media_type = hw->mac.ops.get_media_type(hw);

sys/dev/ixgbe/ixgbe_common.c

4091

!IXGBE_READ_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + 1 - vind / 32))) {

sys/dev/ixgbe/ixgbe_common.c

4097

IXGBE_WRITE_REG(hw, IXGBE_VFTA(vlan / 32), vfta);

sys/dev/ixgbe/ixgbe_common.c

41

static s32 ixgbe_acquire_eeprom(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.c

4100

IXGBE_WRITE_REG(hw, IXGBE_VLVF(vlvf_index), 0);

sys/dev/ixgbe/ixgbe_common.c

4101

IXGBE_WRITE_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + vind / 32), 0);

sys/dev/ixgbe/ixgbe_common.c

4124

IXGBE_WRITE_REG(hw, IXGBE_VLVFB(vlvf_index * 2 + vind / 32), bits);

sys/dev/ixgbe/ixgbe_common.c

4125

IXGBE_WRITE_REG(hw, IXGBE_VLVF(vlvf_index), IXGBE_VLVF_VIEN | vlan);

sys/dev/ixgbe/ixgbe_common.c

4136

s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

414

hw->mac.ops.clear_vfta(hw);

sys/dev/ixgbe/ixgbe_common.c

4142

for (offset = 0; offset < hw->mac.vft_size; offset++)

sys/dev/ixgbe/ixgbe_common.c

4143

IXGBE_WRITE_REG(hw, IXGBE_VFTA(offset), 0);

sys/dev/ixgbe/ixgbe_common.c

4146

IXGBE_WRITE_REG(hw, IXGBE_VLVF(offset), 0);

sys/dev/ixgbe/ixgbe_common.c

4147

IXGBE_WRITE_REG(hw, IXGBE_VLVFB(offset * 2), 0);

sys/dev/ixgbe/ixgbe_common.c

4148

IXGBE_WRITE_REG(hw, IXGBE_VLVFB(offset * 2 + 1), 0);

sys/dev/ixgbe/ixgbe_common.c

4161

s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vf_number)

sys/dev/ixgbe/ixgbe_common.c

417

hw->mac.ops.clear_hw_cntrs(hw);

sys/dev/ixgbe/ixgbe_common.c

4173

reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);

sys/dev/ixgbe/ixgbe_common.c

4194

reg = IXGBE_READ_REG(hw, IXGBE_PVFTXDCTL(offset));

sys/dev/ixgbe/ixgbe_common.c

4196

IXGBE_WRITE_REG(hw, IXGBE_PVFTXDCTL(offset), reg);

sys/dev/ixgbe/ixgbe_common.c

4197

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

42

static s32 ixgbe_get_eeprom_semaphore(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.c

420

ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);

sys/dev/ixgbe/ixgbe_common.c

4200

reg = IXGBE_READ_REG(hw, IXGBE_PVFTXDCTL(offset));

sys/dev/ixgbe/ixgbe_common.c

4202

IXGBE_WRITE_REG(hw, IXGBE_PVFTXDCTL(offset), reg);

sys/dev/ixgbe/ixgbe_common.c

4203

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

4216

static bool ixgbe_need_crosstalk_fix(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

422

IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);

sys/dev/ixgbe/ixgbe_common.c

4220

if (!hw->need_crosstalk_fix)

sys/dev/ixgbe/ixgbe_common.c

4224

switch (hw->mac.ops.get_media_type(hw)) {

sys/dev/ixgbe/ixgbe_common.c

423

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

4244

s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_common.c

4255

if (ixgbe_need_crosstalk_fix(hw)) {

sys/dev/ixgbe/ixgbe_common.c

4258

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_common.c

426

ret_val = ixgbe_setup_fc(hw);

sys/dev/ixgbe/ixgbe_common.c

4260

sfp_cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &

sys/dev/ixgbe/ixgbe_common.c

4265

sfp_cage_full = IXGBE_READ_REG(hw, IXGBE_ESDP) &

sys/dev/ixgbe/ixgbe_common.c

4282

links_orig = IXGBE_READ_REG(hw, IXGBE_LINKS);

sys/dev/ixgbe/ixgbe_common.c

4284

links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);

sys/dev/ixgbe/ixgbe_common.c

4292

for (i = 0; i < hw->mac.max_link_up_time; i++) {

sys/dev/ixgbe/ixgbe_common.c

43

static void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.c

4300

links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);

sys/dev/ixgbe/ixgbe_common.c

4304

if (ixgbe_need_crosstalk_fix(hw)) {

sys/dev/ixgbe/ixgbe_common.c

4310

links_reg = IXGBE_READ_REG(hw, IXGBE_LINKS);

sys/dev/ixgbe/ixgbe_common.c

4327

if (hw->mac.type >= ixgbe_mac_X550) {

sys/dev/ixgbe/ixgbe_common.c

433

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_common.c

4337

if (hw->mac.type == ixgbe_mac_X550 ||

sys/dev/ixgbe/ixgbe_common.c

4338

hw->mac.type == ixgbe_mac_E610) {

sys/dev/ixgbe/ixgbe_common.c

4345

if (hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T ||

sys/dev/ixgbe/ixgbe_common.c

4346

hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L)

sys/dev/ixgbe/ixgbe_common.c

4366

s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,

sys/dev/ixgbe/ixgbe_common.c

437

hw->mac.ops.get_device_caps(hw, &device_caps);

sys/dev/ixgbe/ixgbe_common.c

4380

if (hw->eeprom.ops.read(hw, offset, &alt_san_mac_blk_offset))

sys/dev/ixgbe/ixgbe_common.c

4389

if (hw->eeprom.ops.read(hw, offset, &caps))

sys/dev/ixgbe/ixgbe_common.c

439

hw->need_crosstalk_fix = false;

sys/dev/ixgbe/ixgbe_common.c

4396

if (hw->eeprom.ops.read(hw, offset, wwnn_prefix)) {

sys/dev/ixgbe/ixgbe_common.c

44

static s32 ixgbe_ready_eeprom(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.c

4402

if (hw->eeprom.ops.read(hw, offset, wwpn_prefix))

sys/dev/ixgbe/ixgbe_common.c

441

hw->need_crosstalk_fix = true;

sys/dev/ixgbe/ixgbe_common.c

4421

s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs)

sys/dev/ixgbe/ixgbe_common.c

4433

status = hw->eeprom.ops.read(hw, offset, &caps);

sys/dev/ixgbe/ixgbe_common.c

444

hw->need_crosstalk_fix = false;

sys/dev/ixgbe/ixgbe_common.c

4441

status = hw->eeprom.ops.read(hw, IXGBE_ISCSI_FCOE_BLK_PTR, &offset);

sys/dev/ixgbe/ixgbe_common.c

4450

status = hw->eeprom.ops.read(hw, offset, &flags);

sys/dev/ixgbe/ixgbe_common.c

4470

void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)

sys/dev/ixgbe/ixgbe_common.c

4476

if (hw->mac.type == ixgbe_mac_82598EB)

sys/dev/ixgbe/ixgbe_common.c

4479

pfvfspoof = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg));

sys/dev/ixgbe/ixgbe_common.c

4484

IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), pfvfspoof);

sys/dev/ixgbe/ixgbe_common.c

449

hw->adapter_stopped = false;

sys/dev/ixgbe/ixgbe_common.c

4494

void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)

sys/dev/ixgbe/ixgbe_common.c

45

static void ixgbe_standby_eeprom(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.c

4500

if (hw->mac.type == ixgbe_mac_82598EB)

sys/dev/ixgbe/ixgbe_common.c

4503

pfvfspoof = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg));

sys/dev/ixgbe/ixgbe_common.c

4508

IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), pfvfspoof);

sys/dev/ixgbe/ixgbe_common.c

4519

s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps)

sys/dev/ixgbe/ixgbe_common.c

4523

hw->eeprom.ops.read(hw, IXGBE_DEVICE_CAPS, device_caps);

sys/dev/ixgbe/ixgbe_common.c

4533

void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

4541

for (i = 0; i < hw->mac.max_tx_queues; i++) {

sys/dev/ixgbe/ixgbe_common.c

4542

regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(i));

sys/dev/ixgbe/ixgbe_common.c

4544

IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(i), regval);

sys/dev/ixgbe/ixgbe_common.c

4547

for (i = 0; i < hw->mac.max_rx_queues; i++) {

sys/dev/ixgbe/ixgbe_common.c

4548

regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));

sys/dev/ixgbe/ixgbe_common.c

4551

IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);

sys/dev/ixgbe/ixgbe_common.c

4593

s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 length,

sys/dev/ixgbe/ixgbe_common.c

46

static void ixgbe_shift_out_eeprom_bits(struct ixgbe_hw *hw, u16 data,

sys/dev/ixgbe/ixgbe_common.c

4607

fwsts = IXGBE_READ_REG(hw, IXGBE_FWSTS);

sys/dev/ixgbe/ixgbe_common.c

4608

IXGBE_WRITE_REG(hw, IXGBE_FWSTS, fwsts | IXGBE_FWSTS_FWRI);

sys/dev/ixgbe/ixgbe_common.c

4611

hicr = IXGBE_READ_REG(hw, IXGBE_HICR);

sys/dev/ixgbe/ixgbe_common.c

4629

IXGBE_WRITE_REG_ARRAY(hw, IXGBE_FLEX_MNG,

sys/dev/ixgbe/ixgbe_common.c

4633

IXGBE_WRITE_REG(hw, IXGBE_HICR, hicr | IXGBE_HICR_C);

sys/dev/ixgbe/ixgbe_common.c

4636

hicr = IXGBE_READ_REG(hw, IXGBE_HICR);

sys/dev/ixgbe/ixgbe_common.c

464

void ixgbe_start_hw_gen2(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

4651

!(IXGBE_READ_REG(hw, IXGBE_HICR) & IXGBE_HICR_SV)) {

sys/dev/ixgbe/ixgbe_common.c

4678

s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,

sys/dev/ixgbe/ixgbe_common.c

4696

status = hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM);

sys/dev/ixgbe/ixgbe_common.c

470

for (i = 0; i < hw->mac.max_tx_queues; i++) {

sys/dev/ixgbe/ixgbe_common.c

4700

status = ixgbe_hic_unlocked(hw, buffer, length, timeout);

sys/dev/ixgbe/ixgbe_common.c

471

IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i);

sys/dev/ixgbe/ixgbe_common.c

4712

buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);

sys/dev/ixgbe/ixgbe_common.c

472

IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, 0);

sys/dev/ixgbe/ixgbe_common.c

4724

buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG,

sys/dev/ixgbe/ixgbe_common.c

474

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

4748

buffer[bi] = IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG, bi);

sys/dev/ixgbe/ixgbe_common.c

4753

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_SW_MNG_SM);

sys/dev/ixgbe/ixgbe_common.c

477

for (i = 0; i < hw->mac.max_tx_queues; i++) {

sys/dev/ixgbe/ixgbe_common.c

4773

s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,

sys/dev/ixgbe/ixgbe_common.c

478

regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(i));

sys/dev/ixgbe/ixgbe_common.c

4787

fw_cmd.port_num = (u8)hw->bus.func;

sys/dev/ixgbe/ixgbe_common.c

4799

ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,

sys/dev/ixgbe/ixgbe_common.c

48

static u16 ixgbe_shift_in_eeprom_bits(struct ixgbe_hw *hw, u16 count);

sys/dev/ixgbe/ixgbe_common.c

480

IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(i), regval);

sys/dev/ixgbe/ixgbe_common.c

4825

void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,

sys/dev/ixgbe/ixgbe_common.c

4828

u32 pbsize = hw->mac.rx_pb_size;

sys/dev/ixgbe/ixgbe_common.c

483

for (i = 0; i < hw->mac.max_rx_queues; i++) {

sys/dev/ixgbe/ixgbe_common.c

484

regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));

sys/dev/ixgbe/ixgbe_common.c

4850

IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize);

sys/dev/ixgbe/ixgbe_common.c

4853

IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize);

sys/dev/ixgbe/ixgbe_common.c

4858

IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), rxpktsize);

sys/dev/ixgbe/ixgbe_common.c

4868

IXGBE_WRITE_REG(hw, IXGBE_TXPBSIZE(i), txpktsize);

sys/dev/ixgbe/ixgbe_common.c

4869

IXGBE_WRITE_REG(hw, IXGBE_TXPBTHRESH(i), txpbthresh);

sys/dev/ixgbe/ixgbe_common.c

487

IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);

sys/dev/ixgbe/ixgbe_common.c

4874

IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(i), 0);

sys/dev/ixgbe/ixgbe_common.c

4875

IXGBE_WRITE_REG(hw, IXGBE_TXPBSIZE(i), 0);

sys/dev/ixgbe/ixgbe_common.c

4876

IXGBE_WRITE_REG(hw, IXGBE_TXPBTHRESH(i), 0);

sys/dev/ixgbe/ixgbe_common.c

4888

void ixgbe_clear_tx_pending(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

4897

if (!(hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED))

sys/dev/ixgbe/ixgbe_common.c

49

static void ixgbe_raise_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);

sys/dev/ixgbe/ixgbe_common.c

4905

hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);

sys/dev/ixgbe/ixgbe_common.c

4906

IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0 | IXGBE_HLREG0_LPBK);

sys/dev/ixgbe/ixgbe_common.c

4909

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

4916

poll = ixgbe_pcie_timeout_poll(hw);

sys/dev/ixgbe/ixgbe_common.c

4919

value = IXGBE_READ_PCIE_WORD(hw, IXGBE_PCI_DEVICE_STATUS);

sys/dev/ixgbe/ixgbe_common.c

4920

if (IXGBE_REMOVED(hw->hw_addr))

sys/dev/ixgbe/ixgbe_common.c

4928

gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);

sys/dev/ixgbe/ixgbe_common.c

4929

IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT,

sys/dev/ixgbe/ixgbe_common.c

4933

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

4937

IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);

sys/dev/ixgbe/ixgbe_common.c

4938

IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);

sys/dev/ixgbe/ixgbe_common.c

4960

s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

4970

struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;

sys/dev/ixgbe/ixgbe_common.c

4975

if ((hw->mac.type != ixgbe_mac_82599EB) ||

sys/dev/ixgbe/ixgbe_common.c

4976

(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1)) {

sys/dev/ixgbe/ixgbe_common.c

4981

status = hw->eeprom.ops.read(hw, IXGBE_ETS_CFG, &ets_offset);

sys/dev/ixgbe/ixgbe_common.c

4990

status = hw->eeprom.ops.read(hw, ets_offset, &ets_cfg);

sys/dev/ixgbe/ixgbe_common.c

50

static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);

sys/dev/ixgbe/ixgbe_common.c

5005

status = hw->eeprom.ops.read(hw, (ets_offset + 1 + i),

sys/dev/ixgbe/ixgbe_common.c

501

s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

5016

status = hw->phy.ops.read_i2c_byte(hw,

sys/dev/ixgbe/ixgbe_common.c

5035

s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

5048

struct ixgbe_thermal_sensor_data *data = &hw->mac.thermal_sensor_data;

sys/dev/ixgbe/ixgbe_common.c

5055

if ((hw->mac.type != ixgbe_mac_82599EB) ||

sys/dev/ixgbe/ixgbe_common.c

5056

(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_LAN_ID_1))

sys/dev/ixgbe/ixgbe_common.c

5060

if (hw->eeprom.ops.read(hw, offset, &ets_offset))

sys/dev/ixgbe/ixgbe_common.c

5066

if (hw->eeprom.ops.read(hw, offset, &ets_cfg))

sys/dev/ixgbe/ixgbe_common.c

5078

if (hw->eeprom.ops.read(hw, offset, &ets_sensor)) {

sys/dev/ixgbe/ixgbe_common.c

508

status = hw->mac.ops.reset_hw(hw);

sys/dev/ixgbe/ixgbe_common.c

5090

hw->phy.ops.write_i2c_byte(hw,

sys/dev/ixgbe/ixgbe_common.c

51

static void ixgbe_release_eeprom(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.c

5119

s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status)

sys/dev/ixgbe/ixgbe_common.c

512

status = hw->mac.ops.start_hw(hw);

sys/dev/ixgbe/ixgbe_common.c

5131

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_common.c

5153

esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_common.c

5159

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_common.c

516

if (hw->mac.ops.init_led_link_act)

sys/dev/ixgbe/ixgbe_common.c

5160

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

5165

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_common.c

5166

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

517

hw->mac.ops.init_led_link_act(hw);

sys/dev/ixgbe/ixgbe_common.c

5170

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_common.c

5171

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

5178

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_common.c

5181

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_common.c

5183

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

5187

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_common.c

5188

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

5192

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_common.c

5193

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

5196

esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_common.c

5207

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_common.c

5208

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

5212

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_common.c

5213

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_common.c

5288

s32 ixgbe_bypass_set_generic(struct ixgbe_hw *hw, u32 ctrl, u32 event,

sys/dev/ixgbe/ixgbe_common.c

5297

if (ixgbe_bypass_rw_generic(hw, cmd, &by_ctl))

sys/dev/ixgbe/ixgbe_common.c

53

static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr);

sys/dev/ixgbe/ixgbe_common.c

5302

if (ixgbe_bypass_rw_generic(hw, cmd, &by_ctl))

sys/dev/ixgbe/ixgbe_common.c

5312

if (ixgbe_bypass_rw_generic(hw, verify, &by_ctl))

sys/dev/ixgbe/ixgbe_common.c

532

s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

5330

s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value)

sys/dev/ixgbe/ixgbe_common.c

5339

if (ixgbe_bypass_rw_generic(hw, cmd, &status))

sys/dev/ixgbe/ixgbe_common.c

5347

if (ixgbe_bypass_rw_generic(hw, cmd, &status))

sys/dev/ixgbe/ixgbe_common.c

5364

void ixgbe_get_orom_version(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.c

5371

hw->eeprom.ops.read(hw, NVM_OROM_OFFSET, &offset);

sys/dev/ixgbe/ixgbe_common.c

5377

hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_HI, &eeprom_cfg_blkh);

sys/dev/ixgbe/ixgbe_common.c

5378

hw->eeprom.ops.read(hw, offset + NVM_OROM_BLK_LOW, &eeprom_cfg_blkl);

sys/dev/ixgbe/ixgbe_common.c

538

IXGBE_READ_REG(hw, IXGBE_CRCERRS);

sys/dev/ixgbe/ixgbe_common.c

539

IXGBE_READ_REG(hw, IXGBE_ILLERRC);

sys/dev/ixgbe/ixgbe_common.c

54

static s32 ixgbe_get_san_mac_addr_offset(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.c

540

IXGBE_READ_REG(hw, IXGBE_ERRBC);

sys/dev/ixgbe/ixgbe_common.c

5402

void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.c

5408

hw->eeprom.ops.read(hw, NVM_OEM_PROD_VER_PTR, &offset);

sys/dev/ixgbe/ixgbe_common.c

541

IXGBE_READ_REG(hw, IXGBE_MSPDC);

sys/dev/ixgbe/ixgbe_common.c

5415

hw->eeprom.ops.read(hw, offset, &mod_len);

sys/dev/ixgbe/ixgbe_common.c

5416

hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_CAP_OFF, &cap);

sys/dev/ixgbe/ixgbe_common.c

5423

hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_L, &prod_ver);

sys/dev/ixgbe/ixgbe_common.c

5424

hw->eeprom.ops.read(hw, offset + NVM_OEM_PROD_VER_OFF_H, &rel_num);

sys/dev/ixgbe/ixgbe_common.c

543

IXGBE_READ_REG(hw, IXGBE_MPC(i));

sys/dev/ixgbe/ixgbe_common.c

5445

void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver)

sys/dev/ixgbe/ixgbe_common.c

5449

if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_LOW, &etk_id_l))

sys/dev/ixgbe/ixgbe_common.c

545

IXGBE_READ_REG(hw, IXGBE_MLFC);

sys/dev/ixgbe/ixgbe_common.c

5451

if (hw->eeprom.ops.read(hw, NVM_ETK_OFF_HI, &etk_id_h))

sys/dev/ixgbe/ixgbe_common.c

546

IXGBE_READ_REG(hw, IXGBE_MRFC);

sys/dev/ixgbe/ixgbe_common.c

547

IXGBE_READ_REG(hw, IXGBE_RLEC);

sys/dev/ixgbe/ixgbe_common.c

5474

void ixgbe_get_nvm_version(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.c

548

IXGBE_READ_REG(hw, IXGBE_LXONTXC);

sys/dev/ixgbe/ixgbe_common.c

5484

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_common.c

5487

if (ixgbe_read_eeprom(hw, NVM_EEP_OFFSET_82598, &word))

sys/dev/ixgbe/ixgbe_common.c

549

IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);

sys/dev/ixgbe/ixgbe_common.c

5497

if (ixgbe_read_eeprom(hw, NVM_EEP_OFFSET_X540, &word))

sys/dev/ixgbe/ixgbe_common.c

550

if (hw->mac.type >= ixgbe_mac_82599EB) {

sys/dev/ixgbe/ixgbe_common.c

551

IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);

sys/dev/ixgbe/ixgbe_common.c

5511

if (ixgbe_read_eeprom(hw, NVM_EEP_OFFSET_X540, &word))

sys/dev/ixgbe/ixgbe_common.c

552

IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);

sys/dev/ixgbe/ixgbe_common.c

5523

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_common.c

5530

if (ixgbe_read_eeprom(hw, NVM_EEP_PHY_OFF_X540, &word))

sys/dev/ixgbe/ixgbe_common.c

554

IXGBE_READ_REG(hw, IXGBE_LXONRXC);

sys/dev/ixgbe/ixgbe_common.c

5542

ixgbe_get_etk_id(hw, nvm_ver);

sys/dev/ixgbe/ixgbe_common.c

5545

if (ixgbe_read_eeprom(hw, NVM_DS_OFFSET, &word))

sys/dev/ixgbe/ixgbe_common.c

555

IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);

sys/dev/ixgbe/ixgbe_common.c

5551

if (ixgbe_read_eeprom(hw, NVM_OEM_OFFSET, &nvm_ver->oem_specific))

sys/dev/ixgbe/ixgbe_common.c

5555

if (ixgbe_get_phy_firmware_version(hw, &phy_ver))

sys/dev/ixgbe/ixgbe_common.c

5562

ixgbe_get_orom_version(hw, nvm_ver);

sys/dev/ixgbe/ixgbe_common.c

5573

void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map)

sys/dev/ixgbe/ixgbe_common.c

5577

reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);

sys/dev/ixgbe/ixgbe_common.c

5584

void ixgbe_disable_rx_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

5589

rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);

sys/dev/ixgbe/ixgbe_common.c

559

IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));

sys/dev/ixgbe/ixgbe_common.c

5591

if (hw->mac.type != ixgbe_mac_82598EB) {

sys/dev/ixgbe/ixgbe_common.c

5592

pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC);

sys/dev/ixgbe/ixgbe_common.c

5595

IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc);

sys/dev/ixgbe/ixgbe_common.c

5596

hw->mac.set_lben = true;

sys/dev/ixgbe/ixgbe_common.c

5598

hw->mac.set_lben = false;

sys/dev/ixgbe/ixgbe_common.c

56

static s32 ixgbe_read_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.c

560

IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));

sys/dev/ixgbe/ixgbe_common.c

5602

IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);

sys/dev/ixgbe/ixgbe_common.c

5606

void ixgbe_enable_rx_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

561

if (hw->mac.type >= ixgbe_mac_82599EB) {

sys/dev/ixgbe/ixgbe_common.c

5611

rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);

sys/dev/ixgbe/ixgbe_common.c

5612

IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, (rxctrl | IXGBE_RXCTRL_RXEN));

sys/dev/ixgbe/ixgbe_common.c

5614

if (hw->mac.type != ixgbe_mac_82598EB) {

sys/dev/ixgbe/ixgbe_common.c

5615

if (hw->mac.set_lben) {

sys/dev/ixgbe/ixgbe_common.c

5616

pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC);

sys/dev/ixgbe/ixgbe_common.c

5618

IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc);

sys/dev/ixgbe/ixgbe_common.c

5619

hw->mac.set_lben = false;

sys/dev/ixgbe/ixgbe_common.c

562

IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));

sys/dev/ixgbe/ixgbe_common.c

5628

bool ixgbe_mng_present(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

563

IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));

sys/dev/ixgbe/ixgbe_common.c

5632

if (hw->mac.type < ixgbe_mac_82599EB)

sys/dev/ixgbe/ixgbe_common.c

5635

fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

5646

bool ixgbe_mng_enabled(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

565

IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));

sys/dev/ixgbe/ixgbe_common.c

5650

fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

5654

manc = IXGBE_READ_REG(hw, IXGBE_MANC);

sys/dev/ixgbe/ixgbe_common.c

5658

if (hw->mac.type <= ixgbe_mac_X540) {

sys/dev/ixgbe/ixgbe_common.c

5659

factps = IXGBE_READ_REG(hw, IXGBE_FACTPS_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

566

IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));

sys/dev/ixgbe/ixgbe_common.c

5675

s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.c

5689

status = ixgbe_get_link_capabilities(hw, &link_speed, &autoneg);

sys/dev/ixgbe/ixgbe_common.c

569

if (hw->mac.type >= ixgbe_mac_82599EB)

sys/dev/ixgbe/ixgbe_common.c

5703

switch (hw->phy.media_type) {

sys/dev/ixgbe/ixgbe_common.c

5706

ixgbe_set_rate_select_speed(hw,

sys/dev/ixgbe/ixgbe_common.c

571

IXGBE_READ_REG(hw, IXGBE_PXON2OFFCNT(i));

sys/dev/ixgbe/ixgbe_common.c

572

IXGBE_READ_REG(hw, IXGBE_PRC64);

sys/dev/ixgbe/ixgbe_common.c

5720

status = ixgbe_setup_mac_link(hw,

sys/dev/ixgbe/ixgbe_common.c

5727

ixgbe_flap_tx_laser(hw);

sys/dev/ixgbe/ixgbe_common.c

573

IXGBE_READ_REG(hw, IXGBE_PRC127);

sys/dev/ixgbe/ixgbe_common.c

5738

status = ixgbe_check_link(hw, &link_speed,

sys/dev/ixgbe/ixgbe_common.c

574

IXGBE_READ_REG(hw, IXGBE_PRC255);

sys/dev/ixgbe/ixgbe_common.c

575

IXGBE_READ_REG(hw, IXGBE_PRC511);

sys/dev/ixgbe/ixgbe_common.c

5754

switch (hw->phy.media_type) {

sys/dev/ixgbe/ixgbe_common.c

5757

ixgbe_set_rate_select_speed(hw,

sys/dev/ixgbe/ixgbe_common.c

576

IXGBE_READ_REG(hw, IXGBE_PRC1023);

sys/dev/ixgbe/ixgbe_common.c

577

IXGBE_READ_REG(hw, IXGBE_PRC1522);

sys/dev/ixgbe/ixgbe_common.c

5771

status = ixgbe_setup_mac_link(hw,

sys/dev/ixgbe/ixgbe_common.c

5778

ixgbe_flap_tx_laser(hw);

sys/dev/ixgbe/ixgbe_common.c

578

IXGBE_READ_REG(hw, IXGBE_GPRC);

sys/dev/ixgbe/ixgbe_common.c

5784

status = ixgbe_check_link(hw, &link_speed, &link_up, false);

sys/dev/ixgbe/ixgbe_common.c

579

IXGBE_READ_REG(hw, IXGBE_BPRC);

sys/dev/ixgbe/ixgbe_common.c

5797

status = ixgbe_setup_mac_link_multispeed_fiber(hw,

sys/dev/ixgbe/ixgbe_common.c

58

static s32 ixgbe_write_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.c

580

IXGBE_READ_REG(hw, IXGBE_MPRC);

sys/dev/ixgbe/ixgbe_common.c

5803

hw->phy.autoneg_advertised = 0;

sys/dev/ixgbe/ixgbe_common.c

5806

hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL;

sys/dev/ixgbe/ixgbe_common.c

5809

hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL;

sys/dev/ixgbe/ixgbe_common.c

581

IXGBE_READ_REG(hw, IXGBE_GPTC);

sys/dev/ixgbe/ixgbe_common.c

582

IXGBE_READ_REG(hw, IXGBE_GORCL);

sys/dev/ixgbe/ixgbe_common.c

5821

void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.c

583

IXGBE_READ_REG(hw, IXGBE_GORCH);

sys/dev/ixgbe/ixgbe_common.c

584

IXGBE_READ_REG(hw, IXGBE_GOTCL);

sys/dev/ixgbe/ixgbe_common.c

5841

status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB,

sys/dev/ixgbe/ixgbe_common.c

585

IXGBE_READ_REG(hw, IXGBE_GOTCH);

sys/dev/ixgbe/ixgbe_common.c

5851

status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB,

sys/dev/ixgbe/ixgbe_common.c

586

if (hw->mac.type == ixgbe_mac_82598EB)

sys/dev/ixgbe/ixgbe_common.c

5860

status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB,

sys/dev/ixgbe/ixgbe_common.c

5870

status = hw->phy.ops.write_i2c_byte(hw, IXGBE_SFF_SFF_8472_ESCB,

sys/dev/ixgbe/ixgbe_common.c

588

IXGBE_READ_REG(hw, IXGBE_RNBC(i));

sys/dev/ixgbe/ixgbe_common.c

589

IXGBE_READ_REG(hw, IXGBE_RUC);

sys/dev/ixgbe/ixgbe_common.c

590

IXGBE_READ_REG(hw, IXGBE_RFC);

sys/dev/ixgbe/ixgbe_common.c

591

IXGBE_READ_REG(hw, IXGBE_ROC);

sys/dev/ixgbe/ixgbe_common.c

592

IXGBE_READ_REG(hw, IXGBE_RJC);

sys/dev/ixgbe/ixgbe_common.c

593

IXGBE_READ_REG(hw, IXGBE_MNGPRC);

sys/dev/ixgbe/ixgbe_common.c

594

IXGBE_READ_REG(hw, IXGBE_MNGPDC);

sys/dev/ixgbe/ixgbe_common.c

595

IXGBE_READ_REG(hw, IXGBE_MNGPTC);

sys/dev/ixgbe/ixgbe_common.c

596

IXGBE_READ_REG(hw, IXGBE_TORL);

sys/dev/ixgbe/ixgbe_common.c

597

IXGBE_READ_REG(hw, IXGBE_TORH);

sys/dev/ixgbe/ixgbe_common.c

598

IXGBE_READ_REG(hw, IXGBE_TPR);

sys/dev/ixgbe/ixgbe_common.c

599

IXGBE_READ_REG(hw, IXGBE_TPT);

sys/dev/ixgbe/ixgbe_common.c

60

static s32 ixgbe_detect_eeprom_page_size_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.c

600

IXGBE_READ_REG(hw, IXGBE_PTC64);

sys/dev/ixgbe/ixgbe_common.c

601

IXGBE_READ_REG(hw, IXGBE_PTC127);

sys/dev/ixgbe/ixgbe_common.c

602

IXGBE_READ_REG(hw, IXGBE_PTC255);

sys/dev/ixgbe/ixgbe_common.c

603

IXGBE_READ_REG(hw, IXGBE_PTC511);

sys/dev/ixgbe/ixgbe_common.c

604

IXGBE_READ_REG(hw, IXGBE_PTC1023);

sys/dev/ixgbe/ixgbe_common.c

605

IXGBE_READ_REG(hw, IXGBE_PTC1522);

sys/dev/ixgbe/ixgbe_common.c

606

IXGBE_READ_REG(hw, IXGBE_MPTC);

sys/dev/ixgbe/ixgbe_common.c

607

IXGBE_READ_REG(hw, IXGBE_BPTC);

sys/dev/ixgbe/ixgbe_common.c

609

IXGBE_READ_REG(hw, IXGBE_QPRC(i));

sys/dev/ixgbe/ixgbe_common.c

610

IXGBE_READ_REG(hw, IXGBE_QPTC(i));

sys/dev/ixgbe/ixgbe_common.c

611

if (hw->mac.type >= ixgbe_mac_82599EB) {

sys/dev/ixgbe/ixgbe_common.c

612

IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));

sys/dev/ixgbe/ixgbe_common.c

613

IXGBE_READ_REG(hw, IXGBE_QBRC_H(i));

sys/dev/ixgbe/ixgbe_common.c

614

IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));

sys/dev/ixgbe/ixgbe_common.c

615

IXGBE_READ_REG(hw, IXGBE_QBTC_H(i));

sys/dev/ixgbe/ixgbe_common.c

616

IXGBE_READ_REG(hw, IXGBE_QPRDC(i));

sys/dev/ixgbe/ixgbe_common.c

618

IXGBE_READ_REG(hw, IXGBE_QBRC(i));

sys/dev/ixgbe/ixgbe_common.c

619

IXGBE_READ_REG(hw, IXGBE_QBTC(i));

sys/dev/ixgbe/ixgbe_common.c

623

if (hw->mac.type == ixgbe_mac_X540 ||

sys/dev/ixgbe/ixgbe_common.c

624

hw->mac.type == ixgbe_mac_X550) {

sys/dev/ixgbe/ixgbe_common.c

625

if (hw->phy.id == 0)

sys/dev/ixgbe/ixgbe_common.c

626

ixgbe_identify_phy(hw);

sys/dev/ixgbe/ixgbe_common.c

627

hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL,

sys/dev/ixgbe/ixgbe_common.c

629

hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH,

sys/dev/ixgbe/ixgbe_common.c

631

hw->phy.ops.read_reg(hw, IXGBE_LDPCECL,

sys/dev/ixgbe/ixgbe_common.c

633

hw->phy.ops.read_reg(hw, IXGBE_LDPCECH,

sys/dev/ixgbe/ixgbe_common.c

648

s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,

sys/dev/ixgbe/ixgbe_common.c

664

ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data);

sys/dev/ixgbe/ixgbe_common.c

670

ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &pba_ptr);

sys/dev/ixgbe/ixgbe_common.c

69

s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_common.c

71

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_common.c

716

ret_val = hw->eeprom.ops.read(hw, pba_ptr, &length);

sys/dev/ixgbe/ixgbe_common.c

72

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_common.c

722

if (length == 0xFFFF || length == 0 || length > hw->eeprom.word_size) {

sys/dev/ixgbe/ixgbe_common.c

73

u32 eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_common.c

738

ret_val = hw->eeprom.ops.read(hw, pba_ptr + offset, &data);

sys/dev/ixgbe/ixgbe_common.c

758

s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num)

sys/dev/ixgbe/ixgbe_common.c

765

ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM0_PTR, &data);

sys/dev/ixgbe/ixgbe_common.c

775

ret_val = hw->eeprom.ops.read(hw, IXGBE_PBANUM1_PTR, &data);

sys/dev/ixgbe/ixgbe_common.c

797

s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/ixgbe/ixgbe_common.c

808

ret_val = hw->eeprom.ops.read_buffer(hw, IXGBE_PBANUM0_PTR, 2,

sys/dev/ixgbe/ixgbe_common.c

825

ret_val = ixgbe_get_pba_block_size(hw, eeprom_buf,

sys/dev/ixgbe/ixgbe_common.c

835

ret_val = hw->eeprom.ops.read_buffer(hw, pba->word[1],

sys/dev/ixgbe/ixgbe_common.c

866

s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/ixgbe/ixgbe_common.c

875

ret_val = hw->eeprom.ops.write_buffer(hw, IXGBE_PBANUM0_PTR, 2,

sys/dev/ixgbe/ixgbe_common.c

893

ret_val = hw->eeprom.ops.write_buffer(hw, pba->word[1],

sys/dev/ixgbe/ixgbe_common.c

925

s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/ixgbe/ixgbe_common.c

935

ret_val = hw->eeprom.ops.read_buffer(hw, IXGBE_PBANUM0_PTR, 2,

sys/dev/ixgbe/ixgbe_common.c

950

ret_val = hw->eeprom.ops.read(hw, pba_word[1] + 0,

sys/dev/ixgbe/ixgbe_common.c

983

s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr)

sys/dev/ixgbe/ixgbe_common.c

991

rar_high = IXGBE_READ_REG(hw, IXGBE_RAH(0));

sys/dev/ixgbe/ixgbe_common.c

992

rar_low = IXGBE_READ_REG(hw, IXGBE_RAL(0));

sys/dev/ixgbe/ixgbe_common.h

100

s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_common.h

101

s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

102

s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list,

sys/dev/ixgbe/ixgbe_common.h

105

s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list,

sys/dev/ixgbe/ixgbe_common.h

107

s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

108

s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

109

s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);

sys/dev/ixgbe/ixgbe_common.h

110

s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

111

s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

113

s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

114

bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

115

void ixgbe_fc_autoneg(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

116

s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

119

s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);

sys/dev/ixgbe/ixgbe_common.h

120

void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);

sys/dev/ixgbe/ixgbe_common.h

121

s32 ixgbe_disable_pcie_primary(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

123

s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);

sys/dev/ixgbe/ixgbe_common.h

124

s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);

sys/dev/ixgbe/ixgbe_common.h

126

s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_common.h

127

s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_common.h

129

s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);

sys/dev/ixgbe/ixgbe_common.h

130

s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);

sys/dev/ixgbe/ixgbe_common.h

132

s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

sys/dev/ixgbe/ixgbe_common.h

133

s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);

sys/dev/ixgbe/ixgbe_common.h

134

s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);

sys/dev/ixgbe/ixgbe_common.h

135

s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);

sys/dev/ixgbe/ixgbe_common.h

136

s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

137

s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,

sys/dev/ixgbe/ixgbe_common.h

139

s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,

sys/dev/ixgbe/ixgbe_common.h

142

s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

143

s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass);

sys/dev/ixgbe/ixgbe_common.h

144

s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vind);

sys/dev/ixgbe/ixgbe_common.h

146

s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.h

150

s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,

sys/dev/ixgbe/ixgbe_common.h

153

s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs);

sys/dev/ixgbe/ixgbe_common.h

154

void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);

sys/dev/ixgbe/ixgbe_common.h

155

void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);

sys/dev/ixgbe/ixgbe_common.h

156

s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);

sys/dev/ixgbe/ixgbe_common.h

157

void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,

sys/dev/ixgbe/ixgbe_common.h

159

void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

160

s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,

sys/dev/ixgbe/ixgbe_common.h

163

s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,

sys/dev/ixgbe/ixgbe_common.h

169

void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

170

s32 ixgbe_bypass_rw_generic(struct ixgbe_hw *hw, u32 cmd, u32 *status);

sys/dev/ixgbe/ixgbe_common.h

172

s32 ixgbe_bypass_set_generic(struct ixgbe_hw *hw, u32 ctrl, u32 event,

sys/dev/ixgbe/ixgbe_common.h

174

s32 ixgbe_bypass_rd_eep_generic(struct ixgbe_hw *hw, u32 addr, u8 *value);

sys/dev/ixgbe/ixgbe_common.h

176

extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

177

extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

178

bool ixgbe_mng_present(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

179

bool ixgbe_mng_enabled(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

191

s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

192

s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

194

void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver);

sys/dev/ixgbe/ixgbe_common.h

195

void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.h

197

void ixgbe_get_orom_version(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.h

199

void ixgbe_get_nvm_version(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.h

201

void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

202

void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

203

s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.h

206

void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.h

39

#define IXGBE_WRITE_REG64(hw, reg, value) \

sys/dev/ixgbe/ixgbe_common.h

41

IXGBE_WRITE_REG(hw, reg, (u32) value); \

sys/dev/ixgbe/ixgbe_common.h

42

IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \

sys/dev/ixgbe/ixgbe_common.h

50

void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map);

sys/dev/ixgbe/ixgbe_common.h

52

u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

53

s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

54

s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

55

s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

56

void ixgbe_start_hw_gen2(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

57

s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

58

s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);

sys/dev/ixgbe/ixgbe_common.h

59

s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,

sys/dev/ixgbe/ixgbe_common.h

61

s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/ixgbe/ixgbe_common.h

64

s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/ixgbe/ixgbe_common.h

66

s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,

sys/dev/ixgbe/ixgbe_common.h

68

s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);

sys/dev/ixgbe/ixgbe_common.h

69

s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

70

void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status);

sys/dev/ixgbe/ixgbe_common.h

71

void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

72

s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

74

s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_common.h

75

s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_common.h

76

s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

78

s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

79

s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);

sys/dev/ixgbe/ixgbe_common.h

80

s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.h

82

s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);

sys/dev/ixgbe/ixgbe_common.h

83

s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.h

85

s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);

sys/dev/ixgbe/ixgbe_common.h

86

s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.h

88

s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.h

90

s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_common.h

92

s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

93

s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_common.h

95

s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_common.h

96

s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);

sys/dev/ixgbe/ixgbe_common.h

98

s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

sys/dev/ixgbe/ixgbe_dcb.c

184

&& (hw->mac.type == ixgbe_mac_82598EB))

sys/dev/ixgbe/ixgbe_dcb.c

398

s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,

sys/dev/ixgbe/ixgbe_dcb.c

402

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_dcb.c

404

ret = ixgbe_dcb_get_tc_stats_82598(hw, stats, tc_count);

sys/dev/ixgbe/ixgbe_dcb.c

411

ret = ixgbe_dcb_get_tc_stats_82599(hw, stats, tc_count);

sys/dev/ixgbe/ixgbe_dcb.c

427

s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,

sys/dev/ixgbe/ixgbe_dcb.c

431

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_dcb.c

433

ret = ixgbe_dcb_get_pfc_stats_82598(hw, stats, tc_count);

sys/dev/ixgbe/ixgbe_dcb.c

440

ret = ixgbe_dcb_get_pfc_stats_82599(hw, stats, tc_count);

sys/dev/ixgbe/ixgbe_dcb.c

455

s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb.c

471

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_dcb.c

473

ret = ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa);

sys/dev/ixgbe/ixgbe_dcb.c

480

ret = ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwgid,

sys/dev/ixgbe/ixgbe_dcb.c

496

s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb.c

510

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_dcb.c

512

ret = ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max,

sys/dev/ixgbe/ixgbe_dcb.c

520

ret = ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max,

sys/dev/ixgbe/ixgbe_dcb.c

536

s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb.c

552

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_dcb.c

554

ret = ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max,

sys/dev/ixgbe/ixgbe_dcb.c

562

ret = ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max,

sys/dev/ixgbe/ixgbe_dcb.c

579

s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb.c

589

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_dcb.c

591

ret = ixgbe_dcb_config_pfc_82598(hw, pfc_en);

sys/dev/ixgbe/ixgbe_dcb.c

598

ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map);

sys/dev/ixgbe/ixgbe_dcb.c

613

s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_dcb.c

616

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_dcb.c

618

ret = ixgbe_dcb_config_tc_stats_82598(hw);

sys/dev/ixgbe/ixgbe_dcb.c

625

ret = ixgbe_dcb_config_tc_stats_82599(hw, NULL);

sys/dev/ixgbe/ixgbe_dcb.c

640

s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb.c

658

hw->mac.ops.setup_rxpba(hw, dcb_config->num_tcs.pg_tcs,

sys/dev/ixgbe/ixgbe_dcb.c

661

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_dcb.c

663

ret = ixgbe_dcb_hw_config_82598(hw, dcb_config->link_speed,

sys/dev/ixgbe/ixgbe_dcb.c

671

ixgbe_dcb_config_82599(hw, dcb_config);

sys/dev/ixgbe/ixgbe_dcb.c

672

ret = ixgbe_dcb_hw_config_82599(hw, dcb_config->link_speed,

sys/dev/ixgbe/ixgbe_dcb.c

676

ixgbe_dcb_config_tc_stats_82599(hw, dcb_config);

sys/dev/ixgbe/ixgbe_dcb.c

684

ret = ixgbe_dcb_config_pfc(hw, pfc_en, map);

sys/dev/ixgbe/ixgbe_dcb.c

691

s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *hw, u8 pfc_en, u8 *map)

sys/dev/ixgbe/ixgbe_dcb.c

695

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_dcb.c

697

ret = ixgbe_dcb_config_pfc_82598(hw, pfc_en);

sys/dev/ixgbe/ixgbe_dcb.c

704

ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map);

sys/dev/ixgbe/ixgbe_dcb.c

712

s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, u16 *refill, u16 *max,

sys/dev/ixgbe/ixgbe_dcb.c

715

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_dcb.c

717

ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa);

sys/dev/ixgbe/ixgbe_dcb.c

718

ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max, bwg_id,

sys/dev/ixgbe/ixgbe_dcb.c

720

ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max, bwg_id,

sys/dev/ixgbe/ixgbe_dcb.c

728

ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwg_id,

sys/dev/ixgbe/ixgbe_dcb.c

730

ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, bwg_id,

sys/dev/ixgbe/ixgbe_dcb.c

732

ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id,

sys/dev/ixgbe/ixgbe_dcb.c

94

s32 ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb_82598.c

112

s32 ixgbe_dcb_config_rx_arbiter_82598(struct ixgbe_hw *hw, u16 *refill,

sys/dev/ixgbe/ixgbe_dcb_82598.c

120

reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA;

sys/dev/ixgbe/ixgbe_dcb_82598.c

121

IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

123

reg = IXGBE_READ_REG(hw, IXGBE_RMCS);

sys/dev/ixgbe/ixgbe_dcb_82598.c

131

IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

143

IXGBE_WRITE_REG(hw, IXGBE_RT2CR(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

146

reg = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);

sys/dev/ixgbe/ixgbe_dcb_82598.c

150

IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

152

reg = IXGBE_READ_REG(hw, IXGBE_RXCTRL);

sys/dev/ixgbe/ixgbe_dcb_82598.c

155

IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

170

s32 ixgbe_dcb_config_tx_desc_arbiter_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb_82598.c

177

reg = IXGBE_READ_REG(hw, IXGBE_DPMCS);

sys/dev/ixgbe/ixgbe_dcb_82598.c

186

IXGBE_WRITE_REG(hw, IXGBE_DPMCS, reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

201

IXGBE_WRITE_REG(hw, IXGBE_TDTQ2TCCR(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

217

s32 ixgbe_dcb_config_tx_data_arbiter_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb_82598.c

224

reg = IXGBE_READ_REG(hw, IXGBE_PDPMCS);

sys/dev/ixgbe/ixgbe_dcb_82598.c

230

IXGBE_WRITE_REG(hw, IXGBE_PDPMCS, reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

244

IXGBE_WRITE_REG(hw, IXGBE_TDPT2TCCR(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

248

reg = IXGBE_READ_REG(hw, IXGBE_DTXCTL);

sys/dev/ixgbe/ixgbe_dcb_82598.c

250

IXGBE_WRITE_REG(hw, IXGBE_DTXCTL, reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

262

s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw, u8 pfc_en)

sys/dev/ixgbe/ixgbe_dcb_82598.c

268

reg = IXGBE_READ_REG(hw, IXGBE_RMCS);

sys/dev/ixgbe/ixgbe_dcb_82598.c

271

IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

274

reg = IXGBE_READ_REG(hw, IXGBE_FCTRL);

sys/dev/ixgbe/ixgbe_dcb_82598.c

280

IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

285

IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0);

sys/dev/ixgbe/ixgbe_dcb_82598.c

286

IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0);

sys/dev/ixgbe/ixgbe_dcb_82598.c

290

fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE;

sys/dev/ixgbe/ixgbe_dcb_82598.c

291

reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN;

sys/dev/ixgbe/ixgbe_dcb_82598.c

292

IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), fcrtl);

sys/dev/ixgbe/ixgbe_dcb_82598.c

293

IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

297

reg = hw->fc.pause_time | (hw->fc.pause_time << 16);

sys/dev/ixgbe/ixgbe_dcb_82598.c

299

IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

302

IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2);

sys/dev/ixgbe/ixgbe_dcb_82598.c

314

s32 ixgbe_dcb_config_tc_stats_82598(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_dcb_82598.c

322

reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(i));

sys/dev/ixgbe/ixgbe_dcb_82598.c

324

IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

325

reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(i + 1));

sys/dev/ixgbe/ixgbe_dcb_82598.c

327

IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i + 1), reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

331

reg = IXGBE_READ_REG(hw, IXGBE_TQSMR(i));

sys/dev/ixgbe/ixgbe_dcb_82598.c

333

IXGBE_WRITE_REG(hw, IXGBE_TQSMR(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82598.c

350

s32 ixgbe_dcb_hw_config_82598(struct ixgbe_hw *hw, int link_speed,

sys/dev/ixgbe/ixgbe_dcb_82598.c

356

ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa);

sys/dev/ixgbe/ixgbe_dcb_82598.c

357

ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max, bwg_id,

sys/dev/ixgbe/ixgbe_dcb_82598.c

359

ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max, bwg_id,

sys/dev/ixgbe/ixgbe_dcb_82598.c

361

ixgbe_dcb_config_tc_stats_82598(hw);

sys/dev/ixgbe/ixgbe_dcb_82598.c

48

s32 ixgbe_dcb_get_tc_stats_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb_82598.c

62

stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc));

sys/dev/ixgbe/ixgbe_dcb_82598.c

64

stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC(tc));

sys/dev/ixgbe/ixgbe_dcb_82598.c

66

stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc));

sys/dev/ixgbe/ixgbe_dcb_82598.c

68

stats->qbrc[tc] += IXGBE_READ_REG(hw, IXGBE_QBRC(tc));

sys/dev/ixgbe/ixgbe_dcb_82598.c

82

s32 ixgbe_dcb_get_pfc_stats_82598(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb_82598.c

95

stats->pxofftxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(tc));

sys/dev/ixgbe/ixgbe_dcb_82598.c

97

stats->pxoffrxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(tc));

sys/dev/ixgbe/ixgbe_dcb_82599.c

102

stats->pxofftxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(tc));

sys/dev/ixgbe/ixgbe_dcb_82599.c

104

stats->pxoffrxc[tc] += IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(tc));

sys/dev/ixgbe/ixgbe_dcb_82599.c

121

s32 ixgbe_dcb_config_rx_arbiter_82599(struct ixgbe_hw *hw, u16 *refill,

sys/dev/ixgbe/ixgbe_dcb_82599.c

135

IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

147

IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

160

IXGBE_WRITE_REG(hw, IXGBE_RTRPT4C(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

168

IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

183

s32 ixgbe_dcb_config_tx_desc_arbiter_82599(struct ixgbe_hw *hw, u16 *refill,

sys/dev/ixgbe/ixgbe_dcb_82599.c

191

IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i);

sys/dev/ixgbe/ixgbe_dcb_82599.c

192

IXGBE_WRITE_REG(hw, IXGBE_RTTDT1C, 0);

sys/dev/ixgbe/ixgbe_dcb_82599.c

208

IXGBE_WRITE_REG(hw, IXGBE_RTTDT2C(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

216

IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

232

s32 ixgbe_dcb_config_tx_data_arbiter_82599(struct ixgbe_hw *hw, u16 *refill,

sys/dev/ixgbe/ixgbe_dcb_82599.c

246

IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

258

IXGBE_WRITE_REG(hw, IXGBE_RTTUP2TC, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

272

IXGBE_WRITE_REG(hw, IXGBE_RTTPT2C(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

281

IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

294

s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en, u8 *map)

sys/dev/ixgbe/ixgbe_dcb_82599.c

300

IXGBE_WRITE_REG(hw, IXGBE_FCCFG, IXGBE_FCCFG_TFCE_PRIORITY);

sys/dev/ixgbe/ixgbe_dcb_82599.c

303

reg = IXGBE_READ_REG(hw, IXGBE_MFLCN);

sys/dev/ixgbe/ixgbe_dcb_82599.c

313

if (hw->mac.type >= ixgbe_mac_X540)

sys/dev/ixgbe/ixgbe_dcb_82599.c

319

IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

339

reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN;

sys/dev/ixgbe/ixgbe_dcb_82599.c

340

fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE;

sys/dev/ixgbe/ixgbe_dcb_82599.c

341

IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), fcrtl);

sys/dev/ixgbe/ixgbe_dcb_82599.c

350

reg = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576;

sys/dev/ixgbe/ixgbe_dcb_82599.c

351

IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0);

sys/dev/ixgbe/ixgbe_dcb_82599.c

354

IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

358

IXGBE_WRITE_REG(hw, IXGBE_FCRTL_82599(i), 0);

sys/dev/ixgbe/ixgbe_dcb_82599.c

359

IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), 0);

sys/dev/ixgbe/ixgbe_dcb_82599.c

363

reg = hw->fc.pause_time | (hw->fc.pause_time << 16);

sys/dev/ixgbe/ixgbe_dcb_82599.c

365

IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

368

IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2);

sys/dev/ixgbe/ixgbe_dcb_82599.c

381

s32 ixgbe_dcb_config_tc_stats_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb_82599.c

407

IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

435

IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

452

IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

472

IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

48

s32 ixgbe_dcb_get_tc_stats_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb_82599.c

484

IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), 0x03020100);

sys/dev/ixgbe/ixgbe_dcb_82599.c

494

IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), 0x03020100);

sys/dev/ixgbe/ixgbe_dcb_82599.c

507

s32 ixgbe_dcb_config_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_dcb_82599.c

514

reg = IXGBE_READ_REG(hw, IXGBE_RTTDCS);

sys/dev/ixgbe/ixgbe_dcb_82599.c

516

IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

518

reg = IXGBE_READ_REG(hw, IXGBE_MRQC);

sys/dev/ixgbe/ixgbe_dcb_82599.c

553

IXGBE_WRITE_REG(hw, IXGBE_MRQC, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

564

IXGBE_WRITE_REG(hw, IXGBE_MTQC, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

568

IXGBE_WRITE_REG(hw, IXGBE_QDE,

sys/dev/ixgbe/ixgbe_dcb_82599.c

572

reg = IXGBE_READ_REG(hw, IXGBE_RTTDCS);

sys/dev/ixgbe/ixgbe_dcb_82599.c

574

IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

577

reg = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);

sys/dev/ixgbe/ixgbe_dcb_82599.c

579

IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, reg);

sys/dev/ixgbe/ixgbe_dcb_82599.c

596

s32 ixgbe_dcb_hw_config_82599(struct ixgbe_hw *hw, int link_speed,

sys/dev/ixgbe/ixgbe_dcb_82599.c

602

ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwg_id, tsa,

sys/dev/ixgbe/ixgbe_dcb_82599.c

604

ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, bwg_id,

sys/dev/ixgbe/ixgbe_dcb_82599.c

606

ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id,

sys/dev/ixgbe/ixgbe_dcb_82599.c

62

stats->qptc[tc] += IXGBE_READ_REG(hw, IXGBE_QPTC(tc));

sys/dev/ixgbe/ixgbe_dcb_82599.c

64

stats->qbtc[tc] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(tc));

sys/dev/ixgbe/ixgbe_dcb_82599.c

66

(((u64)(IXGBE_READ_REG(hw, IXGBE_QBTC_H(tc)))) << 32);

sys/dev/ixgbe/ixgbe_dcb_82599.c

68

stats->qprc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRC(tc));

sys/dev/ixgbe/ixgbe_dcb_82599.c

70

stats->qbrc[tc] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(tc));

sys/dev/ixgbe/ixgbe_dcb_82599.c

72

(((u64)(IXGBE_READ_REG(hw, IXGBE_QBRC_H(tc)))) << 32);

sys/dev/ixgbe/ixgbe_dcb_82599.c

75

stats->qprdc[tc] += IXGBE_READ_REG(hw, IXGBE_QPRDC(tc));

sys/dev/ixgbe/ixgbe_dcb_82599.c

89

s32 ixgbe_dcb_get_pfc_stats_82599(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

1001

funcs = ixgbe_hweight8(hw->dev_caps.common_cap.valid_functions &

sys/dev/ixgbe/ixgbe_e610.c

1018

static void ixgbe_parse_vsi_func_caps(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

1022

func_p->guar_num_vsi = ixgbe_get_num_per_func(hw, IXGBE_MAX_VSI);

sys/dev/ixgbe/ixgbe_e610.c

1039

static void ixgbe_parse_func_caps(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

1052

ixgbe_parse_common_caps(hw, &func_p->common_cap,

sys/dev/ixgbe/ixgbe_e610.c

1057

ixgbe_parse_vf_func_caps(hw, func_p, &cap_resp[i]);

sys/dev/ixgbe/ixgbe_e610.c

1060

ixgbe_parse_vsi_func_caps(hw, func_p, &cap_resp[i]);

sys/dev/ixgbe/ixgbe_e610.c

1091

s32 ixgbe_aci_list_caps(struct ixgbe_hw *hw, void *buf, u16 buf_size,

sys/dev/ixgbe/ixgbe_e610.c

110

ixgbe_aci_send_cmd_execute(struct ixgbe_hw *hw, struct ixgbe_aci_desc *desc,

sys/dev/ixgbe/ixgbe_e610.c

1105

status = ixgbe_aci_send_cmd(hw, &desc, buf, buf_size);

sys/dev/ixgbe/ixgbe_e610.c

1123

s32 ixgbe_discover_dev_caps(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

1129

cbuf = (u8*)ixgbe_malloc(hw, IXGBE_ACI_MAX_BUFFER_SIZE);

sys/dev/ixgbe/ixgbe_e610.c

1139

status = ixgbe_aci_list_caps(hw, cbuf, IXGBE_ACI_MAX_BUFFER_SIZE,

sys/dev/ixgbe/ixgbe_e610.c

1143

ixgbe_parse_dev_caps(hw, dev_caps, cbuf, cap_count);

sys/dev/ixgbe/ixgbe_e610.c

1146

ixgbe_free(hw, cbuf);

sys/dev/ixgbe/ixgbe_e610.c

1161

s32 ixgbe_discover_func_caps(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

1168

cbuf = (u8*)ixgbe_malloc(hw, IXGBE_ACI_MAX_BUFFER_SIZE);

sys/dev/ixgbe/ixgbe_e610.c

1178

status = ixgbe_aci_list_caps(hw, cbuf, IXGBE_ACI_MAX_BUFFER_SIZE,

sys/dev/ixgbe/ixgbe_e610.c

1182

ixgbe_parse_func_caps(hw, func_caps, cbuf, cap_count);

sys/dev/ixgbe/ixgbe_e610.c

1185

ixgbe_free(hw, cbuf);

sys/dev/ixgbe/ixgbe_e610.c

1198

s32 ixgbe_get_caps(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

1202

status = ixgbe_discover_dev_caps(hw, &hw->dev_caps);

sys/dev/ixgbe/ixgbe_e610.c

1206

return ixgbe_discover_func_caps(hw, &hw->func_caps);

sys/dev/ixgbe/ixgbe_e610.c

121

hw->aci.last_status = IXGBE_ACI_RC_OK;

sys/dev/ixgbe/ixgbe_e610.c

1217

s32 ixgbe_aci_disable_rxen(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

1222

UNREFERENCED_1PARAMETER(hw);

sys/dev/ixgbe/ixgbe_e610.c

1228

cmd->lport_num = (u8)hw->bus.func;

sys/dev/ixgbe/ixgbe_e610.c

1230

return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

124

hicr = IXGBE_READ_REG(hw, PF_HICR);

sys/dev/ixgbe/ixgbe_e610.c

1245

s32 ixgbe_aci_get_phy_caps(struct ixgbe_hw *hw, bool qual_mods, u8 report_mode,

sys/dev/ixgbe/ixgbe_e610.c

1264

status = ixgbe_aci_send_cmd(hw, &desc, pcaps, pcaps_size);

sys/dev/ixgbe/ixgbe_e610.c

1268

hw->phy.phy_type_low = IXGBE_LE64_TO_CPU(pcaps->phy_type_low);

sys/dev/ixgbe/ixgbe_e610.c

1269

hw->phy.phy_type_high = IXGBE_LE64_TO_CPU(pcaps->phy_type_high);

sys/dev/ixgbe/ixgbe_e610.c

1270

memcpy(hw->link.link_info.module_type, &pcaps->module_type,

sys/dev/ixgbe/ixgbe_e610.c

1271

sizeof(hw->link.link_info.module_type));

sys/dev/ixgbe/ixgbe_e610.c

130

hw->aci.last_status = IXGBE_ACI_RC_EBUSY;

sys/dev/ixgbe/ixgbe_e610.c

1356

s32 ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

1365

use_1p40_buff = hw->func_caps.common_cap.eee_support != 0;

sys/dev/ixgbe/ixgbe_e610.c

1376

status = ixgbe_aci_send_cmd(hw, &desc, cfg, sizeof(*cfg));

sys/dev/ixgbe/ixgbe_e610.c

1382

status = ixgbe_aci_send_cmd(hw, &desc, &cfg_obsolete,

sys/dev/ixgbe/ixgbe_e610.c

1388

hw->phy.curr_user_phy_cfg = *cfg;

sys/dev/ixgbe/ixgbe_e610.c

1402

s32 ixgbe_aci_set_link_restart_an(struct ixgbe_hw *hw, bool ena_link)

sys/dev/ixgbe/ixgbe_e610.c

1417

return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

1432

ixgbe_get_media_type_from_phy_type(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

1436

if (!hw)

sys/dev/ixgbe/ixgbe_e610.c

1439

hw_link_info = &hw->link.link_info;

sys/dev/ixgbe/ixgbe_e610.c

1498

s32 ixgbe_update_link_info(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

1504

if (!hw)

sys/dev/ixgbe/ixgbe_e610.c

1507

li = &hw->link.link_info;

sys/dev/ixgbe/ixgbe_e610.c

1509

status = ixgbe_aci_get_link_info(hw, true, NULL);

sys/dev/ixgbe/ixgbe_e610.c

1515

ixgbe_malloc(hw, sizeof(*pcaps));

sys/dev/ixgbe/ixgbe_e610.c

1519

status = ixgbe_aci_get_phy_caps(hw, false,

sys/dev/ixgbe/ixgbe_e610.c

1527

ixgbe_free(hw, pcaps);

sys/dev/ixgbe/ixgbe_e610.c

1544

s32 ixgbe_get_link_status(struct ixgbe_hw *hw, bool *link_up)

sys/dev/ixgbe/ixgbe_e610.c

1548

if (!hw || !link_up)

sys/dev/ixgbe/ixgbe_e610.c

1551

if (hw->link.get_link_info) {

sys/dev/ixgbe/ixgbe_e610.c

1552

status = ixgbe_update_link_info(hw);

sys/dev/ixgbe/ixgbe_e610.c

1558

*link_up = hw->link.link_info.link_info & IXGBE_ACI_LINK_UP;

sys/dev/ixgbe/ixgbe_e610.c

1575

s32 ixgbe_aci_get_link_info(struct ixgbe_hw *hw, bool ena_lse,

sys/dev/ixgbe/ixgbe_e610.c

1587

if (!hw)

sys/dev/ixgbe/ixgbe_e610.c

1590

li_old = &hw->link.link_info_old;

sys/dev/ixgbe/ixgbe_e610.c

1591

li = &hw->link.link_info;

sys/dev/ixgbe/ixgbe_e610.c

1592

hw_fc_info = &hw->fc;

sys/dev/ixgbe/ixgbe_e610.c

1599

status = ixgbe_aci_send_cmd(hw, &desc, &link_data, sizeof(link_data));

sys/dev/ixgbe/ixgbe_e610.c

161

tmp_buf = (u32*)ixgbe_malloc(hw, tmp_buf_size);

sys/dev/ixgbe/ixgbe_e610.c

1641

hw->link.get_link_info = false;

sys/dev/ixgbe/ixgbe_e610.c

1656

s32 ixgbe_aci_set_event_mask(struct ixgbe_hw *hw, u8 port_num, u16 mask)

sys/dev/ixgbe/ixgbe_e610.c

1666

return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

1680

s32 ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask)

sys/dev/ixgbe/ixgbe_e610.c

1684

rc = ixgbe_aci_set_event_mask(hw, (u8)hw->bus.func, mask);

sys/dev/ixgbe/ixgbe_e610.c

1690

rc = ixgbe_aci_get_link_info(hw, activate, NULL);

sys/dev/ixgbe/ixgbe_e610.c

1709

s32 ixgbe_aci_get_netlist_node(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

1718

if (ixgbe_aci_send_cmd(hw, &desc, NULL, 0))

sys/dev/ixgbe/ixgbe_e610.c

1743

s32 ixgbe_find_netlist_node(struct ixgbe_hw *hw, u8 node_type_ctx,

sys/dev/ixgbe/ixgbe_e610.c

1759

status = ixgbe_aci_get_netlist_node(hw, &cmd,

sys/dev/ixgbe/ixgbe_e610.c

1791

s32 ixgbe_aci_read_i2c(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

1814

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

182

IXGBE_WRITE_REG(hw, PF_HIBA(i),

sys/dev/ixgbe/ixgbe_e610.c

1843

s32 ixgbe_aci_write_i2c(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

1871

return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

1883

s32 ixgbe_aci_set_port_id_led(struct ixgbe_hw *hw, bool orig_mode)

sys/dev/ixgbe/ixgbe_e610.c

1892

cmd->lport_num = (u8)hw->bus.func;

sys/dev/ixgbe/ixgbe_e610.c

190

IXGBE_WRITE_REG(hw, PF_HIDA(i),

sys/dev/ixgbe/ixgbe_e610.c

1900

return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

1915

s32 ixgbe_aci_set_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,

sys/dev/ixgbe/ixgbe_e610.c

1927

return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

1942

s32 ixgbe_aci_get_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,

sys/dev/ixgbe/ixgbe_e610.c

1954

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

196

hicr = IXGBE_READ_REG(hw, PF_HICR);

sys/dev/ixgbe/ixgbe_e610.c

1978

s32 ixgbe_aci_sff_eeprom(struct ixgbe_hw *hw, u16 lport, u8 bus_addr,

sys/dev/ixgbe/ixgbe_e610.c

198

IXGBE_WRITE_REG(hw, PF_HICR, hicr);

sys/dev/ixgbe/ixgbe_e610.c

2004

status = ixgbe_aci_send_cmd(hw, &desc, data, length);

sys/dev/ixgbe/ixgbe_e610.c

2017

s32 ixgbe_aci_prog_topo_dev_nvm(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

202

hicr = IXGBE_READ_REG(hw, PF_HICR);

sys/dev/ixgbe/ixgbe_e610.c

2029

return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

2045

s32 ixgbe_aci_read_topo_dev_nvm(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2065

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

2083

s32 ixgbe_acquire_nvm(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2089

fla = IXGBE_READ_REG(hw, GLNVM_FLA);

sys/dev/ixgbe/ixgbe_e610.c

2093

return ixgbe_acquire_res(hw, IXGBE_NVM_RES_ID, access,

sys/dev/ixgbe/ixgbe_e610.c

2103

void ixgbe_release_nvm(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

2108

fla = IXGBE_READ_REG(hw, GLNVM_FLA);

sys/dev/ixgbe/ixgbe_e610.c

2112

ixgbe_release_res(hw, IXGBE_NVM_RES_ID);

sys/dev/ixgbe/ixgbe_e610.c

213

hicr = IXGBE_READ_REG(hw, PF_HICR);

sys/dev/ixgbe/ixgbe_e610.c

2130

s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset,

sys/dev/ixgbe/ixgbe_e610.c

2155

return ixgbe_aci_send_cmd(hw, &desc, data, length);

sys/dev/ixgbe/ixgbe_e610.c

2167

s32 ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid)

sys/dev/ixgbe/ixgbe_e610.c

2177

status = ixgbe_aci_read_nvm(hw, 0, 2 * module_typeid + 2, 2, &len, true,

sys/dev/ixgbe/ixgbe_e610.c

2191

return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

2208

s32 ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid,

sys/dev/ixgbe/ixgbe_e610.c

2235

return ixgbe_aci_send_cmd(hw, &desc, data, length);

sys/dev/ixgbe/ixgbe_e610.c

224

raw_desc[i] = IXGBE_READ_REG(hw, PF_HIDA(i));

sys/dev/ixgbe/ixgbe_e610.c

2252

s32 ixgbe_aci_read_nvm_cfg(struct ixgbe_hw *hw, u8 cmd_flags,

sys/dev/ixgbe/ixgbe_e610.c

2267

status = ixgbe_aci_send_cmd(hw, &desc, data, buf_size);

sys/dev/ixgbe/ixgbe_e610.c

2287

s32 ixgbe_aci_write_nvm_cfg(struct ixgbe_hw *hw, u8 cmd_flags,

sys/dev/ixgbe/ixgbe_e610.c

2301

return ixgbe_aci_send_cmd(hw, &desc, data, buf_size);

sys/dev/ixgbe/ixgbe_e610.c

2314

s32 ixgbe_nvm_validate_checksum(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

232

raw_desc[i] = IXGBE_READ_REG(hw, PF_HIDA_2(i));

sys/dev/ixgbe/ixgbe_e610.c

2320

status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ);

sys/dev/ixgbe/ixgbe_e610.c

2329

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

2331

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

2353

s32 ixgbe_nvm_recalculate_checksum(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

2359

status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE);

sys/dev/ixgbe/ixgbe_e610.c

2368

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

2370

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

2397

s32 ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags,

sys/dev/ixgbe/ixgbe_e610.c

2411

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

2430

static u32 ixgbe_get_flash_bank_offset(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2434

struct ixgbe_bank_info *banks = &hw->flash.banks;

sys/dev/ixgbe/ixgbe_e610.c

2503

static s32 ixgbe_read_flash_module(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2510

start = ixgbe_get_flash_bank_offset(hw, bank, module);

sys/dev/ixgbe/ixgbe_e610.c

2515

status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ);

sys/dev/ixgbe/ixgbe_e610.c

2519

status = ixgbe_read_flat_nvm(hw, start + offset, &length, data, false);

sys/dev/ixgbe/ixgbe_e610.c

2521

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

2537

static s32 ixgbe_read_netlist_module(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2544

status = ixgbe_read_flash_module(hw, bank, E610_SR_NETLIST_BANK_PTR,

sys/dev/ixgbe/ixgbe_e610.c

2566

static s32 ixgbe_read_nvm_module(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2573

status = ixgbe_read_flash_module(hw, bank, E610_SR_1ST_NVM_BANK_PTR,

sys/dev/ixgbe/ixgbe_e610.c

258

hw->aci.last_status = (enum ixgbe_aci_err)desc->retval;

sys/dev/ixgbe/ixgbe_e610.c

2595

static s32 ixgbe_get_nvm_css_hdr_len(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2603

status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_HDR_LEN_L,

sys/dev/ixgbe/ixgbe_e610.c

2608

status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_HDR_LEN_H,

sys/dev/ixgbe/ixgbe_e610.c

2634

static s32 ixgbe_read_nvm_sr_copy(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2641

status = ixgbe_get_nvm_css_hdr_len(hw, bank, &hdr_len);

sys/dev/ixgbe/ixgbe_e610.c

2647

return ixgbe_read_nvm_module(hw, bank, hdr_len + offset, data);

sys/dev/ixgbe/ixgbe_e610.c

2661

s32 ixgbe_get_nvm_minsrevs(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2668

status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ);

sys/dev/ixgbe/ixgbe_e610.c

267

tmp_buf[i] = IXGBE_READ_REG(hw, PF_HIBA(i));

sys/dev/ixgbe/ixgbe_e610.c

2672

status = ixgbe_aci_read_nvm(hw, IXGBE_ACI_NVM_MINSREV_MOD_ID,

sys/dev/ixgbe/ixgbe_e610.c

2676

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

2716

s32 ixgbe_update_nvm_minsrevs(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2726

status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE);

sys/dev/ixgbe/ixgbe_e610.c

2731

status = ixgbe_aci_read_nvm(hw, IXGBE_ACI_NVM_MINSREV_MOD_ID, 0,

sys/dev/ixgbe/ixgbe_e610.c

275

ixgbe_free(hw, tmp_buf);

sys/dev/ixgbe/ixgbe_e610.c

2751

status = ixgbe_aci_update_nvm(hw, IXGBE_ACI_NVM_MINSREV_MOD_ID, 0,

sys/dev/ixgbe/ixgbe_e610.c

2758

status = ixgbe_nvm_write_activate(hw, 0, NULL);

sys/dev/ixgbe/ixgbe_e610.c

2761

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

2777

static s32 ixgbe_get_nvm_srev(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2783

status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_SREV_L, &srev_l);

sys/dev/ixgbe/ixgbe_e610.c

2787

status = ixgbe_read_nvm_module(hw, bank, IXGBE_NVM_CSS_SREV_H, &srev_h);

sys/dev/ixgbe/ixgbe_e610.c

2807

static s32 ixgbe_get_nvm_ver_info(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2814

status = ixgbe_read_nvm_sr_copy(hw, bank,

sys/dev/ixgbe/ixgbe_e610.c

2823

status = ixgbe_read_nvm_sr_copy(hw, bank, E610_SR_NVM_EETRACK_LO,

sys/dev/ixgbe/ixgbe_e610.c

2828

status = ixgbe_read_nvm_sr_copy(hw, bank, E610_SR_NVM_EETRACK_HI,

sys/dev/ixgbe/ixgbe_e610.c

2836

status = ixgbe_get_nvm_srev(hw, bank, &nvm->srev);

sys/dev/ixgbe/ixgbe_e610.c

2852

s32 ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm)

sys/dev/ixgbe/ixgbe_e610.c

2854

return ixgbe_get_nvm_ver_info(hw, IXGBE_INACTIVE_FLASH_BANK, nvm);

sys/dev/ixgbe/ixgbe_e610.c

2867

s32 ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm)

sys/dev/ixgbe/ixgbe_e610.c

2869

return ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK, nvm);

sys/dev/ixgbe/ixgbe_e610.c

2884

static s32 ixgbe_get_netlist_info(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2892

status = ixgbe_read_netlist_module(hw, bank, IXGBE_NETLIST_TYPE_OFFSET,

sys/dev/ixgbe/ixgbe_e610.c

2901

status = ixgbe_read_netlist_module(hw, bank, IXGBE_LINK_TOPO_MODULE_LEN,

sys/dev/ixgbe/ixgbe_e610.c

2913

status = ixgbe_read_netlist_module(hw, bank, IXGBE_LINK_TOPO_NODE_COUNT,

sys/dev/ixgbe/ixgbe_e610.c

2919

id_blk = (u16 *)ixgbe_calloc(hw, IXGBE_NETLIST_ID_BLK_SIZE,

sys/dev/ixgbe/ixgbe_e610.c

2925

status = ixgbe_read_flash_module(hw, bank, E610_SR_NETLIST_BANK_PTR,

sys/dev/ixgbe/ixgbe_e610.c

294

s32 ixgbe_aci_send_cmd(struct ixgbe_hw *hw, struct ixgbe_aci_desc *desc,

sys/dev/ixgbe/ixgbe_e610.c

2949

ixgbe_free(hw, id_blk);

sys/dev/ixgbe/ixgbe_e610.c

2965

s32 ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

2968

return ixgbe_get_netlist_info(hw, IXGBE_INACTIVE_FLASH_BANK, netlist);

sys/dev/ixgbe/ixgbe_e610.c

2987

static s32 ixgbe_read_sr_pointer(struct ixgbe_hw *hw, u16 offset, u32 *pointer)

sys/dev/ixgbe/ixgbe_e610.c

2992

status = ixgbe_read_ee_aci_E610(hw, offset, &value);

sys/dev/ixgbe/ixgbe_e610.c

3020

static s32 ixgbe_read_sr_area_size(struct ixgbe_hw *hw, u16 offset, u32 *size)

sys/dev/ixgbe/ixgbe_e610.c

3025

status = ixgbe_read_ee_aci_E610(hw, offset, &value);

sys/dev/ixgbe/ixgbe_e610.c

3045

static s32 ixgbe_discover_flash_size(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

3050

status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ);

sys/dev/ixgbe/ixgbe_e610.c

3059

status = ixgbe_read_flat_nvm(hw, offset, &len, &data, false);

sys/dev/ixgbe/ixgbe_e610.c

3061

hw->aci.last_status == IXGBE_ACI_RC_EINVAL) {

sys/dev/ixgbe/ixgbe_e610.c

3072

hw->flash.flash_size = max_size;

sys/dev/ixgbe/ixgbe_e610.c

3075

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

3092

static s32 ixgbe_determine_active_flash_banks(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

3094

struct ixgbe_bank_info *banks = &hw->flash.banks;

sys/dev/ixgbe/ixgbe_e610.c

3098

status = ixgbe_read_ee_aci_E610(hw, E610_SR_NVM_CTRL_WORD, &ctrl_word);

sys/dev/ixgbe/ixgbe_e610.c

311

buf_cpy = (u8 *)ixgbe_malloc(hw, buf_size);

sys/dev/ixgbe/ixgbe_e610.c

3124

status = ixgbe_read_sr_pointer(hw, E610_SR_1ST_NVM_BANK_PTR,

sys/dev/ixgbe/ixgbe_e610.c

3130

status = ixgbe_read_sr_area_size(hw, E610_SR_NVM_BANK_SIZE,

sys/dev/ixgbe/ixgbe_e610.c

3136

status = ixgbe_read_sr_pointer(hw, E610_SR_1ST_OROM_BANK_PTR,

sys/dev/ixgbe/ixgbe_e610.c

3142

status = ixgbe_read_sr_area_size(hw, E610_SR_OROM_BANK_SIZE,

sys/dev/ixgbe/ixgbe_e610.c

3148

status = ixgbe_read_sr_pointer(hw, E610_SR_NETLIST_BANK_PTR,

sys/dev/ixgbe/ixgbe_e610.c

3154

status = ixgbe_read_sr_area_size(hw, E610_SR_NETLIST_BANK_SIZE,

sys/dev/ixgbe/ixgbe_e610.c

3172

s32 ixgbe_init_nvm(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

3174

struct ixgbe_flash_info *flash = &hw->flash;

sys/dev/ixgbe/ixgbe_e610.c

3181

gens_stat = IXGBE_READ_REG(hw, GLNVM_GENS);

sys/dev/ixgbe/ixgbe_e610.c

3188

fla = IXGBE_READ_REG(hw, GLNVM_FLA);

sys/dev/ixgbe/ixgbe_e610.c

3197

status = ixgbe_discover_flash_size(hw);

sys/dev/ixgbe/ixgbe_e610.c

320

ixgbe_acquire_lock(&hw->aci.lock);

sys/dev/ixgbe/ixgbe_e610.c

3202

status = ixgbe_determine_active_flash_banks(hw);

sys/dev/ixgbe/ixgbe_e610.c

3207

status = ixgbe_get_nvm_ver_info(hw, IXGBE_ACTIVE_FLASH_BANK,

sys/dev/ixgbe/ixgbe_e610.c

321

status = ixgbe_aci_send_cmd_execute(hw, desc, buf, buf_size);

sys/dev/ixgbe/ixgbe_e610.c

3214

status = ixgbe_get_netlist_info(hw, IXGBE_ACTIVE_FLASH_BANK,

sys/dev/ixgbe/ixgbe_e610.c

322

last_status = hw->aci.last_status;

sys/dev/ixgbe/ixgbe_e610.c

3228

s32 ixgbe_sanitize_operate(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

323

ixgbe_release_lock(&hw->aci.lock);

sys/dev/ixgbe/ixgbe_e610.c

3236

status = ixgbe_sanitize_nvm(hw, cmd_flags, &values);

sys/dev/ixgbe/ixgbe_e610.c

3260

s32 ixgbe_sanitize_nvm(struct ixgbe_hw *hw, u8 cmd_flags, u8 *values)

sys/dev/ixgbe/ixgbe_e610.c

3270

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

3287

s32 ixgbe_read_sr_word_aci(struct ixgbe_hw *hw, u16 offset, u16 *data)

sys/dev/ixgbe/ixgbe_e610.c

3293

status = ixgbe_read_flat_nvm(hw, offset * sizeof(u16), &bytes,

sys/dev/ixgbe/ixgbe_e610.c

3314

s32 ixgbe_read_sr_buf_aci(struct ixgbe_hw *hw, u16 offset, u16 *words,

sys/dev/ixgbe/ixgbe_e610.c

3320

status = ixgbe_read_flat_nvm(hw, offset * 2, &bytes, (u8 *)data, true);

sys/dev/ixgbe/ixgbe_e610.c

3348

s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length,

sys/dev/ixgbe/ixgbe_e610.c

3360

(hw->eeprom.word_size * 2u))) {

sys/dev/ixgbe/ixgbe_e610.c

337

ixgbe_free(hw, buf_cpy);

sys/dev/ixgbe/ixgbe_e610.c

3382

status = ixgbe_aci_read_nvm(hw, IXGBE_ACI_NVM_START_POINT,

sys/dev/ixgbe/ixgbe_e610.c

3412

static s32 ixgbe_check_sr_access_params(struct ixgbe_hw *hw, u32 offset,

sys/dev/ixgbe/ixgbe_e610.c

3415

if ((offset + words) > hw->eeprom.word_size) {

sys/dev/ixgbe/ixgbe_e610.c

3447

s32 ixgbe_write_sr_word_aci(struct ixgbe_hw *hw, u32 offset, const u16 *data)

sys/dev/ixgbe/ixgbe_e610.c

3452

status = ixgbe_check_sr_access_params(hw, offset, 1);

sys/dev/ixgbe/ixgbe_e610.c

3454

status = ixgbe_aci_update_nvm(hw, 0, BYTES_PER_WORD * offset,

sys/dev/ixgbe/ixgbe_e610.c

3474

s32 ixgbe_write_sr_buf_aci(struct ixgbe_hw *hw, u32 offset, u16 words,

sys/dev/ixgbe/ixgbe_e610.c

3482

vmem = ixgbe_calloc(hw, words, sizeof(u16));

sys/dev/ixgbe/ixgbe_e610.c

3493

status = ixgbe_check_sr_access_params(hw, offset, words);

sys/dev/ixgbe/ixgbe_e610.c

3495

status = ixgbe_aci_update_nvm(hw, 0, BYTES_PER_WORD * offset,

sys/dev/ixgbe/ixgbe_e610.c

3499

ixgbe_free(hw, vmem);

sys/dev/ixgbe/ixgbe_e610.c

351

bool ixgbe_aci_check_event_pending(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

3517

s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0,

sys/dev/ixgbe/ixgbe_e610.c

3532

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

3552

s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0,

sys/dev/ixgbe/ixgbe_e610.c

356

ep_bit_mask = hw->bus.func ? GL_FWSTS_EP_PF1 : GL_FWSTS_EP_PF0;

sys/dev/ixgbe/ixgbe_e610.c

3568

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

359

fwsts = IXGBE_READ_REG(hw, GL_FWSTS);

sys/dev/ixgbe/ixgbe_e610.c

3591

s32 ixgbe_aci_alternate_write_done(struct ixgbe_hw *hw, u8 bios_mode,

sys/dev/ixgbe/ixgbe_e610.c

3606

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

3623

s32 ixgbe_aci_alternate_clear(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

3631

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

3653

s32 ixgbe_aci_get_internal_data(struct ixgbe_hw *hw, u16 cluster_id,

sys/dev/ixgbe/ixgbe_e610.c

3675

status = ixgbe_aci_send_cmd(hw, &desc, buf, buf_size);

sys/dev/ixgbe/ixgbe_e610.c

3742

static s32 ixgbe_nvm_access_read(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

3759

data->regval = IXGBE_READ_REG(hw, cmd->offset);

sys/dev/ixgbe/ixgbe_e610.c

376

s32 ixgbe_aci_get_event(struct ixgbe_hw *hw, struct ixgbe_aci_event *e,

sys/dev/ixgbe/ixgbe_e610.c

3775

static s32 ixgbe_nvm_access_write(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

3798

IXGBE_WRITE_REG(hw, cmd->offset, data->regval);

sys/dev/ixgbe/ixgbe_e610.c

3819

s32 ixgbe_handle_nvm_access(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

3825

return ixgbe_nvm_access_read(hw, cmd, data);

sys/dev/ixgbe/ixgbe_e610.c

3827

return ixgbe_nvm_access_write(hw, cmd, data);

sys/dev/ixgbe/ixgbe_e610.c

3840

static void ixgbe_fwlog_cache_cfg(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

3843

hw->fwlog_cfg = *cfg;

sys/dev/ixgbe/ixgbe_e610.c

385

ixgbe_acquire_lock(&hw->aci.lock);

sys/dev/ixgbe/ixgbe_e610.c

3858

static bool ixgbe_fwlog_valid_module_entries(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

3864

UNREFERENCED_1PARAMETER(hw);

sys/dev/ixgbe/ixgbe_e610.c

388

if (!ixgbe_aci_check_event_pending(hw)) {

sys/dev/ixgbe/ixgbe_e610.c

3898

static bool ixgbe_fwlog_valid_cfg(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

3910

if (!ixgbe_fwlog_valid_module_entries(hw, cfg->module_entries,

sys/dev/ixgbe/ixgbe_e610.c

3929

s32 ixgbe_fwlog_init(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg)

sys/dev/ixgbe/ixgbe_e610.c

3931

if (!ixgbe_fwlog_valid_cfg(hw, cfg))

sys/dev/ixgbe/ixgbe_e610.c

3934

ixgbe_fwlog_cache_cfg(hw, cfg);

sys/dev/ixgbe/ixgbe_e610.c

395

status = ixgbe_aci_send_cmd_execute(hw, &desc, e->msg_buf, e->buf_len);

sys/dev/ixgbe/ixgbe_e610.c

3951

static s32 ixgbe_aci_fwlog_set(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

3984

status = ixgbe_aci_send_cmd(hw, &desc, fw_modules,

sys/dev/ixgbe/ixgbe_e610.c

4000

bool ixgbe_fwlog_supported(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4002

return hw->fwlog_support_ena;

sys/dev/ixgbe/ixgbe_e610.c

4020

s32 ixgbe_fwlog_set(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg)

sys/dev/ixgbe/ixgbe_e610.c

4024

if (!ixgbe_fwlog_supported(hw))

sys/dev/ixgbe/ixgbe_e610.c

4027

if (!ixgbe_fwlog_valid_cfg(hw, cfg))

sys/dev/ixgbe/ixgbe_e610.c

4030

status = ixgbe_aci_fwlog_set(hw, cfg->module_entries,

sys/dev/ixgbe/ixgbe_e610.c

4034

ixgbe_fwlog_cache_cfg(hw, cfg);

sys/dev/ixgbe/ixgbe_e610.c

4048

static void ixgbe_fwlog_update_cached_entries(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

4060

&hw->fwlog_cfg.module_entries[j];

sys/dev/ixgbe/ixgbe_e610.c

4084

s32 ixgbe_fwlog_update_modules(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

4091

if (!ixgbe_fwlog_supported(hw))

sys/dev/ixgbe/ixgbe_e610.c

4097

if (!ixgbe_fwlog_valid_module_entries(hw, entries, num_entries))

sys/dev/ixgbe/ixgbe_e610.c

4100

status = ixgbe_fwlog_get(hw, &cfg);

sys/dev/ixgbe/ixgbe_e610.c

4104

status = ixgbe_aci_fwlog_set(hw, entries, num_entries, cfg.options,

sys/dev/ixgbe/ixgbe_e610.c

4107

ixgbe_fwlog_update_cached_entries(hw, entries, num_entries);

sys/dev/ixgbe/ixgbe_e610.c

412

*pending = ixgbe_aci_check_event_pending(hw);

sys/dev/ixgbe/ixgbe_e610.c

4122

static s32 ixgbe_aci_fwlog_register(struct ixgbe_hw *hw, bool reg)

sys/dev/ixgbe/ixgbe_e610.c

4131

return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

4143

s32 ixgbe_fwlog_register(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4147

if (!ixgbe_fwlog_supported(hw))

sys/dev/ixgbe/ixgbe_e610.c

4150

status = ixgbe_aci_fwlog_register(hw, true);

sys/dev/ixgbe/ixgbe_e610.c

4153

hw->fwlog_cfg.options |= IXGBE_FWLOG_OPTION_IS_REGISTERED;

sys/dev/ixgbe/ixgbe_e610.c

416

ixgbe_release_lock(&hw->aci.lock);

sys/dev/ixgbe/ixgbe_e610.c

4166

s32 ixgbe_fwlog_unregister(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4170

if (!ixgbe_fwlog_supported(hw))

sys/dev/ixgbe/ixgbe_e610.c

4173

status = ixgbe_aci_fwlog_register(hw, false);

sys/dev/ixgbe/ixgbe_e610.c

4175

hw->fwlog_cfg.options &= ~IXGBE_FWLOG_OPTION_IS_REGISTERED;

sys/dev/ixgbe/ixgbe_e610.c

4190

static s32 ixgbe_aci_fwlog_get(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg)

sys/dev/ixgbe/ixgbe_e610.c

4206

buf = (u8 *)ixgbe_malloc(hw, IXGBE_ACI_MAX_BUFFER_SIZE);

sys/dev/ixgbe/ixgbe_e610.c

4210

status = ixgbe_aci_send_cmd(hw, &desc, buf, IXGBE_ACI_MAX_BUFFER_SIZE);

sys/dev/ixgbe/ixgbe_e610.c

4240

ixgbe_free(hw, buf);

sys/dev/ixgbe/ixgbe_e610.c

4256

void ixgbe_fwlog_set_support_ena(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4261

hw->fwlog_support_ena = false;

sys/dev/ixgbe/ixgbe_e610.c

4267

status = ixgbe_aci_fwlog_get(hw, &cfg);

sys/dev/ixgbe/ixgbe_e610.c

4269

hw->fwlog_support_ena = true;

sys/dev/ixgbe/ixgbe_e610.c

4281

s32 ixgbe_fwlog_get(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg)

sys/dev/ixgbe/ixgbe_e610.c

4285

if (!ixgbe_fwlog_supported(hw))

sys/dev/ixgbe/ixgbe_e610.c

4291

status = ixgbe_aci_fwlog_get(hw, cfg);

sys/dev/ixgbe/ixgbe_e610.c

4295

ixgbe_fwlog_cache_cfg(hw, cfg);

sys/dev/ixgbe/ixgbe_e610.c

4309

void ixgbe_fwlog_event_dump(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

4312

if (!ixgbe_fwlog_supported(hw))

sys/dev/ixgbe/ixgbe_e610.c

4315

ixgbe_info_fwlog(hw, 32, 1, (u8 *)buf,

sys/dev/ixgbe/ixgbe_e610.c

4330

s32 ixgbe_aci_set_health_status_config(struct ixgbe_hw *hw, u8 event_source)

sys/dev/ixgbe/ixgbe_e610.c

4342

return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

4354

s32 ixgbe_init_ops_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4356

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_e610.c

4357

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_e610.c

4358

struct ixgbe_phy_info *phy = &hw->phy;

sys/dev/ixgbe/ixgbe_e610.c

4361

ret_val = ixgbe_init_ops_X550(hw);

sys/dev/ixgbe/ixgbe_e610.c

4392

if (hw->device_id == IXGBE_DEV_ID_E610_2_5G_T)

sys/dev/ixgbe/ixgbe_e610.c

4413

hw->mac.ops.set_lan_id(hw);

sys/dev/ixgbe/ixgbe_e610.c

4427

s32 ixgbe_reset_hw_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4429

u32 swfw_mask = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/ixgbe_e610.c

4436

status = hw->mac.ops.stop_adapter(hw);

sys/dev/ixgbe/ixgbe_e610.c

4441

ixgbe_clear_tx_pending(hw);

sys/dev/ixgbe/ixgbe_e610.c

4443

status = hw->phy.ops.init(hw);

sys/dev/ixgbe/ixgbe_e610.c

4448

status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_e610.c

445

s32 ixgbe_aci_get_fw_ver(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4455

ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);

sys/dev/ixgbe/ixgbe_e610.c

4456

IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);

sys/dev/ixgbe/ixgbe_e610.c

4457

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_e610.c

4458

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_e610.c

4463

ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);

sys/dev/ixgbe/ixgbe_e610.c

4480

if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {

sys/dev/ixgbe/ixgbe_e610.c

4481

hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;

sys/dev/ixgbe/ixgbe_e610.c

4486

IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT);

sys/dev/ixgbe/ixgbe_e610.c

4489

hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);

sys/dev/ixgbe/ixgbe_e610.c

4496

hw->mac.num_rar_entries = 128;

sys/dev/ixgbe/ixgbe_e610.c

4497

hw->mac.ops.init_rx_addrs(hw);

sys/dev/ixgbe/ixgbe_e610.c

4512

s32 ixgbe_start_hw_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4516

ret_val = hw->mac.ops.get_fw_version(hw);

sys/dev/ixgbe/ixgbe_e610.c

4520

ret_val = ixgbe_start_hw_generic(hw);

sys/dev/ixgbe/ixgbe_e610.c

4524

ixgbe_start_hw_gen2(hw);

sys/dev/ixgbe/ixgbe_e610.c

4541

enum ixgbe_media_type ixgbe_get_media_type_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4548

rc = ixgbe_update_link_info(hw);

sys/dev/ixgbe/ixgbe_e610.c

455

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

4558

if (!(hw->link.link_info.link_info & IXGBE_ACI_LINK_UP) &&

sys/dev/ixgbe/ixgbe_e610.c

4559

(hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE)) {

sys/dev/ixgbe/ixgbe_e610.c

4561

rc = ixgbe_aci_get_phy_caps(hw, false,

sys/dev/ixgbe/ixgbe_e610.c

4573

hw->link.link_info.phy_type_high = phy_mask;

sys/dev/ixgbe/ixgbe_e610.c

4574

hw->link.link_info.phy_type_low = 0;

sys/dev/ixgbe/ixgbe_e610.c

458

hw->fw_branch = resp->fw_branch;

sys/dev/ixgbe/ixgbe_e610.c

4586

hw->link.link_info.phy_type_high = 0;

sys/dev/ixgbe/ixgbe_e610.c

4587

hw->link.link_info.phy_type_low = phy_mask;

sys/dev/ixgbe/ixgbe_e610.c

459

hw->fw_maj_ver = resp->fw_major;

sys/dev/ixgbe/ixgbe_e610.c

4596

hw->phy.media_type = ixgbe_get_media_type_from_phy_type(hw);

sys/dev/ixgbe/ixgbe_e610.c

4598

return hw->phy.media_type;

sys/dev/ixgbe/ixgbe_e610.c

460

hw->fw_min_ver = resp->fw_minor;

sys/dev/ixgbe/ixgbe_e610.c

4609

u64 ixgbe_get_supported_physical_layer_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

461

hw->fw_patch = resp->fw_patch;

sys/dev/ixgbe/ixgbe_e610.c

4616

rc = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_TOPO_CAP_MEDIA,

sys/dev/ixgbe/ixgbe_e610.c

462

hw->fw_build = IXGBE_LE32_TO_CPU(resp->fw_build);

sys/dev/ixgbe/ixgbe_e610.c

463

hw->api_branch = resp->api_branch;

sys/dev/ixgbe/ixgbe_e610.c

464

hw->api_maj_ver = resp->api_major;

sys/dev/ixgbe/ixgbe_e610.c

465

hw->api_min_ver = resp->api_minor;

sys/dev/ixgbe/ixgbe_e610.c

466

hw->api_patch = resp->api_patch;

sys/dev/ixgbe/ixgbe_e610.c

4662

s32 ixgbe_setup_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_e610.c

4666

return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait);

sys/dev/ixgbe/ixgbe_e610.c

4681

s32 ixgbe_check_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_e610.c

4693

hw->link.get_link_info = true;

sys/dev/ixgbe/ixgbe_e610.c

4696

rc = ixgbe_get_link_status(hw, link_up);

sys/dev/ixgbe/ixgbe_e610.c

4702

for (i = 0; i < hw->mac.max_link_up_time; i++) {

sys/dev/ixgbe/ixgbe_e610.c

4704

hw->link.get_link_info = true;

sys/dev/ixgbe/ixgbe_e610.c

4705

rc = ixgbe_get_link_status(hw, link_up);

sys/dev/ixgbe/ixgbe_e610.c

4718

switch (hw->link.link_info.link_speed) {

sys/dev/ixgbe/ixgbe_e610.c

4758

s32 ixgbe_get_link_capabilities_E610(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

4766

*speed = hw->phy.speeds_supported;

sys/dev/ixgbe/ixgbe_e610.c

4781

s32 ixgbe_cfg_phy_fc(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

4796

ixgbe_malloc(hw, sizeof(*pcaps));

sys/dev/ixgbe/ixgbe_e610.c

48

void ixgbe_init_aci(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4804

status = ixgbe_aci_get_phy_caps(hw, false,

sys/dev/ixgbe/ixgbe_e610.c

483

s32 ixgbe_aci_send_driver_ver(struct ixgbe_hw *hw, struct ixgbe_driver_ver *dv)

sys/dev/ixgbe/ixgbe_e610.c

4837

ixgbe_free(hw, pcaps);

sys/dev/ixgbe/ixgbe_e610.c

4849

s32 ixgbe_setup_fc_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4856

status = ixgbe_aci_get_phy_caps(hw, false,

sys/dev/ixgbe/ixgbe_e610.c

4864

status = ixgbe_cfg_phy_fc(hw, &cfg, hw->fc.requested_mode);

sys/dev/ixgbe/ixgbe_e610.c

4872

status = ixgbe_aci_set_phy_cfg(hw, &cfg);

sys/dev/ixgbe/ixgbe_e610.c

4886

void ixgbe_fc_autoneg_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4892

status = ixgbe_aci_get_link_info(hw, false, NULL);

sys/dev/ixgbe/ixgbe_e610.c

4898

if (!(hw->link.link_info.link_info & IXGBE_ACI_LINK_UP)) {

sys/dev/ixgbe/ixgbe_e610.c

4904

if (!(hw->link.link_info.an_info & IXGBE_ACI_AN_COMPLETED)) {

sys/dev/ixgbe/ixgbe_e610.c

4911

hw->fc.fc_was_autonegged = true;

sys/dev/ixgbe/ixgbe_e610.c

4913

hw->fc.fc_was_autonegged = false;

sys/dev/ixgbe/ixgbe_e610.c

4914

hw->fc.current_mode = hw->fc.requested_mode;

sys/dev/ixgbe/ixgbe_e610.c

4937

s32 ixgbe_set_fw_drv_ver_E610(struct ixgbe_hw *hw, u8 maj, u8 minor, u8 build,

sys/dev/ixgbe/ixgbe_e610.c

4956

return ixgbe_aci_send_driver_ver(hw, &dv);

sys/dev/ixgbe/ixgbe_e610.c

4967

void ixgbe_disable_rx_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

4973

rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);

sys/dev/ixgbe/ixgbe_e610.c

4978

pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC);

sys/dev/ixgbe/ixgbe_e610.c

4981

IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc);

sys/dev/ixgbe/ixgbe_e610.c

4982

hw->mac.set_lben = true;

sys/dev/ixgbe/ixgbe_e610.c

4984

hw->mac.set_lben = false;

sys/dev/ixgbe/ixgbe_e610.c

4987

status = ixgbe_aci_disable_rxen(hw);

sys/dev/ixgbe/ixgbe_e610.c

4991

rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);

sys/dev/ixgbe/ixgbe_e610.c

4994

IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);

sys/dev/ixgbe/ixgbe_e610.c

50

ixgbe_init_lock(&hw->aci.lock);

sys/dev/ixgbe/ixgbe_e610.c

5009

s32 ixgbe_setup_eee_E610(struct ixgbe_hw *hw, bool enable_eee)

sys/dev/ixgbe/ixgbe_e610.c

5016

status = ixgbe_aci_get_phy_caps(hw, false,

sys/dev/ixgbe/ixgbe_e610.c

5028

if (hw->phy.eee_speeds_advertised & IXGBE_LINK_SPEED_100_FULL)

sys/dev/ixgbe/ixgbe_e610.c

5030

if (hw->phy.eee_speeds_advertised & IXGBE_LINK_SPEED_1GB_FULL)

sys/dev/ixgbe/ixgbe_e610.c

5032

if (hw->phy.eee_speeds_advertised & IXGBE_LINK_SPEED_2_5GB_FULL)

sys/dev/ixgbe/ixgbe_e610.c

5034

if (hw->phy.eee_speeds_advertised & IXGBE_LINK_SPEED_5GB_FULL)

sys/dev/ixgbe/ixgbe_e610.c

5036

if (hw->phy.eee_speeds_advertised & IXGBE_LINK_SPEED_10GB_FULL)

sys/dev/ixgbe/ixgbe_e610.c

5043

status = ixgbe_aci_set_phy_cfg(hw, &phy_cfg);

sys/dev/ixgbe/ixgbe_e610.c

5057

bool ixgbe_fw_recovery_mode_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5059

u32 fwsm = IXGBE_READ_REG(hw, GL_MNG_FWSM);

sys/dev/ixgbe/ixgbe_e610.c

507

return ixgbe_aci_send_cmd(hw, &desc, dv->driver_string, len);

sys/dev/ixgbe/ixgbe_e610.c

5073

bool ixgbe_fw_rollback_mode_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5075

u32 fwsm = IXGBE_READ_REG(hw, GL_MNG_FWSM);

sys/dev/ixgbe/ixgbe_e610.c

5089

bool ixgbe_get_fw_tsam_mode_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5091

u32 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_X550EM_a);

sys/dev/ixgbe/ixgbe_e610.c

5105

s32 ixgbe_init_phy_ops_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5107

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_e610.c

5108

struct ixgbe_phy_info *phy = &hw->phy;

sys/dev/ixgbe/ixgbe_e610.c

5125

if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper)

sys/dev/ixgbe/ixgbe_e610.c

5137

ret_val = phy->ops.identify(hw);

sys/dev/ixgbe/ixgbe_e610.c

5154

s32 ixgbe_identify_phy_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5160

hw->phy.type = ixgbe_phy_fw;

sys/dev/ixgbe/ixgbe_e610.c

5162

rc = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_TOPO_CAP_MEDIA,

sys/dev/ixgbe/ixgbe_e610.c

5170

rc = ixgbe_aci_get_phy_caps(hw, false,

sys/dev/ixgbe/ixgbe_e610.c

5178

hw->phy.speeds_supported = IXGBE_LINK_SPEED_UNKNOWN;

sys/dev/ixgbe/ixgbe_e610.c

5182

hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10_FULL;

sys/dev/ixgbe/ixgbe_e610.c

5186

hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL;

sys/dev/ixgbe/ixgbe_e610.c

5193

hw->phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL;

sys/dev/ixgbe/ixgbe_e610.c

5202

hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL;

sys/dev/ixgbe/ixgbe_e610.c

5209

if (!hw->phy.autoneg_advertised &&

sys/dev/ixgbe/ixgbe_e610.c

5210

hw->device_id != IXGBE_DEV_ID_E610_2_5G_T)

sys/dev/ixgbe/ixgbe_e610.c

5211

hw->phy.autoneg_advertised = hw->phy.speeds_supported;

sys/dev/ixgbe/ixgbe_e610.c

5218

hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL;

sys/dev/ixgbe/ixgbe_e610.c

5220

if (!hw->phy.autoneg_advertised &&

sys/dev/ixgbe/ixgbe_e610.c

5221

hw->device_id == IXGBE_DEV_ID_E610_2_5G_T)

sys/dev/ixgbe/ixgbe_e610.c

5222

hw->phy.autoneg_advertised = hw->phy.speeds_supported;

sys/dev/ixgbe/ixgbe_e610.c

5227

hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL;

sys/dev/ixgbe/ixgbe_e610.c

5230

memcpy(&hw->phy.id, pcaps.phy_id_oui, sizeof(u32));

sys/dev/ixgbe/ixgbe_e610.c

5243

s32 ixgbe_identify_module_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5249

rc = ixgbe_update_link_info(hw);

sys/dev/ixgbe/ixgbe_e610.c

5254

(hw->link.link_info.link_info &

sys/dev/ixgbe/ixgbe_e610.c

5258

hw->phy.sfp_type = ixgbe_sfp_type_unknown;

sys/dev/ixgbe/ixgbe_e610.c

5261

module_type = hw->link.link_info.module_type[IXGBE_ACI_MOD_TYPE_IDENT];

sys/dev/ixgbe/ixgbe_e610.c

5265

hw->phy.sfp_type = ixgbe_sfp_type_da_cu;

sys/dev/ixgbe/ixgbe_e610.c

5267

hw->phy.sfp_type = ixgbe_sfp_type_sr;

sys/dev/ixgbe/ixgbe_e610.c

527

ixgbe_aci_req_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res,

sys/dev/ixgbe/ixgbe_e610.c

5270

hw->phy.sfp_type = ixgbe_sfp_type_lr;

sys/dev/ixgbe/ixgbe_e610.c

5274

hw->phy.sfp_type = ixgbe_sfp_type_not_present;

sys/dev/ixgbe/ixgbe_e610.c

5289

s32 ixgbe_setup_phy_link_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5297

rc = ixgbe_aci_get_link_info(hw, false, NULL);

sys/dev/ixgbe/ixgbe_e610.c

5303

if (!(hw->link.link_info.link_info & IXGBE_ACI_MEDIA_AVAILABLE))

sys/dev/ixgbe/ixgbe_e610.c

5306

rc = ixgbe_aci_get_phy_caps(hw, false, rmode, &pcaps);

sys/dev/ixgbe/ixgbe_e610.c

5315

rc = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_ACTIVE_CFG,

sys/dev/ixgbe/ixgbe_e610.c

5326

if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL) {

sys/dev/ixgbe/ixgbe_e610.c

5330

if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) {

sys/dev/ixgbe/ixgbe_e610.c

5335

if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) {

sys/dev/ixgbe/ixgbe_e610.c

5343

if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL) {

sys/dev/ixgbe/ixgbe_e610.c

5350

if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) {

sys/dev/ixgbe/ixgbe_e610.c

5355

if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) {

sys/dev/ixgbe/ixgbe_e610.c

5376

rc = ixgbe_aci_set_phy_cfg(hw, &pcfg);

sys/dev/ixgbe/ixgbe_e610.c

5393

s32 ixgbe_get_phy_firmware_version_E610(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

5402

status = ixgbe_aci_get_phy_caps(hw, false,

sys/dev/ixgbe/ixgbe_e610.c

5426

s32 ixgbe_read_i2c_sff8472_E610(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_e610.c

5429

return ixgbe_aci_sff_eeprom(hw, 0, IXGBE_I2C_EEPROM_DEV_ADDR2,

sys/dev/ixgbe/ixgbe_e610.c

5445

s32 ixgbe_read_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_e610.c

5448

return ixgbe_aci_sff_eeprom(hw, 0, IXGBE_I2C_EEPROM_DEV_ADDR,

sys/dev/ixgbe/ixgbe_e610.c

545

status = ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

5464

s32 ixgbe_write_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_e610.c

5467

return ixgbe_aci_sff_eeprom(hw, 0, IXGBE_I2C_EEPROM_DEV_ADDR,

sys/dev/ixgbe/ixgbe_e610.c

5481

s32 ixgbe_check_overtemp_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5488

if (!hw)

sys/dev/ixgbe/ixgbe_e610.c

5495

status = ixgbe_aci_send_cmd(hw, &desc, &link_data, sizeof(link_data));

sys/dev/ixgbe/ixgbe_e610.c

5519

s32 ixgbe_set_phy_power_E610(struct ixgbe_hw *hw, bool on)

sys/dev/ixgbe/ixgbe_e610.c

5525

status = ixgbe_aci_get_phy_caps(hw, false,

sys/dev/ixgbe/ixgbe_e610.c

553

if (!status || hw->aci.last_status == IXGBE_ACI_RC_EBUSY)

sys/dev/ixgbe/ixgbe_e610.c

5545

status = ixgbe_aci_set_phy_cfg(hw, &phy_cfg);

sys/dev/ixgbe/ixgbe_e610.c

5560

s32 ixgbe_enter_lplu_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5566

status = ixgbe_aci_get_phy_caps(hw, false,

sys/dev/ixgbe/ixgbe_e610.c

5575

status = ixgbe_aci_set_phy_cfg(hw, &phy_cfg);

sys/dev/ixgbe/ixgbe_e610.c

5589

s32 ixgbe_init_eeprom_params_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5591

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_e610.c

5598

gens_stat = IXGBE_READ_REG(hw, GLNVM_GENS);

sys/dev/ixgbe/ixgbe_e610.c

5625

s32 ixgbe_read_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 *data)

sys/dev/ixgbe/ixgbe_e610.c

5629

if (hw->eeprom.type == ixgbe_eeprom_uninitialized) {

sys/dev/ixgbe/ixgbe_e610.c

5630

status = ixgbe_init_eeprom_params(hw);

sys/dev/ixgbe/ixgbe_e610.c

5635

status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ);

sys/dev/ixgbe/ixgbe_e610.c

5639

status = ixgbe_read_sr_word_aci(hw, offset, data);

sys/dev/ixgbe/ixgbe_e610.c

5640

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

5659

s32 ixgbe_read_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_e610.c

5664

if (hw->eeprom.type == ixgbe_eeprom_uninitialized) {

sys/dev/ixgbe/ixgbe_e610.c

5665

status = ixgbe_init_eeprom_params(hw);

sys/dev/ixgbe/ixgbe_e610.c

5670

status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ);

sys/dev/ixgbe/ixgbe_e610.c

5674

status = ixgbe_read_sr_buf_aci(hw, offset, &words, data);

sys/dev/ixgbe/ixgbe_e610.c

5675

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

5693

s32 ixgbe_write_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 data)

sys/dev/ixgbe/ixgbe_e610.c

5697

if (hw->eeprom.type == ixgbe_eeprom_uninitialized) {

sys/dev/ixgbe/ixgbe_e610.c

5698

status = ixgbe_init_eeprom_params(hw);

sys/dev/ixgbe/ixgbe_e610.c

570

ixgbe_aci_release_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res,

sys/dev/ixgbe/ixgbe_e610.c

5703

status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE);

sys/dev/ixgbe/ixgbe_e610.c

5707

status = ixgbe_write_sr_word_aci(hw, (u32)offset, &data);

sys/dev/ixgbe/ixgbe_e610.c

5708

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

5727

s32 ixgbe_write_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_e610.c

5732

if (hw->eeprom.type == ixgbe_eeprom_uninitialized) {

sys/dev/ixgbe/ixgbe_e610.c

5733

status = ixgbe_init_eeprom_params(hw);

sys/dev/ixgbe/ixgbe_e610.c

5738

status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE);

sys/dev/ixgbe/ixgbe_e610.c

5742

status = ixgbe_write_sr_buf_aci(hw, (u32)offset, words, data);

sys/dev/ixgbe/ixgbe_e610.c

5743

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

5762

s32 ixgbe_calc_eeprom_checksum_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5774

if (hw->eeprom.type == ixgbe_eeprom_uninitialized) {

sys/dev/ixgbe/ixgbe_e610.c

5775

status = ixgbe_init_eeprom_params(hw);

sys/dev/ixgbe/ixgbe_e610.c

5780

vmem = ixgbe_calloc(hw, IXGBE_SR_SECTOR_SIZE_IN_WORDS, sizeof(u16));

sys/dev/ixgbe/ixgbe_e610.c

5784

status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ);

sys/dev/ixgbe/ixgbe_e610.c

5790

status = ixgbe_read_sr_word_aci(hw, E610_SR_VPD_PTR, &vpd_module);

sys/dev/ixgbe/ixgbe_e610.c

5795

status = ixgbe_read_sr_word_aci(hw, E610_SR_PCIE_ALT_AUTO_LOAD_PTR,

sys/dev/ixgbe/ixgbe_e610.c

5803

for (i = 0; i < hw->eeprom.word_size; i++) {

sys/dev/ixgbe/ixgbe_e610.c

5808

status = ixgbe_read_sr_buf_aci(hw, i, &words, data);

sys/dev/ixgbe/ixgbe_e610.c

583

return ixgbe_aci_send_cmd(hw, &desc, NULL, 0);

sys/dev/ixgbe/ixgbe_e610.c

5832

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

5833

ixgbe_free(hw, vmem);

sys/dev/ixgbe/ixgbe_e610.c

5854

s32 ixgbe_update_eeprom_checksum_E610(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5858

if (hw->eeprom.type == ixgbe_eeprom_uninitialized) {

sys/dev/ixgbe/ixgbe_e610.c

5859

status = ixgbe_init_eeprom_params(hw);

sys/dev/ixgbe/ixgbe_e610.c

5864

status = ixgbe_nvm_recalculate_checksum(hw);

sys/dev/ixgbe/ixgbe_e610.c

5867

status = ixgbe_acquire_nvm(hw, IXGBE_RES_WRITE);

sys/dev/ixgbe/ixgbe_e610.c

5871

status = ixgbe_nvm_write_activate(hw, IXGBE_ACI_NVM_ACTIV_REQ_EMPR,

sys/dev/ixgbe/ixgbe_e610.c

5873

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

5891

s32 ixgbe_validate_eeprom_checksum_E610(struct ixgbe_hw *hw, u16 *checksum_val)

sys/dev/ixgbe/ixgbe_e610.c

5895

if (hw->eeprom.type == ixgbe_eeprom_uninitialized) {

sys/dev/ixgbe/ixgbe_e610.c

5896

status = ixgbe_init_eeprom_params(hw);

sys/dev/ixgbe/ixgbe_e610.c

59

void ixgbe_shutdown_aci(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_e610.c

5901

status = ixgbe_nvm_validate_checksum(hw);

sys/dev/ixgbe/ixgbe_e610.c

5908

status = ixgbe_acquire_nvm(hw, IXGBE_RES_READ);

sys/dev/ixgbe/ixgbe_e610.c

5912

status = ixgbe_read_sr_word_aci(hw, E610_SR_SW_CHECKSUM_WORD,

sys/dev/ixgbe/ixgbe_e610.c

5914

ixgbe_release_nvm(hw);

sys/dev/ixgbe/ixgbe_e610.c

5936

static s32 ixgbe_get_pfa_module_tlv(struct ixgbe_hw *hw, u16 *module_tlv,

sys/dev/ixgbe/ixgbe_e610.c

5943

status = ixgbe_read_ee_aci_E610(hw, E610_SR_PFA_PTR, &pfa_ptr);

sys/dev/ixgbe/ixgbe_e610.c

5947

status = ixgbe_read_ee_aci_E610(hw, pfa_ptr, &pfa_len);

sys/dev/ixgbe/ixgbe_e610.c

5960

status = ixgbe_read_ee_aci_E610(hw, next_tlv,

sys/dev/ixgbe/ixgbe_e610.c

5966

status = ixgbe_read_ee_aci_E610(hw, next_tlv + 1, &tlv_len);

sys/dev/ixgbe/ixgbe_e610.c

5997

s32 ixgbe_read_pba_string_E610(struct ixgbe_hw *hw, u8 *pba_num,

sys/dev/ixgbe/ixgbe_e610.c

6005

status = ixgbe_get_pfa_module_tlv(hw, &pba_tlv, &pba_tlv_len,

sys/dev/ixgbe/ixgbe_e610.c

6012

status = ixgbe_read_ee_aci_E610(hw, (pba_tlv + 2), &pba_size);

sys/dev/ixgbe/ixgbe_e610.c

602

s32 ixgbe_acquire_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res,

sys/dev/ixgbe/ixgbe_e610.c

6030

status = ixgbe_read_ee_aci_E610(hw, (pba_tlv + 2 + 1) + i,

sys/dev/ixgbe/ixgbe_e610.c

61

ixgbe_destroy_lock(&hw->aci.lock);

sys/dev/ixgbe/ixgbe_e610.c

611

status = ixgbe_aci_req_res(hw, res, access, 0, &res_timeout);

sys/dev/ixgbe/ixgbe_e610.c

632

status = ixgbe_aci_req_res(hw, res, access, 0, &res_timeout);

sys/dev/ixgbe/ixgbe_e610.c

654

void ixgbe_release_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res)

sys/dev/ixgbe/ixgbe_e610.c

659

status = ixgbe_aci_release_res(hw, res, 0);

sys/dev/ixgbe/ixgbe_e610.c

667

status = ixgbe_aci_release_res(hw, res, 0);

sys/dev/ixgbe/ixgbe_e610.c

686

ixgbe_parse_common_caps(struct ixgbe_hw *hw, struct ixgbe_hw_common_caps *caps,

sys/dev/ixgbe/ixgbe_e610.c

696

UNREFERENCED_1PARAMETER(hw);

sys/dev/ixgbe/ixgbe_e610.c

841

ixgbe_parse_valid_functions_cap(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

847

UNREFERENCED_1PARAMETER(hw);

sys/dev/ixgbe/ixgbe_e610.c

860

static void ixgbe_parse_vf_dev_caps(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

866

UNREFERENCED_1PARAMETER(hw);

sys/dev/ixgbe/ixgbe_e610.c

879

static void ixgbe_parse_vsi_dev_caps(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

885

UNREFERENCED_1PARAMETER(hw);

sys/dev/ixgbe/ixgbe_e610.c

898

static void ixgbe_parse_fdir_dev_caps(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

904

UNREFERENCED_1PARAMETER(hw);

sys/dev/ixgbe/ixgbe_e610.c

923

static void ixgbe_parse_dev_caps(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

938

found = ixgbe_parse_common_caps(hw, &dev_p->common_cap,

sys/dev/ixgbe/ixgbe_e610.c

943

ixgbe_parse_valid_functions_cap(hw, dev_p,

sys/dev/ixgbe/ixgbe_e610.c

947

ixgbe_parse_vf_dev_caps(hw, dev_p, &cap_resp[i]);

sys/dev/ixgbe/ixgbe_e610.c

950

ixgbe_parse_vsi_dev_caps(hw, dev_p, &cap_resp[i]);

sys/dev/ixgbe/ixgbe_e610.c

953

ixgbe_parse_fdir_dev_caps(hw, dev_p, &cap_resp[i]);

sys/dev/ixgbe/ixgbe_e610.c

972

static void ixgbe_parse_vf_func_caps(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.c

979

UNREFERENCED_1PARAMETER(hw);

sys/dev/ixgbe/ixgbe_e610.c

996

static u32 ixgbe_get_num_per_func(struct ixgbe_hw *hw, u32 max)

sys/dev/ixgbe/ixgbe_e610.h

101

s32 ixgbe_aci_prog_topo_dev_nvm(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

103

s32 ixgbe_aci_read_topo_dev_nvm(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

107

s32 ixgbe_acquire_nvm(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

109

void ixgbe_release_nvm(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

111

s32 ixgbe_aci_read_nvm(struct ixgbe_hw *hw, u16 module_typeid, u32 offset,

sys/dev/ixgbe/ixgbe_e610.h

115

s32 ixgbe_aci_erase_nvm(struct ixgbe_hw *hw, u16 module_typeid);

sys/dev/ixgbe/ixgbe_e610.h

116

s32 ixgbe_aci_update_nvm(struct ixgbe_hw *hw, u16 module_typeid,

sys/dev/ixgbe/ixgbe_e610.h

120

s32 ixgbe_aci_read_nvm_cfg(struct ixgbe_hw *hw, u8 cmd_flags,

sys/dev/ixgbe/ixgbe_e610.h

123

s32 ixgbe_aci_write_nvm_cfg(struct ixgbe_hw *hw, u8 cmd_flags,

sys/dev/ixgbe/ixgbe_e610.h

126

s32 ixgbe_nvm_validate_checksum(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

127

s32 ixgbe_nvm_recalculate_checksum(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

129

s32 ixgbe_nvm_write_activate(struct ixgbe_hw *hw, u16 cmd_flags,

sys/dev/ixgbe/ixgbe_e610.h

132

s32 ixgbe_get_nvm_minsrevs(struct ixgbe_hw *hw, struct ixgbe_minsrev_info *minsrevs);

sys/dev/ixgbe/ixgbe_e610.h

133

s32 ixgbe_update_nvm_minsrevs(struct ixgbe_hw *hw, struct ixgbe_minsrev_info *minsrevs);

sys/dev/ixgbe/ixgbe_e610.h

135

s32 ixgbe_get_inactive_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);

sys/dev/ixgbe/ixgbe_e610.h

136

s32 ixgbe_get_active_nvm_ver(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);

sys/dev/ixgbe/ixgbe_e610.h

138

s32 ixgbe_get_inactive_netlist_ver(struct ixgbe_hw *hw, struct ixgbe_netlist_info *netlist);

sys/dev/ixgbe/ixgbe_e610.h

139

s32 ixgbe_init_nvm(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

141

s32 ixgbe_sanitize_operate(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

142

s32 ixgbe_sanitize_nvm(struct ixgbe_hw *hw, u8 cmd_flags, u8 *values);

sys/dev/ixgbe/ixgbe_e610.h

144

s32 ixgbe_read_sr_word_aci(struct ixgbe_hw *hw, u16 offset, u16 *data);

sys/dev/ixgbe/ixgbe_e610.h

145

s32 ixgbe_read_sr_buf_aci(struct ixgbe_hw *hw, u16 offset, u16 *words, u16 *data);

sys/dev/ixgbe/ixgbe_e610.h

146

s32 ixgbe_read_flat_nvm(struct ixgbe_hw *hw, u32 offset, u32 *length,

sys/dev/ixgbe/ixgbe_e610.h

149

s32 ixgbe_write_sr_word_aci(struct ixgbe_hw *hw, u32 offset, const u16 *data);

sys/dev/ixgbe/ixgbe_e610.h

150

s32 ixgbe_write_sr_buf_aci(struct ixgbe_hw *hw, u32 offset, u16 words, const u16 *data);

sys/dev/ixgbe/ixgbe_e610.h

152

s32 ixgbe_aci_alternate_write(struct ixgbe_hw *hw, u32 reg_addr0,

sys/dev/ixgbe/ixgbe_e610.h

154

s32 ixgbe_aci_alternate_read(struct ixgbe_hw *hw, u32 reg_addr0,

sys/dev/ixgbe/ixgbe_e610.h

156

s32 ixgbe_aci_alternate_write_done(struct ixgbe_hw *hw, u8 bios_mode,

sys/dev/ixgbe/ixgbe_e610.h

158

s32 ixgbe_aci_alternate_clear(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

160

s32 ixgbe_aci_get_internal_data(struct ixgbe_hw *hw, u16 cluster_id,

sys/dev/ixgbe/ixgbe_e610.h

166

s32 ixgbe_handle_nvm_access(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

170

s32 ixgbe_aci_set_health_status_config(struct ixgbe_hw *hw, u8 event_source);

sys/dev/ixgbe/ixgbe_e610.h

172

s32 ixgbe_fwlog_init(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg);

sys/dev/ixgbe/ixgbe_e610.h

173

bool ixgbe_fwlog_supported(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

174

s32 ixgbe_fwlog_set(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg);

sys/dev/ixgbe/ixgbe_e610.h

175

s32 ixgbe_fwlog_update_modules(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

178

s32 ixgbe_fwlog_register(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

179

s32 ixgbe_fwlog_unregister(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

180

void ixgbe_fwlog_set_support_ena(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

181

s32 ixgbe_fwlog_get(struct ixgbe_hw *hw, struct ixgbe_fwlog_cfg *cfg);

sys/dev/ixgbe/ixgbe_e610.h

182

void ixgbe_fwlog_event_dump(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

186

s32 ixgbe_init_ops_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

187

s32 ixgbe_reset_hw_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

188

s32 ixgbe_start_hw_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

189

enum ixgbe_media_type ixgbe_get_media_type_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

190

u64 ixgbe_get_supported_physical_layer_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

191

s32 ixgbe_setup_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_e610.h

193

s32 ixgbe_check_link_E610(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_e610.h

195

s32 ixgbe_get_link_capabilities_E610(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

198

s32 ixgbe_cfg_phy_fc(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

201

s32 ixgbe_setup_fc_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

202

void ixgbe_fc_autoneg_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

203

s32 ixgbe_set_fw_drv_ver_E610(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,

sys/dev/ixgbe/ixgbe_e610.h

205

void ixgbe_disable_rx_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

206

s32 ixgbe_setup_eee_E610(struct ixgbe_hw *hw, bool enable_eee);

sys/dev/ixgbe/ixgbe_e610.h

207

bool ixgbe_fw_recovery_mode_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

208

bool ixgbe_fw_rollback_mode_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

209

bool ixgbe_get_fw_tsam_mode_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

210

s32 ixgbe_init_phy_ops_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

211

s32 ixgbe_identify_phy_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

212

s32 ixgbe_identify_module_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

213

s32 ixgbe_setup_phy_link_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

214

s32 ixgbe_get_phy_firmware_version_E610(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

216

s32 ixgbe_read_i2c_sff8472_E610(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_e610.h

218

s32 ixgbe_read_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_e610.h

220

s32 ixgbe_write_i2c_eeprom_E610(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_e610.h

222

s32 ixgbe_check_overtemp_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

223

s32 ixgbe_set_phy_power_E610(struct ixgbe_hw *hw, bool on);

sys/dev/ixgbe/ixgbe_e610.h

224

s32 ixgbe_enter_lplu_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

225

s32 ixgbe_init_eeprom_params_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

226

s32 ixgbe_read_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 *data);

sys/dev/ixgbe/ixgbe_e610.h

227

s32 ixgbe_read_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_e610.h

229

s32 ixgbe_write_ee_aci_E610(struct ixgbe_hw *hw, u16 offset, u16 data);

sys/dev/ixgbe/ixgbe_e610.h

230

s32 ixgbe_write_ee_aci_buffer_E610(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_e610.h

232

s32 ixgbe_calc_eeprom_checksum_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

233

s32 ixgbe_update_eeprom_checksum_E610(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

234

s32 ixgbe_validate_eeprom_checksum_E610(struct ixgbe_hw *hw, u16 *checksum_val);

sys/dev/ixgbe/ixgbe_e610.h

235

s32 ixgbe_read_pba_string_E610(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);

sys/dev/ixgbe/ixgbe_e610.h

40

void ixgbe_init_aci(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

41

void ixgbe_shutdown_aci(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

42

s32 ixgbe_aci_send_cmd(struct ixgbe_hw *hw, struct ixgbe_aci_desc *desc,

sys/dev/ixgbe/ixgbe_e610.h

44

bool ixgbe_aci_check_event_pending(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

45

s32 ixgbe_aci_get_event(struct ixgbe_hw *hw, struct ixgbe_aci_event *e,

sys/dev/ixgbe/ixgbe_e610.h

50

s32 ixgbe_aci_get_fw_ver(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

51

s32 ixgbe_aci_send_driver_ver(struct ixgbe_hw *hw, struct ixgbe_driver_ver *dv);

sys/dev/ixgbe/ixgbe_e610.h

52

s32 ixgbe_aci_set_pf_context(struct ixgbe_hw *hw, u8 pf_id);

sys/dev/ixgbe/ixgbe_e610.h

54

s32 ixgbe_acquire_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res,

sys/dev/ixgbe/ixgbe_e610.h

56

void ixgbe_release_res(struct ixgbe_hw *hw, enum ixgbe_aci_res_ids res);

sys/dev/ixgbe/ixgbe_e610.h

57

s32 ixgbe_aci_list_caps(struct ixgbe_hw *hw, void *buf, u16 buf_size,

sys/dev/ixgbe/ixgbe_e610.h

59

s32 ixgbe_discover_dev_caps(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

61

s32 ixgbe_discover_func_caps(struct ixgbe_hw* hw,

sys/dev/ixgbe/ixgbe_e610.h

63

s32 ixgbe_get_caps(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

64

s32 ixgbe_aci_disable_rxen(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

65

s32 ixgbe_aci_get_phy_caps(struct ixgbe_hw *hw, bool qual_mods, u8 report_mode,

sys/dev/ixgbe/ixgbe_e610.h

71

s32 ixgbe_aci_set_phy_cfg(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

73

s32 ixgbe_aci_set_link_restart_an(struct ixgbe_hw *hw, bool ena_link);

sys/dev/ixgbe/ixgbe_e610.h

74

s32 ixgbe_update_link_info(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_e610.h

75

s32 ixgbe_get_link_status(struct ixgbe_hw *hw, bool *link_up);

sys/dev/ixgbe/ixgbe_e610.h

76

s32 ixgbe_aci_get_link_info(struct ixgbe_hw *hw, bool ena_lse,

sys/dev/ixgbe/ixgbe_e610.h

78

s32 ixgbe_aci_set_event_mask(struct ixgbe_hw *hw, u8 port_num, u16 mask);

sys/dev/ixgbe/ixgbe_e610.h

79

s32 ixgbe_configure_lse(struct ixgbe_hw *hw, bool activate, u16 mask);

sys/dev/ixgbe/ixgbe_e610.h

81

s32 ixgbe_aci_get_netlist_node(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

84

s32 ixgbe_find_netlist_node(struct ixgbe_hw *hw, u8 node_type_ctx,

sys/dev/ixgbe/ixgbe_e610.h

86

s32 ixgbe_aci_read_i2c(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

89

s32 ixgbe_aci_write_i2c(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_e610.h

93

s32 ixgbe_aci_set_port_id_led(struct ixgbe_hw *hw, bool orig_mode);

sys/dev/ixgbe/ixgbe_e610.h

94

s32 ixgbe_aci_set_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,

sys/dev/ixgbe/ixgbe_e610.h

96

s32 ixgbe_aci_get_gpio(struct ixgbe_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,

sys/dev/ixgbe/ixgbe_e610.h

98

s32 ixgbe_aci_sff_eeprom(struct ixgbe_hw *hw, u16 lport, u8 bus_addr,

sys/dev/ixgbe/ixgbe_fw_logging.c

128

struct ixgbe_fwlog_cfg *cfg = &sc->hw.fwlog_cfg;

sys/dev/ixgbe/ixgbe_fw_logging.c

145

status = ixgbe_fwlog_register(&sc->hw);

sys/dev/ixgbe/ixgbe_fw_logging.c

149

status = ixgbe_fwlog_unregister(&sc->hw);

sys/dev/ixgbe/ixgbe_fw_logging.c

218

struct ixgbe_fwlog_cfg *cfg = &sc->hw.fwlog_cfg;

sys/dev/ixgbe/ixgbe_fw_logging.c

25

ixgbe_fwlog_init(&sc->hw, cfg);

sys/dev/ixgbe/ixgbe_fw_logging.c

27

if (!ixgbe_fwlog_supported(&sc->hw))

sys/dev/ixgbe/ixgbe_fw_logging.c

30

status = ixgbe_fwlog_set(&sc->hw, cfg);

sys/dev/ixgbe/ixgbe_fw_logging.c

406

struct ixgbe_hw *hw = &sc->hw;

sys/dev/ixgbe/ixgbe_fw_logging.c

412

cfg = &hw->fwlog_cfg;

sys/dev/ixgbe/ixgbe_fw_logging.c

56

struct ixgbe_fwlog_cfg *cfg = &sc->hw.fwlog_cfg;

sys/dev/ixgbe/ixgbe_fw_logging.c

91

struct ixgbe_fwlog_cfg *cfg = &sc->hw.fwlog_cfg;

sys/dev/ixgbe/ixgbe_mbx.c

1004

ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

1009

ixgbe_clear_msg_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

101

return mbx->ops[mbx_id].read(hw, msg, size, mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

1010

ixgbe_clear_ack_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

1014

IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_id), i, msg[i]);

sys/dev/ixgbe/ixgbe_mbx.c

1017

pf_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_id));

sys/dev/ixgbe/ixgbe_mbx.c

1019

IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), pf_mailbox);

sys/dev/ixgbe/ixgbe_mbx.c

1023

ixgbe_poll_for_ack(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

1026

hw->mbx.stats.msgs_tx++;

sys/dev/ixgbe/ixgbe_mbx.c

1029

hw->mbx.ops[vf_id].release(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

1046

static s32 ixgbe_read_mbx_pf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/ixgbe/ixgbe_mbx.c

1055

ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

1061

msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_id), i);

sys/dev/ixgbe/ixgbe_mbx.c

1064

IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), IXGBE_PFMAILBOX_ACK);

sys/dev/ixgbe/ixgbe_mbx.c

1067

hw->mbx.stats.msgs_rx++;

sys/dev/ixgbe/ixgbe_mbx.c

1083

static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/ixgbe/ixgbe_mbx.c

1093

ret_val = ixgbe_check_for_msg_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

1097

ixgbe_clear_msg_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

1101

msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_id), i);

sys/dev/ixgbe/ixgbe_mbx.c

1104

pf_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_id));

sys/dev/ixgbe/ixgbe_mbx.c

1106

IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), pf_mailbox);

sys/dev/ixgbe/ixgbe_mbx.c

1109

hw->mbx.stats.msgs_rx++;

sys/dev/ixgbe/ixgbe_mbx.c

1121

static s32 ixgbe_clear_mbx_pf(struct ixgbe_hw *hw, u16 vf_id)

sys/dev/ixgbe/ixgbe_mbx.c

1123

u16 mbx_size = hw->mbx.size;

sys/dev/ixgbe/ixgbe_mbx.c

1130

IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_id), i, 0x0);

sys/dev/ixgbe/ixgbe_mbx.c

1143

void ixgbe_init_mbx_params_pf_id(struct ixgbe_hw *hw, u16 vf_id)

sys/dev/ixgbe/ixgbe_mbx.c

1145

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

1164

void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_mbx.c

1167

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

1170

if (hw->mac.type != ixgbe_mac_82599EB &&

sys/dev/ixgbe/ixgbe_mbx.c

1171

hw->mac.type != ixgbe_mac_X550 &&

sys/dev/ixgbe/ixgbe_mbx.c

1172

hw->mac.type != ixgbe_mac_X550EM_x &&

sys/dev/ixgbe/ixgbe_mbx.c

1173

hw->mac.type != ixgbe_mac_X550EM_a &&

sys/dev/ixgbe/ixgbe_mbx.c

1174

hw->mac.type != ixgbe_mac_X540)

sys/dev/ixgbe/ixgbe_mbx.c

119

s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

1196

ixgbe_init_mbx_params_pf_id(hw, i);

sys/dev/ixgbe/ixgbe_mbx.c

1207

void ixgbe_upgrade_mbx_params_pf(struct ixgbe_hw *hw, u16 vf_id)

sys/dev/ixgbe/ixgbe_mbx.c

1209

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

121

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

1212

if (hw->mac.type != ixgbe_mac_82599EB &&

sys/dev/ixgbe/ixgbe_mbx.c

1213

hw->mac.type != ixgbe_mac_X550 &&

sys/dev/ixgbe/ixgbe_mbx.c

1214

hw->mac.type != ixgbe_mac_X550EM_x &&

sys/dev/ixgbe/ixgbe_mbx.c

1215

hw->mac.type != ixgbe_mac_X550EM_a &&

sys/dev/ixgbe/ixgbe_mbx.c

1216

hw->mac.type != ixgbe_mac_X540)

sys/dev/ixgbe/ixgbe_mbx.c

139

ret_val = mbx->ops[mbx_id].write(hw, msg, size, mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

152

s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

154

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

160

ret_val = mbx->ops[mbx_id].check_for_msg(hw, mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

172

s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

174

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

180

ret_val = mbx->ops[mbx_id].check_for_ack(hw, mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

192

s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

194

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

200

ret_val = mbx->ops[mbx_id].check_for_rst(hw, mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

212

s32 ixgbe_clear_mbx(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

214

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

220

ret_val = mbx->ops[mbx_id].clear(hw, mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

232

static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

234

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

242

while (countdown && mbx->ops[mbx_id].check_for_msg(hw, mbx_id)) {

sys/dev/ixgbe/ixgbe_mbx.c

265

static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

267

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

275

while (countdown && mbx->ops[mbx_id].check_for_ack(hw, mbx_id)) {

sys/dev/ixgbe/ixgbe_mbx.c

298

static u32 ixgbe_read_mailbox_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_mbx.c

300

u32 vf_mailbox = IXGBE_READ_REG(hw, IXGBE_VFMAILBOX);

sys/dev/ixgbe/ixgbe_mbx.c

302

vf_mailbox |= hw->mbx.vf_mailbox;

sys/dev/ixgbe/ixgbe_mbx.c

303

hw->mbx.vf_mailbox |= vf_mailbox & IXGBE_VFMAILBOX_R2C_BITS;

sys/dev/ixgbe/ixgbe_mbx.c

308

static void ixgbe_clear_msg_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_mbx.c

310

u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

313

hw->mbx.stats.reqs++;

sys/dev/ixgbe/ixgbe_mbx.c

314

hw->mbx.vf_mailbox &= ~IXGBE_VFMAILBOX_PFSTS;

sys/dev/ixgbe/ixgbe_mbx.c

318

static void ixgbe_clear_ack_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_mbx.c

320

u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

323

hw->mbx.stats.acks++;

sys/dev/ixgbe/ixgbe_mbx.c

324

hw->mbx.vf_mailbox &= ~IXGBE_VFMAILBOX_PFACK;

sys/dev/ixgbe/ixgbe_mbx.c

328

static void ixgbe_clear_rst_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_mbx.c

330

u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

333

hw->mbx.stats.rsts++;

sys/dev/ixgbe/ixgbe_mbx.c

334

hw->mbx.vf_mailbox &= ~(IXGBE_VFMAILBOX_RSTI |

sys/dev/ixgbe/ixgbe_mbx.c

347

static s32 ixgbe_check_for_bit_vf(struct ixgbe_hw *hw, u32 mask)

sys/dev/ixgbe/ixgbe_mbx.c

349

u32 vf_mailbox = ixgbe_read_mailbox_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

364

static s32 ixgbe_check_for_msg_vf(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

369

if (!ixgbe_check_for_bit_vf(hw, IXGBE_VFMAILBOX_PFSTS))

sys/dev/ixgbe/ixgbe_mbx.c

38

static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

382

static s32 ixgbe_check_for_ack_vf(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

387

if (!ixgbe_check_for_bit_vf(hw, IXGBE_VFMAILBOX_PFACK)) {

sys/dev/ixgbe/ixgbe_mbx.c

389

ixgbe_clear_ack_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

39

static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

403

static s32 ixgbe_check_for_rst_vf(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

408

if (!ixgbe_check_for_bit_vf(hw, IXGBE_VFMAILBOX_RSTI |

sys/dev/ixgbe/ixgbe_mbx.c

411

ixgbe_clear_rst_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

424

static s32 ixgbe_obtain_mbx_lock_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_mbx.c

426

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

438

vf_mailbox = ixgbe_read_mailbox_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

445

IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox);

sys/dev/ixgbe/ixgbe_mbx.c

448

if (ixgbe_read_mailbox_vf(hw) & IXGBE_VFMAILBOX_VFU) {

sys/dev/ixgbe/ixgbe_mbx.c

472

static void ixgbe_release_mbx_lock_dummy(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

474

UNREFERENCED_2PARAMETER(hw, mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

484

static void ixgbe_release_mbx_lock_vf(struct ixgbe_hw *hw, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

493

vf_mailbox = ixgbe_read_mailbox_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

495

IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox);

sys/dev/ixgbe/ixgbe_mbx.c

50

s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

507

static s32 ixgbe_write_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/ixgbe/ixgbe_mbx.c

517

ret_val = ixgbe_obtain_mbx_lock_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

52

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

522

ixgbe_check_for_msg_vf(hw, 0);

sys/dev/ixgbe/ixgbe_mbx.c

523

ixgbe_clear_msg_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

524

ixgbe_check_for_ack_vf(hw, 0);

sys/dev/ixgbe/ixgbe_mbx.c

525

ixgbe_clear_ack_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

529

IXGBE_WRITE_REG_ARRAY(hw, IXGBE_VFMBMEM, i, msg[i]);

sys/dev/ixgbe/ixgbe_mbx.c

532

hw->mbx.stats.msgs_tx++;

sys/dev/ixgbe/ixgbe_mbx.c

535

IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_REQ);

sys/dev/ixgbe/ixgbe_mbx.c

549

static s32 ixgbe_write_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/ixgbe/ixgbe_mbx.c

561

ret_val = ixgbe_obtain_mbx_lock_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

566

ixgbe_clear_msg_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

567

ixgbe_clear_ack_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

571

IXGBE_WRITE_REG_ARRAY(hw, IXGBE_VFMBMEM, i, msg[i]);

sys/dev/ixgbe/ixgbe_mbx.c

574

hw->mbx.stats.msgs_tx++;

sys/dev/ixgbe/ixgbe_mbx.c

577

vf_mailbox = ixgbe_read_mailbox_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

579

IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox);

sys/dev/ixgbe/ixgbe_mbx.c

582

ixgbe_poll_for_ack(hw, mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

585

hw->mbx.ops[mbx_id].release(hw, mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

599

static s32 ixgbe_read_mbx_vf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/ixgbe/ixgbe_mbx.c

609

ret_val = ixgbe_obtain_mbx_lock_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

615

msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_VFMBMEM, i);

sys/dev/ixgbe/ixgbe_mbx.c

618

IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_ACK);

sys/dev/ixgbe/ixgbe_mbx.c

621

hw->mbx.stats.msgs_rx++;

sys/dev/ixgbe/ixgbe_mbx.c

635

static s32 ixgbe_read_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/ixgbe/ixgbe_mbx.c

646

ret_val = ixgbe_check_for_msg_vf(hw, 0);

sys/dev/ixgbe/ixgbe_mbx.c

65

return mbx->ops[mbx_id].read(hw, msg, size, mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

650

ixgbe_clear_msg_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

654

msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_VFMBMEM, i);

sys/dev/ixgbe/ixgbe_mbx.c

657

vf_mailbox = ixgbe_read_mailbox_vf(hw);

sys/dev/ixgbe/ixgbe_mbx.c

659

IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, vf_mailbox);

sys/dev/ixgbe/ixgbe_mbx.c

662

hw->mbx.stats.msgs_rx++;

sys/dev/ixgbe/ixgbe_mbx.c

674

void ixgbe_init_mbx_params_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_mbx.c

676

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

705

void ixgbe_upgrade_mbx_params_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_mbx.c

707

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

730

static void ixgbe_clear_msg_pf(struct ixgbe_hw *hw, u16 vf_id)

sys/dev/ixgbe/ixgbe_mbx.c

736

pfmbicr = IXGBE_READ_REG(hw, IXGBE_PFMBICR(index));

sys/dev/ixgbe/ixgbe_mbx.c

739

hw->mbx.stats.reqs++;

sys/dev/ixgbe/ixgbe_mbx.c

741

IXGBE_WRITE_REG(hw, IXGBE_PFMBICR(index),

sys/dev/ixgbe/ixgbe_mbx.c

745

static void ixgbe_clear_ack_pf(struct ixgbe_hw *hw, u16 vf_id)

sys/dev/ixgbe/ixgbe_mbx.c

751

pfmbicr = IXGBE_READ_REG(hw, IXGBE_PFMBICR(index));

sys/dev/ixgbe/ixgbe_mbx.c

754

hw->mbx.stats.acks++;

sys/dev/ixgbe/ixgbe_mbx.c

756

IXGBE_WRITE_REG(hw, IXGBE_PFMBICR(index),

sys/dev/ixgbe/ixgbe_mbx.c

760

static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)

sys/dev/ixgbe/ixgbe_mbx.c

762

u32 pfmbicr = IXGBE_READ_REG(hw, IXGBE_PFMBICR(index));

sys/dev/ixgbe/ixgbe_mbx.c

778

static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_id)

sys/dev/ixgbe/ixgbe_mbx.c

785

if (!ixgbe_check_for_bit_pf(hw, IXGBE_PFMBICR_VFREQ_VF1 << vf_shift,

sys/dev/ixgbe/ixgbe_mbx.c

79

s32 ixgbe_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)

sys/dev/ixgbe/ixgbe_mbx.c

797

static s32 ixgbe_check_for_msg_pf_legacy(struct ixgbe_hw *hw, u16 vf_id)

sys/dev/ixgbe/ixgbe_mbx.c

801

ret_val = ixgbe_check_for_msg_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

803

ixgbe_clear_msg_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

81

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

815

static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_id)

sys/dev/ixgbe/ixgbe_mbx.c

823

if (!ixgbe_check_for_bit_pf(hw, IXGBE_PFMBICR_VFACK_VF1 << vf_shift,

sys/dev/ixgbe/ixgbe_mbx.c

827

ixgbe_clear_ack_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

840

static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_id)

sys/dev/ixgbe/ixgbe_mbx.c

849

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_mbx.c

851

vflre = IXGBE_READ_REG(hw, IXGBE_PFVFLRE(index));

sys/dev/ixgbe/ixgbe_mbx.c

857

vflre = IXGBE_READ_REG(hw, IXGBE_PFVFLREC(index));

sys/dev/ixgbe/ixgbe_mbx.c

865

IXGBE_WRITE_REG(hw, IXGBE_PFVFLREC(index), (1 << vf_shift));

sys/dev/ixgbe/ixgbe_mbx.c

866

hw->mbx.stats.rsts++;

sys/dev/ixgbe/ixgbe_mbx.c

879

static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_id)

sys/dev/ixgbe/ixgbe_mbx.c

881

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_mbx.c

893

pf_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_id));

sys/dev/ixgbe/ixgbe_mbx.c

904

IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), pf_mailbox);

sys/dev/ixgbe/ixgbe_mbx.c

907

pf_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_id));

sys/dev/ixgbe/ixgbe_mbx.c

932

static void ixgbe_release_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_id)

sys/dev/ixgbe/ixgbe_mbx.c

939

pf_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_id));

sys/dev/ixgbe/ixgbe_mbx.c

941

IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), pf_mailbox);

sys/dev/ixgbe/ixgbe_mbx.c

953

static s32 ixgbe_write_mbx_pf_legacy(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/ixgbe/ixgbe_mbx.c

962

ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

967

ixgbe_check_for_msg_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

968

ixgbe_clear_msg_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

969

ixgbe_check_for_ack_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

970

ixgbe_clear_ack_pf(hw, vf_id);

sys/dev/ixgbe/ixgbe_mbx.c

974

IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_id), i, msg[i]);

sys/dev/ixgbe/ixgbe_mbx.c

977

IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_id), IXGBE_PFMAILBOX_STS);

sys/dev/ixgbe/ixgbe_mbx.c

98

ret_val = ixgbe_poll_for_msg(hw, mbx_id);

sys/dev/ixgbe/ixgbe_mbx.c

980

hw->mbx.stats.msgs_tx++;

sys/dev/ixgbe/ixgbe_mbx.c

994

static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,

sys/dev/ixgbe/ixgbe_mbx.h

192

s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);

sys/dev/ixgbe/ixgbe_mbx.h

193

s32 ixgbe_poll_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);

sys/dev/ixgbe/ixgbe_mbx.h

194

s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);

sys/dev/ixgbe/ixgbe_mbx.h

195

s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id);

sys/dev/ixgbe/ixgbe_mbx.h

196

s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id);

sys/dev/ixgbe/ixgbe_mbx.h

197

s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id);

sys/dev/ixgbe/ixgbe_mbx.h

198

s32 ixgbe_clear_mbx(struct ixgbe_hw *hw, u16 vf_number);

sys/dev/ixgbe/ixgbe_mbx.h

199

void ixgbe_init_mbx_params_vf(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_mbx.h

200

void ixgbe_upgrade_mbx_params_vf(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_mbx.h

201

void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_mbx.h

202

void ixgbe_init_mbx_params_pf_id(struct ixgbe_hw *hw, u16 vf_id);

sys/dev/ixgbe/ixgbe_mbx.h

203

void ixgbe_upgrade_mbx_params_pf(struct ixgbe_hw *hw, u16 vf_id);

sys/dev/ixgbe/ixgbe_mbx.h

41

void (*init_params)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_mbx.h

42

void (*release)(struct ixgbe_hw *hw, u16 mbx_id);

sys/dev/ixgbe/ixgbe_mbx.h

43

s32 (*read)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);

sys/dev/ixgbe/ixgbe_mbx.h

44

s32 (*write)(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id);

sys/dev/ixgbe/ixgbe_mbx.h

45

s32 (*check_for_msg)(struct ixgbe_hw *hw, u16 vf_number);

sys/dev/ixgbe/ixgbe_mbx.h

46

s32 (*check_for_ack)(struct ixgbe_hw *hw, u16 vf_number);

sys/dev/ixgbe/ixgbe_mbx.h

47

s32 (*check_for_rst)(struct ixgbe_hw *hw, u16 vf_number);

sys/dev/ixgbe/ixgbe_mbx.h

48

s32 (*clear)(struct ixgbe_hw *hw, u16 vf_number);

sys/dev/ixgbe/ixgbe_osdep.c

160

ixgbe_info_fwlog(struct ixgbe_hw *hw, uint32_t rowsize, uint32_t __unused groupsize,

sys/dev/ixgbe/ixgbe_osdep.c

163

device_t dev = ((struct ixgbe_softc *)hw->back)->dev;

sys/dev/ixgbe/ixgbe_osdep.c

166

if (!ixgbe_fwlog_supported(hw))

sys/dev/ixgbe/ixgbe_osdep.c

37

ixgbe_dev_from_hw(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_osdep.c

39

return ((struct ixgbe_softc *)hw->back)->dev;

sys/dev/ixgbe/ixgbe_osdep.c

43

ixgbe_read_pci_cfg(struct ixgbe_hw *hw, u32 reg)

sys/dev/ixgbe/ixgbe_osdep.c

45

return pci_read_config(((struct ixgbe_softc *)hw->back)->dev, reg, 2);

sys/dev/ixgbe/ixgbe_osdep.c

49

ixgbe_write_pci_cfg(struct ixgbe_hw *hw, u32 reg, u16 value)

sys/dev/ixgbe/ixgbe_osdep.c

51

pci_write_config(((struct ixgbe_softc *)hw->back)->dev, reg, value, 2);

sys/dev/ixgbe/ixgbe_osdep.c

55

ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)

sys/dev/ixgbe/ixgbe_osdep.c

57

return bus_space_read_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag,

sys/dev/ixgbe/ixgbe_osdep.c

58

((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle, reg);

sys/dev/ixgbe/ixgbe_osdep.c

62

ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 val)

sys/dev/ixgbe/ixgbe_osdep.c

64

bus_space_write_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag,

sys/dev/ixgbe/ixgbe_osdep.c

65

((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle,

sys/dev/ixgbe/ixgbe_osdep.c

70

ixgbe_read_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset)

sys/dev/ixgbe/ixgbe_osdep.c

72

return bus_space_read_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag,

sys/dev/ixgbe/ixgbe_osdep.c

73

((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle,

sys/dev/ixgbe/ixgbe_osdep.c

78

ixgbe_write_reg_array(struct ixgbe_hw *hw, u32 reg, u32 offset, u32 val)

sys/dev/ixgbe/ixgbe_osdep.c

80

bus_space_write_4(((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_tag,

sys/dev/ixgbe/ixgbe_osdep.c

81

((struct ixgbe_softc *)hw->back)->osdep.mem_bus_space_handle,

sys/dev/ixgbe/ixgbe_osdep.h

208

device_t ixgbe_dev_from_hw(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_osdep.h

239

ixgbe_calloc(struct ixgbe_hw __unused *hw, size_t count, size_t size)

sys/dev/ixgbe/ixgbe_osdep.h

245

ixgbe_malloc(struct ixgbe_hw __unused *hw, size_t size)

sys/dev/ixgbe/ixgbe_osdep.h

251

ixgbe_free(struct ixgbe_hw __unused *hw, void *addr)

sys/dev/ixgbe/ixgbe_osdep.h

256

void ixgbe_info_fwlog(struct ixgbe_hw *hw, uint32_t rowsize,

sys/dev/ixgbe/ixgbe_osdep.h

96

device_printf(ixgbe_dev_from_hw(hw), format, ## arg); \

sys/dev/ixgbe/ixgbe_phy.c

1016

status = hw->phy.ops.read_reg(hw,

sys/dev/ixgbe/ixgbe_phy.c

1041

s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

1050

ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg);

sys/dev/ixgbe/ixgbe_phy.c

1054

hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/ixgbe/ixgbe_phy.c

1059

if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)

sys/dev/ixgbe/ixgbe_phy.c

1062

hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/ixgbe/ixgbe_phy.c

1069

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG,

sys/dev/ixgbe/ixgbe_phy.c

1074

if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)

sys/dev/ixgbe/ixgbe_phy.c

1077

hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG,

sys/dev/ixgbe/ixgbe_phy.c

1084

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,

sys/dev/ixgbe/ixgbe_phy.c

1089

if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL)

sys/dev/ixgbe/ixgbe_phy.c

109

s32 ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg,

sys/dev/ixgbe/ixgbe_phy.c

1092

hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,

sys/dev/ixgbe/ixgbe_phy.c

1097

ixgbe_restart_auto_neg(hw);

sys/dev/ixgbe/ixgbe_phy.c

1106

s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_phy.c

1113

status = hw->phy.ops.read_reg(hw, TNX_FW_REV,

sys/dev/ixgbe/ixgbe_phy.c

112

u32 swfw_mask = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/ixgbe_phy.c

1125

s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_phy.c

1132

status = hw->phy.ops.read_reg(hw, AQ_FW_REV,

sys/dev/ixgbe/ixgbe_phy.c

1143

s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

1155

if (ixgbe_check_reset_blocked(hw))

sys/dev/ixgbe/ixgbe_phy.c

1158

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,

sys/dev/ixgbe/ixgbe_phy.c

1162

hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,

sys/dev/ixgbe/ixgbe_phy.c

1167

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,

sys/dev/ixgbe/ixgbe_phy.c

1181

ret_val = ixgbe_get_sfp_init_sequence_offsets(hw, &list_offset,

sys/dev/ixgbe/ixgbe_phy.c

1186

ret_val = hw->eeprom.ops.read(hw, data_offset, &block_crc);

sys/dev/ixgbe/ixgbe_phy.c

1192

ret_val = hw->eeprom.ops.read(hw, data_offset, &eword);

sys/dev/ixgbe/ixgbe_phy.c

1207

ret_val = hw->eeprom.ops.read(hw, data_offset,

sys/dev/ixgbe/ixgbe_phy.c

1213

ret_val = hw->eeprom.ops.read(hw, data_offset,

sys/dev/ixgbe/ixgbe_phy.c

1217

hw->phy.ops.write_reg(hw, phy_offset,

sys/dev/ixgbe/ixgbe_phy.c

125

if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))

sys/dev/ixgbe/ixgbe_phy.c

1261

s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

1267

switch (hw->mac.ops.get_media_type(hw)) {

sys/dev/ixgbe/ixgbe_phy.c

1269

status = ixgbe_identify_sfp_module_generic(hw);

sys/dev/ixgbe/ixgbe_phy.c

127

ixgbe_i2c_start(hw);

sys/dev/ixgbe/ixgbe_phy.c

1273

status = ixgbe_identify_qsfp_module_generic(hw);

sys/dev/ixgbe/ixgbe_phy.c

1277

hw->phy.sfp_type = ixgbe_sfp_type_not_present;

sys/dev/ixgbe/ixgbe_phy.c

129

if (ixgbe_out_i2c_byte_ack(hw, addr))

sys/dev/ixgbe/ixgbe_phy.c

1291

s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

1295

enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type;

sys/dev/ixgbe/ixgbe_phy.c

1308

if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber) {

sys/dev/ixgbe/ixgbe_phy.c

1309

hw->phy.sfp_type = ixgbe_sfp_type_not_present;

sys/dev/ixgbe/ixgbe_phy.c

1315

hw->mac.ops.set_lan_id(hw);

sys/dev/ixgbe/ixgbe_phy.c

132

if (ixgbe_out_i2c_byte_ack(hw, reg_high))

sys/dev/ixgbe/ixgbe_phy.c

1324

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1338

hw->phy.type = ixgbe_phy_sfp_unsupported;

sys/dev/ixgbe/ixgbe_phy.c

1341

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1348

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

135

if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF))

sys/dev/ixgbe/ixgbe_phy.c

1354

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1377

if (hw->mac.type == ixgbe_mac_82598EB) {

sys/dev/ixgbe/ixgbe_phy.c

1379

hw->phy.sfp_type = ixgbe_sfp_type_da_cu;

sys/dev/ixgbe/ixgbe_phy.c

138

if (ixgbe_out_i2c_byte_ack(hw, csum))

sys/dev/ixgbe/ixgbe_phy.c

1381

hw->phy.sfp_type = ixgbe_sfp_type_sr;

sys/dev/ixgbe/ixgbe_phy.c

1383

hw->phy.sfp_type = ixgbe_sfp_type_lr;

sys/dev/ixgbe/ixgbe_phy.c

1385

hw->phy.sfp_type = ixgbe_sfp_type_unknown;

sys/dev/ixgbe/ixgbe_phy.c

1388

if (hw->bus.lan_id == 0)

sys/dev/ixgbe/ixgbe_phy.c

1389

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1392

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1395

hw->phy.ops.read_i2c_eeprom(

sys/dev/ixgbe/ixgbe_phy.c

1396

hw, IXGBE_SFF_CABLE_SPEC_COMP,

sys/dev/ixgbe/ixgbe_phy.c

1400

if (hw->bus.lan_id == 0)

sys/dev/ixgbe/ixgbe_phy.c

1401

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1404

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1407

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

141

ixgbe_i2c_start(hw);

sys/dev/ixgbe/ixgbe_phy.c

1413

if (hw->bus.lan_id == 0)

sys/dev/ixgbe/ixgbe_phy.c

1414

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1417

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1420

if (hw->bus.lan_id == 0)

sys/dev/ixgbe/ixgbe_phy.c

1421

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1424

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1427

if (hw->bus.lan_id == 0)

sys/dev/ixgbe/ixgbe_phy.c

1428

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

143

if (ixgbe_out_i2c_byte_ack(hw, addr | 1))

sys/dev/ixgbe/ixgbe_phy.c

1431

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1434

if (hw->bus.lan_id == 0)

sys/dev/ixgbe/ixgbe_phy.c

1435

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1438

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1441

if (hw->bus.lan_id == 0)

sys/dev/ixgbe/ixgbe_phy.c

1442

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1445

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1448

hw->phy.sfp_type = ixgbe_sfp_type_unknown;

sys/dev/ixgbe/ixgbe_phy.c

1452

if (hw->phy.sfp_type != stored_sfp_type)

sys/dev/ixgbe/ixgbe_phy.c

1453

hw->phy.sfp_setup_needed = true;

sys/dev/ixgbe/ixgbe_phy.c

1456

hw->phy.multispeed_fiber = false;

sys/dev/ixgbe/ixgbe_phy.c

146

if (ixgbe_in_i2c_byte_ack(hw, &high_bits))

sys/dev/ixgbe/ixgbe_phy.c

1463

hw->phy.multispeed_fiber = true;

sys/dev/ixgbe/ixgbe_phy.c

1466

if (hw->phy.type != ixgbe_phy_nl) {

sys/dev/ixgbe/ixgbe_phy.c

1467

hw->phy.id = identifier;

sys/dev/ixgbe/ixgbe_phy.c

1468

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1475

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1482

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

149

if (ixgbe_in_i2c_byte_ack(hw, &low_bits))

sys/dev/ixgbe/ixgbe_phy.c

1497

hw->phy.type =

sys/dev/ixgbe/ixgbe_phy.c

1502

hw->phy.type = ixgbe_phy_sfp_ftl_active;

sys/dev/ixgbe/ixgbe_phy.c

1504

hw->phy.type = ixgbe_phy_sfp_ftl;

sys/dev/ixgbe/ixgbe_phy.c

1507

hw->phy.type = ixgbe_phy_sfp_avago;

sys/dev/ixgbe/ixgbe_phy.c

1510

hw->phy.type = ixgbe_phy_sfp_intel;

sys/dev/ixgbe/ixgbe_phy.c

1514

hw->phy.type = ixgbe_phy_sfp_passive_unknown;

sys/dev/ixgbe/ixgbe_phy.c

1516

hw->phy.type = ixgbe_phy_sfp_active_unknown;

sys/dev/ixgbe/ixgbe_phy.c

1518

hw->phy.type = ixgbe_phy_sfp_unknown;

sys/dev/ixgbe/ixgbe_phy.c

152

ixgbe_clock_in_i2c_byte(hw, &csum_byte);

sys/dev/ixgbe/ixgbe_phy.c

1532

!(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 ||

sys/dev/ixgbe/ixgbe_phy.c

1533

hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 ||

sys/dev/ixgbe/ixgbe_phy.c

1534

hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 ||

sys/dev/ixgbe/ixgbe_phy.c

1535

hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 ||

sys/dev/ixgbe/ixgbe_phy.c

1536

hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 ||

sys/dev/ixgbe/ixgbe_phy.c

1537

hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1 ||

sys/dev/ixgbe/ixgbe_phy.c

1538

hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core0 ||

sys/dev/ixgbe/ixgbe_phy.c

1539

hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core1)) {

sys/dev/ixgbe/ixgbe_phy.c

154

if (ixgbe_clock_out_i2c_bit(hw, false))

sys/dev/ixgbe/ixgbe_phy.c

1540

hw->phy.type = ixgbe_phy_sfp_unsupported;

sys/dev/ixgbe/ixgbe_phy.c

1546

if (hw->mac.type == ixgbe_mac_82598EB) {

sys/dev/ixgbe/ixgbe_phy.c

1551

ixgbe_get_device_caps(hw, &enforce_sfp);

sys/dev/ixgbe/ixgbe_phy.c

1553

!(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 ||

sys/dev/ixgbe/ixgbe_phy.c

1554

hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 ||

sys/dev/ixgbe/ixgbe_phy.c

1555

hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 ||

sys/dev/ixgbe/ixgbe_phy.c

1556

hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 ||

sys/dev/ixgbe/ixgbe_phy.c

1557

hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 ||

sys/dev/ixgbe/ixgbe_phy.c

1558

hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1 ||

sys/dev/ixgbe/ixgbe_phy.c

1559

hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core0 ||

sys/dev/ixgbe/ixgbe_phy.c

156

ixgbe_i2c_stop(hw);

sys/dev/ixgbe/ixgbe_phy.c

1560

hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core1)) {

sys/dev/ixgbe/ixgbe_phy.c

1562

if (hw->phy.type == ixgbe_phy_sfp_intel) {

sys/dev/ixgbe/ixgbe_phy.c

1565

if (hw->allow_unsupported_sfp == true) {

sys/dev/ixgbe/ixgbe_phy.c

1567

EWARN(hw,

sys/dev/ixgbe/ixgbe_phy.c

1576

hw->phy.type =

sys/dev/ixgbe/ixgbe_phy.c

158

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_phy.c

1590

hw->phy.sfp_type = ixgbe_sfp_type_not_present;

sys/dev/ixgbe/ixgbe_phy.c

1591

if (hw->phy.type != ixgbe_phy_nl) {

sys/dev/ixgbe/ixgbe_phy.c

1592

hw->phy.id = 0;

sys/dev/ixgbe/ixgbe_phy.c

1593

hw->phy.type = ixgbe_phy_unknown;

sys/dev/ixgbe/ixgbe_phy.c

1604

u64 ixgbe_get_supported_phy_sfp_layer_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

1612

hw->phy.ops.identify_sfp(hw);

sys/dev/ixgbe/ixgbe_phy.c

1613

if (hw->phy.sfp_type == ixgbe_sfp_type_not_present)

sys/dev/ixgbe/ixgbe_phy.c

1616

switch (hw->phy.type) {

sys/dev/ixgbe/ixgbe_phy.c

163

ixgbe_i2c_bus_clear(hw);

sys/dev/ixgbe/ixgbe_phy.c

1631

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1633

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1648

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

165

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_phy.c

1668

s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

1672

enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type;

sys/dev/ixgbe/ixgbe_phy.c

1686

if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber_qsfp) {

sys/dev/ixgbe/ixgbe_phy.c

1687

hw->phy.sfp_type = ixgbe_sfp_type_not_present;

sys/dev/ixgbe/ixgbe_phy.c

1693

hw->mac.ops.set_lan_id(hw);

sys/dev/ixgbe/ixgbe_phy.c

1695

status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER,

sys/dev/ixgbe/ixgbe_phy.c

1702

hw->phy.type = ixgbe_phy_sfp_unsupported;

sys/dev/ixgbe/ixgbe_phy.c

1707

hw->phy.id = identifier;

sys/dev/ixgbe/ixgbe_phy.c

1709

status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_10GBE_COMP,

sys/dev/ixgbe/ixgbe_phy.c

1715

status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_1GBE_COMP,

sys/dev/ixgbe/ixgbe_phy.c

1722

hw->phy.type = ixgbe_phy_qsfp_passive_unknown;

sys/dev/ixgbe/ixgbe_phy.c

1723

if (hw->bus.lan_id == 0)

sys/dev/ixgbe/ixgbe_phy.c

1724

hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core0;

sys/dev/ixgbe/ixgbe_phy.c

1726

hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core1;

sys/dev/ixgbe/ixgbe_phy.c

1729

if (hw->bus.lan_id == 0)

sys/dev/ixgbe/ixgbe_phy.c

1730

hw->phy.sfp_type = ixgbe_sfp_type_srlr_core0;

sys/dev/ixgbe/ixgbe_phy.c

1732

hw->phy.sfp_type = ixgbe_sfp_type_srlr_core1;

sys/dev/ixgbe/ixgbe_phy.c

1740

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1744

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1748

hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1761

hw->phy.type = ixgbe_phy_qsfp_active_unknown;

sys/dev/ixgbe/ixgbe_phy.c

1762

if (hw->bus.lan_id == 0)

sys/dev/ixgbe/ixgbe_phy.c

1763

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1766

hw->phy.sfp_type =

sys/dev/ixgbe/ixgbe_phy.c

1770

hw->phy.type = ixgbe_phy_sfp_unsupported;

sys/dev/ixgbe/ixgbe_phy.c

1776

if (hw->phy.sfp_type != stored_sfp_type)

sys/dev/ixgbe/ixgbe_phy.c

1777

hw->phy.sfp_setup_needed = true;

sys/dev/ixgbe/ixgbe_phy.c

1780

hw->phy.multispeed_fiber = false;

sys/dev/ixgbe/ixgbe_phy.c

1785

hw->phy.multispeed_fiber = true;

sys/dev/ixgbe/ixgbe_phy.c

1790

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1797

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1804

status = hw->phy.ops.read_i2c_eeprom(hw,

sys/dev/ixgbe/ixgbe_phy.c

1817

hw->phy.type = ixgbe_phy_qsfp_intel;

sys/dev/ixgbe/ixgbe_phy.c

1819

hw->phy.type = ixgbe_phy_qsfp_unknown;

sys/dev/ixgbe/ixgbe_phy.c

1821

ixgbe_get_device_caps(hw, &enforce_sfp);

sys/dev/ixgbe/ixgbe_phy.c

1824

if (hw->phy.type == ixgbe_phy_qsfp_intel) {

sys/dev/ixgbe/ixgbe_phy.c

1827

if (hw->allow_unsupported_sfp == true) {

sys/dev/ixgbe/ixgbe_phy.c

1829

EWARN(hw,

sys/dev/ixgbe/ixgbe_phy.c

1837

hw->phy.type =

sys/dev/ixgbe/ixgbe_phy.c

1851

hw->phy.sfp_type = ixgbe_sfp_type_not_present;

sys/dev/ixgbe/ixgbe_phy.c

1852

hw->phy.id = 0;

sys/dev/ixgbe/ixgbe_phy.c

1853

hw->phy.type = ixgbe_phy_unknown;

sys/dev/ixgbe/ixgbe_phy.c

186

s32 ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *hw, u8 addr, u16 reg,

sys/dev/ixgbe/ixgbe_phy.c

1867

s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_phy.c

1872

u16 sfp_type = hw->phy.sfp_type;

sys/dev/ixgbe/ixgbe_phy.c

1876

if (hw->phy.sfp_type == ixgbe_sfp_type_unknown)

sys/dev/ixgbe/ixgbe_phy.c

1879

if (hw->phy.sfp_type == ixgbe_sfp_type_not_present)

sys/dev/ixgbe/ixgbe_phy.c

1882

if ((hw->device_id == IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM) &&

sys/dev/ixgbe/ixgbe_phy.c

1883

(hw->phy.sfp_type == ixgbe_sfp_type_da_cu))

sys/dev/ixgbe/ixgbe_phy.c

189

u32 swfw_mask = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/ixgbe_phy.c

1904

if (hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset)) {

sys/dev/ixgbe/ixgbe_phy.c

1921

if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id))

sys/dev/ixgbe/ixgbe_phy.c

1927

if (hw->eeprom.ops.read(hw, *list_offset, data_offset))

sys/dev/ixgbe/ixgbe_phy.c

1937

if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id))

sys/dev/ixgbe/ixgbe_phy.c

1963

s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

1968

return hw->phy.ops.read_i2c_byte(hw, byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

1981

static s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

1984

return hw->phy.ops.read_i2c_byte(hw, byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

1997

s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

2002

return hw->phy.ops.write_i2c_byte(hw, byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

201

if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))

sys/dev/ixgbe/ixgbe_phy.c

2013

static bool ixgbe_is_sfp_probe(struct ixgbe_hw *hw, u8 offset, u8 addr)

sys/dev/ixgbe/ixgbe_phy.c

2017

hw->phy.sfp_type == ixgbe_sfp_type_not_present)

sys/dev/ixgbe/ixgbe_phy.c

203

ixgbe_i2c_start(hw);

sys/dev/ixgbe/ixgbe_phy.c

2033

static s32 ixgbe_read_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

2039

u32 swfw_mask = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/ixgbe_phy.c

2045

if (hw->mac.type >= ixgbe_mac_X550)

sys/dev/ixgbe/ixgbe_phy.c

2047

if (ixgbe_is_sfp_probe(hw, byte_offset, dev_addr))

sys/dev/ixgbe/ixgbe_phy.c

205

if (ixgbe_out_i2c_byte_ack(hw, addr))

sys/dev/ixgbe/ixgbe_phy.c

2051

if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask))

sys/dev/ixgbe/ixgbe_phy.c

2054

ixgbe_i2c_start(hw);

sys/dev/ixgbe/ixgbe_phy.c

2057

status = ixgbe_clock_out_i2c_byte(hw, dev_addr);

sys/dev/ixgbe/ixgbe_phy.c

2061

status = ixgbe_get_i2c_ack(hw);

sys/dev/ixgbe/ixgbe_phy.c

2065

status = ixgbe_clock_out_i2c_byte(hw, byte_offset);

sys/dev/ixgbe/ixgbe_phy.c

2069

status = ixgbe_get_i2c_ack(hw);

sys/dev/ixgbe/ixgbe_phy.c

2073

ixgbe_i2c_start(hw);

sys/dev/ixgbe/ixgbe_phy.c

2076

status = ixgbe_clock_out_i2c_byte(hw, (dev_addr | 0x1));

sys/dev/ixgbe/ixgbe_phy.c

208

if (ixgbe_out_i2c_byte_ack(hw, reg_high))

sys/dev/ixgbe/ixgbe_phy.c

2080

status = ixgbe_get_i2c_ack(hw);

sys/dev/ixgbe/ixgbe_phy.c

2084

ixgbe_clock_in_i2c_byte(hw, data);

sys/dev/ixgbe/ixgbe_phy.c

2086

status = ixgbe_clock_out_i2c_bit(hw, nack);

sys/dev/ixgbe/ixgbe_phy.c

2090

ixgbe_i2c_stop(hw);

sys/dev/ixgbe/ixgbe_phy.c

2092

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_phy.c

2096

ixgbe_i2c_bus_clear(hw);

sys/dev/ixgbe/ixgbe_phy.c

2098

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_phy.c

211

if (ixgbe_out_i2c_byte_ack(hw, reg & 0xFF))

sys/dev/ixgbe/ixgbe_phy.c

2121

s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

2124

return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr,

sys/dev/ixgbe/ixgbe_phy.c

2138

s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

214

if (ixgbe_out_i2c_byte_ack(hw, val >> 8))

sys/dev/ixgbe/ixgbe_phy.c

2141

return ixgbe_read_i2c_byte_generic_int(hw, byte_offset, dev_addr,

sys/dev/ixgbe/ixgbe_phy.c

2156

static s32 ixgbe_write_i2c_byte_generic_int(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

2162

u32 swfw_mask = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/ixgbe_phy.c

2166

if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) !=

sys/dev/ixgbe/ixgbe_phy.c

217

if (ixgbe_out_i2c_byte_ack(hw, val & 0xFF))

sys/dev/ixgbe/ixgbe_phy.c

2171

ixgbe_i2c_start(hw);

sys/dev/ixgbe/ixgbe_phy.c

2173

status = ixgbe_clock_out_i2c_byte(hw, dev_addr);

sys/dev/ixgbe/ixgbe_phy.c

2177

status = ixgbe_get_i2c_ack(hw);

sys/dev/ixgbe/ixgbe_phy.c

2181

status = ixgbe_clock_out_i2c_byte(hw, byte_offset);

sys/dev/ixgbe/ixgbe_phy.c

2185

status = ixgbe_get_i2c_ack(hw);

sys/dev/ixgbe/ixgbe_phy.c

2189

status = ixgbe_clock_out_i2c_byte(hw, data);

sys/dev/ixgbe/ixgbe_phy.c

2193

status = ixgbe_get_i2c_ack(hw);

sys/dev/ixgbe/ixgbe_phy.c

2197

ixgbe_i2c_stop(hw);

sys/dev/ixgbe/ixgbe_phy.c

2199

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_phy.c

220

if (ixgbe_out_i2c_byte_ack(hw, csum))

sys/dev/ixgbe/ixgbe_phy.c

2203

ixgbe_i2c_bus_clear(hw);

sys/dev/ixgbe/ixgbe_phy.c

2212

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_phy.c

222

ixgbe_i2c_stop(hw);

sys/dev/ixgbe/ixgbe_phy.c

2227

s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

2230

return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr,

sys/dev/ixgbe/ixgbe_phy.c

224

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_phy.c

2244

s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

2247

return ixgbe_write_i2c_byte_generic_int(hw, byte_offset, dev_addr,

sys/dev/ixgbe/ixgbe_phy.c

2258

static void ixgbe_i2c_start(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

2260

u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2264

i2cctl |= IXGBE_I2C_BB_EN_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2267

ixgbe_set_i2c_data(hw, &i2cctl, 1);

sys/dev/ixgbe/ixgbe_phy.c

2268

ixgbe_raise_i2c_clk(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2273

ixgbe_set_i2c_data(hw, &i2cctl, 0);

sys/dev/ixgbe/ixgbe_phy.c

2278

ixgbe_lower_i2c_clk(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

228

ixgbe_i2c_bus_clear(hw);

sys/dev/ixgbe/ixgbe_phy.c

2293

static void ixgbe_i2c_stop(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

2295

u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2296

u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2297

u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2298

u32 bb_en_bit = IXGBE_I2C_BB_EN_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

230

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_phy.c

2303

ixgbe_set_i2c_data(hw, &i2cctl, 0);

sys/dev/ixgbe/ixgbe_phy.c

2304

ixgbe_raise_i2c_clk(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2309

ixgbe_set_i2c_data(hw, &i2cctl, 1);

sys/dev/ixgbe/ixgbe_phy.c

2317

IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2318

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_phy.c

2329

static void ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data)

sys/dev/ixgbe/ixgbe_phy.c

2338

ixgbe_clock_in_i2c_bit(hw, &bit);

sys/dev/ixgbe/ixgbe_phy.c

2350

static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data)

sys/dev/ixgbe/ixgbe_phy.c

2361

status = ixgbe_clock_out_i2c_bit(hw, bit);

sys/dev/ixgbe/ixgbe_phy.c

2368

i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2369

i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2370

i2cctl |= IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2371

IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2372

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_phy.c

2383

static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

2385

u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2388

u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2395

i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2397

IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2398

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_phy.c

2400

ixgbe_raise_i2c_clk(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2408

i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2409

ack = ixgbe_get_i2c_data(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2421

ixgbe_lower_i2c_clk(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2436

static void ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data)

sys/dev/ixgbe/ixgbe_phy.c

2438

u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2439

u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2444

i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2446

IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2447

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_phy.c

2449

ixgbe_raise_i2c_clk(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2454

i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2455

*data = ixgbe_get_i2c_data(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2457

ixgbe_lower_i2c_clk(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

247

s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

2470

static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data)

sys/dev/ixgbe/ixgbe_phy.c

2473

u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2477

status = ixgbe_set_i2c_data(hw, &i2cctl, data);

sys/dev/ixgbe/ixgbe_phy.c

2479

ixgbe_raise_i2c_clk(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2484

ixgbe_lower_i2c_clk(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

249

struct ixgbe_phy_info *phy = &hw->phy;

sys/dev/ixgbe/ixgbe_phy.c

2507

static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)

sys/dev/ixgbe/ixgbe_phy.c

2509

u32 clk_oe_bit = IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2518

IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2522

*i2cctl |= IXGBE_I2C_CLK_OUT_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2524

IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2525

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_phy.c

2529

i2cctl_r = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2530

if (i2cctl_r & IXGBE_I2C_CLK_IN_BY_MAC(hw))

sys/dev/ixgbe/ixgbe_phy.c

2543

static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)

sys/dev/ixgbe/ixgbe_phy.c

2547

*i2cctl &= ~(IXGBE_I2C_CLK_OUT_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2548

*i2cctl &= ~IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2550

IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2551

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_phy.c

2566

static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data)

sys/dev/ixgbe/ixgbe_phy.c

2568

u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2574

*i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2576

*i2cctl &= ~(IXGBE_I2C_DATA_OUT_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2579

IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2580

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_phy.c

2589

IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2590

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_phy.c

2594

*i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2595

if (data != ixgbe_get_i2c_data(hw, i2cctl)) {

sys/dev/ixgbe/ixgbe_phy.c

2613

static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl)

sys/dev/ixgbe/ixgbe_phy.c

2615

u32 data_oe_bit = IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);

sys/dev/ixgbe/ixgbe_phy.c

2622

IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2623

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_phy.c

2627

if (*i2cctl & IXGBE_I2C_DATA_IN_BY_MAC(hw))

sys/dev/ixgbe/ixgbe_phy.c

2642

void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

2649

ixgbe_i2c_start(hw);

sys/dev/ixgbe/ixgbe_phy.c

2650

i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_phy.c

2652

ixgbe_set_i2c_data(hw, &i2cctl, 1);

sys/dev/ixgbe/ixgbe_phy.c

2655

ixgbe_raise_i2c_clk(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2660

ixgbe_lower_i2c_clk(hw, &i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

2666

ixgbe_i2c_start(hw);

sys/dev/ixgbe/ixgbe_phy.c

2669

ixgbe_i2c_stop(hw);

sys/dev/ixgbe/ixgbe_phy.c

2678

s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

2685

if (hw->device_id != IXGBE_DEV_ID_82599_T3_LOM)

sys/dev/ixgbe/ixgbe_phy.c

2689

hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG,

sys/dev/ixgbe/ixgbe_phy.c

2706

s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on)

sys/dev/ixgbe/ixgbe_phy.c

2711

if (!on && ixgbe_mng_present(hw))

sys/dev/ixgbe/ixgbe_phy.c

2714

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL,

sys/dev/ixgbe/ixgbe_phy.c

2723

if (ixgbe_check_reset_blocked(hw))

sys/dev/ixgbe/ixgbe_phy.c

2728

status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL,

sys/dev/ixgbe/ixgbe_phy.c

286

static bool ixgbe_probe_phy(struct ixgbe_hw *hw, u16 phy_addr)

sys/dev/ixgbe/ixgbe_phy.c

290

if (!ixgbe_validate_phy_addr(hw, phy_addr)) {

sys/dev/ixgbe/ixgbe_phy.c

296

if (ixgbe_get_phy_id(hw))

sys/dev/ixgbe/ixgbe_phy.c

299

hw->phy.type = ixgbe_get_phy_type_from_id(hw->phy.id);

sys/dev/ixgbe/ixgbe_phy.c

301

if (hw->phy.type == ixgbe_phy_unknown) {

sys/dev/ixgbe/ixgbe_phy.c

302

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/ixgbe/ixgbe_phy.c

307

hw->phy.type = ixgbe_phy_cu_unknown;

sys/dev/ixgbe/ixgbe_phy.c

309

hw->phy.type = ixgbe_phy_generic;

sys/dev/ixgbe/ixgbe_phy.c

321

s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

328

if (!hw->phy.phy_semaphore_mask) {

sys/dev/ixgbe/ixgbe_phy.c

329

if (hw->bus.lan_id)

sys/dev/ixgbe/ixgbe_phy.c

330

hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM;

sys/dev/ixgbe/ixgbe_phy.c

332

hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM;

sys/dev/ixgbe/ixgbe_phy.c

335

if (hw->phy.type != ixgbe_phy_unknown)

sys/dev/ixgbe/ixgbe_phy.c

338

if (hw->phy.nw_mng_if_sel) {

sys/dev/ixgbe/ixgbe_phy.c

339

phy_addr = (hw->phy.nw_mng_if_sel &

sys/dev/ixgbe/ixgbe_phy.c

342

if (ixgbe_probe_phy(hw, phy_addr))

sys/dev/ixgbe/ixgbe_phy.c

349

if (ixgbe_probe_phy(hw, phy_addr)) {

sys/dev/ixgbe/ixgbe_phy.c

360

hw->phy.addr = 0;

sys/dev/ixgbe/ixgbe_phy.c

374

s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

381

if (hw->mac.type == ixgbe_mac_82598EB)

sys/dev/ixgbe/ixgbe_phy.c

384

mmngc = IXGBE_READ_REG(hw, IXGBE_MMNGC);

sys/dev/ixgbe/ixgbe_phy.c

39

static void ixgbe_i2c_start(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.c

40

static void ixgbe_i2c_stop(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.c

400

bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr)

sys/dev/ixgbe/ixgbe_phy.c

407

hw->phy.addr = phy_addr;

sys/dev/ixgbe/ixgbe_phy.c

408

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,

sys/dev/ixgbe/ixgbe_phy.c

41

static void ixgbe_clock_in_i2c_byte(struct ixgbe_hw *hw, u8 *data);

sys/dev/ixgbe/ixgbe_phy.c

42

static s32 ixgbe_clock_out_i2c_byte(struct ixgbe_hw *hw, u8 data);

sys/dev/ixgbe/ixgbe_phy.c

424

s32 ixgbe_get_phy_id(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

43

static s32 ixgbe_get_i2c_ack(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.c

432

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,

sys/dev/ixgbe/ixgbe_phy.c

437

hw->phy.id = (u32)(phy_id_high << 16);

sys/dev/ixgbe/ixgbe_phy.c

438

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_LOW,

sys/dev/ixgbe/ixgbe_phy.c

44

static void ixgbe_clock_in_i2c_bit(struct ixgbe_hw *hw, bool *data);

sys/dev/ixgbe/ixgbe_phy.c

441

hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK);

sys/dev/ixgbe/ixgbe_phy.c

442

hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK);

sys/dev/ixgbe/ixgbe_phy.c

45

static s32 ixgbe_clock_out_i2c_bit(struct ixgbe_hw *hw, bool data);

sys/dev/ixgbe/ixgbe_phy.c

46

static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

47

static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

48

static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);

sys/dev/ixgbe/ixgbe_phy.c

49

static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);

sys/dev/ixgbe/ixgbe_phy.c

494

s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

50

static s32 ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.c

502

if (hw->phy.type == ixgbe_phy_unknown)

sys/dev/ixgbe/ixgbe_phy.c

503

status = ixgbe_identify_phy_generic(hw);

sys/dev/ixgbe/ixgbe_phy.c

505

if (status != IXGBE_SUCCESS || hw->phy.type == ixgbe_phy_none)

sys/dev/ixgbe/ixgbe_phy.c

509

if (!hw->phy.reset_if_overtemp &&

sys/dev/ixgbe/ixgbe_phy.c

510

(IXGBE_ERR_OVERTEMP == hw->phy.ops.check_overtemp(hw)))

sys/dev/ixgbe/ixgbe_phy.c

514

if (ixgbe_check_reset_blocked(hw))

sys/dev/ixgbe/ixgbe_phy.c

521

hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,

sys/dev/ixgbe/ixgbe_phy.c

532

if (hw->phy.type == ixgbe_phy_x550em_ext_t) {

sys/dev/ixgbe/ixgbe_phy.c

533

status = hw->phy.ops.read_reg(hw,

sys/dev/ixgbe/ixgbe_phy.c

545

status = hw->phy.ops.read_reg(hw,

sys/dev/ixgbe/ixgbe_phy.c

573

void ixgbe_restart_auto_neg(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

578

if (ixgbe_check_reset_blocked(hw))

sys/dev/ixgbe/ixgbe_phy.c

582

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,

sys/dev/ixgbe/ixgbe_phy.c

585

hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,

sys/dev/ixgbe/ixgbe_phy.c

597

s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

sys/dev/ixgbe/ixgbe_phy.c

60

static s32 ixgbe_out_i2c_byte_ack(struct ixgbe_hw *hw, u8 byte)

sys/dev/ixgbe/ixgbe_phy.c

605

(hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) |

sys/dev/ixgbe/ixgbe_phy.c

608

IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);

sys/dev/ixgbe/ixgbe_phy.c

618

command = IXGBE_READ_REG(hw, IXGBE_MSCA);

sys/dev/ixgbe/ixgbe_phy.c

636

(hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) |

sys/dev/ixgbe/ixgbe_phy.c

639

IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);

sys/dev/ixgbe/ixgbe_phy.c

64

status = ixgbe_clock_out_i2c_byte(hw, byte);

sys/dev/ixgbe/ixgbe_phy.c

649

command = IXGBE_READ_REG(hw, IXGBE_MSCA);

sys/dev/ixgbe/ixgbe_phy.c

664

data = IXGBE_READ_REG(hw, IXGBE_MSRWD);

sys/dev/ixgbe/ixgbe_phy.c

67

return ixgbe_get_i2c_ack(hw);

sys/dev/ixgbe/ixgbe_phy.c

679

s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_phy.c

683

u32 gssr = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/ixgbe_phy.c

687

if (hw->mac.ops.acquire_swfw_sync(hw, gssr))

sys/dev/ixgbe/ixgbe_phy.c

690

status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data);

sys/dev/ixgbe/ixgbe_phy.c

692

hw->mac.ops.release_swfw_sync(hw, gssr);

sys/dev/ixgbe/ixgbe_phy.c

705

s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_phy.c

711

IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data);

sys/dev/ixgbe/ixgbe_phy.c

716

(hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) |

sys/dev/ixgbe/ixgbe_phy.c

719

IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);

sys/dev/ixgbe/ixgbe_phy.c

729

command = IXGBE_READ_REG(hw, IXGBE_MSCA);

sys/dev/ixgbe/ixgbe_phy.c

745

(hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) |

sys/dev/ixgbe/ixgbe_phy.c

748

IXGBE_WRITE_REG(hw, IXGBE_MSCA, command);

sys/dev/ixgbe/ixgbe_phy.c

758

command = IXGBE_READ_REG(hw, IXGBE_MSCA);

sys/dev/ixgbe/ixgbe_phy.c

77

static s32 ixgbe_in_i2c_byte_ack(struct ixgbe_hw *hw, u8 *byte)

sys/dev/ixgbe/ixgbe_phy.c

779

s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_phy.c

783

u32 gssr = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/ixgbe_phy.c

787

if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == IXGBE_SUCCESS) {

sys/dev/ixgbe/ixgbe_phy.c

788

status = hw->phy.ops.write_reg_mdi(hw, reg_addr, device_type,

sys/dev/ixgbe/ixgbe_phy.c

79

ixgbe_clock_in_i2c_byte(hw, byte);

sys/dev/ixgbe/ixgbe_phy.c

790

hw->mac.ops.release_swfw_sync(hw, gssr);

sys/dev/ixgbe/ixgbe_phy.c

804

s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

81

return ixgbe_clock_out_i2c_bit(hw, false);

sys/dev/ixgbe/ixgbe_phy.c

813

ixgbe_get_copper_link_capabilities_generic(hw, &speed, &autoneg);

sys/dev/ixgbe/ixgbe_phy.c

816

hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/ixgbe/ixgbe_phy.c

821

if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) &&

sys/dev/ixgbe/ixgbe_phy.c

825

hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/ixgbe/ixgbe_phy.c

829

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,

sys/dev/ixgbe/ixgbe_phy.c

833

if (hw->mac.type == ixgbe_mac_X550) {

sys/dev/ixgbe/ixgbe_phy.c

836

if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) &&

sys/dev/ixgbe/ixgbe_phy.c

842

if ((hw->phy.autoneg_advertised &

sys/dev/ixgbe/ixgbe_phy.c

850

if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) &&

sys/dev/ixgbe/ixgbe_phy.c

854

hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,

sys/dev/ixgbe/ixgbe_phy.c

859

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,

sys/dev/ixgbe/ixgbe_phy.c

865

if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) &&

sys/dev/ixgbe/ixgbe_phy.c

869

hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,

sys/dev/ixgbe/ixgbe_phy.c

873

ixgbe_restart_auto_neg(hw);

sys/dev/ixgbe/ixgbe_phy.c

883

s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_phy.c

895

hw->phy.autoneg_advertised = 0;

sys/dev/ixgbe/ixgbe_phy.c

898

hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL;

sys/dev/ixgbe/ixgbe_phy.c

901

hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_5GB_FULL;

sys/dev/ixgbe/ixgbe_phy.c

904

hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_2_5GB_FULL;

sys/dev/ixgbe/ixgbe_phy.c

907

hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL;

sys/dev/ixgbe/ixgbe_phy.c

910

hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL;

sys/dev/ixgbe/ixgbe_phy.c

913

hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10_FULL;

sys/dev/ixgbe/ixgbe_phy.c

916

ixgbe_setup_phy_link(hw);

sys/dev/ixgbe/ixgbe_phy.c

928

static s32 ixgbe_get_copper_speeds_supported(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_phy.c

933

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY,

sys/dev/ixgbe/ixgbe_phy.c

940

hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL;

sys/dev/ixgbe/ixgbe_phy.c

942

hw->phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL;

sys/dev/ixgbe/ixgbe_phy.c

944

hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL;

sys/dev/ixgbe/ixgbe_phy.c

946

switch (hw->mac.type) {

sys/dev/ixgbe/ixgbe_phy.c

948

hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL;

sys/dev/ixgbe/ixgbe_phy.c

949

hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL;

sys/dev/ixgbe/ixgbe_phy.c

953

hw->phy.speeds_supported &= ~IXGBE_LINK_SPEED_100_FULL;

sys/dev/ixgbe/ixgbe_phy.c

968

s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_phy.c

977

if (!hw->phy.speeds_supported)

sys/dev/ixgbe/ixgbe_phy.c

978

status = ixgbe_get_copper_speeds_supported(hw);

sys/dev/ixgbe/ixgbe_phy.c

980

*speed = hw->phy.speeds_supported;

sys/dev/ixgbe/ixgbe_phy.c

993

s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_phy.h

159

s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

160

bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr);

sys/dev/ixgbe/ixgbe_phy.h

162

s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

163

s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

164

s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

165

void ixgbe_restart_auto_neg(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

166

s32 ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

sys/dev/ixgbe/ixgbe_phy.h

168

s32 ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,

sys/dev/ixgbe/ixgbe_phy.h

170

s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_phy.h

172

s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_phy.h

174

s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

175

s32 ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_phy.h

178

s32 ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_phy.h

181

s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

184

s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_phy.h

187

s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

188

s32 ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_phy.h

190

s32 ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_phy.h

193

s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

194

s32 ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on);

sys/dev/ixgbe/ixgbe_phy.h

195

s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

196

s32 ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

197

u64 ixgbe_get_supported_phy_sfp_layer_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

198

s32 ixgbe_identify_qsfp_module_generic(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

199

s32 ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_phy.h

202

s32 ixgbe_tn_check_overtemp(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_phy.h

203

s32 ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.h

205

s32 ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.h

207

s32 ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.h

209

s32 ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.h

211

s32 ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.h

213

s32 ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,

sys/dev/ixgbe/ixgbe_phy.h

215

void ixgbe_i2c_bus_clear(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4019

typedef u8* (*ixgbe_mc_addr_itr) (struct ixgbe_hw *hw, u8 **mc_addr_ptr,

sys/dev/ixgbe/ixgbe_type.h

4063

s32 (*negotiate_api_version)(struct ixgbe_hw *hw, int api);

sys/dev/ixgbe/ixgbe_type.h

4099

s32 (*get_link_state)(struct ixgbe_hw *hw, bool *link_state);

sys/dev/ixgbe/ixgbe_type.h

4109

s32 (*toggle_txdctl)(struct ixgbe_hw *hw, u32 vf_number);

sys/dev/ixgbe/ixgbe_type.h

4122

s32 (*init_thermal_sensor_thresh)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4123

s32 (*bypass_rw) (struct ixgbe_hw *hw, u32 cmd, u32 *status);

sys/dev/ixgbe/ixgbe_type.h

4125

s32 (*bypass_set) (struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);

sys/dev/ixgbe/ixgbe_type.h

4126

s32 (*bypass_rd_eep) (struct ixgbe_hw *hw, u32 addr, u8 *value);

sys/dev/ixgbe/ixgbe_type.h

4127

void (*get_rtrup2tc)(struct ixgbe_hw *hw, u8 *map);

sys/dev/ixgbe/ixgbe_type.h

4128

void (*disable_rx)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4129

void (*enable_rx)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4133

s32 (*dmac_update_tcs)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4134

s32 (*dmac_config_tcs)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4135

s32 (*dmac_config)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4136

s32 (*setup_eee)(struct ixgbe_hw *hw, bool enable_eee);

sys/dev/ixgbe/ixgbe_type.h

4139

void (*disable_mdd)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4140

void (*enable_mdd)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4141

void (*mdd_event)(struct ixgbe_hw *hw, u32 *vf_bitmap);

sys/dev/ixgbe/ixgbe_type.h

4142

void (*restore_mdd_vf)(struct ixgbe_hw *hw, u32 vf);

sys/dev/ixgbe/ixgbe_type.h

4143

bool (*fw_recovery_mode)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4144

bool (*fw_rollback_mode)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4145

bool (*get_fw_tsam_mode)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4146

s32 (*get_fw_version)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4147

s32 (*get_nvm_version)(struct ixgbe_hw *hw, struct ixgbe_nvm_info *nvm);

sys/dev/ixgbe/ixgbe_type.h

4173

s32 (*handle_lasi)(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_type.h

4315

#define ixgbe_call_func(hw, func, params, error) \

sys/dev/ixgbe/ixgbe_vf.c

117

IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);

sys/dev/ixgbe/ixgbe_vf.c

120

IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);

sys/dev/ixgbe/ixgbe_vf.c

121

IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);

sys/dev/ixgbe/ixgbe_vf.c

122

IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);

sys/dev/ixgbe/ixgbe_vf.c

123

IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);

sys/dev/ixgbe/ixgbe_vf.c

124

IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);

sys/dev/ixgbe/ixgbe_vf.c

125

IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);

sys/dev/ixgbe/ixgbe_vf.c

126

IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);

sys/dev/ixgbe/ixgbe_vf.c

127

IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);

sys/dev/ixgbe/ixgbe_vf.c

128

IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);

sys/dev/ixgbe/ixgbe_vf.c

129

IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);

sys/dev/ixgbe/ixgbe_vf.c

130

IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);

sys/dev/ixgbe/ixgbe_vf.c

133

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_vf.c

145

s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_vf.c

148

hw->adapter_stopped = false;

sys/dev/ixgbe/ixgbe_vf.c

160

s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_vf.c

162

s32 status = hw->mac.ops.start_hw(hw);

sys/dev/ixgbe/ixgbe_vf.c

164

hw->mac.ops.get_mac_addr(hw, hw->mac.addr);

sys/dev/ixgbe/ixgbe_vf.c

176

s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_vf.c

178

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_vf.c

187

hw->mac.ops.stop_adapter(hw);

sys/dev/ixgbe/ixgbe_vf.c

190

hw->api_version = ixgbe_mbox_api_10;

sys/dev/ixgbe/ixgbe_vf.c

191

ixgbe_init_mbx_params_vf(hw);

sys/dev/ixgbe/ixgbe_vf.c

195

IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);

sys/dev/ixgbe/ixgbe_vf.c

196

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_vf.c

201

while (!mbx->ops[0].check_for_rst(hw, 0) && timeout) {

sys/dev/ixgbe/ixgbe_vf.c

210

ixgbe_virt_clr_reg(hw);

sys/dev/ixgbe/ixgbe_vf.c

216

IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, 0);

sys/dev/ixgbe/ixgbe_vf.c

217

hw->mbx.vf_mailbox = 0;

sys/dev/ixgbe/ixgbe_vf.c

223

ixgbe_write_mbx(hw, msgbuf, 1, 0);

sys/dev/ixgbe/ixgbe_vf.c

232

ret_val = ixgbe_poll_mbx(hw, msgbuf,

sys/dev/ixgbe/ixgbe_vf.c

242

memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);

sys/dev/ixgbe/ixgbe_vf.c

244

hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];

sys/dev/ixgbe/ixgbe_vf.c

258

s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_vf.c

267

hw->adapter_stopped = true;

sys/dev/ixgbe/ixgbe_vf.c

270

IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);

sys/dev/ixgbe/ixgbe_vf.c

273

IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);

sys/dev/ixgbe/ixgbe_vf.c

276

for (i = 0; i < hw->mac.max_tx_queues; i++)

sys/dev/ixgbe/ixgbe_vf.c

277

IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);

sys/dev/ixgbe/ixgbe_vf.c

280

for (i = 0; i < hw->mac.max_rx_queues; i++) {

sys/dev/ixgbe/ixgbe_vf.c

281

reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));

sys/dev/ixgbe/ixgbe_vf.c

283

IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);

sys/dev/ixgbe/ixgbe_vf.c

286

IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);

sys/dev/ixgbe/ixgbe_vf.c

289

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_vf.c

307

static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)

sys/dev/ixgbe/ixgbe_vf.c

311

switch (hw->mac.mc_filter_type) {

sys/dev/ixgbe/ixgbe_vf.c

335

static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,

sys/dev/ixgbe/ixgbe_vf.c

338

s32 retval = ixgbe_write_mbx(hw, msg, size, 0);

sys/dev/ixgbe/ixgbe_vf.c

343

return ixgbe_poll_mbx(hw, retmsg, size, 0);

sys/dev/ixgbe/ixgbe_vf.c

354

s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

sys/dev/ixgbe/ixgbe_vf.c

365

ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);

sys/dev/ixgbe/ixgbe_vf.c

372

ixgbe_get_mac_addr_vf(hw, hw->mac.addr);

sys/dev/ixgbe/ixgbe_vf.c

389

s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,

sys/dev/ixgbe/ixgbe_vf.c

419

vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));

sys/dev/ixgbe/ixgbe_vf.c

424

return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, IXGBE_VFMAILBOX_SIZE);

sys/dev/ixgbe/ixgbe_vf.c

434

s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)

sys/dev/ixgbe/ixgbe_vf.c

439

switch (hw->api_version) {

sys/dev/ixgbe/ixgbe_vf.c

455

err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);

sys/dev/ixgbe/ixgbe_vf.c

472

s32 ixgbe_get_link_state_vf(struct ixgbe_hw *hw, bool *link_state)

sys/dev/ixgbe/ixgbe_vf.c

481

err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);

sys/dev/ixgbe/ixgbe_vf.c

50

s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_vf.c

503

s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,

sys/dev/ixgbe/ixgbe_vf.c

515

ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);

sys/dev/ixgbe/ixgbe_vf.c

528

u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_vf.c

530

UNREFERENCED_1PARAMETER(hw);

sys/dev/ixgbe/ixgbe_vf.c

540

u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_vf.c

542

UNREFERENCED_1PARAMETER(hw);

sys/dev/ixgbe/ixgbe_vf.c

55

hw->mac.ops.init_hw = ixgbe_init_hw_vf;

sys/dev/ixgbe/ixgbe_vf.c

551

s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)

sys/dev/ixgbe/ixgbe_vf.c

556

mac_addr[i] = hw->mac.perm_addr[i];

sys/dev/ixgbe/ixgbe_vf.c

56

hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;

sys/dev/ixgbe/ixgbe_vf.c

561

s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)

sys/dev/ixgbe/ixgbe_vf.c

57

hw->mac.ops.start_hw = ixgbe_start_hw_vf;

sys/dev/ixgbe/ixgbe_vf.c

580

ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);

sys/dev/ixgbe/ixgbe_vf.c

59

hw->mac.ops.clear_hw_cntrs = NULL;

sys/dev/ixgbe/ixgbe_vf.c

599

s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_vf.c

60

hw->mac.ops.get_media_type = NULL;

sys/dev/ixgbe/ixgbe_vf.c

602

UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);

sys/dev/ixgbe/ixgbe_vf.c

61

hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;

sys/dev/ixgbe/ixgbe_vf.c

615

s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_vf.c

618

struct ixgbe_mbx_info *mbx = &hw->mbx;

sys/dev/ixgbe/ixgbe_vf.c

619

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_vf.c

62

hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;

sys/dev/ixgbe/ixgbe_vf.c

627

if (!mbx->ops[0].check_for_rst(hw, 0) || !mbx->timeout)

sys/dev/ixgbe/ixgbe_vf.c

63

hw->mac.ops.get_bus_info = NULL;

sys/dev/ixgbe/ixgbe_vf.c

634

links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);

sys/dev/ixgbe/ixgbe_vf.c

64

hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version;

sys/dev/ixgbe/ixgbe_vf.c

646

links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);

sys/dev/ixgbe/ixgbe_vf.c

656

if (hw->mac.type >= ixgbe_mac_X550_vf) {

sys/dev/ixgbe/ixgbe_vf.c

666

if (hw->mac.type == ixgbe_mac_X550_vf ||

sys/dev/ixgbe/ixgbe_vf.c

667

hw->mac.type == ixgbe_mac_E610_vf) {

sys/dev/ixgbe/ixgbe_vf.c

67

hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;

sys/dev/ixgbe/ixgbe_vf.c

675

if (hw->mac.type >= ixgbe_mac_X550_vf)

sys/dev/ixgbe/ixgbe_vf.c

68

hw->mac.ops.check_link = ixgbe_check_mac_link_vf;

sys/dev/ixgbe/ixgbe_vf.c

685

if (ixgbe_read_mbx(hw, &in_msg, 1, 0)) {

sys/dev/ixgbe/ixgbe_vf.c

686

if (hw->api_version >= ixgbe_mbox_api_15)

sys/dev/ixgbe/ixgbe_vf.c

69

hw->mac.ops.get_link_capabilities = NULL;

sys/dev/ixgbe/ixgbe_vf.c

719

s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)

sys/dev/ixgbe/ixgbe_vf.c

72

hw->mac.ops.set_rar = ixgbe_set_rar_vf;

sys/dev/ixgbe/ixgbe_vf.c

727

retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);

sys/dev/ixgbe/ixgbe_vf.c

73

hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;

sys/dev/ixgbe/ixgbe_vf.c

74

hw->mac.ops.init_rx_addrs = NULL;

sys/dev/ixgbe/ixgbe_vf.c

742

int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)

sys/dev/ixgbe/ixgbe_vf.c

75

hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;

sys/dev/ixgbe/ixgbe_vf.c

752

err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3);

sys/dev/ixgbe/ixgbe_vf.c

758

hw->api_version = api;

sys/dev/ixgbe/ixgbe_vf.c

76

hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;

sys/dev/ixgbe/ixgbe_vf.c

768

int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,

sys/dev/ixgbe/ixgbe_vf.c

77

hw->mac.ops.get_link_state = ixgbe_get_link_state_vf;

sys/dev/ixgbe/ixgbe_vf.c

775

switch (hw->api_version) {

sys/dev/ixgbe/ixgbe_vf.c

78

hw->mac.ops.enable_mc = NULL;

sys/dev/ixgbe/ixgbe_vf.c

789

err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5);

sys/dev/ixgbe/ixgbe_vf.c

79

hw->mac.ops.disable_mc = NULL;

sys/dev/ixgbe/ixgbe_vf.c

80

hw->mac.ops.clear_vfta = NULL;

sys/dev/ixgbe/ixgbe_vf.c

802

hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];

sys/dev/ixgbe/ixgbe_vf.c

803

if (hw->mac.max_tx_queues == 0 ||

sys/dev/ixgbe/ixgbe_vf.c

804

hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)

sys/dev/ixgbe/ixgbe_vf.c

805

hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;

sys/dev/ixgbe/ixgbe_vf.c

807

hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];

sys/dev/ixgbe/ixgbe_vf.c

808

if (hw->mac.max_rx_queues == 0 ||

sys/dev/ixgbe/ixgbe_vf.c

809

hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)

sys/dev/ixgbe/ixgbe_vf.c

81

hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;

sys/dev/ixgbe/ixgbe_vf.c

810

hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;

sys/dev/ixgbe/ixgbe_vf.c

814

if (*num_tcs > hw->mac.max_rx_queues)

sys/dev/ixgbe/ixgbe_vf.c

819

if (*default_tc >= hw->mac.max_tx_queues)

sys/dev/ixgbe/ixgbe_vf.c

82

hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf;

sys/dev/ixgbe/ixgbe_vf.c

84

hw->mac.max_tx_queues = 1;

sys/dev/ixgbe/ixgbe_vf.c

85

hw->mac.max_rx_queues = 1;

sys/dev/ixgbe/ixgbe_vf.c

88

hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_vf;

sys/dev/ixgbe/ixgbe_vf.c

96

static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_vf.h

118

s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_vf.h

119

s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_vf.h

120

s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_vf.h

121

s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_vf.h

122

s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_vf.h

123

u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_vf.h

124

u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_vf.h

125

s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr);

sys/dev/ixgbe/ixgbe_vf.h

126

s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_vf.h

128

s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_vf.h

130

s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,

sys/dev/ixgbe/ixgbe_vf.h

132

s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr);

sys/dev/ixgbe/ixgbe_vf.h

133

s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,

sys/dev/ixgbe/ixgbe_vf.h

136

s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode);

sys/dev/ixgbe/ixgbe_vf.h

137

s32 ixgbe_get_link_state_vf(struct ixgbe_hw *hw, bool *link_state);

sys/dev/ixgbe/ixgbe_vf.h

138

s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,

sys/dev/ixgbe/ixgbe_vf.h

140

s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size);

sys/dev/ixgbe/ixgbe_vf.h

141

int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api);

sys/dev/ixgbe/ixgbe_vf.h

142

int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,

sys/dev/ixgbe/ixgbe_x540.c

1007

ixgbe_acquire_swfw_sync_X540(hw, rmask);

sys/dev/ixgbe/ixgbe_x540.c

1008

ixgbe_release_swfw_sync_X540(hw, rmask);

sys/dev/ixgbe/ixgbe_x540.c

1019

s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_x540.c

1036

hw->mac.ops.check_link(hw, &speed, &link_up, false);

sys/dev/ixgbe/ixgbe_x540.c

1038

macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);

sys/dev/ixgbe/ixgbe_x540.c

1040

IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);

sys/dev/ixgbe/ixgbe_x540.c

1043

ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);

sys/dev/ixgbe/ixgbe_x540.c

1046

IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);

sys/dev/ixgbe/ixgbe_x540.c

1047

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_x540.c

1060

s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index)

sys/dev/ixgbe/ixgbe_x540.c

1071

ledctl_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);

sys/dev/ixgbe/ixgbe_x540.c

1075

IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg);

sys/dev/ixgbe/ixgbe_x540.c

1078

macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);

sys/dev/ixgbe/ixgbe_x540.c

1080

IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);

sys/dev/ixgbe/ixgbe_x540.c

1081

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_x540.c

139

mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw);

sys/dev/ixgbe/ixgbe_x540.c

146

mac->arc_subsystem_valid = !!(IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw))

sys/dev/ixgbe/ixgbe_x540.c

150

hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_pf;

sys/dev/ixgbe/ixgbe_x540.c

172

s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x540.c

176

ixgbe_get_copper_link_capabilities_generic(hw, speed, autoneg);

sys/dev/ixgbe/ixgbe_x540.c

187

enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

189

UNREFERENCED_1PARAMETER(hw);

sys/dev/ixgbe/ixgbe_x540.c

199

s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x540.c

204

return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait_to_complete);

sys/dev/ixgbe/ixgbe_x540.c

214

s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

218

u32 swfw_mask = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/ixgbe_x540.c

223

status = hw->mac.ops.stop_adapter(hw);

sys/dev/ixgbe/ixgbe_x540.c

228

ixgbe_clear_tx_pending(hw);

sys/dev/ixgbe/ixgbe_x540.c

231

status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_x540.c

238

ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);

sys/dev/ixgbe/ixgbe_x540.c

239

IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);

sys/dev/ixgbe/ixgbe_x540.c

240

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_x540.c

241

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_x540.c

246

ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);

sys/dev/ixgbe/ixgbe_x540.c

263

if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {

sys/dev/ixgbe/ixgbe_x540.c

264

hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;

sys/dev/ixgbe/ixgbe_x540.c

269

IXGBE_WRITE_REG(hw, IXGBE_RXPBSIZE(0), 384 << IXGBE_RXPBSIZE_SHIFT);

sys/dev/ixgbe/ixgbe_x540.c

272

hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);

sys/dev/ixgbe/ixgbe_x540.c

279

hw->mac.num_rar_entries = 128;

sys/dev/ixgbe/ixgbe_x540.c

280

hw->mac.ops.init_rx_addrs(hw);

sys/dev/ixgbe/ixgbe_x540.c

283

hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr);

sys/dev/ixgbe/ixgbe_x540.c

286

if (ixgbe_validate_mac_addr(hw->mac.san_addr) == 0) {

sys/dev/ixgbe/ixgbe_x540.c

288

hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1;

sys/dev/ixgbe/ixgbe_x540.c

290

hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index,

sys/dev/ixgbe/ixgbe_x540.c

291

hw->mac.san_addr, 0, IXGBE_RAH_AV);

sys/dev/ixgbe/ixgbe_x540.c

294

hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index,

sys/dev/ixgbe/ixgbe_x540.c

298

hw->mac.num_rar_entries--;

sys/dev/ixgbe/ixgbe_x540.c

302

hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix,

sys/dev/ixgbe/ixgbe_x540.c

303

&hw->mac.wwpn_prefix);

sys/dev/ixgbe/ixgbe_x540.c

317

s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

323

ret_val = ixgbe_start_hw_generic(hw);

sys/dev/ixgbe/ixgbe_x540.c

327

ixgbe_start_hw_gen2(hw);

sys/dev/ixgbe/ixgbe_x540.c

339

u64 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

346

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/ixgbe/ixgbe_x540.c

365

s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

367

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_x540.c

377

eec = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_x540.c

398

s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data)

sys/dev/ixgbe/ixgbe_x540.c

403

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==

sys/dev/ixgbe/ixgbe_x540.c

405

status = ixgbe_read_eerd_generic(hw, offset, data);

sys/dev/ixgbe/ixgbe_x540.c

406

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/ixgbe/ixgbe_x540.c

423

s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x540.c

429

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==

sys/dev/ixgbe/ixgbe_x540.c

431

status = ixgbe_read_eerd_buffer_generic(hw, offset,

sys/dev/ixgbe/ixgbe_x540.c

433

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/ixgbe/ixgbe_x540.c

449

s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data)

sys/dev/ixgbe/ixgbe_x540.c

454

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==

sys/dev/ixgbe/ixgbe_x540.c

456

status = ixgbe_write_eewr_generic(hw, offset, data);

sys/dev/ixgbe/ixgbe_x540.c

457

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/ixgbe/ixgbe_x540.c

474

s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x540.c

48

static s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.c

480

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==

sys/dev/ixgbe/ixgbe_x540.c

482

status = ixgbe_write_eewr_buffer_generic(hw, offset,

sys/dev/ixgbe/ixgbe_x540.c

484

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/ixgbe/ixgbe_x540.c

49

static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.c

50

static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.c

502

s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

522

if (ixgbe_read_eerd_generic(hw, i, &word)) {

sys/dev/ixgbe/ixgbe_x540.c

536

if (ixgbe_read_eerd_generic(hw, i, &pointer)) {

sys/dev/ixgbe/ixgbe_x540.c

543

pointer >= hw->eeprom.word_size)

sys/dev/ixgbe/ixgbe_x540.c

546

if (ixgbe_read_eerd_generic(hw, pointer, &length)) {

sys/dev/ixgbe/ixgbe_x540.c

553

(pointer + length) >= hw->eeprom.word_size)

sys/dev/ixgbe/ixgbe_x540.c

557

if (ixgbe_read_eerd_generic(hw, j, &word)) {

sys/dev/ixgbe/ixgbe_x540.c

578

s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x540.c

59

s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

591

status = hw->eeprom.ops.read(hw, 0, &checksum);

sys/dev/ixgbe/ixgbe_x540.c

597

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))

sys/dev/ixgbe/ixgbe_x540.c

600

status = hw->eeprom.ops.calc_checksum(hw);

sys/dev/ixgbe/ixgbe_x540.c

609

status = ixgbe_read_eerd_generic(hw, IXGBE_EEPROM_CHECKSUM,

sys/dev/ixgbe/ixgbe_x540.c

61

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_x540.c

62

struct ixgbe_phy_info *phy = &hw->phy;

sys/dev/ixgbe/ixgbe_x540.c

628

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/ixgbe/ixgbe_x540.c

63

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_x540.c

641

s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

652

status = hw->eeprom.ops.read(hw, 0, &checksum);

sys/dev/ixgbe/ixgbe_x540.c

658

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))

sys/dev/ixgbe/ixgbe_x540.c

661

status = hw->eeprom.ops.calc_checksum(hw);

sys/dev/ixgbe/ixgbe_x540.c

670

status = ixgbe_write_eewr_generic(hw, IXGBE_EEPROM_CHECKSUM, checksum);

sys/dev/ixgbe/ixgbe_x540.c

674

status = ixgbe_update_flash_X540(hw);

sys/dev/ixgbe/ixgbe_x540.c

677

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/ixgbe/ixgbe_x540.c

689

s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

69

ret_val = ixgbe_init_phy_ops_generic(hw);

sys/dev/ixgbe/ixgbe_x540.c

696

status = ixgbe_poll_flash_update_done_X540(hw);

sys/dev/ixgbe/ixgbe_x540.c

70

ret_val = ixgbe_init_ops_generic(hw);

sys/dev/ixgbe/ixgbe_x540.c

702

flup = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw)) | IXGBE_EEC_FLUP;

sys/dev/ixgbe/ixgbe_x540.c

703

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup);

sys/dev/ixgbe/ixgbe_x540.c

705

status = ixgbe_poll_flash_update_done_X540(hw);

sys/dev/ixgbe/ixgbe_x540.c

711

if (hw->mac.type == ixgbe_mac_X540 && hw->revision_id == 0) {

sys/dev/ixgbe/ixgbe_x540.c

712

flup = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_x540.c

716

IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup);

sys/dev/ixgbe/ixgbe_x540.c

719

status = ixgbe_poll_flash_update_done_X540(hw);

sys/dev/ixgbe/ixgbe_x540.c

736

static s32 ixgbe_poll_flash_update_done_X540(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

745

reg = IXGBE_READ_REG(hw, IXGBE_EEC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_x540.c

768

s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)

sys/dev/ixgbe/ixgbe_x540.c

789

if (hw->mac.type >= ixgbe_mac_X550)

sys/dev/ixgbe/ixgbe_x540.c

796

if (ixgbe_get_swfw_sync_semaphore(hw)) {

sys/dev/ixgbe/ixgbe_x540.c

801

swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_x540.c

804

IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw),

sys/dev/ixgbe/ixgbe_x540.c

806

ixgbe_release_swfw_sync_semaphore(hw);

sys/dev/ixgbe/ixgbe_x540.c

813

ixgbe_release_swfw_sync_semaphore(hw);

sys/dev/ixgbe/ixgbe_x540.c

822

if (ixgbe_get_swfw_sync_semaphore(hw)) {

sys/dev/ixgbe/ixgbe_x540.c

826

swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_x540.c

829

IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync);

sys/dev/ixgbe/ixgbe_x540.c

830

ixgbe_release_swfw_sync_semaphore(hw);

sys/dev/ixgbe/ixgbe_x540.c

846

ixgbe_release_swfw_sync_X540(hw, rmask);

sys/dev/ixgbe/ixgbe_x540.c

847

ixgbe_release_swfw_sync_semaphore(hw);

sys/dev/ixgbe/ixgbe_x540.c

851

ixgbe_release_swfw_sync_semaphore(hw);

sys/dev/ixgbe/ixgbe_x540.c

865

void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask)

sys/dev/ixgbe/ixgbe_x540.c

874

ixgbe_get_swfw_sync_semaphore(hw);

sys/dev/ixgbe/ixgbe_x540.c

876

swfw_sync = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_x540.c

878

IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync);

sys/dev/ixgbe/ixgbe_x540.c

880

ixgbe_release_swfw_sync_semaphore(hw);

sys/dev/ixgbe/ixgbe_x540.c

904

static s32 ixgbe_get_swfw_sync_semaphore(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

919

swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_x540.c

930

swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_x540.c

944

ixgbe_release_swfw_sync_semaphore(hw);

sys/dev/ixgbe/ixgbe_x540.c

962

static void ixgbe_release_swfw_sync_semaphore(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

970

swsm = IXGBE_READ_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_x540.c

972

IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swsm);

sys/dev/ixgbe/ixgbe_x540.c

974

swsm = IXGBE_READ_REG(hw, IXGBE_SWSM_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_x540.c

976

IXGBE_WRITE_REG(hw, IXGBE_SWSM_BY_MAC(hw), swsm);

sys/dev/ixgbe/ixgbe_x540.c

978

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_x540.c

988

void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x540.c

998

ixgbe_get_swfw_sync_semaphore(hw);

sys/dev/ixgbe/ixgbe_x540.c

999

ixgbe_release_swfw_sync_semaphore(hw);

sys/dev/ixgbe/ixgbe_x540.h

40

s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x540.h

42

enum ixgbe_media_type ixgbe_get_media_type_X540(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.h

43

s32 ixgbe_setup_mac_link_X540(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_x540.h

45

s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.h

46

s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.h

47

u64 ixgbe_get_supported_physical_layer_X540(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.h

49

s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.h

50

s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data);

sys/dev/ixgbe/ixgbe_x540.h

51

s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,

sys/dev/ixgbe/ixgbe_x540.h

53

s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data);

sys/dev/ixgbe/ixgbe_x540.h

54

s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,

sys/dev/ixgbe/ixgbe_x540.h

56

s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.h

57

s32 ixgbe_validate_eeprom_checksum_X540(struct ixgbe_hw *hw, u16 *checksum_val);

sys/dev/ixgbe/ixgbe_x540.h

58

s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.h

59

s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.h

61

s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);

sys/dev/ixgbe/ixgbe_x540.h

62

void ixgbe_release_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);

sys/dev/ixgbe/ixgbe_x540.h

63

void ixgbe_init_swfw_sync_X540(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x540.h

65

s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_x540.h

66

s32 ixgbe_blink_led_stop_X540(struct ixgbe_hw *hw, u32 index);

sys/dev/ixgbe/ixgbe_x550.c

1000

IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg);

sys/dev/ixgbe/ixgbe_x550.c

1012

s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

1014

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_x550.c

1024

eec = IXGBE_READ_REG(hw, IXGBE_EEC);

sys/dev/ixgbe/ixgbe_x550.c

1043

void ixgbe_set_source_address_pruning_X550(struct ixgbe_hw *hw, bool enable,

sys/dev/ixgbe/ixgbe_x550.c

1052

pfflp = (u64)IXGBE_READ_REG(hw, IXGBE_PFFLPL);

sys/dev/ixgbe/ixgbe_x550.c

1053

pfflp |= (u64)IXGBE_READ_REG(hw, IXGBE_PFFLPH) << 32;

sys/dev/ixgbe/ixgbe_x550.c

1060

IXGBE_WRITE_REG(hw, IXGBE_PFFLPL, (u32)pfflp);

sys/dev/ixgbe/ixgbe_x550.c

1061

IXGBE_WRITE_REG(hw, IXGBE_PFFLPH, (u32)(pfflp >> 32));

sys/dev/ixgbe/ixgbe_x550.c

1071

void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.c

1080

pfvfspoof = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg));

sys/dev/ixgbe/ixgbe_x550.c

1086

IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), pfvfspoof);

sys/dev/ixgbe/ixgbe_x550.c

1098

static s32 ixgbe_iosf_wait(struct ixgbe_hw *hw, u32 *ctrl)

sys/dev/ixgbe/ixgbe_x550.c

1107

command = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL);

sys/dev/ixgbe/ixgbe_x550.c

113

static s32 ixgbe_read_cs4227(struct ixgbe_hw *hw, u16 reg, u16 *value)

sys/dev/ixgbe/ixgbe_x550.c

1130

s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_x550.c

1137

ret = ixgbe_acquire_swfw_semaphore(hw, gssr);

sys/dev/ixgbe/ixgbe_x550.c

1141

ret = ixgbe_iosf_wait(hw, NULL);

sys/dev/ixgbe/ixgbe_x550.c

1149

IXGBE_WRITE_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL, command);

sys/dev/ixgbe/ixgbe_x550.c

115

return hw->link.ops.read_link_unlocked(hw, hw->link.addr, reg, value);

sys/dev/ixgbe/ixgbe_x550.c

1152

IXGBE_WRITE_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA, data);

sys/dev/ixgbe/ixgbe_x550.c

1154

ret = ixgbe_iosf_wait(hw, &command);

sys/dev/ixgbe/ixgbe_x550.c

1165

ixgbe_release_swfw_semaphore(hw, gssr);

sys/dev/ixgbe/ixgbe_x550.c

1176

s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_x550.c

1183

ret = ixgbe_acquire_swfw_semaphore(hw, gssr);

sys/dev/ixgbe/ixgbe_x550.c

1187

ret = ixgbe_iosf_wait(hw, NULL);

sys/dev/ixgbe/ixgbe_x550.c

1195

IXGBE_WRITE_REG(hw, IXGBE_SB_IOSF_INDIRECT_CTRL, command);

sys/dev/ixgbe/ixgbe_x550.c

1197

ret = ixgbe_iosf_wait(hw, &command);

sys/dev/ixgbe/ixgbe_x550.c

1208

*data = IXGBE_READ_REG(hw, IXGBE_SB_IOSF_INDIRECT_DATA);

sys/dev/ixgbe/ixgbe_x550.c

1211

ixgbe_release_swfw_semaphore(hw, gssr);

sys/dev/ixgbe/ixgbe_x550.c

1220

s32 ixgbe_get_phy_token(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

1229

token_cmd.port_number = hw->bus.lan_id;

sys/dev/ixgbe/ixgbe_x550.c

1232

status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd,

sys/dev/ixgbe/ixgbe_x550.c

1258

s32 ixgbe_put_phy_token(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

126

static s32 ixgbe_write_cs4227(struct ixgbe_hw *hw, u16 reg, u16 value)

sys/dev/ixgbe/ixgbe_x550.c

1267

token_cmd.port_number = hw->bus.lan_id;

sys/dev/ixgbe/ixgbe_x550.c

1270

status = ixgbe_host_interface_command(hw, (u32 *)&token_cmd,

sys/dev/ixgbe/ixgbe_x550.c

128

return hw->link.ops.write_link_unlocked(hw, hw->link.addr, reg, value);

sys/dev/ixgbe/ixgbe_x550.c

1289

void ixgbe_disable_mdd_X550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

1296

reg = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);

sys/dev/ixgbe/ixgbe_x550.c

1298

IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg);

sys/dev/ixgbe/ixgbe_x550.c

1301

reg = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);

sys/dev/ixgbe/ixgbe_x550.c

1303

IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg);

sys/dev/ixgbe/ixgbe_x550.c

1312

void ixgbe_enable_mdd_X550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

1319

reg = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);

sys/dev/ixgbe/ixgbe_x550.c

1321

IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg);

sys/dev/ixgbe/ixgbe_x550.c

1324

reg = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);

sys/dev/ixgbe/ixgbe_x550.c

1326

IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg);

sys/dev/ixgbe/ixgbe_x550.c

1336

void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf)

sys/dev/ixgbe/ixgbe_x550.c

1343

reg = IXGBE_READ_REG(hw, IXGBE_MRQC);

sys/dev/ixgbe/ixgbe_x550.c

1365

IXGBE_WRITE_REG(hw, IXGBE_WQBR_TX(idx), reg);

sys/dev/ixgbe/ixgbe_x550.c

1366

IXGBE_WRITE_REG(hw, IXGBE_WQBR_RX(idx), reg);

sys/dev/ixgbe/ixgbe_x550.c

1376

void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap)

sys/dev/ixgbe/ixgbe_x550.c

1384

reg = IXGBE_READ_REG(hw, IXGBE_MRQC);

sys/dev/ixgbe/ixgbe_x550.c

139

static s32 ixgbe_read_pe(struct ixgbe_hw *hw, u8 reg, u8 *value)

sys/dev/ixgbe/ixgbe_x550.c

1400

wqbr = IXGBE_READ_REG(hw, IXGBE_WQBR_TX(i));

sys/dev/ixgbe/ixgbe_x550.c

1401

wqbr |= IXGBE_READ_REG(hw, IXGBE_WQBR_RX(i));

sys/dev/ixgbe/ixgbe_x550.c

143

status = ixgbe_read_i2c_byte_unlocked(hw, reg, IXGBE_PE, value);

sys/dev/ixgbe/ixgbe_x550.c

1432

enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

1439

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_x550.c

1462

hw->phy.type = ixgbe_phy_sgmii;

sys/dev/ixgbe/ixgbe_x550.c

1480

static s32 ixgbe_supported_sfp_modules_X550em(struct ixgbe_hw *hw, bool *linear)

sys/dev/ixgbe/ixgbe_x550.c

1484

switch (hw->phy.sfp_type) {

sys/dev/ixgbe/ixgbe_x550.c

1519

s32 ixgbe_identify_sfp_module_X550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

1526

status = ixgbe_identify_module_generic(hw);

sys/dev/ixgbe/ixgbe_x550.c

1532

status = ixgbe_supported_sfp_modules_X550em(hw, &linear);

sys/dev/ixgbe/ixgbe_x550.c

1541

s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

1549

status = ixgbe_supported_sfp_modules_X550em(hw, &linear);

sys/dev/ixgbe/ixgbe_x550.c

1554

ixgbe_init_mac_link_ops_X550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

1555

hw->phy.ops.reset = NULL;

sys/dev/ixgbe/ixgbe_x550.c

1565

static s32 ixgbe_restart_an_internal_phy_x550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

1571

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1572

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

158

static s32 ixgbe_write_pe(struct ixgbe_hw *hw, u8 reg, u8 value)

sys/dev/ixgbe/ixgbe_x550.c

1581

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1582

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1585

if (hw->mac.type == ixgbe_mac_X550EM_a) {

sys/dev/ixgbe/ixgbe_x550.c

1589

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1590

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1599

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1600

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1613

static s32 ixgbe_setup_sgmii(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_x550.c

1616

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_x550.c

162

status = ixgbe_write_i2c_byte_unlocked(hw, reg, IXGBE_PE, value);

sys/dev/ixgbe/ixgbe_x550.c

1620

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1621

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1631

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1632

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1637

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1638

IXGBE_KRM_SGMII_CTRL(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1645

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1646

IXGBE_KRM_SGMII_CTRL(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1651

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1652

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1663

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1664

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1669

rc = ixgbe_restart_an_internal_phy_x550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

1673

return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait);

sys/dev/ixgbe/ixgbe_x550.c

1682

static s32 ixgbe_setup_sgmii_fw(struct ixgbe_hw *hw, ixgbe_link_speed speed,

sys/dev/ixgbe/ixgbe_x550.c

1685

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_x550.c

1689

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1690

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1700

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1701

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1706

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1707

IXGBE_KRM_SGMII_CTRL(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1714

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1715

IXGBE_KRM_SGMII_CTRL(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1720

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1721

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1726

rc = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1727

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1738

rc = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

1739

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

1744

rc = ixgbe_restart_an_internal_phy_x550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

1746

return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait);

sys/dev/ixgbe/ixgbe_x550.c

1753

void ixgbe_init_mac_link_ops_X550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

1755

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_x550.c

1759

switch (hw->mac.ops.get_media_type(hw)) {

sys/dev/ixgbe/ixgbe_x550.c

176

static s32 ixgbe_reset_cs4227(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

1771

if ((hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) ||

sys/dev/ixgbe/ixgbe_x550.c

1772

(hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP))

sys/dev/ixgbe/ixgbe_x550.c

1780

if (hw->device_id == IXGBE_DEV_ID_X550EM_X_1G_T)

sys/dev/ixgbe/ixgbe_x550.c

1782

if (hw->mac.type == ixgbe_mac_X550EM_a) {

sys/dev/ixgbe/ixgbe_x550.c

1783

if (hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T ||

sys/dev/ixgbe/ixgbe_x550.c

1784

hw->device_id == IXGBE_DEV_ID_X550EM_A_1G_T_L) {

sys/dev/ixgbe/ixgbe_x550.c

1798

if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SGMII ||

sys/dev/ixgbe/ixgbe_x550.c

1799

hw->device_id == IXGBE_DEV_ID_X550EM_A_SGMII_L)

sys/dev/ixgbe/ixgbe_x550.c

1813

s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.c

1820

if (hw->phy.type == ixgbe_phy_fw) {

sys/dev/ixgbe/ixgbe_x550.c

1822

*speed = hw->phy.speeds_supported;

sys/dev/ixgbe/ixgbe_x550.c

1827

if (hw->phy.media_type == ixgbe_media_type_fiber) {

sys/dev/ixgbe/ixgbe_x550.c

1833

if (hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 ||

sys/dev/ixgbe/ixgbe_x550.c

1834

hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1 ||

sys/dev/ixgbe/ixgbe_x550.c

1835

hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 ||

sys/dev/ixgbe/ixgbe_x550.c

1836

hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 ||

sys/dev/ixgbe/ixgbe_x550.c

1837

hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core0 ||

sys/dev/ixgbe/ixgbe_x550.c

1838

hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core1) {

sys/dev/ixgbe/ixgbe_x550.c

184

status = ixgbe_read_pe(hw, IXGBE_PE_OUTPUT, &reg);

sys/dev/ixgbe/ixgbe_x550.c

1844

if (hw->phy.multispeed_fiber)

sys/dev/ixgbe/ixgbe_x550.c

1852

switch (hw->phy.type) {

sys/dev/ixgbe/ixgbe_x550.c

1863

if (hw->mac.type == ixgbe_mac_X550EM_a) {

sys/dev/ixgbe/ixgbe_x550.c

1865

if (hw->phy.nw_mng_if_sel &

sys/dev/ixgbe/ixgbe_x550.c

1869

} else if (hw->device_id ==

sys/dev/ixgbe/ixgbe_x550.c

188

status = ixgbe_write_pe(hw, IXGBE_PE_OUTPUT, reg);

sys/dev/ixgbe/ixgbe_x550.c

1900

static s32 ixgbe_get_lasi_ext_t_x550em(struct ixgbe_hw *hw, bool *lsc)

sys/dev/ixgbe/ixgbe_x550.c

1908

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,

sys/dev/ixgbe/ixgbe_x550.c

1917

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG,

sys/dev/ixgbe/ixgbe_x550.c

192

status = ixgbe_read_pe(hw, IXGBE_PE_CONFIG, &reg);

sys/dev/ixgbe/ixgbe_x550.c

1927

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_ALARM_1,

sys/dev/ixgbe/ixgbe_x550.c

1937

ixgbe_set_copper_phy_power(hw, false);

sys/dev/ixgbe/ixgbe_x550.c

1941

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_FAULT_MSG,

sys/dev/ixgbe/ixgbe_x550.c

1951

ixgbe_set_copper_phy_power(hw, false);

sys/dev/ixgbe/ixgbe_x550.c

1957

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,

sys/dev/ixgbe/ixgbe_x550.c

196

status = ixgbe_write_pe(hw, IXGBE_PE_CONFIG, reg);

sys/dev/ixgbe/ixgbe_x550.c

1965

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2,

sys/dev/ixgbe/ixgbe_x550.c

1987

static s32 ixgbe_enable_lasi_ext_t_x550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

1994

status = ixgbe_get_lasi_ext_t_x550em(hw, &lsc);

sys/dev/ixgbe/ixgbe_x550.c

200

status = ixgbe_read_pe(hw, IXGBE_PE_OUTPUT, &reg);

sys/dev/ixgbe/ixgbe_x550.c

2006

if (hw->mac.type != ixgbe_mac_X550EM_a) {

sys/dev/ixgbe/ixgbe_x550.c

2007

status = hw->phy.ops.read_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2016

status = hw->phy.ops.write_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2025

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,

sys/dev/ixgbe/ixgbe_x550.c

2035

status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,

sys/dev/ixgbe/ixgbe_x550.c

204

status = ixgbe_write_pe(hw, IXGBE_PE_OUTPUT, reg);

sys/dev/ixgbe/ixgbe_x550.c

2043

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK,

sys/dev/ixgbe/ixgbe_x550.c

2053

status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK,

sys/dev/ixgbe/ixgbe_x550.c

2061

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK,

sys/dev/ixgbe/ixgbe_x550.c

2070

status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK,

sys/dev/ixgbe/ixgbe_x550.c

2084

static s32 ixgbe_setup_kr_speed_x550em(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.c

2090

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2091

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

210

status = ixgbe_read_pe(hw, IXGBE_PE_OUTPUT, &reg);

sys/dev/ixgbe/ixgbe_x550.c

2108

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2109

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2112

if (hw->mac.type == ixgbe_mac_X550EM_a) {

sys/dev/ixgbe/ixgbe_x550.c

2114

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2115

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2127

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2128

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2132

return ixgbe_restart_an_internal_phy_x550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

2139

static s32 ixgbe_reset_phy_fw(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

214

status = ixgbe_write_pe(hw, IXGBE_PE_OUTPUT, reg);

sys/dev/ixgbe/ixgbe_x550.c

2144

if (hw->phy.reset_disable || ixgbe_check_reset_blocked(hw))

sys/dev/ixgbe/ixgbe_x550.c

2147

rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_PHY_SW_RESET, &store);

sys/dev/ixgbe/ixgbe_x550.c

2152

rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_INIT_PHY, &store);

sys/dev/ixgbe/ixgbe_x550.c

2156

return ixgbe_setup_fw_link(hw);

sys/dev/ixgbe/ixgbe_x550.c

2163

static s32 ixgbe_check_overtemp_fw(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

2168

rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_GET_LINK_INFO, &store);

sys/dev/ixgbe/ixgbe_x550.c

2173

ixgbe_shutdown_fw_phy(hw);

sys/dev/ixgbe/ixgbe_x550.c

2186

static s32 ixgbe_read_mng_if_sel_x550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

2191

hw->phy.nw_mng_if_sel = IXGBE_READ_REG(hw, IXGBE_NW_MNG_IF_SEL);

sys/dev/ixgbe/ixgbe_x550.c

2196

if (hw->mac.type == ixgbe_mac_X550EM_a &&

sys/dev/ixgbe/ixgbe_x550.c

2197

hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_MDIO_ACT) {

sys/dev/ixgbe/ixgbe_x550.c

2198

hw->phy.addr = (hw->phy.nw_mng_if_sel &

sys/dev/ixgbe/ixgbe_x550.c

221

status = ixgbe_read_cs4227(hw, IXGBE_CS4227_EFUSE_STATUS,

sys/dev/ixgbe/ixgbe_x550.c

2214

s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

2216

struct ixgbe_phy_info *phy = &hw->phy;

sys/dev/ixgbe/ixgbe_x550.c

2221

hw->mac.ops.set_lan_id(hw);

sys/dev/ixgbe/ixgbe_x550.c

2222

ixgbe_read_mng_if_sel_x550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

2224

if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) {

sys/dev/ixgbe/ixgbe_x550.c

2226

ixgbe_setup_mux_ctl(hw);

sys/dev/ixgbe/ixgbe_x550.c

2230

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_x550.c

2235

hw->phy.ops.read_reg = NULL;

sys/dev/ixgbe/ixgbe_x550.c

2236

hw->phy.ops.write_reg = NULL;

sys/dev/ixgbe/ixgbe_x550.c

2238

if (hw->bus.lan_id)

sys/dev/ixgbe/ixgbe_x550.c

2239

hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM;

sys/dev/ixgbe/ixgbe_x550.c

2241

hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM;

sys/dev/ixgbe/ixgbe_x550.c

2246

hw->phy.ops.read_reg = ixgbe_read_phy_reg_x550a;

sys/dev/ixgbe/ixgbe_x550.c

2247

hw->phy.ops.write_reg = ixgbe_write_phy_reg_x550a;

sys/dev/ixgbe/ixgbe_x550.c

2248

if (hw->bus.lan_id)

sys/dev/ixgbe/ixgbe_x550.c

2249

hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM;

sys/dev/ixgbe/ixgbe_x550.c

2251

hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM;

sys/dev/ixgbe/ixgbe_x550.c

2255

hw->phy.phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;

sys/dev/ixgbe/ixgbe_x550.c

2265

ret_val = phy->ops.identify(hw);

sys/dev/ixgbe/ixgbe_x550.c

2271

ixgbe_init_mac_link_ops_X550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

2276

switch (hw->phy.type) {

sys/dev/ixgbe/ixgbe_x550.c

2306

if ((hw->mac.type == ixgbe_mac_X550EM_x) &&

sys/dev/ixgbe/ixgbe_x550.c

2308

IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0))))

sys/dev/ixgbe/ixgbe_x550.c

2331

static void ixgbe_set_mdio_speed(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

2335

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_x550.c

234

status = ixgbe_read_cs4227(hw, IXGBE_CS4227_EEPROM_STATUS, &value);

sys/dev/ixgbe/ixgbe_x550.c

2343

hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);

sys/dev/ixgbe/ixgbe_x550.c

2345

IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);

sys/dev/ixgbe/ixgbe_x550.c

2350

hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);

sys/dev/ixgbe/ixgbe_x550.c

2352

IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);

sys/dev/ixgbe/ixgbe_x550.c

2367

s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

2374

u32 swfw_mask = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/ixgbe_x550.c

2379

status = hw->mac.ops.stop_adapter(hw);

sys/dev/ixgbe/ixgbe_x550.c

2385

ixgbe_clear_tx_pending(hw);

sys/dev/ixgbe/ixgbe_x550.c

2387

ixgbe_set_mdio_speed(hw);

sys/dev/ixgbe/ixgbe_x550.c

2390

status = hw->phy.ops.init(hw);

sys/dev/ixgbe/ixgbe_x550.c

2403

if (hw->phy.type == ixgbe_phy_x550em_ext_t) {

sys/dev/ixgbe/ixgbe_x550.c

2404

status = ixgbe_init_ext_t_x550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

2413

if (hw->phy.sfp_setup_needed) {

sys/dev/ixgbe/ixgbe_x550.c

2414

status = hw->mac.ops.setup_sfp(hw);

sys/dev/ixgbe/ixgbe_x550.c

2415

hw->phy.sfp_setup_needed = false;

sys/dev/ixgbe/ixgbe_x550.c

2422

if (!hw->phy.reset_disable && hw->phy.ops.reset) {

sys/dev/ixgbe/ixgbe_x550.c

2423

if (hw->phy.ops.reset(hw) == IXGBE_ERR_OVERTEMP)

sys/dev/ixgbe/ixgbe_x550.c

2434

if (!hw->force_full_reset) {

sys/dev/ixgbe/ixgbe_x550.c

2435

hw->mac.ops.check_link(hw, &link_speed, &link_up, false);

sys/dev/ixgbe/ixgbe_x550.c

2440

status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_x550.c

2446

ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);

sys/dev/ixgbe/ixgbe_x550.c

2447

IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);

sys/dev/ixgbe/ixgbe_x550.c

2448

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_x550.c

2449

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_x550.c

2454

ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);

sys/dev/ixgbe/ixgbe_x550.c

2470

if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {

sys/dev/ixgbe/ixgbe_x550.c

2471

hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;

sys/dev/ixgbe/ixgbe_x550.c

2476

hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);

sys/dev/ixgbe/ixgbe_x550.c

2482

hw->mac.num_rar_entries = 128;

sys/dev/ixgbe/ixgbe_x550.c

2483

hw->mac.ops.init_rx_addrs(hw);

sys/dev/ixgbe/ixgbe_x550.c

2485

ixgbe_set_mdio_speed(hw);

sys/dev/ixgbe/ixgbe_x550.c

2487

if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP)

sys/dev/ixgbe/ixgbe_x550.c

2488

ixgbe_setup_mux_ctl(hw);

sys/dev/ixgbe/ixgbe_x550.c

249

static void ixgbe_check_cs4227(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

2500

s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

2505

status = hw->phy.ops.read_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2517

status = hw->phy.ops.read_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

252

u32 swfw_mask = hw->phy.phy_semaphore_mask;

sys/dev/ixgbe/ixgbe_x550.c

2527

status = hw->phy.ops.write_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2543

s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

2546

if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL)

sys/dev/ixgbe/ixgbe_x550.c

2549

if (ixgbe_check_reset_blocked(hw))

sys/dev/ixgbe/ixgbe_x550.c

2552

return ixgbe_setup_kr_speed_x550em(hw, hw->phy.autoneg_advertised);

sys/dev/ixgbe/ixgbe_x550.c

2563

s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.c

257

status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_x550.c

2573

ret_val = ixgbe_supported_sfp_modules_X550em(hw, &setup_linear);

sys/dev/ixgbe/ixgbe_x550.c

2586

ixgbe_setup_kr_speed_x550em(hw, speed);

sys/dev/ixgbe/ixgbe_x550.c

2590

(hw->bus.lan_id << 12);

sys/dev/ixgbe/ixgbe_x550.c

2595

ret_val = hw->link.ops.write_link(hw, hw->link.addr, reg_slice,

sys/dev/ixgbe/ixgbe_x550.c

2608

static s32 ixgbe_setup_sfi_x550a(struct ixgbe_hw *hw, ixgbe_link_speed *speed)

sys/dev/ixgbe/ixgbe_x550.c

2610

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_x550.c

2615

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2616

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2639

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2640

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2644

status = ixgbe_restart_an_internal_phy_x550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

2657

s32 ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.c

266

status = ixgbe_read_cs4227(hw, IXGBE_CS4227_SCRATCH, &value);

sys/dev/ixgbe/ixgbe_x550.c

2669

ret_val = ixgbe_supported_sfp_modules_X550em(hw, &setup_linear);

sys/dev/ixgbe/ixgbe_x550.c

2680

if (hw->device_id == IXGBE_DEV_ID_X550EM_A_SFP_N) {

sys/dev/ixgbe/ixgbe_x550.c

2682

ret_val = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2683

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2693

ret_val = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2694

IXGBE_KRM_PMD_FLX_MASK_ST20(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2701

ret_val = ixgbe_setup_sfi_x550a(hw, &speed);

sys/dev/ixgbe/ixgbe_x550.c

2704

ixgbe_setup_kr_speed_x550em(hw, speed);

sys/dev/ixgbe/ixgbe_x550.c

2706

if (hw->phy.addr == 0x0 || hw->phy.addr == 0xFFFF) {

sys/dev/ixgbe/ixgbe_x550.c

2713

ret_val = hw->phy.ops.read_reg(hw, IXGBE_CS4227_EFUSE_PDF_SKU,

sys/dev/ixgbe/ixgbe_x550.c

2723

slice_offset = (hw->bus.lan_id +

sys/dev/ixgbe/ixgbe_x550.c

2724

(hw->bus.instance_id << 1)) << 12;

sys/dev/ixgbe/ixgbe_x550.c

2726

slice_offset = hw->bus.lan_id << 12;

sys/dev/ixgbe/ixgbe_x550.c

2731

ret_val = hw->phy.ops.read_reg(hw, reg_slice,

sys/dev/ixgbe/ixgbe_x550.c

2744

ret_val = hw->phy.ops.write_reg(hw, reg_slice,

sys/dev/ixgbe/ixgbe_x550.c

2748

ret_val = hw->phy.ops.read_reg(hw, reg_slice,

sys/dev/ixgbe/ixgbe_x550.c

2760

static s32 ixgbe_setup_ixfi_x550em_x(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

2762

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_x550.c

2767

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2768

IXGBE_KRM_RX_TRN_LINKUP_CTRL(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

277

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_x550.c

2773

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2774

IXGBE_KRM_RX_TRN_LINKUP_CTRL(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2780

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2781

IXGBE_KRM_DSP_TXFFE_STATE_4(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2788

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2789

IXGBE_KRM_DSP_TXFFE_STATE_4(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2793

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2794

IXGBE_KRM_DSP_TXFFE_STATE_5(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2801

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2802

IXGBE_KRM_DSP_TXFFE_STATE_5(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2808

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2809

IXGBE_KRM_TX_COEFF_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2817

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2818

IXGBE_KRM_TX_COEFF_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

283

status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_x550.c

2831

static s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed)

sys/dev/ixgbe/ixgbe_x550.c

2833

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_x550.c

2842

status = mac->ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2843

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2864

status = mac->ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2865

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

2871

if (hw->mac.type == ixgbe_mac_X550EM_x) {

sys/dev/ixgbe/ixgbe_x550.c

2872

status = ixgbe_setup_ixfi_x550em_x(hw);

sys/dev/ixgbe/ixgbe_x550.c

2878

status = ixgbe_restart_an_internal_phy_x550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

2890

static s32 ixgbe_ext_phy_t_x550em_get_link(struct ixgbe_hw *hw, bool *link_up)

sys/dev/ixgbe/ixgbe_x550.c

2898

ret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/ixgbe/ixgbe_x550.c

2904

ret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/ixgbe/ixgbe_x550.c

292

status = ixgbe_reset_cs4227(hw);

sys/dev/ixgbe/ixgbe_x550.c

2927

s32 ixgbe_setup_internal_phy_t_x550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

2934

if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper)

sys/dev/ixgbe/ixgbe_x550.c

2937

if (hw->mac.type == ixgbe_mac_X550EM_x &&

sys/dev/ixgbe/ixgbe_x550.c

2938

!(hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE)) {

sys/dev/ixgbe/ixgbe_x550.c

2940

status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);

sys/dev/ixgbe/ixgbe_x550.c

2947

status = hw->phy.ops.read_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2955

status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);

sys/dev/ixgbe/ixgbe_x550.c

2976

return ixgbe_setup_ixfi_x550em(hw, &force_speed);

sys/dev/ixgbe/ixgbe_x550.c

2980

return ixgbe_setup_kr_speed_x550em(hw, speed);

sys/dev/ixgbe/ixgbe_x550.c

2990

s32 ixgbe_setup_phy_loopback_x550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

2996

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

2997

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

3004

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3005

IXGBE_KRM_LINK_CTRL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

3011

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3012

IXGBE_KRM_PORT_CAR_GEN_CTRL(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

3018

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3019

IXGBE_KRM_PORT_CAR_GEN_CTRL(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

302

ixgbe_write_cs4227(hw, IXGBE_CS4227_SCRATCH,

sys/dev/ixgbe/ixgbe_x550.c

3025

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3026

IXGBE_KRM_PMD_DFX_BURNIN(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

3031

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3032

IXGBE_KRM_PMD_DFX_BURNIN(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

3038

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3039

IXGBE_KRM_RX_TRN_LINKUP_CTRL(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

304

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_x550.c

3044

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3045

IXGBE_KRM_RX_TRN_LINKUP_CTRL(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

306

status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_x550.c

3060

s32 ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset, u16 *data)

sys/dev/ixgbe/ixgbe_x550.c

3080

status = hw->mac.ops.acquire_swfw_sync(hw, mask);

sys/dev/ixgbe/ixgbe_x550.c

3084

status = ixgbe_hic_unlocked(hw, (u32 *)&buffer, sizeof(buffer),

sys/dev/ixgbe/ixgbe_x550.c

3087

*data = (u16)IXGBE_READ_REG_ARRAY(hw, IXGBE_FLEX_MNG,

sys/dev/ixgbe/ixgbe_x550.c

3091

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/ixgbe/ixgbe_x550.c

3104

s32 ixgbe_read_ee_hostif_buffer_X550(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.c

3117

status = hw->mac.ops.acquire_swfw_sync(hw, mask);

sys/dev/ixgbe/ixgbe_x550.c

314

status = ixgbe_write_cs4227(hw, IXGBE_CS4227_SCRATCH,

sys/dev/ixgbe/ixgbe_x550.c

3141

status = ixgbe_hic_unlocked(hw, (u32 *)&buffer, sizeof(buffer),

sys/dev/ixgbe/ixgbe_x550.c

3152

u32 value = IXGBE_READ_REG(hw, reg);

sys/dev/ixgbe/ixgbe_x550.c

3167

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/ixgbe/ixgbe_x550.c

3179

s32 ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_x550.c

318

hw->mac.ops.release_swfw_sync(hw, swfw_mask);

sys/dev/ixgbe/ixgbe_x550.c

319

msec_delay(hw->eeprom.semaphore_delay);

sys/dev/ixgbe/ixgbe_x550.c

3197

status = ixgbe_host_interface_command(hw, (u32 *)&buffer,

sys/dev/ixgbe/ixgbe_x550.c

3223

s32 ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_x550.c

3230

if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM) ==

sys/dev/ixgbe/ixgbe_x550.c

3232

status = ixgbe_write_ee_hostif_data_X550(hw, offset, data);

sys/dev/ixgbe/ixgbe_x550.c

3233

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/ixgbe/ixgbe_x550.c

3251

s32 ixgbe_write_ee_hostif_buffer_X550(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.c

326

static void ixgbe_setup_mux_ctl(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

3260

status = hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/ixgbe/ixgbe_x550.c

3267

status = ixgbe_write_ee_hostif_data_X550(hw, offset + i,

sys/dev/ixgbe/ixgbe_x550.c

3276

hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);

sys/dev/ixgbe/ixgbe_x550.c

328

u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_x550.c

3293

static s32 ixgbe_checksum_ptr_x550(struct ixgbe_hw *hw, u16 ptr,

sys/dev/ixgbe/ixgbe_x550.c

330

if (hw->bus.lan_id) {

sys/dev/ixgbe/ixgbe_x550.c

3306

status = ixgbe_read_ee_hostif_buffer_X550(hw, ptr, bufsz, buf);

sys/dev/ixgbe/ixgbe_x550.c

3327

(ptr + length) >= hw->eeprom.word_size)

sys/dev/ixgbe/ixgbe_x550.c

3342

status = ixgbe_read_ee_hostif_buffer_X550(hw, ptr,

sys/dev/ixgbe/ixgbe_x550.c

335

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_x550.c

336

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_x550.c

3362

s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size)

sys/dev/ixgbe/ixgbe_x550.c

3372

hw->eeprom.ops.init_params(hw);

sys/dev/ixgbe/ixgbe_x550.c

3376

status = ixgbe_read_ee_hostif_buffer_X550(hw, 0,

sys/dev/ixgbe/ixgbe_x550.c

3410

pointer >= hw->eeprom.word_size)

sys/dev/ixgbe/ixgbe_x550.c

3426

status = ixgbe_checksum_ptr_x550(hw, pointer, size, &checksum,

sys/dev/ixgbe/ixgbe_x550.c

3443

s32 ixgbe_calc_eeprom_checksum_X550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

3445

return ixgbe_calc_checksum_X550(hw, NULL, 0);

sys/dev/ixgbe/ixgbe_x550.c

345

static s32 ixgbe_identify_phy_x550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

3456

s32 ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw, u16 *checksum_val)

sys/dev/ixgbe/ixgbe_x550.c

3468

status = hw->eeprom.ops.read(hw, 0, &checksum);

sys/dev/ixgbe/ixgbe_x550.c

347

hw->mac.ops.set_lan_id(hw);

sys/dev/ixgbe/ixgbe_x550.c

3474

status = hw->eeprom.ops.calc_checksum(hw);

sys/dev/ixgbe/ixgbe_x550.c

3480

status = ixgbe_read_ee_hostif_X550(hw, IXGBE_EEPROM_CHECKSUM,

sys/dev/ixgbe/ixgbe_x550.c

349

ixgbe_read_mng_if_sel_x550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

3509

s32 ixgbe_update_eeprom_checksum_X550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

351

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_x550.c

3520

status = ixgbe_read_ee_hostif_X550(hw, 0, &checksum);

sys/dev/ixgbe/ixgbe_x550.c

3526

status = ixgbe_calc_eeprom_checksum_X550(hw);

sys/dev/ixgbe/ixgbe_x550.c

353

return ixgbe_identify_sfp_module_X550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

3532

status = ixgbe_write_ee_hostif_X550(hw, IXGBE_EEPROM_CHECKSUM,

sys/dev/ixgbe/ixgbe_x550.c

3537

status = ixgbe_update_flash_X550(hw);

sys/dev/ixgbe/ixgbe_x550.c

3548

s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

356

ixgbe_setup_mux_ctl(hw);

sys/dev/ixgbe/ixgbe_x550.c

3560

status = ixgbe_host_interface_command(hw, buffer.buf, sizeof(buffer),

sys/dev/ixgbe/ixgbe_x550.c

357

ixgbe_check_cs4227(hw);

sys/dev/ixgbe/ixgbe_x550.c

3572

u64 ixgbe_get_supported_physical_layer_X550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

3579

hw->phy.ops.identify(hw);

sys/dev/ixgbe/ixgbe_x550.c

358

return ixgbe_identify_sfp_module_X550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

3581

switch (hw->phy.type) {

sys/dev/ixgbe/ixgbe_x550.c

3583

if (hw->mac.type == ixgbe_mac_X550EM_a) {

sys/dev/ixgbe/ixgbe_x550.c

3584

if (hw->phy.nw_mng_if_sel &

sys/dev/ixgbe/ixgbe_x550.c

3589

} else if (hw->device_id ==

sys/dev/ixgbe/ixgbe_x550.c

360

return ixgbe_identify_sfp_module_X550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

3608

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/ixgbe/ixgbe_x550.c

3617

if (hw->phy.speeds_supported & IXGBE_LINK_SPEED_1GB_FULL)

sys/dev/ixgbe/ixgbe_x550.c

3619

if (hw->phy.speeds_supported & IXGBE_LINK_SPEED_100_FULL)

sys/dev/ixgbe/ixgbe_x550.c

3621

if (hw->phy.speeds_supported & IXGBE_LINK_SPEED_10_FULL)

sys/dev/ixgbe/ixgbe_x550.c

363

hw->phy.type = ixgbe_phy_x550em_kx4;

sys/dev/ixgbe/ixgbe_x550.c

3634

if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber)

sys/dev/ixgbe/ixgbe_x550.c

3635

physical_layer = ixgbe_get_supported_phy_sfp_layer_generic(hw);

sys/dev/ixgbe/ixgbe_x550.c

3647

s32 ixgbe_get_bus_info_X550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

3652

hw->bus.width = ixgbe_bus_width_unknown;

sys/dev/ixgbe/ixgbe_x550.c

3653

hw->bus.speed = ixgbe_bus_speed_unknown;

sys/dev/ixgbe/ixgbe_x550.c

3655

hw->mac.ops.set_lan_id(hw);

sys/dev/ixgbe/ixgbe_x550.c

366

hw->phy.type = ixgbe_phy_x550em_xfi;

sys/dev/ixgbe/ixgbe_x550.c

3666

void ixgbe_disable_rx_x550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

3674

rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);

sys/dev/ixgbe/ixgbe_x550.c

3676

pfdtxgswc = IXGBE_READ_REG(hw, IXGBE_PFDTXGSWC);

sys/dev/ixgbe/ixgbe_x550.c

3679

IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, pfdtxgswc);

sys/dev/ixgbe/ixgbe_x550.c

3680

hw->mac.set_lben = true;

sys/dev/ixgbe/ixgbe_x550.c

3682

hw->mac.set_lben = false;

sys/dev/ixgbe/ixgbe_x550.c

3688

fw_cmd.port_number = (u8)hw->bus.lan_id;

sys/dev/ixgbe/ixgbe_x550.c

3690

status = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,

sys/dev/ixgbe/ixgbe_x550.c

3696

rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);

sys/dev/ixgbe/ixgbe_x550.c

3699

IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);

sys/dev/ixgbe/ixgbe_x550.c

371

hw->phy.type = ixgbe_phy_x550em_kr;

sys/dev/ixgbe/ixgbe_x550.c

3713

s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

3722

if ((hw->mac.type == ixgbe_mac_X550EM_x) &&

sys/dev/ixgbe/ixgbe_x550.c

3724

IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0))))

sys/dev/ixgbe/ixgbe_x550.c

3728

if (ixgbe_check_reset_blocked(hw))

sys/dev/ixgbe/ixgbe_x550.c

3731

status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);

sys/dev/ixgbe/ixgbe_x550.c

3735

status = ixgbe_read_eeprom(hw, NVM_INIT_CTRL_3, &hw->eeprom.ctrl_word_3);

sys/dev/ixgbe/ixgbe_x550.c

3743

if (!link_up || !(hw->eeprom.ctrl_word_3 & NVM_INIT_CTRL_3_LPLU) ||

sys/dev/ixgbe/ixgbe_x550.c

3744

!(hw->wol_enabled || ixgbe_mng_present(hw)))

sys/dev/ixgbe/ixgbe_x550.c

3745

return ixgbe_set_copper_phy_power(hw, false);

sys/dev/ixgbe/ixgbe_x550.c

3748

status = ixgbe_get_lcd_t_x550em(hw, &lcd_speed);

sys/dev/ixgbe/ixgbe_x550.c

375

return ixgbe_identify_phy_generic(hw);

sys/dev/ixgbe/ixgbe_x550.c

3755

return ixgbe_set_copper_phy_power(hw, false);

sys/dev/ixgbe/ixgbe_x550.c

3757

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_STAT,

sys/dev/ixgbe/ixgbe_x550.c

3765

status = ixgbe_ext_phy_t_x550em_get_link(hw, &link_up);

sys/dev/ixgbe/ixgbe_x550.c

3767

return ixgbe_set_copper_phy_power(hw, false);

sys/dev/ixgbe/ixgbe_x550.c

377

hw->phy.type = ixgbe_phy_ext_1g_t;

sys/dev/ixgbe/ixgbe_x550.c

3780

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM,

sys/dev/ixgbe/ixgbe_x550.c

3787

status = hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/ixgbe/ixgbe_x550.c

3794

status = hw->phy.ops.read_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3802

save_autoneg = hw->phy.autoneg_advertised;

sys/dev/ixgbe/ixgbe_x550.c

3805

status = hw->mac.ops.setup_link(hw, lcd_speed, false);

sys/dev/ixgbe/ixgbe_x550.c

3808

hw->phy.autoneg_advertised = save_autoneg;

sys/dev/ixgbe/ixgbe_x550.c

381

hw->phy.type = ixgbe_phy_fw;

sys/dev/ixgbe/ixgbe_x550.c

382

if (hw->bus.lan_id)

sys/dev/ixgbe/ixgbe_x550.c

3820

s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *lcd_speed)

sys/dev/ixgbe/ixgbe_x550.c

3824

u16 word = hw->eeprom.ctrl_word_3;

sys/dev/ixgbe/ixgbe_x550.c

3828

status = hw->phy.ops.read_reg(hw, IXGBE_AUTO_NEG_LP_STATUS,

sys/dev/ixgbe/ixgbe_x550.c

383

hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM;

sys/dev/ixgbe/ixgbe_x550.c

3842

if ((hw->bus.lan_id && (word & NVM_INIT_CTRL_3_D10GMP_PORT1)) ||

sys/dev/ixgbe/ixgbe_x550.c

385

hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM;

sys/dev/ixgbe/ixgbe_x550.c

3857

s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

3865

if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {

sys/dev/ixgbe/ixgbe_x550.c

3875

if (hw->fc.requested_mode == ixgbe_fc_default)

sys/dev/ixgbe/ixgbe_x550.c

3876

hw->fc.requested_mode = ixgbe_fc_full;

sys/dev/ixgbe/ixgbe_x550.c

3879

switch (hw->fc.requested_mode) {

sys/dev/ixgbe/ixgbe_x550.c

3908

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_x550.c

3912

ret_val = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3913

IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

3923

ret_val = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3924

IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

3928

hw->fc.disable_fc_autoneg = true;

sys/dev/ixgbe/ixgbe_x550.c

3931

hw->fc.disable_fc_autoneg = true;

sys/dev/ixgbe/ixgbe_x550.c

3947

void ixgbe_fc_autoneg_backplane_x550em_a(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

3959

if (hw->fc.disable_fc_autoneg) {

sys/dev/ixgbe/ixgbe_x550.c

3965

hw->mac.ops.check_link(hw, &speed, &link_up, false);

sys/dev/ixgbe/ixgbe_x550.c

3972

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3973

IXGBE_KRM_LINK_S1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

3986

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3987

IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

399

s32 ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity,

sys/dev/ixgbe/ixgbe_x550.c

3995

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

3996

IXGBE_KRM_LP_BASE_PAGE_HIGH(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

4004

status = ixgbe_negotiate_fc(hw, an_cntl_1, lp_an_page_low,

sys/dev/ixgbe/ixgbe_x550.c

4012

hw->fc.fc_was_autonegged = true;

sys/dev/ixgbe/ixgbe_x550.c

4014

hw->fc.fc_was_autonegged = false;

sys/dev/ixgbe/ixgbe_x550.c

4015

hw->fc.current_mode = hw->fc.requested_mode;

sys/dev/ixgbe/ixgbe_x550.c

4024

void ixgbe_fc_autoneg_fiber_x550em_a(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

4026

hw->fc.fc_was_autonegged = false;

sys/dev/ixgbe/ixgbe_x550.c

4027

hw->fc.current_mode = hw->fc.requested_mode;

sys/dev/ixgbe/ixgbe_x550.c

4036

void ixgbe_fc_autoneg_sgmii_x550em_a(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

4048

if (hw->fc.disable_fc_autoneg) {

sys/dev/ixgbe/ixgbe_x550.c

4054

hw->mac.ops.check_link(hw, &speed, &link_up, false);

sys/dev/ixgbe/ixgbe_x550.c

4061

status = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_GET_LINK_INFO, &info);

sys/dev/ixgbe/ixgbe_x550.c

4070

status = ixgbe_negotiate_fc(hw, info[0], info[0],

sys/dev/ixgbe/ixgbe_x550.c

4078

hw->fc.fc_was_autonegged = true;

sys/dev/ixgbe/ixgbe_x550.c

4080

hw->fc.fc_was_autonegged = false;

sys/dev/ixgbe/ixgbe_x550.c

4081

hw->fc.current_mode = hw->fc.requested_mode;

sys/dev/ixgbe/ixgbe_x550.c

4091

s32 ixgbe_setup_fc_backplane_x550em_a(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

4099

if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {

sys/dev/ixgbe/ixgbe_x550.c

41

static s32 ixgbe_setup_ixfi_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed);

sys/dev/ixgbe/ixgbe_x550.c

4105

if (hw->fc.requested_mode == ixgbe_fc_default)

sys/dev/ixgbe/ixgbe_x550.c

4106

hw->fc.requested_mode = ixgbe_fc_full;

sys/dev/ixgbe/ixgbe_x550.c

4112

status = hw->mac.ops.read_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

4113

IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

4130

switch (hw->fc.requested_mode) {

sys/dev/ixgbe/ixgbe_x550.c

415

hic.cmd.port_number = hw->bus.lan_id;

sys/dev/ixgbe/ixgbe_x550.c

4163

status = hw->mac.ops.write_iosf_sb_reg(hw,

sys/dev/ixgbe/ixgbe_x550.c

4164

IXGBE_KRM_AN_CNTL_1(hw->bus.lan_id),

sys/dev/ixgbe/ixgbe_x550.c

4168

status = ixgbe_restart_an_internal_phy_x550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

4178

static void ixgbe_set_mux(struct ixgbe_hw *hw, u8 state)

sys/dev/ixgbe/ixgbe_x550.c

4182

if (!hw->bus.lan_id)

sys/dev/ixgbe/ixgbe_x550.c

4184

esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);

sys/dev/ixgbe/ixgbe_x550.c

4189

IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);

sys/dev/ixgbe/ixgbe_x550.c

4190

IXGBE_WRITE_FLUSH(hw);

sys/dev/ixgbe/ixgbe_x550.c

420

rc = ixgbe_host_interface_command(hw, (u32 *)&hic.cmd,

sys/dev/ixgbe/ixgbe_x550.c

4200

s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)

sys/dev/ixgbe/ixgbe_x550.c

4206

status = ixgbe_acquire_swfw_sync_X540(hw, mask);

sys/dev/ixgbe/ixgbe_x550.c

4211

ixgbe_set_mux(hw, 1);

sys/dev/ixgbe/ixgbe_x550.c

4223

void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask)

sys/dev/ixgbe/ixgbe_x550.c

4228

ixgbe_set_mux(hw, 0);

sys/dev/ixgbe/ixgbe_x550.c

4230

ixgbe_release_swfw_sync_X540(hw, mask);

sys/dev/ixgbe/ixgbe_x550.c

4240

static s32 ixgbe_acquire_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)

sys/dev/ixgbe/ixgbe_x550.c

4250

status = ixgbe_acquire_swfw_sync_X540(hw, hmask);

sys/dev/ixgbe/ixgbe_x550.c

4261

status = ixgbe_get_phy_token(hw);

sys/dev/ixgbe/ixgbe_x550.c

4269

ixgbe_release_swfw_sync_X540(hw, hmask);

sys/dev/ixgbe/ixgbe_x550.c

4279

ixgbe_release_swfw_sync_X540(hw, hmask);

sys/dev/ixgbe/ixgbe_x550.c

4282

hw->phy.id);

sys/dev/ixgbe/ixgbe_x550.c

4293

static void ixgbe_release_swfw_sync_X550a(struct ixgbe_hw *hw, u32 mask)

sys/dev/ixgbe/ixgbe_x550.c

4300

ixgbe_put_phy_token(hw);

sys/dev/ixgbe/ixgbe_x550.c

4303

ixgbe_release_swfw_sync_X540(hw, hmask);

sys/dev/ixgbe/ixgbe_x550.c

4317

s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_x550.c

4321

u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;

sys/dev/ixgbe/ixgbe_x550.c

4325

if (hw->mac.ops.acquire_swfw_sync(hw, mask))

sys/dev/ixgbe/ixgbe_x550.c

4328

status = hw->phy.ops.read_reg_mdi(hw, reg_addr, device_type, phy_data);

sys/dev/ixgbe/ixgbe_x550.c

4330

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/ixgbe/ixgbe_x550.c

4345

s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_x550.c

4349

u32 mask = hw->phy.phy_semaphore_mask | IXGBE_GSSR_TOKEN_SM;

sys/dev/ixgbe/ixgbe_x550.c

4353

if (hw->mac.ops.acquire_swfw_sync(hw, mask) == IXGBE_SUCCESS) {

sys/dev/ixgbe/ixgbe_x550.c

4354

status = hw->phy.ops.write_reg_mdi(hw, reg_addr, device_type,

sys/dev/ixgbe/ixgbe_x550.c

4356

hw->mac.ops.release_swfw_sync(hw, mask);

sys/dev/ixgbe/ixgbe_x550.c

4375

s32 ixgbe_handle_lasi_ext_t_x550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

4380

status = ixgbe_get_lasi_ext_t_x550em(hw, &lsc);

sys/dev/ixgbe/ixgbe_x550.c

4386

return ixgbe_setup_internal_phy(hw);

sys/dev/ixgbe/ixgbe_x550.c

44

static s32 ixgbe_read_mng_if_sel_x550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.c

4402

s32 ixgbe_setup_mac_link_t_X550em(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.c

4423

if (hw->mac.type == ixgbe_mac_X550EM_x &&

sys/dev/ixgbe/ixgbe_x550.c

4424

!(hw->phy.nw_mng_if_sel & IXGBE_NW_MNG_IF_SEL_INT_PHY_MODE)) {

sys/dev/ixgbe/ixgbe_x550.c

4425

status = ixgbe_setup_ixfi_x550em(hw, &force_speed);

sys/dev/ixgbe/ixgbe_x550.c

4434

status = ixgbe_check_link(hw, &force_speed, &link_up,

sys/dev/ixgbe/ixgbe_x550.c

4444

return hw->phy.ops.setup_link_speed(hw, speed, autoneg_wait_to_complete);

sys/dev/ixgbe/ixgbe_x550.c

4456

s32 ixgbe_check_link_t_X550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_x550.c

4462

if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper)

sys/dev/ixgbe/ixgbe_x550.c

4465

status = ixgbe_check_mac_link_generic(hw, speed, link_up,

sys/dev/ixgbe/ixgbe_x550.c

4478

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/ixgbe/ixgbe_x550.c

4497

s32 ixgbe_reset_phy_t_X550em(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

4501

status = ixgbe_reset_phy_generic(hw);

sys/dev/ixgbe/ixgbe_x550.c

4507

return ixgbe_enable_lasi_ext_t_x550em(hw);

sys/dev/ixgbe/ixgbe_x550.c

4515

s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx)

sys/dev/ixgbe/ixgbe_x550.c

4525

ixgbe_read_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,

sys/dev/ixgbe/ixgbe_x550.c

4528

ixgbe_write_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,

sys/dev/ixgbe/ixgbe_x550.c

4532

return ixgbe_led_on_generic(hw, led_idx);

sys/dev/ixgbe/ixgbe_x550.c

4540

s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx)

sys/dev/ixgbe/ixgbe_x550.c

4550

ixgbe_read_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,

sys/dev/ixgbe/ixgbe_x550.c

4553

ixgbe_write_phy_reg(hw, IXGBE_X557_LED_PROVISIONING + led_idx,

sys/dev/ixgbe/ixgbe_x550.c

4557

return ixgbe_led_off_generic(hw, led_idx);

sys/dev/ixgbe/ixgbe_x550.c

457

static s32 ixgbe_get_phy_id_fw(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

4575

s32 ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min,

sys/dev/ixgbe/ixgbe_x550.c

4591

fw_cmd.port_num = (u8)hw->bus.func;

sys/dev/ixgbe/ixgbe_x550.c

4602

ret_val = ixgbe_host_interface_command(hw, (u32 *)&fw_cmd,

sys/dev/ixgbe/ixgbe_x550.c

4627

bool ixgbe_fw_recovery_mode_X550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

4631

fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM_BY_MAC(hw));

sys/dev/ixgbe/ixgbe_x550.c

465

rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_GET_PHY_INFO, &info);

sys/dev/ixgbe/ixgbe_x550.c

469

hw->phy.speeds_supported = 0;

sys/dev/ixgbe/ixgbe_x550.c

473

hw->phy.speeds_supported |= ixgbe_fw_map[i].phy_speed;

sys/dev/ixgbe/ixgbe_x550.c

475

if (!hw->phy.autoneg_advertised)

sys/dev/ixgbe/ixgbe_x550.c

476

hw->phy.autoneg_advertised = hw->phy.speeds_supported;

sys/dev/ixgbe/ixgbe_x550.c

478

hw->phy.id = info[0] & FW_PHY_INFO_ID_HI_MASK;

sys/dev/ixgbe/ixgbe_x550.c

480

hw->phy.id |= phy_id_lo & IXGBE_PHY_REVISION_MASK;

sys/dev/ixgbe/ixgbe_x550.c

481

hw->phy.revision = phy_id_lo & ~IXGBE_PHY_REVISION_MASK;

sys/dev/ixgbe/ixgbe_x550.c

482

if (!hw->phy.id || hw->phy.id == IXGBE_PHY_REVISION_MASK)

sys/dev/ixgbe/ixgbe_x550.c

493

static s32 ixgbe_identify_phy_fw(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

495

if (hw->bus.lan_id)

sys/dev/ixgbe/ixgbe_x550.c

496

hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM;

sys/dev/ixgbe/ixgbe_x550.c

498

hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM;

sys/dev/ixgbe/ixgbe_x550.c

500

hw->phy.type = ixgbe_phy_fw;

sys/dev/ixgbe/ixgbe_x550.c

501

hw->phy.ops.read_reg = NULL;

sys/dev/ixgbe/ixgbe_x550.c

502

hw->phy.ops.write_reg = NULL;

sys/dev/ixgbe/ixgbe_x550.c

503

return ixgbe_get_phy_id_fw(hw);

sys/dev/ixgbe/ixgbe_x550.c

512

s32 ixgbe_shutdown_fw_phy(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

517

return ixgbe_fw_phy_activity(hw, FW_PHY_ACT_FORCE_LINK_DOWN, &setup);

sys/dev/ixgbe/ixgbe_x550.c

520

static s32 ixgbe_read_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_x550.c

523

UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, *phy_data);

sys/dev/ixgbe/ixgbe_x550.c

527

static s32 ixgbe_write_phy_reg_x550em(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_x550.c

53

s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

530

UNREFERENCED_4PARAMETER(*hw, reg_addr, device_type, phy_data);

sys/dev/ixgbe/ixgbe_x550.c

543

static s32 ixgbe_read_i2c_combined_generic(struct ixgbe_hw *hw, u8 addr,

sys/dev/ixgbe/ixgbe_x550.c

546

return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, true);

sys/dev/ixgbe/ixgbe_x550.c

55

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_x550.c

559

ixgbe_read_i2c_combined_generic_unlocked(struct ixgbe_hw *hw, u8 addr,

sys/dev/ixgbe/ixgbe_x550.c

56

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_x550.c

562

return ixgbe_read_i2c_combined_generic_int(hw, addr, reg, val, false);

sys/dev/ixgbe/ixgbe_x550.c

574

static s32 ixgbe_write_i2c_combined_generic(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.c

577

return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, true);

sys/dev/ixgbe/ixgbe_x550.c

590

ixgbe_write_i2c_combined_generic_unlocked(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.c

593

return ixgbe_write_i2c_combined_generic_int(hw, addr, reg, val, false);

sys/dev/ixgbe/ixgbe_x550.c

603

s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

605

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_x550.c

606

struct ixgbe_eeprom_info *eeprom = &hw->eeprom;

sys/dev/ixgbe/ixgbe_x550.c

607

struct ixgbe_phy_info *phy = &hw->phy;

sys/dev/ixgbe/ixgbe_x550.c

61

ret_val = ixgbe_init_ops_X540(hw);

sys/dev/ixgbe/ixgbe_x550.c

613

ret_val = ixgbe_init_ops_X550(hw);

sys/dev/ixgbe/ixgbe_x550.c

646

hw->bus.type = ixgbe_bus_type_internal;

sys/dev/ixgbe/ixgbe_x550.c

657

if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper)

sys/dev/ixgbe/ixgbe_x550.c

664

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_x550.c

681

if (mac->ops.get_media_type(hw) != ixgbe_media_type_copper)

sys/dev/ixgbe/ixgbe_x550.c

702

static s32 ixgbe_setup_fw_link(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

708

if (hw->phy.reset_disable || ixgbe_check_reset_blocked(hw))

sys/dev/ixgbe/ixgbe_x550.c

711

if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {

sys/dev/ixgbe/ixgbe_x550.c

717

switch (hw->fc.requested_mode) {

sys/dev/ixgbe/ixgbe_x550.c

735

if (hw->phy.autoneg_advertised & ixgbe_fw_map[i].phy_speed)

sys/dev/ixgbe/ixgbe_x550.c

740

if (hw->phy.eee_speeds_advertised)

sys/dev/ixgbe/ixgbe_x550.c

743

rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_SETUP_LINK, &setup);

sys/dev/ixgbe/ixgbe_x550.c

757

static s32 ixgbe_fc_autoneg_fw(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

759

if (hw->fc.requested_mode == ixgbe_fc_default)

sys/dev/ixgbe/ixgbe_x550.c

760

hw->fc.requested_mode = ixgbe_fc_full;

sys/dev/ixgbe/ixgbe_x550.c

762

return ixgbe_setup_fw_link(hw);

sys/dev/ixgbe/ixgbe_x550.c

773

static s32 ixgbe_setup_eee_fw(struct ixgbe_hw *hw, bool enable_eee)

sys/dev/ixgbe/ixgbe_x550.c

775

if (!!hw->phy.eee_speeds_advertised == enable_eee)

sys/dev/ixgbe/ixgbe_x550.c

778

hw->phy.eee_speeds_advertised = hw->phy.eee_speeds_supported;

sys/dev/ixgbe/ixgbe_x550.c

780

hw->phy.eee_speeds_advertised = 0;

sys/dev/ixgbe/ixgbe_x550.c

781

return hw->phy.ops.setup_link(hw);

sys/dev/ixgbe/ixgbe_x550.c

791

s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

793

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_x550.c

799

ret_val = ixgbe_init_ops_X550EM(hw);

sys/dev/ixgbe/ixgbe_x550.c

806

switch (mac->ops.get_media_type(hw)) {

sys/dev/ixgbe/ixgbe_x550.c

819

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_x550.c

825

hw->phy.eee_speeds_supported = IXGBE_LINK_SPEED_100_FULL |

sys/dev/ixgbe/ixgbe_x550.c

827

hw->phy.eee_speeds_advertised = hw->phy.eee_speeds_supported;

sys/dev/ixgbe/ixgbe_x550.c

843

s32 ixgbe_init_ops_X550EM_x(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

845

struct ixgbe_mac_info *mac = &hw->mac;

sys/dev/ixgbe/ixgbe_x550.c

846

struct ixgbe_link_info *link = &hw->link;

sys/dev/ixgbe/ixgbe_x550.c

852

ret_val = ixgbe_init_ops_X550EM(hw);

sys/dev/ixgbe/ixgbe_x550.c

865

if (hw->device_id == IXGBE_DEV_ID_X550EM_X_1G_T) {

sys/dev/ixgbe/ixgbe_x550.c

881

s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

888

reg = IXGBE_READ_REG(hw, IXGBE_DMACR);

sys/dev/ixgbe/ixgbe_x550.c

89

switch (hw->device_id) {

sys/dev/ixgbe/ixgbe_x550.c

890

IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg);

sys/dev/ixgbe/ixgbe_x550.c

893

if (!hw->mac.dmac_config.watchdog_timer)

sys/dev/ixgbe/ixgbe_x550.c

896

ixgbe_dmac_config_tcs_X550(hw);

sys/dev/ixgbe/ixgbe_x550.c

899

reg = IXGBE_READ_REG(hw, IXGBE_DMACR);

sys/dev/ixgbe/ixgbe_x550.c

903

reg |= (hw->mac.dmac_config.watchdog_timer * 100) / 4096;

sys/dev/ixgbe/ixgbe_x550.c

907

if (hw->mac.dmac_config.fcoe_en) {

sys/dev/ixgbe/ixgbe_x550.c

908

high_pri_tc = 1 << hw->mac.dmac_config.fcoe_tc;

sys/dev/ixgbe/ixgbe_x550.c

91

hw->mac.ops.led_on = NULL;

sys/dev/ixgbe/ixgbe_x550.c

916

IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg);

sys/dev/ixgbe/ixgbe_x550.c

92

hw->mac.ops.led_off = NULL;

sys/dev/ixgbe/ixgbe_x550.c

929

s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

936

switch (hw->mac.dmac_config.link_speed) {

sys/dev/ixgbe/ixgbe_x550.c

949

maxframe_size_kb = ((IXGBE_READ_REG(hw, IXGBE_MAXFRS) >>

sys/dev/ixgbe/ixgbe_x550.c

954

reg = IXGBE_READ_REG(hw, IXGBE_DMCTH(tc));

sys/dev/ixgbe/ixgbe_x550.c

957

if (tc < hw->mac.dmac_config.num_tcs) {

sys/dev/ixgbe/ixgbe_x550.c

959

rx_pb_size = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(tc));

sys/dev/ixgbe/ixgbe_x550.c

96

hw->mac.ops.led_on = ixgbe_led_on_t_X550em;

sys/dev/ixgbe/ixgbe_x550.c

97

hw->mac.ops.led_off = ixgbe_led_off_t_X550em;

sys/dev/ixgbe/ixgbe_x550.c

973

IXGBE_WRITE_REG(hw, IXGBE_DMCTH(tc), reg);

sys/dev/ixgbe/ixgbe_x550.c

984

s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw)

sys/dev/ixgbe/ixgbe_x550.c

991

reg = IXGBE_READ_REG(hw, IXGBE_DMACR);

sys/dev/ixgbe/ixgbe_x550.c

993

IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg);

sys/dev/ixgbe/ixgbe_x550.c

995

ixgbe_dmac_config_tcs_X550(hw);

sys/dev/ixgbe/ixgbe_x550.c

998

reg = IXGBE_READ_REG(hw, IXGBE_DMACR);

sys/dev/ixgbe/ixgbe_x550.h

100

s32 ixgbe_read_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_x550.h

102

s32 ixgbe_write_phy_reg_x550a(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_x550.h

104

s32 ixgbe_setup_fc_fiber_x550em_a(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

105

s32 ixgbe_setup_fc_backplane_x550em_a(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

106

void ixgbe_fc_autoneg_fiber_x550em_a(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

107

void ixgbe_fc_autoneg_backplane_x550em_a(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

108

void ixgbe_fc_autoneg_sgmii_x550em_a(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

109

s32 ixgbe_handle_lasi_ext_t_x550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

110

s32 ixgbe_setup_mac_link_t_X550em(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.h

113

s32 ixgbe_check_link_t_X550em(struct ixgbe_hw *hw, ixgbe_link_speed *speed,

sys/dev/ixgbe/ixgbe_x550.h

115

s32 ixgbe_reset_phy_t_X550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

116

s32 ixgbe_identify_sfp_module_X550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

117

s32 ixgbe_led_on_t_X550em(struct ixgbe_hw *hw, u32 led_idx);

sys/dev/ixgbe/ixgbe_x550.h

118

s32 ixgbe_led_off_t_X550em(struct ixgbe_hw *hw, u32 led_idx);

sys/dev/ixgbe/ixgbe_x550.h

119

bool ixgbe_fw_recovery_mode_X550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

39

s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

40

s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

41

s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

43

s32 ixgbe_get_bus_info_X550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

44

s32 ixgbe_init_eeprom_params_X550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

45

s32 ixgbe_update_eeprom_checksum_X550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

46

s32 ixgbe_calc_eeprom_checksum_X550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

47

s32 ixgbe_calc_checksum_X550(struct ixgbe_hw *hw, u16 *buffer, u32 buffer_size);

sys/dev/ixgbe/ixgbe_x550.h

48

s32 ixgbe_validate_eeprom_checksum_X550(struct ixgbe_hw *hw, u16 *checksum_val);

sys/dev/ixgbe/ixgbe_x550.h

49

s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

50

s32 ixgbe_write_ee_hostif_buffer_X550(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.h

52

s32 ixgbe_write_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_x550.h

54

s32 ixgbe_read_ee_hostif_buffer_X550(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.h

56

s32 ixgbe_read_ee_hostif_X550(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_x550.h

58

s32 ixgbe_write_ee_hostif_data_X550(struct ixgbe_hw *hw, u16 offset,

sys/dev/ixgbe/ixgbe_x550.h

60

void ixgbe_set_source_address_pruning_X550(struct ixgbe_hw *hw, bool enable,

sys/dev/ixgbe/ixgbe_x550.h

62

void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.h

64

s32 ixgbe_write_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_x550.h

66

s32 ixgbe_read_iosf_sb_reg_x550(struct ixgbe_hw *hw, u32 reg_addr,

sys/dev/ixgbe/ixgbe_x550.h

68

s32 ixgbe_set_fw_drv_ver_x550(struct ixgbe_hw *hw, u8 maj, u8 min,

sys/dev/ixgbe/ixgbe_x550.h

72

void ixgbe_disable_mdd_X550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

73

void ixgbe_enable_mdd_X550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

74

void ixgbe_mdd_event_X550(struct ixgbe_hw *hw, u32 *vf_bitmap);

sys/dev/ixgbe/ixgbe_x550.h

75

void ixgbe_restore_mdd_vf_X550(struct ixgbe_hw *hw, u32 vf);

sys/dev/ixgbe/ixgbe_x550.h

76

enum ixgbe_media_type ixgbe_get_media_type_X550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

77

s32 ixgbe_setup_sfp_modules_X550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

78

s32 ixgbe_get_link_capabilities_X550em(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.h

80

void ixgbe_init_mac_link_ops_X550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

81

s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

82

s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

83

s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

84

s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

85

s32 ixgbe_setup_internal_phy_t_x550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

86

s32 ixgbe_setup_phy_loopback_x550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

87

u64 ixgbe_get_supported_physical_layer_X550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

88

void ixgbe_disable_rx_x550(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

89

s32 ixgbe_get_lcd_t_x550em(struct ixgbe_hw *hw, ixgbe_link_speed *lcd_speed);

sys/dev/ixgbe/ixgbe_x550.h

90

s32 ixgbe_enter_lplu_t_x550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

91

s32 ixgbe_acquire_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);

sys/dev/ixgbe/ixgbe_x550.h

92

void ixgbe_release_swfw_sync_X550em(struct ixgbe_hw *hw, u32 mask);

sys/dev/ixgbe/ixgbe_x550.h

93

s32 ixgbe_setup_fc_X550em(struct ixgbe_hw *hw);

sys/dev/ixgbe/ixgbe_x550.h

94

s32 ixgbe_setup_mac_link_sfp_x550em(struct ixgbe_hw *hw,

sys/dev/ixgbe/ixgbe_x550.h

97

s32 ixgbe_setup_mac_link_sfp_x550a(struct ixgbe_hw *hw,

sys/dev/ixl/i40e_adminq.c

1008

hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval;

sys/dev/ixl/i40e_adminq.c

1011

i40e_debug(hw, I40E_DEBUG_AQ_COMMAND,

sys/dev/ixl/i40e_adminq.c

1013

i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff, buff_size);

sys/dev/ixl/i40e_adminq.c

1023

if (rd32(hw, hw->aq.asq.len) & I40E_GL_ATQLEN_ATQCRIT_MASK) {

sys/dev/ixl/i40e_adminq.c

1024

i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,

sys/dev/ixl/i40e_adminq.c

1028

i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,

sys/dev/ixl/i40e_adminq.c

1035

i40e_release_spinlock(&hw->aq.asq_spinlock);

sys/dev/ixl/i40e_adminq.c

105

enum i40e_status_code i40e_alloc_adminq_arq_ring(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

1066

enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,

sys/dev/ixl/i40e_adminq.c

1071

u16 ntc = hw->aq.arq.next_to_clean;

sys/dev/ixl/i40e_adminq.c

1083

i40e_acquire_spinlock(&hw->aq.arq_spinlock);

sys/dev/ixl/i40e_adminq.c

1085

if (hw->aq.arq.count == 0) {

sys/dev/ixl/i40e_adminq.c

1086

i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,

sys/dev/ixl/i40e_adminq.c

109

ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf,

sys/dev/ixl/i40e_adminq.c

1093

if (!i40e_is_vf(hw))

sys/dev/ixl/i40e_adminq.c

1094

ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK;

sys/dev/ixl/i40e_adminq.c

1096

ntu = rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK;

sys/dev/ixl/i40e_adminq.c

1104

desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc);

sys/dev/ixl/i40e_adminq.c

1107

hw->aq.arq_last_status =

sys/dev/ixl/i40e_adminq.c

111

(hw->aq.num_arq_entries *

sys/dev/ixl/i40e_adminq.c

1112

i40e_debug(hw,

sys/dev/ixl/i40e_adminq.c

1115

hw->aq.arq_last_status);

sys/dev/ixl/i40e_adminq.c

1124

hw->aq.arq.r.arq_bi[desc_idx].va,

sys/dev/ixl/i40e_adminq.c

1127

i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, "AQRX: desc and buffer:\n");

sys/dev/ixl/i40e_adminq.c

1128

i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, e->msg_buf,

sys/dev/ixl/i40e_adminq.c

1129

hw->aq.arq_buf_size);

sys/dev/ixl/i40e_adminq.c

1135

bi = &hw->aq.arq.r.arq_bi[ntc];

sys/dev/ixl/i40e_adminq.c

1139

if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF)

sys/dev/ixl/i40e_adminq.c

1146

wr32(hw, hw->aq.arq.tail, ntc);

sys/dev/ixl/i40e_adminq.c

1149

if (ntc == hw->aq.num_arq_entries)

sys/dev/ixl/i40e_adminq.c

1151

hw->aq.arq.next_to_clean = ntc;

sys/dev/ixl/i40e_adminq.c

1152

hw->aq.arq.next_to_use = ntu;

sys/dev/ixl/i40e_adminq.c

1154

i40e_nvmupd_check_wait_event(hw, LE16_TO_CPU(e->desc.opcode), &e->desc);

sys/dev/ixl/i40e_adminq.c

1158

*pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc);

sys/dev/ixl/i40e_adminq.c

1160

i40e_release_spinlock(&hw->aq.arq_spinlock);

sys/dev/ixl/i40e_adminq.c

125

void i40e_free_adminq_asq(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

127

i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf);

sys/dev/ixl/i40e_adminq.c

128

i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);

sys/dev/ixl/i40e_adminq.c

138

void i40e_free_adminq_arq(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

140

i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf);

sys/dev/ixl/i40e_adminq.c

147

static enum i40e_status_code i40e_alloc_arq_bufs(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

159

ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head,

sys/dev/ixl/i40e_adminq.c

160

(hw->aq.num_arq_entries * sizeof(struct i40e_dma_mem)));

sys/dev/ixl/i40e_adminq.c

163

hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va;

sys/dev/ixl/i40e_adminq.c

166

for (i = 0; i < hw->aq.num_arq_entries; i++) {

sys/dev/ixl/i40e_adminq.c

167

bi = &hw->aq.arq.r.arq_bi[i];

sys/dev/ixl/i40e_adminq.c

168

ret_code = i40e_allocate_dma_mem(hw, bi,

sys/dev/ixl/i40e_adminq.c

170

hw->aq.arq_buf_size,

sys/dev/ixl/i40e_adminq.c

176

desc = I40E_ADMINQ_DESC(hw->aq.arq, i);

sys/dev/ixl/i40e_adminq.c

179

if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF)

sys/dev/ixl/i40e_adminq.c

204

i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]);

sys/dev/ixl/i40e_adminq.c

205

i40e_free_virt_mem(hw, &hw->aq.arq.dma_head);

sys/dev/ixl/i40e_adminq.c

214

static enum i40e_status_code i40e_alloc_asq_bufs(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

221

ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head,

sys/dev/ixl/i40e_adminq.c

222

(hw->aq.num_asq_entries * sizeof(struct i40e_dma_mem)));

sys/dev/ixl/i40e_adminq.c

225

hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va;

sys/dev/ixl/i40e_adminq.c

228

for (i = 0; i < hw->aq.num_asq_entries; i++) {

sys/dev/ixl/i40e_adminq.c

229

bi = &hw->aq.asq.r.asq_bi[i];

sys/dev/ixl/i40e_adminq.c

230

ret_code = i40e_allocate_dma_mem(hw, bi,

sys/dev/ixl/i40e_adminq.c

232

hw->aq.asq_buf_size,

sys/dev/ixl/i40e_adminq.c

244

i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]);

sys/dev/ixl/i40e_adminq.c

245

i40e_free_virt_mem(hw, &hw->aq.asq.dma_head);

sys/dev/ixl/i40e_adminq.c

254

static void i40e_free_arq_bufs(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

259

for (i = 0; i < hw->aq.num_arq_entries; i++)

sys/dev/ixl/i40e_adminq.c

260

i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]);

sys/dev/ixl/i40e_adminq.c

263

i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf);

sys/dev/ixl/i40e_adminq.c

266

i40e_free_virt_mem(hw, &hw->aq.arq.dma_head);

sys/dev/ixl/i40e_adminq.c

273

static void i40e_free_asq_bufs(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

278

for (i = 0; i < hw->aq.num_asq_entries; i++)

sys/dev/ixl/i40e_adminq.c

279

if (hw->aq.asq.r.asq_bi[i].pa)

sys/dev/ixl/i40e_adminq.c

280

i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]);

sys/dev/ixl/i40e_adminq.c

283

i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf);

sys/dev/ixl/i40e_adminq.c

286

i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);

sys/dev/ixl/i40e_adminq.c

289

i40e_free_virt_mem(hw, &hw->aq.asq.dma_head);

sys/dev/ixl/i40e_adminq.c

298

static enum i40e_status_code i40e_config_asq_regs(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

304

wr32(hw, hw->aq.asq.head, 0);

sys/dev/ixl/i40e_adminq.c

305

wr32(hw, hw->aq.asq.tail, 0);

sys/dev/ixl/i40e_adminq.c

308

if (!i40e_is_vf(hw))

sys/dev/ixl/i40e_adminq.c

309

wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |

sys/dev/ixl/i40e_adminq.c

311

if (i40e_is_vf(hw))

sys/dev/ixl/i40e_adminq.c

312

wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries |

sys/dev/ixl/i40e_adminq.c

314

wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa));

sys/dev/ixl/i40e_adminq.c

315

wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa));

sys/dev/ixl/i40e_adminq.c

318

reg = rd32(hw, hw->aq.asq.bal);

sys/dev/ixl/i40e_adminq.c

319

if (reg != I40E_LO_DWORD(hw->aq.asq.desc_buf.pa))

sys/dev/ixl/i40e_adminq.c

331

static enum i40e_status_code i40e_config_arq_regs(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

337

wr32(hw, hw->aq.arq.head, 0);

sys/dev/ixl/i40e_adminq.c

338

wr32(hw, hw->aq.arq.tail, 0);

sys/dev/ixl/i40e_adminq.c

341

if (!i40e_is_vf(hw))

sys/dev/ixl/i40e_adminq.c

342

wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |

sys/dev/ixl/i40e_adminq.c

344

if (i40e_is_vf(hw))

sys/dev/ixl/i40e_adminq.c

345

wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries |

sys/dev/ixl/i40e_adminq.c

347

wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa));

sys/dev/ixl/i40e_adminq.c

348

wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa));

sys/dev/ixl/i40e_adminq.c

351

wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1);

sys/dev/ixl/i40e_adminq.c

354

reg = rd32(hw, hw->aq.arq.bal);

sys/dev/ixl/i40e_adminq.c

355

if (reg != I40E_LO_DWORD(hw->aq.arq.desc_buf.pa))

sys/dev/ixl/i40e_adminq.c

374

enum i40e_status_code i40e_init_asq(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

378

if (hw->aq.asq.count > 0) {

sys/dev/ixl/i40e_adminq.c

385

if ((hw->aq.num_asq_entries == 0) ||

sys/dev/ixl/i40e_adminq.c

386

(hw->aq.asq_buf_size == 0)) {

sys/dev/ixl/i40e_adminq.c

391

hw->aq.asq.next_to_use = 0;

sys/dev/ixl/i40e_adminq.c

392

hw->aq.asq.next_to_clean = 0;

sys/dev/ixl/i40e_adminq.c

395

ret_code = i40e_alloc_adminq_asq_ring(hw);

sys/dev/ixl/i40e_adminq.c

400

ret_code = i40e_alloc_asq_bufs(hw);

sys/dev/ixl/i40e_adminq.c

405

ret_code = i40e_config_asq_regs(hw);

sys/dev/ixl/i40e_adminq.c

410

hw->aq.asq.count = hw->aq.num_asq_entries;

sys/dev/ixl/i40e_adminq.c

414

i40e_free_adminq_asq(hw);

sys/dev/ixl/i40e_adminq.c

418

i40e_free_asq_bufs(hw);

sys/dev/ixl/i40e_adminq.c

437

enum i40e_status_code i40e_init_arq(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

441

if (hw->aq.arq.count > 0) {

sys/dev/ixl/i40e_adminq.c

448

if ((hw->aq.num_arq_entries == 0) ||

sys/dev/ixl/i40e_adminq.c

449

(hw->aq.arq_buf_size == 0)) {

sys/dev/ixl/i40e_adminq.c

454

hw->aq.arq.next_to_use = 0;

sys/dev/ixl/i40e_adminq.c

455

hw->aq.arq.next_to_clean = 0;

sys/dev/ixl/i40e_adminq.c

458

ret_code = i40e_alloc_adminq_arq_ring(hw);

sys/dev/ixl/i40e_adminq.c

46

static void i40e_adminq_init_regs(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

463

ret_code = i40e_alloc_arq_bufs(hw);

sys/dev/ixl/i40e_adminq.c

468

ret_code = i40e_config_arq_regs(hw);

sys/dev/ixl/i40e_adminq.c

473

hw->aq.arq.count = hw->aq.num_arq_entries;

sys/dev/ixl/i40e_adminq.c

477

i40e_free_adminq_arq(hw);

sys/dev/ixl/i40e_adminq.c

489

enum i40e_status_code i40e_shutdown_asq(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

49

if (i40e_is_vf(hw)) {

sys/dev/ixl/i40e_adminq.c

493

i40e_acquire_spinlock(&hw->aq.asq_spinlock);

sys/dev/ixl/i40e_adminq.c

495

if (hw->aq.asq.count == 0) {

sys/dev/ixl/i40e_adminq.c

50

hw->aq.asq.tail = I40E_VF_ATQT1;

sys/dev/ixl/i40e_adminq.c

501

wr32(hw, hw->aq.asq.head, 0);

sys/dev/ixl/i40e_adminq.c

502

wr32(hw, hw->aq.asq.tail, 0);

sys/dev/ixl/i40e_adminq.c

503

wr32(hw, hw->aq.asq.len, 0);

sys/dev/ixl/i40e_adminq.c

504

wr32(hw, hw->aq.asq.bal, 0);

sys/dev/ixl/i40e_adminq.c

505

wr32(hw, hw->aq.asq.bah, 0);

sys/dev/ixl/i40e_adminq.c

507

hw->aq.asq.count = 0; /* to indicate uninitialized queue */

sys/dev/ixl/i40e_adminq.c

51

hw->aq.asq.head = I40E_VF_ATQH1;

sys/dev/ixl/i40e_adminq.c

510

i40e_free_asq_bufs(hw);

sys/dev/ixl/i40e_adminq.c

513

i40e_release_spinlock(&hw->aq.asq_spinlock);

sys/dev/ixl/i40e_adminq.c

52

hw->aq.asq.len = I40E_VF_ATQLEN1;

sys/dev/ixl/i40e_adminq.c

523

enum i40e_status_code i40e_shutdown_arq(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

527

i40e_acquire_spinlock(&hw->aq.arq_spinlock);

sys/dev/ixl/i40e_adminq.c

529

if (hw->aq.arq.count == 0) {

sys/dev/ixl/i40e_adminq.c

53

hw->aq.asq.bal = I40E_VF_ATQBAL1;

sys/dev/ixl/i40e_adminq.c

535

wr32(hw, hw->aq.arq.head, 0);

sys/dev/ixl/i40e_adminq.c

536

wr32(hw, hw->aq.arq.tail, 0);

sys/dev/ixl/i40e_adminq.c

537

wr32(hw, hw->aq.arq.len, 0);

sys/dev/ixl/i40e_adminq.c

538

wr32(hw, hw->aq.arq.bal, 0);

sys/dev/ixl/i40e_adminq.c

539

wr32(hw, hw->aq.arq.bah, 0);

sys/dev/ixl/i40e_adminq.c

54

hw->aq.asq.bah = I40E_VF_ATQBAH1;

sys/dev/ixl/i40e_adminq.c

541

hw->aq.arq.count = 0; /* to indicate uninitialized queue */

sys/dev/ixl/i40e_adminq.c

544

i40e_free_arq_bufs(hw);

sys/dev/ixl/i40e_adminq.c

547

i40e_release_spinlock(&hw->aq.arq_spinlock);

sys/dev/ixl/i40e_adminq.c

55

hw->aq.arq.tail = I40E_VF_ARQT1;

sys/dev/ixl/i40e_adminq.c

555

static void i40e_resume_aq(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

558

hw->aq.asq.next_to_use = 0;

sys/dev/ixl/i40e_adminq.c

559

hw->aq.asq.next_to_clean = 0;

sys/dev/ixl/i40e_adminq.c

56

hw->aq.arq.head = I40E_VF_ARQH1;

sys/dev/ixl/i40e_adminq.c

561

i40e_config_asq_regs(hw);

sys/dev/ixl/i40e_adminq.c

563

hw->aq.arq.next_to_use = 0;

sys/dev/ixl/i40e_adminq.c

564

hw->aq.arq.next_to_clean = 0;

sys/dev/ixl/i40e_adminq.c

566

i40e_config_arq_regs(hw);

sys/dev/ixl/i40e_adminq.c

57

hw->aq.arq.len = I40E_VF_ARQLEN1;

sys/dev/ixl/i40e_adminq.c

573

static void i40e_set_hw_flags(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

575

struct i40e_adminq_info *aq = &hw->aq;

sys/dev/ixl/i40e_adminq.c

577

hw->flags = 0;

sys/dev/ixl/i40e_adminq.c

579

switch (hw->mac.type) {

sys/dev/ixl/i40e_adminq.c

58

hw->aq.arq.bal = I40E_VF_ARQBAL1;

sys/dev/ixl/i40e_adminq.c

584

hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE;

sys/dev/ixl/i40e_adminq.c

585

hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE;

sys/dev/ixl/i40e_adminq.c

587

hw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE;

sys/dev/ixl/i40e_adminq.c

59

hw->aq.arq.bah = I40E_VF_ARQBAH1;

sys/dev/ixl/i40e_adminq.c

591

hw->flags |= I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE |

sys/dev/ixl/i40e_adminq.c

597

hw->flags |= I40E_HW_FLAG_FW_LLDP_STOPPABLE;

sys/dev/ixl/i40e_adminq.c

602

hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE;

sys/dev/ixl/i40e_adminq.c

607

hw->flags |= I40E_HW_FLAG_X722_FEC_REQUEST_CAPABLE;

sys/dev/ixl/i40e_adminq.c

61

hw->aq.asq.tail = I40E_PF_ATQT;

sys/dev/ixl/i40e_adminq.c

618

hw->flags |= I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK;

sys/dev/ixl/i40e_adminq.c

62

hw->aq.asq.head = I40E_PF_ATQH;

sys/dev/ixl/i40e_adminq.c

623

hw->flags |= I40E_HW_FLAG_FW_LLDP_PERSISTENT;

sys/dev/ixl/i40e_adminq.c

624

hw->flags |= I40E_HW_FLAG_DROP_MODE;

sys/dev/ixl/i40e_adminq.c

63

hw->aq.asq.len = I40E_PF_ATQLEN;

sys/dev/ixl/i40e_adminq.c

630

hw->flags |= I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED;

sys/dev/ixl/i40e_adminq.c

64

hw->aq.asq.bal = I40E_PF_ATQBAL;

sys/dev/ixl/i40e_adminq.c

644

enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

646

struct i40e_adminq_info *aq = &hw->aq;

sys/dev/ixl/i40e_adminq.c

65

hw->aq.asq.bah = I40E_PF_ATQBAH;

sys/dev/ixl/i40e_adminq.c

66

hw->aq.arq.tail = I40E_PF_ARQT;

sys/dev/ixl/i40e_adminq.c

666

i40e_adminq_init_regs(hw);

sys/dev/ixl/i40e_adminq.c

669

hw->aq.asq_cmd_timeout = I40E_ASQ_CMD_TIMEOUT;

sys/dev/ixl/i40e_adminq.c

67

hw->aq.arq.head = I40E_PF_ARQH;

sys/dev/ixl/i40e_adminq.c

672

ret_code = i40e_init_asq(hw);

sys/dev/ixl/i40e_adminq.c

677

ret_code = i40e_init_arq(hw);

sys/dev/ixl/i40e_adminq.c

68

hw->aq.arq.len = I40E_PF_ARQLEN;

sys/dev/ixl/i40e_adminq.c

682

if (i40e_is_vf(hw))

sys/dev/ixl/i40e_adminq.c

689

ret_code = i40e_aq_get_firmware_version(hw,

sys/dev/ixl/i40e_adminq.c

69

hw->aq.arq.bal = I40E_PF_ARQBAL;

sys/dev/ixl/i40e_adminq.c

70

hw->aq.arq.bah = I40E_PF_ARQBAH;

sys/dev/ixl/i40e_adminq.c

700

i40e_resume_aq(hw);

sys/dev/ixl/i40e_adminq.c

709

i40e_set_hw_flags(hw);

sys/dev/ixl/i40e_adminq.c

712

i40e_read_nvm_word(hw, I40E_SR_NVM_DEV_STARTER_VERSION,

sys/dev/ixl/i40e_adminq.c

713

&hw->nvm.version);

sys/dev/ixl/i40e_adminq.c

714

i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_LO, &eetrack_lo);

sys/dev/ixl/i40e_adminq.c

715

i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_HI, &eetrack_hi);

sys/dev/ixl/i40e_adminq.c

716

hw->nvm.eetrack = (eetrack_hi << 16) | eetrack_lo;

sys/dev/ixl/i40e_adminq.c

717

i40e_read_nvm_word(hw, I40E_SR_BOOT_CONFIG_PTR, &cfg_ptr);

sys/dev/ixl/i40e_adminq.c

718

i40e_read_nvm_word(hw, (cfg_ptr + I40E_NVM_OEM_VER_OFF),

sys/dev/ixl/i40e_adminq.c

720

i40e_read_nvm_word(hw, (cfg_ptr + (I40E_NVM_OEM_VER_OFF + 1)),

sys/dev/ixl/i40e_adminq.c

722

hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo;

sys/dev/ixl/i40e_adminq.c

730

i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL);

sys/dev/ixl/i40e_adminq.c

731

hw->nvm_release_on_done = FALSE;

sys/dev/ixl/i40e_adminq.c

732

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;

sys/dev/ixl/i40e_adminq.c

740

i40e_shutdown_arq(hw);

sys/dev/ixl/i40e_adminq.c

742

i40e_shutdown_asq(hw);

sys/dev/ixl/i40e_adminq.c

755

enum i40e_status_code i40e_shutdown_adminq(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

759

if (i40e_check_asq_alive(hw))

sys/dev/ixl/i40e_adminq.c

760

i40e_aq_queue_shutdown(hw, TRUE);

sys/dev/ixl/i40e_adminq.c

762

i40e_shutdown_asq(hw);

sys/dev/ixl/i40e_adminq.c

763

i40e_shutdown_arq(hw);

sys/dev/ixl/i40e_adminq.c

764

i40e_destroy_spinlock(&hw->aq.asq_spinlock);

sys/dev/ixl/i40e_adminq.c

765

i40e_destroy_spinlock(&hw->aq.arq_spinlock);

sys/dev/ixl/i40e_adminq.c

767

if (hw->nvm_buff.va)

sys/dev/ixl/i40e_adminq.c

768

i40e_free_virt_mem(hw, &hw->nvm_buff);

sys/dev/ixl/i40e_adminq.c

779

u16 i40e_clean_asq(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

78

enum i40e_status_code i40e_alloc_adminq_asq_ring(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

781

struct i40e_adminq_ring *asq = &(hw->aq.asq);

sys/dev/ixl/i40e_adminq.c

789

while (rd32(hw, hw->aq.asq.head) != ntc) {

sys/dev/ixl/i40e_adminq.c

790

i40e_debug(hw, I40E_DEBUG_AQ_COMMAND,

sys/dev/ixl/i40e_adminq.c

791

"ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head));

sys/dev/ixl/i40e_adminq.c

798

cb_func(hw, &desc_cb);

sys/dev/ixl/i40e_adminq.c

82

ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf,

sys/dev/ixl/i40e_adminq.c

821

bool i40e_asq_done(struct i40e_hw *hw)

sys/dev/ixl/i40e_adminq.c

826

return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use;

sys/dev/ixl/i40e_adminq.c

84

(hw->aq.num_asq_entries *

sys/dev/ixl/i40e_adminq.c

841

enum i40e_status_code i40e_asq_send_command(struct i40e_hw *hw,

sys/dev/ixl/i40e_adminq.c

855

i40e_acquire_spinlock(&hw->aq.asq_spinlock);

sys/dev/ixl/i40e_adminq.c

857

hw->aq.asq_last_status = I40E_AQ_RC_OK;

sys/dev/ixl/i40e_adminq.c

859

if (hw->aq.asq.count == 0) {

sys/dev/ixl/i40e_adminq.c

860

i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,

sys/dev/ixl/i40e_adminq.c

866

val = rd32(hw, hw->aq.asq.head);

sys/dev/ixl/i40e_adminq.c

867

if (val >= hw->aq.num_asq_entries) {

sys/dev/ixl/i40e_adminq.c

868

i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,

sys/dev/ixl/i40e_adminq.c

874

details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use);

sys/dev/ixl/i40e_adminq.c

90

ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf,

sys/dev/ixl/i40e_adminq.c

901

if (buff_size > hw->aq.asq_buf_size) {

sys/dev/ixl/i40e_adminq.c

902

i40e_debug(hw,

sys/dev/ixl/i40e_adminq.c

91

(hw->aq.num_asq_entries *

sys/dev/ixl/i40e_adminq.c

911

i40e_debug(hw,

sys/dev/ixl/i40e_adminq.c

925

if (i40e_clean_asq(hw) == 0) {

sys/dev/ixl/i40e_adminq.c

926

i40e_debug(hw,

sys/dev/ixl/i40e_adminq.c

934

desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use);

sys/dev/ixl/i40e_adminq.c

94

i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf);

sys/dev/ixl/i40e_adminq.c

942

dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]);

sys/dev/ixl/i40e_adminq.c

958

i40e_debug(hw, I40E_DEBUG_AQ_COMMAND, "AQTX: desc and buffer:\n");

sys/dev/ixl/i40e_adminq.c

959

i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc_on_ring,

sys/dev/ixl/i40e_adminq.c

961

(hw->aq.asq.next_to_use)++;

sys/dev/ixl/i40e_adminq.c

962

if (hw->aq.asq.next_to_use == hw->aq.asq.count)

sys/dev/ixl/i40e_adminq.c

963

hw->aq.asq.next_to_use = 0;

sys/dev/ixl/i40e_adminq.c

965

wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use);

sys/dev/ixl/i40e_adminq.c

977

if (i40e_asq_done(hw))

sys/dev/ixl/i40e_adminq.c

981

} while (total_delay < hw->aq.asq_cmd_timeout);

sys/dev/ixl/i40e_adminq.c

985

if (i40e_asq_done(hw)) {

sys/dev/ixl/i40e_adminq.c

993

i40e_debug(hw,

sys/dev/ixl/i40e_alloc.h

53

enum i40e_status_code i40e_allocate_dma_mem(struct i40e_hw *hw,

sys/dev/ixl/i40e_alloc.h

57

enum i40e_status_code i40e_free_dma_mem(struct i40e_hw *hw,

sys/dev/ixl/i40e_alloc.h

59

enum i40e_status_code i40e_allocate_virt_mem(struct i40e_hw *hw,

sys/dev/ixl/i40e_alloc.h

62

enum i40e_status_code i40e_free_virt_mem(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

1001

i40e_set_mac_type(hw);

sys/dev/ixl/i40e_common.c

1003

switch (hw->mac.type) {

sys/dev/ixl/i40e_common.c

1011

hw->phy.get_link_info = TRUE;

sys/dev/ixl/i40e_common.c

1014

port = (rd32(hw, I40E_PFGEN_PORTNUM) & I40E_PFGEN_PORTNUM_PORT_NUM_MASK)

sys/dev/ixl/i40e_common.c

1016

hw->port = (u8)port;

sys/dev/ixl/i40e_common.c

1017

ari = (rd32(hw, I40E_GLPCI_CAPSUP) & I40E_GLPCI_CAPSUP_ARI_EN_MASK) >>

sys/dev/ixl/i40e_common.c

1019

func_rid = rd32(hw, I40E_PF_FUNC_RID);

sys/dev/ixl/i40e_common.c

102

hw->mac.type, status);

sys/dev/ixl/i40e_common.c

1021

hw->pf_id = (u8)(func_rid & 0xff);

sys/dev/ixl/i40e_common.c

1023

hw->pf_id = (u8)(func_rid & 0x7);

sys/dev/ixl/i40e_common.c

1026

hw->nvmupd_features.major = I40E_NVMUPD_FEATURES_API_VER_MAJOR;

sys/dev/ixl/i40e_common.c

1027

hw->nvmupd_features.minor = I40E_NVMUPD_FEATURES_API_VER_MINOR;

sys/dev/ixl/i40e_common.c

1028

hw->nvmupd_features.size = sizeof(hw->nvmupd_features);

sys/dev/ixl/i40e_common.c

1029

i40e_memset(hw->nvmupd_features.features, 0x0,

sys/dev/ixl/i40e_common.c

1031

sizeof(*hw->nvmupd_features.features),

sys/dev/ixl/i40e_common.c

1035

hw->nvmupd_features.features[0] = 0;

sys/dev/ixl/i40e_common.c

1037

status = i40e_init_nvm(hw);

sys/dev/ixl/i40e_common.c

1048

static enum i40e_status_code i40e_aq_mac_address_read(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

1061

status = i40e_asq_send_command(hw, &desc, addrs,

sys/dev/ixl/i40e_common.c

1075

enum i40e_status_code i40e_aq_mac_address_write(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

1093

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

1105

enum i40e_status_code i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)

sys/dev/ixl/i40e_common.c

111

const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)

sys/dev/ixl/i40e_common.c

1111

status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);

sys/dev/ixl/i40e_common.c

1127

enum i40e_status_code i40e_get_port_mac_addr(struct i40e_hw *hw, u8 *mac_addr)

sys/dev/ixl/i40e_common.c

1133

status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);

sys/dev/ixl/i40e_common.c

1155

void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable)

sys/dev/ixl/i40e_common.c

1157

u32 abs_queue_idx = hw->func_caps.base_queue + queue;

sys/dev/ixl/i40e_common.c

1166

reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block));

sys/dev/ixl/i40e_common.c

1175

wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val);

sys/dev/ixl/i40e_common.c

1186

enum i40e_status_code i40e_read_pba_string(struct i40e_hw *hw, u8 *pba_num,

sys/dev/ixl/i40e_common.c

1195

status = i40e_read_nvm_word(hw, I40E_SR_PBA_FLAGS, &pba_word);

sys/dev/ixl/i40e_common.c

1201

status = i40e_read_nvm_word(hw, I40E_SR_PBA_BLOCK_PTR, &pba_ptr);

sys/dev/ixl/i40e_common.c

1207

status = i40e_read_nvm_word(hw, pba_ptr, &pba_size);

sys/dev/ixl/i40e_common.c

1223

status = i40e_read_nvm_word(hw, (pba_ptr + 1) + i, &pba_word);

sys/dev/ixl/i40e_common.c

1241

static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)

sys/dev/ixl/i40e_common.c

1245

switch (hw->phy.link_info.phy_type) {

sys/dev/ixl/i40e_common.c

1301

static enum i40e_status_code i40e_poll_globr(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

1307

reg = rd32(hw, I40E_GLGEN_RSTAT);

sys/dev/ixl/i40e_common.c

1327

enum i40e_status_code i40e_pf_reset(struct i40e_hw *hw)

sys/dev/ixl/i40e_common.c

1338

grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) &

sys/dev/ixl/i40e_common.c

1345

reg = rd32(hw, I40E_GLGEN_RSTAT);

sys/dev/ixl/i40e_common.c

1357

reg = rd32(hw, I40E_GLNVM_ULD);

sys/dev/ixl/i40e_common.c

1380

reg = rd32(hw, I40E_PFGEN_CTRL);

sys/dev/ixl/i40e_common.c

1381

wr32(hw, I40E_PFGEN_CTRL,

sys/dev/ixl/i40e_common.c

1384

reg = rd32(hw, I40E_PFGEN_CTRL);

sys/dev/ixl/i40e_common.c

1387

reg2 = rd32(hw, I40E_GLGEN_RSTAT);

sys/dev/ixl/i40e_common.c

1393

if (i40e_poll_globr(hw, grst_del) != I40E_SUCCESS)

sys/dev/ixl/i40e_common.c

1401

i40e_clear_pxe_mode(hw);

sys/dev/ixl/i40e_common.c

1415

void i40e_clear_hw(struct i40e_hw *hw)

sys/dev/ixl/i40e_common.c

1426

val = rd32(hw, I40E_GLPCI_CNF2);

sys/dev/ixl/i40e_common.c

1432

val = rd32(hw, I40E_PFLAN_QALLOC);

sys/dev/ixl/i40e_common.c

1442

val = rd32(hw, I40E_PF_VT_PFALLOC);

sys/dev/ixl/i40e_common.c

1453

wr32(hw, I40E_PFINT_ICR0_ENA, 0);

sys/dev/ixl/i40e_common.c

1456

wr32(hw, I40E_PFINT_DYN_CTLN(i), val);

sys/dev/ixl/i40e_common.c

1460

wr32(hw, I40E_PFINT_LNKLST0, val);

sys/dev/ixl/i40e_common.c

1462

wr32(hw, I40E_PFINT_LNKLSTN(i), val);

sys/dev/ixl/i40e_common.c

1465

wr32(hw, I40E_VPINT_LNKLST0(i), val);

sys/dev/ixl/i40e_common.c

1467

wr32(hw, I40E_VPINT_LNKLSTN(i), val);

sys/dev/ixl/i40e_common.c

1479

val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block));

sys/dev/ixl/i40e_common.c

1484

wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val);

sys/dev/ixl/i40e_common.c

1490

wr32(hw, I40E_QINT_TQCTL(i), 0);

sys/dev/ixl/i40e_common.c

1491

wr32(hw, I40E_QTX_ENA(i), 0);

sys/dev/ixl/i40e_common.c

1492

wr32(hw, I40E_QINT_RQCTL(i), 0);

sys/dev/ixl/i40e_common.c

1493

wr32(hw, I40E_QRX_ENA(i), 0);

sys/dev/ixl/i40e_common.c

1507

void i40e_clear_pxe_mode(struct i40e_hw *hw)

sys/dev/ixl/i40e_common.c

1509

if (i40e_check_asq_alive(hw))

sys/dev/ixl/i40e_common.c

1510

i40e_aq_clear_pxe_mode(hw, NULL);

sys/dev/ixl/i40e_common.c

1520

static u32 i40e_led_is_mine(struct i40e_hw *hw, int idx)

sys/dev/ixl/i40e_common.c

1525

if (!I40E_IS_X710TL_DEVICE(hw->device_id) &&

sys/dev/ixl/i40e_common.c

1526

!hw->func_caps.led[idx])

sys/dev/ixl/i40e_common.c

1528

gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(idx));

sys/dev/ixl/i40e_common.c

1536

(port != hw->port))

sys/dev/ixl/i40e_common.c

1564

u32 i40e_led_get(struct i40e_hw *hw)

sys/dev/ixl/i40e_common.c

1573

u32 gpio_val = i40e_led_is_mine(hw, i);

sys/dev/ixl/i40e_common.c

1596

void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)

sys/dev/ixl/i40e_common.c

1609

u32 gpio_val = i40e_led_is_mine(hw, i);

sys/dev/ixl/i40e_common.c

1615

if (I40E_IS_X710TL_DEVICE(hw->device_id)) {

sys/dev/ixl/i40e_common.c

162

snprintf(hw->err_str, sizeof(hw->err_str), "%d", aq_err);

sys/dev/ixl/i40e_common.c

163

return hw->err_str;

sys/dev/ixl/i40e_common.c

1638

wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);

sys/dev/ixl/i40e_common.c

1655

enum i40e_status_code i40e_aq_get_phy_capabilities(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

1684

status = i40e_asq_send_command(hw, &desc, abilities,

sys/dev/ixl/i40e_common.c

1687

switch (hw->aq.asq_last_status) {

sys/dev/ixl/i40e_common.c

1701

} while ((hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN) &&

sys/dev/ixl/i40e_common.c

1708

if (hw->mac.type == I40E_MAC_XL710 &&

sys/dev/ixl/i40e_common.c

1709

hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&

sys/dev/ixl/i40e_common.c

171

const char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err)

sys/dev/ixl/i40e_common.c

1710

hw->aq.api_min_ver >= I40E_MINOR_VER_GET_LINK_INFO_XL710) {

sys/dev/ixl/i40e_common.c

1711

status = i40e_aq_get_link_info(hw, TRUE, NULL, NULL);

sys/dev/ixl/i40e_common.c

1713

hw->phy.phy_types = LE32_TO_CPU(abilities->phy_type);

sys/dev/ixl/i40e_common.c

1714

hw->phy.phy_types |=

sys/dev/ixl/i40e_common.c

1734

enum i40e_status_code i40e_aq_set_phy_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

1751

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

1764

enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures,

sys/dev/ixl/i40e_common.c

1767

enum i40e_fc_mode fc_mode = hw->fc.requested_mode;

sys/dev/ixl/i40e_common.c

1791

status = i40e_aq_get_phy_capabilities(hw, FALSE, false, &abilities,

sys/dev/ixl/i40e_common.c

1818

status = i40e_aq_set_phy_config(hw, &config, NULL);

sys/dev/ixl/i40e_common.c

1824

status = i40e_update_link_info(hw);

sys/dev/ixl/i40e_common.c

1831

status = i40e_update_link_info(hw);

sys/dev/ixl/i40e_common.c

1851

enum i40e_status_code i40e_aq_set_mac_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

1874

if (hw->flags & I40E_HW_FLAG_DROP_MODE)

sys/dev/ixl/i40e_common.c

1878

i40e_debug(hw, I40E_DEBUG_ALL,

sys/dev/ixl/i40e_common.c

1886

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

1898

enum i40e_status_code i40e_aq_clear_pxe_mode(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

1911

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

1913

wr32(hw, I40E_GLLAN_RCTL_0, 0x1);

sys/dev/ixl/i40e_common.c

1926

enum i40e_status_code i40e_aq_set_link_restart_an(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

1943

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

1957

enum i40e_status_code i40e_aq_get_link_info(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

1964

struct i40e_link_status *hw_link_info = &hw->phy.link_info;

sys/dev/ixl/i40e_common.c

1977

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

1983

i40e_memcpy(&hw->phy.link_info_old, hw_link_info,

sys/dev/ixl/i40e_common.c

1988

hw->phy.media_type = i40e_get_media_type(hw);

sys/dev/ixl/i40e_common.c

2003

hw->fc.current_mode = I40E_FC_FULL;

sys/dev/ixl/i40e_common.c

2005

hw->fc.current_mode = I40E_FC_TX_PAUSE;

sys/dev/ixl/i40e_common.c

2007

hw->fc.current_mode = I40E_FC_RX_PAUSE;

sys/dev/ixl/i40e_common.c

2009

hw->fc.current_mode = I40E_FC_NONE;

sys/dev/ixl/i40e_common.c

2021

if ((hw->mac.type == I40E_MAC_XL710) &&

sys/dev/ixl/i40e_common.c

2022

(hw->aq.fw_maj_ver < 4 || (hw->aq.fw_maj_ver == 4 &&

sys/dev/ixl/i40e_common.c

2023

hw->aq.fw_min_ver < 40)) && hw_link_info->phy_type == 0xE)

sys/dev/ixl/i40e_common.c

2029

if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE &&

sys/dev/ixl/i40e_common.c

2030

hw->mac.type != I40E_MAC_X722) {

sys/dev/ixl/i40e_common.c

2035

hw->phy.phy_types = LE32_TO_CPU(tmp);

sys/dev/ixl/i40e_common.c

2036

hw->phy.phy_types |= ((u64)resp->link_type_ext << 32);

sys/dev/ixl/i40e_common.c

2045

hw->phy.get_link_info = FALSE;

sys/dev/ixl/i40e_common.c

2059

enum i40e_status_code i40e_aq_set_phy_int_mask(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2073

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2086

enum i40e_status_code i40e_aq_get_local_advt_reg(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2098

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2118

enum i40e_status_code i40e_aq_set_local_advt_reg(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2133

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2146

enum i40e_status_code i40e_aq_get_partner_advt(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2158

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2179

i40e_aq_set_lb_modes(struct i40e_hw *hw, u8 lb_level, u8 lb_type, u8 speed,

sys/dev/ixl/i40e_common.c

2196

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2209

enum i40e_status_code i40e_aq_set_phy_debug(struct i40e_hw *hw, u8 cmd_flags,

sys/dev/ixl/i40e_common.c

2222

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2235

static bool i40e_hw_ver_ge(struct i40e_hw *hw, u16 maj, u16 min)

sys/dev/ixl/i40e_common.c

2237

if (hw->aq.api_maj_ver > maj ||

sys/dev/ixl/i40e_common.c

2238

(hw->aq.api_maj_ver == maj && hw->aq.api_min_ver >= min))

sys/dev/ixl/i40e_common.c

2251

enum i40e_status_code i40e_aq_add_vsi(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2273

status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,

sys/dev/ixl/i40e_common.c

2294

enum i40e_status_code i40e_aq_set_default_vsi(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2311

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2322

enum i40e_status_code i40e_aq_clear_default_vsi(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2339

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2352

enum i40e_status_code i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2368

if (rx_only_promisc && i40e_hw_ver_ge(hw, 1, 5))

sys/dev/ixl/i40e_common.c

2375

if (i40e_hw_ver_ge(hw, 1, 5))

sys/dev/ixl/i40e_common.c

2380

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2392

enum i40e_status_code i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2412

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2424

enum i40e_status_code i40e_aq_set_vsi_full_promiscuous(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2449

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2462

enum i40e_status_code i40e_aq_set_vsi_mc_promisc_on_vlan(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2483

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2496

enum i40e_status_code i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2511

if (i40e_hw_ver_ge(hw, 1, 5))

sys/dev/ixl/i40e_common.c

2517

if (i40e_hw_ver_ge(hw, 1, 5))

sys/dev/ixl/i40e_common.c

2523

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2536

enum i40e_status_code i40e_aq_set_vsi_bc_promisc_on_vlan(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2557

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2571

enum i40e_status_code i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2592

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2604

enum i40e_status_code i40e_aq_set_vsi_vlan_promisc(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2623

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2634

enum i40e_status_code i40e_aq_get_vsi_params(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2653

status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,

sys/dev/ixl/i40e_common.c

2676

enum i40e_status_code i40e_aq_update_vsi_params(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2694

status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,

sys/dev/ixl/i40e_common.c

2713

enum i40e_status_code i40e_aq_get_switch_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2730

status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);

sys/dev/ixl/i40e_common.c

2746

enum i40e_status_code i40e_aq_set_switch_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2760

if (hw->flags & I40E_HW_FLAG_802_1AD_CAPABLE) {

sys/dev/ixl/i40e_common.c

2761

scfg->switch_tag = CPU_TO_LE16(hw->switch_tag);

sys/dev/ixl/i40e_common.c

2762

scfg->first_tag = CPU_TO_LE16(hw->first_tag);

sys/dev/ixl/i40e_common.c

2763

scfg->second_tag = CPU_TO_LE16(hw->second_tag);

sys/dev/ixl/i40e_common.c

2765

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2782

enum i40e_status_code i40e_aq_get_firmware_version(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2795

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

2829

enum i40e_status_code i40e_aq_send_driver_version(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

2855

status = i40e_asq_send_command(hw, &desc, dv->driver_string,

sys/dev/ixl/i40e_common.c

2871

enum i40e_status_code i40e_get_link_status(struct i40e_hw *hw, bool *link_up)

sys/dev/ixl/i40e_common.c

2875

if (hw->phy.get_link_info) {

sys/dev/ixl/i40e_common.c

2876

status = i40e_update_link_info(hw);

sys/dev/ixl/i40e_common.c

2879

i40e_debug(hw, I40E_DEBUG_LINK, "get link failed: status %d\n",

sys/dev/ixl/i40e_common.c

2883

*link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;

sys/dev/ixl/i40e_common.c

2892

enum i40e_status_code i40e_update_link_info(struct i40e_hw *hw)

sys/dev/ixl/i40e_common.c

2897

status = i40e_aq_get_link_info(hw, TRUE, NULL, NULL);

sys/dev/ixl/i40e_common.c

2902

if (((hw->phy.link_info.link_info & I40E_AQ_MEDIA_AVAILABLE) &&

sys/dev/ixl/i40e_common.c

2903

((hw->phy.link_info.link_info & I40E_AQ_LINK_UP) ||

sys/dev/ixl/i40e_common.c

2904

!(hw->phy.link_info_old.link_info & I40E_AQ_LINK_UP))) ||

sys/dev/ixl/i40e_common.c

2905

hw->mac.type == I40E_MAC_X722) {

sys/dev/ixl/i40e_common.c

2906

status = i40e_aq_get_phy_capabilities(hw, FALSE,

sys/dev/ixl/i40e_common.c

2907

hw->mac.type ==

sys/dev/ixl/i40e_common.c

2915

hw->phy.link_info.req_fec_info =

sys/dev/ixl/i40e_common.c

2919

hw->phy.link_info.req_fec_info =

sys/dev/ixl/i40e_common.c

2924

i40e_memcpy(hw->phy.link_info.module_type, &abilities.module_type,

sys/dev/ixl/i40e_common.c

2925

sizeof(hw->phy.link_info.module_type), I40E_NONDMA_TO_NONDMA);

sys/dev/ixl/i40e_common.c

2937

enum i40e_aq_link_speed i40e_get_link_speed(struct i40e_hw *hw)

sys/dev/ixl/i40e_common.c

2942

if (hw->phy.get_link_info) {

sys/dev/ixl/i40e_common.c

2943

status = i40e_aq_get_link_info(hw, TRUE, NULL, NULL);

sys/dev/ixl/i40e_common.c

2949

speed = hw->phy.link_info.link_speed;

sys/dev/ixl/i40e_common.c

2969

enum i40e_status_code i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,

sys/dev/ixl/i40e_common.c

3005

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

3027

enum i40e_status_code i40e_aq_get_veb_parameters(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

3046

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

3081

enum i40e_status_code i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

3092

if (count == 0 || !mv_list || !hw)

sys/dev/ixl/i40e_common.c

310

snprintf(hw->err_str, sizeof(hw->err_str), "%d", stat_err);

sys/dev/ixl/i40e_common.c

311

return hw->err_str;

sys/dev/ixl/i40e_common.c

3113

status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,

sys/dev/ixl/i40e_common.c

3129

enum i40e_status_code i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

3139

if (count == 0 || !mv_list || !hw)

sys/dev/ixl/i40e_common.c

3155

status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,

sys/dev/ixl/i40e_common.c

3178

static enum i40e_status_code i40e_mirrorrule_op(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

3209

status = i40e_asq_send_command(hw, &desc, mr_list, buf_size,

sys/dev/ixl/i40e_common.c

3212

hw->aq.asq_last_status == I40E_AQ_RC_ENOSPC) {

sys/dev/ixl/i40e_common.c

3238

enum i40e_status_code i40e_aq_add_mirrorrule(struct i40e_hw *hw, u16 sw_seid,

sys/dev/ixl/i40e_common.c

324

void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,

sys/dev/ixl/i40e_common.c

3249

return i40e_mirrorrule_op(hw, i40e_aqc_opc_add_mirror_rule, sw_seid,

sys/dev/ixl/i40e_common.c

3269

enum i40e_status_code i40e_aq_delete_mirrorrule(struct i40e_hw *hw, u16 sw_seid,

sys/dev/ixl/i40e_common.c

328

u32 effective_mask = hw->debug_mask & mask;

sys/dev/ixl/i40e_common.c

3284

return i40e_mirrorrule_op(hw, i40e_aqc_opc_delete_mirror_rule, sw_seid,

sys/dev/ixl/i40e_common.c

3297

enum i40e_status_code i40e_aq_add_vlan(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

3307

if (count == 0 || !v_list || !hw)

sys/dev/ixl/i40e_common.c

3323

status = i40e_asq_send_command(hw, &desc, v_list, buf_size,

sys/dev/ixl/i40e_common.c

3337

enum i40e_status_code i40e_aq_remove_vlan(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

3347

if (count == 0 || !v_list || !hw)

sys/dev/ixl/i40e_common.c

3363

status = i40e_asq_send_command(hw, &desc, v_list, buf_size,

sys/dev/ixl/i40e_common.c

338

i40e_debug(hw, mask & I40E_DEBUG_AQ_DESCRIPTOR,

sys/dev/ixl/i40e_common.c

3381

enum i40e_status_code i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,

sys/dev/ixl/i40e_common.c

3402

status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);

sys/dev/ixl/i40e_common.c

3416

enum i40e_status_code i40e_aq_debug_read_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

3432

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

344

i40e_debug(hw, mask & I40E_DEBUG_AQ_DESCRIPTOR,

sys/dev/ixl/i40e_common.c

3451

enum i40e_status_code i40e_aq_debug_write_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

3466

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

348

i40e_debug(hw, mask & I40E_DEBUG_AQ_DESCRIPTOR,

sys/dev/ixl/i40e_common.c

3482

enum i40e_status_code i40e_aq_request_resource(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

3501

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

3508

if (status == I40E_SUCCESS || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY)

sys/dev/ixl/i40e_common.c

352

i40e_debug(hw, mask & I40E_DEBUG_AQ_DESCRIPTOR,

sys/dev/ixl/i40e_common.c

3523

enum i40e_status_code i40e_aq_release_resource(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

3540

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

3557

enum i40e_status_code i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,

sys/dev/ixl/i40e_common.c

3588

status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);

sys/dev/ixl/i40e_common.c

359

i40e_debug(hw, mask, "AQ CMD Buffer:\n");

sys/dev/ixl/i40e_common.c

3604

enum i40e_status_code i40e_aq_read_nvm_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

3626

status = i40e_asq_send_command(hw, &desc, data, buf_size, cmd_details);

sys/dev/ixl/i40e_common.c

364

i40e_debug(hw, mask,

sys/dev/ixl/i40e_common.c

3643

enum i40e_status_code i40e_aq_write_nvm_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

3660

status = i40e_asq_send_command(hw, &desc, data, buf_size, cmd_details);

sys/dev/ixl/i40e_common.c

3673

enum i40e_status_code i40e_aq_nvm_update_in_process(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

3690

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

3704

i40e_aq_min_rollback_rev_update(struct i40e_hw *hw, u8 mode, u8 module,

sys/dev/ixl/i40e_common.c

3718

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

3730

enum i40e_status_code i40e_aq_oem_post_update(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

3739

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

3757

enum i40e_status_code i40e_aq_erase_nvm(struct i40e_hw *hw, u8 module_pointer,

sys/dev/ixl/i40e_common.c

3783

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

379

i40e_debug(hw, mask,

sys/dev/ixl/i40e_common.c

3798

static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,

sys/dev/ixl/i40e_common.c

3814

p = (struct i40e_hw_capabilities *)&hw->dev_caps;

sys/dev/ixl/i40e_common.c

3816

p = (struct i40e_hw_capabilities *)&hw->func_caps;

sys/dev/ixl/i40e_common.c

3830

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3838

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3844

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3850

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3856

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3861

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3868

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3875

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3878

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3885

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3891

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3897

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3902

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3912

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3914

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3917

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3923

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3929

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3936

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3938

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3941

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3948

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

395

bool i40e_check_asq_alive(struct i40e_hw *hw)

sys/dev/ixl/i40e_common.c

3950

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3957

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3959

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3965

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

397

if (hw->aq.asq.len) {

sys/dev/ixl/i40e_common.c

3971

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

398

if (!i40e_is_vf(hw))

sys/dev/ixl/i40e_common.c

399

return !!(rd32(hw, hw->aq.asq.len) &

sys/dev/ixl/i40e_common.c

3990

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

3993

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4000

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4006

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4012

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4018

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

402

return !!(rd32(hw, hw->aq.asq.len) &

sys/dev/ixl/i40e_common.c

4026

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4029

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4036

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4044

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4046

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4053

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4059

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4070

hw->num_wol_proxy_filters = (u16)number;

sys/dev/ixl/i40e_common.c

4071

hw->wol_proxy_vsi_seid = (u16)logical_id;

sys/dev/ixl/i40e_common.c

4078

i40e_debug(hw, I40E_DEBUG_INIT,

sys/dev/ixl/i40e_common.c

4080

hw->num_wol_proxy_filters);

sys/dev/ixl/i40e_common.c

4088

i40e_debug(hw, I40E_DEBUG_ALL, "device is FCoE capable\n");

sys/dev/ixl/i40e_common.c

4094

hw->num_ports = 0;

sys/dev/ixl/i40e_common.c

4102

i40e_aq_debug_read_register(hw, port_cfg_reg, &port_cfg, NULL);

sys/dev/ixl/i40e_common.c

4104

hw->num_ports++;

sys/dev/ixl/i40e_common.c

4114

if (hw->mac.type == I40E_MAC_X722) {

sys/dev/ixl/i40e_common.c

4115

if (i40e_acquire_nvm(hw, I40E_RESOURCE_READ) == I40E_SUCCESS) {

sys/dev/ixl/i40e_common.c

4116

status = i40e_aq_read_nvm(hw, I40E_SR_EMP_MODULE_PTR,

sys/dev/ixl/i40e_common.c

4122

hw->num_ports = 4;

sys/dev/ixl/i40e_common.c

4123

i40e_release_nvm(hw);

sys/dev/ixl/i40e_common.c

4138

if (hw->num_ports != 0) {

sys/dev/ixl/i40e_common.c

4139

hw->partition_id = (hw->pf_id / hw->num_ports) + 1;

sys/dev/ixl/i40e_common.c

4140

hw->num_partitions = num_functions / hw->num_ports;

sys/dev/ixl/i40e_common.c

416

enum i40e_status_code i40e_aq_queue_shutdown(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

4160

enum i40e_status_code i40e_aq_discover_capabilities(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

4183

status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);

sys/dev/ixl/i40e_common.c

4189

i40e_parse_discover_capabilities(hw, buff, LE32_TO_CPU(cmd->count),

sys/dev/ixl/i40e_common.c

4209

enum i40e_status_code i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,

sys/dev/ixl/i40e_common.c

4232

if (hw->mac.type == I40E_MAC_X722) {

sys/dev/ixl/i40e_common.c

4250

status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);

sys/dev/ixl/i40e_common.c

4269

enum i40e_status_code i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,

sys/dev/ixl/i40e_common.c

429

status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);

sys/dev/ixl/i40e_common.c

4298

status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);

sys/dev/ixl/i40e_common.c

4319

enum i40e_status_code i40e_aq_set_lldp_mib(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

4344

status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);

sys/dev/ixl/i40e_common.c

4357

enum i40e_status_code i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

4371

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

4387

i40e_aq_restore_lldp(struct i40e_hw *hw, u8 *setting, bool restore,

sys/dev/ixl/i40e_common.c

4395

if (!(hw->flags & I40E_HW_FLAG_FW_LLDP_PERSISTENT)) {

sys/dev/ixl/i40e_common.c

4396

i40e_debug(hw, I40E_DEBUG_ALL,

sys/dev/ixl/i40e_common.c

4406

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

4423

enum i40e_status_code i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,

sys/dev/ixl/i40e_common.c

4438

if (hw->flags & I40E_HW_FLAG_FW_LLDP_PERSISTENT)

sys/dev/ixl/i40e_common.c

4441

i40e_debug(hw, I40E_DEBUG_ALL,

sys/dev/ixl/i40e_common.c

4445

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

445

static enum i40e_status_code i40e_aq_get_set_rss_lut(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

4458

enum i40e_status_code i40e_aq_start_lldp(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

4472

if (hw->flags & I40E_HW_FLAG_FW_LLDP_PERSISTENT)

sys/dev/ixl/i40e_common.c

4475

i40e_debug(hw, I40E_DEBUG_ALL,

sys/dev/ixl/i40e_common.c

4479

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

4492

i40e_aq_set_dcb_parameters(struct i40e_hw *hw, bool dcb_enable,

sys/dev/ixl/i40e_common.c

4500

if (!(hw->flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))

sys/dev/ixl/i40e_common.c

4510

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

4524

enum i40e_status_code i40e_aq_get_cee_dcb_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

4537

status = i40e_asq_send_command(hw, &desc, (void *)buff, buff_size,

sys/dev/ixl/i40e_common.c

4552

enum i40e_status_code i40e_aq_start_stop_dcbx(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

4568

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

4585

enum i40e_status_code i40e_aq_add_udp_tunnel(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

4602

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

4616

enum i40e_status_code i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index,

sys/dev/ixl/i40e_common.c

4628

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

4645

enum i40e_status_code i40e_aq_get_switch_resource_alloc(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

4664

status = i40e_asq_send_command(hw, &desc, buf, length, cmd_details);

sys/dev/ixl/i40e_common.c

4680

enum i40e_status_code i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

4694

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

47

enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw)

sys/dev/ixl/i40e_common.c

4711

enum i40e_status_code i40e_aq_add_pvirt(struct i40e_hw *hw, u16 flags,

sys/dev/ixl/i40e_common.c

4730

status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);

sys/dev/ixl/i40e_common.c

4752

enum i40e_status_code i40e_aq_add_tag(struct i40e_hw *hw, bool direct_to_queue,

sys/dev/ixl/i40e_common.c

4776

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

4801

enum i40e_status_code i40e_aq_remove_tag(struct i40e_hw *hw, u16 vsi_seid,

sys/dev/ixl/i40e_common.c

4820

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

483

status = i40e_asq_send_command(hw, &desc, lut, lut_size, NULL);

sys/dev/ixl/i40e_common.c

4850

enum i40e_status_code i40e_aq_add_mcast_etag(struct i40e_hw *hw, u16 pv_seid,

sys/dev/ixl/i40e_common.c

4875

status = i40e_asq_send_command(hw, &desc, buf, length, cmd_details);

sys/dev/ixl/i40e_common.c

4900

enum i40e_status_code i40e_aq_remove_mcast_etag(struct i40e_hw *hw, u16 pv_seid,

sys/dev/ixl/i40e_common.c

4921

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

4947

enum i40e_status_code i40e_aq_update_tag(struct i40e_hw *hw, u16 vsi_seid,

sys/dev/ixl/i40e_common.c

4968

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

498

enum i40e_status_code i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 vsi_id,

sys/dev/ixl/i40e_common.c

4991

enum i40e_status_code i40e_aq_dcb_ignore_pfc(struct i40e_hw *hw, u8 tcmap,

sys/dev/ixl/i40e_common.c

5007

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

501

return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size,

sys/dev/ixl/i40e_common.c

5034

enum i40e_status_code i40e_aq_dcb_updated(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5042

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

5059

enum i40e_status_code i40e_aq_add_statistics(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

5076

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

5096

enum i40e_status_code i40e_aq_remove_statistics(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

5115

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

5129

enum i40e_status_code i40e_aq_set_port_parameters(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

515

enum i40e_status_code i40e_aq_set_rss_lut(struct i40e_hw *hw, u16 vsi_id,

sys/dev/ixl/i40e_common.c

5153

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

5169

static enum i40e_status_code i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

518

return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, TRUE);

sys/dev/ixl/i40e_common.c

5214

status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);

sys/dev/ixl/i40e_common.c

5227

enum i40e_status_code i40e_aq_config_vsi_bw_limit(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5243

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

5256

enum i40e_status_code i40e_aq_config_switch_comp_bw_limit(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5272

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

5284

enum i40e_status_code i40e_aq_config_vsi_ets_sla_bw_limit(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5289

return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),

sys/dev/ixl/i40e_common.c

53

if (hw->vendor_id == I40E_INTEL_VENDOR_ID) {

sys/dev/ixl/i40e_common.c

530

static enum i40e_status_code i40e_aq_get_set_rss_key(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5301

enum i40e_status_code i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5306

return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),

sys/dev/ixl/i40e_common.c

5319

struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

5323

return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),

sys/dev/ixl/i40e_common.c

5335

enum i40e_status_code i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5340

return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),

sys/dev/ixl/i40e_common.c

5352

enum i40e_status_code i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5357

return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),

sys/dev/ixl/i40e_common.c

5369

enum i40e_status_code i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5374

return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),

sys/dev/ixl/i40e_common.c

5386

enum i40e_status_code i40e_aq_query_port_ets_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5391

return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),

sys/dev/ixl/i40e_common.c

54

switch (hw->device_id) {

sys/dev/ixl/i40e_common.c

5403

enum i40e_status_code i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5408

return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),

sys/dev/ixl/i40e_common.c

5425

static enum i40e_status_code i40e_validate_filter_settings(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5495

val = rd32(hw, I40E_GLHMC_FCOEFMAX);

sys/dev/ixl/i40e_common.c

5513

enum i40e_status_code i40e_set_filter_control(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5524

ret = i40e_validate_filter_settings(hw, settings);

sys/dev/ixl/i40e_common.c

5529

val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);

sys/dev/ixl/i40e_common.c

5566

i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, val);

sys/dev/ixl/i40e_common.c

558

status = i40e_asq_send_command(hw, &desc, key, key_size, NULL);

sys/dev/ixl/i40e_common.c

5587

enum i40e_status_code i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5622

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

5639

void i40e_add_filter_to_drop_tx_flow_control_frames(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5649

status = i40e_aq_add_rem_control_packet_filter(hw, NULL, ethtype, flag,

sys/dev/ixl/i40e_common.c

5697

enum i40e_status_code i40e_aq_add_cloud_filters(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

570

enum i40e_status_code i40e_aq_get_rss_key(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5719

status = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);

sys/dev/ixl/i40e_common.c

5737

i40e_aq_add_cloud_filters_bb(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

574

return i40e_aq_get_set_rss_key(hw, vsi_id, key, FALSE);

sys/dev/ixl/i40e_common.c

5776

status = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);

sys/dev/ixl/i40e_common.c

5794

i40e_aq_rem_cloud_filters(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

5815

status = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);

sys/dev/ixl/i40e_common.c

5833

i40e_aq_rem_cloud_filters_bb(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_common.c

585

enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5872

status = i40e_asq_send_command(hw, &desc, filters, buff_len, NULL);

sys/dev/ixl/i40e_common.c

5885

i40e_status_code i40e_aq_replace_cloud_filters(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

589

return i40e_aq_get_set_rss_key(hw, vsi_id, key, TRUE);

sys/dev/ixl/i40e_common.c

5896

if (hw->mac.type == I40E_MAC_X722)

sys/dev/ixl/i40e_common.c

5900

if (hw->aq.fw_maj_ver < 6)

sys/dev/ixl/i40e_common.c

5914

status = i40e_asq_send_command(hw, &desc, cmd_buf,

sys/dev/ixl/i40e_common.c

5941

enum i40e_status_code i40e_aq_alternate_write(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5956

status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);

sys/dev/ixl/i40e_common.c

5972

enum i40e_status_code i40e_aq_alternate_write_indirect(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

5995

status = i40e_asq_send_command(hw, &desc, buffer,

sys/dev/ixl/i40e_common.c

6014

enum i40e_status_code i40e_aq_alternate_read(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6030

status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);

sys/dev/ixl/i40e_common.c

6053

enum i40e_status_code i40e_aq_alternate_read_indirect(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6076

status = i40e_asq_send_command(hw, &desc, buffer,

sys/dev/ixl/i40e_common.c

6090

enum i40e_status_code i40e_aq_alternate_clear(struct i40e_hw *hw)

sys/dev/ixl/i40e_common.c

6098

status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);

sys/dev/ixl/i40e_common.c

6112

enum i40e_status_code i40e_aq_alternate_write_done(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6128

status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);

sys/dev/ixl/i40e_common.c

6145

enum i40e_status_code i40e_aq_set_oem_mode(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6158

status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);

sys/dev/ixl/i40e_common.c

6170

enum i40e_status_code i40e_aq_resume_port_tx(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6178

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

6190

void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status)

sys/dev/ixl/i40e_common.c

6192

hw->bus.type = i40e_bus_type_pci_express;

sys/dev/ixl/i40e_common.c

6196

hw->bus.width = i40e_bus_width_pcie_x1;

sys/dev/ixl/i40e_common.c

6199

hw->bus.width = i40e_bus_width_pcie_x2;

sys/dev/ixl/i40e_common.c

6202

hw->bus.width = i40e_bus_width_pcie_x4;

sys/dev/ixl/i40e_common.c

6205

hw->bus.width = i40e_bus_width_pcie_x8;

sys/dev/ixl/i40e_common.c

6208

hw->bus.width = i40e_bus_width_unknown;

sys/dev/ixl/i40e_common.c

6214

hw->bus.speed = i40e_bus_speed_2500;

sys/dev/ixl/i40e_common.c

6217

hw->bus.speed = i40e_bus_speed_5000;

sys/dev/ixl/i40e_common.c

6220

hw->bus.speed = i40e_bus_speed_8000;

sys/dev/ixl/i40e_common.c

6223

hw->bus.speed = i40e_bus_speed_unknown;

sys/dev/ixl/i40e_common.c

6244

enum i40e_status_code i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id,

sys/dev/ixl/i40e_common.c

6273

status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);

sys/dev/ixl/i40e_common.c

6295

enum i40e_status_code i40e_enable_eee(struct i40e_hw *hw, bool enable)

sys/dev/ixl/i40e_common.c

6303

status = i40e_aq_get_phy_capabilities(hw, FALSE, TRUE, &abilities,

sys/dev/ixl/i40e_common.c

6320

status = i40e_aq_get_phy_capabilities(hw, FALSE, false, &abilities,

sys/dev/ixl/i40e_common.c

6346

status = i40e_aq_set_phy_config(hw, &config, NULL);

sys/dev/ixl/i40e_common.c

6361

enum i40e_status_code i40e_read_bw_from_alt_ram(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6371

(I40E_ALT_STRUCT_DWORDS_PER_PF * hw->pf_id);

sys/dev/ixl/i40e_common.c

6374

(I40E_ALT_STRUCT_DWORDS_PER_PF * hw->pf_id);

sys/dev/ixl/i40e_common.c

6377

status = i40e_aq_alternate_read(hw, max_bw_addr, max_bw,

sys/dev/ixl/i40e_common.c

6401

enum i40e_status_code i40e_aq_configure_partition_bw(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6418

status = i40e_asq_send_command(hw, &desc, bw_data, bwd_size, cmd_details);

sys/dev/ixl/i40e_common.c

6432

enum i40e_status_code i40e_read_phy_register_clause22(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6436

u8 port_num = (u8)hw->func_caps.mdio_port_num;

sys/dev/ixl/i40e_common.c

6445

wr32(hw, I40E_GLGEN_MSCA(port_num), command);

sys/dev/ixl/i40e_common.c

6447

command = rd32(hw, I40E_GLGEN_MSCA(port_num));

sys/dev/ixl/i40e_common.c

6457

i40e_debug(hw, I40E_DEBUG_PHY,

sys/dev/ixl/i40e_common.c

6460

command = rd32(hw, I40E_GLGEN_MSRWD(port_num));

sys/dev/ixl/i40e_common.c

6477

enum i40e_status_code i40e_write_phy_register_clause22(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6481

u8 port_num = (u8)hw->func_caps.mdio_port_num;

sys/dev/ixl/i40e_common.c

6486

wr32(hw, I40E_GLGEN_MSRWD(port_num), command);

sys/dev/ixl/i40e_common.c

6494

wr32(hw, I40E_GLGEN_MSCA(port_num), command);

sys/dev/ixl/i40e_common.c

6496

command = rd32(hw, I40E_GLGEN_MSCA(port_num));

sys/dev/ixl/i40e_common.c

6518

enum i40e_status_code i40e_read_phy_register_clause45(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6524

u8 port_num = (u8)hw->func_caps.mdio_port_num;

sys/dev/ixl/i40e_common.c

6533

wr32(hw, I40E_GLGEN_MSCA(port_num), command);

sys/dev/ixl/i40e_common.c

6535

command = rd32(hw, I40E_GLGEN_MSCA(port_num));

sys/dev/ixl/i40e_common.c

6545

i40e_debug(hw, I40E_DEBUG_PHY,

sys/dev/ixl/i40e_common.c

6558

wr32(hw, I40E_GLGEN_MSCA(port_num), command);

sys/dev/ixl/i40e_common.c

6560

command = rd32(hw, I40E_GLGEN_MSCA(port_num));

sys/dev/ixl/i40e_common.c

6570

command = rd32(hw, I40E_GLGEN_MSRWD(port_num));

sys/dev/ixl/i40e_common.c

6574

i40e_debug(hw, I40E_DEBUG_PHY,

sys/dev/ixl/i40e_common.c

6592

enum i40e_status_code i40e_write_phy_register_clause45(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6598

u8 port_num = (u8)hw->func_caps.mdio_port_num;

sys/dev/ixl/i40e_common.c

6607

wr32(hw, I40E_GLGEN_MSCA(port_num), command);

sys/dev/ixl/i40e_common.c

6609

command = rd32(hw, I40E_GLGEN_MSCA(port_num));

sys/dev/ixl/i40e_common.c

6618

i40e_debug(hw, I40E_DEBUG_PHY,

sys/dev/ixl/i40e_common.c

6624

wr32(hw, I40E_GLGEN_MSRWD(port_num), command);

sys/dev/ixl/i40e_common.c

6634

wr32(hw, I40E_GLGEN_MSCA(port_num), command);

sys/dev/ixl/i40e_common.c

6636

command = rd32(hw, I40E_GLGEN_MSCA(port_num));

sys/dev/ixl/i40e_common.c

6659

enum i40e_status_code i40e_write_phy_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6664

switch (hw->device_id) {

sys/dev/ixl/i40e_common.c

6666

status = i40e_write_phy_register_clause22(hw,

sys/dev/ixl/i40e_common.c

6677

status = i40e_write_phy_register_clause45(hw,

sys/dev/ixl/i40e_common.c

6698

enum i40e_status_code i40e_read_phy_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6703

switch (hw->device_id) {

sys/dev/ixl/i40e_common.c

6705

status = i40e_read_phy_register_clause22(hw, reg, phy_addr,

sys/dev/ixl/i40e_common.c

6716

status = i40e_read_phy_register_clause45(hw, page, reg,

sys/dev/ixl/i40e_common.c

6734

u8 i40e_get_phy_address(struct i40e_hw *hw, u8 dev_num)

sys/dev/ixl/i40e_common.c

6736

u8 port_num = (u8)hw->func_caps.mdio_port_num;

sys/dev/ixl/i40e_common.c

6737

u32 reg_val = rd32(hw, I40E_GLGEN_MDIO_I2C_SEL(port_num));

sys/dev/ixl/i40e_common.c

6750

enum i40e_status_code i40e_blink_phy_link_led(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6762

i = rd32(hw, I40E_PFGEN_PORTNUM);

sys/dev/ixl/i40e_common.c

6764

phy_addr = i40e_get_phy_address(hw, port_num);

sys/dev/ixl/i40e_common.c

6768

status = i40e_read_phy_register_clause45(hw,

sys/dev/ixl/i40e_common.c

6777

status = i40e_write_phy_register_clause45(hw,

sys/dev/ixl/i40e_common.c

6789

status = i40e_read_phy_register_clause45(hw,

sys/dev/ixl/i40e_common.c

6798

status = i40e_write_phy_register_clause45(hw,

sys/dev/ixl/i40e_common.c

6808

status = i40e_write_phy_register_clause45(hw,

sys/dev/ixl/i40e_common.c

6822

enum i40e_status_code i40e_led_get_reg(struct i40e_hw *hw, u16 led_addr,

sys/dev/ixl/i40e_common.c

6829

if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {

sys/dev/ixl/i40e_common.c

6830

status = i40e_aq_get_phy_register(hw,

sys/dev/ixl/i40e_common.c

6836

phy_addr = i40e_get_phy_address(hw, hw->port);

sys/dev/ixl/i40e_common.c

6837

status = i40e_read_phy_register_clause45(hw,

sys/dev/ixl/i40e_common.c

6851

enum i40e_status_code i40e_led_set_reg(struct i40e_hw *hw, u16 led_addr,

sys/dev/ixl/i40e_common.c

6857

if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {

sys/dev/ixl/i40e_common.c

6858

status = i40e_aq_set_phy_register(hw,

sys/dev/ixl/i40e_common.c

6864

phy_addr = i40e_get_phy_address(hw, hw->port);

sys/dev/ixl/i40e_common.c

6865

status = i40e_write_phy_register_clause45(hw,

sys/dev/ixl/i40e_common.c

6881

enum i40e_status_code i40e_led_get_phy(struct i40e_hw *hw, u16 *led_addr,

sys/dev/ixl/i40e_common.c

6891

if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {

sys/dev/ixl/i40e_common.c

6892

status = i40e_aq_get_phy_register(hw,

sys/dev/ixl/i40e_common.c

6902

phy_addr = i40e_get_phy_address(hw, hw->port);

sys/dev/ixl/i40e_common.c

6905

status = i40e_read_phy_register_clause45(hw,

sys/dev/ixl/i40e_common.c

6930

enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on,

sys/dev/ixl/i40e_common.c

6937

status = i40e_led_get_reg(hw, led_addr, &led_reg);

sys/dev/ixl/i40e_common.c

6943

status = i40e_led_set_reg(hw, led_addr, led_reg);

sys/dev/ixl/i40e_common.c

6947

status = i40e_led_get_reg(hw, led_addr, &led_reg);

sys/dev/ixl/i40e_common.c

6954

status = i40e_led_set_reg(hw, led_addr, led_reg);

sys/dev/ixl/i40e_common.c

6959

status = i40e_led_set_reg(hw, led_addr, led_ctl);

sys/dev/ixl/i40e_common.c

6964

status = i40e_led_set_reg(hw, led_addr, led_ctl);

sys/dev/ixl/i40e_common.c

6976

enum i40e_status_code i40e_get_phy_lpi_status(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

6988

(hw->device_id == I40E_DEV_ID_10G_BASE_T_BC ||

sys/dev/ixl/i40e_common.c

6989

hw->device_id == I40E_DEV_ID_5G_BASE_T_BC) &&

sys/dev/ixl/i40e_common.c

6990

(hw->phy.link_info.link_speed == I40E_LINK_SPEED_2_5GB ||

sys/dev/ixl/i40e_common.c

6991

hw->phy.link_info.link_speed == I40E_LINK_SPEED_5GB);

sys/dev/ixl/i40e_common.c

6993

hw->device_id == I40E_DEV_ID_1G_BASE_T_X722;

sys/dev/ixl/i40e_common.c

6997

ret = i40e_aq_get_phy_register(hw,

sys/dev/ixl/i40e_common.c

7013

val = rd32(hw, I40E_PRTPM_EEE_STAT);

sys/dev/ixl/i40e_common.c

7032

enum i40e_status_code i40e_get_lpi_counters(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7039

if ((hw->device_id == I40E_DEV_ID_10G_BASE_T_BC ||

sys/dev/ixl/i40e_common.c

7040

hw->device_id == I40E_DEV_ID_5G_BASE_T_BC) &&

sys/dev/ixl/i40e_common.c

7041

hw->phy.link_info.link_speed != I40E_LINK_SPEED_1GB) {

sys/dev/ixl/i40e_common.c

7046

retval = i40e_aq_run_phy_activity(hw,

sys/dev/ixl/i40e_common.c

7058

*tx_counter = rd32(hw, I40E_PRTPM_TLPIC);

sys/dev/ixl/i40e_common.c

7059

*rx_counter = rd32(hw, I40E_PRTPM_RLPIC);

sys/dev/ixl/i40e_common.c

7074

enum i40e_status_code i40e_get_lpi_duration(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7082

if (hw->device_id != I40E_DEV_ID_10G_BASE_T_BC &&

sys/dev/ixl/i40e_common.c

7083

hw->device_id != I40E_DEV_ID_5G_BASE_T_BC)

sys/dev/ixl/i40e_common.c

7087

(hw, I40E_AQ_RUN_PHY_ACT_ID_USR_DFND,

sys/dev/ixl/i40e_common.c

7097

if (hw->phy.link_info.link_speed == I40E_LINK_SPEED_1GB &&

sys/dev/ixl/i40e_common.c

7101

(hw, I40E_AQ_RUN_PHY_ACT_ID_USR_DFND,

sys/dev/ixl/i40e_common.c

7133

enum i40e_status_code i40e_lpi_stat_update(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7142

retval = i40e_get_lpi_counters(hw, &tx_counter, &rx_counter, &is_clear);

sys/dev/ixl/i40e_common.c

7176

enum i40e_status_code i40e_aq_rx_ctl_read_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7192

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

7205

u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr)

sys/dev/ixl/i40e_common.c

7212

use_register = (((hw->aq.api_maj_ver == 1) &&

sys/dev/ixl/i40e_common.c

7213

(hw->aq.api_min_ver < 5)) ||

sys/dev/ixl/i40e_common.c

7214

(hw->mac.type == I40E_MAC_X722));

sys/dev/ixl/i40e_common.c

7217

status = i40e_aq_rx_ctl_read_register(hw, reg_addr, &val, NULL);

sys/dev/ixl/i40e_common.c

7218

if (hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN && retry) {

sys/dev/ixl/i40e_common.c

7227

val = rd32(hw, reg_addr);

sys/dev/ixl/i40e_common.c

7242

enum i40e_status_code i40e_aq_rx_ctl_write_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7256

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

7267

void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)

sys/dev/ixl/i40e_common.c

7273

use_register = (((hw->aq.api_maj_ver == 1) &&

sys/dev/ixl/i40e_common.c

7274

(hw->aq.api_min_ver < 5)) ||

sys/dev/ixl/i40e_common.c

7275

(hw->mac.type == I40E_MAC_X722));

sys/dev/ixl/i40e_common.c

7278

status = i40e_aq_rx_ctl_write_register(hw, reg_addr,

sys/dev/ixl/i40e_common.c

7280

if (hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN && retry) {

sys/dev/ixl/i40e_common.c

7289

wr32(hw, reg_addr, reg_val);

sys/dev/ixl/i40e_common.c

7300

i40e_mdio_if_number_selection(struct i40e_hw *hw, bool set_mdio, u8 mdio_num,

sys/dev/ixl/i40e_common.c

7304

if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_EXTENDED)

sys/dev/ixl/i40e_common.c

7311

i40e_debug(hw, I40E_DEBUG_PHY,

sys/dev/ixl/i40e_common.c

7333

i40e_aq_set_phy_register_ext(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7355

i40e_mdio_if_number_selection(hw, set_mdio, mdio_num, cmd);

sys/dev/ixl/i40e_common.c

7357

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

7379

i40e_aq_get_phy_register_ext(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7400

i40e_mdio_if_number_selection(hw, set_mdio, mdio_num, cmd);

sys/dev/ixl/i40e_common.c

7402

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

7422

i40e_aq_run_phy_activity(struct i40e_hw *hw, u16 activity_id, u32 dnl_opcode,

sys/dev/ixl/i40e_common.c

7443

retval = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

7468

enum i40e_status_code i40e_aq_send_msg_to_pf(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7494

status = i40e_asq_send_command(hw, (struct i40e_aq_desc *)&desc, msg,

sys/dev/ixl/i40e_common.c

75

hw->mac.type = I40E_MAC_XL710;

sys/dev/ixl/i40e_common.c

7507

void i40e_vf_parse_hw_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7515

hw->dev_caps.num_vsis = msg->num_vsis;

sys/dev/ixl/i40e_common.c

7516

hw->dev_caps.num_rx_qp = msg->num_queue_pairs;

sys/dev/ixl/i40e_common.c

7517

hw->dev_caps.num_tx_qp = msg->num_queue_pairs;

sys/dev/ixl/i40e_common.c

7518

hw->dev_caps.num_msix_vectors_vf = msg->max_vectors;

sys/dev/ixl/i40e_common.c

7519

hw->dev_caps.dcb = msg->vf_cap_flags &

sys/dev/ixl/i40e_common.c

7521

hw->dev_caps.iwarp = (msg->vf_cap_flags &

sys/dev/ixl/i40e_common.c

7525

i40e_memcpy(hw->mac.perm_addr,

sys/dev/ixl/i40e_common.c

7529

i40e_memcpy(hw->mac.addr, vsi_res->default_mac_addr,

sys/dev/ixl/i40e_common.c

7545

enum i40e_status_code i40e_vf_reset(struct i40e_hw *hw)

sys/dev/ixl/i40e_common.c

7547

return i40e_aq_send_msg_to_pf(hw, VIRTCHNL_OP_RESET_VF,

sys/dev/ixl/i40e_common.c

7560

enum i40e_status_code i40e_aq_set_arp_proxy_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7580

status = i40e_asq_send_command(hw, &desc, proxy_config,

sys/dev/ixl/i40e_common.c

7596

enum i40e_status_code i40e_aq_set_ns_proxy_table_entry(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7617

status = i40e_asq_send_command(hw, &desc, ns_proxy_table_entry,

sys/dev/ixl/i40e_common.c

7638

enum i40e_status_code i40e_aq_set_clear_wol_filter(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7686

status = i40e_asq_send_command(hw, &desc, filter,

sys/dev/ixl/i40e_common.c

7700

enum i40e_status_code i40e_aq_get_wake_event_reason(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7711

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

7726

enum i40e_status_code i40e_aq_clear_all_wol_filters(struct i40e_hw *hw,

sys/dev/ixl/i40e_common.c

7735

status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);

sys/dev/ixl/i40e_common.c

83

hw->mac.type = I40E_MAC_X722;

sys/dev/ixl/i40e_common.c

86

hw->mac.type = I40E_MAC_X722_VF;

sys/dev/ixl/i40e_common.c

91

hw->mac.type = I40E_MAC_VF;

sys/dev/ixl/i40e_common.c

94

hw->mac.type = I40E_MAC_GENERIC;

sys/dev/ixl/i40e_common.c

994

enum i40e_status_code i40e_init_shared_code(struct i40e_hw *hw)

sys/dev/ixl/i40e_dcb.c

1000

} else if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) {

sys/dev/ixl/i40e_dcb.c

1004

} else if (hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {

sys/dev/ixl/i40e_dcb.c

1009

i40e_free_virt_mem(hw, &mem);

sys/dev/ixl/i40e_dcb.c

1276

enum i40e_status_code i40e_set_dcb_config(struct i40e_hw *hw)

sys/dev/ixl/i40e_dcb.c

1285

dcbcfg = &hw->local_dcbx_config;

sys/dev/ixl/i40e_dcb.c

1287

ret = i40e_allocate_virt_mem(hw, &mem, I40E_LLDPDU_SIZE);

sys/dev/ixl/i40e_dcb.c

1298

ret = i40e_aq_set_lldp_mib(hw, mib_type, (void *)lldpmib, miblen, NULL);

sys/dev/ixl/i40e_dcb.c

1300

i40e_free_virt_mem(hw, &mem);

sys/dev/ixl/i40e_dcb.c

1351

static enum i40e_status_code _i40e_read_lldp_cfg(struct i40e_hw *hw,

sys/dev/ixl/i40e_dcb.c

1360

ret = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);

sys/dev/ixl/i40e_dcb.c

1364

ret = i40e_aq_read_nvm(hw, 0x0, module * 2, sizeof(raw_mem), &raw_mem,

sys/dev/ixl/i40e_dcb.c

1366

i40e_release_nvm(hw);

sys/dev/ixl/i40e_dcb.c

1379

ret = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);

sys/dev/ixl/i40e_dcb.c

1383

ret = i40e_aq_read_nvm(hw, module, offset, sizeof(raw_mem), &raw_mem,

sys/dev/ixl/i40e_dcb.c

1385

i40e_release_nvm(hw);

sys/dev/ixl/i40e_dcb.c

1393

ret = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);

sys/dev/ixl/i40e_dcb.c

1397

ret = i40e_aq_read_nvm(hw, 0, address + offset,

sys/dev/ixl/i40e_dcb.c

1400

i40e_release_nvm(hw);

sys/dev/ixl/i40e_dcb.c

1413

enum i40e_status_code i40e_read_lldp_cfg(struct i40e_hw *hw,

sys/dev/ixl/i40e_dcb.c

1422

ret = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);

sys/dev/ixl/i40e_dcb.c

1426

ret = i40e_aq_read_nvm(hw, I40E_SR_NVM_CONTROL_WORD, 0, sizeof(mem),

sys/dev/ixl/i40e_dcb.c

1428

i40e_release_nvm(hw);

sys/dev/ixl/i40e_dcb.c

1438

ret = _i40e_read_lldp_cfg(hw, lldp_cfg, I40E_SR_EMP_MODULE_PTR,

sys/dev/ixl/i40e_dcb.c

1442

ret = _i40e_read_lldp_cfg(hw, lldp_cfg, I40E_EMP_MODULE_PTR,

sys/dev/ixl/i40e_dcb.c

45

enum i40e_status_code i40e_get_dcbx_status(struct i40e_hw *hw, u16 *status)

sys/dev/ixl/i40e_dcb.c

52

reg = rd32(hw, I40E_PRTDCB_GENS);

sys/dev/ixl/i40e_dcb.c

589

enum i40e_status_code i40e_aq_get_dcb_config(struct i40e_hw *hw, u8 mib_type,

sys/dev/ixl/i40e_dcb.c

598

ret = i40e_allocate_virt_mem(hw, &mem, I40E_LLDPDU_SIZE);

sys/dev/ixl/i40e_dcb.c

603

ret = i40e_aq_get_lldp_mib(hw, bridgetype, mib_type,

sys/dev/ixl/i40e_dcb.c

613

i40e_free_virt_mem(hw, &mem);

sys/dev/ixl/i40e_dcb.c

805

static enum i40e_status_code i40e_get_ieee_dcb_config(struct i40e_hw *hw)

sys/dev/ixl/i40e_dcb.c

810

hw->local_dcbx_config.dcbx_mode = I40E_DCBX_MODE_IEEE;

sys/dev/ixl/i40e_dcb.c

812

ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_LOCAL, 0,

sys/dev/ixl/i40e_dcb.c

813

&hw->local_dcbx_config);

sys/dev/ixl/i40e_dcb.c

818

ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,

sys/dev/ixl/i40e_dcb.c

820

&hw->remote_dcbx_config);

sys/dev/ixl/i40e_dcb.c

822

if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT)

sys/dev/ixl/i40e_dcb.c

835

enum i40e_status_code i40e_get_dcb_config(struct i40e_hw *hw)

sys/dev/ixl/i40e_dcb.c

842

if ((hw->mac.type == I40E_MAC_XL710) &&

sys/dev/ixl/i40e_dcb.c

843

(((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver < 33)) ||

sys/dev/ixl/i40e_dcb.c

844

(hw->aq.fw_maj_ver < 4)))

sys/dev/ixl/i40e_dcb.c

845

return i40e_get_ieee_dcb_config(hw);

sys/dev/ixl/i40e_dcb.c

848

if ((hw->mac.type == I40E_MAC_XL710) &&

sys/dev/ixl/i40e_dcb.c

849

((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver == 33))) {

sys/dev/ixl/i40e_dcb.c

850

ret = i40e_aq_get_cee_dcb_config(hw, &cee_v1_cfg,

sys/dev/ixl/i40e_dcb.c

854

hw->local_dcbx_config.dcbx_mode = I40E_DCBX_MODE_CEE;

sys/dev/ixl/i40e_dcb.c

855

hw->local_dcbx_config.tlv_status =

sys/dev/ixl/i40e_dcb.c

858

&hw->local_dcbx_config);

sys/dev/ixl/i40e_dcb.c

861

ret = i40e_aq_get_cee_dcb_config(hw, &cee_cfg,

sys/dev/ixl/i40e_dcb.c

865

hw->local_dcbx_config.dcbx_mode = I40E_DCBX_MODE_CEE;

sys/dev/ixl/i40e_dcb.c

866

hw->local_dcbx_config.tlv_status =

sys/dev/ixl/i40e_dcb.c

869

&hw->local_dcbx_config);

sys/dev/ixl/i40e_dcb.c

874

if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT)

sys/dev/ixl/i40e_dcb.c

875

return i40e_get_ieee_dcb_config(hw);

sys/dev/ixl/i40e_dcb.c

881

ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_LOCAL, 0,

sys/dev/ixl/i40e_dcb.c

882

&hw->desired_dcbx_config);

sys/dev/ixl/i40e_dcb.c

887

ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,

sys/dev/ixl/i40e_dcb.c

889

&hw->remote_dcbx_config);

sys/dev/ixl/i40e_dcb.c

891

if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT)

sys/dev/ixl/i40e_dcb.c

905

enum i40e_status_code i40e_init_dcb(struct i40e_hw *hw, bool enable_mib_change)

sys/dev/ixl/i40e_dcb.c

911

if (!hw->func_caps.dcb)

sys/dev/ixl/i40e_dcb.c

915

if (hw->flags & I40E_HW_FLAG_FW_LLDP_PERSISTENT) {

sys/dev/ixl/i40e_dcb.c

918

if (hw->mac.type == I40E_MAC_XL710)

sys/dev/ixl/i40e_dcb.c

920

else if (hw->mac.type == I40E_MAC_X722)

sys/dev/ixl/i40e_dcb.c

925

ret = i40e_read_nvm_module_data(hw,

sys/dev/ixl/i40e_dcb.c

932

ret = i40e_read_lldp_cfg(hw, &lldp_cfg);

sys/dev/ixl/i40e_dcb.c

938

adminstatus = lldp_cfg.adminstatus >> (hw->port * 4);

sys/dev/ixl/i40e_dcb.c

943

hw->dcbx_status = I40E_DCBX_STATUS_DISABLED;

sys/dev/ixl/i40e_dcb.c

948

ret = i40e_get_dcbx_status(hw, &hw->dcbx_status);

sys/dev/ixl/i40e_dcb.c

953

if (hw->dcbx_status == I40E_DCBX_STATUS_DONE ||

sys/dev/ixl/i40e_dcb.c

954

hw->dcbx_status == I40E_DCBX_STATUS_IN_PROGRESS) {

sys/dev/ixl/i40e_dcb.c

956

ret = i40e_get_dcb_config(hw);

sys/dev/ixl/i40e_dcb.c

959

} else if (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED) {

sys/dev/ixl/i40e_dcb.c

965

ret = i40e_aq_cfg_lldp_mib_change_event(hw, TRUE, NULL);

sys/dev/ixl/i40e_dcb.c

979

i40e_get_fw_lldp_status(struct i40e_hw *hw,

sys/dev/ixl/i40e_dcb.c

990

ret = i40e_allocate_virt_mem(hw, &mem, I40E_LLDPDU_SIZE);

sys/dev/ixl/i40e_dcb.c

995

ret = i40e_aq_get_lldp_mib(hw, 0, 0, (void *)lldpmib,

sys/dev/ixl/i40e_dcb.h

221

enum i40e_status_code i40e_get_dcbx_status(struct i40e_hw *hw,

sys/dev/ixl/i40e_dcb.h

225

enum i40e_status_code i40e_aq_get_dcb_config(struct i40e_hw *hw, u8 mib_type,

sys/dev/ixl/i40e_dcb.h

228

enum i40e_status_code i40e_get_dcb_config(struct i40e_hw *hw);

sys/dev/ixl/i40e_dcb.h

229

enum i40e_status_code i40e_init_dcb(struct i40e_hw *hw,

sys/dev/ixl/i40e_dcb.h

232

i40e_get_fw_lldp_status(struct i40e_hw *hw,

sys/dev/ixl/i40e_dcb.h

234

enum i40e_status_code i40e_set_dcb_config(struct i40e_hw *hw);

sys/dev/ixl/i40e_hmc.c

120

i40e_free_dma_mem(hw, &mem);

sys/dev/ixl/i40e_hmc.c

142

enum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw,

sys/dev/ixl/i40e_hmc.c

177

ret_code = i40e_allocate_dma_mem(hw, page, i40e_mem_bp,

sys/dev/ixl/i40e_hmc.c

223

enum i40e_status_code i40e_remove_pd_bp(struct i40e_hw *hw,

sys/dev/ixl/i40e_hmc.c

261

I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, idx);

sys/dev/ixl/i40e_hmc.c

265

ret_code = i40e_free_dma_mem(hw, &(pd_entry->bp.addr));

sys/dev/ixl/i40e_hmc.c

269

i40e_free_virt_mem(hw, &pd_table->pd_entry_virt_mem);

sys/dev/ixl/i40e_hmc.c

307

enum i40e_status_code i40e_remove_sd_bp_new(struct i40e_hw *hw,

sys/dev/ixl/i40e_hmc.c

318

I40E_CLEAR_PF_SD_ENTRY(hw, idx, I40E_SD_TYPE_DIRECT);

sys/dev/ixl/i40e_hmc.c

320

return i40e_free_dma_mem(hw, &(sd_entry->u.bp.addr));

sys/dev/ixl/i40e_hmc.c

356

enum i40e_status_code i40e_remove_pd_page_new(struct i40e_hw *hw,

sys/dev/ixl/i40e_hmc.c

366

I40E_CLEAR_PF_SD_ENTRY(hw, idx, I40E_SD_TYPE_PAGED);

sys/dev/ixl/i40e_hmc.c

368

return i40e_free_dma_mem(hw, &(sd_entry->u.pd_table.pd_page_addr));

sys/dev/ixl/i40e_hmc.c

49

enum i40e_status_code i40e_add_sd_table_entry(struct i40e_hw *hw,

sys/dev/ixl/i40e_hmc.c

85

ret_code = i40e_allocate_dma_mem(hw, &mem, mem_type, alloc_len,

sys/dev/ixl/i40e_hmc.c

91

ret_code = i40e_allocate_virt_mem(hw,

sys/dev/ixl/i40e_hmc.h

129

#define I40E_SET_PF_SD_ENTRY(hw, pa, sd_index, type) \

sys/dev/ixl/i40e_hmc.h

139

wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \

sys/dev/ixl/i40e_hmc.h

140

wr32((hw), I40E_PFHMC_SDDATALOW, val2); \

sys/dev/ixl/i40e_hmc.h

141

wr32((hw), I40E_PFHMC_SDCMD, val3); \

sys/dev/ixl/i40e_hmc.h

150

#define I40E_CLEAR_PF_SD_ENTRY(hw, sd_index, type) \

sys/dev/ixl/i40e_hmc.h

158

wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \

sys/dev/ixl/i40e_hmc.h

159

wr32((hw), I40E_PFHMC_SDDATALOW, val2); \

sys/dev/ixl/i40e_hmc.h

160

wr32((hw), I40E_PFHMC_SDCMD, val3); \

sys/dev/ixl/i40e_hmc.h

169

#define I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx) \

sys/dev/ixl/i40e_hmc.h

170

wr32((hw), I40E_PFHMC_PDINV, \

sys/dev/ixl/i40e_hmc.h

221

enum i40e_status_code i40e_add_sd_table_entry(struct i40e_hw *hw,

sys/dev/ixl/i40e_hmc.h

227

enum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw,

sys/dev/ixl/i40e_hmc.h

231

enum i40e_status_code i40e_remove_pd_bp(struct i40e_hw *hw,

sys/dev/ixl/i40e_hmc.h

236

enum i40e_status_code i40e_remove_sd_bp_new(struct i40e_hw *hw,

sys/dev/ixl/i40e_hmc.h

241

enum i40e_status_code i40e_remove_pd_page_new(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

106

enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,

sys/dev/ixl/i40e_lan_hmc.c

115

hw->hmc.signature = I40E_HMC_INFO_SIGNATURE;

sys/dev/ixl/i40e_lan_hmc.c

116

hw->hmc.hmc_fn_id = hw->pf_id;

sys/dev/ixl/i40e_lan_hmc.c

1174

static enum i40e_status_code i40e_clear_hmc_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

1179

i40e_memset(context_bytes, 0, (u32)hw->hmc.hmc_obj[hmc_type].size,

sys/dev/ixl/i40e_lan_hmc.c

119

ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem,

sys/dev/ixl/i40e_lan_hmc.c

123

hw->hmc.hmc_obj = (struct i40e_hmc_obj_info *)

sys/dev/ixl/i40e_lan_hmc.c

1233

enum i40e_status_code i40e_hmc_get_object_va(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

1239

struct i40e_hmc_info *hmc_info = &hw->hmc;

sys/dev/ixl/i40e_lan_hmc.c

124

hw->hmc.hmc_obj_virt_mem.va;

sys/dev/ixl/i40e_lan_hmc.c

127

full_obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_FULL];

sys/dev/ixl/i40e_lan_hmc.c

1299

enum i40e_status_code i40e_get_lan_tx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

1306

err = i40e_hmc_get_object_va(hw, &context_bytes, I40E_HMC_LAN_TX, queue);

sys/dev/ixl/i40e_lan_hmc.c

1319

enum i40e_status_code i40e_clear_lan_tx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

1325

err = i40e_hmc_get_object_va(hw, &context_bytes, I40E_HMC_LAN_TX, queue);

sys/dev/ixl/i40e_lan_hmc.c

1329

return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_TX);

sys/dev/ixl/i40e_lan_hmc.c

1338

enum i40e_status_code i40e_set_lan_tx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

134

obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX];

sys/dev/ixl/i40e_lan_hmc.c

1345

err = i40e_hmc_get_object_va(hw, &context_bytes, I40E_HMC_LAN_TX, queue);

sys/dev/ixl/i40e_lan_hmc.c

135

obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);

sys/dev/ixl/i40e_lan_hmc.c

1359

enum i40e_status_code i40e_get_lan_rx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

1366

err = i40e_hmc_get_object_va(hw, &context_bytes, I40E_HMC_LAN_RX, queue);

sys/dev/ixl/i40e_lan_hmc.c

1379

enum i40e_status_code i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

138

size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ);

sys/dev/ixl/i40e_lan_hmc.c

1385

err = i40e_hmc_get_object_va(hw, &context_bytes, I40E_HMC_LAN_RX, queue);

sys/dev/ixl/i40e_lan_hmc.c

1389

return i40e_clear_hmc_context(hw, context_bytes, I40E_HMC_LAN_RX);

sys/dev/ixl/i40e_lan_hmc.c

1398

enum i40e_status_code i40e_set_lan_rx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

1405

err = i40e_hmc_get_object_va(hw, &context_bytes, I40E_HMC_LAN_RX, queue);

sys/dev/ixl/i40e_lan_hmc.c

154

obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX];

sys/dev/ixl/i40e_lan_hmc.c

155

obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);

sys/dev/ixl/i40e_lan_hmc.c

157

obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_TX].base +

sys/dev/ixl/i40e_lan_hmc.c

158

(hw->hmc.hmc_obj[I40E_HMC_LAN_TX].cnt *

sys/dev/ixl/i40e_lan_hmc.c

159

hw->hmc.hmc_obj[I40E_HMC_LAN_TX].size);

sys/dev/ixl/i40e_lan_hmc.c

161

size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ);

sys/dev/ixl/i40e_lan_hmc.c

177

obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX];

sys/dev/ixl/i40e_lan_hmc.c

178

obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEMAX);

sys/dev/ixl/i40e_lan_hmc.c

180

obj->base = hw->hmc.hmc_obj[I40E_HMC_LAN_RX].base +

sys/dev/ixl/i40e_lan_hmc.c

181

(hw->hmc.hmc_obj[I40E_HMC_LAN_RX].cnt *

sys/dev/ixl/i40e_lan_hmc.c

182

hw->hmc.hmc_obj[I40E_HMC_LAN_RX].size);

sys/dev/ixl/i40e_lan_hmc.c

184

size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ);

sys/dev/ixl/i40e_lan_hmc.c

200

obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT];

sys/dev/ixl/i40e_lan_hmc.c

201

obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEFMAX);

sys/dev/ixl/i40e_lan_hmc.c

203

obj->base = hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].base +

sys/dev/ixl/i40e_lan_hmc.c

204

(hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].cnt *

sys/dev/ixl/i40e_lan_hmc.c

205

hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].size);

sys/dev/ixl/i40e_lan_hmc.c

207

size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ);

sys/dev/ixl/i40e_lan_hmc.c

222

hw->hmc.first_sd_index = 0;

sys/dev/ixl/i40e_lan_hmc.c

223

hw->hmc.sd_table.ref_cnt = 0;

sys/dev/ixl/i40e_lan_hmc.c

226

if (NULL == hw->hmc.sd_table.sd_entry) {

sys/dev/ixl/i40e_lan_hmc.c

227

hw->hmc.sd_table.sd_cnt = (u32)

sys/dev/ixl/i40e_lan_hmc.c

232

ret_code = i40e_allocate_virt_mem(hw, &hw->hmc.sd_table.addr,

sys/dev/ixl/i40e_lan_hmc.c

234

hw->hmc.sd_table.sd_cnt));

sys/dev/ixl/i40e_lan_hmc.c

237

hw->hmc.sd_table.sd_entry =

sys/dev/ixl/i40e_lan_hmc.c

238

(struct i40e_hmc_sd_entry *)hw->hmc.sd_table.addr.va;

sys/dev/ixl/i40e_lan_hmc.c

246

if (hw->hmc.hmc_obj_virt_mem.va)

sys/dev/ixl/i40e_lan_hmc.c

247

i40e_free_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem);

sys/dev/ixl/i40e_lan_hmc.c

266

static enum i40e_status_code i40e_remove_pd_page(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

273

ret_code = i40e_remove_pd_page_new(hw, hmc_info, idx, TRUE);

sys/dev/ixl/i40e_lan_hmc.c

293

static enum i40e_status_code i40e_remove_sd_bp(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

300

ret_code = i40e_remove_sd_bp_new(hw, hmc_info, idx, TRUE);

sys/dev/ixl/i40e_lan_hmc.c

313

enum i40e_status_code i40e_create_lan_hmc_object(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

383

ret_code = i40e_add_sd_table_entry(hw, info->hmc_info, j,

sys/dev/ixl/i40e_lan_hmc.c

400

ret_code = i40e_add_pd_table_entry(hw,

sys/dev/ixl/i40e_lan_hmc.c

411

i40e_remove_pd_bp(hw, info->hmc_info,

sys/dev/ixl/i40e_lan_hmc.c

421

I40E_SET_PF_SD_ENTRY(hw,

sys/dev/ixl/i40e_lan_hmc.c

426

I40E_SET_PF_SD_ENTRY(hw, sd_entry->u.bp.addr.pa,

sys/dev/ixl/i40e_lan_hmc.c

447

i40e_remove_pd_bp(hw, info->hmc_info, i);

sys/dev/ixl/i40e_lan_hmc.c

448

i40e_remove_pd_page(hw, info->hmc_info, (j - 1));

sys/dev/ixl/i40e_lan_hmc.c

451

i40e_remove_sd_bp(hw, info->hmc_info, (j - 1));

sys/dev/ixl/i40e_lan_hmc.c

472

enum i40e_status_code i40e_configure_lan_hmc(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

476

u8 hmc_fn_id = hw->hmc.hmc_fn_id;

sys/dev/ixl/i40e_lan_hmc.c

481

info.hmc_info = &hw->hmc;

sys/dev/ixl/i40e_lan_hmc.c

484

info.direct_mode_sz = hw->hmc.hmc_obj[I40E_HMC_LAN_FULL].size;

sys/dev/ixl/i40e_lan_hmc.c

493

ret_code = i40e_create_lan_hmc_object(hw, &info);

sys/dev/ixl/i40e_lan_hmc.c

505

ret_code = i40e_create_lan_hmc_object(hw, &info);

sys/dev/ixl/i40e_lan_hmc.c

520

obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_TX];

sys/dev/ixl/i40e_lan_hmc.c

521

wr32(hw, I40E_GLHMC_LANTXBASE(hmc_fn_id),

sys/dev/ixl/i40e_lan_hmc.c

523

wr32(hw, I40E_GLHMC_LANTXCNT(hmc_fn_id), obj->cnt);

sys/dev/ixl/i40e_lan_hmc.c

526

obj = &hw->hmc.hmc_obj[I40E_HMC_LAN_RX];

sys/dev/ixl/i40e_lan_hmc.c

527

wr32(hw, I40E_GLHMC_LANRXBASE(hmc_fn_id),

sys/dev/ixl/i40e_lan_hmc.c

529

wr32(hw, I40E_GLHMC_LANRXCNT(hmc_fn_id), obj->cnt);

sys/dev/ixl/i40e_lan_hmc.c

532

obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX];

sys/dev/ixl/i40e_lan_hmc.c

533

wr32(hw, I40E_GLHMC_FCOEDDPBASE(hmc_fn_id),

sys/dev/ixl/i40e_lan_hmc.c

535

wr32(hw, I40E_GLHMC_FCOEDDPCNT(hmc_fn_id), obj->cnt);

sys/dev/ixl/i40e_lan_hmc.c

538

obj = &hw->hmc.hmc_obj[I40E_HMC_FCOE_FILT];

sys/dev/ixl/i40e_lan_hmc.c

539

wr32(hw, I40E_GLHMC_FCOEFBASE(hmc_fn_id),

sys/dev/ixl/i40e_lan_hmc.c

541

wr32(hw, I40E_GLHMC_FCOEFCNT(hmc_fn_id), obj->cnt);

sys/dev/ixl/i40e_lan_hmc.c

557

enum i40e_status_code i40e_delete_lan_hmc_object(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.c

624

ret_code = i40e_remove_pd_bp(hw, info->hmc_info, j);

sys/dev/ixl/i40e_lan_hmc.c

645

ret_code = i40e_remove_sd_bp(hw, info->hmc_info, i);

sys/dev/ixl/i40e_lan_hmc.c

650

ret_code = i40e_remove_pd_page(hw, info->hmc_info, i);

sys/dev/ixl/i40e_lan_hmc.c

669

enum i40e_status_code i40e_shutdown_lan_hmc(struct i40e_hw *hw)

sys/dev/ixl/i40e_lan_hmc.c

674

info.hmc_info = &hw->hmc;

sys/dev/ixl/i40e_lan_hmc.c

680

ret_code = i40e_delete_lan_hmc_object(hw, &info);

sys/dev/ixl/i40e_lan_hmc.c

683

i40e_free_virt_mem(hw, &hw->hmc.sd_table.addr);

sys/dev/ixl/i40e_lan_hmc.c

684

hw->hmc.sd_table.sd_cnt = 0;

sys/dev/ixl/i40e_lan_hmc.c

685

hw->hmc.sd_table.sd_entry = NULL;

sys/dev/ixl/i40e_lan_hmc.c

688

i40e_free_virt_mem(hw, &hw->hmc.hmc_obj_virt_mem);

sys/dev/ixl/i40e_lan_hmc.c

689

hw->hmc.hmc_obj = NULL;

sys/dev/ixl/i40e_lan_hmc.h

170

enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,

sys/dev/ixl/i40e_lan_hmc.h

173

enum i40e_status_code i40e_configure_lan_hmc(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.h

175

enum i40e_status_code i40e_shutdown_lan_hmc(struct i40e_hw *hw);

sys/dev/ixl/i40e_lan_hmc.h

179

enum i40e_status_code i40e_get_lan_tx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.h

182

enum i40e_status_code i40e_clear_lan_tx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.h

184

enum i40e_status_code i40e_set_lan_tx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.h

187

enum i40e_status_code i40e_get_lan_rx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.h

190

enum i40e_status_code i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.h

192

enum i40e_status_code i40e_set_lan_rx_queue_context(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.h

195

enum i40e_status_code i40e_create_lan_hmc_object(struct i40e_hw *hw,

sys/dev/ixl/i40e_lan_hmc.h

197

enum i40e_status_code i40e_delete_lan_hmc_object(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

1005

i40e_acquire_spinlock(&hw->aq.arq_spinlock);

sys/dev/ixl/i40e_nvm.c

1006

switch (hw->nvmupd_state) {

sys/dev/ixl/i40e_nvm.c

1008

status = i40e_nvmupd_state_init(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1012

status = i40e_nvmupd_state_reading(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1016

status = i40e_nvmupd_state_writing(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

102

gtime = rd32(hw, I40E_GLVFGEN_TIMER);

sys/dev/ixl/i40e_nvm.c

1025

i40e_nvmupd_clear_wait_state(hw);

sys/dev/ixl/i40e_nvm.c

1036

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1037

"NVMUPD: no such state %d\n", hw->nvmupd_state);

sys/dev/ixl/i40e_nvm.c

1043

i40e_release_spinlock(&hw->aq.arq_spinlock);

sys/dev/ixl/i40e_nvm.c

105

hw->nvm.hw_semaphore_timeout = I40E_MS_TO_GTIME(time_left) + gtime;

sys/dev/ixl/i40e_nvm.c

1057

static enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

1066

upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);

sys/dev/ixl/i40e_nvm.c

1070

status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);

sys/dev/ixl/i40e_nvm.c

1073

hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1075

status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1076

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

108

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1081

status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);

sys/dev/ixl/i40e_nvm.c

1084

hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1086

status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1088

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

1090

hw->nvmupd_state = I40E_NVMUPD_STATE_READING;

sys/dev/ixl/i40e_nvm.c

1095

status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);

sys/dev/ixl/i40e_nvm.c

1098

hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1100

status = i40e_nvmupd_nvm_erase(hw, cmd, perrno);

sys/dev/ixl/i40e_nvm.c

1102

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

1104

hw->nvm_release_on_done = TRUE;

sys/dev/ixl/i40e_nvm.c

1105

hw->nvm_wait_opcode = i40e_aqc_opc_nvm_erase;

sys/dev/ixl/i40e_nvm.c

1106

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;

sys/dev/ixl/i40e_nvm.c

111

hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1112

status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);

sys/dev/ixl/i40e_nvm.c

1115

hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1117

status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1119

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

1121

hw->nvm_release_on_done = TRUE;

sys/dev/ixl/i40e_nvm.c

1122

hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;

sys/dev/ixl/i40e_nvm.c

1123

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;

sys/dev/ixl/i40e_nvm.c

1129

status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);

sys/dev/ixl/i40e_nvm.c

1132

hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1134

status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1136

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

1138

hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;

sys/dev/ixl/i40e_nvm.c

1139

hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;

sys/dev/ixl/i40e_nvm.c

1145

status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);

sys/dev/ixl/i40e_nvm.c

1148

hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1150

status = i40e_update_nvm_checksum(hw);

sys/dev/ixl/i40e_nvm.c

1152

*perrno = hw->aq.asq_last_status ?

sys/dev/ixl/i40e_nvm.c

1154

hw->aq.asq_last_status) :

sys/dev/ixl/i40e_nvm.c

1156

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

1158

hw->nvm_release_on_done = TRUE;

sys/dev/ixl/i40e_nvm.c

1159

hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;

sys/dev/ixl/i40e_nvm.c

1160

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;

sys/dev/ixl/i40e_nvm.c

1166

status = i40e_nvmupd_exec_aq(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1170

status = i40e_nvmupd_get_aq_result(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1174

status = i40e_nvmupd_get_aq_event(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1178

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

118

gtime = rd32(hw, I40E_GLVFGEN_TIMER);

sys/dev/ixl/i40e_nvm.c

119

ret_code = i40e_aq_request_resource(hw,

sys/dev/ixl/i40e_nvm.c

1198

static enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

1207

upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);

sys/dev/ixl/i40e_nvm.c

1212

status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1216

status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1217

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

1218

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;

sys/dev/ixl/i40e_nvm.c

1222

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

124

hw->nvm.hw_semaphore_timeout =

sys/dev/ixl/i40e_nvm.c

1242

static enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

1252

upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);

sys/dev/ixl/i40e_nvm.c

1257

status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1259

hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;

sys/dev/ixl/i40e_nvm.c

1260

hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;

sys/dev/ixl/i40e_nvm.c

1265

status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);

sys/dev/ixl/i40e_nvm.c

1267

*perrno = hw->aq.asq_last_status ?

sys/dev/ixl/i40e_nvm.c

1269

hw->aq.asq_last_status) :

sys/dev/ixl/i40e_nvm.c

1271

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;

sys/dev/ixl/i40e_nvm.c

1273

hw->nvm_release_on_done = TRUE;

sys/dev/ixl/i40e_nvm.c

1274

hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;

sys/dev/ixl/i40e_nvm.c

1275

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;

sys/dev/ixl/i40e_nvm.c

1281

status = i40e_update_nvm_checksum(hw);

sys/dev/ixl/i40e_nvm.c

1283

*perrno = hw->aq.asq_last_status ?

sys/dev/ixl/i40e_nvm.c

1285

hw->aq.asq_last_status) :

sys/dev/ixl/i40e_nvm.c

1287

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;

sys/dev/ixl/i40e_nvm.c

1289

hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;

sys/dev/ixl/i40e_nvm.c

1290

hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;

sys/dev/ixl/i40e_nvm.c

1296

status = i40e_update_nvm_checksum(hw);

sys/dev/ixl/i40e_nvm.c

1298

*perrno = hw->aq.asq_last_status ?

sys/dev/ixl/i40e_nvm.c

130

hw->nvm.hw_semaphore_timeout = 0;

sys/dev/ixl/i40e_nvm.c

1300

hw->aq.asq_last_status) :

sys/dev/ixl/i40e_nvm.c

1302

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;

sys/dev/ixl/i40e_nvm.c

1304

hw->nvm_release_on_done = TRUE;

sys/dev/ixl/i40e_nvm.c

1305

hw->nvm_wait_opcode = i40e_aqc_opc_nvm_update;

sys/dev/ixl/i40e_nvm.c

1306

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;

sys/dev/ixl/i40e_nvm.c

131

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1311

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1325

if (status && (hw->aq.asq_last_status == I40E_AQ_RC_EBUSY) &&

sys/dev/ixl/i40e_nvm.c

1328

u32 old_asq_status = hw->aq.asq_last_status;

sys/dev/ixl/i40e_nvm.c

1331

gtime = rd32(hw, I40E_GLVFGEN_TIMER);

sys/dev/ixl/i40e_nvm.c

1332

if (gtime >= hw->nvm.hw_semaphore_timeout) {

sys/dev/ixl/i40e_nvm.c

1333

i40e_debug(hw, I40E_DEBUG_ALL,

sys/dev/ixl/i40e_nvm.c

1335

gtime, hw->nvm.hw_semaphore_timeout);

sys/dev/ixl/i40e_nvm.c

1336

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

1337

status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);

sys/dev/ixl/i40e_nvm.c

1339

i40e_debug(hw, I40E_DEBUG_ALL,

sys/dev/ixl/i40e_nvm.c

134

hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1341

hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1343

hw->aq.asq_last_status = old_asq_status;

sys/dev/ixl/i40e_nvm.c

1358

void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw)

sys/dev/ixl/i40e_nvm.c

1360

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1362

hw->nvm_wait_opcode);

sys/dev/ixl/i40e_nvm.c

1364

if (hw->nvm_release_on_done) {

sys/dev/ixl/i40e_nvm.c

1365

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

1366

hw->nvm_release_on_done = FALSE;

sys/dev/ixl/i40e_nvm.c

1368

hw->nvm_wait_opcode = 0;

sys/dev/ixl/i40e_nvm.c

1370

if (hw->aq.arq_last_status) {

sys/dev/ixl/i40e_nvm.c

1371

hw->nvmupd_state = I40E_NVMUPD_STATE_ERROR;

sys/dev/ixl/i40e_nvm.c

1375

switch (hw->nvmupd_state) {

sys/dev/ixl/i40e_nvm.c

1377

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;

sys/dev/ixl/i40e_nvm.c

1381

hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;

sys/dev/ixl/i40e_nvm.c

1395

void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,

sys/dev/ixl/i40e_nvm.c

1400

if (opcode == hw->nvm_wait_opcode) {

sys/dev/ixl/i40e_nvm.c

1401

i40e_memcpy(&hw->nvm_aq_event_desc, desc,

sys/dev/ixl/i40e_nvm.c

1403

i40e_nvmupd_clear_wait_state(hw);

sys/dev/ixl/i40e_nvm.c

1415

static enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

1433

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

148

void i40e_release_nvm(struct i40e_hw *hw)

sys/dev/ixl/i40e_nvm.c

1523

static enum i40e_status_code i40e_nvmupd_exec_aq(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

1535

i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);

sys/dev/ixl/i40e_nvm.c

1540

cmd_details.wb_desc = &hw->nvm_wb_desc;

sys/dev/ixl/i40e_nvm.c

1543

memset(&hw->nvm_wb_desc, 0, aq_desc_len);

sys/dev/ixl/i40e_nvm.c

1547

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

155

if (hw->nvm.blank_nvm_mode)

sys/dev/ixl/i40e_nvm.c

1559

if (!hw->nvm_buff.va) {

sys/dev/ixl/i40e_nvm.c

1560

status = i40e_allocate_virt_mem(hw, &hw->nvm_buff,

sys/dev/ixl/i40e_nvm.c

1561

hw->aq.asq_buf_size);

sys/dev/ixl/i40e_nvm.c

1563

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1568

if (hw->nvm_buff.va) {

sys/dev/ixl/i40e_nvm.c

1569

buff = hw->nvm_buff.va;

sys/dev/ixl/i40e_nvm.c

1576

memset(&hw->nvm_aq_event_desc, 0, aq_desc_len);

sys/dev/ixl/i40e_nvm.c

1579

status = i40e_asq_send_command(hw, aq_desc, buff,

sys/dev/ixl/i40e_nvm.c

158

ret_code = i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL);

sys/dev/ixl/i40e_nvm.c

1582

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1584

i40e_stat_str(hw, status),

sys/dev/ixl/i40e_nvm.c

1585

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/i40e_nvm.c

1586

*perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1592

hw->nvm_wait_opcode = cmd->offset;

sys/dev/ixl/i40e_nvm.c

1593

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;

sys/dev/ixl/i40e_nvm.c

1608

static enum i40e_status_code i40e_nvmupd_get_aq_result(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

1617

i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);

sys/dev/ixl/i40e_nvm.c

1620

aq_total_len = aq_desc_len + LE16_TO_CPU(hw->nvm_wb_desc.datalen);

sys/dev/ixl/i40e_nvm.c

1624

i40e_debug(hw, I40E_DEBUG_NVM, "%s: offset too big %d > %d\n",

sys/dev/ixl/i40e_nvm.c

1634

i40e_debug(hw, I40E_DEBUG_NVM, "%s: copy length %d too big, trimming to %d\n",

sys/dev/ixl/i40e_nvm.c

164

(total_delay < hw->aq.asq_cmd_timeout)) {

sys/dev/ixl/i40e_nvm.c

1644

i40e_debug(hw, I40E_DEBUG_NVM, "%s: aq_desc bytes %d to %d\n",

sys/dev/ixl/i40e_nvm.c

1647

buff = ((u8 *)&hw->nvm_wb_desc) + cmd->offset;

sys/dev/ixl/i40e_nvm.c

1652

buff = hw->nvm_buff.va;

sys/dev/ixl/i40e_nvm.c

1654

buff = (u8 *)hw->nvm_buff.va + (cmd->offset - aq_desc_len);

sys/dev/ixl/i40e_nvm.c

1658

int start_byte = buff - (u8 *)hw->nvm_buff.va;

sys/dev/ixl/i40e_nvm.c

166

ret_code = i40e_aq_release_resource(hw,

sys/dev/ixl/i40e_nvm.c

1660

i40e_debug(hw, I40E_DEBUG_NVM, "%s: databuf bytes %d to %d\n",

sys/dev/ixl/i40e_nvm.c

1677

static enum i40e_status_code i40e_nvmupd_get_aq_event(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

1684

i40e_debug(hw, I40E_DEBUG_NVM, "NVMUPD: %s\n", __func__);

sys/dev/ixl/i40e_nvm.c

1687

aq_total_len = aq_desc_len + LE16_TO_CPU(hw->nvm_aq_event_desc.datalen);

sys/dev/ixl/i40e_nvm.c

1691

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1697

i40e_memcpy(bytes, &hw->nvm_aq_event_desc, cmd->data_size,

sys/dev/ixl/i40e_nvm.c

1712

static enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

1726

cmd_details.wb_desc = &hw->nvm_wb_desc;

sys/dev/ixl/i40e_nvm.c

1728

status = i40e_aq_read_nvm(hw, module, cmd->offset, (u16)cmd->data_size,

sys/dev/ixl/i40e_nvm.c

1731

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1734

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1736

status, hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1737

*perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1751

static enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

1765

cmd_details.wb_desc = &hw->nvm_wb_desc;

sys/dev/ixl/i40e_nvm.c

1767

status = i40e_aq_erase_nvm(hw, module, cmd->offset, (u16)cmd->data_size,

sys/dev/ixl/i40e_nvm.c

1770

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1773

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1775

status, hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1776

*perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

178

static enum i40e_status_code i40e_poll_sr_srctl_done_bit(struct i40e_hw *hw)

sys/dev/ixl/i40e_nvm.c

1791

static enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

1807

cmd_details.wb_desc = &hw->nvm_wb_desc;

sys/dev/ixl/i40e_nvm.c

1809

status = i40e_aq_update_nvm(hw, module, cmd->offset,

sys/dev/ixl/i40e_nvm.c

1813

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1816

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

1818

status, hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

1819

*perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status);

sys/dev/ixl/i40e_nvm.c

187

srctl = rd32(hw, I40E_GLNVM_SRCTL);

sys/dev/ixl/i40e_nvm.c

195

i40e_debug(hw, I40E_DEBUG_NVM, "Done bit in GLNVM_SRCTL not set");

sys/dev/ixl/i40e_nvm.c

207

enum i40e_status_code i40e_read_nvm_word_srctl(struct i40e_hw *hw, u16 offset,

sys/dev/ixl/i40e_nvm.c

215

if (offset >= hw->nvm.sr_size) {

sys/dev/ixl/i40e_nvm.c

216

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

218

offset, hw->nvm.sr_size);

sys/dev/ixl/i40e_nvm.c

224

ret_code = i40e_poll_sr_srctl_done_bit(hw);

sys/dev/ixl/i40e_nvm.c

229

wr32(hw, I40E_GLNVM_SRCTL, sr_reg);

sys/dev/ixl/i40e_nvm.c

232

ret_code = i40e_poll_sr_srctl_done_bit(hw);

sys/dev/ixl/i40e_nvm.c

234

sr_reg = rd32(hw, I40E_GLNVM_SRDATA);

sys/dev/ixl/i40e_nvm.c

241

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

260

static enum i40e_status_code i40e_read_nvm_aq(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

271

cmd_details.wb_desc = &hw->nvm_wb_desc;

sys/dev/ixl/i40e_nvm.c

278

if ((offset + words) > hw->nvm.sr_size)

sys/dev/ixl/i40e_nvm.c

279

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

281

(offset + words), hw->nvm.sr_size);

sys/dev/ixl/i40e_nvm.c

284

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

290

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

294

ret_code = i40e_aq_read_nvm(hw, module_pointer,

sys/dev/ixl/i40e_nvm.c

310

static enum i40e_status_code i40e_read_nvm_word_aq(struct i40e_hw *hw, u16 offset,

sys/dev/ixl/i40e_nvm.c

317

ret_code = i40e_read_nvm_aq(hw, 0x0, offset, 1, data, TRUE);

sys/dev/ixl/i40e_nvm.c

334

enum i40e_status_code __i40e_read_nvm_word(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

339

if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE)

sys/dev/ixl/i40e_nvm.c

340

return i40e_read_nvm_word_aq(hw, offset, data);

sys/dev/ixl/i40e_nvm.c

342

return i40e_read_nvm_word_srctl(hw, offset, data);

sys/dev/ixl/i40e_nvm.c

353

enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset,

sys/dev/ixl/i40e_nvm.c

358

if (hw->flags & I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK)

sys/dev/ixl/i40e_nvm.c

359

ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);

sys/dev/ixl/i40e_nvm.c

363

ret_code = __i40e_read_nvm_word(hw, offset, data);

sys/dev/ixl/i40e_nvm.c

365

if (hw->flags & I40E_HW_FLAG_NVM_READ_REQUIRES_LOCK)

sys/dev/ixl/i40e_nvm.c

366

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

380

i40e_read_nvm_module_data(struct i40e_hw *hw, u8 module_ptr, u16 module_offset,

sys/dev/ixl/i40e_nvm.c

389

status = i40e_read_nvm_word(hw, module_ptr, &ptr_value);

sys/dev/ixl/i40e_nvm.c

391

i40e_debug(hw, I40E_DEBUG_ALL,

sys/dev/ixl/i40e_nvm.c

403

i40e_debug(hw, I40E_DEBUG_ALL, "Pointer not initialized.\n");

sys/dev/ixl/i40e_nvm.c

410

i40e_debug(hw, I40E_DEBUG_ALL,

sys/dev/ixl/i40e_nvm.c

417

status = i40e_read_nvm_word(hw, ptr_value + module_offset,

sys/dev/ixl/i40e_nvm.c

420

i40e_debug(hw, I40E_DEBUG_ALL,

sys/dev/ixl/i40e_nvm.c

429

status = i40e_read_nvm_buffer(hw, offset, &words_data_size,

sys/dev/ixl/i40e_nvm.c

432

i40e_debug(hw, I40E_DEBUG_ALL,

sys/dev/ixl/i40e_nvm.c

452

static enum i40e_status_code i40e_read_nvm_buffer_srctl(struct i40e_hw *hw, u16 offset,

sys/dev/ixl/i40e_nvm.c

46

enum i40e_status_code i40e_init_nvm(struct i40e_hw *hw)

sys/dev/ixl/i40e_nvm.c

463

ret_code = i40e_read_nvm_word_srctl(hw, index, &data[word]);

sys/dev/ixl/i40e_nvm.c

48

struct i40e_nvm_info *nvm = &hw->nvm;

sys/dev/ixl/i40e_nvm.c

485

static enum i40e_status_code i40e_read_nvm_buffer_aq(struct i40e_hw *hw, u16 offset,

sys/dev/ixl/i40e_nvm.c

513

ret_code = i40e_read_nvm_aq(hw, 0x0, offset, read_size,

sys/dev/ixl/i40e_nvm.c

543

enum i40e_status_code __i40e_read_nvm_buffer(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

547

if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE)

sys/dev/ixl/i40e_nvm.c

548

return i40e_read_nvm_buffer_aq(hw, offset, words, data);

sys/dev/ixl/i40e_nvm.c

550

return i40e_read_nvm_buffer_srctl(hw, offset, words, data);

sys/dev/ixl/i40e_nvm.c

564

enum i40e_status_code i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset,

sys/dev/ixl/i40e_nvm.c

569

if (hw->flags & I40E_HW_FLAG_AQ_SRCTL_ACCESS_ENABLE) {

sys/dev/ixl/i40e_nvm.c

570

ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);

sys/dev/ixl/i40e_nvm.c

572

ret_code = i40e_read_nvm_buffer_aq(hw, offset, words,

sys/dev/ixl/i40e_nvm.c

574

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

577

ret_code = i40e_read_nvm_buffer_srctl(hw, offset, words, data);

sys/dev/ixl/i40e_nvm.c

58

gens = rd32(hw, I40E_GLNVM_GENS);

sys/dev/ixl/i40e_nvm.c

594

enum i40e_status_code i40e_write_nvm_aq(struct i40e_hw *hw, u8 module_pointer,

sys/dev/ixl/i40e_nvm.c

604

cmd_details.wb_desc = &hw->nvm_wb_desc;

sys/dev/ixl/i40e_nvm.c

611

if ((offset + words) > hw->nvm.sr_size)

sys/dev/ixl/i40e_nvm.c

621

ret_code = i40e_aq_update_nvm(hw, module_pointer,

sys/dev/ixl/i40e_nvm.c

641

enum i40e_status_code __i40e_write_nvm_word(struct i40e_hw *hw, u32 offset,

sys/dev/ixl/i40e_nvm.c

649

return i40e_write_nvm_aq(hw, 0x00, offset, 1, data, FALSE);

sys/dev/ixl/i40e_nvm.c

65

fla = rd32(hw, I40E_GLNVM_FLA);

sys/dev/ixl/i40e_nvm.c

665

enum i40e_status_code __i40e_write_nvm_buffer(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

681

return i40e_write_nvm_aq(hw, module_pointer, offset, words,

sys/dev/ixl/i40e_nvm.c

695

enum i40e_status_code i40e_calc_nvm_checksum(struct i40e_hw *hw, u16 *checksum)

sys/dev/ixl/i40e_nvm.c

707

ret_code = i40e_allocate_virt_mem(hw, &vmem,

sys/dev/ixl/i40e_nvm.c

714

ret_code = __i40e_read_nvm_word(hw, I40E_SR_VPD_PTR, &vpd_module);

sys/dev/ixl/i40e_nvm.c

721

ret_code = __i40e_read_nvm_word(hw, I40E_SR_PCIE_ALT_AUTO_LOAD_PTR,

sys/dev/ixl/i40e_nvm.c

73

i40e_debug(hw, I40E_DEBUG_NVM, "NVM init error: unsupported blank mode.\n");

sys/dev/ixl/i40e_nvm.c

731

for (i = 0; i < hw->nvm.sr_size; i++) {

sys/dev/ixl/i40e_nvm.c

736

ret_code = __i40e_read_nvm_buffer(hw, i, &words, data);

sys/dev/ixl/i40e_nvm.c

765

i40e_free_virt_mem(hw, &vmem);

sys/dev/ixl/i40e_nvm.c

777

enum i40e_status_code i40e_update_nvm_checksum(struct i40e_hw *hw)

sys/dev/ixl/i40e_nvm.c

785

ret_code = i40e_calc_nvm_checksum(hw, &checksum);

sys/dev/ixl/i40e_nvm.c

788

ret_code = i40e_write_nvm_aq(hw, 0x00, I40E_SR_SW_CHECKSUM_WORD,

sys/dev/ixl/i40e_nvm.c

803

enum i40e_status_code i40e_validate_nvm_checksum(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

817

ret_code = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);

sys/dev/ixl/i40e_nvm.c

820

ret_code = i40e_calc_nvm_checksum(hw, &checksum_local);

sys/dev/ixl/i40e_nvm.c

821

__i40e_read_nvm_word(hw, I40E_SR_SW_CHECKSUM_WORD, &checksum_sr);

sys/dev/ixl/i40e_nvm.c

822

i40e_release_nvm(hw);

sys/dev/ixl/i40e_nvm.c

839

static enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

842

static enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

845

static enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

848

static enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

851

static enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

854

static enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

857

static enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

860

static enum i40e_status_code i40e_nvmupd_exec_aq(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

863

static enum i40e_status_code i40e_nvmupd_get_aq_result(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

866

static enum i40e_status_code i40e_nvmupd_get_aq_event(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

87

enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

914

enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,

sys/dev/ixl/i40e_nvm.c

927

upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);

sys/dev/ixl/i40e_nvm.c

929

i40e_debug(hw, I40E_DEBUG_NVM, "%s state %d nvm_release_on_hold %d opc 0x%04x cmd 0x%08x config 0x%08x offset 0x%08x data_size 0x%08x\n",

sys/dev/ixl/i40e_nvm.c

931

hw->nvmupd_state,

sys/dev/ixl/i40e_nvm.c

932

hw->nvm_release_on_done, hw->nvm_wait_opcode,

sys/dev/ixl/i40e_nvm.c

937

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

951

bytes[0] = hw->nvmupd_state;

sys/dev/ixl/i40e_nvm.c

955

*((u16 *)&bytes[2]) = hw->nvm_wait_opcode;

sys/dev/ixl/i40e_nvm.c

959

if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR)

sys/dev/ixl/i40e_nvm.c

96

if (hw->nvm.blank_nvm_mode)

sys/dev/ixl/i40e_nvm.c

960

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;

sys/dev/ixl/i40e_nvm.c

970

if (cmd->data_size < hw->nvmupd_features.size) {

sys/dev/ixl/i40e_nvm.c

979

if (cmd->data_size > hw->nvmupd_features.size)

sys/dev/ixl/i40e_nvm.c

980

i40e_memset(bytes + hw->nvmupd_features.size, 0x0,

sys/dev/ixl/i40e_nvm.c

981

cmd->data_size - hw->nvmupd_features.size,

sys/dev/ixl/i40e_nvm.c

984

i40e_memcpy(bytes, &hw->nvmupd_features,

sys/dev/ixl/i40e_nvm.c

985

hw->nvmupd_features.size, I40E_NONDMA_MEM);

sys/dev/ixl/i40e_nvm.c

99

ret_code = i40e_aq_request_resource(hw, I40E_NVM_RESOURCE_ID, access,

sys/dev/ixl/i40e_nvm.c

991

if (hw->nvmupd_state == I40E_NVMUPD_STATE_ERROR) {

sys/dev/ixl/i40e_nvm.c

992

i40e_debug(hw, I40E_DEBUG_NVM,

sys/dev/ixl/i40e_nvm.c

994

hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;

sys/dev/ixl/i40e_osdep.c

126

i40e_free_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem)

sys/dev/ixl/i40e_osdep.c

177

i40e_debug_shared(struct i40e_hw *hw, enum i40e_debug_mask mask, char *fmt, ...)

sys/dev/ixl/i40e_osdep.c

182

if (!(mask & ((struct i40e_hw *)hw)->debug_mask))

sys/dev/ixl/i40e_osdep.c

185

dev = ((struct i40e_osdep *)hw->back)->dev;

sys/dev/ixl/i40e_osdep.c

246

i40e_read_pci_cfg(struct i40e_hw *hw, u32 reg)

sys/dev/ixl/i40e_osdep.c

250

value = pci_read_config(((struct i40e_osdep *)hw->back)->dev,

sys/dev/ixl/i40e_osdep.c

257

i40e_write_pci_cfg(struct i40e_hw *hw, u32 reg, u16 value)

sys/dev/ixl/i40e_osdep.c

259

pci_write_config(((struct i40e_osdep *)hw->back)->dev,

sys/dev/ixl/i40e_osdep.c

51

i40e_allocate_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem, u32 size)

sys/dev/ixl/i40e_osdep.c

58

i40e_free_virt_mem(struct i40e_hw *hw, struct i40e_virt_mem *mem)

sys/dev/ixl/i40e_osdep.c

67

i40e_allocate_dma_mem(struct i40e_hw *hw, struct i40e_dma_mem *mem,

sys/dev/ixl/i40e_osdep.c

70

device_t dev = ((struct i40e_osdep *)hw->back)->dev;

sys/dev/ixl/i40e_osdep.h

179

extern void i40e_debug_shared(struct i40e_hw *hw, enum i40e_debug_mask mask,

sys/dev/ixl/i40e_osdep.h

238

enum i40e_status_code i40e_read_nvm_word_srctl(struct i40e_hw *hw, u16 offset,

sys/dev/ixl/i40e_prototype.h

100

enum i40e_status_code i40e_blink_phy_link_led(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

102

enum i40e_status_code i40e_led_get_reg(struct i40e_hw *hw, u16 led_addr,

sys/dev/ixl/i40e_prototype.h

104

enum i40e_status_code i40e_led_set_reg(struct i40e_hw *hw, u16 led_addr,

sys/dev/ixl/i40e_prototype.h

106

enum i40e_status_code i40e_get_phy_lpi_status(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

108

enum i40e_status_code i40e_get_lpi_counters(struct i40e_hw *hw, u32 *tx_counter,

sys/dev/ixl/i40e_prototype.h

110

enum i40e_status_code i40e_lpi_stat_update(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

114

enum i40e_status_code i40e_get_lpi_duration(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

119

enum i40e_status_code i40e_aq_get_firmware_version(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

124

enum i40e_status_code i40e_aq_debug_write_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

127

enum i40e_status_code i40e_aq_debug_read_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

130

enum i40e_status_code i40e_aq_set_phy_debug(struct i40e_hw *hw, u8 cmd_flags,

sys/dev/ixl/i40e_prototype.h

132

enum i40e_status_code i40e_aq_set_default_vsi(struct i40e_hw *hw, u16 vsi_id,

sys/dev/ixl/i40e_prototype.h

134

enum i40e_status_code i40e_aq_clear_default_vsi(struct i40e_hw *hw, u16 vsi_id,

sys/dev/ixl/i40e_prototype.h

136

enum i40e_status_code i40e_aq_get_phy_capabilities(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

140

enum i40e_status_code i40e_aq_set_phy_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

143

enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures,

sys/dev/ixl/i40e_prototype.h

145

enum i40e_status_code i40e_aq_set_phy_int_mask(struct i40e_hw *hw, u16 mask,

sys/dev/ixl/i40e_prototype.h

147

enum i40e_status_code i40e_aq_set_mac_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

151

enum i40e_status_code i40e_aq_get_local_advt_reg(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

154

enum i40e_status_code i40e_aq_get_partner_advt(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

158

i40e_aq_set_lb_modes(struct i40e_hw *hw, u8 lb_level, u8 lb_type, u8 speed,

sys/dev/ixl/i40e_prototype.h

160

enum i40e_status_code i40e_aq_clear_pxe_mode(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

162

enum i40e_status_code i40e_aq_set_link_restart_an(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

164

enum i40e_status_code i40e_aq_get_link_info(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

167

enum i40e_status_code i40e_aq_set_local_advt_reg(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

170

enum i40e_status_code i40e_aq_send_driver_version(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

173

enum i40e_status_code i40e_aq_add_vsi(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

176

enum i40e_status_code i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

179

enum i40e_status_code i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

182

enum i40e_status_code i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

184

enum i40e_status_code i40e_aq_set_vsi_full_promiscuous(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

187

enum i40e_status_code i40e_aq_set_vsi_mc_promisc_on_vlan(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

190

enum i40e_status_code i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

193

enum i40e_status_code i40e_aq_set_vsi_bc_promisc_on_vlan(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

196

enum i40e_status_code i40e_aq_set_vsi_vlan_promisc(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

199

enum i40e_status_code i40e_aq_get_vsi_params(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

202

enum i40e_status_code i40e_aq_update_vsi_params(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

205

enum i40e_status_code i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,

sys/dev/ixl/i40e_prototype.h

210

enum i40e_status_code i40e_aq_get_veb_parameters(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

215

enum i40e_status_code i40e_aq_add_macvlan(struct i40e_hw *hw, u16 vsi_id,

sys/dev/ixl/i40e_prototype.h

218

enum i40e_status_code i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 vsi_id,

sys/dev/ixl/i40e_prototype.h

221

enum i40e_status_code i40e_aq_add_mirrorrule(struct i40e_hw *hw, u16 sw_seid,

sys/dev/ixl/i40e_prototype.h

225

enum i40e_status_code i40e_aq_delete_mirrorrule(struct i40e_hw *hw, u16 sw_seid,

sys/dev/ixl/i40e_prototype.h

230

enum i40e_status_code i40e_aq_add_vlan(struct i40e_hw *hw, u16 vsi_id,

sys/dev/ixl/i40e_prototype.h

233

enum i40e_status_code i40e_aq_remove_vlan(struct i40e_hw *hw, u16 vsi_id,

sys/dev/ixl/i40e_prototype.h

236

enum i40e_status_code i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,

sys/dev/ixl/i40e_prototype.h

239

enum i40e_status_code i40e_aq_get_switch_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

243

enum i40e_status_code i40e_aq_set_switch_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

246

enum i40e_status_code i40e_aq_request_resource(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

251

enum i40e_status_code i40e_aq_release_resource(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

255

enum i40e_status_code i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,

sys/dev/ixl/i40e_prototype.h

259

enum i40e_status_code i40e_aq_erase_nvm(struct i40e_hw *hw, u8 module_pointer,

sys/dev/ixl/i40e_prototype.h

262

enum i40e_status_code i40e_aq_read_nvm_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

266

enum i40e_status_code i40e_aq_write_nvm_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

271

i40e_aq_min_rollback_rev_update(struct i40e_hw *hw, u8 mode, u8 module,

sys/dev/ixl/i40e_prototype.h

274

enum i40e_status_code i40e_aq_oem_post_update(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

277

enum i40e_status_code i40e_aq_discover_capabilities(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

281

enum i40e_status_code i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer,

sys/dev/ixl/i40e_prototype.h

285

enum i40e_status_code i40e_aq_rearrange_nvm(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

288

enum i40e_status_code i40e_aq_nvm_update_in_process(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

291

enum i40e_status_code i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,

sys/dev/ixl/i40e_prototype.h

295

enum i40e_status_code i40e_aq_set_lldp_mib(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

298

enum i40e_status_code i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

302

i40e_aq_restore_lldp(struct i40e_hw *hw, u8 *setting, bool restore,

sys/dev/ixl/i40e_prototype.h

304

enum i40e_status_code i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,

sys/dev/ixl/i40e_prototype.h

307

enum i40e_status_code i40e_aq_set_dcb_parameters(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

311

enum i40e_status_code i40e_aq_start_lldp(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

314

enum i40e_status_code i40e_aq_get_cee_dcb_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

317

enum i40e_status_code i40e_aq_start_stop_dcbx(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

320

enum i40e_status_code i40e_aq_add_udp_tunnel(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

324

enum i40e_status_code i40e_aq_del_udp_tunnel(struct i40e_hw *hw, u8 index,

sys/dev/ixl/i40e_prototype.h

326

enum i40e_status_code i40e_aq_get_switch_resource_alloc(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

331

enum i40e_status_code i40e_aq_add_pvirt(struct i40e_hw *hw, u16 flags,

sys/dev/ixl/i40e_prototype.h

334

enum i40e_status_code i40e_aq_add_tag(struct i40e_hw *hw, bool direct_to_queue,

sys/dev/ixl/i40e_prototype.h

338

enum i40e_status_code i40e_aq_remove_tag(struct i40e_hw *hw, u16 vsi_seid,

sys/dev/ixl/i40e_prototype.h

341

enum i40e_status_code i40e_aq_add_mcast_etag(struct i40e_hw *hw, u16 pe_seid,

sys/dev/ixl/i40e_prototype.h

345

enum i40e_status_code i40e_aq_remove_mcast_etag(struct i40e_hw *hw, u16 pe_seid,

sys/dev/ixl/i40e_prototype.h

348

enum i40e_status_code i40e_aq_update_tag(struct i40e_hw *hw, u16 vsi_seid,

sys/dev/ixl/i40e_prototype.h

352

enum i40e_status_code i40e_aq_add_statistics(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_prototype.h

355

enum i40e_status_code i40e_aq_remove_statistics(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_prototype.h

358

enum i40e_status_code i40e_aq_set_port_parameters(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

362

enum i40e_status_code i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_prototype.h

364

enum i40e_status_code i40e_aq_mac_address_write(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

367

enum i40e_status_code i40e_aq_config_vsi_bw_limit(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

370

enum i40e_status_code i40e_aq_dcb_ignore_pfc(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

374

struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_prototype.h

377

enum i40e_status_code i40e_aq_config_vsi_ets_sla_bw_limit(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

381

enum i40e_status_code i40e_aq_dcb_updated(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

383

enum i40e_status_code i40e_aq_config_switch_comp_bw_limit(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

386

enum i40e_status_code i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_prototype.h

389

enum i40e_status_code i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

393

enum i40e_status_code i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

397

enum i40e_status_code i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

401

enum i40e_status_code i40e_aq_query_port_ets_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

405

enum i40e_status_code i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

409

enum i40e_status_code i40e_aq_resume_port_tx(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

412

i40e_aq_add_cloud_filters_bb(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_prototype.h

416

i40e_aq_add_cloud_filters(struct i40e_hw *hw, u16 vsi,

sys/dev/ixl/i40e_prototype.h

420

i40e_aq_rem_cloud_filters(struct i40e_hw *hw, u16 vsi,

sys/dev/ixl/i40e_prototype.h

424

i40e_aq_rem_cloud_filters_bb(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_prototype.h

427

enum i40e_status_code i40e_read_lldp_cfg(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

429

enum i40e_status_code i40e_aq_replace_cloud_filters(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

432

enum i40e_status_code i40e_aq_alternate_read(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

435

enum i40e_status_code i40e_aq_alternate_read_indirect(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

437

enum i40e_status_code i40e_aq_alternate_write(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

440

enum i40e_status_code i40e_aq_alternate_write_indirect(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

442

enum i40e_status_code i40e_aq_alternate_clear(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

443

enum i40e_status_code i40e_aq_alternate_write_done(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

445

enum i40e_status_code i40e_aq_set_oem_mode(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

449

enum i40e_status_code i40e_init_shared_code(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

450

enum i40e_status_code i40e_pf_reset(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

451

void i40e_clear_hw(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

452

void i40e_clear_pxe_mode(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

453

enum i40e_status_code i40e_get_link_status(struct i40e_hw *hw, bool *link_up);

sys/dev/ixl/i40e_prototype.h

454

enum i40e_status_code i40e_update_link_info(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

455

enum i40e_status_code i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr);

sys/dev/ixl/i40e_prototype.h

456

enum i40e_status_code i40e_read_bw_from_alt_ram(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

458

enum i40e_status_code i40e_aq_configure_partition_bw(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

461

enum i40e_status_code i40e_get_port_mac_addr(struct i40e_hw *hw, u8 *mac_addr);

sys/dev/ixl/i40e_prototype.h

462

enum i40e_status_code i40e_read_pba_string(struct i40e_hw *hw, u8 *pba_num,

sys/dev/ixl/i40e_prototype.h

464

void i40e_pre_tx_queue_cfg(struct i40e_hw *hw, u32 queue, bool enable);

sys/dev/ixl/i40e_prototype.h

465

enum i40e_aq_link_speed i40e_get_link_speed(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

467

enum i40e_status_code i40e_init_nvm(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

468

enum i40e_status_code i40e_acquire_nvm(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

470

void i40e_release_nvm(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

471

enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset,

sys/dev/ixl/i40e_prototype.h

474

i40e_read_nvm_module_data(struct i40e_hw *hw, u8 module_ptr, u16 module_offset,

sys/dev/ixl/i40e_prototype.h

476

enum i40e_status_code i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset,

sys/dev/ixl/i40e_prototype.h

478

enum i40e_status_code i40e_write_nvm_aq(struct i40e_hw *hw, u8 module,

sys/dev/ixl/i40e_prototype.h

481

enum i40e_status_code __i40e_read_nvm_word(struct i40e_hw *hw, u16 offset,

sys/dev/ixl/i40e_prototype.h

483

enum i40e_status_code __i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset,

sys/dev/ixl/i40e_prototype.h

485

enum i40e_status_code __i40e_write_nvm_word(struct i40e_hw *hw, u32 offset,

sys/dev/ixl/i40e_prototype.h

487

enum i40e_status_code __i40e_write_nvm_buffer(struct i40e_hw *hw, u8 module,

sys/dev/ixl/i40e_prototype.h

489

enum i40e_status_code i40e_calc_nvm_checksum(struct i40e_hw *hw, u16 *checksum);

sys/dev/ixl/i40e_prototype.h

49

enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

490

enum i40e_status_code i40e_update_nvm_checksum(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

491

enum i40e_status_code i40e_validate_nvm_checksum(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

493

enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

496

void i40e_nvmupd_check_wait_event(struct i40e_hw *hw, u16 opcode,

sys/dev/ixl/i40e_prototype.h

498

void i40e_nvmupd_clear_wait_state(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

499

void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status);

sys/dev/ixl/i40e_prototype.h

50

enum i40e_status_code i40e_shutdown_adminq(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

500

enum i40e_status_code i40e_enable_eee(struct i40e_hw *hw, bool enable);

sys/dev/ixl/i40e_prototype.h

502

enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

51

enum i40e_status_code i40e_init_asq(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

52

enum i40e_status_code i40e_init_arq(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

53

enum i40e_status_code i40e_alloc_adminq_asq_ring(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

54

enum i40e_status_code i40e_alloc_adminq_arq_ring(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

55

enum i40e_status_code i40e_shutdown_asq(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

553

void i40e_vf_parse_hw_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

555

enum i40e_status_code i40e_vf_reset(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

556

enum i40e_status_code i40e_aq_send_msg_to_pf(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

56

enum i40e_status_code i40e_shutdown_arq(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

561

enum i40e_status_code i40e_set_filter_control(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

563

enum i40e_status_code i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

568

enum i40e_status_code i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id,

sys/dev/ixl/i40e_prototype.h

57

u16 i40e_clean_asq(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

573

void i40e_add_filter_to_drop_tx_flow_control_frames(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

575

enum i40e_status_code i40e_aq_rx_ctl_read_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

578

u32 i40e_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr);

sys/dev/ixl/i40e_prototype.h

579

enum i40e_status_code i40e_aq_rx_ctl_write_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

58

void i40e_free_adminq_asq(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

582

void i40e_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val);

sys/dev/ixl/i40e_prototype.h

584

i40e_aq_set_phy_register_ext(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

59

void i40e_free_adminq_arq(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

590

i40e_aq_get_phy_register_ext(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

597

#define i40e_aq_set_phy_register(hw, ps, da, pc, ra, rv, cd) \

sys/dev/ixl/i40e_prototype.h

598

i40e_aq_set_phy_register_ext(hw, ps, da, pc, FALSE, 0, ra, rv, cd)

sys/dev/ixl/i40e_prototype.h

599

#define i40e_aq_get_phy_register(hw, ps, da, pc, ra, rv, cd) \

sys/dev/ixl/i40e_prototype.h

600

i40e_aq_get_phy_register_ext(hw, ps, da, pc, FALSE, 0, ra, rv, cd)

sys/dev/ixl/i40e_prototype.h

603

i40e_aq_run_phy_activity(struct i40e_hw *hw, u16 activity_id, u32 opcode,

sys/dev/ixl/i40e_prototype.h

607

enum i40e_status_code i40e_aq_set_arp_proxy_config(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

61

void i40e_adminq_init_ring_data(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

610

enum i40e_status_code i40e_aq_set_ns_proxy_table_entry(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

613

enum i40e_status_code i40e_aq_set_clear_wol_filter(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

619

enum i40e_status_code i40e_aq_get_wake_event_reason(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

62

enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

622

enum i40e_status_code i40e_aq_clear_all_wol_filters(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

624

enum i40e_status_code i40e_read_phy_register_clause22(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

626

enum i40e_status_code i40e_write_phy_register_clause22(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

628

enum i40e_status_code i40e_read_phy_register_clause45(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

630

enum i40e_status_code i40e_write_phy_register_clause45(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

632

enum i40e_status_code i40e_read_phy_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

634

enum i40e_status_code i40e_write_phy_register(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

636

u8 i40e_get_phy_address(struct i40e_hw *hw, u8 dev_num);

sys/dev/ixl/i40e_prototype.h

65

enum i40e_status_code i40e_asq_send_command(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

70

bool i40e_asq_done(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

73

void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,

sys/dev/ixl/i40e_prototype.h

76

void i40e_idle_aq(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

77

bool i40e_check_asq_alive(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

78

enum i40e_status_code i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading);

sys/dev/ixl/i40e_prototype.h

80

enum i40e_status_code i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_prototype.h

82

enum i40e_status_code i40e_aq_set_rss_lut(struct i40e_hw *hw, u16 seid,

sys/dev/ixl/i40e_prototype.h

84

enum i40e_status_code i40e_aq_get_rss_key(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

87

enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw,

sys/dev/ixl/i40e_prototype.h

90

const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err);

sys/dev/ixl/i40e_prototype.h

91

const char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err);

sys/dev/ixl/i40e_prototype.h

94

u32 i40e_led_get(struct i40e_hw *hw);

sys/dev/ixl/i40e_prototype.h

95

void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink);

sys/dev/ixl/i40e_prototype.h

96

enum i40e_status_code i40e_led_set_phy(struct i40e_hw *hw, bool on,

sys/dev/ixl/i40e_prototype.h

98

enum i40e_status_code i40e_led_get_phy(struct i40e_hw *hw, u16 *led_addr,

sys/dev/ixl/i40e_type.h

774

static INLINE bool i40e_is_vf(struct i40e_hw *hw)

sys/dev/ixl/i40e_type.h

776

return (hw->mac.type == I40E_MAC_VF ||

sys/dev/ixl/i40e_type.h

777

hw->mac.type == I40E_MAC_X722_VF);

sys/dev/ixl/if_ixl.c

1023

i40e_aq_set_default_vsi(hw, vsi->seid, NULL);

sys/dev/ixl/if_ixl.c

1153

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/if_ixl.c

1156

ixl_enable_intr0(hw);

sys/dev/ixl/if_ixl.c

1160

ixl_enable_queue(hw, rx_que->rxr.me);

sys/dev/ixl/if_ixl.c

1166

wr32(hw, I40E_PFINT_LNKLST0, 0x0);

sys/dev/ixl/if_ixl.c

1180

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/if_ixl.c

1185

ixl_disable_queue(hw, rx_que->rxr.me);

sys/dev/ixl/if_ixl.c

1191

wr32(hw, I40E_PFINT_LNKLST0, IXL_QUEUE_EOL);

sys/dev/ixl/if_ixl.c

1200

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/if_ixl.c

1203

ixl_enable_queue(hw, rx_que->msix - 1);

sys/dev/ixl/if_ixl.c

1212

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/if_ixl.c

1215

ixl_enable_queue(hw, tx_que->msix - 1);

sys/dev/ixl/if_ixl.c

1348

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/if_ixl.c

1354

baudrate = ixl_max_aq_speed_to_value(hw->phy.link_info.link_speed);

sys/dev/ixl/if_ixl.c

1391

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/if_ixl.c

1406

status = i40e_clean_arq_element(hw, &event, pending);

sys/dev/ixl/if_ixl.c

1436

reg = rd32(hw, I40E_PFINT_ICR0_ENA);

sys/dev/ixl/if_ixl.c

1438

wr32(hw, I40E_PFINT_ICR0_ENA, reg);

sys/dev/ixl/if_ixl.c

1447

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/if_ixl.c

1458

if (!i40e_check_asq_alive(&pf->hw))

sys/dev/ixl/if_ixl.c

1474

ixl_enable_intr0(hw);

sys/dev/ixl/if_ixl.c

1482

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/if_ixl.c

1498

status = i40e_aq_set_vsi_multicast_promiscuous(hw,

sys/dev/ixl/if_ixl.c

1502

"mode, status: %s\n", i40e_stat_str(hw, status));

sys/dev/ixl/if_ixl.c

1539

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/if_ixl.c

1554

switch (hw->phy.link_info.phy_type) {

sys/dev/ixl/if_ixl.c

1670

if (hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)

sys/dev/ixl/if_ixl.c

1672

if (hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)

sys/dev/ixl/if_ixl.c

1696

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/if_ixl.c

1706

err = i40e_aq_set_vsi_unicast_promiscuous(hw,

sys/dev/ixl/if_ixl.c

1710

err = i40e_aq_set_vsi_multicast_promiscuous(hw,

sys/dev/ixl/if_ixl.c

1738

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/if_ixl.c

1756

ixl_add_filter(vsi, hw->mac.addr, vtag);

sys/dev/ixl/if_ixl.c

1765

ixl_del_all_vlan_filters(vsi, hw->mac.addr);

sys/dev/ixl/if_ixl.c

1766

ixl_add_filter(vsi, hw->mac.addr, IXL_VLAN_ANY);

sys/dev/ixl/if_ixl.c

1775

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/if_ixl.c

1789

ixl_del_filter(vsi, hw->mac.addr, vtag);

sys/dev/ixl/if_ixl.c

1791

ixl_del_filter(vsi, hw->mac.addr, IXL_VLAN_ANY);

sys/dev/ixl/if_ixl.c

1792

ixl_add_vlan_filters(vsi, hw->mac.addr);

sys/dev/ixl/if_ixl.c

1927

pf->hw.debug_mask = ixl_shared_debug_mask;

sys/dev/ixl/if_ixl.c

364

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/if_ixl.c

378

hw->vendor_id = pci_get_vendor(dev);

sys/dev/ixl/if_ixl.c

379

hw->device_id = pci_get_device(dev);

sys/dev/ixl/if_ixl.c

380

hw->revision_id = pci_read_config(dev, PCIR_REVID, 1);

sys/dev/ixl/if_ixl.c

381

hw->subsystem_vendor_id =

sys/dev/ixl/if_ixl.c

383

hw->subsystem_device_id =

sys/dev/ixl/if_ixl.c

386

hw->bus.device = pci_get_slot(dev);

sys/dev/ixl/if_ixl.c

387

hw->bus.func = pci_get_function(dev);

sys/dev/ixl/if_ixl.c

398

pf->hw.hw_addr = (u8 *) &pf->osdep.mem_bus_space_handle;

sys/dev/ixl/if_ixl.c

399

pf->hw.back = &pf->osdep;

sys/dev/ixl/if_ixl.c

408

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/if_ixl.c

413

} else if (hw->mac.type == I40E_MAC_X722)

sys/dev/ixl/if_ixl.c

436

scctx->isc_rss_table_size = pf->hw.func_caps.rss_table_size;

sys/dev/ixl/if_ixl.c

447

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/if_ixl.c

451

hw->phy.get_link_info = TRUE;

sys/dev/ixl/if_ixl.c

452

status = i40e_get_link_status(hw, &pf->link_up);

sys/dev/ixl/if_ixl.c

459

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/if_ixl.c

460

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/if_ixl.c

480

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/if_ixl.c

485

i40e_get_mac_addr(hw, hw->mac.addr);

sys/dev/ixl/if_ixl.c

489

ixl_enable_intr0(hw);

sys/dev/ixl/if_ixl.c

502

struct i40e_hw *hw;

sys/dev/ixl/if_ixl.c

517

hw = &pf->hw;

sys/dev/ixl/if_ixl.c

520

vsi->hw = &pf->hw;

sys/dev/ixl/if_ixl.c

543

i40e_clear_hw(hw);

sys/dev/ixl/if_ixl.c

544

i40e_set_mac_type(hw);

sys/dev/ixl/if_ixl.c

551

status = i40e_init_shared_code(hw);

sys/dev/ixl/if_ixl.c

554

i40e_stat_str(hw, status));

sys/dev/ixl/if_ixl.c

560

hw->aq.num_arq_entries = IXL_AQ_LEN;

sys/dev/ixl/if_ixl.c

561

hw->aq.num_asq_entries = IXL_AQ_LEN;

sys/dev/ixl/if_ixl.c

562

hw->aq.arq_buf_size = IXL_AQ_BUF_SZ;

sys/dev/ixl/if_ixl.c

563

hw->aq.asq_buf_size = IXL_AQ_BUF_SZ;

sys/dev/ixl/if_ixl.c

565

status = i40e_init_adminq(hw);

sys/dev/ixl/if_ixl.c

568

i40e_stat_str(hw, status));

sys/dev/ixl/if_ixl.c

583

if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&

sys/dev/ixl/if_ixl.c

584

hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw)) {

sys/dev/ixl/if_ixl.c

589

} else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4) {

sys/dev/ixl/if_ixl.c

603

i40e_clear_pxe_mode(hw);

sys/dev/ixl/if_ixl.c

619

if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||

sys/dev/ixl/if_ixl.c

620

(pf->hw.aq.fw_maj_ver < 4)) {

sys/dev/ixl/if_ixl.c

621

i40e_aq_stop_lldp(hw, true, false, NULL);

sys/dev/ixl/if_ixl.c

626

if (i40e_enable_eee(hw, true) == I40E_SUCCESS)

sys/dev/ixl/if_ixl.c

632

i40e_get_mac_addr(hw, hw->mac.addr);

sys/dev/ixl/if_ixl.c

633

error = i40e_validate_mac_addr(hw->mac.addr);

sys/dev/ixl/if_ixl.c

638

bcopy(hw->mac.addr, hw->mac.perm_addr, ETHER_ADDR_LEN);

sys/dev/ixl/if_ixl.c

639

iflib_set_mac(ctx, hw->mac.addr);

sys/dev/ixl/if_ixl.c

640

i40e_get_port_mac_addr(hw, hw->mac.port_addr);

sys/dev/ixl/if_ixl.c

648

if (i40e_set_filter_control(hw, &filter))

sys/dev/ixl/if_ixl.c

652

if (i40e_get_fw_lldp_status(hw, &lldp_status) == I40E_SUCCESS) {

sys/dev/ixl/if_ixl.c

663

i40e_aq_set_dcb_parameters(hw, true, NULL);

sys/dev/ixl/if_ixl.c

674

i40e_shutdown_adminq(hw);

sys/dev/ixl/if_ixl.c

690

struct i40e_hw *hw;

sys/dev/ixl/if_ixl.c

702

hw = &pf->hw;

sys/dev/ixl/if_ixl.c

719

ixl_enable_intr0(hw);

sys/dev/ixl/if_ixl.c

742

error = ixl_pf_qmgr_init(&pf->qmgr, hw->func_caps.num_tx_qp);

sys/dev/ixl/if_ixl.c

765

status = i40e_aq_set_phy_int_mask(hw, IXL_DEFAULT_PHY_INT_MASK,

sys/dev/ixl/if_ixl.c

769

" aq_err %s\n", i40e_stat_str(hw, status),

sys/dev/ixl/if_ixl.c

770

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/if_ixl.c

780

ixl_enable_intr0(hw);

sys/dev/ixl/if_ixl.c

798

hw->phy.get_link_info = true;

sys/dev/ixl/if_ixl.c

799

status = i40e_get_link_status(hw, &pf->link_up);

sys/dev/ixl/if_ixl.c

803

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/if_ixl.c

804

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/if_ixl.c

819

if (hw->func_caps.iwarp && ixl_enable_iwarp) {

sys/dev/ixl/if_ixl.c

861

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/if_ixl.c

892

ixl_disable_intr0(hw);

sys/dev/ixl/if_ixl.c

893

status = i40e_shutdown_adminq(hw);

sys/dev/ixl/if_ixl.c

897

i40e_stat_str(hw, status));

sys/dev/ixl/if_ixl.c

955

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/if_ixl.c

968

if (!i40e_check_asq_alive(&pf->hw)) {

sys/dev/ixl/if_ixl.c

976

if (!ixl_ether_is_equal(hw->mac.addr, tmpaddr) &&

sys/dev/ixl/if_ixl.c

978

ixl_del_all_vlan_filters(vsi, hw->mac.addr);

sys/dev/ixl/if_ixl.c

979

bcopy(tmpaddr, hw->mac.addr, ETH_ALEN);

sys/dev/ixl/if_ixl.c

980

ret = i40e_aq_mac_address_write(hw,

sys/dev/ixl/if_ixl.c

982

hw->mac.addr, NULL);

sys/dev/ixl/if_ixl.c

993

iflib_set_mac(ctx, hw->mac.addr);

sys/dev/ixl/ixl.h

409

struct i40e_hw *hw;

sys/dev/ixl/ixl.h

520

const char * i40e_vc_stat_str(struct i40e_hw *hw,

sys/dev/ixl/ixl_iw.c

166

pf_info->pf_id = pf->hw.pf_id;

sys/dev/ixl/ixl_iw.c

327

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_iw.c

342

wr32(hw, I40E_PFINT_AEQCTL, reg);

sys/dev/ixl/ixl_iw.c

351

wr32(hw, I40E_PFINT_LNKLSTN(vec - 1), reg);

sys/dev/ixl/ixl_iw.c

356

wr32(hw, I40E_PFINT_LNKLSTN(vec - 1), reg);

sys/dev/ixl/ixl_iw.c

364

wr32(hw, I40E_PFINT_CEQCTL(i), reg);

sys/dev/ixl/ixl_iw.c

380

iwarp_cap_on_pfs += pf_entry->pf->hw.func_caps.iwarp;

sys/dev/ixl/ixl_iw.c

448

iwarp_cap_on_pfs += pf_entry->pf->hw.func_caps.iwarp;

sys/dev/ixl/ixl_iw.c

53

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_iw.c

59

wr32(hw, I40E_PFINT_LNKLSTN(vec - 1), reg);

sys/dev/ixl/ixl_pf.h

116

struct i40e_hw hw;

sys/dev/ixl/ixl_pf.h

320

void ixl_nvm_version_str(struct i40e_hw *hw, struct sbuf *buf);

sys/dev/ixl/ixl_pf.h

55

#define IXL_VPINT_LNKLSTN_REG(hw, vector, vf_num) \

sys/dev/ixl/ixl_pf.h

57

(((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num)))

sys/dev/ixl/ixl_pf.h

59

#define IXL_VFINT_DYN_CTLN_REG(hw, vector, vf_num) \

sys/dev/ixl/ixl_pf.h

61

(((hw)->func_caps.num_msix_vectors_vf - 1) * (vf_num)))

sys/dev/ixl/ixl_pf_i2c.c

113

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

114

u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

164

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

165

u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

174

i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

176

wr32(hw, IXL_I2C_REG(hw), i2cctl);

sys/dev/ixl/ixl_pf_i2c.c

177

ixl_flush(hw);

sys/dev/ixl/ixl_pf_i2c.c

179

i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

199

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

202

u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

211

i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

213

wr32(hw, IXL_I2C_REG(hw), i2cctl);

sys/dev/ixl/ixl_pf_i2c.c

214

ixl_flush(hw);

sys/dev/ixl/ixl_pf_i2c.c

219

i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

250

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

252

u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

285

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

302

i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

305

wr32(hw, IXL_I2C_REG(hw), i2cctl);

sys/dev/ixl/ixl_pf_i2c.c

306

ixl_flush(hw);

sys/dev/ixl/ixl_pf_i2c.c

321

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

326

wr32(hw, IXL_I2C_REG(hw), *i2cctl);

sys/dev/ixl/ixl_pf_i2c.c

327

ixl_flush(hw);

sys/dev/ixl/ixl_pf_i2c.c

343

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

352

wr32(hw, IXL_I2C_REG(hw), *i2cctl);

sys/dev/ixl/ixl_pf_i2c.c

353

ixl_flush(hw);

sys/dev/ixl/ixl_pf_i2c.c

357

i2cctl_r = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

394

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

405

wr32(hw, IXL_I2C_REG(hw), *i2cctl);

sys/dev/ixl/ixl_pf_i2c.c

406

ixl_flush(hw);

sys/dev/ixl/ixl_pf_i2c.c

412

*i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

428

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

429

u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

459

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

466

u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

468

wr32(hw, IXL_I2C_REG(hw), i2cctl);

sys/dev/ixl/ixl_pf_i2c.c

469

ixl_flush(hw);

sys/dev/ixl/ixl_pf_i2c.c

533

i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

535

wr32(hw, IXL_I2C_REG(hw), i2cctl);

sys/dev/ixl/ixl_pf_i2c.c

536

ixl_flush(hw);

sys/dev/ixl/ixl_pf_i2c.c

548

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

553

u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

555

wr32(hw, IXL_I2C_REG(hw), i2cctl);

sys/dev/ixl/ixl_pf_i2c.c

556

ixl_flush(hw);

sys/dev/ixl/ixl_pf_i2c.c

599

i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_i2c.c

601

wr32(hw, IXL_I2C_REG(hw), i2cctl);

sys/dev/ixl/ixl_pf_i2c.c

602

ixl_flush(hw);

sys/dev/ixl/ixl_pf_i2c.c

614

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

622

wr32(hw, I40E_GLGEN_I2CCMD(hw->func_caps.mdio_port_num), reg);

sys/dev/ixl/ixl_pf_i2c.c

624

status = ixl_wait_for_i2c_completion(hw, hw->func_caps.mdio_port_num);

sys/dev/ixl/ixl_pf_i2c.c

627

reg = rd32(hw, I40E_GLGEN_I2CCMD(hw->func_caps.mdio_port_num));

sys/dev/ixl/ixl_pf_i2c.c

64

static s32 ixl_wait_for_i2c_completion(struct i40e_hw *hw, u8 portnum);

sys/dev/ixl/ixl_pf_i2c.c

644

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

652

reg = rd32(hw, I40E_GLGEN_I2CCMD(hw->func_caps.mdio_port_num));

sys/dev/ixl/ixl_pf_i2c.c

664

wr32(hw, I40E_GLGEN_I2CCMD(hw->func_caps.mdio_port_num), reg);

sys/dev/ixl/ixl_pf_i2c.c

666

status = ixl_wait_for_i2c_completion(hw, hw->func_caps.mdio_port_num);

sys/dev/ixl/ixl_pf_i2c.c

677

ixl_wait_for_i2c_completion(struct i40e_hw *hw, u8 portnum)

sys/dev/ixl/ixl_pf_i2c.c

683

reg = rd32(hw, I40E_GLGEN_I2CCMD(portnum));

sys/dev/ixl/ixl_pf_i2c.c

702

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

706

status = i40e_aq_get_phy_register(hw,

sys/dev/ixl/ixl_pf_i2c.c

714

i40e_stat_str(hw, status), i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_i2c.c

728

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

731

status = i40e_aq_set_phy_register(hw,

sys/dev/ixl/ixl_pf_i2c.c

739

i40e_stat_str(hw, status), i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_i2c.c

76

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_i2c.c

77

u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));

sys/dev/ixl/ixl_pf_iflib.c

1005

error = i40e_aq_set_phy_int_mask(hw, IXL_DEFAULT_PHY_INT_MASK,

sys/dev/ixl/ixl_pf_iflib.c

1009

" aq_err %d\n", error, hw->aq.asq_last_status);

sys/dev/ixl/ixl_pf_iflib.c

1015

error = i40e_set_fc(hw, &set_fc_err_mask, true);

sys/dev/ixl/ixl_pf_iflib.c

102

ixl_enable_intr0(hw);

sys/dev/ixl/ixl_pf_iflib.c

1027

i40e_aq_set_vsi_broadcast(&pf->hw, vsi->seid, TRUE, NULL);

sys/dev/ixl/ixl_pf_iflib.c

1032

i40e_aq_set_dcb_parameters(hw, TRUE, NULL);

sys/dev/ixl/ixl_pf_iflib.c

1035

if (i40e_get_fw_lldp_status(hw, &lldp_status) == I40E_SUCCESS) {

sys/dev/ixl/ixl_pf_iflib.c

1048

ixl_enable_intr0(hw);

sys/dev/ixl/ixl_pf_iflib.c

1075

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

1093

hw->fc.requested_mode = requested_fc;

sys/dev/ixl/ixl_pf_iflib.c

1094

aq_error = i40e_set_fc(hw, &fc_aq_err, TRUE);

sys/dev/ixl/ixl_pf_iflib.c

136

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

145

reg = rd32(hw, I40E_PFINT_ICR0);

sys/dev/ixl/ixl_pf_iflib.c

150

mask = rd32(hw, I40E_PFINT_ICR0_ENA);

sys/dev/ixl/ixl_pf_iflib.c

167

rstat_reg = rd32(hw, I40E_GLGEN_RSTAT);

sys/dev/ixl/ixl_pf_iflib.c

210

reg = rd32(hw, I40E_PFHMC_ERRORINFO);

sys/dev/ixl/ixl_pf_iflib.c

214

reg = rd32(hw, I40E_PFHMC_ERRORDATA);

sys/dev/ixl/ixl_pf_iflib.c

216

wr32(hw, I40E_PFHMC_ERRORINFO, 0);

sys/dev/ixl/ixl_pf_iflib.c

227

wr32(hw, I40E_PFINT_ICR0_ENA, mask);

sys/dev/ixl/ixl_pf_iflib.c

228

ixl_enable_intr0(hw);

sys/dev/ixl/ixl_pf_iflib.c

244

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

251

wr32(hw, I40E_PFINT_DYN_CTLN(i), 0);

sys/dev/ixl/ixl_pf_iflib.c

258

wr32(hw, I40E_PFINT_LNKLSTN(i), reg);

sys/dev/ixl/ixl_pf_iflib.c

265

wr32(hw, I40E_QINT_RQCTL(i), reg);

sys/dev/ixl/ixl_pf_iflib.c

272

wr32(hw, I40E_QINT_TQCTL(i), reg);

sys/dev/ixl/ixl_pf_iflib.c

282

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

298

wr32(hw, I40E_PFINT_ICR0_ENA, reg);

sys/dev/ixl/ixl_pf_iflib.c

301

wr32(hw, I40E_PFINT_STAT_CTL0,

sys/dev/ixl/ixl_pf_iflib.c

305

wr32(hw, I40E_PFINT_LNKLST0, 0);

sys/dev/ixl/ixl_pf_iflib.c

311

wr32(hw, I40E_QINT_RQCTL(0), reg);

sys/dev/ixl/ixl_pf_iflib.c

316

wr32(hw, I40E_QINT_TQCTL(0), reg);

sys/dev/ixl/ixl_pf_iflib.c

353

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

367

aq_error = i40e_aq_get_phy_capabilities(hw,

sys/dev/ixl/ixl_pf_iflib.c

372

aq_error = i40e_aq_get_phy_capabilities(hw, FALSE,

sys/dev/ixl/ixl_pf_iflib.c

381

" AQ error %d\n", aq_error, hw->aq.asq_last_status);

sys/dev/ixl/ixl_pf_iflib.c

386

ixl_add_ifmedia(vsi->media, hw->phy.phy_types);

sys/dev/ixl/ixl_pf_iflib.c

39

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

403

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

405

struct i40e_link_status *link_info = &hw->phy.link_info;

sys/dev/ixl/ixl_pf_iflib.c

413

hw->phy.get_link_info = TRUE;

sys/dev/ixl/ixl_pf_iflib.c

414

i40e_get_link_status(hw, &pf->link_up);

sys/dev/ixl/ixl_pf_iflib.c

443

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/ixl_pf_iflib.c

452

ctxt.pf_num = hw->pf_id;

sys/dev/ixl/ixl_pf_iflib.c

453

err = i40e_aq_get_vsi_params(hw, &ctxt, NULL);

sys/dev/ixl/ixl_pf_iflib.c

456

" aq_error %d\n", err, hw->aq.asq_last_status);

sys/dev/ixl/ixl_pf_iflib.c

48

wr32(hw, I40E_PFINT_ITRN(IXL_TX_ITR, i),

sys/dev/ixl/ixl_pf_iflib.c

509

err = i40e_aq_update_vsi_params(hw, &ctxt, NULL);

sys/dev/ixl/ixl_pf_iflib.c

512

" aq_error %d\n", err, hw->aq.asq_last_status);

sys/dev/ixl/ixl_pf_iflib.c

546

err = i40e_clear_lan_tx_queue_context(hw, i);

sys/dev/ixl/ixl_pf_iflib.c

551

err = i40e_set_lan_tx_queue_context(hw, i, &tctx);

sys/dev/ixl/ixl_pf_iflib.c

558

txctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &

sys/dev/ixl/ixl_pf_iflib.c

560

wr32(hw, I40E_QTX_CTL(i), txctl);

sys/dev/ixl/ixl_pf_iflib.c

561

ixl_flush(hw);

sys/dev/ixl/ixl_pf_iflib.c

573

u16 max_rxmax = rxr->mbuf_sz * hw->func_caps.rx_buf_chain_len;

sys/dev/ixl/ixl_pf_iflib.c

58

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

598

err = i40e_clear_lan_rx_queue_context(hw, i);

sys/dev/ixl/ixl_pf_iflib.c

604

err = i40e_set_lan_rx_queue_context(hw, i, &rctx);

sys/dev/ixl/ixl_pf_iflib.c

609

wr32(vsi->hw, I40E_QRX_TAIL(i), 0);

sys/dev/ixl/ixl_pf_iflib.c

624

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/ixl_pf_iflib.c

67

wr32(hw, I40E_PFINT_ITRN(IXL_RX_ITR, i),

sys/dev/ixl/ixl_pf_iflib.c

670

wr32(hw, I40E_PFINT_ITRN(IXL_RX_ITR,

sys/dev/ixl/ixl_pf_iflib.c

679

wr32(hw, I40E_PFINT_ITRN(IXL_RX_ITR,

sys/dev/ixl/ixl_pf_iflib.c

697

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/ixl_pf_iflib.c

743

wr32(hw, I40E_PFINT_ITRN(IXL_TX_ITR,

sys/dev/ixl/ixl_pf_iflib.c

753

wr32(hw, I40E_PFINT_ITRN(IXL_TX_ITR,

sys/dev/ixl/ixl_pf_iflib.c

778

val = rd32(tx_que->vsi->hw, tx_que->txr.tail);

sys/dev/ixl/ixl_pf_iflib.c

78

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

800

val = rd32(rx_que->vsi->hw, rx_que->rxr.tail);

sys/dev/ixl/ixl_pf_iflib.c

833

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

841

lut_entry_width = pf->hw.func_caps.rss_table_entry_width;

sys/dev/ixl/ixl_pf_iflib.c

845

for (i = 0; i < pf->hw.func_caps.rss_table_size; i++) {

sys/dev/ixl/ixl_pf_iflib.c

861

if (hw->mac.type == I40E_MAC_X722) {

sys/dev/ixl/ixl_pf_iflib.c

862

status = i40e_aq_set_rss_lut(hw, vsi->vsi_num, TRUE, hlut_buf, sizeof(hlut_buf));

sys/dev/ixl/ixl_pf_iflib.c

865

i40e_stat_str(hw, status), i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_iflib.c

867

for (i = 0; i < pf->hw.func_caps.rss_table_size >> 2; i++)

sys/dev/ixl/ixl_pf_iflib.c

868

wr32(hw, I40E_PFQF_HLUT(i), ((u32 *)hlut_buf)[i]);

sys/dev/ixl/ixl_pf_iflib.c

869

ixl_flush(hw);

sys/dev/ixl/ixl_pf_iflib.c

87

wr32(hw, I40E_PFINT_DYN_CTL0,

sys/dev/ixl/ixl_pf_iflib.c

906

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/ixl_pf_iflib.c

91

icr0 = rd32(hw, I40E_PFINT_ICR0);

sys/dev/ixl/ixl_pf_iflib.c

911

ixl_enable_queue(hw, que->rxr.me);

sys/dev/ixl/ixl_pf_iflib.c

913

ixl_enable_intr0(hw);

sys/dev/ixl/ixl_pf_iflib.c

919

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/ixl_pf_iflib.c

923

ixl_disable_queue(hw, que->rxr.me);

sys/dev/ixl/ixl_pf_iflib.c

929

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

938

ixl_disable_intr0(hw);

sys/dev/ixl/ixl_pf_iflib.c

940

error = i40e_shutdown_adminq(hw);

sys/dev/ixl/ixl_pf_iflib.c

952

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iflib.c

961

error = i40e_init_adminq(hw);

sys/dev/ixl/ixl_pf_iflib.c

972

ixl_enable_intr0(hw);

sys/dev/ixl/ixl_pf_iflib.c

978

i40e_clear_pxe_mode(hw);

sys/dev/ixl/ixl_pf_iov.c

107

max(1, min(hw->func_caps.num_msix_vectors_vf - 1, IAVF_MAX_QUEUES)));

sys/dev/ixl/ixl_pf_iov.c

1111

return (i40e_aq_update_vsi_params(&pf->hw, &vsi_ctx, NULL));

sys/dev/ixl/ixl_pf_iov.c

1196

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

1215

code = i40e_aq_set_vsi_unicast_promiscuous(hw, vf->vsi.seid,

sys/dev/ixl/ixl_pf_iov.c

1219

" error %s\n", vf->vsi.seid, i40e_stat_str(hw, code),

sys/dev/ixl/ixl_pf_iov.c

1220

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_iov.c

1226

code = i40e_aq_set_vsi_multicast_promiscuous(hw, vf->vsi.seid,

sys/dev/ixl/ixl_pf_iov.c

1230

" error %s\n", vf->vsi.seid, i40e_stat_str(hw, code),

sys/dev/ixl/ixl_pf_iov.c

1231

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_iov.c

1263

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

1268

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

127

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

1289

if (hw->mac.type == I40E_MAC_X722) {

sys/dev/ixl/ixl_pf_iov.c

1297

status = i40e_aq_set_rss_key(hw, vf->vsi.vsi_num, &key_data);

sys/dev/ixl/ixl_pf_iov.c

1300

i40e_stat_str(hw, status), i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_iov.c

1307

i40e_write_rx_ctl(hw, I40E_VFQF_HKEY1(i, vf->vf_num), ((u32 *)key->key)[i]);

sys/dev/ixl/ixl_pf_iov.c

132

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

1320

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

1324

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

1345

if (hw->mac.type == I40E_MAC_X722) {

sys/dev/ixl/ixl_pf_iov.c

1346

status = i40e_aq_set_rss_lut(hw, vf->vsi.vsi_num, false, lut->lut, lut->lut_entries);

sys/dev/ixl/ixl_pf_iov.c

1349

i40e_stat_str(hw, status), i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_iov.c

135

vsi_ctx.pf_num = hw->pf_id;

sys/dev/ixl/ixl_pf_iov.c

1356

i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf->vf_num), ((u32 *)lut->lut)[i]);

sys/dev/ixl/ixl_pf_iov.c

1369

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

1372

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

1376

i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_num), (u32)hena->hena);

sys/dev/ixl/ixl_pf_iov.c

1377

i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_num), (u32)(hena->hena >> 32));

sys/dev/ixl/ixl_pf_iov.c

138

vsi_ctx.vf_num = hw->func_caps.vf_base_id + vf->vf_num;

sys/dev/ixl/ixl_pf_iov.c

1389

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

1391

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

1396

i40e_virtchnl_link_speed(hw->phy.link_info.link_speed);

sys/dev/ixl/ixl_pf_iov.c

1421

vf_num = le16toh(event->desc.retval) - pf->hw.func_caps.vf_base_id;

sys/dev/ixl/ixl_pf_iov.c

1524

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

1529

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

1535

icr0 = rd32(hw, I40E_PFINT_ICR0_ENA);

sys/dev/ixl/ixl_pf_iov.c

1537

wr32(hw, I40E_PFINT_ICR0_ENA, icr0);

sys/dev/ixl/ixl_pf_iov.c

1538

ixl_flush(hw);

sys/dev/ixl/ixl_pf_iov.c

1541

global_vf_num = hw->func_caps.vf_base_id + i;

sys/dev/ixl/ixl_pf_iov.c

1549

vflrstat = rd32(hw, I40E_GLGEN_VFLRSTAT(vflrstat_index));

sys/dev/ixl/ixl_pf_iov.c

1551

wr32(hw, I40E_GLGEN_VFLRSTAT(vflrstat_index),

sys/dev/ixl/ixl_pf_iov.c

1619

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

1630

ctxt.pf_num = hw->pf_id;

sys/dev/ixl/ixl_pf_iov.c

1638

error = i40e_aq_update_vsi_params(hw, &ctxt, NULL);

sys/dev/ixl/ixl_pf_iov.c

1641

" aq_error %d\n", error, hw->aq.asq_last_status);

sys/dev/ixl/ixl_pf_iov.c

1652

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

1657

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

1672

ret = i40e_aq_add_veb(hw, pf_vsi->uplink_seid, pf_vsi->seid,

sys/dev/ixl/ixl_pf_iov.c

1675

error = hw->aq.asq_last_status;

sys/dev/ixl/ixl_pf_iov.c

1677

i40e_stat_str(hw, ret), i40e_aq_str(hw, error));

sys/dev/ixl/ixl_pf_iov.c

1703

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

1707

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

171

code = i40e_aq_add_vsi(hw, &vsi_ctx, NULL);

sys/dev/ixl/ixl_pf_iov.c

1711

i40e_aq_delete_element(hw, pf->vfs[i].vsi.seid, NULL);

sys/dev/ixl/ixl_pf_iov.c

1720

i40e_aq_delete_element(hw, pf->veb_seid, NULL);

sys/dev/ixl/ixl_pf_iov.c

173

return (ixl_adminq_err_to_errno(hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_iov.c

179

code = i40e_aq_get_vsi_params(hw, &vsi_ctx, NULL);

sys/dev/ixl/ixl_pf_iov.c

181

return (ixl_adminq_err_to_errno(hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_iov.c

183

code = i40e_aq_config_vsi_bw_limit(hw, vf->vsi.seid, 0, 0, NULL);

sys/dev/ixl/ixl_pf_iov.c

186

ixl_adminq_err_to_errno(hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_iov.c

187

return (ixl_adminq_err_to_errno(hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_iov.c

197

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

200

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

211

error = i40e_aq_set_vsi_broadcast(hw, vf->vsi.seid, TRUE, NULL);

sys/dev/ixl/ixl_pf_iov.c

221

ixl_vf_map_vsi_queue(struct i40e_hw *hw, struct ixl_vf *vf, int qnum,

sys/dev/ixl/ixl_pf_iov.c

235

qtable = i40e_read_rx_ctl(hw, I40E_VSILAN_QTABLE(index, vf->vsi.vsi_num));

sys/dev/ixl/ixl_pf_iov.c

238

i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(index, vf->vsi.vsi_num), qtable);

sys/dev/ixl/ixl_pf_iov.c

244

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

248

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

254

i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->vsi.vsi_num),

sys/dev/ixl/ixl_pf_iov.c

258

wr32(hw, I40E_VPLAN_MAPENA(vf->vf_num),

sys/dev/ixl/ixl_pf_iov.c

267

wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_num), qtable);

sys/dev/ixl/ixl_pf_iov.c

270

wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_num),

sys/dev/ixl/ixl_pf_iov.c

277

ixl_vf_map_vsi_queue(hw, vf, i,

sys/dev/ixl/ixl_pf_iov.c

282

ixl_vf_map_vsi_queue(hw, vf, i,

sys/dev/ixl/ixl_pf_iov.c

285

ixl_flush(hw);

sys/dev/ixl/ixl_pf_iov.c

291

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

293

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

298

i40e_aq_delete_element(hw, vsi->seid, NULL);

sys/dev/ixl/ixl_pf_iov.c

302

ixl_vf_disable_queue_intr(struct i40e_hw *hw, uint32_t vfint_reg)

sys/dev/ixl/ixl_pf_iov.c

305

wr32(hw, vfint_reg, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);

sys/dev/ixl/ixl_pf_iov.c

306

ixl_flush(hw);

sys/dev/ixl/ixl_pf_iov.c

310

ixl_vf_unregister_intr(struct i40e_hw *hw, uint32_t vpint_reg)

sys/dev/ixl/ixl_pf_iov.c

313

wr32(hw, vpint_reg, I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |

sys/dev/ixl/ixl_pf_iov.c

315

ixl_flush(hw);

sys/dev/ixl/ixl_pf_iov.c

321

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

325

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

330

ixl_vf_disable_queue_intr(hw, I40E_VFINT_DYN_CTL0(vf->vf_num));

sys/dev/ixl/ixl_pf_iov.c

332

for (i = 1; i < hw->func_caps.num_msix_vectors_vf; i++) {

sys/dev/ixl/ixl_pf_iov.c

333

vfint_reg = IXL_VFINT_DYN_CTLN_REG(hw, i , vf->vf_num);

sys/dev/ixl/ixl_pf_iov.c

334

ixl_vf_disable_queue_intr(hw, vfint_reg);

sys/dev/ixl/ixl_pf_iov.c

338

ixl_vf_unregister_intr(hw, I40E_VPINT_LNKLST0(vf->vf_num));

sys/dev/ixl/ixl_pf_iov.c

340

for (i = 1; i < hw->func_caps.num_msix_vectors_vf; i++) {

sys/dev/ixl/ixl_pf_iov.c

341

vpint_reg = IXL_VPINT_LNKLSTN_REG(hw, i, vf->vf_num);

sys/dev/ixl/ixl_pf_iov.c

342

ixl_vf_unregister_intr(hw, vpint_reg);

sys/dev/ixl/ixl_pf_iov.c

352

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

357

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

358

global_vf_num = hw->func_caps.vf_base_id + vf->vf_num;

sys/dev/ixl/ixl_pf_iov.c

360

wr32(hw, I40E_PF_PCI_CIAA, IXL_PF_PCI_CIAA_VF_DEVICE_STATUS |

sys/dev/ixl/ixl_pf_iov.c

363

ciad = rd32(hw, I40E_PF_PCI_CIAD);

sys/dev/ixl/ixl_pf_iov.c

37

static void ixl_vf_map_vsi_queue(struct i40e_hw *hw, struct ixl_vf *vf, int qnum, uint32_t val);

sys/dev/ixl/ixl_pf_iov.c

375

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

378

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

38

static void ixl_vf_disable_queue_intr(struct i40e_hw *hw, uint32_t vfint_reg);

sys/dev/ixl/ixl_pf_iov.c

382

vfrtrig = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num));

sys/dev/ixl/ixl_pf_iov.c

384

wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig);

sys/dev/ixl/ixl_pf_iov.c

385

ixl_flush(hw);

sys/dev/ixl/ixl_pf_iov.c

39

static void ixl_vf_unregister_intr(struct i40e_hw *hw, uint32_t vpint_reg);

sys/dev/ixl/ixl_pf_iov.c

395

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

399

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

410

vfrstat = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_num));

sys/dev/ixl/ixl_pf_iov.c

418

wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_num), VIRTCHNL_VFR_COMPLETED);

sys/dev/ixl/ixl_pf_iov.c

420

vfrtrig = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num));

sys/dev/ixl/ixl_pf_iov.c

422

wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num), vfrtrig);

sys/dev/ixl/ixl_pf_iov.c

432

wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_num), VIRTCHNL_VFR_VFACTIVE);

sys/dev/ixl/ixl_pf_iov.c

433

ixl_flush(hw);

sys/dev/ixl/ixl_pf_iov.c

451

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

454

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

455

global_vf_id = hw->func_caps.vf_base_id + vf->vf_num;

sys/dev/ixl/ixl_pf_iov.c

461

i40e_aq_send_msg_to_vf(hw, global_vf_id, op, status, msg, len, NULL);

sys/dev/ixl/ixl_pf_iov.c

478

ixl_vc_opcode_str(op), op, i40e_stat_str(&pf->hw, status),

sys/dev/ixl/ixl_pf_iov.c

543

reply.max_vectors = pf->hw.func_caps.num_msix_vectors_vf;

sys/dev/ixl/ixl_pf_iov.c

559

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

565

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

567

global_vf_num = hw->func_caps.vf_base_id + vf->vf_num;

sys/dev/ixl/ixl_pf_iov.c

573

status = i40e_clear_lan_tx_queue_context(hw, global_queue_num);

sys/dev/ixl/ixl_pf_iov.c

585

status = i40e_set_lan_tx_queue_context(hw, global_queue_num, &txq);

sys/dev/ixl/ixl_pf_iov.c

590

(hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) |

sys/dev/ixl/ixl_pf_iov.c

592

wr32(hw, I40E_QTX_CTL(global_queue_num), qtx_ctl);

sys/dev/ixl/ixl_pf_iov.c

593

ixl_flush(hw);

sys/dev/ixl/ixl_pf_iov.c

604

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

609

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

637

status = i40e_clear_lan_rx_queue_context(hw, global_queue_num);

sys/dev/ixl/ixl_pf_iov.c

658

status = i40e_set_lan_rx_queue_context(hw, global_queue_num, &rxq);

sys/dev/ixl/ixl_pf_iov.c

744

wr32(&pf->hw, offset, qctl);

sys/dev/ixl/ixl_pf_iov.c

754

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

760

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

796

lnklst_reg = IXL_VPINT_LNKLSTN_REG(hw, vector->vector_id,

sys/dev/ixl/ixl_pf_iov.c

798

wr32(hw, lnklst_reg,

sys/dev/ixl/ixl_pf_iov.c

802

ixl_flush(hw);

sys/dev/ixl/ixl_pf_iov.c

811

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_iov.c

814

hw = &pf->hw;

sys/dev/ixl/ixl_pf_iov.c

820

if ((vector->vector_id >= hw->func_caps.num_msix_vectors_vf) ||

sys/dev/ixl/ixl_pf_iov.c

92

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

1098

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

1107

if (hw->mac.type == I40E_MAC_X722) {

sys/dev/ixl/ixl_pf_main.c

1110

status = i40e_aq_set_rss_key(hw, vsi->vsi_num, &key_data);

sys/dev/ixl/ixl_pf_main.c

1114

i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

1115

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

1118

i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i), rss_seed[i]);

sys/dev/ixl/ixl_pf_main.c

1128

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

1148

hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |

sys/dev/ixl/ixl_pf_main.c

1149

((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);

sys/dev/ixl/ixl_pf_main.c

1151

i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);

sys/dev/ixl/ixl_pf_main.c

1152

i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));

sys/dev/ixl/ixl_pf_main.c

1178

bcopy(vsi->hw->mac.perm_addr, e.mac_addr, ETHER_ADDR_LEN);

sys/dev/ixl/ixl_pf_main.c

1181

i40e_aq_remove_macvlan(vsi->hw, vsi->seid, &e, 1, NULL);

sys/dev/ixl/ixl_pf_main.c

1184

bcopy(vsi->hw->mac.perm_addr, e.mac_addr, ETHER_ADDR_LEN);

sys/dev/ixl/ixl_pf_main.c

1188

i40e_aq_remove_macvlan(vsi->hw, vsi->seid, &e, 1, NULL);

sys/dev/ixl/ixl_pf_main.c

1209

i40e_aq_set_vsi_broadcast(&pf->hw, vsi->seid, TRUE, NULL);

sys/dev/ixl/ixl_pf_main.c

1216

ixl_add_filter(vsi, vsi->hw->mac.addr, IXL_VLAN_ANY);

sys/dev/ixl/ixl_pf_main.c

1224

i40e_add_filter_to_drop_tx_flow_control_frames(vsi->hw, vsi->seid);

sys/dev/ixl/ixl_pf_main.c

1227

i40e_add_filter_to_drop_tx_flow_control_frames(vsi->hw, vsi->seid);

sys/dev/ixl/ixl_pf_main.c

1234

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/ixl_pf_main.c

1255

if (hw == NULL)

sys/dev/ixl/ixl_pf_main.c

1259

ixl_add_filter(vsi, hw->mac.addr, IXL_VLAN_ANY);

sys/dev/ixl/ixl_pf_main.c

1267

ixl_add_vlan_filters(vsi, hw->mac.addr);

sys/dev/ixl/ixl_pf_main.c

1498

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_main.c

1505

hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

1552

status = i40e_aq_add_macvlan(hw, vsi->seid, a, j, NULL);

sys/dev/ixl/ixl_pf_main.c

1561

i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

1562

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

1597

struct i40e_hw *hw;

sys/dev/ixl/ixl_pf_main.c

1604

hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

1644

status = i40e_aq_remove_macvlan(hw, vsi->seid, d, j, NULL);

sys/dev/ixl/ixl_pf_main.c

1648

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

1649

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

1671

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

1682

i40e_pre_tx_queue_cfg(hw, pf_qidx, TRUE);

sys/dev/ixl/ixl_pf_main.c

1684

reg = rd32(hw, I40E_QTX_ENA(pf_qidx));

sys/dev/ixl/ixl_pf_main.c

1687

wr32(hw, I40E_QTX_ENA(pf_qidx), reg);

sys/dev/ixl/ixl_pf_main.c

1690

reg = rd32(hw, I40E_QTX_ENA(pf_qidx));

sys/dev/ixl/ixl_pf_main.c

1707

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

1718

reg = rd32(hw, I40E_QRX_ENA(pf_qidx));

sys/dev/ixl/ixl_pf_main.c

1721

wr32(hw, I40E_QRX_ENA(pf_qidx), reg);

sys/dev/ixl/ixl_pf_main.c

1724

reg = rd32(hw, I40E_QRX_ENA(pf_qidx));

sys/dev/ixl/ixl_pf_main.c

1757

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

1768

i40e_pre_tx_queue_cfg(hw, pf_qidx, FALSE);

sys/dev/ixl/ixl_pf_main.c

1771

reg = rd32(hw, I40E_QTX_ENA(pf_qidx));

sys/dev/ixl/ixl_pf_main.c

1773

wr32(hw, I40E_QTX_ENA(pf_qidx), reg);

sys/dev/ixl/ixl_pf_main.c

1776

reg = rd32(hw, I40E_QTX_ENA(pf_qidx));

sys/dev/ixl/ixl_pf_main.c

1796

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

1807

reg = rd32(hw, I40E_QRX_ENA(pf_qidx));

sys/dev/ixl/ixl_pf_main.c

1809

wr32(hw, I40E_QRX_ENA(pf_qidx), reg);

sys/dev/ixl/ixl_pf_main.c

1812

reg = rd32(hw, I40E_QRX_ENA(pf_qidx));

sys/dev/ixl/ixl_pf_main.c

1842

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

1854

reg = rd32(hw, I40E_GL_MDET_TX);

sys/dev/ixl/ixl_pf_main.c

1864

wr32(hw, I40E_GL_MDET_TX, 0xffffffff);

sys/dev/ixl/ixl_pf_main.c

1871

reg = rd32(hw, I40E_PF_MDET_TX);

sys/dev/ixl/ixl_pf_main.c

1873

wr32(hw, I40E_PF_MDET_TX, 0xFFFF);

sys/dev/ixl/ixl_pf_main.c

1874

pf_mdet_num = hw->pf_id;

sys/dev/ixl/ixl_pf_main.c

1881

reg = rd32(hw, I40E_VP_MDET_TX(i));

sys/dev/ixl/ixl_pf_main.c

1883

wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);

sys/dev/ixl/ixl_pf_main.c

191

ixl_nvm_version_str(struct i40e_hw *hw, struct sbuf *buf)

sys/dev/ixl/ixl_pf_main.c

1915

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

193

u8 oem_ver = (u8)(hw->nvm.oem_ver >> 24);

sys/dev/ixl/ixl_pf_main.c

1930

reg = rd32(hw, I40E_GL_MDET_RX);

sys/dev/ixl/ixl_pf_main.c

1938

wr32(hw, I40E_GL_MDET_RX, 0xffffffff);

sys/dev/ixl/ixl_pf_main.c

194

u16 oem_build = (u16)((hw->nvm.oem_ver >> 16) & 0xFFFF);

sys/dev/ixl/ixl_pf_main.c

1945

reg = rd32(hw, I40E_PF_MDET_RX);

sys/dev/ixl/ixl_pf_main.c

1947

wr32(hw, I40E_PF_MDET_RX, 0xFFFF);

sys/dev/ixl/ixl_pf_main.c

1948

pf_mdet_num = hw->pf_id;

sys/dev/ixl/ixl_pf_main.c

195

u8 oem_patch = (u8)(hw->nvm.oem_ver & 0xFF);

sys/dev/ixl/ixl_pf_main.c

1955

reg = rd32(hw, I40E_VP_MDET_RX(i));

sys/dev/ixl/ixl_pf_main.c

1957

wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);

sys/dev/ixl/ixl_pf_main.c

199

hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,

sys/dev/ixl/ixl_pf_main.c

1995

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

200

hw->aq.api_maj_ver, hw->aq.api_min_ver,

sys/dev/ixl/ixl_pf_main.c

2008

reg = rd32(hw, I40E_PFINT_ICR0_ENA);

sys/dev/ixl/ixl_pf_main.c

201

(hw->nvm.version & IXL_NVM_VERSION_HI_MASK) >>

sys/dev/ixl/ixl_pf_main.c

2010

wr32(hw, I40E_PFINT_ICR0_ENA, reg);

sys/dev/ixl/ixl_pf_main.c

2011

ixl_flush(hw);

sys/dev/ixl/ixl_pf_main.c

2015

ixl_enable_intr0(struct i40e_hw *hw)

sys/dev/ixl/ixl_pf_main.c

2023

wr32(hw, I40E_PFINT_DYN_CTL0, reg);

sys/dev/ixl/ixl_pf_main.c

2027

ixl_disable_intr0(struct i40e_hw *hw)

sys/dev/ixl/ixl_pf_main.c

203

(hw->nvm.version & IXL_NVM_VERSION_LO_MASK) >>

sys/dev/ixl/ixl_pf_main.c

2032

wr32(hw, I40E_PFINT_DYN_CTL0, reg);

sys/dev/ixl/ixl_pf_main.c

2033

ixl_flush(hw);

sys/dev/ixl/ixl_pf_main.c

2037

ixl_enable_queue(struct i40e_hw *hw, int id)

sys/dev/ixl/ixl_pf_main.c

2044

wr32(hw, I40E_PFINT_DYN_CTLN(id), reg);

sys/dev/ixl/ixl_pf_main.c

2048

ixl_disable_queue(struct i40e_hw *hw, int id)

sys/dev/ixl/ixl_pf_main.c

205

hw->nvm.eetrack,

sys/dev/ixl/ixl_pf_main.c

2053

wr32(hw, I40E_PFINT_DYN_CTLN(id), reg);

sys/dev/ixl/ixl_pf_main.c

2088

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

2097

ixl_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),

sys/dev/ixl/ixl_pf_main.c

2100

ixl_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2103

ixl_stat_update48(hw, I40E_GLPRT_GORCL(hw->port),

sys/dev/ixl/ixl_pf_main.c

2106

ixl_stat_update48(hw, I40E_GLPRT_GOTCL(hw->port),

sys/dev/ixl/ixl_pf_main.c

2109

ixl_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2113

ixl_stat_update48(hw, I40E_GLPRT_UPRCL(hw->port),

sys/dev/ixl/ixl_pf_main.c

2117

ixl_stat_update48(hw, I40E_GLPRT_UPTCL(hw->port),

sys/dev/ixl/ixl_pf_main.c

212

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

2121

ixl_stat_update48(hw, I40E_GLPRT_MPRCL(hw->port),

sys/dev/ixl/ixl_pf_main.c

2125

ixl_stat_update48(hw, I40E_GLPRT_MPTCL(hw->port),

sys/dev/ixl/ixl_pf_main.c

2129

ixl_stat_update48(hw, I40E_GLPRT_BPRCL(hw->port),

sys/dev/ixl/ixl_pf_main.c

2133

ixl_stat_update48(hw, I40E_GLPRT_BPTCL(hw->port),

sys/dev/ixl/ixl_pf_main.c

2138

ixl_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),

sys/dev/ixl/ixl_pf_main.c

2142

ixl_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2146

ixl_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2150

ixl_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2156

ixl_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2159

ixl_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2162

ixl_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2165

ixl_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),

sys/dev/ixl/ixl_pf_main.c

217

ixl_nvm_version_str(hw, sbuf);

sys/dev/ixl/ixl_pf_main.c

2177

ixl_stat_update48(hw, I40E_GLPRT_PRC64L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2180

ixl_stat_update48(hw, I40E_GLPRT_PRC127L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2183

ixl_stat_update48(hw, I40E_GLPRT_PRC255L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2186

ixl_stat_update48(hw, I40E_GLPRT_PRC511L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2189

ixl_stat_update48(hw, I40E_GLPRT_PRC1023L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2192

ixl_stat_update48(hw, I40E_GLPRT_PRC1522L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2195

ixl_stat_update48(hw, I40E_GLPRT_PRC9522L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2200

ixl_stat_update48(hw, I40E_GLPRT_PTC64L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2203

ixl_stat_update48(hw, I40E_GLPRT_PTC127L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2206

ixl_stat_update48(hw, I40E_GLPRT_PTC255L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2209

ixl_stat_update48(hw, I40E_GLPRT_PTC511L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2212

ixl_stat_update48(hw, I40E_GLPRT_PTC1023L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2215

ixl_stat_update48(hw, I40E_GLPRT_PTC1522L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2218

ixl_stat_update48(hw, I40E_GLPRT_PTC9522L(hw->port),

sys/dev/ixl/ixl_pf_main.c

2222

ixl_stat_update32(hw, I40E_GLPRT_RUC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2225

ixl_stat_update32(hw, I40E_GLPRT_RFC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2230

ixl_stat_update32(hw, I40E_GLPRT_ROC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2243

ixl_stat_update64(hw,

sys/dev/ixl/ixl_pf_main.c

2244

I40E_GL_RXERR1L(hw->pf_id + BIT(7)),

sys/dev/ixl/ixl_pf_main.c

2251

ixl_stat_update32(hw, I40E_GLPRT_RJC(hw->port),

sys/dev/ixl/ixl_pf_main.c

2255

i40e_get_phy_lpi_status(hw, nsd);

sys/dev/ixl/ixl_pf_main.c

2257

i40e_lpi_stat_update(hw, pf->stat_offsets_loaded,

sys/dev/ixl/ixl_pf_main.c

2281

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

2290

ixl_stat_update32(hw, I40E_GLV_TEPC(stat_idx),

sys/dev/ixl/ixl_pf_main.c

2293

ixl_stat_update32(hw, I40E_GLV_RDPC(stat_idx),

sys/dev/ixl/ixl_pf_main.c

2297

ixl_stat_update48(hw, I40E_GLV_GORCL(stat_idx),

sys/dev/ixl/ixl_pf_main.c

2300

ixl_stat_update48(hw, I40E_GLV_UPRCL(stat_idx),

sys/dev/ixl/ixl_pf_main.c

2303

ixl_stat_update48(hw, I40E_GLV_MPRCL(stat_idx),

sys/dev/ixl/ixl_pf_main.c

2306

ixl_stat_update48(hw, I40E_GLV_BPRCL(stat_idx),

sys/dev/ixl/ixl_pf_main.c

2310

ixl_stat_update48(hw, I40E_GLV_GOTCL(stat_idx),

sys/dev/ixl/ixl_pf_main.c

2313

ixl_stat_update48(hw, I40E_GLV_UPTCL(stat_idx),

sys/dev/ixl/ixl_pf_main.c

2316

ixl_stat_update48(hw, I40E_GLV_MPTCL(stat_idx),

sys/dev/ixl/ixl_pf_main.c

2319

ixl_stat_update48(hw, I40E_GLV_BPTCL(stat_idx),

sys/dev/ixl/ixl_pf_main.c

236

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

2401

_ixl_stat_update_helper(struct i40e_hw *hw, u32 reg,

sys/dev/ixl/ixl_pf_main.c

2404

u64 new_data = rd64(hw, reg);

sys/dev/ixl/ixl_pf_main.c

2419

ixl_stat_update48(struct i40e_hw *hw, u32 reg,

sys/dev/ixl/ixl_pf_main.c

2422

_ixl_stat_update_helper(hw,

sys/dev/ixl/ixl_pf_main.c

2434

ixl_stat_update64(struct i40e_hw *hw, u32 reg,

sys/dev/ixl/ixl_pf_main.c

2437

_ixl_stat_update_helper(hw,

sys/dev/ixl/ixl_pf_main.c

244

fwsts = rd32(hw, I40E_GL_FWSTS) & I40E_GL_FWSTS_FWS1B_MASK;

sys/dev/ixl/ixl_pf_main.c

2449

ixl_stat_update32(struct i40e_hw *hw, u32 reg,

sys/dev/ixl/ixl_pf_main.c

2454

new_data = rd32(hw, reg);

sys/dev/ixl/ixl_pf_main.c

2492

&pf->hw.debug_mask, 0, "Shared code debug message level");

sys/dev/ixl/ixl_pf_main.c

2534

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

2600

if (i40e_is_25G_device(hw->device_id)) {

sys/dev/ixl/ixl_pf_main.c

2680

&pf->hw.debug_mask, 0, "Shared code debug message level");

sys/dev/ixl/ixl_pf_main.c

272

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

284

status = i40e_pf_reset(hw);

sys/dev/ixl/ixl_pf_main.c

2857

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

2864

ixl_link_speed_string(hw->phy.link_info.link_speed)),

sys/dev/ixl/ixl_pf_main.c

2903

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

2910

aq_error = i40e_aq_get_phy_capabilities(hw,

sys/dev/ixl/ixl_pf_main.c

2916

hw->aq.asq_last_status);

sys/dev/ixl/ixl_pf_main.c

2937

aq_error = i40e_aq_set_phy_config(hw, &config, NULL);

sys/dev/ixl/ixl_pf_main.c

2942

hw->aq.asq_last_status);

sys/dev/ixl/ixl_pf_main.c

302

i40e_stat_str(hw, status));

sys/dev/ixl/ixl_pf_main.c

3064

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

3071

if (hw->mac.type == I40E_MAC_X722)

sys/dev/ixl/ixl_pf_main.c

3079

i40e_set_pci_config_data(hw, link);

sys/dev/ixl/ixl_pf_main.c

3083

((hw->bus.speed == i40e_bus_speed_8000) ? "8.0GT/s":

sys/dev/ixl/ixl_pf_main.c

3084

(hw->bus.speed == i40e_bus_speed_5000) ? "5.0GT/s":

sys/dev/ixl/ixl_pf_main.c

3085

(hw->bus.speed == i40e_bus_speed_2500) ? "2.5GT/s":"Unknown"),

sys/dev/ixl/ixl_pf_main.c

3086

(hw->bus.width == i40e_bus_width_pcie_x8) ? "Width x8" :

sys/dev/ixl/ixl_pf_main.c

3087

(hw->bus.width == i40e_bus_width_pcie_x4) ? "Width x4" :

sys/dev/ixl/ixl_pf_main.c

3088

(hw->bus.width == i40e_bus_width_pcie_x2) ? "Width x2" :

sys/dev/ixl/ixl_pf_main.c

3089

(hw->bus.width == i40e_bus_width_pcie_x1) ? "Width x1" :

sys/dev/ixl/ixl_pf_main.c

3096

if (hw->bus.speed >= i40e_bus_speed_8000

sys/dev/ixl/ixl_pf_main.c

3097

&& hw->bus.width >= i40e_bus_width_pcie_x8)

sys/dev/ixl/ixl_pf_main.c

3100

num_ports = bitcount32(hw->func_caps.valid_functions);

sys/dev/ixl/ixl_pf_main.c

3103

if ((num_ports * max_speed) > hw->bus.speed * hw->bus.width) {

sys/dev/ixl/ixl_pf_main.c

3117

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

3121

ixl_nvm_version_str(hw, sbuf);

sys/dev/ixl/ixl_pf_main.c

3159

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

317

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

320

status = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,

sys/dev/ixl/ixl_pf_main.c

321

hw->func_caps.num_rx_qp, 0, 0);

sys/dev/ixl/ixl_pf_main.c

324

i40e_stat_str(hw, status));

sys/dev/ixl/ixl_pf_main.c

3242

status = i40e_nvmupd_command(hw, nvma, nvma->data, &perrno);

sys/dev/ixl/ixl_pf_main.c

3256

i40e_stat_str(hw, status), perrno);

sys/dev/ixl/ixl_pf_main.c

3271

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

3276

reg = rd32(hw, I40E_GLGEN_MDIO_I2C_SEL(i));

sys/dev/ixl/ixl_pf_main.c

328

status = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);

sys/dev/ixl/ixl_pf_main.c

3280

& BIT(hw->port);

sys/dev/ixl/ixl_pf_main.c

3291

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

3299

aq_error = i40e_aq_get_phy_capabilities(hw,

sys/dev/ixl/ixl_pf_main.c

3305

hw->aq.asq_last_status);

sys/dev/ixl/ixl_pf_main.c

331

i40e_stat_str(hw, status));

sys/dev/ixl/ixl_pf_main.c

3313

aq_error = i40e_aq_get_phy_capabilities(hw,

sys/dev/ixl/ixl_pf_main.c

3319

hw->aq.asq_last_status);

sys/dev/ixl/ixl_pf_main.c

3359

aq_error = i40e_aq_set_phy_config(hw, &config, NULL);

sys/dev/ixl/ixl_pf_main.c

3364

hw->aq.asq_last_status);

sys/dev/ixl/ixl_pf_main.c

3368

aq_error = i40e_aq_set_link_restart_an(hw, enable, NULL);

sys/dev/ixl/ixl_pf_main.c

3373

hw->aq.asq_last_status);

sys/dev/ixl/ixl_pf_main.c

3437

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

3446

status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);

sys/dev/ixl/ixl_pf_main.c

3450

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

3451

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

348

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

352

if (hw->hmc.hmc_obj == NULL)

sys/dev/ixl/ixl_pf_main.c

3522

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

3535

status = i40e_aq_get_phy_capabilities(hw,

sys/dev/ixl/ixl_pf_main.c

3540

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

3541

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

355

status = i40e_shutdown_lan_hmc(hw);

sys/dev/ixl/ixl_pf_main.c

359

i40e_stat_str(hw, status));

sys/dev/ixl/ixl_pf_main.c

3614

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

3625

if (hw->mac.type == I40E_MAC_X722) {

sys/dev/ixl/ixl_pf_main.c

3646

rd32(hw, I40E_PRTMAC_PCS_LINK_CTRL),

sys/dev/ixl/ixl_pf_main.c

3647

rd32(hw, I40E_PRTMAC_PCS_LINK_STATUS1(0)),

sys/dev/ixl/ixl_pf_main.c

3648

rd32(hw, I40E_PRTMAC_PCS_LINK_STATUS2),

sys/dev/ixl/ixl_pf_main.c

3649

rd32(hw, I40E_PRTMAC_PCS_XGMII_FIFO_STATUS),

sys/dev/ixl/ixl_pf_main.c

3650

rd32(hw, I40E_PRTMAC_PCS_AN_LP_STATUS),

sys/dev/ixl/ixl_pf_main.c

3651

rd32(hw, I40E_PRTMAC_PCS_KR_STATUS),

sys/dev/ixl/ixl_pf_main.c

3652

rd32(hw, I40E_PRTMAC_PCS_FEC_KR_STATUS1),

sys/dev/ixl/ixl_pf_main.c

3653

rd32(hw, I40E_PRTMAC_PCS_FEC_KR_STATUS2)

sys/dev/ixl/ixl_pf_main.c

3789

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

3805

status = i40e_aq_get_switch_resource_alloc(hw, &num_entries,

sys/dev/ixl/ixl_pf_main.c

381

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

3812

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

3813

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

389

hw->func_caps.iwarp = 0;

sys/dev/ixl/ixl_pf_main.c

3933

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

3952

status = i40e_aq_get_switch_config(hw, sw_config,

sys/dev/ixl/ixl_pf_main.c

3957

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

3958

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

402

status = i40e_aq_discover_capabilities(hw, buf, len,

sys/dev/ixl/ixl_pf_main.c

4026

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4036

if ((hw->flags & I40E_HW_FLAG_802_1AD_CAPABLE) == 0) {

sys/dev/ixl/ixl_pf_main.c

4041

hw->switch_tag = requested_vlan;

sys/dev/ixl/ixl_pf_main.c

4044

hw->switch_tag, hw->first_tag, hw->second_tag);

sys/dev/ixl/ixl_pf_main.c

4045

status = i40e_aq_set_switch_config(hw, 0, 0, 0, NULL);

sys/dev/ixl/ixl_pf_main.c

4049

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

405

if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) &&

sys/dev/ixl/ixl_pf_main.c

4050

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

4060

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4078

if (hw->mac.type == I40E_MAC_X722) {

sys/dev/ixl/ixl_pf_main.c

4079

status = i40e_aq_get_rss_key(hw, pf->vsi.vsi_num, &key_data);

sys/dev/ixl/ixl_pf_main.c

4082

i40e_stat_str(hw, status), i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

4085

reg = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));

sys/dev/ixl/ixl_pf_main.c

413

i40e_stat_str(hw, status), i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

4150

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4166

if (hw->mac.type == I40E_MAC_X722) {

sys/dev/ixl/ixl_pf_main.c

4167

status = i40e_aq_get_rss_lut(hw, pf->vsi.vsi_num, TRUE, hlut, sizeof(hlut));

sys/dev/ixl/ixl_pf_main.c

4170

i40e_stat_str(hw, status), i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

4172

for (int i = 0; i < hw->func_caps.rss_table_size >> 2; i++) {

sys/dev/ixl/ixl_pf_main.c

4173

reg = rd32(hw, I40E_PFQF_HLUT(i));

sys/dev/ixl/ixl_pf_main.c

4191

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4194

hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |

sys/dev/ixl/ixl_pf_main.c

4195

((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);

sys/dev/ixl/ixl_pf_main.c

4212

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4229

status = i40e_aq_set_phy_debug(hw, !!(requested_mode) << 4, NULL);

sys/dev/ixl/ixl_pf_main.c

4233

" aq error: %s\n", __func__, i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

4234

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

428

if (hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE) {

sys/dev/ixl/ixl_pf_main.c

4407

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4413

status = i40e_aq_get_phy_capabilities(hw,

sys/dev/ixl/ixl_pf_main.c

4418

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

4419

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

4432

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4449

status = i40e_aq_set_phy_config(hw, &config, NULL);

sys/dev/ixl/ixl_pf_main.c

4454

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

4455

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

4557

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4594

status = i40e_aq_debug_dump(hw, cluster_id, curr_next_table, curr_next_index, curr_buff_size,

sys/dev/ixl/ixl_pf_main.c

4598

i40e_stat_str(hw, status), i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

461

hw->pf_id, hw->func_caps.num_vfs, hw->func_caps.num_msix_vectors,

sys/dev/ixl/ixl_pf_main.c

462

hw->func_caps.num_msix_vectors_vf, hw->func_caps.num_tx_qp,

sys/dev/ixl/ixl_pf_main.c

463

(hw->func_caps.mdio_port_mode == 2) ? "I2C" :

sys/dev/ixl/ixl_pf_main.c

464

(hw->func_caps.mdio_port_mode == 1 && pf->has_i2c) ? "MDIO & I2C" :

sys/dev/ixl/ixl_pf_main.c

4647

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

465

(hw->func_caps.mdio_port_mode == 1) ? "MDIO dedicated" :

sys/dev/ixl/ixl_pf_main.c

4650

status = i40e_aq_start_lldp(hw, false, NULL);

sys/dev/ixl/ixl_pf_main.c

4652

switch (hw->aq.asq_last_status) {

sys/dev/ixl/ixl_pf_main.c

4666

i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

4667

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

4679

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4683

if (hw->func_caps.npar_enable != 0) {

sys/dev/ixl/ixl_pf_main.c

4689

if ((hw->flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE) == 0) {

sys/dev/ixl/ixl_pf_main.c

4695

status = i40e_aq_stop_lldp(hw, true, false, NULL);

sys/dev/ixl/ixl_pf_main.c

4697

if (hw->aq.asq_last_status != I40E_AQ_RC_EPERM) {

sys/dev/ixl/ixl_pf_main.c

4700

i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

4701

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

4708

i40e_aq_set_dcb_parameters(hw, true, NULL);

sys/dev/ixl/ixl_pf_main.c

4757

cmd_status = i40e_enable_eee(&pf->hw, (bool)(!!new_state));

sys/dev/ixl/ixl_pf_main.c

4797

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4801

if (((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver < 33)) ||

sys/dev/ixl/ixl_pf_main.c

4802

(hw->aq.fw_maj_ver < 4)) {

sys/dev/ixl/ixl_pf_main.c

4804

status = i40e_aq_set_link_restart_an(hw, TRUE, NULL);

sys/dev/ixl/ixl_pf_main.c

4808

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

4809

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

4815

hw->phy.get_link_info = TRUE;

sys/dev/ixl/ixl_pf_main.c

4816

status = i40e_get_link_status(hw, &pf->link_up);

sys/dev/ixl/ixl_pf_main.c

4820

__func__, i40e_stat_str(hw, status),

sys/dev/ixl/ixl_pf_main.c

4821

i40e_aq_str(hw, hw->aq.asq_last_status));

sys/dev/ixl/ixl_pf_main.c

4834

pf->fc = hw->fc.current_mode;

sys/dev/ixl/ixl_pf_main.c

4860

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4868

wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);

sys/dev/ixl/ixl_pf_main.c

4877

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

4885

wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_GLOBR_MASK);

sys/dev/ixl/ixl_pf_main.c

4899

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/ixl_pf_main.c

4919

rd32(hw, I40E_PFINT_LNKLSTN(rx_que->msix - 1)),

sys/dev/ixl/ixl_pf_main.c

4920

rd32(hw, I40E_QINT_RQCTL(rx_que->msix - 1)));

sys/dev/ixl/ixl_pf_main.c

4926

rd32(hw, I40E_QINT_TQCTL(tx_que->msix - 1)));

sys/dev/ixl/ixl_pf_main.c

4942

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/ixl_pf_main.c

4961

rd32(hw, I40E_PFINT_DYN_CTLN(rx_que->msix - 1)));

sys/dev/ixl/ixl_pf_main.c

498

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

502

if (hw->hmc.hmc_obj) {

sys/dev/ixl/ixl_pf_main.c

503

status = i40e_shutdown_lan_hmc(hw);

sys/dev/ixl/ixl_pf_main.c

507

i40e_stat_str(hw, status));

sys/dev/ixl/ixl_pf_main.c

513

ixl_disable_intr0(hw);

sys/dev/ixl/ixl_pf_main.c

514

status = i40e_shutdown_adminq(hw);

sys/dev/ixl/ixl_pf_main.c

518

i40e_stat_str(hw, status));

sys/dev/ixl/ixl_pf_main.c

654

struct i40e_hw *hw = vsi->hw;

sys/dev/ixl/ixl_pf_main.c

678

status = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,

sys/dev/ixl/ixl_pf_main.c

682

"mode, status: %s\n", i40e_stat_str(hw, status));

sys/dev/ixl/ixl_pf_main.c

743

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

748

fec_abilities = hw->phy.link_info.req_fec_info;

sys/dev/ixl/ixl_pf_main.c

757

if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA)

sys/dev/ixl/ixl_pf_main.c

759

else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA)

sys/dev/ixl/ixl_pf_main.c

766

ixl_link_speed_string(hw->phy.link_info.link_speed),

sys/dev/ixl/ixl_pf_main.c

768

(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) ? "True" : "False",

sys/dev/ixl/ixl_pf_main.c

769

(hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX &&

sys/dev/ixl/ixl_pf_main.c

770

hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX) ?

sys/dev/ixl/ixl_pf_main.c

771

ixl_fc_string[3] : (hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) ?

sys/dev/ixl/ixl_pf_main.c

772

ixl_fc_string[2] : (hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX) ?

sys/dev/ixl/ixl_pf_main.c

782

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

786

wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */

sys/dev/ixl/ixl_pf_main.c

787

rd32(hw, I40E_PFINT_ICR0); /* read to clear */

sys/dev/ixl/ixl_pf_main.c

797

wr32(hw, I40E_PFINT_ICR0_ENA, reg);

sys/dev/ixl/ixl_pf_main.c

804

wr32(hw, I40E_PFINT_LNKLST0, 0x7FF);

sys/dev/ixl/ixl_pf_main.c

806

wr32(hw, I40E_PFINT_ITR0(IXL_RX_ITR), 0x3E);

sys/dev/ixl/ixl_pf_main.c

808

wr32(hw, I40E_PFINT_DYN_CTL0,

sys/dev/ixl/ixl_pf_main.c

812

wr32(hw, I40E_PFINT_STAT_CTL0, 0);

sys/dev/ixl/ixl_pf_main.c

905

struct i40e_hw *hw = &pf->hw;

sys/dev/ixl/ixl_pf_main.c

915

ret = i40e_aq_get_switch_config(hw, sw_config,

sys/dev/ixl/ixl_pf_main.c

919

" aq_error %d\n", ret, pf->hw.aq.asq_last_status);

sys/dev/ixl/ixl_txrx.c

112

i40e_vc_stat_str(struct i40e_hw *hw, enum virtchnl_status_code stat_err)

sys/dev/ixl/ixl_txrx.c

129

snprintf(hw->err_str, sizeof(hw->err_str), "%d", stat_err);

sys/dev/ixl/ixl_txrx.c

130

return hw->err_str;

sys/dev/ixl/ixl_txrx.c

425

wr32(vsi->hw, txr->tail, pidx);

sys/dev/ixl/ixl_txrx.c

444

wr32(vsi->hw, txr->tail, 0);

sys/dev/ixl/ixl_txrx.c

574

wr32(vsi->hw, rxr->tail, pidx);

sys/dev/malo/if_malohal.c

540

malo_hal_gethwspecs(struct malo_hal *mh, struct malo_hal_hwspec *hw)

sys/dev/malo/if_malohal.c

553

IEEE80211_ADDR_COPY(hw->macaddr, cmd->permaddr);

sys/dev/malo/if_malohal.c

554

hw->wcbbase[0] = le32toh(cmd->wcbbase0) & 0x0000ffff;

sys/dev/malo/if_malohal.c

555

hw->wcbbase[1] = le32toh(cmd->wcbbase1) & 0x0000ffff;

sys/dev/malo/if_malohal.c

556

hw->wcbbase[2] = le32toh(cmd->wcbbase2) & 0x0000ffff;

sys/dev/malo/if_malohal.c

557

hw->wcbbase[3] = le32toh(cmd->wcbbase3) & 0x0000ffff;

sys/dev/malo/if_malohal.c

558

hw->rxdesc_read = le32toh(cmd->rxpdrd_ptr)& 0x0000ffff;

sys/dev/malo/if_malohal.c

559

hw->rxdesc_write = le32toh(cmd->rxpdwr_ptr)& 0x0000ffff;

sys/dev/malo/if_malohal.c

560

hw->regioncode = le16toh(cmd->regioncode) & 0x00ff;

sys/dev/malo/if_malohal.c

561

hw->fw_releasenum = le32toh(cmd->fw_releasenum);

sys/dev/malo/if_malohal.c

562

hw->maxnum_wcb = le16toh(cmd->num_wcb);

sys/dev/malo/if_malohal.c

563

hw->maxnum_mcaddr = le16toh(cmd->num_mcastaddr);

sys/dev/malo/if_malohal.c

564

hw->num_antenna = le16toh(cmd->num_antenna);

sys/dev/malo/if_malohal.c

565

hw->hwversion = cmd->version;

sys/dev/malo/if_malohal.c

566

hw->hostinterface = cmd->hostif;

sys/dev/mlx4/mlx4_core/mlx4_mcg.c

774

struct mlx4_net_trans_rule_hw_ctrl *hw)

sys/dev/mlx4/mlx4_core/mlx4_mcg.c

782

hw->flags = flags;

sys/dev/mlx4/mlx4_core/mlx4_mcg.c

783

hw->type = __promisc_mode[ctrl->promisc_mode];

sys/dev/mlx4/mlx4_core/mlx4_mcg.c

784

hw->prio = cpu_to_be16(ctrl->priority);

sys/dev/mlx4/mlx4_core/mlx4_mcg.c

785

hw->port = ctrl->port;

sys/dev/mlx4/mlx4_core/mlx4_mcg.c

786

hw->qpn = cpu_to_be32(ctrl->qpn);

sys/dev/mwl/mwlhal.c

558

mwl_hal_gethwspecs(struct mwl_hal *mh0, struct mwl_hal_hwspec *hw)

sys/dev/mwl/mwlhal.c

571

IEEE80211_ADDR_COPY(hw->macAddr, pCmd->PermanentAddr);

sys/dev/mwl/mwlhal.c

572

hw->wcbBase[0] = le32toh(pCmd->WcbBase0) & 0x0000ffff;

sys/dev/mwl/mwlhal.c

573

hw->wcbBase[1] = le32toh(pCmd->WcbBase1[0]) & 0x0000ffff;

sys/dev/mwl/mwlhal.c

574

hw->wcbBase[2] = le32toh(pCmd->WcbBase1[1]) & 0x0000ffff;

sys/dev/mwl/mwlhal.c

575

hw->wcbBase[3] = le32toh(pCmd->WcbBase1[2]) & 0x0000ffff;

sys/dev/mwl/mwlhal.c

576

hw->rxDescRead = le32toh(pCmd->RxPdRdPtr)& 0x0000ffff;

sys/dev/mwl/mwlhal.c

577

hw->rxDescWrite = le32toh(pCmd->RxPdWrPtr)& 0x0000ffff;

sys/dev/mwl/mwlhal.c

578

hw->regionCode = le16toh(pCmd->RegionCode) & 0x00ff;

sys/dev/mwl/mwlhal.c

579

hw->fwReleaseNumber = le32toh(pCmd->FWReleaseNumber);

sys/dev/mwl/mwlhal.c

580

hw->maxNumWCB = le16toh(pCmd->NumOfWCB);

sys/dev/mwl/mwlhal.c

581

hw->maxNumMCAddr = le16toh(pCmd->NumOfMCastAddr);

sys/dev/mwl/mwlhal.c

582

hw->numAntennas = le16toh(pCmd->NumberOfAntenna);

sys/dev/mwl/mwlhal.c

583

hw->hwVersion = pCmd->Version;

sys/dev/mwl/mwlhal.c

584

hw->hostInterface = pCmd->HostIf;

sys/dev/mwl/mwlhal.c

586

mh->mh_revs.mh_macRev = hw->hwVersion; /* XXX */

sys/dev/mwl/mwlhal.c

587

mh->mh_revs.mh_phyRev = hw->hostInterface; /* XXX */

sys/dev/mwl/mwlhal.c

589

minrev = ((hw->fwReleaseNumber) >> 16) & 0xff;

sys/dev/netmap/netmap_bdg.c

289

netmap_bdg_detach_common(struct nm_bridge *b, int hw, int sw)

sys/dev/netmap/netmap_bdg.c

291

int s_hw = hw, s_sw = sw;

sys/dev/netmap/netmap_bdg.c

306

nm_prinf("detach %d and %d (lim %d)", hw, sw, lim);

sys/dev/netmap/netmap_bdg.c

311

for (i = 0; (hw >= 0 || sw >= 0) && i < lim; ) {

sys/dev/netmap/netmap_bdg.c

312

if (hw >= 0 && tmp[i] == hw) {

sys/dev/netmap/netmap_bdg.c

313

nm_prdis("detach hw %d at %d", hw, i);

sys/dev/netmap/netmap_bdg.c

316

tmp[lim] = hw; /* now this is inactive */

sys/dev/netmap/netmap_bdg.c

317

hw = -1;

sys/dev/netmap/netmap_bdg.c

328

if (hw >= 0 || sw >= 0) {

sys/dev/netmap/netmap_bdg.c

329

nm_prerr("delete failed hw %d sw %d, should panic...", hw, sw);

sys/dev/netmap/netmap_bdg.c

477

struct netmap_adapter *hw;

sys/dev/netmap/netmap_bdg.c

491

error = netmap_get_hw_na(ifp, nmd, &hw);

sys/dev/netmap/netmap_bdg.c

492

if (error || hw == NULL)

sys/dev/netmap/netmap_bdg.c

496

error = hw->nm_bdg_attach(nr_name, hw, b);

sys/dev/netmap/netmap_bdg.c

498

error = b->bdg_ops.bwrap_attach(nr_name, hw);

sys/dev/netmap/netmap_bdg.c

502

vpna = hw->na_vp;

sys/dev/netmap/netmap_bdg.c

503

hostna = hw->na_hostvp;

sys/dev/netmap/netmap_bdg.h

176

void netmap_bdg_detach_common(struct nm_bridge *b, int hw, int sw);

sys/dev/ocs_fc/ocs.h

126

ocs_hw_t hw;

sys/dev/ocs_fc/ocs_common.h

174

ocs_hw_t *hw; /**< pointer to HW */

sys/dev/ocs_fc/ocs_common.h

223

ocs_hw_t *hw; /**< pointer to HW */

sys/dev/ocs_fc/ocs_ddump.c

100

for (i = 0; i < hw->hw_rq_count; i++) {

sys/dev/ocs_fc/ocs_ddump.c

101

rq = hw->hw_rq[i];

sys/dev/ocs_fc/ocs_ddump.c

401

ocs_ddump_hw(ocs_textbuf_t *textbuf, ocs_hw_t *hw, uint32_t flags, uint32_t qentries)

sys/dev/ocs_fc/ocs_ddump.c

403

ocs_t *ocs = hw->os;

sys/dev/ocs_fc/ocs_ddump.c

408

uint32_t max_rpi = sli_get_max_rsrc(&hw->sli, SLI_RSRC_FCOE_RPI);

sys/dev/ocs_fc/ocs_ddump.c

415

switch(hw->sli.if_type) {

sys/dev/ocs_fc/ocs_ddump.c

418

sli_reg_read(&hw->sli, SLI4_REG_UERR_MASK_HI));

sys/dev/ocs_fc/ocs_ddump.c

420

sli_reg_read(&hw->sli, SLI4_REG_UERR_MASK_LO));

sys/dev/ocs_fc/ocs_ddump.c

422

sli_reg_read(&hw->sli, SLI4_REG_UERR_STATUS_HI));

sys/dev/ocs_fc/ocs_ddump.c

424

sli_reg_read(&hw->sli, SLI4_REG_UERR_STATUS_LO));

sys/dev/ocs_fc/ocs_ddump.c

428

sli_reg_read(&hw->sli, SLI4_REG_SLIPORT_STATUS));

sys/dev/ocs_fc/ocs_ddump.c

43

void hw_queue_ddump(ocs_textbuf_t *textbuf, ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_ddump.c

430

sli_reg_read(&hw->sli, SLI4_REG_SLIPORT_ERROR1));

sys/dev/ocs_fc/ocs_ddump.c

432

sli_reg_read(&hw->sli, SLI4_REG_SLIPORT_ERROR2));

sys/dev/ocs_fc/ocs_ddump.c

436

ocs_ddump_value(textbuf, "link_status", "%d", hw->link.status);

sys/dev/ocs_fc/ocs_ddump.c

437

ocs_ddump_value(textbuf, "link_speed", "%d", hw->link.speed);

sys/dev/ocs_fc/ocs_ddump.c

438

ocs_ddump_value(textbuf, "link_topology", "%d", hw->link.topology);

sys/dev/ocs_fc/ocs_ddump.c

439

ocs_ddump_value(textbuf, "state", "%d", hw->state);

sys/dev/ocs_fc/ocs_ddump.c

440

ocs_ddump_value(textbuf, "io_alloc_failed_count", "%d", ocs_atomic_read(&hw->io_alloc_failed_count));

sys/dev/ocs_fc/ocs_ddump.c

441

ocs_ddump_value(textbuf, "n_io", "%d", hw->config.n_io);

sys/dev/ocs_fc/ocs_ddump.c

443

ocs_ddump_value(textbuf, "queue_topology", "%s", hw->config.queue_topology);

sys/dev/ocs_fc/ocs_ddump.c

444

ocs_ddump_value(textbuf, "rq_selection_policy", "%d", hw->config.rq_selection_policy);

sys/dev/ocs_fc/ocs_ddump.c

445

ocs_ddump_value(textbuf, "rr_quanta", "%d", hw->config.rr_quanta);

sys/dev/ocs_fc/ocs_ddump.c

446

for (i = 0; i < ARRAY_SIZE(hw->config.filter_def); i++) {

sys/dev/ocs_fc/ocs_ddump.c

447

ocs_ddump_value(textbuf, "filter_def", "%08X", hw->config.filter_def[i]);

sys/dev/ocs_fc/ocs_ddump.c

449

ocs_ddump_value(textbuf, "n_eq", "%d", hw->eq_count);

sys/dev/ocs_fc/ocs_ddump.c

450

ocs_ddump_value(textbuf, "n_cq", "%d", hw->cq_count);

sys/dev/ocs_fc/ocs_ddump.c

451

ocs_ddump_value(textbuf, "n_mq", "%d", hw->mq_count);

sys/dev/ocs_fc/ocs_ddump.c

452

ocs_ddump_value(textbuf, "n_rq", "%d", hw->rq_count);

sys/dev/ocs_fc/ocs_ddump.c

453

ocs_ddump_value(textbuf, "n_wq", "%d", hw->wq_count);

sys/dev/ocs_fc/ocs_ddump.c

454

ocs_ddump_value(textbuf, "n_sgl", "%d", hw->config.n_sgl);

sys/dev/ocs_fc/ocs_ddump.c

456

ocs_ddump_sli(textbuf, &hw->sli);

sys/dev/ocs_fc/ocs_ddump.c

458

ocs_ddump_sli4_queue(textbuf, "wq", hw, hw->wq, hw->wq_count,

sys/dev/ocs_fc/ocs_ddump.c

460

ocs_ddump_sli4_queue(textbuf, "rq", hw, hw->rq, hw->rq_count,

sys/dev/ocs_fc/ocs_ddump.c

462

ocs_ddump_sli4_queue(textbuf, "mq", hw, hw->mq, hw->mq_count,

sys/dev/ocs_fc/ocs_ddump.c

464

ocs_ddump_sli4_queue(textbuf, "cq", hw, hw->cq, hw->cq_count,

sys/dev/ocs_fc/ocs_ddump.c

466

ocs_ddump_sli4_queue(textbuf, "eq", hw, hw->eq, hw->eq_count,

sys/dev/ocs_fc/ocs_ddump.c

470

for (i = 0; i < hw->wq_count; i++) {

sys/dev/ocs_fc/ocs_ddump.c

472

ocs_ddump_value(textbuf, "quarantine_index", "%d", hw->hw_wq[i]->quarantine_info.quarantine_index);

sys/dev/ocs_fc/ocs_ddump.c

474

if (hw->hw_wq[i]->quarantine_info.quarantine_ios[j] != NULL) {

sys/dev/ocs_fc/ocs_ddump.c

475

ocs_ddump_hw_io(textbuf, hw->hw_wq[i]->quarantine_info.quarantine_ios[j]);

sys/dev/ocs_fc/ocs_ddump.c

482

ocs_ddump_value(textbuf, "fwrev", "%08llx", (unsigned long long)hw->workaround.fwrev);

sys/dev/ocs_fc/ocs_ddump.c

485

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_ddump.c

487

ocs_list_foreach(&hw->io_inuse, io) {

sys/dev/ocs_fc/ocs_ddump.c

493

ocs_list_foreach(&hw->io_wait_free, io) {

sys/dev/ocs_fc/ocs_ddump.c

498

ocs_list_foreach(&hw->io_free, io) {

sys/dev/ocs_fc/ocs_ddump.c

508

ocs_ddump_value(textbuf, "sec_hio_wait_count", "%d", hw->sec_hio_wait_count);

sys/dev/ocs_fc/ocs_ddump.c

509

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_ddump.c

513

for (i = 0; i < hw->config.n_io; i++) {

sys/dev/ocs_fc/ocs_ddump.c

514

io = hw->io[i];

sys/dev/ocs_fc/ocs_ddump.c

518

if (ocs_hw_is_xri_port_owned(hw, io->indicator)) {

sys/dev/ocs_fc/ocs_ddump.c

529

if (ocs_atomic_read(&hw->rpi_ref[i].rpi_attached) ||

sys/dev/ocs_fc/ocs_ddump.c

530

ocs_atomic_read(&hw->rpi_ref[i].rpi_count) ) {

sys/dev/ocs_fc/ocs_ddump.c

532

ocs_atomic_read(&hw->rpi_ref[i].rpi_attached),

sys/dev/ocs_fc/ocs_ddump.c

533

ocs_atomic_read(&hw->rpi_ref[i].rpi_count));

sys/dev/ocs_fc/ocs_ddump.c

538

for (i = 0; i < hw->wq_count; i++) {

sys/dev/ocs_fc/ocs_ddump.c

539

ocs_ddump_value(textbuf, "wq_submit", "%d", hw->tcmd_wq_submit[i]);

sys/dev/ocs_fc/ocs_ddump.c

541

for (i = 0; i < hw->wq_count; i++) {

sys/dev/ocs_fc/ocs_ddump.c

542

ocs_ddump_value(textbuf, "wq_complete", "%d", hw->tcmd_wq_complete[i]);

sys/dev/ocs_fc/ocs_ddump.c

545

hw_queue_ddump(textbuf, hw);

sys/dev/ocs_fc/ocs_ddump.c

552

hw_queue_ddump(ocs_textbuf_t *textbuf, ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_ddump.c

562

ocs_list_foreach(&hw->eq_list, eq) {

sys/dev/ocs_fc/ocs_ddump.c

61

ocs_ddump_sli4_queue(ocs_textbuf_t *textbuf, const char *name, ocs_hw_t *hw, sli4_queue_t *q, uint32_t q_count, uint32_t qentries)

sys/dev/ocs_fc/ocs_ddump.c

742

ocs_ddump_hw(textbuf, &ocs->hw, flags, qentries);

sys/dev/ocs_fc/ocs_ddump.c

767

ocs_ddump_queue_history(textbuf, &ocs->hw.q_hist);

sys/dev/ocs_fc/ocs_device.c

185

rc = ocs_hw_node_detach(&ocs->hw, &node->rnode);

sys/dev/ocs_fc/ocs_domain.c

1047

rc = ocs_hw_domain_free(&ocs->hw, domain);

sys/dev/ocs_fc/ocs_domain.c

1170

rc = ocs_hw_domain_free(&ocs->hw, domain);

sys/dev/ocs_fc/ocs_domain.c

1289

ocs_get_wwn(ocs_hw_t *hw, ocs_hw_property_e prop)

sys/dev/ocs_fc/ocs_domain.c

1291

uint8_t *p = ocs_hw_get_ptr(hw, prop);

sys/dev/ocs_fc/ocs_domain.c

335

ocs_hw_domain_force_free(&domain->ocs->hw, domain);

sys/dev/ocs_fc/ocs_domain.c

529

my_wwpn = ocs_get_wwn(&ocs->hw, OCS_HW_WWN_PORT);

sys/dev/ocs_fc/ocs_domain.c

530

my_wwnn = ocs_get_wwn(&ocs->hw, OCS_HW_WWN_NODE);

sys/dev/ocs_fc/ocs_domain.c

560

if (ocs_hw_port_alloc(&ocs->hw, sport, NULL, (uint8_t *)&be_wwpn)) {

sys/dev/ocs_fc/ocs_domain.c

607

if (ocs_hw_domain_alloc(&ocs->hw, domain, drec->index, vlan)) {

sys/dev/ocs_fc/ocs_domain.c

790

rc = ocs_hw_domain_attach(&ocs->hw, domain, fc_id);

sys/dev/ocs_fc/ocs_domain.c

824

rc = ocs_hw_domain_free(&ocs->hw, domain);

sys/dev/ocs_fc/ocs_domain.c

981

rc = ocs_hw_domain_free(&ocs->hw, domain);

sys/dev/ocs_fc/ocs_domain.h

45

extern uint64_t ocs_get_wwn(ocs_hw_t *hw, ocs_hw_property_e prop);

sys/dev/ocs_fc/ocs_drv_fc.h

90

ocs_hw_t hw;

sys/dev/ocs_fc/ocs_els.c

2355

ocs_hw_io_free(&ocs->hw, els->hio);

sys/dev/ocs_fc/ocs_els.c

2447

ocs_hw_io_free(&ocs->hw, els->hio);

sys/dev/ocs_fc/ocs_fabric.c

1185

rc = ocs_hw_node_detach(&ocs->hw, &node->rnode);

sys/dev/ocs_fc/ocs_gendump.c

139

if (ocs_hw_raise_ue(&ocs->hw, 1) == OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_gendump.c

147

ocs_hw_get(&ocs->hw, OCS_HW_DUMP_READY, &dump_ready);

sys/dev/ocs_fc/ocs_gendump.c

160

ocs_hw_get(&ocs->hw, OCS_HW_RESET_REQUIRED, &reset_required);

sys/dev/ocs_fc/ocs_gendump.c

204

if (ocs_hw_raise_ue(&ocs->hw, FDB) == OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_gendump.c

212

ocs_hw_get(&ocs->hw, OCS_HW_DUMP_READY, &dump_ready);

sys/dev/ocs_fc/ocs_gendump.c

285

rc = ocs_hw_set_dump_location(&ocs->hw, num_buffers, dump_buffers, 0);

sys/dev/ocs_fc/ocs_gendump.c

356

rc = ocs_hw_set_dump_location(&ocs->hw, num_buffers, dump_buffers, 1);

sys/dev/ocs_fc/ocs_gendump.c

53

if (ocs_hw_reset(&ocs->hw, OCS_HW_RESET_FUNCTION)) {

sys/dev/ocs_fc/ocs_gendump.c

65

if (ocs_hw_init(&ocs->hw)) {

sys/dev/ocs_fc/ocs_hw.c

100

static ocs_hw_rtn_e ocs_hw_exec_dmtf_clp_cmd(ocs_hw_t *hw, ocs_dma_t *dma_cmd, ocs_dma_t *dma_resp, uint32_t opts, ocs_hw_dmtf_clp_cb_t cb, void *arg);

sys/dev/ocs_fc/ocs_hw.c

1000

ocs_log_err(hw->os, "ocs_hw_io_alloc for send_frame_io failed\n");

sys/dev/ocs_fc/ocs_hw.c

10013

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

10020

if (sli_resource_free(&hw->sli, SLI_RSRC_FCOE_VPI, sport->indicator)) {

sys/dev/ocs_fc/ocs_hw.c

10021

ocs_log_err(hw->os, "FCOE_VPI free failure addr=%#x\n", sport->fc_id);

sys/dev/ocs_fc/ocs_hw.c

10026

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

10028

if (hw->callback.port != NULL) {

sys/dev/ocs_fc/ocs_hw.c

10029

hw->callback.port(hw->args.port,

sys/dev/ocs_fc/ocs_hw.c

10044

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

1005

ocs_atomic_init(&hw->send_frame_seq_id, 0);

sys/dev/ocs_fc/ocs_hw.c

10051

sli_resource_free(&hw->sli, SLI_RSRC_FCOE_VPI, sport->indicator);

sys/dev/ocs_fc/ocs_hw.c

10055

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

10058

if (hw->callback.port != NULL) {

sys/dev/ocs_fc/ocs_hw.c

10059

hw->callback.port(hw->args.port,

sys/dev/ocs_fc/ocs_hw.c

10078

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

1008

hw->expiration_logged = 0;

sys/dev/ocs_fc/ocs_hw.c

10086

cmd = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

1009

if(hw->watchdog_timeout) {

sys/dev/ocs_fc/ocs_hw.c

10092

if (0 == sli_cmd_unreg_vpi(&hw->sli, cmd, SLI4_BMBX_SIZE, sport->indicator,

sys/dev/ocs_fc/ocs_hw.c

10094

ocs_log_err(hw->os, "UNREG_VPI format failure\n");

sys/dev/ocs_fc/ocs_hw.c

10095

ocs_free(hw->os, cmd, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

101

static void ocs_hw_linkcfg_dmtf_clp_cb(ocs_hw_t *hw, int32_t status, uint32_t result_len, void *arg);

sys/dev/ocs_fc/ocs_hw.c

1010

if((hw->watchdog_timeout < 1) || (hw->watchdog_timeout > 65534)) {

sys/dev/ocs_fc/ocs_hw.c

10100

if (ocs_hw_command(hw, cmd, OCS_CMD_NOWAIT, __ocs_hw_port_cb, sport)) {

sys/dev/ocs_fc/ocs_hw.c

10101

ocs_log_err(hw->os, "UNREG_VPI command failure\n");

sys/dev/ocs_fc/ocs_hw.c

10102

ocs_free(hw->os, cmd, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

1011

ocs_log_err(hw->os, "watchdog_timeout out of range: Valid range is 1 - 65534\n");

sys/dev/ocs_fc/ocs_hw.c

1012

}else if(!ocs_hw_config_watchdog_timer(hw)) {

sys/dev/ocs_fc/ocs_hw.c

10125

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

1013

ocs_log_info(hw->os, "watchdog timer configured with timeout = %d seconds \n", hw->watchdog_timeout);

sys/dev/ocs_fc/ocs_hw.c

10132

if (ocs_hw_async_call(hw, __ocs_hw_port_realloc_cb, sport)) {

sys/dev/ocs_fc/ocs_hw.c

10133

ocs_log_err(hw->os, "ocs_hw_async_call failed\n");

sys/dev/ocs_fc/ocs_hw.c

10153

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

10160

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

10162

if (hw->callback.port != NULL) {

sys/dev/ocs_fc/ocs_hw.c

10163

hw->callback.port(hw->args.port,

sys/dev/ocs_fc/ocs_hw.c

1017

if (ocs_dma_alloc(hw->os, &hw->domain_dmem, 112, 4)) {

sys/dev/ocs_fc/ocs_hw.c

1018

ocs_log_err(hw->os, "domain node memory allocation fail\n");

sys/dev/ocs_fc/ocs_hw.c

10186

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

10192

if (0 == sli_cmd_reg_vpi(&hw->sli, data, SLI4_BMBX_SIZE, sport, FALSE)) {

sys/dev/ocs_fc/ocs_hw.c

10193

ocs_log_err(hw->os, "REG_VPI format failure\n");

sys/dev/ocs_fc/ocs_hw.c

10198

if (ocs_hw_command(hw, data, OCS_CMD_NOWAIT, __ocs_hw_port_cb, sport)) {

sys/dev/ocs_fc/ocs_hw.c

10199

ocs_log_err(hw->os, "REG_VPI command failure\n");

sys/dev/ocs_fc/ocs_hw.c

1022

if (ocs_dma_alloc(hw->os, &hw->fcf_dmem, OCS_HW_READ_FCF_SIZE, OCS_HW_READ_FCF_SIZE)) {

sys/dev/ocs_fc/ocs_hw.c

10226

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

1023

ocs_log_err(hw->os, "domain fcf memory allocation fail\n");

sys/dev/ocs_fc/ocs_hw.c

10233

sli_resource_free(&hw->sli, SLI_RSRC_FCOE_VPI, sport->indicator);

sys/dev/ocs_fc/ocs_hw.c

10237

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

10252

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

10259

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

10261

if (hw->callback.port != NULL) {

sys/dev/ocs_fc/ocs_hw.c

10262

hw->callback.port(hw->args.port,

sys/dev/ocs_fc/ocs_hw.c

1027

if ((0 == hw->loop_map.size) && ocs_dma_alloc(hw->os, &hw->loop_map,

sys/dev/ocs_fc/ocs_hw.c

10280

if (SLI4_IF_TYPE_LANCER_FC_ETH == sli_get_if_type(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

1029

ocs_log_err(hw->os, "Loop dma alloc failed size:%d \n", hw->loop_map.size);

sys/dev/ocs_fc/ocs_hw.c

10306

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

10313

sli_resource_free(&hw->sli, SLI_RSRC_FCOE_VPI, sport->indicator);

sys/dev/ocs_fc/ocs_hw.c

10317

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

10320

if (hw->callback.port != NULL) {

sys/dev/ocs_fc/ocs_hw.c

10321

hw->callback.port(hw->args.port,

sys/dev/ocs_fc/ocs_hw.c

10342

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

10350

if (ocs_dma_alloc(hw->os, &sport->dma, 112, 4)) {

sys/dev/ocs_fc/ocs_hw.c

10351

ocs_log_err(hw->os, "Failed to allocate DMA memory\n");

sys/dev/ocs_fc/ocs_hw.c

10356

if (0 == sli_cmd_read_sparm64(&hw->sli, data, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

10358

ocs_log_err(hw->os, "READ_SPARM64 allocation failure\n");

sys/dev/ocs_fc/ocs_hw.c

10359

ocs_dma_free(hw->os, &sport->dma);

sys/dev/ocs_fc/ocs_hw.c

10364

if (ocs_hw_command(hw, data, OCS_CMD_NOWAIT, __ocs_hw_port_cb, sport)) {

sys/dev/ocs_fc/ocs_hw.c

10365

ocs_log_err(hw->os, "READ_SPARM64 command failure\n");

sys/dev/ocs_fc/ocs_hw.c

10366

ocs_dma_free(hw->os, &sport->dma);

sys/dev/ocs_fc/ocs_hw.c

10381

ocs_dma_free(hw->os, &sport->dma);

sys/dev/ocs_fc/ocs_hw.c

10385

ocs_dma_free(hw->os, &sport->dma);

sys/dev/ocs_fc/ocs_hw.c

10435

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

10452

if (0 == sli_cmd_init_vpi(&hw->sli, data, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

10454

ocs_log_err(hw->os, "INIT_VPI allocation failure\n");

sys/dev/ocs_fc/ocs_hw.c

10459

if (ocs_hw_command(hw, data, OCS_CMD_NOWAIT, __ocs_hw_port_cb, sport)) {

sys/dev/ocs_fc/ocs_hw.c

1046

ocs_hw_config_mrq(ocs_hw_t *hw, uint8_t mode, uint16_t vlanid, uint16_t fcf_index)

sys/dev/ocs_fc/ocs_hw.c

10460

ocs_log_err(hw->os, "INIT_VPI command failure\n");

sys/dev/ocs_fc/ocs_hw.c

10486

__ocs_hw_port_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

10493

ocs_log_debug(hw->os, "bad status vpi=%#x st=%x hdr=%x\n",

sys/dev/ocs_fc/ocs_hw.c

10506

__ocs_hw_port_realloc_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

10514

ocs_log_debug(hw->os, "bad status vpi=%#x st=%x hdr=%x\n",

sys/dev/ocs_fc/ocs_hw.c

10525

mqecpy = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

10527

ocs_log_err(hw->os, "malloc mqecpy failed\n");

sys/dev/ocs_fc/ocs_hw.c

10545

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10555

ocs_log_test(hw->os, "%s %-20s not handled\n", funcname, ocs_sm_event_name(evt));

sys/dev/ocs_fc/ocs_hw.c

10566

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10574

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

10577

sli_resource_free(&hw->sli, SLI_RSRC_FCOE_VFI, domain->indicator);

sys/dev/ocs_fc/ocs_hw.c

10580

if (hw->callback.domain != NULL) {

sys/dev/ocs_fc/ocs_hw.c

10581

hw->callback.domain(hw->args.domain,

sys/dev/ocs_fc/ocs_hw.c

10598

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10605

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

10609

if (hw->callback.domain != NULL) {

sys/dev/ocs_fc/ocs_hw.c

10610

hw->callback.domain(hw->args.domain,

sys/dev/ocs_fc/ocs_hw.c

1062

rq_filter[i].r_ctl_mask = (uint8_t) hw->config.filter_def[i];

sys/dev/ocs_fc/ocs_hw.c

1063

rq_filter[i].r_ctl_match = (uint8_t) (hw->config.filter_def[i] >> 8);

sys/dev/ocs_fc/ocs_hw.c

10630

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10637

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

1064

rq_filter[i].type_mask = (uint8_t) (hw->config.filter_def[i] >> 16);

sys/dev/ocs_fc/ocs_hw.c

10640

sli_resource_free(&hw->sli, SLI_RSRC_FCOE_VFI, domain->indicator);

sys/dev/ocs_fc/ocs_hw.c

10643

if (hw->callback.domain != NULL) {

sys/dev/ocs_fc/ocs_hw.c

10644

hw->callback.domain(hw->args.domain,

sys/dev/ocs_fc/ocs_hw.c

1065

rq_filter[i].type_match = (uint8_t) (hw->config.filter_def[i] >> 24);

sys/dev/ocs_fc/ocs_hw.c

10663

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10672

if (0 == sli_cmd_reg_vfi(&hw->sli, data, SLI4_BMBX_SIZE, domain)) {

sys/dev/ocs_fc/ocs_hw.c

10673

ocs_log_err(hw->os, "REG_VFI format failure\n");

sys/dev/ocs_fc/ocs_hw.c

10678

if (ocs_hw_command(hw, data, OCS_CMD_NOWAIT, __ocs_hw_domain_cb, domain)) {

sys/dev/ocs_fc/ocs_hw.c

10679

ocs_log_err(hw->os, "REG_VFI command failure\n");

sys/dev/ocs_fc/ocs_hw.c

1069

for (i = 0; i < hw->hw_rq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

1070

rq = hw->hw_rq[i];

sys/dev/ocs_fc/ocs_hw.c

10702

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10709

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

10712

ocs_hw_domain_add(hw, domain);

sys/dev/ocs_fc/ocs_hw.c

10715

if (hw->callback.domain != NULL) {

sys/dev/ocs_fc/ocs_hw.c

10716

hw->callback.domain(hw->args.domain,

sys/dev/ocs_fc/ocs_hw.c

10726

if (SLI4_IF_TYPE_BE3_SKH_PF == sli_get_if_type(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

10744

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10750

if (0 == sli_cmd_read_sparm64(&hw->sli, data, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

10752

ocs_log_err(hw->os, "READ_SPARM64 format failure\n");

sys/dev/ocs_fc/ocs_hw.c

10757

if (ocs_hw_command(hw, data, OCS_CMD_NOWAIT, __ocs_hw_domain_cb, domain)) {

sys/dev/ocs_fc/ocs_hw.c

10758

ocs_log_err(hw->os, "READ_SPARM64 command failure\n");

sys/dev/ocs_fc/ocs_hw.c

1076

ocs_log_err(hw->os, "Wrong queue topology.\n");

sys/dev/ocs_fc/ocs_hw.c

10786

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10792

if (0 == sli_cmd_init_vfi(&hw->sli, data, SLI4_BMBX_SIZE, domain->indicator,

sys/dev/ocs_fc/ocs_hw.c

10794

ocs_log_err(hw->os, "INIT_VFI format failure\n");

sys/dev/ocs_fc/ocs_hw.c

10798

if (ocs_hw_command(hw, data, OCS_CMD_NOWAIT, __ocs_hw_domain_cb, domain)) {

sys/dev/ocs_fc/ocs_hw.c

10799

ocs_log_err(hw->os, "INIT_VFI command failure\n");

sys/dev/ocs_fc/ocs_hw.c

10824

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10836

rq_cfg[i].r_ctl_mask = (uint8_t) hw->config.filter_def[i];

sys/dev/ocs_fc/ocs_hw.c

10837

rq_cfg[i].r_ctl_match = (uint8_t) (hw->config.filter_def[i] >> 8);

sys/dev/ocs_fc/ocs_hw.c

10838

rq_cfg[i].type_mask = (uint8_t) (hw->config.filter_def[i] >> 16);

sys/dev/ocs_fc/ocs_hw.c

10839

rq_cfg[i].type_match = (uint8_t) (hw->config.filter_def[i] >> 24);

sys/dev/ocs_fc/ocs_hw.c

10843

for (i = 0; i < hw->hw_rq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

10845

ocs_log_warn(hw->os, "more RQs than REG_FCFI filter entries\n");

sys/dev/ocs_fc/ocs_hw.c

10848

rq_cfg[i].rq_id = hw->hw_rq[i]->hdr->id;

sys/dev/ocs_fc/ocs_hw.c

10856

if (hw->hw_mrq_count) {

sys/dev/ocs_fc/ocs_hw.c

10857

if (OCS_HW_RTN_SUCCESS != ocs_hw_config_mrq(hw, SLI4_CMD_REG_FCFI_SET_FCFI_MODE,

sys/dev/ocs_fc/ocs_hw.c

10859

ocs_log_err(hw->os, "REG_FCFI_MRQ format failure\n");

sys/dev/ocs_fc/ocs_hw.c

10865

if (0 == sli_cmd_reg_fcfi(&hw->sli, data, SLI4_BMBX_SIZE, domain->fcf,

sys/dev/ocs_fc/ocs_hw.c

10867

ocs_log_err(hw->os, "REG_FCFI format failure\n");

sys/dev/ocs_fc/ocs_hw.c

10873

if (ocs_hw_command(hw, data, OCS_CMD_NOWAIT, __ocs_hw_domain_cb, domain)) {

sys/dev/ocs_fc/ocs_hw.c

10874

ocs_log_err(hw->os, "REG_FCFI command failure\n");

sys/dev/ocs_fc/ocs_hw.c

10895

if (SLI4_IF_TYPE_BE3_SKH_PF == sli_get_if_type(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

10916

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10922

if (sli_get_medium(&hw->sli) == SLI_LINK_MEDIUM_FC) {

sys/dev/ocs_fc/ocs_hw.c

10927

domain->fcf_indicator = hw->fcf_indicator;

sys/dev/ocs_fc/ocs_hw.c

1094

rc = sli_cmd_reg_fcfi_mrq(&hw->sli,

sys/dev/ocs_fc/ocs_hw.c

10951

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10953

ocs_hw_domain_del(hw, domain);

sys/dev/ocs_fc/ocs_hw.c

10955

if (hw->callback.domain != NULL) {

sys/dev/ocs_fc/ocs_hw.c

10956

hw->callback.domain(hw->args.domain,

sys/dev/ocs_fc/ocs_hw.c

10964

ocs_free(domain != NULL ? domain->hw->os : NULL, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

10988

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

10991

sli_resource_free(&hw->sli, SLI_RSRC_FCOE_VFI,

sys/dev/ocs_fc/ocs_hw.c

10994

ocs_hw_domain_del(hw, domain);

sys/dev/ocs_fc/ocs_hw.c

10997

if (hw->callback.domain != NULL) {

sys/dev/ocs_fc/ocs_hw.c

10998

hw->callback.domain(hw->args.domain,

sys/dev/ocs_fc/ocs_hw.c

1100

hw->config.rq_selection_policy, /* RQ selection policy*/

sys/dev/ocs_fc/ocs_hw.c

1102

hw->hw_mrq_count, /* num_mrqs */

sys/dev/ocs_fc/ocs_hw.c

11021

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

11028

if (hw->state == OCS_HW_STATE_TEARDOWN_IN_PROGRESS) {

sys/dev/ocs_fc/ocs_hw.c

11032

if (0 == sli_cmd_fcoe_rediscover_fcf(&hw->sli, data, SLI4_BMBX_SIZE, domain->fcf)) {

sys/dev/ocs_fc/ocs_hw.c

11033

ocs_log_err(hw->os, "REDISCOVER_FCF format failure\n");

sys/dev/ocs_fc/ocs_hw.c

11038

if (ocs_hw_command(hw, data, OCS_CMD_NOWAIT, __ocs_hw_domain_cb, domain)) {

sys/dev/ocs_fc/ocs_hw.c

11039

ocs_log_err(hw->os, "REDISCOVER_FCF command failure\n");

sys/dev/ocs_fc/ocs_hw.c

1105

ocs_log_err(hw->os, "sli_cmd_reg_fcfi_mrq() failed: %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

11062

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

11069

data = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

11076

if (0 == sli_cmd_unreg_fcfi(&hw->sli, data, SLI4_BMBX_SIZE, domain->fcf_indicator)) {

sys/dev/ocs_fc/ocs_hw.c

11077

ocs_log_err(hw->os, "UNREG_FCFI format failure\n");

sys/dev/ocs_fc/ocs_hw.c

11078

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

11083

if (ocs_hw_command(hw, data, OCS_CMD_NOWAIT, __ocs_hw_domain_cb, domain)) {

sys/dev/ocs_fc/ocs_hw.c

11084

ocs_log_err(hw->os, "UNREG_FCFI command failure\n");

sys/dev/ocs_fc/ocs_hw.c

11085

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

1109

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

111

static ocs_hw_rtn_e ocs_hw_set_eth_license(ocs_hw_t *hw, uint32_t license);

sys/dev/ocs_fc/ocs_hw.c

11115

ocs_hw_t *hw = domain->hw;

sys/dev/ocs_fc/ocs_hw.c

11120

is_fc = (sli_get_medium(&hw->sli) == SLI_LINK_MEDIUM_FC);

sys/dev/ocs_fc/ocs_hw.c

11125

data = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

11132

if (0 == sli_cmd_unreg_vfi(&hw->sli, data, SLI4_BMBX_SIZE, domain,

sys/dev/ocs_fc/ocs_hw.c

11134

ocs_log_err(hw->os, "UNREG_VFI format failure\n");

sys/dev/ocs_fc/ocs_hw.c

11135

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

1114

ocs_log_err(hw->os, "FCFI MRQ registration failed. cmd = %x status = %x\n",

sys/dev/ocs_fc/ocs_hw.c

11140

if (ocs_hw_command(hw, data, OCS_CMD_NOWAIT, __ocs_hw_domain_cb, domain)) {

sys/dev/ocs_fc/ocs_hw.c

11141

ocs_log_err(hw->os, "UNREG_VFI command failure\n");

sys/dev/ocs_fc/ocs_hw.c

11142

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

11171

__ocs_hw_domain_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

11178

ocs_log_debug(hw->os, "bad status vfi=%#x st=%x hdr=%x\n",

sys/dev/ocs_fc/ocs_hw.c

11191

target_wqe_timer_nop_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

112

static ocs_hw_rtn_e ocs_hw_set_dif_seed(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.c

1120

hw->fcf_indicator = rsp->fcfi;

sys/dev/ocs_fc/ocs_hw.c

11201

ocs_log_debug(hw->os, "bad status st=%x hdr=%x\n",

sys/dev/ocs_fc/ocs_hw.c

11207

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

11208

ocs_list_foreach_safe(&hw->io_timed_wqe, io, io_next) {

sys/dev/ocs_fc/ocs_hw.c

11217

ocs_log_info(hw->os, "IO timeout xri=0x%x tag=0x%x type=%d elapsed time:%u\n",

sys/dev/ocs_fc/ocs_hw.c

11221

ocs_list_remove(&hw->io_timed_wqe, io);

sys/dev/ocs_fc/ocs_hw.c

11230

rc = ocs_hw_io_abort(hw, io, TRUE, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

11232

ocs_log_test(hw->os,

sys/dev/ocs_fc/ocs_hw.c

11242

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

11245

if (!hw->active_wqe_timer_shutdown) {

sys/dev/ocs_fc/ocs_hw.c

11246

ocs_setup_timer(hw->os, &hw->wqe_timer, target_wqe_timer_cb, hw, OCS_HW_WQ_TIMER_PERIOD_MS);

sys/dev/ocs_fc/ocs_hw.c

11248

hw->in_active_wqe_timer = FALSE;

sys/dev/ocs_fc/ocs_hw.c

11255

ocs_hw_t *hw = (ocs_hw_t *)arg;

sys/dev/ocs_fc/ocs_hw.c

11258

hw->in_active_wqe_timer = TRUE;

sys/dev/ocs_fc/ocs_hw.c

11261

if (ocs_hw_async_call(hw, target_wqe_timer_nop_cb, hw)) {

sys/dev/ocs_fc/ocs_hw.c

11262

ocs_log_test(hw->os, "ocs_hw_async_call failed\n");

sys/dev/ocs_fc/ocs_hw.c

11267

shutdown_target_wqe_timer(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

11271

if (hw->config.emulate_wqe_timeout) {

sys/dev/ocs_fc/ocs_hw.c

11273

hw->active_wqe_timer_shutdown = TRUE;

sys/dev/ocs_fc/ocs_hw.c

11276

ocs_del_timer(&hw->wqe_timer);

sys/dev/ocs_fc/ocs_hw.c

11279

while (hw->in_active_wqe_timer && iters) {

sys/dev/ocs_fc/ocs_hw.c

11284

ocs_hw_flush(hw);

sys/dev/ocs_fc/ocs_hw.c

11289

ocs_log_test(hw->os, "Failed to shutdown active wqe timer\n");

sys/dev/ocs_fc/ocs_hw.c

113

static ocs_hw_rtn_e ocs_hw_set_dif_mode(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.c

11306

ocs_hw_is_io_port_owned(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

11325

ocs_hw_is_xri_port_owned(ocs_hw_t *hw, uint32_t xri)

sys/dev/ocs_fc/ocs_hw.c

11327

ocs_hw_io_t *io = ocs_hw_io_lookup(hw, xri);

sys/dev/ocs_fc/ocs_hw.c

11342

ocs_hw_reclaim_xri(ocs_hw_t *hw, uint16_t xri_base, uint16_t xri_count)

sys/dev/ocs_fc/ocs_hw.c

11348

io = ocs_hw_io_lookup(hw, xri_base + i);

sys/dev/ocs_fc/ocs_hw.c

11354

if (hw->auto_xfer_rdy_enabled) {

sys/dev/ocs_fc/ocs_hw.c

11355

ocs_hw_rqpair_auto_xfer_rdy_move_to_host(hw, io);

sys/dev/ocs_fc/ocs_hw.c

11358

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

11359

ocs_list_remove(&hw->io_port_owned, io);

sys/dev/ocs_fc/ocs_hw.c

11361

ocs_list_add_tail(&hw->io_free, io);

sys/dev/ocs_fc/ocs_hw.c

11362

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

1137

ocs_hw_t *hw = (ocs_hw_t *)arg;

sys/dev/ocs_fc/ocs_hw.c

11380

ocs_hw_cb_post_xri(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

11386

ocs_log_debug(hw->os, "Status 0x%x for XRI base 0x%x, cnt =x%x\n",

sys/dev/ocs_fc/ocs_hw.c

11388

ocs_hw_reclaim_xri(hw, post_xri->xri_base, post_xri->xri_count);

sys/dev/ocs_fc/ocs_hw.c

1139

hw->linkcfg = (ocs_hw_linkcfg_e)value;

sys/dev/ocs_fc/ocs_hw.c

11391

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

11406

ocs_hw_post_xri(ocs_hw_t *hw, uint32_t xri_start, uint32_t num_to_post)

sys/dev/ocs_fc/ocs_hw.c

1141

hw->linkcfg = OCS_HW_LINKCFG_NA;

sys/dev/ocs_fc/ocs_hw.c

11412

post_xri = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

11414

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

11419

if (sli_cmd_post_xri(&hw->sli, post_xri, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

11421

rc = ocs_hw_command(hw, post_xri, OCS_CMD_NOWAIT, ocs_hw_cb_post_xri, NULL);

sys/dev/ocs_fc/ocs_hw.c

11423

ocs_free(hw->os, post_xri, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

11424

ocs_log_err(hw->os, "post_xri failed\n");

sys/dev/ocs_fc/ocs_hw.c

1143

ocs_log_debug(hw->os, "linkcfg=%d\n", hw->linkcfg);

sys/dev/ocs_fc/ocs_hw.c

11443

ocs_hw_xri_move_to_port_owned(ocs_hw_t *hw, uint32_t num_xri)

sys/dev/ocs_fc/ocs_hw.c

11454

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

11457

if (NULL != (io = ocs_list_remove_head(&hw->io_free))) {

sys/dev/ocs_fc/ocs_hw.c

11466

if (hw->auto_xfer_rdy_enabled) {

sys/dev/ocs_fc/ocs_hw.c

11468

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

11469

rc = ocs_hw_rqpair_auto_xfer_rdy_move_to_port(hw, io);

sys/dev/ocs_fc/ocs_hw.c

11470

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

11472

ocs_list_add_head(&hw->io_free, io);

sys/dev/ocs_fc/ocs_hw.c

11476

ocs_lock_init(hw->os, &io->axr_lock, "HW_axr_lock[%d]", io->indicator);

sys/dev/ocs_fc/ocs_hw.c

11478

ocs_list_add_tail(&hw->io_port_owned, io);

sys/dev/ocs_fc/ocs_hw.c

11481

if (ocs_hw_post_xri(hw, io->indicator, 1) != OCS_HW_RTN_SUCCESS ) {

sys/dev/ocs_fc/ocs_hw.c

11482

ocs_hw_reclaim_xri(hw, io->indicator, i);

sys/dev/ocs_fc/ocs_hw.c

11491

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

11510

ocs_hw_cb_release_xri(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

11517

ocs_log_err(hw->os, "Status 0x%x\n", status);

sys/dev/ocs_fc/ocs_hw.c

11522

ocs_hw_reclaim_xri(hw, xri, 1);

sys/dev/ocs_fc/ocs_hw.c

11526

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

11542

ocs_hw_xri_move_to_host_owned(ocs_hw_t *hw, uint8_t num_xri)

sys/dev/ocs_fc/ocs_hw.c

11548

release_xri = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

11550

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

11555

if (sli_cmd_release_xri(&hw->sli, release_xri, SLI4_BMBX_SIZE, num_xri)) {

sys/dev/ocs_fc/ocs_hw.c

11556

rc = ocs_hw_command(hw, release_xri, OCS_CMD_NOWAIT, ocs_hw_cb_release_xri, NULL);

sys/dev/ocs_fc/ocs_hw.c

11558

ocs_log_err(hw->os, "release_xri failed\n");

sys/dev/ocs_fc/ocs_hw.c

11563

ocs_free(hw->os, release_xri, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

11582

ocs_hw_rx_buffer_alloc(ocs_hw_t *hw, uint32_t rqindex, uint32_t count, uint32_t size)

sys/dev/ocs_fc/ocs_hw.c

11584

ocs_t *ocs = hw->os;

sys/dev/ocs_fc/ocs_hw.c

1159

ocs_hw_teardown(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

11590

rq_buf = ocs_malloc(hw->os, sizeof(*rq_buf) * count, OCS_M_NOWAIT | OCS_M_ZERO);

sys/dev/ocs_fc/ocs_hw.c

11592

ocs_log_err(hw->os, "Failure to allocate unsolicited DMA trackers\n");

sys/dev/ocs_fc/ocs_hw.c

11599

ocs_log_err(hw->os, "DMA allocation failed\n");

sys/dev/ocs_fc/ocs_hw.c

116

static ocs_hw_rtn_e ocs_hw_config_auto_xfer_rdy_t10pi(ocs_hw_t *hw, uint8_t *buf);

sys/dev/ocs_fc/ocs_hw.c

11600

ocs_free(hw->os, rq_buf, sizeof(*rq_buf) * count);

sys/dev/ocs_fc/ocs_hw.c

11622

ocs_hw_rx_buffer_free(ocs_hw_t *hw, ocs_hw_rq_buffer_t *rq_buf, uint32_t count)

sys/dev/ocs_fc/ocs_hw.c

11624

ocs_t *ocs = hw->os;

sys/dev/ocs_fc/ocs_hw.c

11632

ocs_free(hw->os, rq_buf, sizeof(*rq_buf) * count);

sys/dev/ocs_fc/ocs_hw.c

11644

ocs_hw_rx_allocate(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

11646

ocs_t *ocs = hw->os;

sys/dev/ocs_fc/ocs_hw.c

11652

uint32_t payload_size = hw->config.rq_default_buffer_size;

sys/dev/ocs_fc/ocs_hw.c

11656

for (i = 0; i < hw->hw_rq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

11657

rq = hw->hw_rq[i];

sys/dev/ocs_fc/ocs_hw.c

11660

rq->hdr_buf = ocs_hw_rx_buffer_alloc(hw, rqindex, rq->entry_count, hdr_size);

sys/dev/ocs_fc/ocs_hw.c

11667

ocs_log_debug(hw->os, "rq[%2d] rq_id %02d header %4d by %4d bytes\n", i, rq->hdr->id,

sys/dev/ocs_fc/ocs_hw.c

1167

if (!hw) {

sys/dev/ocs_fc/ocs_hw.c

11673

rq->payload_buf = ocs_hw_rx_buffer_alloc(hw, rqindex, rq->entry_count, payload_size);

sys/dev/ocs_fc/ocs_hw.c

11679

ocs_log_debug(hw->os, "rq[%2d] rq_id %02d default %4d by %4d bytes\n", i, rq->data->id,

sys/dev/ocs_fc/ocs_hw.c

1168

ocs_log_err(NULL, "bad parameter(s) hw=%p\n", hw);

sys/dev/ocs_fc/ocs_hw.c

11695

ocs_hw_rx_post(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

117

static ocs_hw_rtn_e ocs_hw_config_set_fdt_xfer_hint(ocs_hw_t *hw, uint32_t fdt_xfer_hint);

sys/dev/ocs_fc/ocs_hw.c

11706

for (rq_idx = 0, idx = 0; rq_idx < hw->hw_rq_count; rq_idx++) {

sys/dev/ocs_fc/ocs_hw.c

11707

hw_rq_t *rq = hw->hw_rq[rq_idx];

sys/dev/ocs_fc/ocs_hw.c

11710

ocs_hw_sequence_t *seq = ocs_array_get(hw->seq_pool, idx++);

sys/dev/ocs_fc/ocs_hw.c

11717

rc = ocs_hw_sequence_free(hw, seq);

sys/dev/ocs_fc/ocs_hw.c

1172

destroy_queues = (hw->state == OCS_HW_STATE_ACTIVE);

sys/dev/ocs_fc/ocs_hw.c

1173

free_memory = (hw->state != OCS_HW_STATE_UNINITIALIZED);

sys/dev/ocs_fc/ocs_hw.c

11737

ocs_hw_rx_free(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

11743

for (i = 0; i < hw->hw_rq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

11744

rq = hw->hw_rq[i];

sys/dev/ocs_fc/ocs_hw.c

11746

ocs_hw_rx_buffer_free(hw, rq->hdr_buf, rq->entry_count);

sys/dev/ocs_fc/ocs_hw.c

11748

ocs_hw_rx_buffer_free(hw, rq->payload_buf, rq->entry_count);

sys/dev/ocs_fc/ocs_hw.c

1176

shutdown_target_wqe_timer(hw);

sys/dev/ocs_fc/ocs_hw.c

11778

ocs_hw_async_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

11784

(*ctx->callback)(hw, status, mqe, ctx->arg);

sys/dev/ocs_fc/ocs_hw.c

11786

ocs_free(hw->os, ctx, sizeof(*ctx));

sys/dev/ocs_fc/ocs_hw.c

1179

if(hw->watchdog_timeout) {

sys/dev/ocs_fc/ocs_hw.c

1180

hw->watchdog_timeout = 0;

sys/dev/ocs_fc/ocs_hw.c

11804

ocs_hw_async_call(ocs_hw_t *hw, ocs_hw_async_cb_t callback, void *arg)

sys/dev/ocs_fc/ocs_hw.c

1181

ocs_hw_config_watchdog_timer(hw);

sys/dev/ocs_fc/ocs_hw.c

11813

ctx = ocs_malloc(hw->os, sizeof(*ctx), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

11815

ocs_log_err(hw->os, "failed to malloc async call context\n");

sys/dev/ocs_fc/ocs_hw.c

11822

if (sli_cmd_common_nop(&hw->sli, ctx->cmd, sizeof(ctx->cmd), 0) == 0) {

sys/dev/ocs_fc/ocs_hw.c

11823

ocs_log_err(hw->os, "COMMON_NOP format failure\n");

sys/dev/ocs_fc/ocs_hw.c

11824

ocs_free(hw->os, ctx, sizeof(*ctx));

sys/dev/ocs_fc/ocs_hw.c

11828

if (ocs_hw_command(hw, ctx->cmd, OCS_CMD_NOWAIT, ocs_hw_async_cb, ctx)) {

sys/dev/ocs_fc/ocs_hw.c

11829

ocs_log_err(hw->os, "COMMON_NOP command failure\n");

sys/dev/ocs_fc/ocs_hw.c

11830

ocs_free(hw->os, ctx, sizeof(*ctx));

sys/dev/ocs_fc/ocs_hw.c

11847

ocs_hw_reqtag_init(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

11849

if (hw->wq_reqtag_pool == NULL) {

sys/dev/ocs_fc/ocs_hw.c

1185

if(hw->sliport_healthcheck) {

sys/dev/ocs_fc/ocs_hw.c

11850

hw->wq_reqtag_pool = ocs_pool_alloc(hw->os, sizeof(hw_wq_callback_t), 65536, TRUE);

sys/dev/ocs_fc/ocs_hw.c

11851

if (hw->wq_reqtag_pool == NULL) {

sys/dev/ocs_fc/ocs_hw.c

11852

ocs_log_err(hw->os, "ocs_pool_alloc hw_wq_callback_t failed\n");

sys/dev/ocs_fc/ocs_hw.c

11856

ocs_hw_reqtag_reset(hw);

sys/dev/ocs_fc/ocs_hw.c

1186

hw->sliport_healthcheck = 0;

sys/dev/ocs_fc/ocs_hw.c

1187

ocs_hw_config_sli_port_health_check(hw, 0, 0);

sys/dev/ocs_fc/ocs_hw.c

11872

ocs_hw_reqtag_alloc(ocs_hw_t *hw, void (*callback)(void *arg, uint8_t *cqe, int32_t status), void *arg)

sys/dev/ocs_fc/ocs_hw.c

11878

wqcb = ocs_pool_get(hw->wq_reqtag_pool);

sys/dev/ocs_fc/ocs_hw.c

11898

ocs_hw_reqtag_free(ocs_hw_t *hw, hw_wq_callback_t *wqcb)

sys/dev/ocs_fc/ocs_hw.c

119

static int32_t ocs_hw_config_mrq(ocs_hw_t *hw, uint8_t, uint16_t, uint16_t);

sys/dev/ocs_fc/ocs_hw.c

1190

if (hw->state != OCS_HW_STATE_QUEUES_ALLOCATED) {

sys/dev/ocs_fc/ocs_hw.c

11903

ocs_pool_put(hw->wq_reqtag_pool, wqcb);

sys/dev/ocs_fc/ocs_hw.c

1191

hw->state = OCS_HW_STATE_TEARDOWN_IN_PROGRESS;

sys/dev/ocs_fc/ocs_hw.c

11918

ocs_hw_reqtag_get_instance(ocs_hw_t *hw, uint32_t instance_index)

sys/dev/ocs_fc/ocs_hw.c

11922

wqcb = ocs_pool_get_instance(hw->wq_reqtag_pool, instance_index);

sys/dev/ocs_fc/ocs_hw.c

11924

ocs_log_err(hw->os, "wqcb for instance %d is null\n", instance_index);

sys/dev/ocs_fc/ocs_hw.c

1193

ocs_hw_flush(hw);

sys/dev/ocs_fc/ocs_hw.c

11940

ocs_hw_reqtag_reset(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

11946

while(ocs_pool_get(hw->wq_reqtag_pool) != NULL) {

sys/dev/ocs_fc/ocs_hw.c

11951

for (i = 0; ((wqcb = ocs_pool_get_instance(hw->wq_reqtag_pool, i)) != NULL); i++) {

sys/dev/ocs_fc/ocs_hw.c

11955

ocs_pool_put(hw->wq_reqtag_pool, wqcb);

sys/dev/ocs_fc/ocs_hw.c

1196

while (!ocs_list_empty(&hw->cmd_head) && iters) {

sys/dev/ocs_fc/ocs_hw.c

1198

ocs_hw_flush(hw);

sys/dev/ocs_fc/ocs_hw.c

120

static ocs_hw_rtn_e ocs_hw_config_watchdog_timer(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.c

12008

ocs_hw_reque_xri( ocs_hw_t *hw, ocs_hw_io_t *io )

sys/dev/ocs_fc/ocs_hw.c

12012

rc = ocs_hw_rqpair_auto_xfer_rdy_buffer_post(hw, io, 1);

sys/dev/ocs_fc/ocs_hw.c

12014

ocs_list_add_tail(&hw->io_port_dnrx, io);

sys/dev/ocs_fc/ocs_hw.c

1202

if (ocs_list_empty(&hw->cmd_head)) {

sys/dev/ocs_fc/ocs_hw.c

12021

if (sli_requeue_xri_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, io->indicator, OCS_HW_REQUE_XRI_REGTAG, SLI4_CQ_DEFAULT)) {

sys/dev/ocs_fc/ocs_hw.c

12023

ocs_pool_put(hw->auto_xfer_rdy_buf_pool, io->axr_buf);

sys/dev/ocs_fc/ocs_hw.c

12026

ocs_log_err(hw->os, "requeue_xri WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

12027

ocs_list_add_tail(&hw->io_port_dnrx, io);

sys/dev/ocs_fc/ocs_hw.c

1203

ocs_log_debug(hw->os, "All commands completed on MQ queue\n");

sys/dev/ocs_fc/ocs_hw.c

12034

io->wq = ocs_hw_queue_next_wq(hw, io);

sys/dev/ocs_fc/ocs_hw.c

12042

OCS_STAT(hw->tcmd_wq_submit[io->wq->instance]++);

sys/dev/ocs_fc/ocs_hw.c

12047

ocs_log_err(hw->os, "sli_queue_write reque xri failed: %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

1205

ocs_log_debug(hw->os, "Some commands still pending on MQ queue\n");

sys/dev/ocs_fc/ocs_hw.c

12058

sli4_t *sli4 = &ocs->hw.sli;

sys/dev/ocs_fc/ocs_hw.c

1209

ocs_hw_command_cancel(hw);

sys/dev/ocs_fc/ocs_hw.c

12091

ocs_hw_get_config_persistent_topology(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

12094

sli4_t *sli = &hw->sli;

sys/dev/ocs_fc/ocs_hw.c

121

static ocs_hw_rtn_e ocs_hw_config_sli_port_health_check(ocs_hw_t *hw, uint8_t query, uint8_t enable);

sys/dev/ocs_fc/ocs_hw.c

1211

hw->state = OCS_HW_STATE_TEARDOWN_IN_PROGRESS;

sys/dev/ocs_fc/ocs_hw.c

12137

ocs_hw_set_persistent_topolgy_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

1214

ocs_lock_free(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

1217

if (hw->workaround.use_unregistered_rpi) {

sys/dev/ocs_fc/ocs_hw.c

12179

ocs_hw_set_persistent_topology(ocs_hw_t *hw, uint32_t topology, uint32_t opts)

sys/dev/ocs_fc/ocs_hw.c

1218

sli_resource_free(&hw->sli, SLI_RSRC_FCOE_RPI, hw->workaround.unregistered_rid);

sys/dev/ocs_fc/ocs_hw.c

12191

if (sli_get_asic_type(&hw->sli) == SLI4_ASIC_TYPE_LANCER) {

sys/dev/ocs_fc/ocs_hw.c

1221

max_rpi = sli_get_max_rsrc(&hw->sli, SLI_RSRC_FCOE_RPI);

sys/dev/ocs_fc/ocs_hw.c

12211

ocs_log_err(hw->os, "unsupported topology %#x\n", topology);

sys/dev/ocs_fc/ocs_hw.c

12218

sli_cmd_common_set_features(&hw->sli, buf, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

1222

if (hw->rpi_ref) {

sys/dev/ocs_fc/ocs_hw.c

12222

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

12224

ocs_log_err(hw->os, "Failed to set persistent topology, rc: %#x\n", rc);

sys/dev/ocs_fc/ocs_hw.c

12230

rc = ocs_hw_command(hw, buf, OCS_CMD_NOWAIT, ocs_hw_set_persistent_topolgy_cb, &request);

sys/dev/ocs_fc/ocs_hw.c

12232

ocs_log_err(hw->os, "Failed to set persistent topology, rc: %#x\n", rc);

sys/dev/ocs_fc/ocs_hw.c

12237

ocs_log_err(hw->os, "ocs_sem_p failed\n");

sys/dev/ocs_fc/ocs_hw.c

1224

if (ocs_atomic_read(&hw->rpi_ref[i].rpi_count)) {

sys/dev/ocs_fc/ocs_hw.c

12242

ocs_log_err(hw->os, "set persistent topology failed; status: %d\n", request.status);

sys/dev/ocs_fc/ocs_hw.c

12247

sli_config_persistent_topology(&hw->sli, &param);

sys/dev/ocs_fc/ocs_hw.c

1225

ocs_log_debug(hw->os, "non-zero ref [%d]=%d\n",

sys/dev/ocs_fc/ocs_hw.c

1226

i, ocs_atomic_read(&hw->rpi_ref[i].rpi_count));

sys/dev/ocs_fc/ocs_hw.c

1229

ocs_free(hw->os, hw->rpi_ref, max_rpi * sizeof(*hw->rpi_ref));

sys/dev/ocs_fc/ocs_hw.c

1230

hw->rpi_ref = NULL;

sys/dev/ocs_fc/ocs_hw.c

1233

ocs_dma_free(hw->os, &hw->rnode_mem);

sys/dev/ocs_fc/ocs_hw.c

1235

if (hw->io) {

sys/dev/ocs_fc/ocs_hw.c

1236

for (i = 0; i < hw->config.n_io; i++) {

sys/dev/ocs_fc/ocs_hw.c

1237

if (hw->io[i] && (hw->io[i]->sgl != NULL) &&

sys/dev/ocs_fc/ocs_hw.c

1238

(hw->io[i]->sgl->virt != NULL)) {

sys/dev/ocs_fc/ocs_hw.c

1239

if(hw->io[i]->is_port_owned) {

sys/dev/ocs_fc/ocs_hw.c

1240

ocs_lock_free(&hw->io[i]->axr_lock);

sys/dev/ocs_fc/ocs_hw.c

1242

ocs_dma_free(hw->os, hw->io[i]->sgl);

sys/dev/ocs_fc/ocs_hw.c

1244

ocs_free(hw->os, hw->io[i], sizeof(ocs_hw_io_t));

sys/dev/ocs_fc/ocs_hw.c

1245

hw->io[i] = NULL;

sys/dev/ocs_fc/ocs_hw.c

1247

ocs_free(hw->os, hw->wqe_buffs, hw->config.n_io * hw->sli.config.wqe_size);

sys/dev/ocs_fc/ocs_hw.c

1248

hw->wqe_buffs = NULL;

sys/dev/ocs_fc/ocs_hw.c

1249

ocs_free(hw->os, hw->io, hw->config.n_io * sizeof(ocs_hw_io_t *));

sys/dev/ocs_fc/ocs_hw.c

1250

hw->io = NULL;

sys/dev/ocs_fc/ocs_hw.c

12520

static int32_t ocs_hw_workaround_match(ocs_hw_t *hw, hw_workaround_t *w);

sys/dev/ocs_fc/ocs_hw.c

1253

ocs_dma_free(hw->os, &hw->xfer_rdy);

sys/dev/ocs_fc/ocs_hw.c

1254

ocs_dma_free(hw->os, &hw->dump_sges);

sys/dev/ocs_fc/ocs_hw.c

1255

ocs_dma_free(hw->os, &hw->loop_map);

sys/dev/ocs_fc/ocs_hw.c

1257

ocs_lock_free(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

12570

ocs_hw_workaround_match(ocs_hw_t *hw, hw_workaround_t *w)

sys/dev/ocs_fc/ocs_hw.c

12572

return (((w->asic_type == SLI4_ASIC_TYPE_ANY) || (w->asic_type == hw->sli.asic_type)) &&

sys/dev/ocs_fc/ocs_hw.c

12573

((w->asic_rev == SLI4_ASIC_REV_ANY) || (w->asic_rev == hw->sli.asic_rev)) &&

sys/dev/ocs_fc/ocs_hw.c

12574

(w->fwrev_low <= hw->workaround.fwrev) &&

sys/dev/ocs_fc/ocs_hw.c

12575

((w->fwrev_high == HW_FWREV_MAX) || (hw->workaround.fwrev < w->fwrev_high)));

sys/dev/ocs_fc/ocs_hw.c

1258

ocs_lock_free(&hw->io_abort_lock);

sys/dev/ocs_fc/ocs_hw.c

12590

ocs_hw_workaround_setup(struct ocs_hw_s *hw)

sys/dev/ocs_fc/ocs_hw.c

12593

sli4_t *sli4 = &hw->sli;

sys/dev/ocs_fc/ocs_hw.c

12597

ocs_memset(&hw->workaround, 0, sizeof(hw->workaround));

sys/dev/ocs_fc/ocs_hw.c

1260

for (i = 0; i < hw->wq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

12603

if (hw->hw_war_version) {

sys/dev/ocs_fc/ocs_hw.c

12604

hw->workaround.fwrev = parse_fw_version(hw->hw_war_version);

sys/dev/ocs_fc/ocs_hw.c

12606

hw->workaround.fwrev = parse_fw_version((char*) sli4->config.fw_name[0]);

sys/dev/ocs_fc/ocs_hw.c

1261

sli_queue_free(&hw->sli, &hw->wq[i], destroy_queues, free_memory);

sys/dev/ocs_fc/ocs_hw.c

12611

if (ocs_hw_workaround_match(hw, w)) {

sys/dev/ocs_fc/ocs_hw.c

12614

ocs_log_debug(hw->os, "Override: test: %d\n", w->value);

sys/dev/ocs_fc/ocs_hw.c

12619

ocs_log_debug(hw->os, "HW Workaround: retain TSEND IO length\n");

sys/dev/ocs_fc/ocs_hw.c

12620

hw->workaround.retain_tsend_io_length = 1;

sys/dev/ocs_fc/ocs_hw.c

12626

ocs_log_debug(hw->os, "HW Workaround: override max_qentries: %d\n", w->value);

sys/dev/ocs_fc/ocs_hw.c

12628

if (hw->num_qentries[q] > w->value) {

sys/dev/ocs_fc/ocs_hw.c

12629

hw->num_qentries[q] = w->value;

sys/dev/ocs_fc/ocs_hw.c

12635

ocs_log_debug(hw->os, "HW Workaround: override RQ max_qentries: %d\n", w->value);

sys/dev/ocs_fc/ocs_hw.c

12636

if (hw->num_qentries[SLI_QTYPE_RQ] > w->value) {

sys/dev/ocs_fc/ocs_hw.c

12637

hw->num_qentries[SLI_QTYPE_RQ] = w->value;

sys/dev/ocs_fc/ocs_hw.c

1264

for (i = 0; i < hw->rq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

12642

ocs_log_debug(hw->os, "HW Workaround: set WQE count method=%d\n", w->value);

sys/dev/ocs_fc/ocs_hw.c

12648

ocs_log_debug(hw->os, "HW Workaround: set RQE count method=%d\n", w->value);

sys/dev/ocs_fc/ocs_hw.c

1265

sli_queue_free(&hw->sli, &hw->rq[i], destroy_queues, free_memory);

sys/dev/ocs_fc/ocs_hw.c

12654

ocs_log_debug(hw->os, "HW Workaround: use unreg'd RPI if rnode->indicator == 0xFFFF\n");

sys/dev/ocs_fc/ocs_hw.c

12655

hw->workaround.use_unregistered_rpi = TRUE;

sys/dev/ocs_fc/ocs_hw.c

12660

if (sli_resource_alloc(&hw->sli, SLI_RSRC_FCOE_RPI, &hw->workaround.unregistered_rid,

sys/dev/ocs_fc/ocs_hw.c

12661

&hw->workaround.unregistered_index)) {

sys/dev/ocs_fc/ocs_hw.c

12662

ocs_log_err(hw->os, "sli_resource_alloc unregistered RPI failed\n");

sys/dev/ocs_fc/ocs_hw.c

12663

hw->workaround.use_unregistered_rpi = FALSE;

sys/dev/ocs_fc/ocs_hw.c

12667

ocs_log_debug(hw->os, "HW Workaround: disable AR on T10-PI TSEND\n");

sys/dev/ocs_fc/ocs_hw.c

12668

hw->workaround.disable_ar_tgt_dif = TRUE;

sys/dev/ocs_fc/ocs_hw.c

12671

ocs_log_debug(hw->os, "HW Workaround: disable set_dump_loc\n");

sys/dev/ocs_fc/ocs_hw.c

12672

hw->workaround.disable_dump_loc = TRUE;

sys/dev/ocs_fc/ocs_hw.c

12675

ocs_log_debug(hw->os, "HW Workaround: use DIF quarantine\n");

sys/dev/ocs_fc/ocs_hw.c

12676

hw->workaround.use_dif_quarantine = TRUE;

sys/dev/ocs_fc/ocs_hw.c

12679

ocs_log_debug(hw->os, "HW Workaround: use DIF secondary xri\n");

sys/dev/ocs_fc/ocs_hw.c

1268

for (i = 0; i < hw->mq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

12680

hw->workaround.use_dif_sec_xri = TRUE;

sys/dev/ocs_fc/ocs_hw.c

12683

ocs_log_debug(hw->os, "HW Workaround: override FCFI in SRB\n");

sys/dev/ocs_fc/ocs_hw.c

12684

hw->workaround.override_fcfi = TRUE;

sys/dev/ocs_fc/ocs_hw.c

12688

ocs_log_debug(hw->os, "HW Workaround: fw version is below the minimum for this driver\n");

sys/dev/ocs_fc/ocs_hw.c

12689

hw->workaround.fw_version_too_low = TRUE;

sys/dev/ocs_fc/ocs_hw.c

1269

sli_queue_free(&hw->sli, &hw->mq[i], destroy_queues, free_memory);

sys/dev/ocs_fc/ocs_hw.c

12692

ocs_log_debug(hw->os, "HW Workaround: SGLC misreported - chaining is enabled\n");

sys/dev/ocs_fc/ocs_hw.c

12693

hw->workaround.sglc_misreported = TRUE;

sys/dev/ocs_fc/ocs_hw.c

12696

ocs_log_debug(hw->os, "HW Workaround: not SEND_FRAME capable - disabled\n");

sys/dev/ocs_fc/ocs_hw.c

12697

hw->workaround.ignore_send_frame = TRUE;

sys/dev/ocs_fc/ocs_hw.c

1272

for (i = 0; i < hw->cq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

1273

sli_queue_free(&hw->sli, &hw->cq[i], destroy_queues, free_memory);

sys/dev/ocs_fc/ocs_hw.c

1276

for (i = 0; i < hw->eq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

1277

sli_queue_free(&hw->sli, &hw->eq[i], destroy_queues, free_memory);

sys/dev/ocs_fc/ocs_hw.c

1280

ocs_hw_qtop_free(hw->qtop);

sys/dev/ocs_fc/ocs_hw.c

1283

ocs_hw_rx_free(hw);

sys/dev/ocs_fc/ocs_hw.c

1285

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw.c

1287

ocs_hw_rqpair_teardown(hw);

sys/dev/ocs_fc/ocs_hw.c

1289

if (sli_teardown(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

1290

ocs_log_err(hw->os, "SLI teardown failed\n");

sys/dev/ocs_fc/ocs_hw.c

1293

ocs_queue_history_free(&hw->q_hist);

sys/dev/ocs_fc/ocs_hw.c

1296

hw->state = OCS_HW_STATE_UNINITIALIZED;

sys/dev/ocs_fc/ocs_hw.c

1299

ocs_array_free(hw->seq_pool);

sys/dev/ocs_fc/ocs_hw.c

1300

hw->seq_pool = NULL;

sys/dev/ocs_fc/ocs_hw.c

1303

ocs_pool_free(hw->wq_reqtag_pool);

sys/dev/ocs_fc/ocs_hw.c

1305

ocs_dma_free(hw->os, &hw->domain_dmem);

sys/dev/ocs_fc/ocs_hw.c

1306

ocs_dma_free(hw->os, &hw->fcf_dmem);

sys/dev/ocs_fc/ocs_hw.c

1308

hw->hw_setup_called = FALSE;

sys/dev/ocs_fc/ocs_hw.c

1314

ocs_hw_reset(ocs_hw_t *hw, ocs_hw_reset_e reset)

sys/dev/ocs_fc/ocs_hw.c

1319

ocs_hw_state_e prev_state = hw->state;

sys/dev/ocs_fc/ocs_hw.c

1321

if (hw->state != OCS_HW_STATE_ACTIVE) {

sys/dev/ocs_fc/ocs_hw.c

1322

ocs_log_test(hw->os, "HW state %d is not active\n", hw->state);

sys/dev/ocs_fc/ocs_hw.c

1325

hw->state = OCS_HW_STATE_RESET_IN_PROGRESS;

sys/dev/ocs_fc/ocs_hw.c

1328

shutdown_target_wqe_timer(hw);

sys/dev/ocs_fc/ocs_hw.c

1330

ocs_hw_flush(hw);

sys/dev/ocs_fc/ocs_hw.c

1338

while (!ocs_list_empty(&hw->cmd_head) && iters) {

sys/dev/ocs_fc/ocs_hw.c

1340

ocs_hw_flush(hw);

sys/dev/ocs_fc/ocs_hw.c

1344

if (ocs_list_empty(&hw->cmd_head)) {

sys/dev/ocs_fc/ocs_hw.c

1345

ocs_log_debug(hw->os, "All commands completed on MQ queue\n");

sys/dev/ocs_fc/ocs_hw.c

1347

ocs_log_debug(hw->os, "Some commands still pending on MQ queue\n");

sys/dev/ocs_fc/ocs_hw.c

1353

ocs_log_debug(hw->os, "issuing function level reset\n");

sys/dev/ocs_fc/ocs_hw.c

1354

if (sli_reset(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

1355

ocs_log_err(hw->os, "sli_reset failed\n");

sys/dev/ocs_fc/ocs_hw.c

1360

ocs_log_debug(hw->os, "issuing firmware reset\n");

sys/dev/ocs_fc/ocs_hw.c

1361

if (sli_fw_reset(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

1362

ocs_log_err(hw->os, "sli_soft_reset failed\n");

sys/dev/ocs_fc/ocs_hw.c

1369

ocs_log_debug(hw->os, "issuing function level reset\n");

sys/dev/ocs_fc/ocs_hw.c

1370

if (sli_reset(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

1371

ocs_log_err(hw->os, "sli_reset failed\n");

sys/dev/ocs_fc/ocs_hw.c

1376

ocs_log_test(hw->os, "unknown reset type - no reset performed\n");

sys/dev/ocs_fc/ocs_hw.c

1377

hw->state = prev_state;

sys/dev/ocs_fc/ocs_hw.c

1383

ocs_hw_command_cancel(hw);

sys/dev/ocs_fc/ocs_hw.c

1386

ocs_hw_io_cancel(hw);

sys/dev/ocs_fc/ocs_hw.c

1388

ocs_memset(hw->domains, 0, sizeof(hw->domains));

sys/dev/ocs_fc/ocs_hw.c

1389

ocs_memset(hw->fcf_index_fcfi, 0, sizeof(hw->fcf_index_fcfi));

sys/dev/ocs_fc/ocs_hw.c

1391

ocs_hw_link_event_init(hw);

sys/dev/ocs_fc/ocs_hw.c

1393

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

1395

while (!ocs_list_empty(&hw->io_timed_wqe)) {

sys/dev/ocs_fc/ocs_hw.c

1396

ocs_list_remove_head(&hw->io_timed_wqe);

sys/dev/ocs_fc/ocs_hw.c

1400

while (!ocs_list_empty(&hw->io_free)) {

sys/dev/ocs_fc/ocs_hw.c

1401

ocs_list_remove_head(&hw->io_free);

sys/dev/ocs_fc/ocs_hw.c

1403

while (!ocs_list_empty(&hw->io_wait_free)) {

sys/dev/ocs_fc/ocs_hw.c

1404

ocs_list_remove_head(&hw->io_wait_free);

sys/dev/ocs_fc/ocs_hw.c

1408

ocs_hw_reqtag_reset(hw);

sys/dev/ocs_fc/ocs_hw.c

1410

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

1414

for (i = 0; i < hw->wq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

1415

sli_queue_reset(&hw->sli, &hw->wq[i]);

sys/dev/ocs_fc/ocs_hw.c

1418

for (i = 0; i < hw->rq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

1419

sli_queue_reset(&hw->sli, &hw->rq[i]);

sys/dev/ocs_fc/ocs_hw.c

142

static int32_t __ocs_hw_port_realloc_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg);

sys/dev/ocs_fc/ocs_hw.c

1422

for (i = 0; i < hw->hw_rq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

1423

hw_rq_t *rq = hw->hw_rq[i];

sys/dev/ocs_fc/ocs_hw.c

1433

for (i = 0; i < hw->mq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

1434

sli_queue_reset(&hw->sli, &hw->mq[i]);

sys/dev/ocs_fc/ocs_hw.c

1437

for (i = 0; i < hw->cq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

1438

sli_queue_reset(&hw->sli, &hw->cq[i]);

sys/dev/ocs_fc/ocs_hw.c

1441

for (i = 0; i < hw->eq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

1442

sli_queue_reset(&hw->sli, &hw->eq[i]);

sys/dev/ocs_fc/ocs_hw.c

1446

ocs_hw_rx_free(hw);

sys/dev/ocs_fc/ocs_hw.c

1449

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw.c

145

static void ocs_hw_check_sec_hio_list(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.c

1452

ocs_hw_rx_free(hw);

sys/dev/ocs_fc/ocs_hw.c

1459

ocs_hw_workaround_setup(hw);

sys/dev/ocs_fc/ocs_hw.c

1460

hw->state = OCS_HW_STATE_QUEUES_ALLOCATED;

sys/dev/ocs_fc/ocs_hw.c

1466

ocs_hw_get_num_eq(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

1468

return hw->eq_count;

sys/dev/ocs_fc/ocs_hw.c

1472

ocs_hw_get_fw_timed_out(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

1477

return (sli_reg_read(&hw->sli, SLI4_REG_SLIPORT_ERROR1) == 0x2 &&

sys/dev/ocs_fc/ocs_hw.c

1478

sli_reg_read(&hw->sli, SLI4_REG_SLIPORT_ERROR2) == 0x10);

sys/dev/ocs_fc/ocs_hw.c

1482

ocs_hw_get(ocs_hw_t *hw, ocs_hw_property_e prop, uint32_t *value)

sys/dev/ocs_fc/ocs_hw.c

149

static void shutdown_target_wqe_timer(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.c

1495

*value = hw->config.n_io;

sys/dev/ocs_fc/ocs_hw.c

1498

*value = (hw->config.n_sgl - SLI4_SGE_MAX_RESERVED);

sys/dev/ocs_fc/ocs_hw.c

1501

*value = sli_get_max_rsrc(&hw->sli, SLI_RSRC_FCOE_XRI);

sys/dev/ocs_fc/ocs_hw.c

1504

*value = sli_get_max_rsrc(&hw->sli, SLI_RSRC_FCOE_RPI);

sys/dev/ocs_fc/ocs_hw.c

1507

*value = hw->num_qentries[SLI_QTYPE_RQ];

sys/dev/ocs_fc/ocs_hw.c

1510

*value = hw->config.rq_default_buffer_size;

sys/dev/ocs_fc/ocs_hw.c

1513

*value = sli_get_auto_xfer_rdy_capable(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1516

*value = hw->config.auto_xfer_rdy_xri_cnt;

sys/dev/ocs_fc/ocs_hw.c

1519

*value = hw->config.auto_xfer_rdy_size;

sys/dev/ocs_fc/ocs_hw.c

1522

switch (hw->config.auto_xfer_rdy_blk_size_chip) {

sys/dev/ocs_fc/ocs_hw.c

1545

*value = hw->config.auto_xfer_rdy_t10_enable;

sys/dev/ocs_fc/ocs_hw.c

1548

*value = hw->config.auto_xfer_rdy_p_type;

sys/dev/ocs_fc/ocs_hw.c

1551

*value = hw->config.auto_xfer_rdy_ref_tag_is_lba;

sys/dev/ocs_fc/ocs_hw.c

1554

*value = hw->config.auto_xfer_rdy_app_tag_valid;

sys/dev/ocs_fc/ocs_hw.c

1557

*value = hw->config.auto_xfer_rdy_app_tag_value;

sys/dev/ocs_fc/ocs_hw.c

1560

*value = sli_get_max_sge(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1563

*value = sli_get_max_sgl(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1570

if (hw->link.speed == 0) {

sys/dev/ocs_fc/ocs_hw.c

1574

switch (hw->link.topology) {

sys/dev/ocs_fc/ocs_hw.c

1585

ocs_log_test(hw->os, "unsupported topology %#x\n", hw->link.topology);

sys/dev/ocs_fc/ocs_hw.c

1591

*value = hw->config.topology;

sys/dev/ocs_fc/ocs_hw.c

1594

*value = hw->link.speed;

sys/dev/ocs_fc/ocs_hw.c

1597

switch (hw->config.speed) {

sys/dev/ocs_fc/ocs_hw.c

1620

ocs_log_test(hw->os, "unsupported speed %#x\n", hw->config.speed);

sys/dev/ocs_fc/ocs_hw.c

1626

*value = sli_get_if_type(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1629

*value = sli_get_sli_rev(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1632

*value = sli_get_sli_family(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1635

*value = sli_get_dif_capable(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1638

*value = hw->config.dif_seed;

sys/dev/ocs_fc/ocs_hw.c

164

ocs_hw_add_io_timed_wqe(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

1641

*value = hw->config.dif_mode;

sys/dev/ocs_fc/ocs_hw.c

1645

if (hw->sli.if_type == SLI4_IF_TYPE_LANCER_FC_ETH) {

sys/dev/ocs_fc/ocs_hw.c

1652

*value = hw->dump_size;

sys/dev/ocs_fc/ocs_hw.c

1655

*value = sli_dump_is_ready(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1658

*value = sli_dump_is_present(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

166

if (hw->config.emulate_wqe_timeout && io->wqe_timeout) {

sys/dev/ocs_fc/ocs_hw.c

1661

tmp = sli_reset_required(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1669

*value = sli_fw_error_status(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1672

*value = sli_fw_ready(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1675

*value = ocs_hw_get_fw_timed_out(hw);

sys/dev/ocs_fc/ocs_hw.c

1678

*value = sli_get_hlm_capable(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1681

*value = sli_get_sgl_preregister_required(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1684

*value = sli_get_hw_revision(&hw->sli, 0);

sys/dev/ocs_fc/ocs_hw.c

1687

*value = sli_get_hw_revision(&hw->sli, 1);

sys/dev/ocs_fc/ocs_hw.c

1690

*value = sli_get_hw_revision(&hw->sli, 2);

sys/dev/ocs_fc/ocs_hw.c

1693

*value = hw->linkcfg;

sys/dev/ocs_fc/ocs_hw.c

1696

*value = hw->eth_license;

sys/dev/ocs_fc/ocs_hw.c

1699

*value = sli_get_link_module_type(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1702

*value = ocs_hw_get_num_chutes(hw);

sys/dev/ocs_fc/ocs_hw.c

1705

*value = hw->workaround.disable_ar_tgt_dif;

sys/dev/ocs_fc/ocs_hw.c

1708

*value = hw->config.i_only_aab;

sys/dev/ocs_fc/ocs_hw.c

171

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

1711

*value = hw->config.emulate_wqe_timeout;

sys/dev/ocs_fc/ocs_hw.c

1714

*value = sli_get_vpd_len(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1717

*value = sli_get_is_sgl_chaining_capable(&hw->sli) || hw->workaround.sglc_misreported;

sys/dev/ocs_fc/ocs_hw.c

172

ocs_list_add_tail(&hw->io_timed_wqe, io);

sys/dev/ocs_fc/ocs_hw.c

1726

if ((sli_get_is_sgl_chaining_capable(&hw->sli) || hw->workaround.sglc_misreported) &&

sys/dev/ocs_fc/ocs_hw.c

1727

!sli_get_sgl_preregister(&hw->sli) &&

sys/dev/ocs_fc/ocs_hw.c

1728

SLI4_IF_TYPE_LANCER_FC_ETH == sli_get_if_type(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

1732

if ((sli_get_is_sgl_chaining_capable(&hw->sli) || hw->workaround.sglc_misreported) &&

sys/dev/ocs_fc/ocs_hw.c

1733

sli_get_sgl_preregister(&hw->sli) &&

sys/dev/ocs_fc/ocs_hw.c

1734

((SLI4_IF_TYPE_BE3_SKH_PF == sli_get_if_type(&hw->sli)) ||

sys/dev/ocs_fc/ocs_hw.c

1735

(SLI4_IF_TYPE_BE3_SKH_VF == sli_get_if_type(&hw->sli)))) {

sys/dev/ocs_fc/ocs_hw.c

174

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

1741

*value = ((sli_get_is_sgl_chaining_capable(&hw->sli) || hw->workaround.sglc_misreported) &&

sys/dev/ocs_fc/ocs_hw.c

1742

(SLI4_IF_TYPE_LANCER_FC_ETH == sli_get_if_type(&hw->sli)));

sys/dev/ocs_fc/ocs_hw.c

1745

if (hw->workaround.ignore_send_frame) {

sys/dev/ocs_fc/ocs_hw.c

1749

*value = sli_get_if_type(&hw->sli) == SLI4_IF_TYPE_LANCER_FC_ETH;

sys/dev/ocs_fc/ocs_hw.c

1753

*value = hw->config.rq_selection_policy;

sys/dev/ocs_fc/ocs_hw.c

1756

*value = hw->config.rr_quanta;

sys/dev/ocs_fc/ocs_hw.c

1759

*value = sli_get_max_rsrc(&hw->sli, SLI_RSRC_FCOE_VPI);

sys/dev/ocs_fc/ocs_hw.c

1762

ocs_log_test(hw->os, "unsupported property %#x\n", prop);

sys/dev/ocs_fc/ocs_hw.c

1770

ocs_hw_get_ptr(ocs_hw_t *hw, ocs_hw_property_e prop)

sys/dev/ocs_fc/ocs_hw.c

1776

rc = sli_get_wwn_node(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1779

rc = sli_get_wwn_port(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1783

if (sli_get_vpd_len(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

1784

rc = sli_get_vpd(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1788

rc = sli_get_fw_name(&hw->sli, 0);

sys/dev/ocs_fc/ocs_hw.c

179

ocs_hw_remove_io_timed_wqe(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

1791

rc = sli_get_fw_name(&hw->sli, 1);

sys/dev/ocs_fc/ocs_hw.c

1794

rc = sli_get_ipl_name(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1797

rc = sli_get_portnum(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1800

rc = sli_get_bios_version_string(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

1803

ocs_log_test(hw->os, "unsupported property %#x\n", prop);

sys/dev/ocs_fc/ocs_hw.c

181

if (hw->config.emulate_wqe_timeout) {

sys/dev/ocs_fc/ocs_hw.c

1810

ocs_hw_set(ocs_hw_t *hw, ocs_hw_property_e prop, uint32_t value)

sys/dev/ocs_fc/ocs_hw.c

1816

if (value > sli_get_max_rsrc(&hw->sli, SLI_RSRC_FCOE_XRI) ||

sys/dev/ocs_fc/ocs_hw.c

1818

ocs_log_test(hw->os, "IO value out of range %d vs %d\n",

sys/dev/ocs_fc/ocs_hw.c

1819

value, sli_get_max_rsrc(&hw->sli, SLI_RSRC_FCOE_XRI));

sys/dev/ocs_fc/ocs_hw.c

1822

hw->config.n_io = value;

sys/dev/ocs_fc/ocs_hw.c

1827

if (value > sli_get_max_sgl(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

1828

ocs_log_test(hw->os, "SGL value out of range %d vs %d\n",

sys/dev/ocs_fc/ocs_hw.c

1829

value, sli_get_max_sgl(&hw->sli));

sys/dev/ocs_fc/ocs_hw.c

1832

hw->config.n_sgl = value;

sys/dev/ocs_fc/ocs_hw.c

1836

if ((sli_get_medium(&hw->sli) != SLI_LINK_MEDIUM_FC) &&

sys/dev/ocs_fc/ocs_hw.c

1838

ocs_log_test(hw->os, "unsupported topology=%#x medium=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

1839

value, sli_get_medium(&hw->sli));

sys/dev/ocs_fc/ocs_hw.c

1846

if (sli_get_medium(&hw->sli) == SLI_LINK_MEDIUM_FC) {

sys/dev/ocs_fc/ocs_hw.c

1847

sli_set_topology(&hw->sli, SLI4_READ_CFG_TOPO_FC);

sys/dev/ocs_fc/ocs_hw.c

1849

sli_set_topology(&hw->sli, SLI4_READ_CFG_TOPO_FCOE);

sys/dev/ocs_fc/ocs_hw.c

1853

sli_set_topology(&hw->sli, SLI4_READ_CFG_TOPO_FC_DA);

sys/dev/ocs_fc/ocs_hw.c

1856

sli_set_topology(&hw->sli, SLI4_READ_CFG_TOPO_FC_AL);

sys/dev/ocs_fc/ocs_hw.c

1859

ocs_log_test(hw->os, "unsupported topology %#x\n", value);

sys/dev/ocs_fc/ocs_hw.c

186

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

1862

hw->config.topology = value;

sys/dev/ocs_fc/ocs_hw.c

1865

if (sli_get_medium(&hw->sli) != SLI_LINK_MEDIUM_FC) {

sys/dev/ocs_fc/ocs_hw.c

1869

hw->config.speed = FC_LINK_SPEED_10G;

sys/dev/ocs_fc/ocs_hw.c

1872

ocs_log_test(hw->os, "unsupported speed=%#x medium=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

1873

value, sli_get_medium(&hw->sli));

sys/dev/ocs_fc/ocs_hw.c

188

ocs_list_remove(&hw->io_timed_wqe, io);

sys/dev/ocs_fc/ocs_hw.c

1881

hw->config.speed = FC_LINK_SPEED_AUTO_16_8_4;

sys/dev/ocs_fc/ocs_hw.c

1884

hw->config.speed = FC_LINK_SPEED_2G;

sys/dev/ocs_fc/ocs_hw.c

1887

hw->config.speed = FC_LINK_SPEED_4G;

sys/dev/ocs_fc/ocs_hw.c

1890

hw->config.speed = FC_LINK_SPEED_8G;

sys/dev/ocs_fc/ocs_hw.c

1893

hw->config.speed = FC_LINK_SPEED_16G;

sys/dev/ocs_fc/ocs_hw.c

1896

hw->config.speed = FC_LINK_SPEED_32G;

sys/dev/ocs_fc/ocs_hw.c

1899

ocs_log_test(hw->os, "unsupported speed %d\n", value);

sys/dev/ocs_fc/ocs_hw.c

190

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

1905

if (SLI4_IF_TYPE_LANCER_FC_ETH != sli_get_if_type(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

1906

ocs_log_test(hw->os, "DIF seed not supported for this device\n");

sys/dev/ocs_fc/ocs_hw.c

1909

hw->config.dif_seed = value;

sys/dev/ocs_fc/ocs_hw.c

1921

if (sli_is_dif_inline_capable(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

1922

hw->config.dif_mode = value;

sys/dev/ocs_fc/ocs_hw.c

1924

ocs_log_test(hw->os, "chip does not support DIF inline\n");

sys/dev/ocs_fc/ocs_hw.c

1930

if (sli_is_dif_separate_capable(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

1931

hw->config.dif_mode = value;

sys/dev/ocs_fc/ocs_hw.c

1933

ocs_log_test(hw->os, "chip does not support DIF separate\n");

sys/dev/ocs_fc/ocs_hw.c

1943

for (i = 0; i < hw->hw_rq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

1944

rq = hw->hw_rq[i];

sys/dev/ocs_fc/ocs_hw.c

1945

hw->cq[rq->cq->instance].proc_limit = value;

sys/dev/ocs_fc/ocs_hw.c

1950

hw->config.rq_default_buffer_size = value;

sys/dev/ocs_fc/ocs_hw.c

1953

hw->config.auto_xfer_rdy_xri_cnt = value;

sys/dev/ocs_fc/ocs_hw.c

1956

hw->config.auto_xfer_rdy_size = value;

sys/dev/ocs_fc/ocs_hw.c

1961

hw->config.auto_xfer_rdy_blk_size_chip = 0;

sys/dev/ocs_fc/ocs_hw.c

1964

hw->config.auto_xfer_rdy_blk_size_chip = 1;

sys/dev/ocs_fc/ocs_hw.c

1967

hw->config.auto_xfer_rdy_blk_size_chip = 2;

sys/dev/ocs_fc/ocs_hw.c

1970

hw->config.auto_xfer_rdy_blk_size_chip = 3;

sys/dev/ocs_fc/ocs_hw.c

1973

hw->config.auto_xfer_rdy_blk_size_chip = 4;

sys/dev/ocs_fc/ocs_hw.c

1976

ocs_log_err(hw->os, "Invalid block size %d\n",

sys/dev/ocs_fc/ocs_hw.c

1982

hw->config.auto_xfer_rdy_t10_enable = value;

sys/dev/ocs_fc/ocs_hw.c

1985

hw->config.auto_xfer_rdy_p_type = value;

sys/dev/ocs_fc/ocs_hw.c

1988

hw->config.auto_xfer_rdy_ref_tag_is_lba = value;

sys/dev/ocs_fc/ocs_hw.c

1991

hw->config.auto_xfer_rdy_app_tag_valid = value;

sys/dev/ocs_fc/ocs_hw.c

1994

hw->config.auto_xfer_rdy_app_tag_value = value;

sys/dev/ocs_fc/ocs_hw.c

1997

hw->config.esoc = value;

sys/dev/ocs_fc/ocs_hw.c

2000

rc = sli_set_hlm(&hw->sli, value);

sys/dev/ocs_fc/ocs_hw.c

2003

rc = sli_set_sgl_preregister(&hw->sli, value);

sys/dev/ocs_fc/ocs_hw.c

2006

hw->eth_license = value;

sys/dev/ocs_fc/ocs_hw.c

2009

hw->config.i_only_aab = value;

sys/dev/ocs_fc/ocs_hw.c

2012

hw->config.emulate_wqe_timeout = value;

sys/dev/ocs_fc/ocs_hw.c

2015

hw->config.bounce = value;

sys/dev/ocs_fc/ocs_hw.c

2018

hw->config.rq_selection_policy = value;

sys/dev/ocs_fc/ocs_hw.c

2021

hw->config.rr_quanta = value;

sys/dev/ocs_fc/ocs_hw.c

2024

ocs_log_test(hw->os, "unsupported property %#x\n", prop);

sys/dev/ocs_fc/ocs_hw.c

2032

ocs_hw_set_ptr(ocs_hw_t *hw, ocs_hw_property_e prop, void *value)

sys/dev/ocs_fc/ocs_hw.c

2038

hw->hw_war_version = value;

sys/dev/ocs_fc/ocs_hw.c

2044

for (idx = 0; idx < ARRAY_SIZE(hw->config.filter_def); idx++) {

sys/dev/ocs_fc/ocs_hw.c

2045

hw->config.filter_def[idx] = 0;

sys/dev/ocs_fc/ocs_hw.c

2048

for (idx = 0; (idx < ARRAY_SIZE(hw->config.filter_def)) && (p != NULL) && *p; ) {

sys/dev/ocs_fc/ocs_hw.c

2049

hw->config.filter_def[idx++] = ocs_strtoul(p, 0, 0);

sys/dev/ocs_fc/ocs_hw.c

2059

ocs_log_test(hw->os, "unsupported property %#x\n", prop);

sys/dev/ocs_fc/ocs_hw.c

2075

ocs_hw_event_check(ocs_hw_t *hw, uint32_t vector)

sys/dev/ocs_fc/ocs_hw.c

2079

if (!hw) {

sys/dev/ocs_fc/ocs_hw.c

2084

if (vector > hw->eq_count) {

sys/dev/ocs_fc/ocs_hw.c

2085

ocs_log_err(hw->os, "vector %d. max %d\n",

sys/dev/ocs_fc/ocs_hw.c

2086

vector, hw->eq_count);

sys/dev/ocs_fc/ocs_hw.c

2101

if (hw->state != OCS_HW_STATE_UNINITIALIZED) {

sys/dev/ocs_fc/ocs_hw.c

2102

rc = sli_queue_is_empty(&hw->sli, &hw->eq[vector]);

sys/dev/ocs_fc/ocs_hw.c

2106

sli_queue_arm(&hw->sli, &hw->eq[vector], TRUE);

sys/dev/ocs_fc/ocs_hw.c

2116

ocs_hw_t *hw = seq->hw;

sys/dev/ocs_fc/ocs_hw.c

2118

ocs_hw_assert(hw != NULL);

sys/dev/ocs_fc/ocs_hw.c

2119

ocs_hw_assert(hw->callback.unsolicited != NULL);

sys/dev/ocs_fc/ocs_hw.c

2121

hw->callback.unsolicited(hw->args.unsolicited, seq);

sys/dev/ocs_fc/ocs_hw.c

2125

ocs_hw_process(ocs_hw_t *hw, uint32_t vector, uint32_t max_isr_time_msec)

sys/dev/ocs_fc/ocs_hw.c

2143

if (hw->state == OCS_HW_STATE_UNINITIALIZED) {

sys/dev/ocs_fc/ocs_hw.c

2148

eq = hw->hw_eq[vector];

sys/dev/ocs_fc/ocs_hw.c

2152

rc = ocs_hw_eq_process(hw, eq, max_isr_time_msec);

sys/dev/ocs_fc/ocs_hw.c

2179

ocs_hw_eq_process(ocs_hw_t *hw, hw_eq_t *eq, uint32_t max_isr_time_msec)

sys/dev/ocs_fc/ocs_hw.c

2192

while (!done && !sli_queue_read(&hw->sli, eq->queue, eqe)) {

sys/dev/ocs_fc/ocs_hw.c

2196

rc = sli_eq_parse(&hw->sli, eqe, &cq_id);

sys/dev/ocs_fc/ocs_hw.c

2205

for (i = 0; i < hw->cq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

2206

ocs_hw_cq_process(hw, hw->hw_cq[i]);

sys/dev/ocs_fc/ocs_hw.c

2213

int32_t index = ocs_hw_queue_hash_find(hw->cq_hash, cq_id);

sys/dev/ocs_fc/ocs_hw.c

2215

ocs_hw_cq_process(hw, hw->hw_cq[index]);

sys/dev/ocs_fc/ocs_hw.c

2217

ocs_log_err(hw->os, "bad CQ_ID %#06x\n", cq_id);

sys/dev/ocs_fc/ocs_hw.c

2222

sli_queue_arm(&hw->sli, eq->queue, FALSE);

sys/dev/ocs_fc/ocs_hw.c

2233

sli_queue_eq_arm(&hw->sli, eq->queue, TRUE);

sys/dev/ocs_fc/ocs_hw.c

2250

ocs_hw_cmd_submit_pending(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

2258

while (hw->cmd_head_count < (OCS_HW_MQ_DEPTH - 1)) {

sys/dev/ocs_fc/ocs_hw.c

2259

ctx = ocs_list_remove_head(&hw->cmd_pending);

sys/dev/ocs_fc/ocs_hw.c

2263

ocs_list_add_tail(&hw->cmd_head, ctx);

sys/dev/ocs_fc/ocs_hw.c

2264

hw->cmd_head_count++;

sys/dev/ocs_fc/ocs_hw.c

2265

if (sli_queue_write(&hw->sli, hw->mq, ctx->buf) < 0) {

sys/dev/ocs_fc/ocs_hw.c

2266

ocs_log_test(hw->os, "sli_queue_write failed: %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

2297

ocs_hw_command(ocs_hw_t *hw, uint8_t *cmd, uint32_t opts, void *cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

2305

if (sli_fw_error_status(&hw->sli) > 0) {

sys/dev/ocs_fc/ocs_hw.c

2306

uint32_t err1 = sli_reg_read(&hw->sli, SLI4_REG_SLIPORT_ERROR1);

sys/dev/ocs_fc/ocs_hw.c

2307

uint32_t err2 = sli_reg_read(&hw->sli, SLI4_REG_SLIPORT_ERROR2);

sys/dev/ocs_fc/ocs_hw.c

2308

if (hw->expiration_logged == 0 && err1 == 0x2 && err2 == 0x10) {

sys/dev/ocs_fc/ocs_hw.c

2309

hw->expiration_logged = 1;

sys/dev/ocs_fc/ocs_hw.c

2310

ocs_log_crit(hw->os,"Emulex: Heartbeat expired after %d seconds\n",

sys/dev/ocs_fc/ocs_hw.c

2311

hw->watchdog_timeout);

sys/dev/ocs_fc/ocs_hw.c

2313

ocs_log_crit(hw->os, "Chip is in an error state - reset needed\n");

sys/dev/ocs_fc/ocs_hw.c

2314

ocs_log_crit(hw->os, "status=%#x error1=%#x error2=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

2315

sli_reg_read(&hw->sli, SLI4_REG_SLIPORT_STATUS),

sys/dev/ocs_fc/ocs_hw.c

2322

ocs_lock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

2323

if (hw->mq->length && !sli_queue_is_empty(&hw->sli, hw->mq)) {

sys/dev/ocs_fc/ocs_hw.c

2331

void *bmbx = hw->sli.bmbx.virt;

sys/dev/ocs_fc/ocs_hw.c

2336

if (sli_bmbx_command(&hw->sli) == 0) {

sys/dev/ocs_fc/ocs_hw.c

2341

ocs_unlock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

2345

ctx = ocs_malloc(hw->os, sizeof(ocs_command_ctx_t), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

2347

ocs_log_err(hw->os, "can't allocate command context\n");

sys/dev/ocs_fc/ocs_hw.c

2351

if (hw->state != OCS_HW_STATE_ACTIVE) {

sys/dev/ocs_fc/ocs_hw.c

2352

ocs_log_err(hw->os, "Can't send command, HW state=%d\n", hw->state);

sys/dev/ocs_fc/ocs_hw.c

2353

ocs_free(hw->os, ctx, sizeof(*ctx));

sys/dev/ocs_fc/ocs_hw.c

2362

ctx->ctx = hw;

sys/dev/ocs_fc/ocs_hw.c

2364

ocs_lock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

2367

ocs_list_add_tail(&hw->cmd_pending, ctx);

sys/dev/ocs_fc/ocs_hw.c

2370

if (ocs_hw_cmd_submit_pending(hw) == 0) {

sys/dev/ocs_fc/ocs_hw.c

2374

ocs_unlock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

239

ocs_hw_get_num_chutes(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

2392

ocs_hw_callback(ocs_hw_t *hw, ocs_hw_callback_e which, void *func, void *arg)

sys/dev/ocs_fc/ocs_hw.c

2395

if (!hw || !func || (which >= OCS_HW_CB_MAX)) {

sys/dev/ocs_fc/ocs_hw.c

2397

hw, which, func);

sys/dev/ocs_fc/ocs_hw.c

2403

hw->callback.domain = func;

sys/dev/ocs_fc/ocs_hw.c

2404

hw->args.domain = arg;

sys/dev/ocs_fc/ocs_hw.c

2407

hw->callback.port = func;

sys/dev/ocs_fc/ocs_hw.c

2408

hw->args.port = arg;

sys/dev/ocs_fc/ocs_hw.c

2411

hw->callback.unsolicited = func;

sys/dev/ocs_fc/ocs_hw.c

2412

hw->args.unsolicited = arg;

sys/dev/ocs_fc/ocs_hw.c

2415

hw->callback.rnode = func;

sys/dev/ocs_fc/ocs_hw.c

2416

hw->args.rnode = arg;

sys/dev/ocs_fc/ocs_hw.c

2419

hw->callback.bounce = func;

sys/dev/ocs_fc/ocs_hw.c

2420

hw->args.bounce = arg;

sys/dev/ocs_fc/ocs_hw.c

2423

ocs_log_test(hw->os, "unknown callback %#x\n", which);

sys/dev/ocs_fc/ocs_hw.c

243

if (sli_get_is_dual_ulp_capable(&hw->sli) &&

sys/dev/ocs_fc/ocs_hw.c

244

sli_get_is_ulp_enabled(&hw->sli, 0) &&

sys/dev/ocs_fc/ocs_hw.c

2446

ocs_hw_port_alloc(ocs_hw_t *hw, ocs_sli_port_t *sport, ocs_domain_t *domain,

sys/dev/ocs_fc/ocs_hw.c

245

sli_get_is_ulp_enabled(&hw->sli, 1)) {

sys/dev/ocs_fc/ocs_hw.c

2454

sport->hw = hw;

sys/dev/ocs_fc/ocs_hw.c

2461

if (sli_fw_error_status(&hw->sli) > 0) {

sys/dev/ocs_fc/ocs_hw.c

2462

ocs_log_crit(hw->os, "Chip is in an error state - reset needed\n");

sys/dev/ocs_fc/ocs_hw.c

2470

if (sli_resource_alloc(&hw->sli, SLI_RSRC_FCOE_VPI, &sport->indicator, &index)) {

sys/dev/ocs_fc/ocs_hw.c

2471

ocs_log_err(hw->os, "FCOE_VPI allocation failure\n");

sys/dev/ocs_fc/ocs_hw.c

2478

cmd = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

2480

ocs_log_err(hw->os, "command memory allocation failed\n");

sys/dev/ocs_fc/ocs_hw.c

2497

ocs_log_test(hw->os, "need WWN for physical port\n");

sys/dev/ocs_fc/ocs_hw.c

2506

ocs_free(hw->os, cmd, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

2508

sli_resource_free(&hw->sli, SLI_RSRC_FCOE_VPI, sport->indicator);

sys/dev/ocs_fc/ocs_hw.c

252

ocs_hw_link_event_init(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

2529

ocs_hw_port_attach(ocs_hw_t *hw, ocs_sli_port_t *sport, uint32_t fc_id)

sys/dev/ocs_fc/ocs_hw.c

2534

if (!hw || !sport) {

sys/dev/ocs_fc/ocs_hw.c

2535

ocs_log_err(hw ? hw->os : NULL,

sys/dev/ocs_fc/ocs_hw.c

2536

"bad parameter(s) hw=%p sport=%p\n", hw,

sys/dev/ocs_fc/ocs_hw.c

254

ocs_hw_assert(hw);

sys/dev/ocs_fc/ocs_hw.c

2544

if (sli_fw_error_status(&hw->sli) > 0) {

sys/dev/ocs_fc/ocs_hw.c

2545

ocs_log_crit(hw->os, "Chip is in an error state - reset needed\n");

sys/dev/ocs_fc/ocs_hw.c

2549

buf = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

2551

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

256

hw->link.status = SLI_LINK_STATUS_MAX;

sys/dev/ocs_fc/ocs_hw.c

257

hw->link.topology = SLI_LINK_TOPO_NONE;

sys/dev/ocs_fc/ocs_hw.c

2574

ocs_hw_cb_port_control(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

2576

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

258

hw->link.medium = SLI_LINK_MEDIUM_MAX;

sys/dev/ocs_fc/ocs_hw.c

259

hw->link.speed = 0;

sys/dev/ocs_fc/ocs_hw.c

260

hw->link.loop_map = NULL;

sys/dev/ocs_fc/ocs_hw.c

261

hw->link.fc_id = UINT32_MAX;

sys/dev/ocs_fc/ocs_hw.c

2623

ocs_hw_port_control(ocs_hw_t *hw, ocs_hw_port_e ctrl, uintptr_t value, ocs_hw_port_control_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

2634

if (SLI_LINK_MEDIUM_FC == sli_get_medium(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

2637

cfg_link = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

2639

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

2643

if (sli_cmd_config_link(&hw->sli, cfg_link, SLI4_BMBX_SIZE)) {

sys/dev/ocs_fc/ocs_hw.c

2644

rc = ocs_hw_command(hw, cfg_link, OCS_CMD_NOWAIT,

sys/dev/ocs_fc/ocs_hw.c

2649

ocs_free(hw->os, cfg_link, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

2650

ocs_log_err(hw->os, "CONFIG_LINK failed\n");

sys/dev/ocs_fc/ocs_hw.c

2653

speed = hw->config.speed;

sys/dev/ocs_fc/ocs_hw.c

2662

if (hw->workaround.fw_version_too_low) {

sys/dev/ocs_fc/ocs_hw.c

2663

if (SLI4_IF_TYPE_LANCER_FC_ETH == hw->sli.if_type) {

sys/dev/ocs_fc/ocs_hw.c

2664

ocs_log_err(hw->os, "Cannot bring up link. Please update firmware to %s or later (current version is %s)\n",

sys/dev/ocs_fc/ocs_hw.c

2665

OCS_FW_VER_STR(OCS_MIN_FW_VER_LANCER), (char *) sli_get_fw_name(&hw->sli,0));

sys/dev/ocs_fc/ocs_hw.c

2667

ocs_log_err(hw->os, "Cannot bring up link. Please update firmware to %s or later (current version is %s)\n",

sys/dev/ocs_fc/ocs_hw.c

2668

OCS_FW_VER_STR(OCS_MIN_FW_VER_SKYHAWK), (char *) sli_get_fw_name(&hw->sli, 0));

sys/dev/ocs_fc/ocs_hw.c

2677

init_link = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

2679

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

2683

if (sli_cmd_init_link(&hw->sli, init_link, SLI4_BMBX_SIZE, speed, reset_alpa)) {

sys/dev/ocs_fc/ocs_hw.c

2684

rc = ocs_hw_command(hw, init_link, OCS_CMD_NOWAIT,

sys/dev/ocs_fc/ocs_hw.c

2689

ocs_free(hw->os, init_link, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

2690

ocs_log_err(hw->os, "INIT_LINK failed\n");

sys/dev/ocs_fc/ocs_hw.c

2698

down_link = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

2700

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

2703

if (sli_cmd_down_link(&hw->sli, down_link, SLI4_BMBX_SIZE)) {

sys/dev/ocs_fc/ocs_hw.c

2704

rc = ocs_hw_command(hw, down_link, OCS_CMD_NOWAIT,

sys/dev/ocs_fc/ocs_hw.c

2709

ocs_free(hw->os, down_link, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

2710

ocs_log_err(hw->os, "DOWN_LINK failed\n");

sys/dev/ocs_fc/ocs_hw.c

2715

rc = ocs_hw_set_linkcfg(hw, (ocs_hw_linkcfg_e)value, OCS_CMD_NOWAIT, cb, arg);

sys/dev/ocs_fc/ocs_hw.c

2718

ocs_log_test(hw->os, "unhandled control %#x\n", ctrl);

sys/dev/ocs_fc/ocs_hw.c

2738

ocs_hw_port_free(ocs_hw_t *hw, ocs_sli_port_t *sport)

sys/dev/ocs_fc/ocs_hw.c

2742

if (!hw || !sport) {

sys/dev/ocs_fc/ocs_hw.c

2743

ocs_log_err(hw ? hw->os : NULL,

sys/dev/ocs_fc/ocs_hw.c

2744

"bad parameter(s) hw=%p sport=%p\n", hw,

sys/dev/ocs_fc/ocs_hw.c

2752

if (sli_fw_error_status(&hw->sli) > 0) {

sys/dev/ocs_fc/ocs_hw.c

2753

ocs_log_crit(hw->os, "Chip is in an error state - reset needed\n");

sys/dev/ocs_fc/ocs_hw.c

278

ocs_hw_read_max_dump_size(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

2783

ocs_hw_domain_alloc(ocs_hw_t *hw, ocs_domain_t *domain, uint32_t fcf, uint32_t vlan)

sys/dev/ocs_fc/ocs_hw.c

2788

if (!hw || !domain || !domain->sport) {

sys/dev/ocs_fc/ocs_hw.c

2790

hw, domain, domain ? domain->sport : NULL);

sys/dev/ocs_fc/ocs_hw.c

2797

if (sli_fw_error_status(&hw->sli) > 0) {

sys/dev/ocs_fc/ocs_hw.c

2798

ocs_log_crit(hw->os, "Chip is in an error state - reset needed\n");

sys/dev/ocs_fc/ocs_hw.c

2802

cmd = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

2804

ocs_log_err(hw->os, "command memory allocation failed\n");

sys/dev/ocs_fc/ocs_hw.c

2808

domain->dma = hw->domain_dmem;

sys/dev/ocs_fc/ocs_hw.c

2810

domain->hw = hw;

sys/dev/ocs_fc/ocs_hw.c

2817

if (sli_resource_alloc(&hw->sli, SLI_RSRC_FCOE_VFI, &domain->indicator, &index)) {

sys/dev/ocs_fc/ocs_hw.c

2818

ocs_log_err(hw->os, "FCOE_VFI allocation failure\n");

sys/dev/ocs_fc/ocs_hw.c

2820

ocs_free(hw->os, cmd, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

2840

ocs_hw_domain_attach(ocs_hw_t *hw, ocs_domain_t *domain, uint32_t fc_id)

sys/dev/ocs_fc/ocs_hw.c

2845

if (!hw || !domain) {

sys/dev/ocs_fc/ocs_hw.c

2846

ocs_log_err(hw ? hw->os : NULL,

sys/dev/ocs_fc/ocs_hw.c

2848

hw, domain);

sys/dev/ocs_fc/ocs_hw.c

285

if ((SLI4_IF_TYPE_LANCER_FC_ETH != sli_get_if_type(&hw->sli)) &&

sys/dev/ocs_fc/ocs_hw.c

2855

if (sli_fw_error_status(&hw->sli) > 0) {

sys/dev/ocs_fc/ocs_hw.c

2856

ocs_log_crit(hw->os, "Chip is in an error state - reset needed\n");

sys/dev/ocs_fc/ocs_hw.c

286

(SLI4_IF_TYPE_LANCER_G7 != sli_get_if_type(&hw->sli))) {

sys/dev/ocs_fc/ocs_hw.c

2860

buf = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

2862

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

287

ocs_log_debug(hw->os, "Function only supported for I/F type 2\n");

sys/dev/ocs_fc/ocs_hw.c

2884

ocs_hw_domain_free(ocs_hw_t *hw, ocs_domain_t *domain)

sys/dev/ocs_fc/ocs_hw.c

2888

if (!hw || !domain) {

sys/dev/ocs_fc/ocs_hw.c

2889

ocs_log_err(hw ? hw->os : NULL,

sys/dev/ocs_fc/ocs_hw.c

2891

hw, domain);

sys/dev/ocs_fc/ocs_hw.c

2898

if (sli_fw_error_status(&hw->sli) > 0) {

sys/dev/ocs_fc/ocs_hw.c

2899

ocs_log_crit(hw->os, "Chip is in an error state - reset needed\n");

sys/dev/ocs_fc/ocs_hw.c

2922

ocs_hw_domain_force_free(ocs_hw_t *hw, ocs_domain_t *domain)

sys/dev/ocs_fc/ocs_hw.c

2924

if (!hw || !domain) {

sys/dev/ocs_fc/ocs_hw.c

2925

ocs_log_err(NULL, "bad parameter(s) hw=%p domain=%p\n", hw, domain);

sys/dev/ocs_fc/ocs_hw.c

2929

sli_resource_free(&hw->sli, SLI_RSRC_FCOE_VFI, domain->indicator);

sys/dev/ocs_fc/ocs_hw.c

2946

ocs_hw_node_alloc(ocs_hw_t *hw, ocs_remote_node_t *rnode, uint32_t fc_addr,

sys/dev/ocs_fc/ocs_hw.c

295

if (hw->workaround.disable_dump_loc) {

sys/dev/ocs_fc/ocs_hw.c

2951

ocs_log_err(hw->os, "FCOE_RPI allocation failure addr=%#x rpi=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

2959

if (sli_fw_error_status(&hw->sli) > 0) {

sys/dev/ocs_fc/ocs_hw.c

296

ocs_log_test(hw->os, "FW version is too old for this feature\n");

sys/dev/ocs_fc/ocs_hw.c

2960

ocs_log_crit(hw->os, "Chip is in an error state - reset needed\n");

sys/dev/ocs_fc/ocs_hw.c

2967

if (sli_resource_alloc(&hw->sli, SLI_RSRC_FCOE_RPI, &rnode->indicator, &rnode->index)) {

sys/dev/ocs_fc/ocs_hw.c

2968

ocs_log_err(hw->os, "FCOE_RPI allocation failure addr=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

2990

ocs_hw_node_attach(ocs_hw_t *hw, ocs_remote_node_t *rnode, ocs_dma_t *sparms)

sys/dev/ocs_fc/ocs_hw.c

2996

if (!hw || !rnode || !sparms) {

sys/dev/ocs_fc/ocs_hw.c

2998

hw, rnode, sparms);

sys/dev/ocs_fc/ocs_hw.c

3005

if (sli_fw_error_status(&hw->sli) > 0) {

sys/dev/ocs_fc/ocs_hw.c

3006

ocs_log_crit(hw->os, "Chip is in an error state - reset needed\n");

sys/dev/ocs_fc/ocs_hw.c

301

ocs_get_bus_dev_func(hw->os, &bus, &dev, &func);

sys/dev/ocs_fc/ocs_hw.c

3010

buf = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

3012

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

3022

ocs_free(hw->os, buf, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

3025

count = ocs_atomic_add_return(&hw->rpi_ref[rnode->index].rpi_count, 1);

sys/dev/ocs_fc/ocs_hw.c

303

if (sli_cmd_common_set_dump_location(&hw->sli, buf,

sys/dev/ocs_fc/ocs_hw.c

3031

if (sli_get_hlm(&hw->sli) == FALSE) {

sys/dev/ocs_fc/ocs_hw.c

3032

ocs_log_test(hw->os, "attach to already attached node HLM=%d count=%d\n",

sys/dev/ocs_fc/ocs_hw.c

3033

sli_get_hlm(&hw->sli), count);

sys/dev/ocs_fc/ocs_hw.c

3037

rnode->attached = ocs_atomic_read(&hw->rpi_ref[rnode->index].rpi_attached);

sys/dev/ocs_fc/ocs_hw.c

3044

if (sli_cmd_reg_rpi(&hw->sli, buf, SLI4_BMBX_SIZE, rnode->fc_id,

sys/dev/ocs_fc/ocs_hw.c

3046

sparms, 0, (hw->auto_xfer_rdy_enabled && hw->config.auto_xfer_rdy_t10_enable))) {

sys/dev/ocs_fc/ocs_hw.c

3047

rc = ocs_hw_command(hw, buf, OCS_CMD_NOWAIT,

sys/dev/ocs_fc/ocs_hw.c

3054

ocs_atomic_sub_return(&hw->rpi_ref[rnode->index].rpi_count, 1);

sys/dev/ocs_fc/ocs_hw.c

3055

ocs_log_err(hw->os, "%s error\n", count ? "HLM" : "REG_RPI");

sys/dev/ocs_fc/ocs_hw.c

3057

ocs_free(hw->os, buf, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

3073

ocs_hw_node_free_resources(ocs_hw_t *hw, ocs_remote_node_t *rnode)

sys/dev/ocs_fc/ocs_hw.c

3077

if (!hw || !rnode) {

sys/dev/ocs_fc/ocs_hw.c

3079

hw, rnode);

sys/dev/ocs_fc/ocs_hw.c

3086

if (sli_resource_free(&hw->sli, SLI_RSRC_FCOE_RPI, rnode->indicator)) {

sys/dev/ocs_fc/ocs_hw.c

3087

ocs_log_err(hw->os, "FCOE_RPI free failure RPI %d addr=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

3098

ocs_log_err(hw->os, "Error: rnode is still attached\n");

sys/dev/ocs_fc/ocs_hw.c

310

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

3116

ocs_hw_node_detach(ocs_hw_t *hw, ocs_remote_node_t *rnode)

sys/dev/ocs_fc/ocs_hw.c

312

ocs_log_test(hw->os, "set dump location command failed\n");

sys/dev/ocs_fc/ocs_hw.c

3122

if (!hw || !rnode) {

sys/dev/ocs_fc/ocs_hw.c

3124

hw, rnode);

sys/dev/ocs_fc/ocs_hw.c

3131

if (sli_fw_error_status(&hw->sli) > 0) {

sys/dev/ocs_fc/ocs_hw.c

3132

ocs_log_crit(hw->os, "Chip is in an error state - reset needed\n");

sys/dev/ocs_fc/ocs_hw.c

3146

buf = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

3148

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

315

hw->dump_size = rsp->buffer_length;

sys/dev/ocs_fc/ocs_hw.c

3152

count = ocs_atomic_sub_return(&hw->rpi_ref[index].rpi_count, 1);

sys/dev/ocs_fc/ocs_hw.c

316

ocs_log_debug(hw->os, "Dump size %x\n", rsp->buffer_length);

sys/dev/ocs_fc/ocs_hw.c

3161

if (sli_get_hlm(&hw->sli) == FALSE) {

sys/dev/ocs_fc/ocs_hw.c

3162

ocs_log_test(hw->os, "Invalid count with HLM disabled, count=%d\n",

sys/dev/ocs_fc/ocs_hw.c

3170

if (sli_cmd_unreg_rpi(&hw->sli, buf, SLI4_BMBX_SIZE, rnode->indicator,

sys/dev/ocs_fc/ocs_hw.c

3172

rc = ocs_hw_command(hw, buf, OCS_CMD_NOWAIT, ocs_hw_cb_node_free, rnode);

sys/dev/ocs_fc/ocs_hw.c

3176

ocs_log_err(hw->os, "UNREG_RPI failed\n");

sys/dev/ocs_fc/ocs_hw.c

3177

ocs_free(hw->os, buf, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

3194

ocs_hw_node_free_all(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

3199

if (!hw) {

sys/dev/ocs_fc/ocs_hw.c

3200

ocs_log_err(NULL, "bad parameter hw=%p\n", hw);

sys/dev/ocs_fc/ocs_hw.c

3207

if (sli_fw_error_status(&hw->sli) > 0) {

sys/dev/ocs_fc/ocs_hw.c

3208

ocs_log_crit(hw->os, "Chip is in an error state - reset needed\n");

sys/dev/ocs_fc/ocs_hw.c

3212

buf = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

3214

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

3218

if (sli_cmd_unreg_rpi(&hw->sli, buf, SLI4_BMBX_SIZE, 0xffff,

sys/dev/ocs_fc/ocs_hw.c

3220

rc = ocs_hw_command(hw, buf, OCS_CMD_NOWAIT, ocs_hw_cb_node_free_all,

sys/dev/ocs_fc/ocs_hw.c

3225

ocs_log_err(hw->os, "UNREG_RPI failed\n");

sys/dev/ocs_fc/ocs_hw.c

3226

ocs_free(hw->os, buf, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

3234

ocs_hw_node_group_alloc(ocs_hw_t *hw, ocs_remote_node_group_t *ngroup)

sys/dev/ocs_fc/ocs_hw.c

3237

if (!hw || !ngroup) {

sys/dev/ocs_fc/ocs_hw.c

3239

hw, ngroup);

sys/dev/ocs_fc/ocs_hw.c

3243

if (sli_resource_alloc(&hw->sli, SLI_RSRC_FCOE_RPI, &ngroup->indicator,

sys/dev/ocs_fc/ocs_hw.c

3245

ocs_log_err(hw->os, "FCOE_RPI allocation failure addr=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

3254

ocs_hw_node_group_attach(ocs_hw_t *hw, ocs_remote_node_group_t *ngroup, ocs_remote_node_t *rnode)

sys/dev/ocs_fc/ocs_hw.c

3257

if (!hw || !ngroup || !rnode) {

sys/dev/ocs_fc/ocs_hw.c

3259

hw, ngroup, rnode);

sys/dev/ocs_fc/ocs_hw.c

3264

ocs_log_err(hw->os, "node already attached RPI=%#x addr=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

3269

if (sli_resource_free(&hw->sli, SLI_RSRC_FCOE_RPI, rnode->indicator)) {

sys/dev/ocs_fc/ocs_hw.c

3270

ocs_log_err(hw->os, "FCOE_RPI free failure RPI=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

3282

ocs_hw_node_group_free(ocs_hw_t *hw, ocs_remote_node_group_t *ngroup)

sys/dev/ocs_fc/ocs_hw.c

3286

if (!hw || !ngroup) {

sys/dev/ocs_fc/ocs_hw.c

3288

hw, ngroup);

sys/dev/ocs_fc/ocs_hw.c

3292

ref = ocs_atomic_read(&hw->rpi_ref[ngroup->index].rpi_count);

sys/dev/ocs_fc/ocs_hw.c

3295

ocs_log_debug(hw->os, "node group reference=%d (RPI=%#x)\n",

sys/dev/ocs_fc/ocs_hw.c

3298

if (sli_resource_free(&hw->sli, SLI_RSRC_FCOE_RPI, ngroup->indicator)) {

sys/dev/ocs_fc/ocs_hw.c

3299

ocs_log_err(hw->os, "FCOE_RPI free failure RPI=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

3304

ocs_atomic_set(&hw->rpi_ref[ngroup->index].rpi_count, 0);

sys/dev/ocs_fc/ocs_hw.c

3355

_ocs_hw_io_alloc(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

3359

if (NULL != (io = ocs_list_remove_head(&hw->io_free))) {

sys/dev/ocs_fc/ocs_hw.c

3360

ocs_list_add_tail(&hw->io_inuse, io);

sys/dev/ocs_fc/ocs_hw.c

3367

ocs_atomic_add_return(&hw->io_alloc_failed_count, 1);

sys/dev/ocs_fc/ocs_hw.c

3385

ocs_hw_io_alloc(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

3389

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

339

ocs_hw_setup(ocs_hw_t *hw, ocs_os_handle_t os, sli4_port_type_e port_type)

sys/dev/ocs_fc/ocs_hw.c

3390

io = _ocs_hw_io_alloc(hw);

sys/dev/ocs_fc/ocs_hw.c

3391

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

3413

ocs_hw_io_activate_port_owned(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

3416

ocs_log_err(hw->os, "Bad parameter: refcount > 0\n");

sys/dev/ocs_fc/ocs_hw.c

3421

ocs_log_err(hw->os, "XRI %x already in use\n", io->indicator);

sys/dev/ocs_fc/ocs_hw.c

344

if (hw == NULL) {

sys/dev/ocs_fc/ocs_hw.c

3444

ocs_hw_io_free_move_correct_list(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

3448

ocs_list_add_tail(&hw->io_wait_free, io);

sys/dev/ocs_fc/ocs_hw.c

345

ocs_log_err(os, "bad parameter(s) hw=%p\n", hw);

sys/dev/ocs_fc/ocs_hw.c

3452

ocs_list_add_tail(&hw->io_free, io);

sys/dev/ocs_fc/ocs_hw.c

3457

if (hw->workaround.use_dif_sec_xri) {

sys/dev/ocs_fc/ocs_hw.c

3458

ocs_hw_check_sec_hio_list(hw);

sys/dev/ocs_fc/ocs_hw.c

3471

ocs_hw_io_free_common(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

3477

ocs_hw_io_restore_sgl(hw, io);

sys/dev/ocs_fc/ocs_hw.c

349

if (hw->hw_setup_called) {

sys/dev/ocs_fc/ocs_hw.c

3490

ocs_hw_t *hw = io->hw;

sys/dev/ocs_fc/ocs_hw.c

3497

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

3500

ocs_list_add_tail(&hw->io_port_dnrx, io);

sys/dev/ocs_fc/ocs_hw.c

3501

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

3505

ocs_hw_io_free_common(hw, io);

sys/dev/ocs_fc/ocs_hw.c

3519

ocs_hw_t *hw = io->hw;

sys/dev/ocs_fc/ocs_hw.c

3522

ocs_hw_io_free_common(hw, io);

sys/dev/ocs_fc/ocs_hw.c

3524

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

3526

ocs_list_remove(&hw->io_inuse, io);

sys/dev/ocs_fc/ocs_hw.c

3527

ocs_hw_io_free_move_correct_list(hw, io);

sys/dev/ocs_fc/ocs_hw.c

3528

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

353

ocs_hw_workaround_setup(hw);

sys/dev/ocs_fc/ocs_hw.c

3545

ocs_hw_io_free(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

3549

ocs_log_err(hw->os, "Bad parameter: refcount <= 0 xri=%x tag=%x\n",

sys/dev/ocs_fc/ocs_hw.c

3572

ocs_hw_io_inuse(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

3609

queue_rc = _sli_queue_write(&wq->hw->sli, wq->queue, wqe->wqebuf);

sys/dev/ocs_fc/ocs_hw.c

3615

ocs_queue_history_wq(&wq->hw->q_hist, (void *) wqe->wqebuf, wq->queue->id, queue_rc);

sys/dev/ocs_fc/ocs_hw.c

362

ocs_memset(hw, 0, sizeof(ocs_hw_t));

sys/dev/ocs_fc/ocs_hw.c

364

hw->hw_setup_called = TRUE;

sys/dev/ocs_fc/ocs_hw.c

3650

sli_abort_wqe(&wq->hw->sli, wqe->wqebuf, wq->hw->sli.config.wqe_size, SLI_ABORT_XRI,

sys/dev/ocs_fc/ocs_hw.c

366

hw->os = os;

sys/dev/ocs_fc/ocs_hw.c

368

ocs_lock_init(hw->os, &hw->cmd_lock, "HW_cmd_lock[%d]", ocs_instance(hw->os));

sys/dev/ocs_fc/ocs_hw.c

369

ocs_list_init(&hw->cmd_head, ocs_command_ctx_t, link);

sys/dev/ocs_fc/ocs_hw.c

3698

sli_abort_wqe(&wq->hw->sli, wqe->wqebuf, wq->hw->sli.config.wqe_size, SLI_ABORT_XRI,

sys/dev/ocs_fc/ocs_hw.c

370

ocs_list_init(&hw->cmd_pending, ocs_command_ctx_t, link);

sys/dev/ocs_fc/ocs_hw.c

371

hw->cmd_head_count = 0;

sys/dev/ocs_fc/ocs_hw.c

3722

ocs_hw_check_sec_hio_list(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

3728

while (!ocs_list_empty(&hw->sec_hio_wait_list)) {

sys/dev/ocs_fc/ocs_hw.c

373

ocs_lock_init(hw->os, &hw->io_lock, "HW_io_lock[%d]", ocs_instance(hw->os));

sys/dev/ocs_fc/ocs_hw.c

3731

sec_io = _ocs_hw_io_alloc(hw);

sys/dev/ocs_fc/ocs_hw.c

3736

io = ocs_list_remove_head(&hw->sec_hio_wait_list);

sys/dev/ocs_fc/ocs_hw.c

3737

ocs_list_add_tail(&hw->io_inuse, io);

sys/dev/ocs_fc/ocs_hw.c

374

ocs_lock_init(hw->os, &hw->io_abort_lock, "HW_io_abort_lock[%d]", ocs_instance(hw->os));

sys/dev/ocs_fc/ocs_hw.c

3757

if (sli_fcp_cont_treceive64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, &io->def_sgl,

sys/dev/ocs_fc/ocs_hw.c

376

ocs_atomic_init(&hw->io_alloc_failed_count, 0);

sys/dev/ocs_fc/ocs_hw.c

3764

ocs_log_test(hw->os, "TRECEIVE WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

3768

if (sli_fcp_treceive64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, &io->def_sgl,

sys/dev/ocs_fc/ocs_hw.c

3776

ocs_log_test(hw->os, "TRECEIVE WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

378

hw->config.speed = FC_LINK_SPEED_AUTO_16_8_4;

sys/dev/ocs_fc/ocs_hw.c

3782

io->wq = ocs_hw_queue_next_wq(hw, io);

sys/dev/ocs_fc/ocs_hw.c

379

hw->config.dif_seed = 0;

sys/dev/ocs_fc/ocs_hw.c

3791

ocs_hw_add_io_timed_wqe(hw, io);

sys/dev/ocs_fc/ocs_hw.c

3798

ocs_log_err(hw->os, "sli_queue_write failed: %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

380

hw->config.auto_xfer_rdy_blk_size_chip = OCS_HW_AUTO_XFER_RDY_BLK_SIZE_DEFAULT;

sys/dev/ocs_fc/ocs_hw.c

3800

ocs_hw_remove_io_timed_wqe(hw, io);

sys/dev/ocs_fc/ocs_hw.c

381

hw->config.auto_xfer_rdy_ref_tag_is_lba = OCS_HW_AUTO_XFER_RDY_REF_TAG_IS_LBA_DEFAULT;

sys/dev/ocs_fc/ocs_hw.c

382

hw->config.auto_xfer_rdy_app_tag_valid = OCS_HW_AUTO_XFER_RDY_APP_TAG_VALID_DEFAULT;

sys/dev/ocs_fc/ocs_hw.c

383

hw->config.auto_xfer_rdy_app_tag_value = OCS_HW_AUTO_XFER_RDY_APP_TAG_VALUE_DEFAULT;

sys/dev/ocs_fc/ocs_hw.c

3837

ocs_hw_srrs_send(ocs_hw_t *hw, ocs_hw_io_type_e type, ocs_hw_io_t *io,

sys/dev/ocs_fc/ocs_hw.c

3846

if (!hw || !io || !rnode || !iparam) {

sys/dev/ocs_fc/ocs_hw.c

3848

hw, io, send, receive, rnode, iparam);

sys/dev/ocs_fc/ocs_hw.c

385

if (sli_setup(&hw->sli, hw->os, port_type)) {

sys/dev/ocs_fc/ocs_hw.c

3852

if (hw->state != OCS_HW_STATE_ACTIVE) {

sys/dev/ocs_fc/ocs_hw.c

3853

ocs_log_test(hw->os, "cannot send SRRS, HW state=%d\n", hw->state);

sys/dev/ocs_fc/ocs_hw.c

3857

if (ocs_hw_is_xri_port_owned(hw, io->indicator)) {

sys/dev/ocs_fc/ocs_hw.c

386

ocs_log_err(hw->os, "SLI setup failed\n");

sys/dev/ocs_fc/ocs_hw.c

3890

if ( (!send) || sli_els_request64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, io->sgl,

sys/dev/ocs_fc/ocs_hw.c

3894

ocs_log_err(hw->os, "REQ WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

3899

if ( (!send) || sli_xmit_els_rsp64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, send, len,

sys/dev/ocs_fc/ocs_hw.c

390

ocs_memset(hw->domains, 0, sizeof(hw->domains));

sys/dev/ocs_fc/ocs_hw.c

3903

ocs_log_err(hw->os, "RSP WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

3908

if ( (!send) || sli_xmit_els_rsp64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, send, len,

sys/dev/ocs_fc/ocs_hw.c

3912

ocs_log_err(hw->os, "RSP (SID) WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

3917

if ( (!send) || sli_gen_request64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, io->sgl, len,

sys/dev/ocs_fc/ocs_hw.c

392

ocs_memset(hw->fcf_index_fcfi, 0, sizeof(hw->fcf_index_fcfi));

sys/dev/ocs_fc/ocs_hw.c

3921

ocs_log_err(hw->os, "GEN WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

3926

if ( (!send) || sli_xmit_sequence64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, io->sgl, len,

sys/dev/ocs_fc/ocs_hw.c

3930

ocs_log_err(hw->os, "XMIT SEQ WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

394

ocs_hw_link_event_init(hw);

sys/dev/ocs_fc/ocs_hw.c

3950

if (sli_xmit_bls_rsp64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, &bls,

sys/dev/ocs_fc/ocs_hw.c

3954

ocs_log_err(hw->os, "XMIT_BLS_RSP64 WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

396

sli_callback(&hw->sli, SLI4_CB_LINK, ocs_hw_cb_link, hw);

sys/dev/ocs_fc/ocs_hw.c

3969

if (sli_xmit_bls_rsp64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, &bls,

sys/dev/ocs_fc/ocs_hw.c

397

sli_callback(&hw->sli, SLI4_CB_FIP, ocs_hw_cb_fip, hw);

sys/dev/ocs_fc/ocs_hw.c

3973

ocs_log_err(hw->os, "XMIT_BLS_RSP64 WQE SID error\n");

sys/dev/ocs_fc/ocs_hw.c

3979

if ( (!send) || sli_xmit_bcast64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, send, len,

sys/dev/ocs_fc/ocs_hw.c

3983

ocs_log_err(hw->os, "XMIT_BCAST64 WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

3988

ocs_log_err(hw->os, "bad SRRS type %#x\n", type);

sys/dev/ocs_fc/ocs_hw.c

3994

io->wq = ocs_hw_queue_next_wq(hw, io);

sys/dev/ocs_fc/ocs_hw.c

4004

ocs_hw_add_io_timed_wqe(hw, io);

sys/dev/ocs_fc/ocs_hw.c

4011

ocs_log_err(hw->os, "sli_queue_write failed: %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

4013

ocs_hw_remove_io_timed_wqe(hw, io);

sys/dev/ocs_fc/ocs_hw.c

403

for (i = 0; i < ARRAY_SIZE(hw->num_qentries); i++) {

sys/dev/ocs_fc/ocs_hw.c

404

hw->num_qentries[i] = sli_get_max_qentries(&hw->sli, i);

sys/dev/ocs_fc/ocs_hw.c

4049

ocs_hw_io_send(ocs_hw_t *hw, ocs_hw_io_type_e type, ocs_hw_io_t *io,

sys/dev/ocs_fc/ocs_hw.c

4060

if (!hw || !io || !rnode || !iparam) {

sys/dev/ocs_fc/ocs_hw.c

4062

hw, io, iparam, rnode);

sys/dev/ocs_fc/ocs_hw.c

4066

if (hw->state != OCS_HW_STATE_ACTIVE) {

sys/dev/ocs_fc/ocs_hw.c

4067

ocs_log_err(hw->os, "cannot send IO, HW state=%d\n", hw->state);

sys/dev/ocs_fc/ocs_hw.c

4073

if (hw->workaround.use_unregistered_rpi && (rpi == UINT32_MAX)) {

sys/dev/ocs_fc/ocs_hw.c

4074

rpi = hw->workaround.unregistered_rid;

sys/dev/ocs_fc/ocs_hw.c

4075

ocs_log_test(hw->os, "using unregistered RPI: %d\n", rpi);

sys/dev/ocs_fc/ocs_hw.c

4097

if (hw->workaround.use_dif_quarantine && (hw->config.dif_mode == OCS_HW_DIF_MODE_SEPARATE) &&

sys/dev/ocs_fc/ocs_hw.c

410

hw->config.rq_default_buffer_size = OCS_HW_RQ_SIZE_PAYLOAD;

sys/dev/ocs_fc/ocs_hw.c

4102

ocs_hw_io_ini_sge(hw, io, iparam->fcp_ini.cmnd, iparam->fcp_ini.cmnd_size,

sys/dev/ocs_fc/ocs_hw.c

4105

if (sli_fcp_iread64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, &io->def_sgl, io->first_data_sge, len,

sys/dev/ocs_fc/ocs_hw.c

4109

ocs_log_err(hw->os, "IREAD WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

411

hw->config.n_io = sli_get_max_rsrc(&hw->sli, SLI_RSRC_FCOE_XRI);

sys/dev/ocs_fc/ocs_hw.c

4116

ocs_hw_io_ini_sge(hw, io, iparam->fcp_ini.cmnd, iparam->fcp_ini.cmnd_size,

sys/dev/ocs_fc/ocs_hw.c

4119

if (sli_fcp_iwrite64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, &io->def_sgl, io->first_data_sge,

sys/dev/ocs_fc/ocs_hw.c

4125

ocs_log_err(hw->os, "IWRITE WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

413

hw->config.auto_xfer_rdy_xri_cnt = ocs_strtoul(prop_buf, 0, 0);

sys/dev/ocs_fc/ocs_hw.c

4132

ocs_hw_io_ini_sge(hw, io, iparam->fcp_ini.cmnd, iparam->fcp_ini.cmnd_size,

sys/dev/ocs_fc/ocs_hw.c

4135

if (sli_fcp_icmnd64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, &io->def_sgl,

sys/dev/ocs_fc/ocs_hw.c

4138

ocs_log_err(hw->os, "ICMND WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

4165

if (hw->workaround.use_dif_quarantine && (hw->config.dif_mode == OCS_HW_DIF_MODE_SEPARATE) &&

sys/dev/ocs_fc/ocs_hw.c

417

hw->config.i_only_aab = TRUE;

sys/dev/ocs_fc/ocs_hw.c

4178

if (hw->workaround.use_dif_sec_xri && (iparam->fcp_tgt.dif_oper != OCS_HW_DIF_OPER_DISABLED)) {

sys/dev/ocs_fc/ocs_hw.c

4187

io->sec_hio = ocs_hw_io_alloc(hw);

sys/dev/ocs_fc/ocs_hw.c

4195

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

4196

ocs_list_remove(&hw->io_inuse, io);

sys/dev/ocs_fc/ocs_hw.c

4197

ocs_list_add_tail(&hw->sec_hio_wait_list, io);

sys/dev/ocs_fc/ocs_hw.c

4199

hw->sec_hio_wait_count++;

sys/dev/ocs_fc/ocs_hw.c

420

ocs_hw_workaround_setup(hw);

sys/dev/ocs_fc/ocs_hw.c

4200

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

4216

if (sli_fcp_cont_treceive64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, &io->def_sgl, io->first_data_sge,

sys/dev/ocs_fc/ocs_hw.c

4223

ocs_log_err(hw->os, "TRECEIVE WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

4227

if (sli_fcp_treceive64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, &io->def_sgl, io->first_data_sge,

sys/dev/ocs_fc/ocs_hw.c

423

if (hw->workaround.override_fcfi) {

sys/dev/ocs_fc/ocs_hw.c

4234

ocs_log_err(hw->os, "TRECEIVE WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

424

hw->first_domain_idx = -1;

sys/dev/ocs_fc/ocs_hw.c

4250

if (sli_fcp_tsend64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size, &io->def_sgl, io->first_data_sge,

sys/dev/ocs_fc/ocs_hw.c

4259

ocs_log_err(hw->os, "TSEND WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

4261

} else if (hw->workaround.retain_tsend_io_length) {

sys/dev/ocs_fc/ocs_hw.c

4276

if (hw->auto_xfer_rdy_enabled && io->is_port_owned) {

sys/dev/ocs_fc/ocs_hw.c

4277

if ((io->auto_xfer_rdy_dnrx = ocs_hw_rqpair_auto_xfer_rdy_buffer_post(hw, io, 1))) {

sys/dev/ocs_fc/ocs_hw.c

428

if ((SLI4_IF_TYPE_LANCER_FC_ETH == sli_get_if_type(&hw->sli)) ||

sys/dev/ocs_fc/ocs_hw.c

4283

if (sli_fcp_trsp64_wqe(&hw->sli, io->wqe.wqebuf, hw->sli.config.wqe_size,

sys/dev/ocs_fc/ocs_hw.c

429

(SLI4_IF_TYPE_LANCER_G7 == sli_get_if_type(&hw->sli))) {

sys/dev/ocs_fc/ocs_hw.c

4293

ocs_log_err(hw->os, "TRSP WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

4300

ocs_log_err(hw->os, "unsupported IO type %#x\n", type);

sys/dev/ocs_fc/ocs_hw.c

4306

io->wq = ocs_hw_queue_next_wq(hw, io);

sys/dev/ocs_fc/ocs_hw.c

431

(void)ocs_hw_read_max_dump_size(hw);

sys/dev/ocs_fc/ocs_hw.c

4316

OCS_STAT(hw->tcmd_wq_submit[io->wq->instance]++);

sys/dev/ocs_fc/ocs_hw.c

4318

ocs_hw_add_io_timed_wqe(hw, io);

sys/dev/ocs_fc/ocs_hw.c

4325

ocs_log_err(hw->os, "sli_queue_write failed: %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

4327

ocs_hw_remove_io_timed_wqe(hw, io);

sys/dev/ocs_fc/ocs_hw.c

435

ocs_hw_adjust_wqs(hw);

sys/dev/ocs_fc/ocs_hw.c

4352

ocs_hw_send_frame(ocs_hw_t *hw, fc_header_le_t *hdr, uint8_t sof, uint8_t eof, ocs_dma_t *payload,

sys/dev/ocs_fc/ocs_hw.c

4363

ctx->hw = hw;

sys/dev/ocs_fc/ocs_hw.c

4366

ctx->wqcb = ocs_hw_reqtag_alloc(hw, callback, arg);

sys/dev/ocs_fc/ocs_hw.c

4368

ocs_log_err(hw->os, "can't allocate request tag\n");

sys/dev/ocs_fc/ocs_hw.c

4373

wq = ocs_varray_iter_next(hw->wq_class_array[1]);

sys/dev/ocs_fc/ocs_hw.c

4375

wq = hw->hw_wq[0];

sys/dev/ocs_fc/ocs_hw.c

438

if (! sli_is_dif_inline_capable(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

4382

rc = sli_send_frame_wqe(&hw->sli, wqe->wqebuf, hw->sli.config.wqe_size, sof, eof, (uint32_t*) hdr, payload,

sys/dev/ocs_fc/ocs_hw.c

4385

ocs_log_err(hw->os, "sli_send_frame_wqe failed: %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

439

ocs_log_test(hw->os, "not inline capable, setting mode to separate\n");

sys/dev/ocs_fc/ocs_hw.c

4392

ocs_log_err(hw->os, "hw_wq_write failed: %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

440

hw->config.dif_mode = OCS_HW_DIF_MODE_SEPARATE;

sys/dev/ocs_fc/ocs_hw.c

4402

ocs_hw_io_register_sgl(ocs_hw_t *hw, ocs_hw_io_t *io, ocs_dma_t *sgl, uint32_t sgl_count)

sys/dev/ocs_fc/ocs_hw.c

4404

if (sli_get_sgl_preregister(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

4405

ocs_log_err(hw->os, "can't use temporary SGL with pre-registered SGLs\n");

sys/dev/ocs_fc/ocs_hw.c

4416

ocs_hw_io_restore_sgl(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

443

if (hw->workaround.use_dif_sec_xri) {

sys/dev/ocs_fc/ocs_hw.c

4431

ocs_hw_io_free(hw, io->ovfl_io);

sys/dev/ocs_fc/ocs_hw.c

444

ocs_list_init(&hw->sec_hio_wait_list, ocs_hw_io_t, link);

sys/dev/ocs_fc/ocs_hw.c

4452

ocs_hw_io_init_sges(ocs_hw_t *hw, ocs_hw_io_t *io, ocs_hw_io_type_e type)

sys/dev/ocs_fc/ocs_hw.c

4458

if (!hw || !io) {

sys/dev/ocs_fc/ocs_hw.c

4459

ocs_log_err(hw ? hw->os : NULL, "bad parameter hw=%p io=%p\n",

sys/dev/ocs_fc/ocs_hw.c

4460

hw, io);

sys/dev/ocs_fc/ocs_hw.c

451

if (sli_get_is_dual_ulp_capable(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

452

if (sli_get_is_ulp_enabled(&hw->sli, 0) &&

sys/dev/ocs_fc/ocs_hw.c

453

sli_get_is_ulp_enabled(&hw->sli, 1)) {

sys/dev/ocs_fc/ocs_hw.c

4531

ocs_log_err(hw->os, "unsupported IO type %#x\n", type);

sys/dev/ocs_fc/ocs_hw.c

454

hw->ulp_start = 0;

sys/dev/ocs_fc/ocs_hw.c

455

hw->ulp_max = 1;

sys/dev/ocs_fc/ocs_hw.c

456

} else if (sli_get_is_ulp_enabled(&hw->sli, 0)) {

sys/dev/ocs_fc/ocs_hw.c

4564

ocs_hw_io_add_seed_sge(ocs_hw_t *hw, ocs_hw_io_t *io, ocs_hw_dif_info_t *dif_info)

sys/dev/ocs_fc/ocs_hw.c

457

hw->ulp_start = 0;

sys/dev/ocs_fc/ocs_hw.c

4574

if (!hw || !io) {

sys/dev/ocs_fc/ocs_hw.c

4575

ocs_log_err(hw ? hw->os : NULL, "bad parameter hw=%p io=%p dif_info=%p\n",

sys/dev/ocs_fc/ocs_hw.c

4576

hw, io, dif_info);

sys/dev/ocs_fc/ocs_hw.c

458

hw->ulp_max = 0;

sys/dev/ocs_fc/ocs_hw.c

4590

if (SLI4_IF_TYPE_LANCER_FC_ETH != hw->sli.if_type) {

sys/dev/ocs_fc/ocs_hw.c

4597

(SLI4_IF_TYPE_LANCER_FC_ETH != hw->sli.if_type) && dif_info->dif_separate) {

sys/dev/ocs_fc/ocs_hw.c

460

hw->ulp_start = 1;

sys/dev/ocs_fc/ocs_hw.c

461

hw->ulp_max = 1;

sys/dev/ocs_fc/ocs_hw.c

464

if (sli_get_is_ulp_enabled(&hw->sli, 0)) {

sys/dev/ocs_fc/ocs_hw.c

4647

ocs_log_err(hw->os, "unsupported DIF operation %#x\n",

sys/dev/ocs_fc/ocs_hw.c

465

hw->ulp_start = 0;

sys/dev/ocs_fc/ocs_hw.c

466

hw->ulp_max = 0;

sys/dev/ocs_fc/ocs_hw.c

4666

ocs_hw_io_overflow_sgl(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

468

hw->ulp_start = 1;

sys/dev/ocs_fc/ocs_hw.c

4681

if (sli_get_sgl_preregister(&hw->sli) &&

sys/dev/ocs_fc/ocs_hw.c

4684

((SLI4_IF_TYPE_BE3_SKH_PF == sli_get_if_type(&hw->sli)) ||

sys/dev/ocs_fc/ocs_hw.c

4685

(SLI4_IF_TYPE_BE3_SKH_VF == sli_get_if_type(&hw->sli)))) {

sys/dev/ocs_fc/ocs_hw.c

4686

io->ovfl_io = ocs_hw_io_alloc(hw);

sys/dev/ocs_fc/ocs_hw.c

469

hw->ulp_max = 1;

sys/dev/ocs_fc/ocs_hw.c

4713

if ((SLI4_IF_TYPE_BE3_SKH_PF == sli_get_if_type(&hw->sli)) ||

sys/dev/ocs_fc/ocs_hw.c

4714

(SLI4_IF_TYPE_BE3_SKH_VF == sli_get_if_type(&hw->sli))) {

sys/dev/ocs_fc/ocs_hw.c

4715

sli_skh_chain_sge_build(&hw->sli,

sys/dev/ocs_fc/ocs_hw.c

472

ocs_log_debug(hw->os, "ulp_start %d, ulp_max %d\n",

sys/dev/ocs_fc/ocs_hw.c

473

hw->ulp_start, hw->ulp_max);

sys/dev/ocs_fc/ocs_hw.c

474

hw->config.queue_topology = hw_global.queue_topology_string;

sys/dev/ocs_fc/ocs_hw.c

4749

ocs_hw_io_add_sge(ocs_hw_t *hw, ocs_hw_io_t *io, uintptr_t addr, uint32_t length)

sys/dev/ocs_fc/ocs_hw.c

4753

if (!hw || !io || !addr || !length) {

sys/dev/ocs_fc/ocs_hw.c

4754

ocs_log_err(hw ? hw->os : NULL,

sys/dev/ocs_fc/ocs_hw.c

4756

hw, io, addr, length);

sys/dev/ocs_fc/ocs_hw.c

476

hw->qtop = ocs_hw_qtop_parse(hw, hw->config.queue_topology);

sys/dev/ocs_fc/ocs_hw.c

4761

if (ocs_hw_io_overflow_sgl(hw, io) != OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_hw.c

4762

ocs_log_err(hw->os, "SGL full (%d)\n", io->n_sge);

sys/dev/ocs_fc/ocs_hw.c

4767

if (length > sli_get_max_sge(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

4768

ocs_log_err(hw->os, "length of SGE %d bigger than allowed %d\n",

sys/dev/ocs_fc/ocs_hw.c

4769

length, sli_get_max_sge(&hw->sli));

sys/dev/ocs_fc/ocs_hw.c

478

hw->config.n_eq = hw->qtop->entry_counts[QTOP_EQ];

sys/dev/ocs_fc/ocs_hw.c

479

hw->config.n_cq = hw->qtop->entry_counts[QTOP_CQ];

sys/dev/ocs_fc/ocs_hw.c

480

hw->config.n_rq = hw->qtop->entry_counts[QTOP_RQ];

sys/dev/ocs_fc/ocs_hw.c

481

hw->config.n_wq = hw->qtop->entry_counts[QTOP_WQ];

sys/dev/ocs_fc/ocs_hw.c

4818

ocs_hw_io_add_dif_sge(ocs_hw_t *hw, ocs_hw_io_t *io, uintptr_t addr)

sys/dev/ocs_fc/ocs_hw.c

482

hw->config.n_mq = hw->qtop->entry_counts[QTOP_MQ];

sys/dev/ocs_fc/ocs_hw.c

4822

if (!hw || !io || !addr) {

sys/dev/ocs_fc/ocs_hw.c

4823

ocs_log_err(hw ? hw->os : NULL,

sys/dev/ocs_fc/ocs_hw.c

4825

hw, io, addr);

sys/dev/ocs_fc/ocs_hw.c

4829

if ((io->n_sge + 1) > hw->config.n_sgl) {

sys/dev/ocs_fc/ocs_hw.c

4830

if (ocs_hw_io_overflow_sgl(hw, io) != OCS_HW_RTN_ERROR) {

sys/dev/ocs_fc/ocs_hw.c

4831

ocs_log_err(hw->os, "SGL full (%d)\n", io->n_sge);

sys/dev/ocs_fc/ocs_hw.c

4842

(SLI4_IF_TYPE_LANCER_FC_ETH != hw->sli.if_type)) {

sys/dev/ocs_fc/ocs_hw.c

485

if (hw->config.n_rq > OCE_HW_MAX_NUM_MRQ_PAIRS) {

sys/dev/ocs_fc/ocs_hw.c

486

ocs_log_crit(hw->os, "Max supported MRQ pairs = %d\n",

sys/dev/ocs_fc/ocs_hw.c

4878

ocs_hw_io_abort(ocs_hw_t *hw, ocs_hw_io_t *io_to_abort, uint32_t send_abts, void *cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

4885

if (!hw || !io_to_abort) {

sys/dev/ocs_fc/ocs_hw.c

4886

ocs_log_err(hw ? hw->os : NULL,

sys/dev/ocs_fc/ocs_hw.c

4888

hw, io_to_abort);

sys/dev/ocs_fc/ocs_hw.c

4892

if (hw->state != OCS_HW_STATE_ACTIVE) {

sys/dev/ocs_fc/ocs_hw.c

4893

ocs_log_err(hw->os, "cannot send IO abort, HW state=%d\n",

sys/dev/ocs_fc/ocs_hw.c

4894

hw->state);

sys/dev/ocs_fc/ocs_hw.c

4901

ocs_log_test(hw ? hw->os : NULL,

sys/dev/ocs_fc/ocs_hw.c

491

if (hw->config.n_eq > OCS_HW_MAX_NUM_EQ) {

sys/dev/ocs_fc/ocs_hw.c

4910

ocs_log_test(hw->os, "io_to_abort xri=0x%x not active on WQ\n",

sys/dev/ocs_fc/ocs_hw.c

4917

ocs_lock(&hw->io_abort_lock);

sys/dev/ocs_fc/ocs_hw.c

4919

ocs_unlock(&hw->io_abort_lock);

sys/dev/ocs_fc/ocs_hw.c

492

ocs_log_crit(hw->os, "Max supported EQs = %d\n",

sys/dev/ocs_fc/ocs_hw.c

4921

ocs_log_debug(hw ? hw->os : NULL,

sys/dev/ocs_fc/ocs_hw.c

4932

ocs_unlock(&hw->io_abort_lock);

sys/dev/ocs_fc/ocs_hw.c

4955

wqcb = ocs_hw_reqtag_alloc(hw, ocs_hw_wq_process_abort, io_to_abort);

sys/dev/ocs_fc/ocs_hw.c

4957

ocs_log_err(hw->os, "can't allocate request tag\n");

sys/dev/ocs_fc/ocs_hw.c

497

if (hw->config.n_cq > OCS_HW_MAX_NUM_CQ) {

sys/dev/ocs_fc/ocs_hw.c

4979

if (sli_abort_wqe(&hw->sli, io_to_abort->wqe.wqebuf, hw->sli.config.wqe_size, atype, send_abts, id, mask,

sys/dev/ocs_fc/ocs_hw.c

498

ocs_log_crit(hw->os, "Max supported CQs = %d\n",

sys/dev/ocs_fc/ocs_hw.c

4981

ocs_log_err(hw->os, "ABORT WQE error\n");

sys/dev/ocs_fc/ocs_hw.c

4983

ocs_hw_reqtag_free(hw, wqcb);

sys/dev/ocs_fc/ocs_hw.c

4989

io_to_abort->wq = ocs_hw_queue_next_wq(hw, io_to_abort);

sys/dev/ocs_fc/ocs_hw.c

5005

ocs_lock(&hw->io_abort_lock);

sys/dev/ocs_fc/ocs_hw.c

5007

ocs_unlock(&hw->io_abort_lock);

sys/dev/ocs_fc/ocs_hw.c

5023

ocs_hw_io_get_xid(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

5025

if (!hw || !io) {

sys/dev/ocs_fc/ocs_hw.c

5026

ocs_log_err(hw ? hw->os : NULL,

sys/dev/ocs_fc/ocs_hw.c

5027

"bad parameter hw=%p io=%p\n", hw, io);

sys/dev/ocs_fc/ocs_hw.c

503

if (hw->config.n_wq > OCS_HW_MAX_NUM_WQ) {

sys/dev/ocs_fc/ocs_hw.c

504

ocs_log_crit(hw->os, "Max supported WQs = %d\n",

sys/dev/ocs_fc/ocs_hw.c

509

if (hw->config.n_mq > OCS_HW_MAX_NUM_MQ) {

sys/dev/ocs_fc/ocs_hw.c

5092

ocs_hw_firmware_write(ocs_hw_t *hw, ocs_dma_t *dma, uint32_t size, uint32_t offset, int last, ocs_hw_fw_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5094

if (hw->sli.if_type == SLI4_IF_TYPE_LANCER_FC_ETH) {

sys/dev/ocs_fc/ocs_hw.c

5095

return ocs_hw_firmware_write_lancer(hw, dma, size, offset, last, cb, arg);

sys/dev/ocs_fc/ocs_hw.c

510

ocs_log_crit(hw->os, "Max supported MQs = %d\n",

sys/dev/ocs_fc/ocs_hw.c

5124

ocs_hw_firmware_write_lancer(ocs_hw_t *hw, ocs_dma_t *dma, uint32_t size, uint32_t offset, int last, ocs_hw_fw_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5131

if (SLI4_IF_TYPE_LANCER_FC_ETH != sli_get_if_type(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

5132

ocs_log_test(hw->os, "Function only supported for I/F type 2\n");

sys/dev/ocs_fc/ocs_hw.c

5136

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

5138

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

5142

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_fw_write_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

5144

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

5145

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5152

if (sli_cmd_common_write_object(&hw->sli, mbxdata, SLI4_BMBX_SIZE, noc, last,

sys/dev/ocs_fc/ocs_hw.c

5154

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_cb_fw_write, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

5158

ocs_log_test(hw->os, "COMMON_WRITE_OBJECT failed\n");

sys/dev/ocs_fc/ocs_hw.c

5159

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5160

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_fw_write_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5184

ocs_hw_cb_fw_write(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5198

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5208

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_fw_write_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5232

ocs_hw_cb_sfp(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5248

cb_arg->cb(hw->os, status, bytes_written, mbox_rsp->page_data, cb_arg->arg);

sys/dev/ocs_fc/ocs_hw.c

5251

ocs_dma_free(hw->os, &cb_arg->payload);

sys/dev/ocs_fc/ocs_hw.c

5252

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_sfp_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5255

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5271

ocs_hw_get_sfp(ocs_hw_t *hw, uint16_t page, ocs_hw_sfp_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5278

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

5280

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

5285

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_sfp_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

5287

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

5288

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5296

if (ocs_dma_alloc(hw->os, &cb_arg->payload, sizeof(sli4_res_common_read_transceiver_data_t),

sys/dev/ocs_fc/ocs_hw.c

5298

ocs_log_err(hw->os, "Failed to allocate DMA buffer\n");

sys/dev/ocs_fc/ocs_hw.c

5299

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_sfp_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5300

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5305

if (sli_cmd_common_read_transceiver_data(&hw->sli, mbxdata, SLI4_BMBX_SIZE, page,

sys/dev/ocs_fc/ocs_hw.c

5307

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_cb_sfp, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

5311

ocs_log_test(hw->os, "READ_TRANSCEIVER_DATA failed with status %d\n",

sys/dev/ocs_fc/ocs_hw.c

5313

ocs_dma_free(hw->os, &cb_arg->payload);

sys/dev/ocs_fc/ocs_hw.c

5314

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_sfp_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5315

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5331

ocs_hw_get_temperature(ocs_hw_t *hw, ocs_hw_temp_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5337

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

5339

ocs_log_err(hw->os, "failed to malloc mbox");

sys/dev/ocs_fc/ocs_hw.c

534

ocs_hw_init(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

5343

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_temp_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

5345

ocs_log_err(hw->os, "failed to malloc cb_arg");

sys/dev/ocs_fc/ocs_hw.c

5346

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5353

if (sli_cmd_dump_type4(&hw->sli, mbxdata, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

5355

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_cb_temp, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

5359

ocs_log_test(hw->os, "DUMP_TYPE4 failed\n");

sys/dev/ocs_fc/ocs_hw.c

5360

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5361

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_temp_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5383

ocs_hw_cb_temp(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5410

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_temp_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5412

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5430

ocs_hw_get_link_stats(ocs_hw_t *hw,

sys/dev/ocs_fc/ocs_hw.c

5441

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

5443

ocs_log_err(hw->os, "failed to malloc mbox");

sys/dev/ocs_fc/ocs_hw.c

5447

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_link_stat_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

5449

ocs_log_err(hw->os, "failed to malloc cb_arg");

sys/dev/ocs_fc/ocs_hw.c

5450

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5457

if (sli_cmd_read_link_stats(&hw->sli, mbxdata, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

5461

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_cb_link_stat, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

5465

ocs_log_test(hw->os, "READ_LINK_STATS failed\n");

sys/dev/ocs_fc/ocs_hw.c

5466

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5467

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_link_stat_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5489

ocs_hw_cb_link_stat(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

552

ocs_lock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

553

if (!ocs_list_empty(&hw->cmd_head)) {

sys/dev/ocs_fc/ocs_hw.c

554

ocs_log_test(hw->os, "command found on cmd list\n");

sys/dev/ocs_fc/ocs_hw.c

555

ocs_unlock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

5553

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_link_stat_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5555

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5571

ocs_hw_get_host_stats(ocs_hw_t *hw, uint8_t cc, ocs_hw_host_stat_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5577

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO);

sys/dev/ocs_fc/ocs_hw.c

5579

ocs_log_err(hw->os, "failed to malloc mbox");

sys/dev/ocs_fc/ocs_hw.c

558

if (!ocs_list_empty(&hw->cmd_pending)) {

sys/dev/ocs_fc/ocs_hw.c

5583

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_host_stat_cb_arg_t), 0);

sys/dev/ocs_fc/ocs_hw.c

5585

ocs_log_err(hw->os, "failed to malloc cb_arg");

sys/dev/ocs_fc/ocs_hw.c

5586

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

559

ocs_log_test(hw->os, "command found on pending list\n");

sys/dev/ocs_fc/ocs_hw.c

5594

if (sli_cmd_read_status(&hw->sli, mbxdata, SLI4_BMBX_SIZE, cc)) {

sys/dev/ocs_fc/ocs_hw.c

5595

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_cb_host_stat, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

5599

ocs_log_test(hw->os, "READ_HOST_STATS failed\n");

sys/dev/ocs_fc/ocs_hw.c

560

ocs_unlock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

5600

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5601

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_host_stat_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5625

ocs_hw_cb_host_stat(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

563

ocs_unlock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

566

ocs_hw_rx_free(hw);

sys/dev/ocs_fc/ocs_hw.c

5662

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_host_stat_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5664

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

579

if (ocs_list_valid(&hw->io_wait_free)) {

sys/dev/ocs_fc/ocs_hw.c

580

while ((!ocs_list_empty(&hw->io_wait_free))) {

sys/dev/ocs_fc/ocs_hw.c

582

ocs_list_remove_head(&hw->io_wait_free);

sys/dev/ocs_fc/ocs_hw.c

5823

ocs_hw_set_linkcfg(ocs_hw_t *hw, ocs_hw_linkcfg_e value, uint32_t opts, ocs_hw_port_control_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5825

if (!sli_link_is_configurable(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

5826

ocs_log_debug(hw->os, "Function not supported\n");

sys/dev/ocs_fc/ocs_hw.c

5830

if (SLI4_IF_TYPE_LANCER_FC_ETH == sli_get_if_type(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

5831

return ocs_hw_set_linkcfg_lancer(hw, value, opts, cb, arg);

sys/dev/ocs_fc/ocs_hw.c

5832

} else if ((SLI4_IF_TYPE_BE3_SKH_PF == sli_get_if_type(&hw->sli)) ||

sys/dev/ocs_fc/ocs_hw.c

5833

(SLI4_IF_TYPE_BE3_SKH_VF == sli_get_if_type(&hw->sli))) {

sys/dev/ocs_fc/ocs_hw.c

5834

return ocs_hw_set_linkcfg_skyhawk(hw, value, opts, cb, arg);

sys/dev/ocs_fc/ocs_hw.c

5836

ocs_log_test(hw->os, "Function not supported for this IF_TYPE\n");

sys/dev/ocs_fc/ocs_hw.c

585

ocs_log_debug(hw->os, "removed %d items from io_wait_free list\n", rem_count);

sys/dev/ocs_fc/ocs_hw.c

5854

ocs_hw_set_linkcfg_lancer(ocs_hw_t *hw, ocs_hw_linkcfg_e value, uint32_t opts, ocs_hw_port_control_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5865

cb_arg = ocs_malloc(hw->os, sizeof(*cb_arg), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

5867

ocs_log_err(hw->os, "failed to malloc cb_arg");

sys/dev/ocs_fc/ocs_hw.c

5873

if (ocs_dma_alloc(hw->os, &cb_arg->dma_cmd, ocs_strlen(cmd)+1, 4096)) {

sys/dev/ocs_fc/ocs_hw.c

5874

ocs_log_err(hw->os, "malloc failed\n");

sys/dev/ocs_fc/ocs_hw.c

5875

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

5882

if (ocs_dma_alloc(hw->os, &cb_arg->dma_resp, OCS_HW_DMTF_CLP_RSP_MAX, 4096)) {

sys/dev/ocs_fc/ocs_hw.c

5883

ocs_log_err(hw->os, "malloc failed\n");

sys/dev/ocs_fc/ocs_hw.c

5884

ocs_dma_free(hw->os, &cb_arg->dma_cmd);

sys/dev/ocs_fc/ocs_hw.c

5885

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

589

if (ocs_list_valid(&hw->io_inuse)) {

sys/dev/ocs_fc/ocs_hw.c

5892

rc = ocs_hw_exec_dmtf_clp_cmd(hw, &cb_arg->dma_cmd, &cb_arg->dma_resp,

sys/dev/ocs_fc/ocs_hw.c

590

while ((!ocs_list_empty(&hw->io_inuse))) {

sys/dev/ocs_fc/ocs_hw.c

5900

ocs_log_test(hw->os, "CLP cmd=\"%s\" failed\n",

sys/dev/ocs_fc/ocs_hw.c

5903

ocs_dma_free(hw->os, &cb_arg->dma_cmd);

sys/dev/ocs_fc/ocs_hw.c

5904

ocs_dma_free(hw->os, &cb_arg->dma_resp);

sys/dev/ocs_fc/ocs_hw.c

5905

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

592

ocs_list_remove_head(&hw->io_inuse);

sys/dev/ocs_fc/ocs_hw.c

5921

ocs_hw_set_active_link_config_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5926

ocs_log_test(hw->os, "SET_RECONFIG_LINK_ID failed, status=%d\n", status);

sys/dev/ocs_fc/ocs_hw.c

5936

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

595

ocs_log_debug(hw->os, "removed %d items from io_inuse list\n", rem_count);

sys/dev/ocs_fc/ocs_hw.c

5953

ocs_hw_set_linkcfg_skyhawk(ocs_hw_t *hw, ocs_hw_linkcfg_e value, uint32_t opts, ocs_hw_port_control_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

5963

ocs_log_test(hw->os, "Link config %d not supported by Skyhawk\n", value);

sys/dev/ocs_fc/ocs_hw.c

5968

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

5970

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

5975

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_linkcfg_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

5977

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

5978

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5985

if (sli_cmd_common_set_reconfig_link_id(&hw->sli, mbxdata, SLI4_BMBX_SIZE, NULL, 0, config_id)) {

sys/dev/ocs_fc/ocs_hw.c

5986

rc = ocs_hw_command(hw, mbxdata, opts, ocs_hw_set_active_link_config_cb, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

599

if (ocs_list_valid(&hw->io_free)) {

sys/dev/ocs_fc/ocs_hw.c

5990

ocs_log_err(hw->os, "SET_RECONFIG_LINK_ID failed\n");

sys/dev/ocs_fc/ocs_hw.c

5991

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5992

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_linkcfg_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

5995

ocs_hw_set_active_link_config_cb(hw, 0, mbxdata, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

5996

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

5997

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_linkcfg_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

600

while ((!ocs_list_empty(&hw->io_free))) {

sys/dev/ocs_fc/ocs_hw.c

6000

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6017

ocs_hw_get_linkcfg(ocs_hw_t *hw, uint32_t opts, ocs_hw_port_control_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

6019

if (!sli_link_is_configurable(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

602

ocs_list_remove_head(&hw->io_free);

sys/dev/ocs_fc/ocs_hw.c

6020

ocs_log_debug(hw->os, "Function not supported\n");

sys/dev/ocs_fc/ocs_hw.c

6024

if ((SLI4_IF_TYPE_LANCER_FC_ETH == sli_get_if_type(&hw->sli)) ||

sys/dev/ocs_fc/ocs_hw.c

6025

(SLI4_IF_TYPE_LANCER_G7 == sli_get_if_type(&hw->sli))){

sys/dev/ocs_fc/ocs_hw.c

6026

return ocs_hw_get_linkcfg_lancer(hw, opts, cb, arg);

sys/dev/ocs_fc/ocs_hw.c

6027

} else if ((SLI4_IF_TYPE_BE3_SKH_PF == sli_get_if_type(&hw->sli)) ||

sys/dev/ocs_fc/ocs_hw.c

6028

(SLI4_IF_TYPE_BE3_SKH_VF == sli_get_if_type(&hw->sli))) {

sys/dev/ocs_fc/ocs_hw.c

6029

return ocs_hw_get_linkcfg_skyhawk(hw, opts, cb, arg);

sys/dev/ocs_fc/ocs_hw.c

6031

ocs_log_test(hw->os, "Function not supported for this IF_TYPE\n");

sys/dev/ocs_fc/ocs_hw.c

6047

ocs_hw_get_linkcfg_lancer(ocs_hw_t *hw, uint32_t opts, ocs_hw_port_control_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

605

ocs_log_debug(hw->os, "removed %d items from io_free list\n", rem_count);

sys/dev/ocs_fc/ocs_hw.c

6054

cb_arg = ocs_malloc(hw->os, sizeof(*cb_arg), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

6056

ocs_log_err(hw->os, "failed to malloc cb_arg");

sys/dev/ocs_fc/ocs_hw.c

6063

if (ocs_dma_alloc(hw->os, &cb_arg->dma_cmd, ocs_strlen(cmd)+1, 4096)) {

sys/dev/ocs_fc/ocs_hw.c

6064

ocs_log_err(hw->os, "malloc failed\n");

sys/dev/ocs_fc/ocs_hw.c

6065

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

6074

if (ocs_dma_alloc(hw->os, &cb_arg->dma_resp, OCS_HW_DMTF_CLP_RSP_MAX, 4096)) {

sys/dev/ocs_fc/ocs_hw.c

6075

ocs_log_err(hw->os, "malloc failed\n");

sys/dev/ocs_fc/ocs_hw.c

6076

ocs_dma_free(hw->os, &cb_arg->dma_cmd);

sys/dev/ocs_fc/ocs_hw.c

6077

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

608

if (ocs_list_valid(&hw->io_port_owned)) {

sys/dev/ocs_fc/ocs_hw.c

6084

rc = ocs_hw_exec_dmtf_clp_cmd(hw, &cb_arg->dma_cmd, &cb_arg->dma_resp,

sys/dev/ocs_fc/ocs_hw.c

609

while ((!ocs_list_empty(&hw->io_port_owned))) {

sys/dev/ocs_fc/ocs_hw.c

6092

ocs_log_test(hw->os, "CLP cmd=\"%s\" failed\n",

sys/dev/ocs_fc/ocs_hw.c

6095

ocs_dma_free(hw->os, &cb_arg->dma_cmd);

sys/dev/ocs_fc/ocs_hw.c

6096

ocs_dma_free(hw->os, &cb_arg->dma_resp);

sys/dev/ocs_fc/ocs_hw.c

6097

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

610

ocs_list_remove_head(&hw->io_port_owned);

sys/dev/ocs_fc/ocs_hw.c

6113

ocs_hw_get_active_link_config_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

6120

ocs_log_test(hw->os, "GET_RECONFIG_LINK_INFO failed, status=%d\n", status);

sys/dev/ocs_fc/ocs_hw.c

613

ocs_list_init(&hw->io_inuse, ocs_hw_io_t, link);

sys/dev/ocs_fc/ocs_hw.c

6133

ocs_dma_free(hw->os, &cb_arg->dma_cmd);

sys/dev/ocs_fc/ocs_hw.c

6134

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

614

ocs_list_init(&hw->io_free, ocs_hw_io_t, link);

sys/dev/ocs_fc/ocs_hw.c

6149

ocs_hw_get_linkcfg_skyhawk(ocs_hw_t *hw, uint32_t opts, ocs_hw_port_control_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

615

ocs_list_init(&hw->io_port_owned, ocs_hw_io_t, link);

sys/dev/ocs_fc/ocs_hw.c

6156

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

6158

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

616

ocs_list_init(&hw->io_wait_free, ocs_hw_io_t, link);

sys/dev/ocs_fc/ocs_hw.c

6163

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_linkcfg_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

6165

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

6166

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

617

ocs_list_init(&hw->io_timed_wqe, ocs_hw_io_t, wqe_link);

sys/dev/ocs_fc/ocs_hw.c

6175

if (ocs_dma_alloc(hw->os, &cb_arg->dma_cmd, sizeof(sli4_res_common_get_reconfig_link_info_t), 4)) {

sys/dev/ocs_fc/ocs_hw.c

6176

ocs_log_err(hw->os, "Failed to allocate DMA buffer\n");

sys/dev/ocs_fc/ocs_hw.c

6177

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6178

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_linkcfg_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

618

ocs_list_init(&hw->io_port_dnrx, ocs_hw_io_t, dnrx_link);

sys/dev/ocs_fc/ocs_hw.c

6182

if (sli_cmd_common_get_reconfig_link_info(&hw->sli, mbxdata, SLI4_BMBX_SIZE, &cb_arg->dma_cmd)) {

sys/dev/ocs_fc/ocs_hw.c

6183

rc = ocs_hw_command(hw, mbxdata, opts, ocs_hw_get_active_link_config_cb, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

6187

ocs_log_err(hw->os, "GET_RECONFIG_LINK_INFO failed\n");

sys/dev/ocs_fc/ocs_hw.c

6188

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6189

ocs_dma_free(hw->os, &cb_arg->dma_cmd);

sys/dev/ocs_fc/ocs_hw.c

6190

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_linkcfg_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

6193

ocs_hw_get_active_link_config_cb(hw, 0, mbxdata, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

6194

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6195

ocs_dma_free(hw->os, &cb_arg->dma_cmd);

sys/dev/ocs_fc/ocs_hw.c

6196

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_linkcfg_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

6199

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

621

if (hw->config.n_rq == 1) {

sys/dev/ocs_fc/ocs_hw.c

6213

ocs_hw_set_dif_seed(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

622

hw->sli.config.features.flag.mrqp = FALSE;

sys/dev/ocs_fc/ocs_hw.c

6220

seed_param.seed = hw->config.dif_seed;

sys/dev/ocs_fc/ocs_hw.c

6223

if (sli_cmd_common_set_features(&hw->sli, buf, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

6227

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

6229

ocs_log_err(hw->os, "ocs_hw_command returns %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

6231

ocs_log_debug(hw->os, "DIF seed set to 0x%x\n",

sys/dev/ocs_fc/ocs_hw.c

6232

hw->config.dif_seed);

sys/dev/ocs_fc/ocs_hw.c

6235

ocs_log_err(hw->os, "sli_cmd_common_set_features failed\n");

sys/dev/ocs_fc/ocs_hw.c

6249

ocs_hw_set_dif_mode(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

625

if (sli_init(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

6256

mode_param.tmm = (hw->config.dif_mode == OCS_HW_DIF_MODE_INLINE ? 0 : 1);

sys/dev/ocs_fc/ocs_hw.c

6259

if (sli_cmd_common_set_features(&hw->sli, buf, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

626

ocs_log_err(hw->os, "SLI failed to initialize\n");

sys/dev/ocs_fc/ocs_hw.c

6263

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

6265

ocs_log_err(hw->os, "ocs_hw_command returns %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

6267

ocs_log_test(hw->os, "DIF mode set to %s\n",

sys/dev/ocs_fc/ocs_hw.c

6268

(hw->config.dif_mode == OCS_HW_DIF_MODE_INLINE ? "inline" : "separate"));

sys/dev/ocs_fc/ocs_hw.c

6271

ocs_log_err(hw->os, "sli_cmd_common_set_features failed\n");

sys/dev/ocs_fc/ocs_hw.c

6280

ocs_hw_t *hw = (ocs_hw_t *)arg;

sys/dev/ocs_fc/ocs_hw.c

6282

ocs_hw_config_watchdog_timer(hw);

sys/dev/ocs_fc/ocs_hw.c

6287

ocs_hw_cb_cfg_watchdog(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

6289

uint16_t timeout = hw->watchdog_timeout;

sys/dev/ocs_fc/ocs_hw.c

6292

ocs_log_err(hw->os, "config watchdog timer failed, rc = %d\n", status);

sys/dev/ocs_fc/ocs_hw.c

6296

ocs_setup_timer(hw->os, &hw->watchdog_timer, ocs_hw_watchdog_timer_cb, hw, (timeout*1000 - 500) );

sys/dev/ocs_fc/ocs_hw.c

6298

ocs_del_timer(&hw->watchdog_timer);

sys/dev/ocs_fc/ocs_hw.c

6302

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6315

ocs_hw_config_watchdog_timer(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

6318

uint8_t *buf = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

6321

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

6325

sli4_cmd_lowlevel_set_watchdog(&hw->sli, buf, SLI4_BMBX_SIZE, hw->watchdog_timeout);

sys/dev/ocs_fc/ocs_hw.c

6326

rc = ocs_hw_command(hw, buf, OCS_CMD_NOWAIT, ocs_hw_cb_cfg_watchdog, NULL);

sys/dev/ocs_fc/ocs_hw.c

6328

ocs_free(hw->os, buf, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6329

ocs_log_err(hw->os, "config watchdog timer failed, rc = %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

633

hw->auto_xfer_rdy_enabled = FALSE;

sys/dev/ocs_fc/ocs_hw.c

634

if (sli_get_auto_xfer_rdy_capable(&hw->sli) &&

sys/dev/ocs_fc/ocs_hw.c

6343

ocs_hw_config_auto_xfer_rdy_t10pi(ocs_hw_t *hw, uint8_t *buf)

sys/dev/ocs_fc/ocs_hw.c

6349

param.rtc = (hw->config.auto_xfer_rdy_ref_tag_is_lba ? 0 : 1);

sys/dev/ocs_fc/ocs_hw.c

635

hw->config.auto_xfer_rdy_size > 0) {

sys/dev/ocs_fc/ocs_hw.c

6350

param.atv = (hw->config.auto_xfer_rdy_app_tag_valid ? 1 : 0);

sys/dev/ocs_fc/ocs_hw.c

6351

param.tmm = ((hw->config.dif_mode == OCS_HW_DIF_MODE_INLINE) ? 0 : 1);

sys/dev/ocs_fc/ocs_hw.c

6352

param.app_tag = hw->config.auto_xfer_rdy_app_tag_value;

sys/dev/ocs_fc/ocs_hw.c

6353

param.blk_size = hw->config.auto_xfer_rdy_blk_size_chip;

sys/dev/ocs_fc/ocs_hw.c

6355

switch (hw->config.auto_xfer_rdy_p_type) {

sys/dev/ocs_fc/ocs_hw.c

636

if (hw->config.esoc){

sys/dev/ocs_fc/ocs_hw.c

6363

ocs_log_err(hw->os, "unsupported p_type %d\n",

sys/dev/ocs_fc/ocs_hw.c

6364

hw->config.auto_xfer_rdy_p_type);

sys/dev/ocs_fc/ocs_hw.c

6369

sli_cmd_common_set_features(&hw->sli, buf, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

6374

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

6376

ocs_log_err(hw->os, "ocs_hw_command returns %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

6378

ocs_log_test(hw->os, "Auto XFER RDY T10 PI configured rtc:%d atv:%d p_type:%d app_tag:%x blk_size:%d\n",

sys/dev/ocs_fc/ocs_hw.c

6398

ocs_hw_config_sli_port_health_check(ocs_hw_t *hw, uint8_t query, uint8_t enable)

sys/dev/ocs_fc/ocs_hw.c

640

written_size = sli_cmd_config_auto_xfer_rdy_hp(&hw->sli, buf, SLI4_BMBX_SIZE, hw->config.auto_xfer_rdy_size, 1, ramdisc_blocksize);

sys/dev/ocs_fc/ocs_hw.c

6409

sli_cmd_common_set_features(&hw->sli, buf, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

6414

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

6416

ocs_log_err(hw->os, "ocs_hw_command returns %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

6418

ocs_log_test(hw->os, "SLI Port Health Check is enabled \n");

sys/dev/ocs_fc/ocs_hw.c

642

written_size = sli_cmd_config_auto_xfer_rdy(&hw->sli, buf, SLI4_BMBX_SIZE, hw->config.auto_xfer_rdy_size);

sys/dev/ocs_fc/ocs_hw.c

6433

ocs_hw_config_set_fdt_xfer_hint(ocs_hw_t *hw, uint32_t fdt_xfer_hint)

sys/dev/ocs_fc/ocs_hw.c

6442

sli_cmd_common_set_features(&hw->sli, buf, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

6447

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

6449

ocs_log_warn(hw->os, "set FDT hint %d failed: %d\n", fdt_xfer_hint, rc);

sys/dev/ocs_fc/ocs_hw.c

645

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

6451

ocs_log_debug(hw->os, "Set FTD transfer hint to %d\n", param.fdt_xfer_hint);

sys/dev/ocs_fc/ocs_hw.c

6468

ocs_hw_linkcfg_dmtf_clp_cb(ocs_hw_t *hw, int32_t status, uint32_t result_len, void *arg)

sys/dev/ocs_fc/ocs_hw.c

647

ocs_log_err(hw->os, "config auto xfer rdy failed\n");

sys/dev/ocs_fc/ocs_hw.c

6476

ocs_log_test(hw->os, "CLP cmd failed, status=%d\n", status);

sys/dev/ocs_fc/ocs_hw.c

6479

rval = ocs_hw_clp_resp_get_value(hw, "retdata", retdata_str,

sys/dev/ocs_fc/ocs_hw.c

6485

ocs_log_err(hw->os, "failed to get retdata %d\n", result_len);

sys/dev/ocs_fc/ocs_hw.c

6499

ocs_dma_free(hw->os, &cb_arg->dma_cmd);

sys/dev/ocs_fc/ocs_hw.c

6500

ocs_dma_free(hw->os, &cb_arg->dma_resp);

sys/dev/ocs_fc/ocs_hw.c

6501

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

651

hw->auto_xfer_rdy_enabled = TRUE;

sys/dev/ocs_fc/ocs_hw.c

6518

ocs_hw_set_dump_location(ocs_hw_t *hw, uint32_t num_buffers, ocs_dma_t *dump_buffers, uint8_t fdb)

sys/dev/ocs_fc/ocs_hw.c

6528

if (hw->workaround.disable_dump_loc) {

sys/dev/ocs_fc/ocs_hw.c

6529

ocs_log_test(hw->os, "FW version is too old for this feature\n");

sys/dev/ocs_fc/ocs_hw.c

653

if (hw->config.auto_xfer_rdy_t10_enable) {

sys/dev/ocs_fc/ocs_hw.c

6534

ocs_get_bus_dev_func(hw->os, &bus, &dev, &func);

sys/dev/ocs_fc/ocs_hw.c

6536

ocs_log_test(hw->os, "function only valid for pci function 0, %d passed\n",

sys/dev/ocs_fc/ocs_hw.c

654

rc = ocs_hw_config_auto_xfer_rdy_t10pi(hw, buf);

sys/dev/ocs_fc/ocs_hw.c

6550

if (hw->dump_sges.size < sge_size) {

sys/dev/ocs_fc/ocs_hw.c

6551

ocs_dma_free(hw->os, &hw->dump_sges);

sys/dev/ocs_fc/ocs_hw.c

6552

if (ocs_dma_alloc(hw->os, &hw->dump_sges, sge_size, OCS_MIN_DMA_ALIGNMENT)) {

sys/dev/ocs_fc/ocs_hw.c

6553

ocs_log_err(hw->os, "SGE DMA allocation failed\n");

sys/dev/ocs_fc/ocs_hw.c

6558

ocs_memset(hw->dump_sges.virt, 0, hw->dump_sges.size);

sys/dev/ocs_fc/ocs_hw.c

6559

hw->dump_sges.len = sge_size;

sys/dev/ocs_fc/ocs_hw.c

656

ocs_log_err(hw->os, "set parameters auto xfer rdy T10 PI failed\n");

sys/dev/ocs_fc/ocs_hw.c

6560

sge = hw->dump_sges.virt;

sys/dev/ocs_fc/ocs_hw.c

6567

rc = sli_cmd_common_set_dump_location(&hw->sli, (void *)buf,

sys/dev/ocs_fc/ocs_hw.c

6569

&hw->dump_sges, fdb);

sys/dev/ocs_fc/ocs_hw.c

6572

rc = sli_cmd_common_set_dump_location(&hw->sli, (void *)buf,

sys/dev/ocs_fc/ocs_hw.c

6578

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL,

sys/dev/ocs_fc/ocs_hw.c

6581

ocs_log_err(hw->os, "ocs_hw_command returns %d\n",

sys/dev/ocs_fc/ocs_hw.c

6585

ocs_log_err(hw->os,

sys/dev/ocs_fc/ocs_hw.c

6608

ocs_hw_set_eth_license(ocs_hw_t *hw, uint32_t license)

sys/dev/ocs_fc/ocs_hw.c

6616

if (SLI4_IF_TYPE_LANCER_FC_ETH != sli_get_if_type(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

6617

ocs_log_test(hw->os, "Function only supported for I/F type 2\n");

sys/dev/ocs_fc/ocs_hw.c

662

if(hw->sliport_healthcheck) {

sys/dev/ocs_fc/ocs_hw.c

6623

if (ocs_dma_alloc(hw->os, &dma_cmd, ocs_strlen(cmd)+1, 4096)) {

sys/dev/ocs_fc/ocs_hw.c

6624

ocs_log_err(hw->os, "malloc failed\n");

sys/dev/ocs_fc/ocs_hw.c

663

rc = ocs_hw_config_sli_port_health_check(hw, 0, 1);

sys/dev/ocs_fc/ocs_hw.c

6631

if (ocs_dma_alloc(hw->os, &dma_resp, OCS_HW_DMTF_CLP_RSP_MAX, 4096)) {

sys/dev/ocs_fc/ocs_hw.c

6632

ocs_log_err(hw->os, "malloc failed\n");

sys/dev/ocs_fc/ocs_hw.c

6633

ocs_dma_free(hw->os, &dma_cmd);

sys/dev/ocs_fc/ocs_hw.c

6638

if (ocs_hw_exec_dmtf_clp_cmd(hw, &dma_cmd, &dma_resp, OCS_CMD_POLL, NULL, NULL)) {

sys/dev/ocs_fc/ocs_hw.c

6639

ocs_log_err(hw->os, "CLP cmd=\"%s\" failed\n", (char *)dma_cmd.virt);

sys/dev/ocs_fc/ocs_hw.c

6643

ocs_dma_free(hw->os, &dma_cmd);

sys/dev/ocs_fc/ocs_hw.c

6644

ocs_dma_free(hw->os, &dma_resp);

sys/dev/ocs_fc/ocs_hw.c

665

ocs_log_err(hw->os, "Enabling Sliport Health check failed \n");

sys/dev/ocs_fc/ocs_hw.c

6673

ocs_hw_exec_dmtf_clp_cmd(ocs_hw_t *hw, ocs_dma_t *dma_cmd, ocs_dma_t *dma_resp, uint32_t opts, ocs_hw_dmtf_clp_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

6680

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

6682

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

6687

cb_arg = ocs_malloc(hw->os, sizeof(*cb_arg), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

6689

ocs_log_err(hw->os, "failed to malloc cb_arg");

sys/dev/ocs_fc/ocs_hw.c

6690

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6700

if (sli_cmd_dmtf_exec_clp_cmd(&hw->sli, mbxdata, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

6702

rc = ocs_hw_command(hw, mbxdata, opts, ocs_hw_dmtf_clp_cb, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

6707

ocs_memcpy(mbxdata, hw->sli.bmbx.virt, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6708

ocs_hw_dmtf_clp_cb(hw, 0, mbxdata, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

6717

ocs_log_test(hw->os, "ocs_hw_command failed\n");

sys/dev/ocs_fc/ocs_hw.c

6719

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6720

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

6723

ocs_log_test(hw->os, "sli_cmd_dmtf_exec_clp_cmd failed\n");

sys/dev/ocs_fc/ocs_hw.c

6725

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6726

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

673

if ((hw->sli.if_type == SLI4_IF_TYPE_LANCER_FC_ETH) && (OCS_HW_FDT_XFER_HINT != 0)) {

sys/dev/ocs_fc/ocs_hw.c

6744

ocs_hw_dmtf_clp_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

6758

ocs_log_debug(hw->os, "status=x%x/x%x/x%x addl=x%x clp=x%x detail=x%x\n",

sys/dev/ocs_fc/ocs_hw.c

678

ocs_hw_config_set_fdt_xfer_hint(hw, OCS_HW_FDT_XFER_HINT);

sys/dev/ocs_fc/ocs_hw.c

6781

ocs_log_test(hw->os, "Invalid response length: resp_len=%zu result len=%d\n",

sys/dev/ocs_fc/ocs_hw.c

6788

stat_len = ocs_hw_clp_resp_get_value(hw, "status", stat_str,

sys/dev/ocs_fc/ocs_hw.c

6794

ocs_log_test(hw->os, "failed to get status %d\n", stat_len);

sys/dev/ocs_fc/ocs_hw.c

6800

ocs_log_test(hw->os, "CLP status indicates failure=%s\n", stat_str);

sys/dev/ocs_fc/ocs_hw.c

6810

cb_arg->cb(hw, cb_status, result_len, cb_arg->arg);

sys/dev/ocs_fc/ocs_hw.c

6814

ocs_free(hw->os, cb_arg, sizeof(*cb_arg));

sys/dev/ocs_fc/ocs_hw.c

6815

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6835

ocs_hw_clp_resp_get_value(ocs_hw_t *hw, const char *keyword, char *value, uint32_t value_len, const char *resp, uint32_t resp_len)

sys/dev/ocs_fc/ocs_hw.c

684

q_count = MIN(sli_get_max_queue(&hw->sli, SLI_QTYPE_EQ),

sys/dev/ocs_fc/ocs_hw.c

6843

ocs_log_test(hw->os, "could not find keyword=%s in CLP response\n",

sys/dev/ocs_fc/ocs_hw.c

6851

ocs_log_test(hw->os, "could not find \'=\' in CLP response for keyword=%s\n",

sys/dev/ocs_fc/ocs_hw.c

686

if (hw->config.n_eq > q_count) {

sys/dev/ocs_fc/ocs_hw.c

6860

ocs_log_test(hw->os, "could not find \\r\\n for keyword=%s in CLP response\n",

sys/dev/ocs_fc/ocs_hw.c

6867

ocs_log_test(hw->os, "value len=%d not large enough for actual=%ld\n",

sys/dev/ocs_fc/ocs_hw.c

687

ocs_log_err(hw->os, "requested %d EQ but %d allowed\n",

sys/dev/ocs_fc/ocs_hw.c

688

hw->config.n_eq, q_count);

sys/dev/ocs_fc/ocs_hw.c

6892

ocs_hw_raise_ue(ocs_hw_t *hw, uint8_t dump)

sys/dev/ocs_fc/ocs_hw.c

6896

if (sli_raise_ue(&hw->sli, dump) != 0) {

sys/dev/ocs_fc/ocs_hw.c

6899

if (hw->state != OCS_HW_STATE_UNINITIALIZED) {

sys/dev/ocs_fc/ocs_hw.c

6900

hw->state = OCS_HW_STATE_QUEUES_ALLOCATED;

sys/dev/ocs_fc/ocs_hw.c

692

q_count = MIN(sli_get_max_queue(&hw->sli, SLI_QTYPE_CQ),

sys/dev/ocs_fc/ocs_hw.c

6924

ocs_hw_cb_dump_get(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

694

if (hw->config.n_cq > q_count) {

sys/dev/ocs_fc/ocs_hw.c

6943

ocs_free(hw->os, cb_arg->mbox_cmd, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

6944

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_dump_get_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

695

ocs_log_err(hw->os, "requested %d CQ but %d allowed\n",

sys/dev/ocs_fc/ocs_hw.c

696

hw->config.n_cq, q_count);

sys/dev/ocs_fc/ocs_hw.c

6971

ocs_hw_dump_get(ocs_hw_t *hw, ocs_dma_t *dma, uint32_t size, uint32_t offset, ocs_hw_dump_get_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

6976

uint32_t opts = (hw->state == OCS_HW_STATE_ACTIVE ? OCS_CMD_NOWAIT : OCS_CMD_POLL);

sys/dev/ocs_fc/ocs_hw.c

6978

if (SLI4_IF_TYPE_LANCER_FC_ETH != sli_get_if_type(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

6979

ocs_log_test(hw->os, "Function only supported for I/F type 2\n");

sys/dev/ocs_fc/ocs_hw.c

6983

if (1 != sli_dump_is_present(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

6984

ocs_log_test(hw->os, "No dump is present\n");

sys/dev/ocs_fc/ocs_hw.c

6988

if (1 == sli_reset_required(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

6989

ocs_log_test(hw->os, "device reset required\n");

sys/dev/ocs_fc/ocs_hw.c

6993

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

6995

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

6999

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_dump_get_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

700

q_count = MIN(sli_get_max_queue(&hw->sli, SLI_QTYPE_MQ),

sys/dev/ocs_fc/ocs_hw.c

7001

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

7002

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7010

if (sli_cmd_common_read_object(&hw->sli, mbxdata, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

7012

rc = ocs_hw_command(hw, mbxdata, opts, ocs_hw_cb_dump_get, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

7014

ocs_memcpy(mbxdata, hw->sli.bmbx.virt, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7015

rc = ocs_hw_cb_dump_get(hw, 0, mbxdata, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

702

if (hw->config.n_mq > q_count) {

sys/dev/ocs_fc/ocs_hw.c

7020

ocs_log_test(hw->os, "COMMON_READ_OBJECT failed\n");

sys/dev/ocs_fc/ocs_hw.c

7021

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7022

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_dump_get_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

703

ocs_log_err(hw->os, "requested %d MQ but %d allowed\n",

sys/dev/ocs_fc/ocs_hw.c

704

hw->config.n_mq, q_count);

sys/dev/ocs_fc/ocs_hw.c

7044

ocs_hw_cb_dump_clear(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

7057

ocs_free(hw->os, cb_arg->mbox_cmd, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7058

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_dump_clear_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

708

q_count = MIN(sli_get_max_queue(&hw->sli, SLI_QTYPE_RQ),

sys/dev/ocs_fc/ocs_hw.c

7082

ocs_hw_dump_clear(ocs_hw_t *hw, ocs_hw_dump_clear_cb_t cb, void *arg)

sys/dev/ocs_fc/ocs_hw.c

7087

uint32_t opts = (hw->state == OCS_HW_STATE_ACTIVE ? OCS_CMD_NOWAIT : OCS_CMD_POLL);

sys/dev/ocs_fc/ocs_hw.c

7089

if (SLI4_IF_TYPE_LANCER_FC_ETH != sli_get_if_type(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

7090

ocs_log_test(hw->os, "Function only supported for I/F type 2\n");

sys/dev/ocs_fc/ocs_hw.c

7094

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7096

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

710

if (hw->config.n_rq > q_count) {

sys/dev/ocs_fc/ocs_hw.c

7100

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_dump_clear_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7102

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

7103

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

711

ocs_log_err(hw->os, "requested %d RQ but %d allowed\n",

sys/dev/ocs_fc/ocs_hw.c

7111

if (sli_cmd_common_delete_object(&hw->sli, mbxdata, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

7113

rc = ocs_hw_command(hw, mbxdata, opts, ocs_hw_cb_dump_clear, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

7115

ocs_memcpy(mbxdata, hw->sli.bmbx.virt, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7116

rc = ocs_hw_cb_dump_clear(hw, 0, mbxdata, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

712

hw->config.n_rq, q_count);

sys/dev/ocs_fc/ocs_hw.c

7121

ocs_log_test(hw->os, "COMMON_DELETE_OBJECT failed\n");

sys/dev/ocs_fc/ocs_hw.c

7122

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7123

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_dump_clear_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

7148

ocs_hw_get_port_protocol_cb(ocs_hw_t *hw, int32_t status,

sys/dev/ocs_fc/ocs_hw.c

716

q_count = MIN(sli_get_max_queue(&hw->sli, SLI_QTYPE_WQ),

sys/dev/ocs_fc/ocs_hw.c

718

if (hw->config.n_wq > q_count) {

sys/dev/ocs_fc/ocs_hw.c

719

ocs_log_err(hw->os, "requested %d WQ but %d allowed\n",

sys/dev/ocs_fc/ocs_hw.c

7192

ocs_dma_free(hw->os, &cb_arg->payload);

sys/dev/ocs_fc/ocs_hw.c

7193

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_get_port_protocol_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

7194

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

720

hw->config.n_wq, q_count);

sys/dev/ocs_fc/ocs_hw.c

7220

ocs_hw_get_port_protocol(ocs_hw_t *hw, uint32_t pci_func,

sys/dev/ocs_fc/ocs_hw.c

7228

if (sli_get_if_type(&hw->sli) != SLI4_IF_TYPE_BE3_SKH_PF) {

sys/dev/ocs_fc/ocs_hw.c

7233

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7235

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

7240

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_get_port_protocol_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7242

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

7243

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

725

ocs_memset(hw->cq_hash, 0, sizeof(hw->cq_hash));

sys/dev/ocs_fc/ocs_hw.c

7252

if (ocs_dma_alloc(hw->os, &cb_arg->payload, 4096, 4)) {

sys/dev/ocs_fc/ocs_hw.c

7253

ocs_log_err(hw->os, "Failed to allocate DMA buffer\n");

sys/dev/ocs_fc/ocs_hw.c

7254

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7255

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_get_port_protocol_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

7259

if (sli_cmd_common_get_profile_config(&hw->sli, mbxdata, SLI4_BMBX_SIZE, &cb_arg->payload)) {

sys/dev/ocs_fc/ocs_hw.c

726

ocs_log_debug(hw->os, "Max CQs %d, hash size = %d\n",

sys/dev/ocs_fc/ocs_hw.c

7260

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_get_port_protocol_cb, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

7264

ocs_log_test(hw->os, "GET_PROFILE_CONFIG failed\n");

sys/dev/ocs_fc/ocs_hw.c

7265

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7266

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_fw_write_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

7267

ocs_dma_free(hw->os, &cb_arg->payload);

sys/dev/ocs_fc/ocs_hw.c

729

ocs_memset(hw->rq_hash, 0, sizeof(hw->rq_hash));

sys/dev/ocs_fc/ocs_hw.c

73

static void ocs_hw_adjust_wqs(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.c

730

ocs_log_debug(hw->os, "Max RQs %d, hash size = %d\n",

sys/dev/ocs_fc/ocs_hw.c

7300

ocs_hw_set_port_protocol_cb2(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

7308

ocs_dma_free(hw->os, &(cb_arg->payload));

sys/dev/ocs_fc/ocs_hw.c

7309

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7310

ocs_free(hw->os, arg, sizeof(ocs_hw_set_port_protocol_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

733

ocs_memset(hw->wq_hash, 0, sizeof(hw->wq_hash));

sys/dev/ocs_fc/ocs_hw.c

7339

ocs_hw_set_port_protocol_cb1(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

734

ocs_log_debug(hw->os, "Max WQs %d, hash size = %d\n",

sys/dev/ocs_fc/ocs_hw.c

737

rc = ocs_hw_init_queues(hw, hw->qtop);

sys/dev/ocs_fc/ocs_hw.c

7373

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7375

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

7380

new_cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_set_port_protocol_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7382

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

7383

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7392

if (ocs_dma_alloc(hw->os, &new_cb_arg->payload, sizeof(sli4_req_common_set_profile_config_t) +

sys/dev/ocs_fc/ocs_hw.c

7395

ocs_log_err(hw->os, "Failed to allocate DMA buffer\n");

sys/dev/ocs_fc/ocs_hw.c

7396

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7397

ocs_free(hw->os, new_cb_arg, sizeof(ocs_hw_set_port_protocol_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

74

static uint32_t ocs_hw_get_num_chutes(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.c

7401

sli_cmd_common_set_profile_config(&hw->sli, mbxdata, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

742

max_rpi = sli_get_max_rsrc(&hw->sli, SLI_RSRC_FCOE_RPI);

sys/dev/ocs_fc/ocs_hw.c

743

i = sli_fc_get_rpi_requirements(&hw->sli, max_rpi);

sys/dev/ocs_fc/ocs_hw.c

7464

ocs_dma_free(hw->os, &cb_arg->payload);

sys/dev/ocs_fc/ocs_hw.c

7465

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7466

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_set_port_protocol_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

7469

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_set_port_protocol_cb2, new_cb_arg);

sys/dev/ocs_fc/ocs_hw.c

7471

ocs_log_err(hw->os, "Error posting COMMON_SET_PROFILE_CONFIG\n");

sys/dev/ocs_fc/ocs_hw.c

7478

ocs_dma_free(hw->os, &new_cb_arg->payload);

sys/dev/ocs_fc/ocs_hw.c

7479

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7480

ocs_free(hw->os, new_cb_arg, sizeof(ocs_hw_set_port_protocol_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

749

if (hw->rnode_mem.size) {

sys/dev/ocs_fc/ocs_hw.c

750

ocs_dma_free(hw->os, &hw->rnode_mem);

sys/dev/ocs_fc/ocs_hw.c

7513

ocs_hw_set_port_protocol(ocs_hw_t *hw, ocs_hw_port_protocol_e new_protocol,

sys/dev/ocs_fc/ocs_hw.c

7521

if (sli_get_if_type(&hw->sli) != SLI4_IF_TYPE_BE3_SKH_PF) {

sys/dev/ocs_fc/ocs_hw.c

7526

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7528

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

753

if (ocs_dma_alloc(hw->os, &hw->rnode_mem, i, 4096)) {

sys/dev/ocs_fc/ocs_hw.c

7533

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_set_port_protocol_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7535

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

7536

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

754

ocs_log_err(hw->os, "remote node memory allocation fail\n");

sys/dev/ocs_fc/ocs_hw.c

7546

if (ocs_dma_alloc(hw->os, &cb_arg->payload, 4096, 4)) {

sys/dev/ocs_fc/ocs_hw.c

7547

ocs_log_err(hw->os, "Failed to allocate DMA buffer\n");

sys/dev/ocs_fc/ocs_hw.c

7548

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7549

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_get_port_protocol_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

7553

if (sli_cmd_common_get_profile_config(&hw->sli, mbxdata, SLI4_BMBX_SIZE, &cb_arg->payload)) {

sys/dev/ocs_fc/ocs_hw.c

7554

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_set_port_protocol_cb1, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

7558

ocs_log_test(hw->os, "GET_PROFILE_CONFIG failed\n");

sys/dev/ocs_fc/ocs_hw.c

7559

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7560

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_fw_write_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

7561

ocs_dma_free(hw->os, &cb_arg->payload);

sys/dev/ocs_fc/ocs_hw.c

759

if (sli_cmd_fcoe_post_hdr_templates(&hw->sli, buf, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw.c

7591

ocs_hw_get_profile_list_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

760

&hw->rnode_mem, UINT16_MAX, &payload_memory)) {

sys/dev/ocs_fc/ocs_hw.c

7600

list = ocs_malloc(hw->os, sizeof(ocs_hw_profile_list_t), OCS_M_ZERO);

sys/dev/ocs_fc/ocs_hw.c

7602

ocs_log_err(hw->os, "failed to malloc list\n");

sys/dev/ocs_fc/ocs_hw.c

761

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

7622

ocs_free(hw->os, list, sizeof(*list));

sys/dev/ocs_fc/ocs_hw.c

7625

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7626

ocs_dma_free(hw->os, &cb_arg->payload);

sys/dev/ocs_fc/ocs_hw.c

7627

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_get_profile_list_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

765

ocs_dma_free(hw->os, &payload_memory);

sys/dev/ocs_fc/ocs_hw.c

7654

ocs_hw_get_profile_list(ocs_hw_t *hw, ocs_get_profile_list_cb_t cb, void* ul_arg)

sys/dev/ocs_fc/ocs_hw.c

7661

if (sli_get_if_type(&hw->sli) != SLI4_IF_TYPE_BE3_SKH_PF) {

sys/dev/ocs_fc/ocs_hw.c

7666

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7668

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

7673

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_get_profile_list_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7675

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

7676

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7684

if (ocs_dma_alloc(hw->os, &cb_arg->payload, sizeof(sli4_res_common_get_profile_list_t), 4)) {

sys/dev/ocs_fc/ocs_hw.c

7685

ocs_log_err(hw->os, "Failed to allocate DMA buffer\n");

sys/dev/ocs_fc/ocs_hw.c

7686

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7687

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_get_profile_list_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

7691

if (sli_cmd_common_get_profile_list(&hw->sli, mbxdata, SLI4_BMBX_SIZE, 0, &cb_arg->payload)) {

sys/dev/ocs_fc/ocs_hw.c

7692

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_get_profile_list_cb, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

7696

ocs_log_test(hw->os, "GET_PROFILE_LIST failed\n");

sys/dev/ocs_fc/ocs_hw.c

7697

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7698

ocs_dma_free(hw->os, &cb_arg->payload);

sys/dev/ocs_fc/ocs_hw.c

7699

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_get_profile_list_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

770

ocs_log_err(hw->os, "header template registration failed\n");

sys/dev/ocs_fc/ocs_hw.c

7722

ocs_hw_get_active_profile_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

7735

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7736

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_get_active_profile_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

776

rc = ocs_hw_rx_allocate(hw);

sys/dev/ocs_fc/ocs_hw.c

7763

ocs_hw_get_active_profile(ocs_hw_t *hw, ocs_get_active_profile_cb_t cb, void* ul_arg)

sys/dev/ocs_fc/ocs_hw.c

7770

if (sli_get_if_type(&hw->sli) != SLI4_IF_TYPE_BE3_SKH_PF) {

sys/dev/ocs_fc/ocs_hw.c

7775

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7777

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

778

ocs_log_err(hw->os, "rx_allocate failed\n");

sys/dev/ocs_fc/ocs_hw.c

7782

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_get_active_profile_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7784

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

7785

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7792

if (sli_cmd_common_get_active_profile(&hw->sli, mbxdata, SLI4_BMBX_SIZE)) {

sys/dev/ocs_fc/ocs_hw.c

7793

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_get_active_profile_cb, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

7797

ocs_log_test(hw->os, "GET_ACTIVE_PROFILE failed\n");

sys/dev/ocs_fc/ocs_hw.c

7798

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7799

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_get_active_profile_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

7822

ocs_hw_get_nvparms_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

783

if (hw->seq_pool == NULL) {

sys/dev/ocs_fc/ocs_hw.c

7832

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7833

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_get_nvparms_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

7860

ocs_hw_get_nvparms(ocs_hw_t *hw, ocs_get_nvparms_cb_t cb, void* ul_arg)

sys/dev/ocs_fc/ocs_hw.c

7867

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7869

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

7874

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_get_nvparms_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7876

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

7877

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

788

for (i = 0; i < hw->hw_rq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

7884

if (sli_cmd_read_nvparms(&hw->sli, mbxdata, SLI4_BMBX_SIZE)) {

sys/dev/ocs_fc/ocs_hw.c

7885

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_get_nvparms_cb, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

7889

ocs_log_test(hw->os, "READ_NVPARMS failed\n");

sys/dev/ocs_fc/ocs_hw.c

789

count += hw->hw_rq[i]->entry_count;

sys/dev/ocs_fc/ocs_hw.c

7890

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7891

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_get_nvparms_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

7914

ocs_hw_set_nvparms_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

792

hw->seq_pool = ocs_array_alloc(hw->os, sizeof(ocs_hw_sequence_t), count);

sys/dev/ocs_fc/ocs_hw.c

7922

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7923

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_set_nvparms_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

793

if (hw->seq_pool == NULL) {

sys/dev/ocs_fc/ocs_hw.c

794

ocs_log_err(hw->os, "malloc seq_pool failed\n");

sys/dev/ocs_fc/ocs_hw.c

7957

ocs_hw_set_nvparms(ocs_hw_t *hw, ocs_set_nvparms_cb_t cb, uint8_t *wwpn,

sys/dev/ocs_fc/ocs_hw.c

7965

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7967

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

7972

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_set_nvparms_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

7974

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

7975

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7982

if (sli_cmd_write_nvparms(&hw->sli, mbxdata, SLI4_BMBX_SIZE, wwpn, wwnn, hard_alpa, preferred_d_id)) {

sys/dev/ocs_fc/ocs_hw.c

7983

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_set_nvparms_cb, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

7987

ocs_log_test(hw->os, "SET_NVPARMS failed\n");

sys/dev/ocs_fc/ocs_hw.c

7988

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

7989

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_set_nvparms_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

799

if(ocs_hw_rx_post(hw)) {

sys/dev/ocs_fc/ocs_hw.c

800

ocs_log_err(hw->os, "WARNING - error posting RQ buffers\n");

sys/dev/ocs_fc/ocs_hw.c

8004

ocs_hw_io_get_count(ocs_hw_t *hw, ocs_hw_io_count_type_e io_count_type)

sys/dev/ocs_fc/ocs_hw.c

8009

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

8013

ocs_list_foreach(&hw->io_inuse, io) {

sys/dev/ocs_fc/ocs_hw.c

8018

ocs_list_foreach(&hw->io_free, io) {

sys/dev/ocs_fc/ocs_hw.c

8023

ocs_list_foreach(&hw->io_wait_free, io) {

sys/dev/ocs_fc/ocs_hw.c

8028

ocs_list_foreach(&hw->io_port_owned, io) {

sys/dev/ocs_fc/ocs_hw.c

8033

count = hw->config.n_io;

sys/dev/ocs_fc/ocs_hw.c

8037

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

804

if (hw->rpi_ref == NULL) {

sys/dev/ocs_fc/ocs_hw.c

805

hw->rpi_ref = ocs_malloc(hw->os, max_rpi * sizeof(*hw->rpi_ref),

sys/dev/ocs_fc/ocs_hw.c

8050

ocs_hw_get_rqes_produced_count(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

8056

for (i = 0; i < hw->hw_rq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

8057

hw_rq_t *rq = hw->hw_rq[i];

sys/dev/ocs_fc/ocs_hw.c

807

if (hw->rpi_ref == NULL) {

sys/dev/ocs_fc/ocs_hw.c

808

ocs_log_err(hw->os, "rpi_ref allocation failure (%d)\n", i);

sys/dev/ocs_fc/ocs_hw.c

8087

ocs_hw_set_active_profile_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

8095

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

8096

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_get_active_profile_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

8122

ocs_hw_set_active_profile(ocs_hw_t *hw, ocs_set_active_profile_cb_t cb, uint32_t profile_id, void* ul_arg)

sys/dev/ocs_fc/ocs_hw.c

8129

if (sli_get_if_type(&hw->sli) != SLI4_IF_TYPE_BE3_SKH_PF) {

sys/dev/ocs_fc/ocs_hw.c

8134

mbxdata = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

8136

ocs_log_err(hw->os, "failed to malloc mbox\n");

sys/dev/ocs_fc/ocs_hw.c

814

ocs_atomic_init(&hw->rpi_ref[i].rpi_count, 0);

sys/dev/ocs_fc/ocs_hw.c

8141

cb_arg = ocs_malloc(hw->os, sizeof(ocs_hw_set_active_profile_cb_arg_t), OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

8143

ocs_log_err(hw->os, "failed to malloc cb_arg\n");

sys/dev/ocs_fc/ocs_hw.c

8144

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

815

ocs_atomic_init(&hw->rpi_ref[i].rpi_attached, 0);

sys/dev/ocs_fc/ocs_hw.c

8151

if (sli_cmd_common_set_active_profile(&hw->sli, mbxdata, SLI4_BMBX_SIZE, 0, profile_id)) {

sys/dev/ocs_fc/ocs_hw.c

8152

rc = ocs_hw_command(hw, mbxdata, OCS_CMD_NOWAIT, ocs_hw_set_active_profile_cb, cb_arg);

sys/dev/ocs_fc/ocs_hw.c

8156

ocs_log_test(hw->os, "SET_ACTIVE_PROFILE failed\n");

sys/dev/ocs_fc/ocs_hw.c

8157

ocs_free(hw->os, mbxdata, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

8158

ocs_free(hw->os, cb_arg, sizeof(ocs_hw_set_active_profile_cb_arg_t));

sys/dev/ocs_fc/ocs_hw.c

818

ocs_memset(hw->domains, 0, sizeof(hw->domains));

sys/dev/ocs_fc/ocs_hw.c

821

if (hw->workaround.override_fcfi) {

sys/dev/ocs_fc/ocs_hw.c

822

hw->first_domain_idx = -1;

sys/dev/ocs_fc/ocs_hw.c

8226

ocs_hw_domain_add(ocs_hw_t *hw, ocs_domain_t *domain)

sys/dev/ocs_fc/ocs_hw.c

8231

if ((hw == NULL) || (domain == NULL)) {

sys/dev/ocs_fc/ocs_hw.c

8233

hw, domain);

sys/dev/ocs_fc/ocs_hw.c

8242

ocs_log_debug(hw->os, "adding domain %p @ %#x\n",

sys/dev/ocs_fc/ocs_hw.c

8244

hw->domains[fcfi] = domain;

sys/dev/ocs_fc/ocs_hw.c

8247

if (hw->workaround.override_fcfi) {

sys/dev/ocs_fc/ocs_hw.c

8248

if (hw->first_domain_idx < 0) {

sys/dev/ocs_fc/ocs_hw.c

8249

hw->first_domain_idx = fcfi;

sys/dev/ocs_fc/ocs_hw.c

825

ocs_memset(hw->fcf_index_fcfi, 0, sizeof(hw->fcf_index_fcfi));

sys/dev/ocs_fc/ocs_hw.c

8256

ocs_log_debug(hw->os, "adding map of FCF index %d to FCFI %d\n",

sys/dev/ocs_fc/ocs_hw.c

8258

hw->fcf_index_fcfi[fcf_index] = fcfi;

sys/dev/ocs_fc/ocs_hw.c

8261

ocs_log_test(hw->os, "FCF index %d out of range (max %d)\n",

sys/dev/ocs_fc/ocs_hw.c

8263

hw->domains[fcfi] = NULL;

sys/dev/ocs_fc/ocs_hw.c

8266

ocs_log_test(hw->os, "FCFI %#x out of range (max %#x)\n",

sys/dev/ocs_fc/ocs_hw.c

8274

ocs_hw_domain_del(ocs_hw_t *hw, ocs_domain_t *domain)

sys/dev/ocs_fc/ocs_hw.c

8279

if ((hw == NULL) || (domain == NULL)) {

sys/dev/ocs_fc/ocs_hw.c

828

if (sli_get_medium(&hw->sli) == SLI_LINK_MEDIUM_FC) {

sys/dev/ocs_fc/ocs_hw.c

8281

hw, domain);

sys/dev/ocs_fc/ocs_hw.c

829

if (hw->hw_mrq_count) {

sys/dev/ocs_fc/ocs_hw.c

8290

ocs_log_debug(hw->os, "deleting domain %p @ %#x\n",

sys/dev/ocs_fc/ocs_hw.c

8293

if (domain != hw->domains[fcfi]) {

sys/dev/ocs_fc/ocs_hw.c

8294

ocs_log_test(hw->os, "provided domain %p does not match stored domain %p\n",

sys/dev/ocs_fc/ocs_hw.c

8295

domain, hw->domains[fcfi]);

sys/dev/ocs_fc/ocs_hw.c

8299

hw->domains[fcfi] = NULL;

sys/dev/ocs_fc/ocs_hw.c

830

ocs_log_debug(hw->os, "using REG_FCFI MRQ\n");

sys/dev/ocs_fc/ocs_hw.c

8302

if (hw->workaround.override_fcfi) {

sys/dev/ocs_fc/ocs_hw.c

8303

if (hw->first_domain_idx == fcfi) {

sys/dev/ocs_fc/ocs_hw.c

8304

hw->first_domain_idx = -1;

sys/dev/ocs_fc/ocs_hw.c

8311

if (hw->fcf_index_fcfi[fcf_index] == fcfi) {

sys/dev/ocs_fc/ocs_hw.c

8312

hw->fcf_index_fcfi[fcf_index] = 0;

sys/dev/ocs_fc/ocs_hw.c

8315

ocs_log_test(hw->os, "indexed FCFI %#x doesn't match provided %#x @ %d\n",

sys/dev/ocs_fc/ocs_hw.c

8316

hw->fcf_index_fcfi[fcf_index], fcfi, fcf_index);

sys/dev/ocs_fc/ocs_hw.c

8319

ocs_log_test(hw->os, "FCF index %d out of range (max %d)\n",

sys/dev/ocs_fc/ocs_hw.c

832

rc = ocs_hw_config_mrq(hw, SLI4_CMD_REG_FCFI_SET_FCFI_MODE, 0, 0);

sys/dev/ocs_fc/ocs_hw.c

8323

ocs_log_test(hw->os, "FCFI %#x out of range (max %#x)\n",

sys/dev/ocs_fc/ocs_hw.c

8331

ocs_hw_domain_get(ocs_hw_t *hw, uint16_t fcfi)

sys/dev/ocs_fc/ocs_hw.c

8334

if (hw == NULL) {

sys/dev/ocs_fc/ocs_hw.c

8335

ocs_log_err(NULL, "bad parameter hw=%p\n", hw);

sys/dev/ocs_fc/ocs_hw.c

834

ocs_log_err(hw->os, "REG_FCFI_MRQ FCFI registration failed\n");

sys/dev/ocs_fc/ocs_hw.c

8340

return hw->domains[fcfi];

sys/dev/ocs_fc/ocs_hw.c

8342

ocs_log_test(hw->os, "FCFI %#x out of range (max %#x)\n",

sys/dev/ocs_fc/ocs_hw.c

8349

ocs_hw_domain_get_indexed(ocs_hw_t *hw, uint16_t fcf_index)

sys/dev/ocs_fc/ocs_hw.c

8352

if (hw == NULL) {

sys/dev/ocs_fc/ocs_hw.c

8353

ocs_log_err(NULL, "bad parameter hw=%p\n", hw);

sys/dev/ocs_fc/ocs_hw.c

8358

return ocs_hw_domain_get(hw, hw->fcf_index_fcfi[fcf_index]);

sys/dev/ocs_fc/ocs_hw.c

8360

ocs_log_test(hw->os, "FCF index %d out of range (max %d)\n",

sys/dev/ocs_fc/ocs_hw.c

838

rc = ocs_hw_config_mrq(hw, SLI4_CMD_REG_FCFI_SET_MRQ_MODE, 0, 0);

sys/dev/ocs_fc/ocs_hw.c

8381

ocs_hw_io_quarantine(ocs_hw_t *hw, hw_wq_t *wq, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

8395

ocs_log_debug(hw ? hw->os : NULL,

sys/dev/ocs_fc/ocs_hw.c

840

ocs_log_err(hw->os, "REG_FCFI_MRQ MRQ registration failed\n");

sys/dev/ocs_fc/ocs_hw.c

8422

ocs_hw_cq_process(ocs_hw_t *hw, hw_cq_t *cq)

sys/dev/ocs_fc/ocs_hw.c

8434

while (!sli_queue_read(&hw->sli, cq->queue, cqe)) {

sys/dev/ocs_fc/ocs_hw.c

8435

status = sli_cq_parse(&hw->sli, cq->queue, cqe, &ctype, &rid);

sys/dev/ocs_fc/ocs_hw.c

8454

sli_cqe_async(&hw->sli, cqe);

sys/dev/ocs_fc/ocs_hw.c

846

ocs_log_debug(hw->os, "using REG_FCFI standard\n");

sys/dev/ocs_fc/ocs_hw.c

8462

ocs_hw_mq_process(hw, status, hw->mq);

sys/dev/ocs_fc/ocs_hw.c

8465

ocs_hw_rqpair_process_auto_xfr_rdy_cmd(hw, cq, cqe);

sys/dev/ocs_fc/ocs_hw.c

8468

ocs_hw_rqpair_process_auto_xfr_rdy_data(hw, cq, cqe);

sys/dev/ocs_fc/ocs_hw.c

8472

ocs_hw_wq_process(hw, cq, cqe, status, rid);

sys/dev/ocs_fc/ocs_hw.c

8476

int32_t index = ocs_hw_queue_hash_find(hw->wq_hash, wq_id);

sys/dev/ocs_fc/ocs_hw.c

8479

ocs_log_err(hw->os, "unknown idx=%#x rid=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

8484

hw_wq_t *wq = hw->hw_wq[index];

sys/dev/ocs_fc/ocs_hw.c

8494

ocs_hw_rqpair_process_rq(hw, cq, cqe);

sys/dev/ocs_fc/ocs_hw.c

8498

ocs_hw_xabt_process(hw, cq, cqe, rid);

sys/dev/ocs_fc/ocs_hw.c

8502

ocs_log_test(hw->os, "unhandled ctype=%#x rid=%#x\n", ctype, rid);

sys/dev/ocs_fc/ocs_hw.c

851

rq_cfg[i].r_ctl_mask = (uint8_t) hw->config.filter_def[i];

sys/dev/ocs_fc/ocs_hw.c

8512

sli_queue_arm(&hw->sli, cq->queue, FALSE);

sys/dev/ocs_fc/ocs_hw.c

8516

sli_queue_arm(&hw->sli, cq->queue, TRUE);

sys/dev/ocs_fc/ocs_hw.c

852

rq_cfg[i].r_ctl_match = (uint8_t) (hw->config.filter_def[i] >> 8);

sys/dev/ocs_fc/ocs_hw.c

853

rq_cfg[i].type_mask = (uint8_t) (hw->config.filter_def[i] >> 16);

sys/dev/ocs_fc/ocs_hw.c

8539

ocs_hw_wq_process(ocs_hw_t *hw, hw_cq_t *cq, uint8_t *cqe, int32_t status, uint16_t rid)

sys/dev/ocs_fc/ocs_hw.c

854

rq_cfg[i].type_match = (uint8_t) (hw->config.filter_def[i] >> 24);

sys/dev/ocs_fc/ocs_hw.c

8543

ocs_queue_history_cqe(&hw->q_hist, SLI_QENTRY_WQ, (void *)cqe, ((sli4_fc_wcqe_t *)cqe)->status, cq->queue->id,

sys/dev/ocs_fc/ocs_hw.c

8548

ocs_log_err(hw->os, "reque xri failed, status = %d \n", status);

sys/dev/ocs_fc/ocs_hw.c

8553

wqcb = ocs_hw_reqtag_get_instance(hw, rid);

sys/dev/ocs_fc/ocs_hw.c

8555

ocs_log_err(hw->os, "invalid request tag: x%x\n", rid);

sys/dev/ocs_fc/ocs_hw.c

8560

ocs_log_err(hw->os, "wqcb callback is NULL\n");

sys/dev/ocs_fc/ocs_hw.c

8584

ocs_hw_t *hw = io->hw;

sys/dev/ocs_fc/ocs_hw.c

8604

ocs_hw_io_quarantine(hw, io->wq, io);

sys/dev/ocs_fc/ocs_hw.c

861

for (i = 0; i < OCS_MIN(hw->hw_rq_count, SLI4_CMD_REG_FCFI_NUM_RQ_CFG); i++) {

sys/dev/ocs_fc/ocs_hw.c

8619

ocs_hw_io_quarantine(hw, io->wq, io->sec_hio);

sys/dev/ocs_fc/ocs_hw.c

862

hw_rq_t *rq = hw->hw_rq[i];

sys/dev/ocs_fc/ocs_hw.c

8622

ocs_hw_remove_io_timed_wqe(hw, io);

sys/dev/ocs_fc/ocs_hw.c

8635

sli_fc_els_did(&hw->sli, cqe, &ext);

sys/dev/ocs_fc/ocs_hw.c

8636

len = sli_fc_response_length(&hw->sli, cqe);

sys/dev/ocs_fc/ocs_hw.c

8643

len = sli_fc_response_length(&hw->sli, cqe);

sys/dev/ocs_fc/ocs_hw.c

8646

len = sli_fc_io_length(&hw->sli, cqe);

sys/dev/ocs_fc/ocs_hw.c

8655

len = sli_fc_io_length(&hw->sli, cqe);

sys/dev/ocs_fc/ocs_hw.c

8661

if (hw->workaround.retain_tsend_io_length && !len && !status) {

sys/dev/ocs_fc/ocs_hw.c

8679

len = sli_fc_io_length(&hw->sli, cqe);

sys/dev/ocs_fc/ocs_hw.c

868

ocs_log_debug(hw->os, "REG_FCFI: filter[%d] %08X -> RQ[%d] id=%d\n",

sys/dev/ocs_fc/ocs_hw.c

8682

len = sli_fc_io_length(&hw->sli, cqe);

sys/dev/ocs_fc/ocs_hw.c

869

j, hw->config.filter_def[j], i, rq->hdr->id);

sys/dev/ocs_fc/ocs_hw.c

8691

ocs_log_test(hw->os, "XXX unhandled io type %#x for XRI 0x%x\n",

sys/dev/ocs_fc/ocs_hw.c

8696

ext = sli_fc_ext_status(&hw->sli, cqe);

sys/dev/ocs_fc/ocs_hw.c

8700

if (hw->config.i_only_aab &&

sys/dev/ocs_fc/ocs_hw.c

8705

ocs_log_debug(hw->os, "aborting xri=%#x tag=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

8712

rc = ocs_hw_io_abort(hw, io, TRUE, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

8727

ocs_log_debug(hw->os, "abort in progress xri=%#x tag=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

8732

ocs_log_test(hw->os, "Failed to abort xri=%#x tag=%#x rc=%d\n",

sys/dev/ocs_fc/ocs_hw.c

8743

ocs_log_debug(hw->os, "aborting xri=%#x tag=%#x\n", io->indicator, io->reqtag);

sys/dev/ocs_fc/ocs_hw.c

8749

rc = ocs_hw_io_abort(hw, io, FALSE, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

876

if (sli_cmd_reg_fcfi(&hw->sli, buf, SLI4_BMBX_SIZE, 0, rq_cfg, 0)) {

sys/dev/ocs_fc/ocs_hw.c

8763

ocs_log_debug(hw->os, "abort in progress xri=%#x tag=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

8768

ocs_log_test(hw->os, "Failed to abort xri=%#x tag=%#x rc=%d\n",

sys/dev/ocs_fc/ocs_hw.c

877

rc = ocs_hw_command(hw, buf, OCS_CMD_POLL, NULL, NULL);

sys/dev/ocs_fc/ocs_hw.c

8775

ocs_hw_io_free(hw, io->sec_hio);

sys/dev/ocs_fc/ocs_hw.c

8794

ocs_hw_io_restore_sgl(hw, io);

sys/dev/ocs_fc/ocs_hw.c

88

static void ocs_hw_io_quarantine(ocs_hw_t *hw, hw_wq_t *wq, ocs_hw_io_t *io);

sys/dev/ocs_fc/ocs_hw.c

8800

if (hw->config.bounce) {

sys/dev/ocs_fc/ocs_hw.c

8805

if (hw->callback.bounce != NULL) {

sys/dev/ocs_fc/ocs_hw.c

8806

(*hw->callback.bounce)(ocs_hw_unsol_process_bounce, io->axr_buf->cmd_seq, s_id, d_id, ox_id);

sys/dev/ocs_fc/ocs_hw.c

8809

hw->callback.unsolicited(hw->args.unsolicited, io->axr_buf->cmd_seq);

sys/dev/ocs_fc/ocs_hw.c

881

ocs_log_err(hw->os, "FCFI registration failed\n");

sys/dev/ocs_fc/ocs_hw.c

8814

if (hw->config.bounce) {

sys/dev/ocs_fc/ocs_hw.c

8819

if (hw->callback.bounce != NULL) {

sys/dev/ocs_fc/ocs_hw.c

8820

(*hw->callback.bounce)(ocs_hw_unsol_process_bounce, &io->axr_buf->seq, s_id, d_id, ox_id);

sys/dev/ocs_fc/ocs_hw.c

8823

hw->callback.unsolicited(hw->args.unsolicited, &io->axr_buf->seq);

sys/dev/ocs_fc/ocs_hw.c

884

hw->fcf_indicator = ((sli4_cmd_reg_fcfi_t *)buf)->fcfi;

sys/dev/ocs_fc/ocs_hw.c

8847

ocs_hw_t *hw = io->hw;

sys/dev/ocs_fc/ocs_hw.c

8857

ext = sli_fc_ext_status(&hw->sli, cqe);

sys/dev/ocs_fc/ocs_hw.c

8887

ocs_lock(&hw->io_abort_lock);

sys/dev/ocs_fc/ocs_hw.c

8890

ocs_unlock(&hw->io_abort_lock);

sys/dev/ocs_fc/ocs_hw.c

8894

wqcb = ocs_hw_reqtag_get_instance(hw, io->abort_reqtag);

sys/dev/ocs_fc/ocs_hw.c

8895

ocs_hw_reqtag_free(hw, wqcb);

sys/dev/ocs_fc/ocs_hw.c

8901

(void)ocs_hw_io_free(hw, io);

sys/dev/ocs_fc/ocs_hw.c

8916

ocs_hw_xabt_process(ocs_hw_t *hw, hw_cq_t *cq, uint8_t *cqe, uint16_t rid)

sys/dev/ocs_fc/ocs_hw.c

892

rc = ocs_hw_reqtag_init(hw);

sys/dev/ocs_fc/ocs_hw.c

8921

io = ocs_hw_io_lookup(hw, rid);

sys/dev/ocs_fc/ocs_hw.c

8923

ocs_queue_history_cqe(&hw->q_hist, SLI_QENTRY_XABT, (void *)cqe, 0, cq->queue->id,

sys/dev/ocs_fc/ocs_hw.c

8927

ocs_log_err(hw->os, "Error: xabt io lookup failed rid=%#x\n", rid);

sys/dev/ocs_fc/ocs_hw.c

8932

ocs_log_debug(hw->os, "xabt io not busy rid=%#x\n", rid);

sys/dev/ocs_fc/ocs_hw.c

8939

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

894

ocs_log_err(hw->os, "ocs_pool_alloc hw_wq_callback_t failed: %d\n", rc);

sys/dev/ocs_fc/ocs_hw.c

8942

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

8963

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

8964

ocs_hw_reque_xri(hw, io);

sys/dev/ocs_fc/ocs_hw.c

8965

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

8967

ocs_hw_io_free(hw, io);

sys/dev/ocs_fc/ocs_hw.c

8971

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

898

rc = ocs_hw_setup_io(hw);

sys/dev/ocs_fc/ocs_hw.c

8980

ocs_list_remove(&hw->io_wait_free, io);

sys/dev/ocs_fc/ocs_hw.c

8981

ocs_hw_io_free_move_correct_list(hw, io);

sys/dev/ocs_fc/ocs_hw.c

8984

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

8998

ocs_hw_adjust_wqs(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

900

ocs_log_err(hw->os, "IO allocation failure\n");

sys/dev/ocs_fc/ocs_hw.c

9000

uint32_t max_wq_num = sli_get_max_queue(&hw->sli, SLI_QTYPE_WQ);

sys/dev/ocs_fc/ocs_hw.c

9001

uint32_t max_wq_entries = hw->num_qentries[SLI_QTYPE_WQ];

sys/dev/ocs_fc/ocs_hw.c

9002

uint32_t max_cq_entries = hw->num_qentries[SLI_QTYPE_CQ];

sys/dev/ocs_fc/ocs_hw.c

9010

max_wq_entries = hw->num_qentries[SLI_QTYPE_WQ] = max_cq_entries / 2;

sys/dev/ocs_fc/ocs_hw.c

9021

hw->config.n_wq = ((hw->config.n_io * 2) + (max_wq_entries - 1)) / max_wq_entries;

sys/dev/ocs_fc/ocs_hw.c

9027

if (hw->config.n_wq < 4 &&

sys/dev/ocs_fc/ocs_hw.c

9028

SLI4_IF_TYPE_BE3_SKH_PF == sli_get_if_type(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

9029

hw->config.n_wq = 4;

sys/dev/ocs_fc/ocs_hw.c

9035

if (hw->config.n_wq < 2 &&

sys/dev/ocs_fc/ocs_hw.c

9036

ocs_hw_get_num_chutes(hw) > 1) {

sys/dev/ocs_fc/ocs_hw.c

9037

hw->config.n_wq = 2;

sys/dev/ocs_fc/ocs_hw.c

904

rc = ocs_hw_init_io(hw);

sys/dev/ocs_fc/ocs_hw.c

9041

if (hw->config.n_wq > OCS_HW_MAX_NUM_WQ) {

sys/dev/ocs_fc/ocs_hw.c

9042

hw->config.n_wq = OCS_HW_MAX_NUM_WQ;

sys/dev/ocs_fc/ocs_hw.c

9046

if (hw->config.n_wq > max_wq_num) {

sys/dev/ocs_fc/ocs_hw.c

9047

hw->config.n_wq = max_wq_num;

sys/dev/ocs_fc/ocs_hw.c

9053

hw->config.n_wq /= ocs_hw_get_num_chutes(hw);

sys/dev/ocs_fc/ocs_hw.c

9057

ocs_hw_command_process(ocs_hw_t *hw, int32_t status, uint8_t *mqe, size_t size)

sys/dev/ocs_fc/ocs_hw.c

906

ocs_log_err(hw->os, "IO initialization failure\n");

sys/dev/ocs_fc/ocs_hw.c

9061

ocs_lock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

9062

if (NULL == (ctx = ocs_list_remove_head(&hw->cmd_head))) {

sys/dev/ocs_fc/ocs_hw.c

9063

ocs_log_err(hw->os, "XXX no command context?!?\n");

sys/dev/ocs_fc/ocs_hw.c

9064

ocs_unlock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

9068

hw->cmd_head_count--;

sys/dev/ocs_fc/ocs_hw.c

9071

ocs_hw_cmd_submit_pending(hw);

sys/dev/ocs_fc/ocs_hw.c

9073

ocs_unlock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

9079

ctx->cb(hw, status, ctx->buf, ctx->arg);

sys/dev/ocs_fc/ocs_hw.c

9083

ocs_free(hw->os, ctx, sizeof(ocs_command_ctx_t));

sys/dev/ocs_fc/ocs_hw.c

9098

ocs_hw_mq_process(ocs_hw_t *hw, int32_t status, sli4_queue_t *mq)

sys/dev/ocs_fc/ocs_hw.c

91

static ocs_hw_rtn_e ocs_hw_firmware_write_lancer(ocs_hw_t *hw, ocs_dma_t *dma, uint32_t size, uint32_t offset, int last, ocs_hw_fw_cb_t cb, void *arg);

sys/dev/ocs_fc/ocs_hw.c

910

ocs_queue_history_init(hw->os, &hw->q_hist);

sys/dev/ocs_fc/ocs_hw.c

9102

if (!sli_queue_read(&hw->sli, mq, mqe)) {

sys/dev/ocs_fc/ocs_hw.c

9103

ocs_hw_command_process(hw, status, mqe, mq->size);

sys/dev/ocs_fc/ocs_hw.c

9120

ocs_hw_read_fcf(ocs_hw_t *hw, uint32_t index)

sys/dev/ocs_fc/ocs_hw.c

9125

buf = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

9127

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

913

hw->linkcfg = OCS_HW_LINKCFG_NA;

sys/dev/ocs_fc/ocs_hw.c

9131

if (sli_cmd_fcoe_read_fcf_table(&hw->sli, buf, SLI4_BMBX_SIZE, &hw->fcf_dmem,

sys/dev/ocs_fc/ocs_hw.c

9133

rc = ocs_hw_command(hw, buf, OCS_CMD_NOWAIT, ocs_hw_cb_read_fcf, &hw->fcf_dmem);

sys/dev/ocs_fc/ocs_hw.c

9137

ocs_log_test(hw->os, "FCOE_READ_FCF_TABLE failed\n");

sys/dev/ocs_fc/ocs_hw.c

9138

ocs_free(hw->os, buf, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

914

ocs_hw_get_linkcfg(hw, OCS_CMD_POLL, ocs_hw_init_linkcfg_cb, hw);

sys/dev/ocs_fc/ocs_hw.c

9163

ocs_hw_cb_read_fcf(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

9169

ocs_log_test(hw->os, "bad status cqe=%#x mqe=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

917

if ((hw->sli.if_type == SLI4_IF_TYPE_LANCER_FC_ETH) &&

sys/dev/ocs_fc/ocs_hw.c

9177

if (hw->callback.domain != NULL) {

sys/dev/ocs_fc/ocs_hw.c

918

(sli_get_medium(&hw->sli) == SLI_LINK_MEDIUM_ETHERNET)) {

sys/dev/ocs_fc/ocs_hw.c

9185

drec.speed = hw->link.speed;

sys/dev/ocs_fc/ocs_hw.c

9186

drec.fc_id = hw->link.fc_id;

sys/dev/ocs_fc/ocs_hw.c

9188

if (SLI_LINK_TOPO_LOOP == hw->link.topology) {

sys/dev/ocs_fc/ocs_hw.c

919

if (ocs_hw_set_eth_license(hw, hw->eth_license)) {

sys/dev/ocs_fc/ocs_hw.c

9190

ocs_memcpy(drec.map.loop, hw->link.loop_map,

sys/dev/ocs_fc/ocs_hw.c

9192

} else if (SLI_LINK_TOPO_NPORT == hw->link.topology) {

sys/dev/ocs_fc/ocs_hw.c

921

ocs_log_err(hw->os, "Failed to set ethernet license\n");

sys/dev/ocs_fc/ocs_hw.c

9211

hw->callback.domain(hw->args.domain,

sys/dev/ocs_fc/ocs_hw.c

9217

ocs_log_test(hw->os, "ignore invalid FCF entry\n");

sys/dev/ocs_fc/ocs_hw.c

9221

ocs_hw_read_fcf(hw, read_fcf->next_index);

sys/dev/ocs_fc/ocs_hw.c

9225

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

9246

ocs_hw_t *hw = ctx;

sys/dev/ocs_fc/ocs_hw.c

9251

ocs_t *ocs = hw->os;

sys/dev/ocs_fc/ocs_hw.c

9253

ocs_hw_link_event_init(hw);

sys/dev/ocs_fc/ocs_hw.c

9258

hw->link = *event;

sys/dev/ocs_fc/ocs_hw.c

926

if (SLI4_IF_TYPE_LANCER_FC_ETH == sli_get_if_type(&hw->sli) &&

sys/dev/ocs_fc/ocs_hw.c

9262

ocs_hw_read_fcf(hw, SLI4_FCOE_FCF_TABLE_FIRST);

sys/dev/ocs_fc/ocs_hw.c

9267

buf = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

9269

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw.c

927

ocs_hw_set_dif_seed(hw) != OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_hw.c

9273

if (sli_cmd_read_topology(&hw->sli, buf, SLI4_BMBX_SIZE, &hw->loop_map)) {

sys/dev/ocs_fc/ocs_hw.c

9274

rc = ocs_hw_command(hw, buf, OCS_CMD_NOWAIT, __ocs_read_topology_cb, NULL);

sys/dev/ocs_fc/ocs_hw.c

9278

ocs_log_test(hw->os, "READ_TOPOLOGY failed\n");

sys/dev/ocs_fc/ocs_hw.c

9279

ocs_free(hw->os, buf, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

928

ocs_log_err(hw->os, "Failed to set DIF seed value\n");

sys/dev/ocs_fc/ocs_hw.c

9289

hw->link.status = event->status;

sys/dev/ocs_fc/ocs_hw.c

9292

d = hw->domains[i];

sys/dev/ocs_fc/ocs_hw.c

9294

hw->callback.domain != NULL) {

sys/dev/ocs_fc/ocs_hw.c

9295

hw->callback.domain(hw->args.domain, OCS_HW_DOMAIN_LOST, d);

sys/dev/ocs_fc/ocs_hw.c

9300

ocs_log_test(hw->os, "unhandled link status %#x\n", event->status);

sys/dev/ocs_fc/ocs_hw.c

9310

ocs_hw_t *hw = ctx;

sys/dev/ocs_fc/ocs_hw.c

9315

ocs_hw_assert(hw);

sys/dev/ocs_fc/ocs_hw.c

9326

d = hw->domains[i];

sys/dev/ocs_fc/ocs_hw.c

933

if (SLI4_IF_TYPE_BE3_SKH_PF == sli_get_if_type(&hw->sli) &&

sys/dev/ocs_fc/ocs_hw.c

934

sli_get_dif_capable(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw.c

9343

domain = ocs_hw_domain_get_indexed(hw, event->index);

sys/dev/ocs_fc/ocs_hw.c

9348

ocs_hw_read_fcf(hw, event->index);

sys/dev/ocs_fc/ocs_hw.c

935

rc = ocs_hw_set_dif_mode(hw);

sys/dev/ocs_fc/ocs_hw.c

9352

hw->callback.domain != NULL) {

sys/dev/ocs_fc/ocs_hw.c

9353

hw->callback.domain(hw->args.domain, OCS_HW_DOMAIN_LOST, domain);

sys/dev/ocs_fc/ocs_hw.c

9358

hw->callback.domain != NULL) {

sys/dev/ocs_fc/ocs_hw.c

9364

hw->callback.domain(hw->args.domain, OCS_HW_DOMAIN_LOST, domain);

sys/dev/ocs_fc/ocs_hw.c

9369

hw->callback.domain != NULL) {

sys/dev/ocs_fc/ocs_hw.c

937

ocs_log_err(hw->os, "Failed to set DIF mode value\n");

sys/dev/ocs_fc/ocs_hw.c

9370

hw->callback.domain(hw->args.domain, OCS_HW_DOMAIN_LOST, domain);

sys/dev/ocs_fc/ocs_hw.c

9373

ocs_hw_read_fcf(hw, event->index);

sys/dev/ocs_fc/ocs_hw.c

9376

ocs_log_test(hw->os, "unsupported event %#x\n", event->type);

sys/dev/ocs_fc/ocs_hw.c

9383

ocs_hw_cb_node_attach(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

9390

ocs_log_debug(hw->os, "bad status cqe=%#x mqe=%#x\n", status,

sys/dev/ocs_fc/ocs_hw.c

9392

ocs_atomic_sub_return(&hw->rpi_ref[rnode->index].rpi_count, 1);

sys/dev/ocs_fc/ocs_hw.c

9394

ocs_atomic_set(&hw->rpi_ref[rnode->index].rpi_attached, 0);

sys/dev/ocs_fc/ocs_hw.c

9398

ocs_atomic_set(&hw->rpi_ref[rnode->index].rpi_attached, 1);

sys/dev/ocs_fc/ocs_hw.c

9402

if (hw->callback.rnode != NULL) {

sys/dev/ocs_fc/ocs_hw.c

9403

hw->callback.rnode(hw->args.rnode, evt, rnode);

sys/dev/ocs_fc/ocs_hw.c

9405

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

9411

ocs_hw_cb_node_free(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

9419

ocs_log_debug(hw->os, "bad status cqe=%#x mqe=%#x\n", status,

sys/dev/ocs_fc/ocs_hw.c

9428

if (!rnode->attached || ((sli_get_hlm(&hw->sli) == TRUE) && !rnode->node_group) ||

sys/dev/ocs_fc/ocs_hw.c

9438

if (ocs_atomic_read(&hw->rpi_ref[rnode->index].rpi_count) == 0) {

sys/dev/ocs_fc/ocs_hw.c

9439

ocs_atomic_set(&hw->rpi_ref[rnode->index].rpi_attached, 0);

sys/dev/ocs_fc/ocs_hw.c

9445

if (hw->callback.rnode != NULL) {

sys/dev/ocs_fc/ocs_hw.c

9446

hw->callback.rnode(hw->args.rnode, evt, rnode);

sys/dev/ocs_fc/ocs_hw.c

9449

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

945

for (i = 0; i < hw->eq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

9455

ocs_hw_cb_node_free_all(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

946

sli_queue_arm(&hw->sli, &hw->eq[i], TRUE);

sys/dev/ocs_fc/ocs_hw.c

9463

ocs_log_debug(hw->os, "bad status cqe=%#x mqe=%#x\n", status,

sys/dev/ocs_fc/ocs_hw.c

9470

for (i = 0; i < sli_get_max_rsrc(&hw->sli, SLI_RSRC_FCOE_RPI); i++) {

sys/dev/ocs_fc/ocs_hw.c

9471

ocs_atomic_set(&hw->rpi_ref[i].rpi_count, 0);

sys/dev/ocs_fc/ocs_hw.c

9474

if (sli_resource_reset(&hw->sli, SLI_RSRC_FCOE_RPI)) {

sys/dev/ocs_fc/ocs_hw.c

9475

ocs_log_test(hw->os, "FCOE_RPI free all failure\n");

sys/dev/ocs_fc/ocs_hw.c

9480

if (hw->callback.rnode != NULL) {

sys/dev/ocs_fc/ocs_hw.c

9481

hw->callback.rnode(hw->args.rnode, evt, NULL);

sys/dev/ocs_fc/ocs_hw.c

9484

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

9497

ocs_hw_setup_io(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

9506

if (NULL == hw->io) {

sys/dev/ocs_fc/ocs_hw.c

9507

hw->io = ocs_malloc(hw->os, hw->config.n_io * sizeof(ocs_hw_io_t *), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

9509

if (NULL == hw->io) {

sys/dev/ocs_fc/ocs_hw.c

9510

ocs_log_err(hw->os, "IO pointer memory allocation failed, %d Ios at size %zu\n",

sys/dev/ocs_fc/ocs_hw.c

9511

hw->config.n_io,

sys/dev/ocs_fc/ocs_hw.c

9515

for (i = 0; i < hw->config.n_io; i++) {

sys/dev/ocs_fc/ocs_hw.c

9516

hw->io[i] = ocs_malloc(hw->os, sizeof(ocs_hw_io_t),

sys/dev/ocs_fc/ocs_hw.c

9518

if (hw->io[i] == NULL) {

sys/dev/ocs_fc/ocs_hw.c

9519

ocs_log_err(hw->os, "IO(%d) memory allocation failed\n", i);

sys/dev/ocs_fc/ocs_hw.c

952

for (i = 0; i < hw->rq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

9525

hw->wqe_buffs = ocs_malloc(hw->os, hw->config.n_io * hw->sli.config.wqe_size,

sys/dev/ocs_fc/ocs_hw.c

9527

if (NULL == hw->wqe_buffs) {

sys/dev/ocs_fc/ocs_hw.c

9528

ocs_free(hw->os, hw->io, hw->config.n_io * sizeof(ocs_hw_io_t));

sys/dev/ocs_fc/ocs_hw.c

9529

ocs_log_err(hw->os, "%s: IO WQE buff allocation failed, %d Ios at size %zu\n",

sys/dev/ocs_fc/ocs_hw.c

953

ocs_hw_queue_hash_add(hw->rq_hash, hw->rq[i].id, i);

sys/dev/ocs_fc/ocs_hw.c

9530

__func__, hw->config.n_io, hw->sli.config.wqe_size);

sys/dev/ocs_fc/ocs_hw.c

9540

if (ocs_dma_alloc(hw->os, &hw->xfer_rdy,

sys/dev/ocs_fc/ocs_hw.c

9541

sizeof(fcp_xfer_rdy_iu_t) * hw->config.n_io,

sys/dev/ocs_fc/ocs_hw.c

9543

ocs_log_err(hw->os, "XFER_RDY buffer allocation failed\n");

sys/dev/ocs_fc/ocs_hw.c

9547

xfer_virt = (uintptr_t)hw->xfer_rdy.virt;

sys/dev/ocs_fc/ocs_hw.c

9548

xfer_phys = hw->xfer_rdy.phys;

sys/dev/ocs_fc/ocs_hw.c

9550

for (i = 0; i < hw->config.n_io; i++) {

sys/dev/ocs_fc/ocs_hw.c

9553

io = hw->io[i];

sys/dev/ocs_fc/ocs_hw.c

9556

io->hw = hw;

sys/dev/ocs_fc/ocs_hw.c

9559

io->wqe.wqebuf = &hw->wqe_buffs[i * hw->sli.config.wqe_size];

sys/dev/ocs_fc/ocs_hw.c

9562

wqcb = ocs_hw_reqtag_alloc(hw, ocs_hw_wq_process_io, io);

sys/dev/ocs_fc/ocs_hw.c

9564

ocs_log_err(hw->os, "can't allocate request tag\n");

sys/dev/ocs_fc/ocs_hw.c

9575

if (sli_resource_alloc(&hw->sli, SLI_RSRC_FCOE_XRI, &io->indicator, &index)) {

sys/dev/ocs_fc/ocs_hw.c

9576

ocs_log_err(hw->os, "sli_resource_alloc failed @ %d\n", i);

sys/dev/ocs_fc/ocs_hw.c

9580

if (new_alloc && ocs_dma_alloc(hw->os, &io->def_sgl, hw->config.n_sgl * sizeof(sli4_sge_t), 64)) {

sys/dev/ocs_fc/ocs_hw.c

9581

ocs_log_err(hw->os, "ocs_dma_alloc failed @ %d\n", i);

sys/dev/ocs_fc/ocs_hw.c

9585

io->def_sgl_count = hw->config.n_sgl;

sys/dev/ocs_fc/ocs_hw.c

9589

if (hw->xfer_rdy.size) {

sys/dev/ocs_fc/ocs_hw.c

959

for (i = 0; i < hw->wq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

96

static int32_t ocs_hw_cb_host_stat(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg);

sys/dev/ocs_fc/ocs_hw.c

960

ocs_hw_queue_hash_add(hw->wq_hash, hw->wq[i].id, i);

sys/dev/ocs_fc/ocs_hw.c

9601

for (i = 0; i < hw->config.n_io && hw->io[i]; i++) {

sys/dev/ocs_fc/ocs_hw.c

9602

ocs_free(hw->os, hw->io[i], sizeof(ocs_hw_io_t));

sys/dev/ocs_fc/ocs_hw.c

9603

hw->io[i] = NULL;

sys/dev/ocs_fc/ocs_hw.c

9610

ocs_hw_init_io(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

9623

prereg = sli_get_sgl_preregister(&hw->sli);

sys/dev/ocs_fc/ocs_hw.c

9626

sgls = ocs_malloc(hw->os, sizeof(*sgls) * sgls_per_request, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw.c

9628

ocs_log_err(hw->os, "ocs_malloc sgls failed\n");

sys/dev/ocs_fc/ocs_hw.c

9632

rc = ocs_dma_alloc(hw->os, &reqbuf, 32 + sgls_per_request*16, OCS_MIN_DMA_ALIGNMENT);

sys/dev/ocs_fc/ocs_hw.c

9634

ocs_log_err(hw->os, "ocs_dma_alloc reqbuf failed\n");

sys/dev/ocs_fc/ocs_hw.c

9635

ocs_free(hw->os, sgls, sizeof(*sgls) * sgls_per_request);

sys/dev/ocs_fc/ocs_hw.c

9640

io = hw->io[io_index];

sys/dev/ocs_fc/ocs_hw.c

9641

for (nremaining = hw->config.n_io; nremaining; nremaining -= n) {

sys/dev/ocs_fc/ocs_hw.c

9649

if (hw->io[io_index + n]->indicator != (hw->io[io_index + n-1]->indicator+1)) {

sys/dev/ocs_fc/ocs_hw.c

9653

sgls[n] = hw->io[io_index + n]->sgl;

sys/dev/ocs_fc/ocs_hw.c

9656

if (sli_cmd_fcoe_post_sgl_pages(&hw->sli, cmd, sizeof(cmd),

sys/dev/ocs_fc/ocs_hw.c

9658

if (ocs_hw_command(hw, cmd, OCS_CMD_POLL, NULL, NULL)) {

sys/dev/ocs_fc/ocs_hw.c

966

for (i = 0; i < hw->cq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

9660

ocs_log_err(hw->os, "SGL post failed\n");

sys/dev/ocs_fc/ocs_hw.c

967

ocs_hw_queue_hash_add(hw->cq_hash, hw->cq[i].id, i);

sys/dev/ocs_fc/ocs_hw.c

9672

ocs_list_add_tail(&hw->io_free, io);

sys/dev/ocs_fc/ocs_hw.c

9673

io = hw->io[io_index+1];

sys/dev/ocs_fc/ocs_hw.c

9679

ocs_dma_free(hw->os, &reqbuf);

sys/dev/ocs_fc/ocs_hw.c

968

sli_queue_arm(&hw->sli, &hw->cq[i], TRUE);

sys/dev/ocs_fc/ocs_hw.c

9680

ocs_free(hw->os, sgls, sizeof(*sgls) * sgls_per_request);

sys/dev/ocs_fc/ocs_hw.c

9687

ocs_hw_flush(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

9692

for (i = 0; i < hw->eq_count; i++) {

sys/dev/ocs_fc/ocs_hw.c

9693

ocs_hw_process(hw, i, ~0);

sys/dev/ocs_fc/ocs_hw.c

97

static void ocs_hw_dmtf_clp_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg);

sys/dev/ocs_fc/ocs_hw.c

9700

ocs_hw_command_cancel(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

9703

ocs_lock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

9710

while (!ocs_list_empty(&hw->cmd_head)) {

sys/dev/ocs_fc/ocs_hw.c

9712

ocs_command_ctx_t *ctx = ocs_list_get_head(&hw->cmd_head);

sys/dev/ocs_fc/ocs_hw.c

9714

ocs_log_test(hw->os, "hung command %08x\n",

sys/dev/ocs_fc/ocs_hw.c

9717

ocs_unlock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

9718

ocs_hw_command_process(hw, -1/*Bad status*/, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

9719

ocs_lock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

972

hw->state = OCS_HW_STATE_ACTIVE;

sys/dev/ocs_fc/ocs_hw.c

9722

ocs_unlock(&hw->cmd_lock);

sys/dev/ocs_fc/ocs_hw.c

9736

ocs_hw_io_lookup(ocs_hw_t *hw, uint32_t xri)

sys/dev/ocs_fc/ocs_hw.c

9739

ioindex = xri - hw->sli.config.extent[SLI_RSRC_FCOE_XRI].base[0];

sys/dev/ocs_fc/ocs_hw.c

9740

return hw->io[ioindex];

sys/dev/ocs_fc/ocs_hw.c

975

if (ocs_hw_rqpair_init(hw)) {

sys/dev/ocs_fc/ocs_hw.c

9750

ocs_hw_io_cancel_cleanup(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw.c

9757

ocs_list_remove(&hw->io_timed_wqe, io);

sys/dev/ocs_fc/ocs_hw.c

976

ocs_log_err(hw->os, "WARNING - error initializing RQ pair\n");

sys/dev/ocs_fc/ocs_hw.c

9769

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

9771

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

9778

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

9780

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

9785

ocs_hw_io_cancel(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw.c

9795

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

9796

ocs_list_foreach_safe(&hw->io_inuse, io, tmp_io) {

sys/dev/ocs_fc/ocs_hw.c

98

static int32_t ocs_hw_clp_resp_get_value(ocs_hw_t *hw, const char *keyword, char *value, uint32_t value_len, const char *resp, uint32_t resp_len);

sys/dev/ocs_fc/ocs_hw.c

980

if (hw->config.emulate_wqe_timeout) {

sys/dev/ocs_fc/ocs_hw.c

9800

ocs_hw_io_cancel_cleanup(hw, io);

sys/dev/ocs_fc/ocs_hw.c

981

ocs_setup_timer(hw->os, &hw->wqe_timer, target_wqe_timer_cb, hw,

sys/dev/ocs_fc/ocs_hw.c

9819

ocs_hw_io_free_common(hw, io);

sys/dev/ocs_fc/ocs_hw.c

9820

ocs_list_remove(&hw->io_inuse, io);

sys/dev/ocs_fc/ocs_hw.c

9821

ocs_hw_io_free_move_correct_list(hw, io);

sys/dev/ocs_fc/ocs_hw.c

9829

ocs_list_foreach_safe(&hw->io_port_owned, io, tmp_io) {

sys/dev/ocs_fc/ocs_hw.c

9832

ocs_list_remove(&hw->io_port_dnrx, io);

sys/dev/ocs_fc/ocs_hw.c

9835

ocs_hw_io_cancel_cleanup(hw, io);

sys/dev/ocs_fc/ocs_hw.c

9836

ocs_list_remove(&hw->io_port_owned, io);

sys/dev/ocs_fc/ocs_hw.c

9837

ocs_hw_io_free_common(hw, io);

sys/dev/ocs_fc/ocs_hw.c

9839

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw.c

9845

} while (!ocs_list_empty(&hw->io_inuse) && iters);

sys/dev/ocs_fc/ocs_hw.c

9848

if (!ocs_list_empty(&hw->io_inuse)) {

sys/dev/ocs_fc/ocs_hw.c

9849

ocs_log_test(hw->os, "io_inuse list is not empty\n");

sys/dev/ocs_fc/ocs_hw.c

9856

ocs_hw_io_ini_sge(ocs_hw_t *hw, ocs_hw_io_t *io, ocs_dma_t *cmnd, uint32_t cmnd_size,

sys/dev/ocs_fc/ocs_hw.c

9861

if (!hw || !io) {

sys/dev/ocs_fc/ocs_hw.c

9862

ocs_log_err(NULL, "bad parm hw=%p io=%p\n", hw, io);

sys/dev/ocs_fc/ocs_hw.c

9883

__ocs_read_topology_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw.c

9888

ocs_log_debug(hw->os, "bad status cqe=%#x mqe=%#x\n",

sys/dev/ocs_fc/ocs_hw.c

989

if ((count = ocs_varray_get_count(hw->wq_class_array[1])) > 0) {

sys/dev/ocs_fc/ocs_hw.c

9890

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

9896

hw->link.status = SLI_LINK_STATUS_UP;

sys/dev/ocs_fc/ocs_hw.c

9899

hw->link.status = SLI_LINK_STATUS_DOWN;

sys/dev/ocs_fc/ocs_hw.c

99

typedef void (*ocs_hw_dmtf_clp_cb_t)(ocs_hw_t *hw, int32_t status, uint32_t result_len, void *arg);

sys/dev/ocs_fc/ocs_hw.c

9902

hw->link.status = SLI_LINK_STATUS_NO_ALPA;

sys/dev/ocs_fc/ocs_hw.c

9905

hw->link.status = SLI_LINK_STATUS_MAX;

sys/dev/ocs_fc/ocs_hw.c

991

hw_wq_t *wq = ocs_varray_iter_next(hw->wq_class_array[1]);

sys/dev/ocs_fc/ocs_hw.c

9911

hw->link.topology = SLI_LINK_TOPO_NPORT;

sys/dev/ocs_fc/ocs_hw.c

9914

hw->link.topology = SLI_LINK_TOPO_LOOP;

sys/dev/ocs_fc/ocs_hw.c

9915

if (SLI_LINK_STATUS_UP == hw->link.status) {

sys/dev/ocs_fc/ocs_hw.c

9916

hw->link.loop_map = hw->loop_map.virt;

sys/dev/ocs_fc/ocs_hw.c

9918

hw->link.fc_id = read_topo->acquired_al_pa;

sys/dev/ocs_fc/ocs_hw.c

992

wq->send_frame_io = ocs_hw_io_alloc(hw);

sys/dev/ocs_fc/ocs_hw.c

9921

hw->link.topology = SLI_LINK_TOPO_MAX;

sys/dev/ocs_fc/ocs_hw.c

9925

hw->link.medium = SLI_LINK_MEDIUM_FC;

sys/dev/ocs_fc/ocs_hw.c

9929

hw->link.speed = 1 * 1000;

sys/dev/ocs_fc/ocs_hw.c

9932

hw->link.speed = 2 * 1000;

sys/dev/ocs_fc/ocs_hw.c

9935

hw->link.speed = 4 * 1000;

sys/dev/ocs_fc/ocs_hw.c

9938

hw->link.speed = 8 * 1000;

sys/dev/ocs_fc/ocs_hw.c

994

ocs_log_err(hw->os, "ocs_hw_io_alloc for send_frame_io failed\n");

sys/dev/ocs_fc/ocs_hw.c

9941

hw->link.speed = 16 * 1000;

sys/dev/ocs_fc/ocs_hw.c

9942

hw->link.loop_map = NULL;

sys/dev/ocs_fc/ocs_hw.c

9945

hw->link.speed = 32 * 1000;

sys/dev/ocs_fc/ocs_hw.c

9946

hw->link.loop_map = NULL;

sys/dev/ocs_fc/ocs_hw.c

9950

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

9952

ocs_hw_read_fcf(hw, SLI4_FCOE_FCF_TABLE_FIRST);

sys/dev/ocs_fc/ocs_hw.c

9961

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

9973

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

9977

ocs_log_test(hw->os, "%s %-20s not handled\n", funcname, ocs_sm_event_name(evt));

sys/dev/ocs_fc/ocs_hw.c

998

hw->hw_wq[0]->send_frame_io = ocs_hw_io_alloc(hw);

sys/dev/ocs_fc/ocs_hw.c

9988

ocs_hw_t *hw = sport->hw;

sys/dev/ocs_fc/ocs_hw.c

999

if (hw->hw_wq[0]->send_frame_io == NULL) {

sys/dev/ocs_fc/ocs_hw.c

9995

ocs_free(hw->os, data, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw.c

9997

if (hw->callback.port != NULL) {

sys/dev/ocs_fc/ocs_hw.c

9998

hw->callback.port(hw->args.port,

sys/dev/ocs_fc/ocs_hw.h

1092

typedef void (*tcmd_cq_handler)(ocs_hw_t *hw, uint32_t cq_idx, void *cq_handler_arg);

sys/dev/ocs_fc/ocs_hw.h

1104

ocs_hw_t *hw;

sys/dev/ocs_fc/ocs_hw.h

1152

ocs_hw_t *hw;

sys/dev/ocs_fc/ocs_hw.h

1232

extern hw_eq_t *hw_new_eq(ocs_hw_t *hw, uint32_t entry_count);

sys/dev/ocs_fc/ocs_hw.h

1244

extern void hw_queue_dump(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.h

1245

extern void hw_queue_teardown(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.h

1246

extern int32_t hw_route_rqe(ocs_hw_t *hw, ocs_hw_sequence_t *seq);

sys/dev/ocs_fc/ocs_hw.h

1282

extern uint8_t ocs_hw_io_inuse(ocs_hw_t *hw, ocs_hw_io_t *io);

sys/dev/ocs_fc/ocs_hw.h

1286

extern ocs_hw_rtn_e _ocs_hw_io_send(ocs_hw_t *hw, ocs_hw_io_type_e type, ocs_hw_io_t *io,

sys/dev/ocs_fc/ocs_hw.h

1290

extern ocs_hw_rtn_e ocs_hw_io_init_sges(ocs_hw_t *hw, ocs_hw_io_t *io, ocs_hw_io_type_e type);

sys/dev/ocs_fc/ocs_hw.h

1291

extern ocs_hw_rtn_e ocs_hw_io_add_seed_sge(ocs_hw_t *hw, ocs_hw_io_t *io, ocs_hw_dif_info_t *dif_info);

sys/dev/ocs_fc/ocs_hw.h

1293

extern ocs_hw_rtn_e ocs_hw_io_add_dif_sge(ocs_hw_t *hw, ocs_hw_io_t *io, uintptr_t addr);

sys/dev/ocs_fc/ocs_hw.h

1297

extern uint32_t ocs_hw_get_rqes_produced_count(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.h

1332

extern ocs_hw_rtn_e ocs_hw_get_host_stats(ocs_hw_t *hw, uint8_t cc, ocs_hw_host_stat_cb_t, void *arg);

sys/dev/ocs_fc/ocs_hw.h

1340

extern ocs_hw_rtn_e ocs_hw_get_port_protocol(ocs_hw_t *hw, uint32_t pci_func, ocs_get_port_protocol_cb_t mgmt_cb, void* ul_arg);

sys/dev/ocs_fc/ocs_hw.h

1342

extern ocs_hw_rtn_e ocs_hw_set_port_protocol(ocs_hw_t *hw, ocs_hw_port_protocol_e profile,

sys/dev/ocs_fc/ocs_hw.h

1347

extern ocs_hw_rtn_e ocs_hw_get_profile_list(ocs_hw_t *hw, ocs_get_profile_list_cb_t mgmt_cb, void *arg);

sys/dev/ocs_fc/ocs_hw.h

1349

extern ocs_hw_rtn_e ocs_hw_get_active_profile(ocs_hw_t *hw, ocs_get_active_profile_cb_t mgmt_cb, void *arg);

sys/dev/ocs_fc/ocs_hw.h

1351

extern ocs_hw_rtn_e ocs_hw_set_active_profile(ocs_hw_t *hw, ocs_set_active_profile_cb_t mgmt_cb,

sys/dev/ocs_fc/ocs_hw.h

1355

extern ocs_hw_rtn_e ocs_hw_get_nvparms(ocs_hw_t *hw, ocs_get_nvparms_cb_t mgmt_cb, void *arg);

sys/dev/ocs_fc/ocs_hw.h

1357

extern ocs_hw_rtn_e ocs_hw_set_nvparms(ocs_hw_t *hw, ocs_set_nvparms_cb_t mgmt_cb, uint8_t *wwpn,

sys/dev/ocs_fc/ocs_hw.h

1359

extern int32_t ocs_hw_eq_process(ocs_hw_t *hw, hw_eq_t *eq, uint32_t max_isr_time_msec);

sys/dev/ocs_fc/ocs_hw.h

1360

extern void ocs_hw_cq_process(ocs_hw_t *hw, hw_cq_t *cq);

sys/dev/ocs_fc/ocs_hw.h

1361

extern void ocs_hw_wq_process(ocs_hw_t *hw, hw_cq_t *cq, uint8_t *cqe, int32_t status, uint16_t rid);

sys/dev/ocs_fc/ocs_hw.h

1362

extern void ocs_hw_xabt_process(ocs_hw_t *hw, hw_cq_t *cq, uint8_t *cqe, uint16_t rid);

sys/dev/ocs_fc/ocs_hw.h

1368

extern uint8_t ocs_hw_is_io_port_owned(ocs_hw_t *hw, ocs_hw_io_t *io);

sys/dev/ocs_fc/ocs_hw.h

1370

extern uint8_t ocs_hw_is_xri_port_owned(ocs_hw_t *hw, uint32_t xri);

sys/dev/ocs_fc/ocs_hw.h

1371

extern ocs_hw_io_t * ocs_hw_io_lookup(ocs_hw_t *hw, uint32_t indicator);

sys/dev/ocs_fc/ocs_hw.h

1372

extern uint32_t ocs_hw_xri_move_to_port_owned(ocs_hw_t *hw, uint32_t num_xri);

sys/dev/ocs_fc/ocs_hw.h

1373

extern ocs_hw_rtn_e ocs_hw_xri_move_to_host_owned(ocs_hw_t *hw, uint8_t num_xri);

sys/dev/ocs_fc/ocs_hw.h

1374

extern int32_t ocs_hw_reque_xri(ocs_hw_t *hw, ocs_hw_io_t *io);

sys/dev/ocs_fc/ocs_hw.h

1375

ocs_hw_rtn_e ocs_hw_set_persistent_topology(ocs_hw_t *hw, uint32_t topology, uint32_t opts);

sys/dev/ocs_fc/ocs_hw.h

1376

extern uint32_t ocs_hw_get_config_persistent_topology(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.h

1380

ocs_hw_t *hw; /**> pointer to HW */

sys/dev/ocs_fc/ocs_hw.h

1405

ocs_hw_send_frame(ocs_hw_t *hw, fc_header_le_t *hdr, uint8_t sof, uint8_t eof, ocs_dma_t *payload,

sys/dev/ocs_fc/ocs_hw.h

1410

extern int32_t ocs_hw_rqpair_process_rq(ocs_hw_t *hw, hw_cq_t *cq, uint8_t *cqe);

sys/dev/ocs_fc/ocs_hw.h

1411

extern ocs_hw_rtn_e ocs_hw_rqpair_sequence_free(ocs_hw_t *hw, ocs_hw_sequence_t *seq);

sys/dev/ocs_fc/ocs_hw.h

1412

extern int32_t ocs_hw_rqpair_process_auto_xfr_rdy_cmd(ocs_hw_t *hw, hw_cq_t *cq, uint8_t *cqe);

sys/dev/ocs_fc/ocs_hw.h

1413

extern int32_t ocs_hw_rqpair_process_auto_xfr_rdy_data(ocs_hw_t *hw, hw_cq_t *cq, uint8_t *cqe);

sys/dev/ocs_fc/ocs_hw.h

1414

extern ocs_hw_rtn_e ocs_hw_rqpair_init(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.h

1415

extern ocs_hw_rtn_e ocs_hw_rqpair_auto_xfer_rdy_buffer_alloc(ocs_hw_t *hw, uint32_t num_buffers);

sys/dev/ocs_fc/ocs_hw.h

1416

extern uint8_t ocs_hw_rqpair_auto_xfer_rdy_buffer_post(ocs_hw_t *hw, ocs_hw_io_t *io, int reuse_buf);

sys/dev/ocs_fc/ocs_hw.h

1417

extern ocs_hw_rtn_e ocs_hw_rqpair_auto_xfer_rdy_move_to_port(ocs_hw_t *hw, ocs_hw_io_t *io);

sys/dev/ocs_fc/ocs_hw.h

1418

extern void ocs_hw_rqpair_auto_xfer_rdy_move_to_host(ocs_hw_t *hw, ocs_hw_io_t *io);

sys/dev/ocs_fc/ocs_hw.h

1419

extern void ocs_hw_rqpair_teardown(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.h

1421

extern ocs_hw_rtn_e ocs_hw_rx_allocate(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.h

1422

extern ocs_hw_rtn_e ocs_hw_rx_post(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.h

1423

extern void ocs_hw_rx_free(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.h

1427

typedef int32_t (*ocs_hw_async_cb_t)(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg);

sys/dev/ocs_fc/ocs_hw.h

1428

extern int32_t ocs_hw_async_call(ocs_hw_t *hw, ocs_hw_async_cb_t callback, void *arg);

sys/dev/ocs_fc/ocs_hw.h

1439

ocs_hw_sequence_free(ocs_hw_t *hw, ocs_hw_sequence_t *seq)

sys/dev/ocs_fc/ocs_hw.h

1442

return ocs_hw_rqpair_sequence_free(hw, seq);

sys/dev/ocs_fc/ocs_hw.h

1446

extern ocs_hw_rtn_e ocs_hw_reqtag_init(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.h

1447

extern hw_wq_callback_t *ocs_hw_reqtag_alloc(ocs_hw_t *hw,

sys/dev/ocs_fc/ocs_hw.h

1449

extern void ocs_hw_reqtag_free(ocs_hw_t *hw, hw_wq_callback_t *wqcb);

sys/dev/ocs_fc/ocs_hw.h

1450

extern hw_wq_callback_t *ocs_hw_reqtag_get_instance(ocs_hw_t *hw, uint32_t instance_index);

sys/dev/ocs_fc/ocs_hw.h

1451

extern void ocs_hw_reqtag_reset(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw.h

1477

extern void ocs_hw_workaround_setup(struct ocs_hw_s *hw);

sys/dev/ocs_fc/ocs_hw.h

565

ocs_hw_t *hw; /**< pointer back to hardware context */

sys/dev/ocs_fc/ocs_hw.h

747

ocs_hw_t *hw; /**< HW that owns this sequence */

sys/dev/ocs_fc/ocs_hw_queues.c

1004

wq = hw->hw_wq[0];

sys/dev/ocs_fc/ocs_hw_queues.c

101

for (i = 0; i < ARRAY_SIZE(hw->wq_class_array); i++) {

sys/dev/ocs_fc/ocs_hw_queues.c

102

hw->wq_class_array[i] = ocs_varray_alloc(hw->os, OCS_HW_MAX_NUM_WQ);

sys/dev/ocs_fc/ocs_hw_queues.c

1020

ocs_hw_qtop_eq_count(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw_queues.c

1022

return hw->qtop->entry_counts[QTOP_EQ];

sys/dev/ocs_fc/ocs_hw_queues.c

103

if (hw->wq_class_array[i] == NULL) {

sys/dev/ocs_fc/ocs_hw_queues.c

104

ocs_log_err(hw->os, "ocs_varray_alloc for wq_class failed\n");

sys/dev/ocs_fc/ocs_hw_queues.c

110

for (i = 0; i < ARRAY_SIZE(hw->wq_cpu_array); i++) {

sys/dev/ocs_fc/ocs_hw_queues.c

111

hw->wq_cpu_array[i] = ocs_varray_alloc(hw->os, OCS_HW_MAX_NUM_WQ);

sys/dev/ocs_fc/ocs_hw_queues.c

112

if (hw->wq_cpu_array[i] == NULL) {

sys/dev/ocs_fc/ocs_hw_queues.c

113

ocs_log_err(hw->os, "ocs_varray_alloc for wq_class failed\n");

sys/dev/ocs_fc/ocs_hw_queues.c

1348

tok_syntax(ocs_hw_t *hw, tokarray_t *tokarray)

sys/dev/ocs_fc/ocs_hw_queues.c

135

eq = hw_new_eq(hw, len);

sys/dev/ocs_fc/ocs_hw_queues.c

1353

ocs_log_test(hw->os, "Syntax error:\n");

sys/dev/ocs_fc/ocs_hw_queues.c

1356

ocs_log_test(hw->os, "%s [%2d] %-16s %-16s %s\n", (i == tokarray->iter_idx) ? ">>>" : " ", i,

sys/dev/ocs_fc/ocs_hw_queues.c

137

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

1373

tok_getnumber(ocs_hw_t *hw, ocs_hw_qtop_t *qtop, tok_t *tok)

sys/dev/ocs_fc/ocs_hw_queues.c

1385

if (hw != NULL) {

sys/dev/ocs_fc/ocs_hw_queues.c

1386

rval = hw->config.n_wq;

sys/dev/ocs_fc/ocs_hw_queues.c

1391

rval = hw->ulp_max - hw->ulp_start + 1;

sys/dev/ocs_fc/ocs_hw_queues.c

1425

parse_topology(ocs_hw_t *hw, tokarray_t *tokarray, ocs_hw_qtop_t *qtop)

sys/dev/ocs_fc/ocs_hw_queues.c

1460

qt->len = tok_getnumber(hw, qtop, &tok[3]);

sys/dev/ocs_fc/ocs_hw_queues.c

1464

qt->class = tok_getnumber(hw, qtop, &tok[3]);

sys/dev/ocs_fc/ocs_hw_queues.c

1468

qt->ulp = tok_getnumber(hw, qtop, &tok[3]);

sys/dev/ocs_fc/ocs_hw_queues.c

1491

qt->filter_mask = (1U << tok_getnumber(hw, qtop, &tok[3]));

sys/dev/ocs_fc/ocs_hw_queues.c

1516

qt->len = tok_getnumber(hw, qtop, &tok[4]);

sys/dev/ocs_fc/ocs_hw_queues.c

1519

qt->class = tok_getnumber(hw, qtop, &tok[4]);

sys/dev/ocs_fc/ocs_hw_queues.c

1522

qt->ulp = tok_getnumber(hw, qtop, &tok[4]);

sys/dev/ocs_fc/ocs_hw_queues.c

1530

tok_syntax(hw, tokarray);

sys/dev/ocs_fc/ocs_hw_queues.c

1540

rpt_count = tok_getnumber(hw, qtop, tok);

sys/dev/ocs_fc/ocs_hw_queues.c

1561

parse_topology(hw, tokarray, qtop);

sys/dev/ocs_fc/ocs_hw_queues.c

1574

tok_syntax(hw, tokarray);

sys/dev/ocs_fc/ocs_hw_queues.c

1593

ocs_hw_qtop_parse(ocs_hw_t *hw, const char *qtop_string)

sys/dev/ocs_fc/ocs_hw_queues.c

1603

ocs_log_debug(hw->os, "queue topology: %s\n", qtop_string);

sys/dev/ocs_fc/ocs_hw_queues.c

1606

tokarray.tokens = ocs_malloc(hw->os, MAX_TOKENS * sizeof(*tokarray.tokens), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw_queues.c

1621

qtop = ocs_malloc(hw->os, sizeof(*qtop), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw_queues.c

1623

ocs_free(hw->os, tokarray.tokens, MAX_TOKENS * sizeof(*tokarray.tokens));

sys/dev/ocs_fc/ocs_hw_queues.c

1624

ocs_log_err(hw->os, "malloc qtop failed\n");

sys/dev/ocs_fc/ocs_hw_queues.c

1627

qtop->os = hw->os;

sys/dev/ocs_fc/ocs_hw_queues.c

1630

qtop->entries = ocs_malloc(hw->os, OCS_HW_MAX_QTOP_ENTRIES*sizeof(*qtop->entries), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw_queues.c

1632

ocs_log_err(hw->os, "malloc qtop entries failed\n");

sys/dev/ocs_fc/ocs_hw_queues.c

1633

ocs_free(hw->os, qtop, sizeof(*qtop));

sys/dev/ocs_fc/ocs_hw_queues.c

1634

ocs_free(hw->os, tokarray.tokens, MAX_TOKENS * sizeof(*tokarray.tokens));

sys/dev/ocs_fc/ocs_hw_queues.c

1641

parse_topology(hw, &tokarray, qtop);

sys/dev/ocs_fc/ocs_hw_queues.c

1644

ocs_log_debug(hw->os, "entry %s set_df %d len %4d class %d ulp %d\n", qtopentry2s(qt->entry), qt->set_default, qt->len,

sys/dev/ocs_fc/ocs_hw_queues.c

1650

ocs_free(hw->os, tokarray.tokens, MAX_TOKENS * sizeof(*tokarray.tokens));

sys/dev/ocs_fc/ocs_hw_queues.c

1676

static int32_t ocs_hw_rqpair_find(ocs_hw_t *hw, uint16_t rq_id);

sys/dev/ocs_fc/ocs_hw_queues.c

1677

static ocs_hw_sequence_t * ocs_hw_rqpair_get(ocs_hw_t *hw, uint16_t rqindex, uint16_t bufindex);

sys/dev/ocs_fc/ocs_hw_queues.c

1678

static int32_t ocs_hw_rqpair_put(ocs_hw_t *hw, ocs_hw_sequence_t *seq);

sys/dev/ocs_fc/ocs_hw_queues.c

1679

static ocs_hw_rtn_e ocs_hw_rqpair_auto_xfer_rdy_buffer_sequence_reset(ocs_hw_t *hw, ocs_hw_sequence_t *seq);

sys/dev/ocs_fc/ocs_hw_queues.c

1697

ocs_hw_rqpair_process_rq(ocs_hw_t *hw, hw_cq_t *cq, uint8_t *cqe)

sys/dev/ocs_fc/ocs_hw_queues.c

170

if ((hw->ulp_start + qt->ulp) > hw->ulp_max) {

sys/dev/ocs_fc/ocs_hw_queues.c

1707

rq_status = sli_fc_rqe_rqid_and_index(&hw->sli, cqe, &rq_id, &index);

sys/dev/ocs_fc/ocs_hw_queues.c

171

ocs_log_err(hw->os, "invalid ULP %d for WQ\n", qt->ulp);

sys/dev/ocs_fc/ocs_hw_queues.c

1713

rqindex = ocs_hw_rqpair_find(hw, rq_id);

sys/dev/ocs_fc/ocs_hw_queues.c

1715

ocs_log_test(hw->os, "status=%#x: rq_id lookup failed for id=%#x\n",

sys/dev/ocs_fc/ocs_hw_queues.c

172

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

1721

seq = ocs_hw_rqpair_get(hw, rqindex, index);

sys/dev/ocs_fc/ocs_hw_queues.c

1724

if (ocs_hw_rqpair_sequence_free(hw, seq)) {

sys/dev/ocs_fc/ocs_hw_queues.c

1725

ocs_log_test(hw->os, "status=%#x, failed to return buffers to RQ\n",

sys/dev/ocs_fc/ocs_hw_queues.c

1734

ocs_log_debug(hw->os, "Warning: RCQE status=%#x, \n", rq_status);

sys/dev/ocs_fc/ocs_hw_queues.c

1741

rqindex = ocs_hw_rqpair_find(hw, rq_id);

sys/dev/ocs_fc/ocs_hw_queues.c

1743

ocs_log_test(hw->os, "Error: rq_id lookup failed for id=%#x\n", rq_id);

sys/dev/ocs_fc/ocs_hw_queues.c

1747

OCS_STAT({ hw_rq_t *rq = hw->hw_rq[hw->hw_rq_lookup[rqindex]]; rq->use_count++; rq->hdr_use_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

1750

seq = ocs_hw_rqpair_get(hw, rqindex, index);

sys/dev/ocs_fc/ocs_hw_queues.c

1753

seq->hw = hw;

sys/dev/ocs_fc/ocs_hw_queues.c

1759

sli_fc_rqe_length(&hw->sli, cqe, &h_len, &p_len);

sys/dev/ocs_fc/ocs_hw_queues.c

1762

seq->fcfi = sli_fc_rqe_fcfi(&hw->sli, cqe);

sys/dev/ocs_fc/ocs_hw_queues.c

1766

if (hw->config.bounce) {

sys/dev/ocs_fc/ocs_hw_queues.c

1771

if (hw->callback.bounce != NULL) {

sys/dev/ocs_fc/ocs_hw_queues.c

1772

(*hw->callback.bounce)(ocs_hw_unsol_process_bounce, seq, s_id, d_id, ox_id);

sys/dev/ocs_fc/ocs_hw_queues.c

1775

hw->callback.unsolicited(hw->args.unsolicited, seq);

sys/dev/ocs_fc/ocs_hw_queues.c

179

wq = hw_new_wq(cq, len, qt->class, hw->ulp_start + qt->ulp);

sys/dev/ocs_fc/ocs_hw_queues.c

1797

ocs_hw_rqpair_process_auto_xfr_rdy_cmd(ocs_hw_t *hw, hw_cq_t *cq, uint8_t *cqe)

sys/dev/ocs_fc/ocs_hw_queues.c

1814

rq_status = sli_fc_rqe_rqid_and_index(&hw->sli, cqe, &rq_id, &index);

sys/dev/ocs_fc/ocs_hw_queues.c

1820

rqindex = ocs_hw_rqpair_find(hw, rq_id);

sys/dev/ocs_fc/ocs_hw_queues.c

1822

ocs_log_err(hw->os, "status=%#x: rq_id lookup failed for id=%#x\n",

sys/dev/ocs_fc/ocs_hw_queues.c

1828

seq = ocs_hw_rqpair_get(hw, rqindex, index);

sys/dev/ocs_fc/ocs_hw_queues.c

1831

if (ocs_hw_rqpair_sequence_free(hw, seq)) {

sys/dev/ocs_fc/ocs_hw_queues.c

1832

ocs_log_err(hw->os, "status=%#x, failed to return buffers to RQ\n",

sys/dev/ocs_fc/ocs_hw_queues.c

1840

ocs_log_debug(hw->os, "Warning: RCQE status=%#x, \n", rq_status);

sys/dev/ocs_fc/ocs_hw_queues.c

1848

rqindex = ocs_hw_rqpair_find(hw, rq_id);

sys/dev/ocs_fc/ocs_hw_queues.c

1850

ocs_log_err(hw->os, "Error: rq_id lookup failed for id=%#x\n", rq_id);

sys/dev/ocs_fc/ocs_hw_queues.c

1854

OCS_STAT({ hw_rq_t *rq = hw->hw_rq[hw->hw_rq_lookup[rqindex]]; rq->use_count++; rq->hdr_use_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

1857

seq = ocs_hw_rqpair_get(hw, rqindex, index);

sys/dev/ocs_fc/ocs_hw_queues.c

186

ocs_log_err(hw->os, "QTOP_WQ: EQ ocs_varray_add failed\n");

sys/dev/ocs_fc/ocs_hw_queues.c

1860

seq->hw = hw;

sys/dev/ocs_fc/ocs_hw_queues.c

1866

sli_fc_rqe_length(&hw->sli, cqe, &h_len, &p_len);

sys/dev/ocs_fc/ocs_hw_queues.c

1869

seq->fcfi = sli_fc_rqe_fcfi(&hw->sli, cqe);

sys/dev/ocs_fc/ocs_hw_queues.c

187

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

1875

seq->hio = ocs_hw_io_lookup(hw, seq->xri);

sys/dev/ocs_fc/ocs_hw_queues.c

1902

if (hw->config.bounce) {

sys/dev/ocs_fc/ocs_hw_queues.c

1907

if (hw->callback.bounce != NULL) {

sys/dev/ocs_fc/ocs_hw_queues.c

1908

(*hw->callback.bounce)(ocs_hw_unsol_process_bounce, seq, s_id, d_id, ox_id);

sys/dev/ocs_fc/ocs_hw_queues.c

1911

hw->callback.unsolicited(hw->args.unsolicited, seq);

sys/dev/ocs_fc/ocs_hw_queues.c

192

if (qt->class < ARRAY_SIZE(hw->wq_class_array)) {

sys/dev/ocs_fc/ocs_hw_queues.c

1924

if (hw->config.bounce) {

sys/dev/ocs_fc/ocs_hw_queues.c

1929

if (hw->callback.bounce != NULL) {

sys/dev/ocs_fc/ocs_hw_queues.c

193

if (ocs_varray_add(hw->wq_class_array[qt->class], wq)) {

sys/dev/ocs_fc/ocs_hw_queues.c

1930

(*hw->callback.bounce)(ocs_hw_unsol_process_bounce, &seq->hio->axr_buf->seq, s_id, d_id, ox_id);

sys/dev/ocs_fc/ocs_hw_queues.c

1933

hw->callback.unsolicited(hw->args.unsolicited, &seq->hio->axr_buf->seq);

sys/dev/ocs_fc/ocs_hw_queues.c

194

ocs_log_err(hw->os, "HW wq_class_array ocs_varray_add failed\n");

sys/dev/ocs_fc/ocs_hw_queues.c

195

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

1961

ocs_hw_rqpair_process_auto_xfr_rdy_data(ocs_hw_t *hw, hw_cq_t *cq, uint8_t *cqe)

sys/dev/ocs_fc/ocs_hw_queues.c

1973

io = ocs_hw_io_lookup(hw, opt_wr->xri);

sys/dev/ocs_fc/ocs_hw_queues.c

1978

seq->hw = hw;

sys/dev/ocs_fc/ocs_hw_queues.c

199

ocs_log_err(hw->os, "Invalid class value: %d\n", qt->class);

sys/dev/ocs_fc/ocs_hw_queues.c

200

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

2017

if (hw->config.bounce) {

sys/dev/ocs_fc/ocs_hw_queues.c

2022

if (hw->callback.bounce != NULL) {

sys/dev/ocs_fc/ocs_hw_queues.c

2023

(*hw->callback.bounce)(ocs_hw_unsol_process_bounce, seq, s_id, d_id, ox_id);

sys/dev/ocs_fc/ocs_hw_queues.c

2026

hw->callback.unsolicited(hw->args.unsolicited, seq);

sys/dev/ocs_fc/ocs_hw_queues.c

2047

ocs_hw_rqpair_get(ocs_hw_t *hw, uint16_t rqindex, uint16_t bufindex)

sys/dev/ocs_fc/ocs_hw_queues.c

2049

sli4_queue_t *rq_hdr = &hw->rq[rqindex];

sys/dev/ocs_fc/ocs_hw_queues.c

2050

sli4_queue_t *rq_payload = &hw->rq[rqindex+1];

sys/dev/ocs_fc/ocs_hw_queues.c

2052

hw_rq_t *rq = hw->hw_rq[hw->hw_rq_lookup[rqindex]];

sys/dev/ocs_fc/ocs_hw_queues.c

2059

ocs_log_err(hw->os, "RQ index %d bufindex %d exceed ring length %d for id %d\n",

sys/dev/ocs_fc/ocs_hw_queues.c

2069

_sli_queue_poke(&hw->sli, rq_hdr, bufindex, (uint8_t *)&rqbuf_debug_value);

sys/dev/ocs_fc/ocs_hw_queues.c

2070

_sli_queue_poke(&hw->sli, rq_payload, bufindex, (uint8_t *)&rqbuf_debug_value);

sys/dev/ocs_fc/ocs_hw_queues.c

2077

ocs_log_err(hw->os, "RQ buffer NULL, rqindex %d, bufindex %d, current q index = %d\n",

sys/dev/ocs_fc/ocs_hw_queues.c

208

if (ocs_varray_add(hw->wq_cpu_array[eq->instance % ocs_get_num_cpus()], wq)) {

sys/dev/ocs_fc/ocs_hw_queues.c

209

ocs_log_err(hw->os, "HW wq_cpu_array ocs_varray_add failed\n");

sys/dev/ocs_fc/ocs_hw_queues.c

2095

ocs_hw_rqpair_put(ocs_hw_t *hw, ocs_hw_sequence_t *seq)

sys/dev/ocs_fc/ocs_hw_queues.c

2097

sli4_queue_t *rq_hdr = &hw->rq[seq->header->rqindex];

sys/dev/ocs_fc/ocs_hw_queues.c

2098

sli4_queue_t *rq_payload = &hw->rq[seq->payload->rqindex];

sys/dev/ocs_fc/ocs_hw_queues.c

2099

uint32_t hw_rq_index = hw->hw_rq_lookup[seq->header->rqindex];

sys/dev/ocs_fc/ocs_hw_queues.c

210

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

2100

hw_rq_t *rq = hw->hw_rq[hw_rq_index];

sys/dev/ocs_fc/ocs_hw_queues.c

2120

qindex_payload = _sli_queue_write(&hw->sli, rq_payload, (void *)phys_payload);

sys/dev/ocs_fc/ocs_hw_queues.c

2121

qindex_hdr = _sli_queue_write(&hw->sli, rq_hdr, (void *)phys_hdr);

sys/dev/ocs_fc/ocs_hw_queues.c

2124

ocs_log_err(hw->os, "RQ_ID=%#x write failed\n", rq_hdr->id);

sys/dev/ocs_fc/ocs_hw_queues.c

2137

ocs_log_test(hw->os, "expected rq_tracker[%d][%d] buffer to be NULL\n",

sys/dev/ocs_fc/ocs_hw_queues.c

2159

ocs_hw_rqpair_sequence_free(ocs_hw_t *hw, ocs_hw_sequence_t *seq)

sys/dev/ocs_fc/ocs_hw_queues.c

2165

return ocs_hw_rqpair_auto_xfer_rdy_buffer_sequence_reset(hw, seq);

sys/dev/ocs_fc/ocs_hw_queues.c

2172

if (ocs_hw_rqpair_put(hw, seq)) {

sys/dev/ocs_fc/ocs_hw_queues.c

2173

ocs_log_err(hw->os, "error writing buffers\n");

sys/dev/ocs_fc/ocs_hw_queues.c

2189

ocs_hw_rqpair_find(ocs_hw_t *hw, uint16_t rq_id)

sys/dev/ocs_fc/ocs_hw_queues.c

2191

return ocs_hw_queue_hash_find(hw->rq_hash, rq_id);

sys/dev/ocs_fc/ocs_hw_queues.c

2207

ocs_hw_rqpair_auto_xfer_rdy_buffer_alloc(ocs_hw_t *hw, uint32_t num_buffers)

sys/dev/ocs_fc/ocs_hw_queues.c

2212

hw->auto_xfer_rdy_buf_pool = ocs_pool_alloc(hw->os, sizeof(ocs_hw_auto_xfer_rdy_buffer_t), num_buffers, FALSE);

sys/dev/ocs_fc/ocs_hw_queues.c

2213

if (hw->auto_xfer_rdy_buf_pool == NULL) {

sys/dev/ocs_fc/ocs_hw_queues.c

2214

ocs_log_err(hw->os, "Failure to allocate auto xfer ready buffer pool\n");

sys/dev/ocs_fc/ocs_hw_queues.c

2220

buf = ocs_pool_get_instance(hw->auto_xfer_rdy_buf_pool, i);

sys/dev/ocs_fc/ocs_hw_queues.c

2224

if (ocs_dma_alloc(hw->os, &buf->payload.dma, hw->config.auto_xfer_rdy_size, OCS_MIN_DMA_ALIGNMENT)) {

sys/dev/ocs_fc/ocs_hw_queues.c

2225

ocs_log_err(hw->os, "DMA allocation failed\n");

sys/dev/ocs_fc/ocs_hw_queues.c

2226

ocs_free(hw->os, buf, sizeof(*buf));

sys/dev/ocs_fc/ocs_hw_queues.c

223

if ((hw->ulp_start + qt->ulp) > hw->ulp_max) {

sys/dev/ocs_fc/ocs_hw_queues.c

224

ocs_log_err(hw->os, "invalid ULP %d for RQ\n", qt->ulp);

sys/dev/ocs_fc/ocs_hw_queues.c

225

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

2262

ocs_hw_rqpair_auto_xfer_rdy_dnrx_check(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw_queues.c

2267

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw_queues.c

2269

while (!ocs_list_empty(&hw->io_port_dnrx)) {

sys/dev/ocs_fc/ocs_hw_queues.c

2270

io = ocs_list_remove_head(&hw->io_port_dnrx);

sys/dev/ocs_fc/ocs_hw_queues.c

2271

rc = ocs_hw_reque_xri(hw, io);

sys/dev/ocs_fc/ocs_hw_queues.c

2277

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw_queues.c

2294

ocs_hw_rqpair_auto_xfer_rdy_move_to_port_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_hw_queues.c

2297

ocs_log_debug(hw->os, "Status 0x%x\n", status);

sys/dev/ocs_fc/ocs_hw_queues.c

2300

ocs_free(hw->os, mqe, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw_queues.c

231

mrq.rq_cfg[mrq.num_pairs].ulp = hw->ulp_start + qt->ulp;

sys/dev/ocs_fc/ocs_hw_queues.c

2318

ocs_hw_rqpair_auto_xfer_rdy_move_to_port(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw_queues.c

2321

if (!sli_get_sgl_preregister(&hw->sli)) {

sys/dev/ocs_fc/ocs_hw_queues.c

2327

post_sgl = ocs_malloc(hw->os, SLI4_BMBX_SIZE, OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw_queues.c

2329

ocs_log_err(hw->os, "no buffer for command\n");

sys/dev/ocs_fc/ocs_hw_queues.c

2332

if (sli_cmd_fcoe_post_sgl_pages(&hw->sli, post_sgl, SLI4_BMBX_SIZE,

sys/dev/ocs_fc/ocs_hw_queues.c

2334

if (ocs_hw_command(hw, post_sgl, OCS_CMD_NOWAIT,

sys/dev/ocs_fc/ocs_hw_queues.c

2336

ocs_free(hw->os, post_sgl, SLI4_BMBX_SIZE);

sys/dev/ocs_fc/ocs_hw_queues.c

2337

ocs_log_err(hw->os, "SGL post failed\n");

sys/dev/ocs_fc/ocs_hw_queues.c

2343

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw_queues.c

2344

if (ocs_hw_rqpair_auto_xfer_rdy_buffer_post(hw, io, 0) != 0) { /* DNRX set - no buffer */

sys/dev/ocs_fc/ocs_hw_queues.c

2345

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw_queues.c

2348

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw_queues.c

236

rq = hw_new_rq(cq, len, hw->ulp_start + qt->ulp);

sys/dev/ocs_fc/ocs_hw_queues.c

2362

ocs_hw_rqpair_auto_xfer_rdy_move_to_host(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw_queues.c

2365

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw_queues.c

2368

ocs_list_remove(&hw->io_port_dnrx, io);

sys/dev/ocs_fc/ocs_hw_queues.c

2372

ocs_hw_io_free(hw, io);

sys/dev/ocs_fc/ocs_hw_queues.c

2375

ocs_pool_put(hw->auto_xfer_rdy_buf_pool, io->axr_buf);

sys/dev/ocs_fc/ocs_hw_queues.c

2377

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw_queues.c

2379

ocs_hw_rqpair_auto_xfer_rdy_dnrx_check(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

238

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

2398

ocs_hw_rqpair_auto_xfer_rdy_buffer_post(ocs_hw_t *hw, ocs_hw_io_t *io, int reuse_buf)

sys/dev/ocs_fc/ocs_hw_queues.c

2404

buf = ocs_pool_get(hw->auto_xfer_rdy_buf_pool);

sys/dev/ocs_fc/ocs_hw_queues.c

2432

if (hw->config.auto_xfer_rdy_p_type) {

sys/dev/ocs_fc/ocs_hw_queues.c

2436

diseed->repl_app_tag = hw->config.auto_xfer_rdy_app_tag_value;

sys/dev/ocs_fc/ocs_hw_queues.c

2437

diseed->app_tag_cmp = hw->config.auto_xfer_rdy_app_tag_value;

sys/dev/ocs_fc/ocs_hw_queues.c

2438

diseed->check_app_tag = hw->config.auto_xfer_rdy_app_tag_valid;

sys/dev/ocs_fc/ocs_hw_queues.c

2440

diseed->dif_blk_size = hw->config.auto_xfer_rdy_blk_size_chip;

sys/dev/ocs_fc/ocs_hw_queues.c

2469

ocs_hw_rqpair_auto_xfer_rdy_buffer_sequence_reset(ocs_hw_t *hw, ocs_hw_sequence_t *seq)

sys/dev/ocs_fc/ocs_hw_queues.c

2497

ocs_hw_rqpair_auto_xfer_rdy_dnrx_check(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

2514

ocs_hw_rqpair_auto_xfer_rdy_buffer_free(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw_queues.c

2519

if (hw->auto_xfer_rdy_buf_pool != NULL) {

sys/dev/ocs_fc/ocs_hw_queues.c

2520

ocs_lock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw_queues.c

2521

for (i = 0; i < ocs_pool_get_count(hw->auto_xfer_rdy_buf_pool); i++) {

sys/dev/ocs_fc/ocs_hw_queues.c

2522

buf = ocs_pool_get_instance(hw->auto_xfer_rdy_buf_pool, i);

sys/dev/ocs_fc/ocs_hw_queues.c

2524

ocs_dma_free(hw->os, &buf->payload.dma);

sys/dev/ocs_fc/ocs_hw_queues.c

2527

ocs_unlock(&hw->io_lock);

sys/dev/ocs_fc/ocs_hw_queues.c

2529

ocs_pool_free(hw->auto_xfer_rdy_buf_pool);

sys/dev/ocs_fc/ocs_hw_queues.c

2530

hw->auto_xfer_rdy_buf_pool = NULL;

sys/dev/ocs_fc/ocs_hw_queues.c

2546

ocs_hw_rqpair_init(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw_queues.c

2551

ocs_log_debug(hw->os, "RQ Pair mode\n");

sys/dev/ocs_fc/ocs_hw_queues.c

2558

if (sli_get_auto_xfer_rdy_capable(&hw->sli) &&

sys/dev/ocs_fc/ocs_hw_queues.c

2559

hw->config.auto_xfer_rdy_size > 0) {

sys/dev/ocs_fc/ocs_hw_queues.c

2560

if (hw->auto_xfer_rdy_buf_pool == NULL) {

sys/dev/ocs_fc/ocs_hw_queues.c

2566

rc = ocs_hw_rqpair_auto_xfer_rdy_buffer_alloc(hw, hw->config.auto_xfer_rdy_xri_cnt + 1);

sys/dev/ocs_fc/ocs_hw_queues.c

2571

ocs_pool_reset(hw->auto_xfer_rdy_buf_pool);

sys/dev/ocs_fc/ocs_hw_queues.c

2575

xris_posted = ocs_hw_xri_move_to_port_owned(hw, hw->config.auto_xfer_rdy_xri_cnt);

sys/dev/ocs_fc/ocs_hw_queues.c

2576

if (xris_posted != hw->config.auto_xfer_rdy_xri_cnt) {

sys/dev/ocs_fc/ocs_hw_queues.c

2577

ocs_log_err(hw->os, "post_xri failed, only posted %d XRIs\n", xris_posted);

sys/dev/ocs_fc/ocs_hw_queues.c

2595

ocs_hw_rqpair_teardown(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw_queues.c

2598

ocs_hw_rqpair_auto_xfer_rdy_buffer_free(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

275

ocs_log_crit(hw->os, "Cant create morethan one RQ Set\n");

sys/dev/ocs_fc/ocs_hw_queues.c

276

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

292

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

298

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

308

ocs_log_crit(hw->os,

sys/dev/ocs_fc/ocs_hw_queues.c

311

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

317

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

323

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

333

hw->hw_mrq_count = rqset_count;

sys/dev/ocs_fc/ocs_hw_queues.c

339

hw_queue_teardown(hw);

sys/dev/ocs_fc/ocs_hw_queues.c

355

hw_new_eq(ocs_hw_t *hw, uint32_t entry_count)

sys/dev/ocs_fc/ocs_hw_queues.c

357

hw_eq_t *eq = ocs_malloc(hw->os, sizeof(*eq), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw_queues.c

361

eq->hw = hw;

sys/dev/ocs_fc/ocs_hw_queues.c

363

eq->instance = hw->eq_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

364

eq->queue = &hw->eq[eq->instance];

sys/dev/ocs_fc/ocs_hw_queues.c

367

eq->wq_array = ocs_varray_alloc(hw->os, OCS_HW_MAX_NUM_WQ);

sys/dev/ocs_fc/ocs_hw_queues.c

369

ocs_free(hw->os, eq, sizeof(*eq));

sys/dev/ocs_fc/ocs_hw_queues.c

372

if (sli_queue_alloc(&hw->sli, SLI_QTYPE_EQ, eq->queue, entry_count, NULL, 0)) {

sys/dev/ocs_fc/ocs_hw_queues.c

373

ocs_log_err(hw->os, "EQ[%d] allocation failure\n", eq->instance);

sys/dev/ocs_fc/ocs_hw_queues.c

374

ocs_free(hw->os, eq, sizeof(*eq));

sys/dev/ocs_fc/ocs_hw_queues.c

377

sli_eq_modify_delay(&hw->sli, eq->queue, 1, 0, 8);

sys/dev/ocs_fc/ocs_hw_queues.c

378

hw->hw_eq[eq->instance] = eq;

sys/dev/ocs_fc/ocs_hw_queues.c

379

ocs_list_add_tail(&hw->eq_list, eq);

sys/dev/ocs_fc/ocs_hw_queues.c

380

ocs_log_debug(hw->os, "create eq[%2d] id %3d len %4d\n", eq->instance, eq->queue->id,

sys/dev/ocs_fc/ocs_hw_queues.c

401

ocs_hw_t *hw = eq->hw;

sys/dev/ocs_fc/ocs_hw_queues.c

402

hw_cq_t *cq = ocs_malloc(hw->os, sizeof(*cq), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw_queues.c

407

cq->instance = eq->hw->cq_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

409

cq->queue = &hw->cq[cq->instance];

sys/dev/ocs_fc/ocs_hw_queues.c

413

if (sli_queue_alloc(&hw->sli, SLI_QTYPE_CQ, cq->queue, cq->entry_count, eq->queue, 0)) {

sys/dev/ocs_fc/ocs_hw_queues.c

414

ocs_log_err(hw->os, "CQ[%d] allocation failure len=%d\n",

sys/dev/ocs_fc/ocs_hw_queues.c

417

ocs_free(hw->os, cq, sizeof(*cq));

sys/dev/ocs_fc/ocs_hw_queues.c

420

hw->hw_cq[cq->instance] = cq;

sys/dev/ocs_fc/ocs_hw_queues.c

422

ocs_log_debug(hw->os, "create cq[%2d] id %3d len %4d\n", cq->instance, cq->queue->id,

sys/dev/ocs_fc/ocs_hw_queues.c

443

ocs_hw_t *hw = eqs[0]->hw;

sys/dev/ocs_fc/ocs_hw_queues.c

444

sli4_t *sli4 = &hw->sli;

sys/dev/ocs_fc/ocs_hw_queues.c

454

cq = ocs_malloc(hw->os, sizeof(*cq), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw_queues.c

461

cq->instance = hw->cq_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

463

cq->queue = &hw->cq[cq->instance];

sys/dev/ocs_fc/ocs_hw_queues.c

475

hw->hw_cq[cqs[i]->instance] = cqs[i];

sys/dev/ocs_fc/ocs_hw_queues.c

484

ocs_free(hw->os, cqs[i], sizeof(*cqs[i]));

sys/dev/ocs_fc/ocs_hw_queues.c

504

ocs_hw_t *hw = cq->eq->hw;

sys/dev/ocs_fc/ocs_hw_queues.c

505

hw_mq_t *mq = ocs_malloc(hw->os, sizeof(*mq), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw_queues.c

510

mq->instance = cq->eq->hw->mq_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

513

mq->queue = &hw->mq[mq->instance];

sys/dev/ocs_fc/ocs_hw_queues.c

515

if (sli_queue_alloc(&hw->sli, SLI_QTYPE_MQ,

sys/dev/ocs_fc/ocs_hw_queues.c

519

ocs_log_err(hw->os, "MQ allocation failure\n");

sys/dev/ocs_fc/ocs_hw_queues.c

520

ocs_free(hw->os, mq, sizeof(*mq));

sys/dev/ocs_fc/ocs_hw_queues.c

523

hw->hw_mq[mq->instance] = mq;

sys/dev/ocs_fc/ocs_hw_queues.c

525

ocs_log_debug(hw->os, "create mq[%2d] id %3d len %4d\n", mq->instance, mq->queue->id,

sys/dev/ocs_fc/ocs_hw_queues.c

547

ocs_hw_t *hw = cq->eq->hw;

sys/dev/ocs_fc/ocs_hw_queues.c

548

hw_wq_t *wq = ocs_malloc(hw->os, sizeof(*wq), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw_queues.c

55

ocs_hw_init_queues(ocs_hw_t *hw, ocs_hw_qtop_t *qtop)

sys/dev/ocs_fc/ocs_hw_queues.c

551

wq->hw = cq->eq->hw;

sys/dev/ocs_fc/ocs_hw_queues.c

554

wq->instance = cq->eq->hw->wq_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

556

wq->queue = &hw->wq[wq->instance];

sys/dev/ocs_fc/ocs_hw_queues.c

564

if (sli_queue_alloc(&hw->sli, SLI_QTYPE_WQ, wq->queue, wq->entry_count, cq->queue, ulp)) {

sys/dev/ocs_fc/ocs_hw_queues.c

565

ocs_log_err(hw->os, "WQ allocation failure\n");

sys/dev/ocs_fc/ocs_hw_queues.c

566

ocs_free(hw->os, wq, sizeof(*wq));

sys/dev/ocs_fc/ocs_hw_queues.c

569

hw->hw_wq[wq->instance] = wq;

sys/dev/ocs_fc/ocs_hw_queues.c

571

ocs_log_debug(hw->os, "create wq[%2d] id %3d len %4d cls %d ulp %d\n", wq->instance, wq->queue->id,

sys/dev/ocs_fc/ocs_hw_queues.c

592

ocs_hw_t *hw = cq->eq->hw;

sys/dev/ocs_fc/ocs_hw_queues.c

593

hw_rq_t *rq = ocs_malloc(hw->os, sizeof(*rq), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw_queues.c

596

ocs_hw_get(hw, OCS_HW_MAX_RQ_ENTRIES, &max_hw_rq);

sys/dev/ocs_fc/ocs_hw_queues.c

599

rq->instance = hw->hw_rq_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

607

ocs_hw_assert(hw->rq_count < ARRAY_SIZE(hw->rq));

sys/dev/ocs_fc/ocs_hw_queues.c

608

rq->hdr = &hw->rq[hw->rq_count];

sys/dev/ocs_fc/ocs_hw_queues.c

61

hw_eq_t *eqs[hw->config.n_rq];

sys/dev/ocs_fc/ocs_hw_queues.c

611

if (sli_fc_rq_alloc(&hw->sli, rq->hdr,

sys/dev/ocs_fc/ocs_hw_queues.c

616

ocs_log_err(hw->os, "RQ allocation failure - header\n");

sys/dev/ocs_fc/ocs_hw_queues.c

617

ocs_free(hw->os, rq, sizeof(*rq));

sys/dev/ocs_fc/ocs_hw_queues.c

62

hw_cq_t *cqs[hw->config.n_rq];

sys/dev/ocs_fc/ocs_hw_queues.c

620

hw->hw_rq_lookup[hw->rq_count] = rq->instance; /* Update hw_rq_lookup[] */

sys/dev/ocs_fc/ocs_hw_queues.c

621

hw->rq_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

622

ocs_log_debug(hw->os, "create rq[%2d] id %3d len %4d hdr size %4d ulp %d\n",

sys/dev/ocs_fc/ocs_hw_queues.c

626

ocs_hw_assert(hw->rq_count < ARRAY_SIZE(hw->rq));

sys/dev/ocs_fc/ocs_hw_queues.c

627

rq->data = &hw->rq[hw->rq_count];

sys/dev/ocs_fc/ocs_hw_queues.c

628

rq->data_entry_size = hw->config.rq_default_buffer_size;

sys/dev/ocs_fc/ocs_hw_queues.c

63

hw_rq_t *rqs[hw->config.n_rq];

sys/dev/ocs_fc/ocs_hw_queues.c

630

if (sli_fc_rq_alloc(&hw->sli, rq->data,

sys/dev/ocs_fc/ocs_hw_queues.c

635

ocs_log_err(hw->os, "RQ allocation failure - first burst\n");

sys/dev/ocs_fc/ocs_hw_queues.c

636

ocs_free(hw->os, rq, sizeof(*rq));

sys/dev/ocs_fc/ocs_hw_queues.c

639

hw->hw_rq_lookup[hw->rq_count] = rq->instance; /* Update hw_rq_lookup[] */

sys/dev/ocs_fc/ocs_hw_queues.c

640

hw->rq_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

641

ocs_log_debug(hw->os, "create rq[%2d] id %3d len %4d data size %4d ulp %d\n", rq->instance,

sys/dev/ocs_fc/ocs_hw_queues.c

644

hw->hw_rq[rq->instance] = rq;

sys/dev/ocs_fc/ocs_hw_queues.c

647

rq->rq_tracker = ocs_malloc(hw->os, sizeof(ocs_hw_sequence_t*) *

sys/dev/ocs_fc/ocs_hw_queues.c

650

ocs_log_err(hw->os, "RQ tracker buf allocation failure\n");

sys/dev/ocs_fc/ocs_hw_queues.c

674

ocs_hw_t *hw = cqs[0]->eq->hw;

sys/dev/ocs_fc/ocs_hw_queues.c

679

ocs_hw_get(hw, OCS_HW_MAX_RQ_ENTRIES, &max_hw_rq);

sys/dev/ocs_fc/ocs_hw_queues.c

687

rq = ocs_malloc(hw->os, sizeof(*rq), OCS_M_ZERO | OCS_M_NOWAIT);

sys/dev/ocs_fc/ocs_hw_queues.c

692

rq->instance = hw->hw_rq_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

699

rq->hdr = &hw->rq[hw->rq_count];

sys/dev/ocs_fc/ocs_hw_queues.c

701

hw->hw_rq_lookup[hw->rq_count] = rq->instance;

sys/dev/ocs_fc/ocs_hw_queues.c

702

hw->rq_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

706

rq->data = &hw->rq[hw->rq_count];

sys/dev/ocs_fc/ocs_hw_queues.c

707

rq->data_entry_size = hw->config.rq_default_buffer_size;

sys/dev/ocs_fc/ocs_hw_queues.c

708

hw->hw_rq_lookup[hw->rq_count] = rq->instance;

sys/dev/ocs_fc/ocs_hw_queues.c

709

hw->rq_count++;

sys/dev/ocs_fc/ocs_hw_queues.c

715

if (sli_fc_rq_set_alloc(&hw->sli, num_rq_pairs, qs,

sys/dev/ocs_fc/ocs_hw_queues.c

721

ocs_log_err(hw->os, "RQ Set allocation failure for base CQ=%d\n", cqs[0]->queue->id);

sys/dev/ocs_fc/ocs_hw_queues.c

726

hw->hw_rq[rqs[i]->instance] = rqs[i];

sys/dev/ocs_fc/ocs_hw_queues.c

728

rqs[i]->rq_tracker = ocs_malloc(hw->os, sizeof(ocs_hw_sequence_t*) *

sys/dev/ocs_fc/ocs_hw_queues.c

731

ocs_log_err(hw->os, "RQ tracker buf allocation failure\n");

sys/dev/ocs_fc/ocs_hw_queues.c

742

ocs_free(hw->os, rqs[i]->rq_tracker,

sys/dev/ocs_fc/ocs_hw_queues.c

746

ocs_free(hw->os, rqs[i], sizeof(*rqs[i]));

sys/dev/ocs_fc/ocs_hw_queues.c

76

default_lengths[QTOP_CQ] = hw->num_qentries[SLI_QTYPE_CQ];

sys/dev/ocs_fc/ocs_hw_queues.c

77

default_lengths[QTOP_WQ] = hw->num_qentries[SLI_QTYPE_WQ];

sys/dev/ocs_fc/ocs_hw_queues.c

773

ocs_list_remove(&eq->hw->eq_list, eq);

sys/dev/ocs_fc/ocs_hw_queues.c

774

eq->hw->hw_eq[eq->instance] = NULL;

sys/dev/ocs_fc/ocs_hw_queues.c

775

ocs_free(eq->hw->os, eq, sizeof(*eq));

sys/dev/ocs_fc/ocs_hw_queues.c

78

default_lengths[QTOP_RQ] = hw->num_qentries[SLI_QTYPE_RQ];

sys/dev/ocs_fc/ocs_hw_queues.c

81

ocs_hw_verify(hw != NULL, OCS_HW_RTN_INVALID_ARG);

sys/dev/ocs_fc/ocs_hw_queues.c

811

cq->eq->hw->hw_cq[cq->instance] = NULL;

sys/dev/ocs_fc/ocs_hw_queues.c

812

ocs_free(cq->eq->hw->os, cq, sizeof(*cq));

sys/dev/ocs_fc/ocs_hw_queues.c

83

hw->eq_count = 0;

sys/dev/ocs_fc/ocs_hw_queues.c

830

mq->cq->eq->hw->hw_mq[mq->instance] = NULL;

sys/dev/ocs_fc/ocs_hw_queues.c

831

ocs_free(mq->cq->eq->hw->os, mq, sizeof(*mq));

sys/dev/ocs_fc/ocs_hw_queues.c

84

hw->cq_count = 0;

sys/dev/ocs_fc/ocs_hw_queues.c

849

wq->cq->eq->hw->hw_wq[wq->instance] = NULL;

sys/dev/ocs_fc/ocs_hw_queues.c

85

hw->mq_count = 0;

sys/dev/ocs_fc/ocs_hw_queues.c

850

ocs_free(wq->cq->eq->hw->os, wq, sizeof(*wq));

sys/dev/ocs_fc/ocs_hw_queues.c

86

hw->wq_count = 0;

sys/dev/ocs_fc/ocs_hw_queues.c

868

ocs_hw_t *hw = rq->cq->eq->hw;

sys/dev/ocs_fc/ocs_hw_queues.c

87

hw->rq_count = 0;

sys/dev/ocs_fc/ocs_hw_queues.c

871

ocs_free(hw->os, rq->rq_tracker, sizeof(ocs_hw_sequence_t*) * rq->entry_count);

sys/dev/ocs_fc/ocs_hw_queues.c

875

hw->hw_rq[rq->instance] = NULL;

sys/dev/ocs_fc/ocs_hw_queues.c

876

ocs_free(hw->os, rq, sizeof(*rq));

sys/dev/ocs_fc/ocs_hw_queues.c

88

hw->hw_rq_count = 0;

sys/dev/ocs_fc/ocs_hw_queues.c

89

ocs_list_init(&hw->eq_list, hw_eq_t, link);

sys/dev/ocs_fc/ocs_hw_queues.c

890

hw_queue_dump(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw_queues.c

899

ocs_list_foreach(&hw->eq_list, eq) {

sys/dev/ocs_fc/ocs_hw_queues.c

92

if ((hw->config.n_rq > 1 ) && !hw->sli.config.features.flag.mrqp) {

sys/dev/ocs_fc/ocs_hw_queues.c

93

ocs_log_err(hw->os, "MRQ topology not supported by SLI4.\n");

sys/dev/ocs_fc/ocs_hw_queues.c

935

hw_queue_teardown(ocs_hw_t *hw)

sys/dev/ocs_fc/ocs_hw_queues.c

941

if (ocs_list_valid(&hw->eq_list)) {

sys/dev/ocs_fc/ocs_hw_queues.c

942

ocs_list_foreach_safe(&hw->eq_list, eq, eq_next) {

sys/dev/ocs_fc/ocs_hw_queues.c

946

for (i = 0; i < ARRAY_SIZE(hw->wq_cpu_array); i++) {

sys/dev/ocs_fc/ocs_hw_queues.c

947

ocs_varray_free(hw->wq_cpu_array[i]);

sys/dev/ocs_fc/ocs_hw_queues.c

948

hw->wq_cpu_array[i] = NULL;

sys/dev/ocs_fc/ocs_hw_queues.c

950

for (i = 0; i < ARRAY_SIZE(hw->wq_class_array); i++) {

sys/dev/ocs_fc/ocs_hw_queues.c

951

ocs_varray_free(hw->wq_class_array[i]);

sys/dev/ocs_fc/ocs_hw_queues.c

952

hw->wq_class_array[i] = NULL;

sys/dev/ocs_fc/ocs_hw_queues.c

97

if (hw->config.n_rq > 1)

sys/dev/ocs_fc/ocs_hw_queues.c

976

ocs_hw_queue_next_wq(ocs_hw_t *hw, ocs_hw_io_t *io)

sys/dev/ocs_fc/ocs_hw_queues.c

983

if (likely(io->wq_class < ARRAY_SIZE(hw->wq_class_array))) {

sys/dev/ocs_fc/ocs_hw_queues.c

984

wq = ocs_varray_iter_next(hw->wq_class_array[io->wq_class]);

sys/dev/ocs_fc/ocs_hw_queues.c

996

if (likely(cpuidx < ARRAY_SIZE(hw->wq_cpu_array))) {

sys/dev/ocs_fc/ocs_hw_queues.c

997

wq = ocs_varray_iter_next(hw->wq_cpu_array[cpuidx]);

sys/dev/ocs_fc/ocs_hw_queues.h

84

extern ocs_hw_qtop_t *ocs_hw_qtop_parse(ocs_hw_t *hw, const char *qtop_string);

sys/dev/ocs_fc/ocs_hw_queues.h

87

extern uint32_t ocs_hw_qtop_eq_count(ocs_hw_t *hw);

sys/dev/ocs_fc/ocs_hw_queues.h

89

extern ocs_hw_rtn_e ocs_hw_init_queues(ocs_hw_t *hw, ocs_hw_qtop_t *qtop);

sys/dev/ocs_fc/ocs_hw_queues.h

90

extern void hw_thread_eq_handler(ocs_hw_t *hw, hw_eq_t *eq, uint32_t max_isr_time_msec);

sys/dev/ocs_fc/ocs_hw_queues.h

91

extern void hw_thread_cq_handler(ocs_hw_t *hw, hw_cq_t *cq);

sys/dev/ocs_fc/ocs_hw_queues.h

92

extern hw_wq_t *ocs_hw_queue_next_wq(ocs_hw_t *hw, ocs_hw_io_t *io);

sys/dev/ocs_fc/ocs_io.c

298

ocs_hw_io_free(&ocs->hw, hio);

sys/dev/ocs_fc/ocs_ioctl.c

1102

ocs_hw_get(&ocs->hw, OCS_HW_SLI_REV, &rev);

sys/dev/ocs_fc/ocs_ioctl.c

1103

ocs_hw_get(&ocs->hw, OCS_HW_IF_TYPE, &if_type);

sys/dev/ocs_fc/ocs_ioctl.c

1104

ocs_hw_get(&ocs->hw, OCS_HW_SLI_FAMILY, &family);

sys/dev/ocs_fc/ocs_ioctl.c

1108

(char *)ocs_hw_get_ptr(&ocs->hw, OCS_HW_FW_REV),

sys/dev/ocs_fc/ocs_ioctl.c

247

if (ocs_hw_command(&ocs->hw, mcmd->payload, OCS_CMD_NOWAIT,

sys/dev/ocs_fc/ocs_ioctl.c

706

ocs_hw_firmware_write(&ocs->hw, &dma, xfer_size, offset,

sys/dev/ocs_fc/ocs_ioctl.c

71

__ocs_ioctl_mbox_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_ioctl.c

829

wwnn = ocs_hw_get_ptr(&ocs->hw, OCS_HW_WWN_NODE);

sys/dev/ocs_fc/ocs_ioctl.c

867

wwpn = ocs_hw_get_ptr(&ocs->hw, OCS_HW_WWN_PORT);

sys/dev/ocs_fc/ocs_ioctl.c

895

ocs_hw_get(&ocs->hw, OCS_HW_TOPOLOGY, &value);

sys/dev/ocs_fc/ocs_ioctl.c

906

ocs_hw_get(&ocs->hw, OCS_HW_LINK_SPEED, &value);

sys/dev/ocs_fc/ocs_ioctl.c

920

ocs_hw_get(&ocs->hw, OCS_HW_CONFIG_TOPOLOGY, &old_value);

sys/dev/ocs_fc/ocs_ioctl.c

950

ocs_hw_get(&ocs->hw, OCS_HW_LINK_CONFIG_SPEED, &old_value);

sys/dev/ocs_fc/ocs_mgmt.c

1280

ocs_hw_get(&(ocs->hw), OCS_HW_LINK_SPEED, &value);

sys/dev/ocs_fc/ocs_mgmt.c

1290

ocs_hw_get(&(ocs->hw), OCS_HW_LINK_CONFIG_SPEED, &value);

sys/dev/ocs_fc/ocs_mgmt.c

1304

ocs_hw_get(&(ocs->hw), OCS_HW_TOPOLOGY, &value);

sys/dev/ocs_fc/ocs_mgmt.c

1314

ocs_hw_get(&(ocs->hw), OCS_HW_CONFIG_TOPOLOGY, &value);

sys/dev/ocs_fc/ocs_mgmt.c

1432

ocs_hw_get(&ocs->hw, OCS_HW_LINKCFG, &value);

sys/dev/ocs_fc/ocs_mgmt.c

1613

status = ocs_hw_port_control(&ocs->hw, OCS_HW_PORT_SET_LINK_CONFIG,

sys/dev/ocs_fc/ocs_mgmt.c

1765

hw_rc = ocs_hw_set(&ocs->hw, OCS_HW_LINK_SPEED, spd);

sys/dev/ocs_fc/ocs_mgmt.c

1804

hw_rc = ocs_hw_set(&ocs->hw, OCS_HW_TOPOLOGY, topo);

sys/dev/ocs_fc/ocs_mgmt.c

1810

hw_rc = ocs_hw_set_persistent_topology(&ocs->hw, topo, OCS_CMD_NOWAIT);

sys/dev/ocs_fc/ocs_mgmt.c

1887

if(ocs_hw_get_port_protocol(&ocs->hw, func, ocs_mgmt_get_port_protocol_cb, &result) == OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_mgmt.c

1967

rc = ocs_hw_set_port_protocol(&ocs->hw, new_protocol, func,

sys/dev/ocs_fc/ocs_mgmt.c

2026

if(ocs_hw_get_profile_list(&ocs->hw, ocs_mgmt_get_profile_list_cb, &result) == OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_mgmt.c

2103

if(ocs_hw_get_active_profile(&ocs->hw, ocs_mgmt_get_active_profile_cb, &result) == OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_mgmt.c

2158

rc = ocs_hw_set_active_profile(&ocs->hw, ocs_mgmt_set_active_profile_cb, new_profile, &result);

sys/dev/ocs_fc/ocs_mgmt.c

2220

if(ocs_hw_get_nvparms(&ocs->hw, ocs_mgmt_get_nvparms_cb, &result) == OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_mgmt.c

2258

if(ocs_hw_get_nvparms(&ocs->hw, ocs_mgmt_get_nvparms_cb, &result) == OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_mgmt.c

2377

rc = ocs_hw_get_nvparms(&ocs->hw, ocs_mgmt_get_nvparms_cb, &result);

sys/dev/ocs_fc/ocs_mgmt.c

2442

rc = ocs_hw_set_nvparms(&ocs->hw, ocs_mgmt_set_nvparms_cb, new_wwpn,

sys/dev/ocs_fc/ocs_mgmt.c

570

if (ocs_hw_reset(&ocs->hw, OCS_HW_RESET_FIRMWARE)) {

sys/dev/ocs_fc/ocs_mgmt.c

584

if (other_ocs->hw.state !=

sys/dev/ocs_fc/ocs_mgmt.c

586

other_ocs->hw.state =

sys/dev/ocs_fc/ocs_mgmt.c

657

ocs_hw_firmware_write(&ocs->hw, &dma, xfer_size, offset, last, ocs_mgmt_fw_write_cb, &result);

sys/dev/ocs_fc/ocs_mgmt.c

760

ocs_hw_get_sfp(&ocs->hw, page, ocs_mgmt_sfp_cb, result);

sys/dev/ocs_fc/ocs_mgmt.c

822

ocs_mgmt_emit_string(textbuf, MGMT_MODE_RD, "fw_rev", ocs_hw_get_ptr(&ocs->hw, OCS_HW_FW_REV));

sys/dev/ocs_fc/ocs_mgmt.c

828

ocs_mgmt_emit_string(textbuf, MGMT_MODE_RD, "fw_rev2", ocs_hw_get_ptr(&ocs->hw, OCS_HW_FW_REV2));

sys/dev/ocs_fc/ocs_mgmt.c

834

ocs_mgmt_emit_string(textbuf, MGMT_MODE_RD, "ipl", ocs_hw_get_ptr(&ocs->hw, OCS_HW_IPL));

sys/dev/ocs_fc/ocs_mgmt.c

842

ocs_hw_get(&ocs->hw, OCS_HW_HW_REV1, &value);

sys/dev/ocs_fc/ocs_mgmt.c

852

ocs_hw_get(&ocs->hw, OCS_HW_HW_REV2, &value);

sys/dev/ocs_fc/ocs_mgmt.c

861

ocs_hw_get(&ocs->hw, OCS_HW_HW_REV3, &value);

sys/dev/ocs_fc/ocs_mgmt.c

871

wwnn = ocs_hw_get_ptr(&ocs->hw, OCS_HW_WWN_NODE);

sys/dev/ocs_fc/ocs_mgmt.c

881

wwpn = ocs_hw_get_ptr(&ocs->hw, OCS_HW_WWN_PORT);

sys/dev/ocs_fc/ocs_node.c

2146

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_node.c

2189

rc = ocs_hw_get(&ocs->hw, OCS_HW_SEND_FRAME_CAPABLE, &send_frame_capable);

sys/dev/ocs_fc/ocs_node.c

2223

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_node.c

2301

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_node.c

2329

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_node.c

251

if (0 == ocs_hw_get(&ocs->hw, OCS_HW_MAX_SGE, &max_sge) &&

sys/dev/ocs_fc/ocs_node.c

252

0 == ocs_hw_get(&ocs->hw, OCS_HW_N_SGL, &num_sgl)) {

sys/dev/ocs_fc/ocs_node.c

412

rc = ocs_hw_node_alloc(&ocs->hw, &node->rnode, port_id, sport);

sys/dev/ocs_fc/ocs_node.c

496

if (OCS_HW_RTN_IS_ERROR((rc = ocs_hw_node_free_resources(&ocs->hw, &node->rnode)))) {

sys/dev/ocs_fc/ocs_node.c

646

rc = ocs_hw_node_attach(&ocs->hw, &node->rnode, &node->sparm_dma_buf);

sys/dev/ocs_fc/ocs_node.c

955

ocs_hw_io_free(&ocs->hw, node->ls_acc_io->hio);

sys/dev/ocs_fc/ocs_pci.c

906

ocs_hw_process(&ocs->hw, intr->vec, OCS_OS_MAX_ISR_TIME_MSEC);

sys/dev/ocs_fc/ocs_pci.c

928

ocs_hw_get(&ocs->hw, OCS_HW_N_SGL, &max_sgl);

sys/dev/ocs_fc/ocs_pci.c

929

ocs_hw_get(&ocs->hw, OCS_HW_MAX_SGE, &max_sge);

sys/dev/ocs_fc/ocs_scsi.c

1014

hio = ocs_hw_io_alloc(&ocs->hw);

sys/dev/ocs_fc/ocs_scsi.c

1049

if (ocs_hw_async_call(&ocs->hw, ocs_scsi_check_pending_async_cb, io)) {

sys/dev/ocs_fc/ocs_scsi.c

1087

if (ocs_hw_async_call(&ocs->hw, ocs_scsi_check_pending_async_cb, io)) {

sys/dev/ocs_fc/ocs_scsi.c

1166

hio = ocs_hw_io_alloc(&io->ocs->hw);

sys/dev/ocs_fc/ocs_scsi.c

1278

ocs_hw_get(&ocs->hw, OCS_HW_N_SGL, &max_sgl);

sys/dev/ocs_fc/ocs_scsi.c

1279

ocs_hw_get(&ocs->hw, OCS_HW_SGL_CHAINING_HOST_ALLOCATED, &host_allocated);

sys/dev/ocs_fc/ocs_scsi.c

1299

rc = ocs_hw_io_register_sgl(&ocs->hw, io->hio, &io->ovfl_sgl, count);

sys/dev/ocs_fc/ocs_scsi.c

1309

rc = ocs_scsi_build_sgls(&ocs->hw, io->hio, &io->hw_dif, io->sgl, io->sgl_count, io->hio_type);

sys/dev/ocs_fc/ocs_scsi.c

1323

rc = ocs_hw_io_send(&io->ocs->hw, io->hio_type, io->hio, io->wire_len, &io->iparam, &io->node->rnode,

sys/dev/ocs_fc/ocs_scsi.c

1329

rc = ocs_hw_srrs_send(&ocs->hw, io->hio_type, io->hio,

sys/dev/ocs_fc/ocs_scsi.c

1336

rc = ocs_hw_srrs_send(&ocs->hw, io->hio_type, io->hio,

sys/dev/ocs_fc/ocs_scsi.c

1345

rc = ocs_hw_srrs_send(&ocs->hw, io->hio_type, io->hio,

sys/dev/ocs_fc/ocs_scsi.c

1397

rc = ocs_hw_io_abort(&io->ocs->hw, hio_to_abort, io->send_abts,

sys/dev/ocs_fc/ocs_scsi.c

1473

ocs_hw_get(&io->ocs->hw, OCS_HW_DISABLE_AR_TGT_DIF, &disable_ar_tgt_dif);

sys/dev/ocs_fc/ocs_scsi.c

2737

if (0 == ocs_hw_get(&ocs->hw, OCS_HW_MAX_SGE, &val)) {

sys/dev/ocs_fc/ocs_scsi.c

2749

if (0 == ocs_hw_get(&ocs->hw, OCS_HW_N_SGL, &val)) {

sys/dev/ocs_fc/ocs_scsi.c

2756

if (0 == ocs_hw_get(&ocs->hw, OCS_HW_DIF_CAPABLE, &val)) {

sys/dev/ocs_fc/ocs_scsi.c

2763

if (ocs_hw_get(&ocs->hw, OCS_HW_DIF_MULTI_SEPARATE, &val) == 0) {

sys/dev/ocs_fc/ocs_scsi.c

2769

if (ocs_hw_get(&ocs->hw, OCS_HW_SEND_FRAME_CAPABLE, &val) == 0) {

sys/dev/ocs_fc/ocs_scsi.c

2800

rc = ocs_hw_get_ptr(&ocs->hw, OCS_HW_WWN_NODE);

sys/dev/ocs_fc/ocs_scsi.c

2803

rc = ocs_hw_get_ptr(&ocs->hw, OCS_HW_WWN_PORT);

sys/dev/ocs_fc/ocs_scsi.c

2806

rc = ocs_hw_get_ptr(&ocs->hw, OCS_HW_PORTNUM);

sys/dev/ocs_fc/ocs_scsi.c

2809

rc = ocs_hw_get_ptr(&ocs->hw, OCS_HW_BIOS_VERSION_STRING);

sys/dev/ocs_fc/ocs_scsi.c

2816

if (ocs_hw_get(&ocs->hw, OCS_HW_VPD_LEN, &vpd_len)) {

sys/dev/ocs_fc/ocs_scsi.c

2822

pvpd = ocs_hw_get_ptr(&ocs->hw, OCS_HW_VPD);

sys/dev/ocs_fc/ocs_scsi.c

2845

if (ocs_hw_get(&ocs->hw, OCS_HW_VPD_LEN, &vpd_len)) {

sys/dev/ocs_fc/ocs_scsi.c

2850

pvpd = ocs_hw_get_ptr(&ocs->hw, OCS_HW_VPD);

sys/dev/ocs_fc/ocs_scsi.c

2947

rc = ocs_hw_callback(&ocs->hw, OCS_HW_CB_BOUNCE, fctn, NULL);

sys/dev/ocs_fc/ocs_scsi.c

683

ocs_scsi_build_sgls(ocs_hw_t *hw, ocs_hw_io_t *hio, ocs_hw_dif_info_t *hw_dif, ocs_scsi_sgl_t *sgl, uint32_t sgl_count, ocs_hw_io_type_e type)

sys/dev/ocs_fc/ocs_scsi.c

687

ocs_t *ocs = hw->os;

sys/dev/ocs_fc/ocs_scsi.c

694

rc = ocs_hw_io_init_sges(hw, hio, type);

sys/dev/ocs_fc/ocs_scsi.c

704

rc = ocs_hw_io_add_seed_sge(hw, hio, hw_dif);

sys/dev/ocs_fc/ocs_scsi.c

723

ocs_log_test(hw->os, "Invalid hw_dif blocksize %d\n", hw_dif->blk_size);

sys/dev/ocs_fc/ocs_scsi.c

728

ocs_log_test(hw->os, "sgl[%d] len of %ld is not multiple of blocksize\n",

sys/dev/ocs_fc/ocs_scsi.c

741

rc = ocs_hw_io_add_seed_sge(hw, hio, hw_dif);

sys/dev/ocs_fc/ocs_scsi.c

745

rc = ocs_hw_io_add_dif_sge(hw, hio, sgl[i].dif_addr);

sys/dev/ocs_fc/ocs_scsi.c

759

rc = ocs_hw_io_add_sge(hw, hio, sgl[i].addr, sgl[i].len);

sys/dev/ocs_fc/ocs_scsi.c

772

rc = ocs_hw_io_add_sge(hw, hio, sgl[i].addr, sgl[i].len);

sys/dev/ocs_fc/ocs_scsi.c

893

ocs_hw_get(&ocs->hw, OCS_HW_DIF_SEED, &dif_seed);

sys/dev/ocs_fc/ocs_scsi.c

961

ocs_scsi_check_pending_async_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_sport.c

1761

hrc = ocs_hw_node_group_alloc(&ocs->hw, node_group);

sys/dev/ocs_fc/ocs_sport.c

1907

hrc = ocs_hw_node_group_attach(&ocs->hw, node_group, &node->rnode);

sys/dev/ocs_fc/ocs_sport.c

422

rc = ocs_hw_port_attach(&sport->ocs->hw, sport, fc_id);

sys/dev/ocs_fc/ocs_sport.c

507

if (ocs_hw_port_free(&ocs->hw, sport)) {

sys/dev/ocs_fc/ocs_sport.c

523

if (sport->ocs->hw.link.status == SLI_LINK_STATUS_DOWN) {

sys/dev/ocs_fc/ocs_sport.c

628

if (ocs_hw_port_alloc(&ocs->hw, sport, sport->domain,

sys/dev/ocs_fc/ocs_sport.c

855

if (ocs_hw_port_free(&ocs->hw, sport)) {

sys/dev/ocs_fc/ocs_unsol.c

1010

rc = ocs_hw_get(&ocs->hw, OCS_HW_SEND_FRAME_CAPABLE, &send_frame_capable);

sys/dev/ocs_fc/ocs_unsol.c

1036

ocs_hw_io_activate_port_owned(&ocs->hw, seq->hio);

sys/dev/ocs_fc/ocs_unsol.c

1049

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_unsol.c

1072

ocs_hw_t *hw = &ocs->hw;

sys/dev/ocs_fc/ocs_unsol.c

1091

if (!ocs_hw_is_io_port_owned(hw, seq->hio)) {

sys/dev/ocs_fc/ocs_unsol.c

1133

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_unsol.c

1198

ocs_hw_t *hw = ctx->hw;

sys/dev/ocs_fc/ocs_unsol.c

1201

ocs_hw_reqtag_free(hw, ctx->wqcb);

sys/dev/ocs_fc/ocs_unsol.c

1204

ocs_hw_sequence_free(hw, ctx->seq);

sys/dev/ocs_fc/ocs_unsol.c

121

ocs_hw_io_free(&ocs->hw, hio);

sys/dev/ocs_fc/ocs_unsol.c

1231

ocs_hw_t *hw = &ocs->hw;

sys/dev/ocs_fc/ocs_unsol.c

1262

hdr.seq_id = (uint8_t) ocs_atomic_add_return(&hw->send_frame_seq_id, 1);

sys/dev/ocs_fc/ocs_unsol.c

1289

rc = ocs_hw_send_frame(&ocs->hw, (void*)&hdr, FC_SOFI3, FC_EOFT, &ctx->payload, ctx,

sys/dev/ocs_fc/ocs_unsol.c

134

hw_rc = ocs_hw_io_abort(&ocs->hw, hio, FALSE,

sys/dev/ocs_fc/ocs_unsol.c

179

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_unsol.c

205

if (ocs->hw.workaround.override_fcfi) {

sys/dev/ocs_fc/ocs_unsol.c

206

if (ocs->hw.first_domain_idx > -1) {

sys/dev/ocs_fc/ocs_unsol.c

207

seq_fcfi = ocs->hw.first_domain_idx;

sys/dev/ocs_fc/ocs_unsol.c

223

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_unsol.c

226

domain = ocs_hw_domain_get(&ocs->hw, seq_fcfi);

sys/dev/ocs_fc/ocs_unsol.c

253

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_unsol.c

305

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_unsol.c

367

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_unsol.c

406

ocs_hw_sequence_free(&ocs->hw, frame);

sys/dev/ocs_fc/ocs_unsol.c

909

rc = ocs_hw_get(&ocs->hw, OCS_HW_SEND_FRAME_CAPABLE, &send_frame_capable);

sys/dev/ocs_fc/ocs_unsol.c

94

ocs_unsol_process((ocs_t*)seq->hw->os, seq);

sys/dev/ocs_fc/ocs_unsol.c

959

ocs_hw_sequence_free(&ocs->hw, seq);

sys/dev/ocs_fc/ocs_xport.c

1004

rc = ocs_hw_get(&ocs->hw, OCS_HW_LINK_MODULE_TYPE, &link_module_type);

sys/dev/ocs_fc/ocs_xport.c

1031

if ((rc = ocs_hw_get_link_stats(&ocs->hw, 0, 1, 1, ocs_xport_link_stats_cb, result)) != 0) {

sys/dev/ocs_fc/ocs_xport.c

1046

if ((rc = ocs_hw_get_host_stats(&ocs->hw, 1, ocs_xport_host_stats_cb, result)) != 0) {

sys/dev/ocs_fc/ocs_xport.c

207

rc = ocs_hw_set_ptr(&ocs->hw, OCS_HW_WAR_VERSION, ocs->hw_war_version);

sys/dev/ocs_fc/ocs_xport.c

213

rc = ocs_hw_setup(&ocs->hw, ocs, SLI4_PORT_TYPE_FC);

sys/dev/ocs_fc/ocs_xport.c

222

ocs_hw_set(&ocs->hw, OCS_HW_BOUNCE, ocs->hw_bounce);

sys/dev/ocs_fc/ocs_xport.c

225

ocs_hw_set(&ocs->hw, OCS_HW_RQ_SELECTION_POLICY, ocs->rq_selection_policy);

sys/dev/ocs_fc/ocs_xport.c

226

ocs_hw_set(&ocs->hw, OCS_HW_RR_QUANTA, ocs->rr_quanta);

sys/dev/ocs_fc/ocs_xport.c

227

ocs_hw_get(&ocs->hw, OCS_HW_RQ_SELECTION_POLICY, &value);

sys/dev/ocs_fc/ocs_xport.c

230

ocs_hw_set_ptr(&ocs->hw, OCS_HW_FILTER_DEF, (void*) ocs->filter_def);

sys/dev/ocs_fc/ocs_xport.c

232

ocs_hw_get(&ocs->hw, OCS_HW_MAX_SGL, &max_sgl);

sys/dev/ocs_fc/ocs_xport.c

242

if (ocs_hw_set(&ocs->hw, OCS_HW_N_SGL, n_sgl) != OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_xport.c

249

ocs_hw_get(&ocs->hw, OCS_HW_MAX_NODES, &max_remote_nodes);

sys/dev/ocs_fc/ocs_xport.c

311

ocs_hw_get(&ocs->hw, OCS_HW_AUTO_XFER_RDY_CAPABLE, &auto_xfer_rdy);

sys/dev/ocs_fc/ocs_xport.c

318

if (ocs_hw_set(&ocs->hw, OCS_HW_AUTO_XFER_RDY_SIZE, ocs->auto_xfer_rdy_size)) {

sys/dev/ocs_fc/ocs_xport.c

344

if (ocs_hw_set(&ocs->hw, OCS_HW_AUTO_XFER_RDY_T10_ENABLE, TRUE)) {

sys/dev/ocs_fc/ocs_xport.c

348

if (ocs_hw_set(&ocs->hw, OCS_HW_AUTO_XFER_RDY_BLK_SIZE, ramdisc_blocksize)) {

sys/dev/ocs_fc/ocs_xport.c

352

if (ocs_hw_set(&ocs->hw, OCS_HW_AUTO_XFER_RDY_P_TYPE, p_type)) {

sys/dev/ocs_fc/ocs_xport.c

356

if (ocs_hw_set(&ocs->hw, OCS_HW_AUTO_XFER_RDY_REF_TAG_IS_LBA, TRUE)) {

sys/dev/ocs_fc/ocs_xport.c

360

if (ocs_hw_set(&ocs->hw, OCS_HW_AUTO_XFER_RDY_APP_TAG_VALID, FALSE)) {

sys/dev/ocs_fc/ocs_xport.c

389

topology = ocs_hw_get_config_persistent_topology(&ocs->hw);

sys/dev/ocs_fc/ocs_xport.c

394

ocs_hw_set_persistent_topology(&ocs->hw, topology, OCS_CMD_POLL);

sys/dev/ocs_fc/ocs_xport.c

397

return ocs_hw_set(&ocs->hw, OCS_HW_TOPOLOGY, topology);

sys/dev/ocs_fc/ocs_xport.c

429

ocs_hw_get(&ocs->hw, OCS_HW_MAX_IO, &max_hw_io);

sys/dev/ocs_fc/ocs_xport.c

430

if (ocs_hw_set(&ocs->hw, OCS_HW_N_IO, max_hw_io) != OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_xport.c

435

ocs_hw_get(&ocs->hw, OCS_HW_MAX_SGL, &max_sgl);

sys/dev/ocs_fc/ocs_xport.c

439

ocs_hw_get(&ocs->hw, OCS_HW_HIGH_LOGIN_MODE, &hlm);

sys/dev/ocs_fc/ocs_xport.c

445

if (ocs_hw_set(&ocs->hw, OCS_HW_HIGH_LOGIN_MODE, TRUE)) {

sys/dev/ocs_fc/ocs_xport.c

460

ocs_hw_get(&ocs->hw, OCS_HW_MAX_IO, &max_hw_io);

sys/dev/ocs_fc/ocs_xport.c

468

ocs_hw_set(&ocs->hw, OCS_ESOC, TRUE);

sys/dev/ocs_fc/ocs_xport.c

474

ocs_hw_get(&ocs->hw, OCS_HW_PREREGISTER_SGL, &i);

sys/dev/ocs_fc/ocs_xport.c

478

ocs_hw_set(&ocs->hw, OCS_HW_PREREGISTER_SGL, FALSE);

sys/dev/ocs_fc/ocs_xport.c

489

if (ocs_hw_set(&ocs->hw, OCS_HW_TOPOLOGY, ocs->topology) != OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_xport.c

493

ocs_hw_set(&ocs->hw, OCS_HW_RQ_DEFAULT_BUFFER_SIZE, OCS_FC_RQ_SIZE_DEFAULT);

sys/dev/ocs_fc/ocs_xport.c

495

if (ocs_hw_set(&ocs->hw, OCS_HW_LINK_SPEED, ocs->speed) != OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_xport.c

500

if (ocs_hw_set(&ocs->hw, OCS_HW_ETH_LICENSE, ocs->ethernet_license) != OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_xport.c

506

if (ocs->hw.sli.asic_type == SLI4_ASIC_TYPE_LANCER) {

sys/dev/ocs_fc/ocs_xport.c

507

if (ocs_hw_set(&ocs->hw, OCS_HW_DIF_SEED, OCS_FC_DIF_SEED) != OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_xport.c

514

if (0 == ocs_hw_get(&ocs->hw, OCS_HW_DIF_CAPABLE, &dif_capable)) {

sys/dev/ocs_fc/ocs_xport.c

520

if ((rc = ocs_hw_set(&ocs->hw, OCS_HW_DIF_MODE,

sys/dev/ocs_fc/ocs_xport.c

531

ocs_hw_set(&ocs->hw, OCS_HW_EMULATE_WQE_TIMEOUT, TRUE);

sys/dev/ocs_fc/ocs_xport.c

534

ocs_hw_callback(&ocs->hw, OCS_HW_CB_DOMAIN, ocs_domain_cb, ocs);

sys/dev/ocs_fc/ocs_xport.c

535

ocs_hw_callback(&ocs->hw, OCS_HW_CB_REMOTE_NODE, ocs_remote_node_cb, ocs);

sys/dev/ocs_fc/ocs_xport.c

536

ocs_hw_callback(&ocs->hw, OCS_HW_CB_UNSOLICITED, ocs_unsolicited_cb, ocs);

sys/dev/ocs_fc/ocs_xport.c

537

ocs_hw_callback(&ocs->hw, OCS_HW_CB_PORT, ocs_port_cb, ocs);

sys/dev/ocs_fc/ocs_xport.c

539

ocs->fw_version = (const char*) ocs_hw_get_ptr(&ocs->hw, OCS_HW_FW_REV);

sys/dev/ocs_fc/ocs_xport.c

551

ocs_lock_init(ocs, &ocs->hw.watchdog_lock, " Watchdog Lock[%d]", ocs_instance(ocs));

sys/dev/ocs_fc/ocs_xport.c

552

rc = ocs_hw_init(&ocs->hw);

sys/dev/ocs_fc/ocs_xport.c

561

if (ocs_hw_set(&ocs->hw, OCS_HW_RQ_PROCESS_LIMIT, rq_limit) != OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_xport.c

588

ocs_hw_get(&ocs->hw, OCS_HW_MAX_VPORTS, &max_vports);

sys/dev/ocs_fc/ocs_xport.c

614

ocs_hw_teardown(&ocs->hw);

sys/dev/ocs_fc/ocs_xport.c

647

ocs_hw_teardown(&ocs->hw);

sys/dev/ocs_fc/ocs_xport.c

694

ocs_xport_post_node_event_cb(ocs_hw_t *hw, int32_t status, uint8_t *mqe, void *arg)

sys/dev/ocs_fc/ocs_xport.c

764

rc = ocs_hw_port_control(&ocs->hw, OCS_HW_PORT_INIT, 0, NULL, NULL);

sys/dev/ocs_fc/ocs_xport.c

773

if (ocs_hw_port_control(&ocs->hw, OCS_HW_PORT_SHUTDOWN, 0, NULL, NULL)) {

sys/dev/ocs_fc/ocs_xport.c

789

if (ocs_hw_get(&ocs->hw, OCS_HW_RESET_REQUIRED, &reset_required) != OCS_HW_RTN_SUCCESS) {

sys/dev/ocs_fc/ocs_xport.c

801

if (ocs_hw_port_control(&ocs->hw, OCS_HW_PORT_SHUTDOWN, 0, NULL, NULL)) {

sys/dev/ocs_fc/ocs_xport.c

838

ocs_hw_t *hw;

sys/dev/ocs_fc/ocs_xport.c

851

hw = &ocs->hw;

sys/dev/ocs_fc/ocs_xport.c

866

if (ocs_hw_async_call(hw, ocs_xport_post_node_event_cb, &payload)) {

sys/dev/ocs_fc/ocs_xport.c

971

hw_rc = ocs_hw_get(&(ocs->hw), OCS_HW_LINK_SPEED, &value.value);

sys/dev/ocs_fc/ocs_xport.c

990

rc = ocs_hw_get(&ocs->hw, OCS_HW_LINK_SPEED, &speed);

sys/dev/qlxgb/qla_def.h

192

qla_hw_t hw;

sys/dev/qlxgb/qla_hw.c

1050

hw->txr_next = (hw->txr_next + 1) & (NUM_TX_DESCRIPTORS - 1);

sys/dev/qlxgb/qla_hw.c

1056

tx_cmd = &hw->tx_ring_base[hw->txr_next];

sys/dev/qlxgb/qla_hw.c

1063

tx_cmd = &hw->tx_ring_base[hw->txr_next];

sys/dev/qlxgb/qla_hw.c

109

if (ha->hw.dma_buf.flags.context) {

sys/dev/qlxgb/qla_hw.c

1095

hw->txr_next = (hw->txr_next + 1) & (NUM_TX_DESCRIPTORS - 1);

sys/dev/qlxgb/qla_hw.c

1099

tx_cmd = &hw->tx_ring_base[hw->txr_next];

sys/dev/qlxgb/qla_hw.c

110

qla_free_dmabuf(ha, &ha->hw.dma_buf.context);

sys/dev/qlxgb/qla_hw.c

1107

hw->txr_next =

sys/dev/qlxgb/qla_hw.c

1108

(hw->txr_next + 1) & (NUM_TX_DESCRIPTORS - 1);

sys/dev/qlxgb/qla_hw.c

111

ha->hw.dma_buf.flags.context = 0;

sys/dev/qlxgb/qla_hw.c

1113

hw->txr_free = hw->txr_free - tx_cmd_count;

sys/dev/qlxgb/qla_hw.c

1115

QL_UPDATE_TX_PRODUCER_INDEX(ha, hw->txr_next);

sys/dev/qlxgb/qla_hw.c

1130

for (i = 0; i < ha->hw.num_sds_rings; i++)

sys/dev/qlxgb/qla_hw.c

1136

ha->hw.flags.lro = 0;

sys/dev/qlxgb/qla_hw.c

114

if (ha->hw.dma_buf.flags.sds_ring) {

sys/dev/qlxgb/qla_hw.c

115

for (i = 0; i < ha->hw.num_sds_rings; i++)

sys/dev/qlxgb/qla_hw.c

1153

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgb/qla_hw.c

1154

bzero(ha->hw.dma_buf.sds_ring[i].dma_b,

sys/dev/qlxgb/qla_hw.c

1155

ha->hw.dma_buf.sds_ring[i].size);

sys/dev/qlxgb/qla_hw.c

116

qla_free_dmabuf(ha, &ha->hw.dma_buf.sds_ring[i]);

sys/dev/qlxgb/qla_hw.c

1164

ha->hw.rx_next = NUM_RX_DESCRIPTORS - 2;

sys/dev/qlxgb/qla_hw.c

1165

ha->hw.rxj_next = NUM_RX_JUMBO_DESCRIPTORS - 2;

sys/dev/qlxgb/qla_hw.c

1166

ha->hw.rx_in = ha->hw.rxj_in = 0;

sys/dev/qlxgb/qla_hw.c

1169

QL_UPDATE_RDS_PRODUCER_INDEX(ha, 0, ha->hw.rx_next);

sys/dev/qlxgb/qla_hw.c

117

ha->hw.dma_buf.flags.sds_ring = 0;

sys/dev/qlxgb/qla_hw.c

1170

QL_UPDATE_RDS_PRODUCER_INDEX(ha, 1, ha->hw.rxj_next);

sys/dev/qlxgb/qla_hw.c

1180

qla_config_mac_addr(ha, ha->hw.mac_addr,

sys/dev/qlxgb/qla_hw.c

1181

(ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id, 1);

sys/dev/qlxgb/qla_hw.c

1186

(ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id, 1);

sys/dev/qlxgb/qla_hw.c

1188

qla_config_rss(ha, (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id);

sys/dev/qlxgb/qla_hw.c

1190

qla_config_intr_coalesce(ha, (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id, 0);

sys/dev/qlxgb/qla_hw.c

1192

for (i = 0; i < ha->hw.num_sds_rings; i++)

sys/dev/qlxgb/qla_hw.c

120

if (ha->hw.dma_buf.flags.rds_ring) {

sys/dev/qlxgb/qla_hw.c

121

for (i = 0; i < ha->hw.num_rds_rings; i++)

sys/dev/qlxgb/qla_hw.c

1211

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgb/qla_hw.c

1219

for (i = 0; i < hw->num_sds_rings; i++) {

sys/dev/qlxgb/qla_hw.c

122

qla_free_dmabuf(ha, &ha->hw.dma_buf.rds_ring[i]);

sys/dev/qlxgb/qla_hw.c

1220

sdesc = (q80_stat_desc_t *)&hw->sds[i].sds_ring_base[0];

sys/dev/qlxgb/qla_hw.c

1227

phys_addr = ha->hw.rx_cntxt_req_paddr;

sys/dev/qlxgb/qla_hw.c

123

ha->hw.dma_buf.flags.rds_ring = 0;

sys/dev/qlxgb/qla_hw.c

1241

rsp = ha->hw.rx_cntxt_rsp;

sys/dev/qlxgb/qla_hw.c

126

if (ha->hw.dma_buf.flags.tx_ring) {

sys/dev/qlxgb/qla_hw.c

1264

for (i = 0; i < ha->hw.num_rds_rings; i++) {

sys/dev/qlxgb/qla_hw.c

1269

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgb/qla_hw.c

127

qla_free_dmabuf(ha, &ha->hw.dma_buf.tx_ring);

sys/dev/qlxgb/qla_hw.c

1277

ha->hw.flags.init_rx_cnxt = 1;

sys/dev/qlxgb/qla_hw.c

128

ha->hw.dma_buf.flags.tx_ring = 0;

sys/dev/qlxgb/qla_hw.c

1291

if (!ha->hw.flags.init_rx_cnxt)

sys/dev/qlxgb/qla_hw.c

1297

cdrp.cmd_arg1 = (uint32_t) (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id;

sys/dev/qlxgb/qla_hw.c

1303

ha->hw.flags.init_rx_cnxt = 0;

sys/dev/qlxgb/qla_hw.c

1317

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgb/qla_hw.c

1324

phys_addr = ha->hw.tx_cntxt_req_paddr;

sys/dev/qlxgb/qla_hw.c

1325

tx_rsp = ha->hw.tx_cntxt_rsp;

sys/dev/qlxgb/qla_hw.c

1327

hw->txr_comp = hw->txr_next = 0;

sys/dev/qlxgb/qla_hw.c

1328

*(hw->tx_cons) = 0;

sys/dev/qlxgb/qla_hw.c

1342

ha->hw.tx_prod_reg = tx_rsp->producer_reg;

sys/dev/qlxgb/qla_hw.c

1355

ha->hw.txr_free = NUM_TX_DESCRIPTORS;

sys/dev/qlxgb/qla_hw.c

1357

ha->hw.flags.init_tx_cnxt = 1;

sys/dev/qlxgb/qla_hw.c

1371

if (!ha->hw.flags.init_tx_cnxt)

sys/dev/qlxgb/qla_hw.c

1377

cdrp.cmd_arg1 = (uint32_t) (ha->hw.tx_cntxt_rsp)->cntxt_id;

sys/dev/qlxgb/qla_hw.c

1383

ha->hw.flags.init_tx_cnxt = 0;

sys/dev/qlxgb/qla_hw.c

1407

ha->hw.max_rds_per_cntxt = cdrp.rsp_arg1;

sys/dev/qlxgb/qla_hw.c

1409

__func__, ha->hw.max_rds_per_cntxt));

sys/dev/qlxgb/qla_hw.c

1435

ha->hw.max_sds_per_cntxt = cdrp.rsp_arg1;

sys/dev/qlxgb/qla_hw.c

1437

__func__, ha->hw.max_sds_per_cntxt));

sys/dev/qlxgb/qla_hw.c

146

ha->hw.num_rds_rings = (uint16_t)sysctl_num_rds_rings;

sys/dev/qlxgb/qla_hw.c

1463

ha->hw.max_rules_per_cntxt = cdrp.rsp_arg1;

sys/dev/qlxgb/qla_hw.c

1465

__func__, ha->hw.max_rules_per_cntxt));

sys/dev/qlxgb/qla_hw.c

147

ha->hw.num_sds_rings = (uint16_t)sysctl_num_sds_rings;

sys/dev/qlxgb/qla_hw.c

1491

ha->hw.max_rcv_cntxts = cdrp.rsp_arg1;

sys/dev/qlxgb/qla_hw.c

1493

__func__, ha->hw.max_rcv_cntxts));

sys/dev/qlxgb/qla_hw.c

1519

ha->hw.max_xmt_cntxts = cdrp.rsp_arg1;

sys/dev/qlxgb/qla_hw.c

1521

__func__, ha->hw.max_xmt_cntxts));

sys/dev/qlxgb/qla_hw.c

153

ha->hw.dma_buf.tx_ring.alignment = 8;

sys/dev/qlxgb/qla_hw.c

154

ha->hw.dma_buf.tx_ring.size =

sys/dev/qlxgb/qla_hw.c

1546

ha->hw.max_mtu = cdrp.rsp_arg1;

sys/dev/qlxgb/qla_hw.c

1548

ha->hw.max_mtu));

sys/dev/qlxgb/qla_hw.c

157

if (qla_alloc_dmabuf(ha, &ha->hw.dma_buf.tx_ring)) {

sys/dev/qlxgb/qla_hw.c

1576

ha->hw.max_mtu = cdrp.rsp_arg1;

sys/dev/qlxgb/qla_hw.c

1602

ha->hw.max_lro = cdrp.rsp_arg1;

sys/dev/qlxgb/qla_hw.c

1604

ha->hw.max_lro));

sys/dev/qlxgb/qla_hw.c

161

ha->hw.dma_buf.flags.tx_ring = 1;

sys/dev/qlxgb/qla_hw.c

164

__func__, (void *)(ha->hw.dma_buf.tx_ring.dma_addr),

sys/dev/qlxgb/qla_hw.c

165

ha->hw.dma_buf.tx_ring.dma_b));

sys/dev/qlxgb/qla_hw.c

1668

rsp = ha->hw.rx_cntxt_rsp;

sys/dev/qlxgb/qla_hw.c

1684

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgb/qla_hw.c

1688

comp_idx = qla_le32_to_host(*(hw->tx_cons));

sys/dev/qlxgb/qla_hw.c

1690

while (comp_idx != hw->txr_comp) {

sys/dev/qlxgb/qla_hw.c

1691

txb = &ha->tx_buf[hw->txr_comp];

sys/dev/qlxgb/qla_hw.c

1693

hw->txr_comp++;

sys/dev/qlxgb/qla_hw.c

1694

if (hw->txr_comp == NUM_TX_DESCRIPTORS)

sys/dev/qlxgb/qla_hw.c

1695

hw->txr_comp = 0;

sys/dev/qlxgb/qla_hw.c

170

for (i = 0; i < ha->hw.num_rds_rings; i++) {

sys/dev/qlxgb/qla_hw.c

171

ha->hw.dma_buf.rds_ring[i].alignment = 8;

sys/dev/qlxgb/qla_hw.c

1711

hw->txr_free += comp_count;

sys/dev/qlxgb/qla_hw.c

1714

hw->txr_comp, hw->txr_free, hw->txr_next, READ_REG32(ha, (ha->hw.tx_prod_reg + 0x1b2000))));

sys/dev/qlxgb/qla_hw.c

1733

if (ha->hw.txr_free > free_pkt_thres)

sys/dev/qlxgb/qla_hw.c

174

ha->hw.dma_buf.rds_ring[i].size =

sys/dev/qlxgb/qla_hw.c

1747

ha->hw.flags.link_up = 0;

sys/dev/qlxgb/qla_hw.c

1752

prev_link_state = ha->hw.flags.link_up;

sys/dev/qlxgb/qla_hw.c

1755

ha->hw.flags.link_up = (((link_state & 0xF) == 1)? 1 : 0);

sys/dev/qlxgb/qla_hw.c

1757

ha->hw.flags.link_up = ((((link_state >> 4)& 0xF) == 1)? 1 : 0);

sys/dev/qlxgb/qla_hw.c

1759

if (prev_link_state != ha->hw.flags.link_up) {

sys/dev/qlxgb/qla_hw.c

1760

if (ha->hw.flags.link_up) {

sys/dev/qlxgb/qla_hw.c

177

ha->hw.dma_buf.rds_ring[i].size =

sys/dev/qlxgb/qla_hw.c

1773

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgb/qla_hw.c

1776

for (i = 0; i < hw->num_sds_rings; i++) {

sys/dev/qlxgb/qla_hw.c

1777

lro = &hw->sds[i].lro;

sys/dev/qlxgb/qla_hw.c

1797

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgb/qla_hw.c

1803

for (i = 0; i < hw->num_sds_rings; i++) {

sys/dev/qlxgb/qla_hw.c

1804

lro = &hw->sds[i].lro;

sys/dev/qlxgb/qla_hw.c

1818

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgb/qla_hw.c

1819

if (ha->hw.sds[i].rcv_active)

sys/dev/qlxgb/qla_hw.c

183

if (qla_alloc_dmabuf(ha, &ha->hw.dma_buf.rds_ring[i])) {

sys/dev/qlxgb/qla_hw.c

189

&ha->hw.dma_buf.rds_ring[j]);

sys/dev/qlxgb/qla_hw.c

195

(void *)(ha->hw.dma_buf.rds_ring[i].dma_addr),

sys/dev/qlxgb/qla_hw.c

196

ha->hw.dma_buf.rds_ring[i].dma_b));

sys/dev/qlxgb/qla_hw.c

198

ha->hw.dma_buf.flags.rds_ring = 1;

sys/dev/qlxgb/qla_hw.c

204

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgb/qla_hw.c

205

ha->hw.dma_buf.sds_ring[i].alignment = 8;

sys/dev/qlxgb/qla_hw.c

206

ha->hw.dma_buf.sds_ring[i].size =

sys/dev/qlxgb/qla_hw.c

209

if (qla_alloc_dmabuf(ha, &ha->hw.dma_buf.sds_ring[i])) {

sys/dev/qlxgb/qla_hw.c

215

&ha->hw.dma_buf.sds_ring[j]);

sys/dev/qlxgb/qla_hw.c

221

(void *)(ha->hw.dma_buf.sds_ring[i].dma_addr),

sys/dev/qlxgb/qla_hw.c

222

ha->hw.dma_buf.sds_ring[i].dma_b));

sys/dev/qlxgb/qla_hw.c

224

ha->hw.dma_buf.flags.sds_ring = 1;

sys/dev/qlxgb/qla_hw.c

241

ha->hw.dma_buf.context.alignment = 8;

sys/dev/qlxgb/qla_hw.c

242

ha->hw.dma_buf.context.size = size;

sys/dev/qlxgb/qla_hw.c

244

if (qla_alloc_dmabuf(ha, &ha->hw.dma_buf.context)) {

sys/dev/qlxgb/qla_hw.c

248

ha->hw.dma_buf.flags.context = 1;

sys/dev/qlxgb/qla_hw.c

250

__func__, (void *)(ha->hw.dma_buf.context.dma_addr),

sys/dev/qlxgb/qla_hw.c

251

ha->hw.dma_buf.context.dma_b));

sys/dev/qlxgb/qla_hw.c

269

qla_hw_t *hw;

sys/dev/qlxgb/qla_hw.c

276

hw = &ha->hw;

sys/dev/qlxgb/qla_hw.c

278

hw->tx_ring_base = hw->dma_buf.tx_ring.dma_b;

sys/dev/qlxgb/qla_hw.c

280

for (i = 0; i < ha->hw.num_sds_rings; i++)

sys/dev/qlxgb/qla_hw.c

281

hw->sds[i].sds_ring_base =

sys/dev/qlxgb/qla_hw.c

282

(q80_stat_desc_t *)hw->dma_buf.sds_ring[i].dma_b;

sys/dev/qlxgb/qla_hw.c

284

phys_addr = hw->dma_buf.context.dma_addr;

sys/dev/qlxgb/qla_hw.c

286

memset((void *)hw->dma_buf.context.dma_b, 0,

sys/dev/qlxgb/qla_hw.c

287

ha->hw.dma_buf.context.size);

sys/dev/qlxgb/qla_hw.c

289

hw->tx_cntxt_req =

sys/dev/qlxgb/qla_hw.c

290

(q80_tx_cntxt_req_t *)hw->dma_buf.context.dma_b;

sys/dev/qlxgb/qla_hw.c

291

hw->tx_cntxt_req_paddr = phys_addr;

sys/dev/qlxgb/qla_hw.c

295

hw->tx_cntxt_rsp =

sys/dev/qlxgb/qla_hw.c

296

(q80_tx_cntxt_rsp_t *)((uint8_t *)hw->tx_cntxt_req + size);

sys/dev/qlxgb/qla_hw.c

297

hw->tx_cntxt_rsp_paddr = hw->tx_cntxt_req_paddr + size;

sys/dev/qlxgb/qla_hw.c

301

hw->rx_cntxt_req =

sys/dev/qlxgb/qla_hw.c

302

(q80_rcv_cntxt_req_t *)((uint8_t *)hw->tx_cntxt_rsp + size);

sys/dev/qlxgb/qla_hw.c

303

hw->rx_cntxt_req_paddr = hw->tx_cntxt_rsp_paddr + size;

sys/dev/qlxgb/qla_hw.c

307

hw->rx_cntxt_rsp =

sys/dev/qlxgb/qla_hw.c

308

(q80_rcv_cntxt_rsp_t *)((uint8_t *)hw->rx_cntxt_req + size);

sys/dev/qlxgb/qla_hw.c

309

hw->rx_cntxt_rsp_paddr = hw->rx_cntxt_req_paddr + size;

sys/dev/qlxgb/qla_hw.c

313

hw->tx_cons = (uint32_t *)((uint8_t *)hw->rx_cntxt_rsp + size);

sys/dev/qlxgb/qla_hw.c

314

hw->tx_cons_paddr = hw->rx_cntxt_rsp_paddr + size;

sys/dev/qlxgb/qla_hw.c

320

tx_cntxt_req = hw->tx_cntxt_req;

sys/dev/qlxgb/qla_hw.c

322

tx_cntxt_req->rsp_dma_addr = qla_host_to_le64(hw->tx_cntxt_rsp_paddr);

sys/dev/qlxgb/qla_hw.c

324

tx_cntxt_req->cmd_cons_dma_addr = qla_host_to_le64(hw->tx_cons_paddr);

sys/dev/qlxgb/qla_hw.c

332

qla_host_to_le64(hw->dma_buf.tx_ring.dma_addr);

sys/dev/qlxgb/qla_hw.c

340

rx_cntxt_req = hw->rx_cntxt_req;

sys/dev/qlxgb/qla_hw.c

343

qla_host_to_le64(hw->rx_cntxt_rsp_paddr);

sys/dev/qlxgb/qla_hw.c

359

(hw->num_rds_rings * sizeof(q80_rq_rds_ring_t)));

sys/dev/qlxgb/qla_hw.c

361

qla_host_to_le16(hw->num_rds_rings);

sys/dev/qlxgb/qla_hw.c

363

qla_host_to_le16(hw->num_sds_rings);

sys/dev/qlxgb/qla_hw.c

365

for (i = 0; i < hw->num_rds_rings; i++) {

sys/dev/qlxgb/qla_hw.c

367

qla_host_to_le64(hw->dma_buf.rds_ring[i].dma_addr);

sys/dev/qlxgb/qla_hw.c

382

for (i = 0; i < hw->num_sds_rings; i++) {

sys/dev/qlxgb/qla_hw.c

384

qla_host_to_le64(hw->dma_buf.sds_ring[i].dma_addr);

sys/dev/qlxgb/qla_hw.c

391

__func__, hw->tx_cntxt_req, (void *)hw->tx_cntxt_req_paddr));

sys/dev/qlxgb/qla_hw.c

393

__func__, hw->tx_cntxt_rsp, (void *)hw->tx_cntxt_rsp_paddr));

sys/dev/qlxgb/qla_hw.c

395

__func__, hw->rx_cntxt_req, (void *)hw->rx_cntxt_req_paddr));

sys/dev/qlxgb/qla_hw.c

397

__func__, hw->rx_cntxt_rsp, (void *)hw->rx_cntxt_rsp_paddr));

sys/dev/qlxgb/qla_hw.c

399

__func__, hw->tx_cons, (void *)hw->tx_cons_paddr));

sys/dev/qlxgb/qla_hw.c

489

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgb/qla_hw.c

496

if (hw->txr_free <= QLA_TX_MIN_FREE) {

sys/dev/qlxgb/qla_hw.c

499

if (hw->txr_free > QLA_TX_MIN_FREE)

sys/dev/qlxgb/qla_hw.c

506

if (hw->txr_free <= QLA_TX_MIN_FREE) {

sys/dev/qlxgb/qla_hw.c

512

tx_cmd = &hw->tx_ring_base[hw->txr_next];

sys/dev/qlxgb/qla_hw.c

518

hw->txr_next = (hw->txr_next + 1) & (NUM_TX_DESCRIPTORS - 1);

sys/dev/qlxgb/qla_hw.c

519

hw->txr_free--;

sys/dev/qlxgb/qla_hw.c

521

QL_UPDATE_TX_PRODUCER_INDEX(ha, hw->txr_next);

sys/dev/qlxgb/qla_hw.c

658

(ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id,

sys/dev/qlxgb/qla_hw.c

666

(ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id,

sys/dev/qlxgb/qla_hw.c

674

(ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id,

sys/dev/qlxgb/qla_hw.c

691

ip_conf.hdr.cntxt_id = (ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id;

sys/dev/qlxgb/qla_hw.c

921

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgb/qla_hw.c

949

src = ha->hw.frame_hdr;

sys/dev/qlxgb/qla_hw.c

975

if (hw->txr_free <= (num_tx_cmds + QLA_TX_MIN_FREE)) {

sys/dev/qlxgb/qla_hw.c

977

if (hw->txr_free <= (num_tx_cmds + QLA_TX_MIN_FREE)) {

sys/dev/qlxgb/qla_hw.c

985

*tx_idx = hw->txr_next;

sys/dev/qlxgb/qla_hw.c

987

tx_cmd = &hw->tx_ring_base[hw->txr_next];

sys/dev/qlxgb/qla_hw.h

795

WRITE_REG32(ha, ((ha->hw.rx_cntxt_rsp)->rds_rsp[i].producer_reg +\

sys/dev/qlxgb/qla_hw.h

799

WRITE_REG32(ha, (ha->hw.tx_prod_reg + 0x1b2000), val)

sys/dev/qlxgb/qla_hw.h

802

WRITE_REG32(ha, ((ha->hw.rx_cntxt_rsp)->sds_rsp[i].consumer_reg +\

sys/dev/qlxgb/qla_hw.h

815

rsp_sds = &((ha->hw.rx_cntxt_rsp)->sds_rsp[sds_index]);\

sys/dev/qlxgb/qla_hw.h

822

rsp_sds = &((ha->hw.rx_cntxt_rsp)->sds_rsp[sds_index]);\

sys/dev/qlxgb/qla_inline.h

125

return (ha->hw.mac_addr);

sys/dev/qlxgb/qla_inline.h

147

ha->hw.mac_addr[5] = macp[0];

sys/dev/qlxgb/qla_inline.h

148

ha->hw.mac_addr[4] = macp[1];

sys/dev/qlxgb/qla_inline.h

152

ha->hw.mac_addr[3] = macp[0];

sys/dev/qlxgb/qla_inline.h

153

ha->hw.mac_addr[2] = macp[1];

sys/dev/qlxgb/qla_inline.h

154

ha->hw.mac_addr[1] = macp[2];

sys/dev/qlxgb/qla_inline.h

155

ha->hw.mac_addr[0] = macp[3];

sys/dev/qlxgb/qla_inline.h

159

ha->hw.mac_addr[5] = macp[0];

sys/dev/qlxgb/qla_inline.h

160

ha->hw.mac_addr[4] = macp[1];

sys/dev/qlxgb/qla_inline.h

161

ha->hw.mac_addr[3] = macp[2];

sys/dev/qlxgb/qla_inline.h

162

ha->hw.mac_addr[2] = macp[3];

sys/dev/qlxgb/qla_inline.h

166

ha->hw.mac_addr[1] = macp[0];

sys/dev/qlxgb/qla_inline.h

167

ha->hw.mac_addr[0] = macp[1];

sys/dev/qlxgb/qla_inline.h

178

rcv_desc = (q80_recv_desc_t *)ha->hw.dma_buf.rds_ring[ridx].dma_b;

sys/dev/qlxgb/qla_inline.h

193

bzero((void *)ha->hw.dma_buf.rds_ring[ridx].dma_b,

sys/dev/qlxgb/qla_inline.h

196

bzero((void *)ha->hw.dma_buf.rds_ring[ridx].dma_b,

sys/dev/qlxgb/qla_isr.c

168

rxj_next = ha->hw.rxj_next;

sys/dev/qlxgb/qla_isr.c

181

ha->hw.rxj_in, rxb->handle, rxb->paddr,

sys/dev/qlxgb/qla_isr.c

183

ha->hw.rxj_in++;

sys/dev/qlxgb/qla_isr.c

184

if (ha->hw.rxj_in == NUM_RX_JUMBO_DESCRIPTORS)

sys/dev/qlxgb/qla_isr.c

185

ha->hw.rxj_in = 0;

sys/dev/qlxgb/qla_isr.c

186

ha->hw.rxj_next++;

sys/dev/qlxgb/qla_isr.c

187

if (ha->hw.rxj_next == NUM_RX_JUMBO_DESCRIPTORS)

sys/dev/qlxgb/qla_isr.c

188

ha->hw.rxj_next = 0;

sys/dev/qlxgb/qla_isr.c

192

__func__, ha->hw.rxj_in, rxb->handle);

sys/dev/qlxgb/qla_isr.c

203

if (rxj_next != ha->hw.rxj_next) {

sys/dev/qlxgb/qla_isr.c

204

QL_UPDATE_RDS_PRODUCER_INDEX(ha, 1, ha->hw.rxj_next);

sys/dev/qlxgb/qla_isr.c

219

rx_next = ha->hw.rx_next;

sys/dev/qlxgb/qla_isr.c

232

ha->hw.rx_in, rxb->handle, rxb->paddr,

sys/dev/qlxgb/qla_isr.c

234

ha->hw.rx_in++;

sys/dev/qlxgb/qla_isr.c

235

if (ha->hw.rx_in == NUM_RX_DESCRIPTORS)

sys/dev/qlxgb/qla_isr.c

236

ha->hw.rx_in = 0;

sys/dev/qlxgb/qla_isr.c

237

ha->hw.rx_next++;

sys/dev/qlxgb/qla_isr.c

238

if (ha->hw.rx_next == NUM_RX_DESCRIPTORS)

sys/dev/qlxgb/qla_isr.c

239

ha->hw.rx_next = 0;

sys/dev/qlxgb/qla_isr.c

243

__func__, ha->hw.rx_in, rxb->handle);

sys/dev/qlxgb/qla_isr.c

254

if (rx_next != ha->hw.rx_next) {

sys/dev/qlxgb/qla_isr.c

255

QL_UPDATE_RDS_PRODUCER_INDEX(ha, 0, ha->hw.rx_next);

sys/dev/qlxgb/qla_isr.c

268

qla_hw_t *hw;

sys/dev/qlxgb/qla_isr.c

275

hw = &ha->hw;

sys/dev/qlxgb/qla_isr.c

277

hw->sds[sds_idx].rcv_active = 1;

sys/dev/qlxgb/qla_isr.c

279

hw->sds[sds_idx].rcv_active = 0;

sys/dev/qlxgb/qla_isr.c

288

comp_idx = hw->sds[sds_idx].sdsr_next;

sys/dev/qlxgb/qla_isr.c

289

lro = &hw->sds[sds_idx].lro;

sys/dev/qlxgb/qla_isr.c

293

&hw->sds[sds_idx].sds_ring_base[comp_idx];

sys/dev/qlxgb/qla_isr.c

322

&hw->sds[sds_idx].sds_ring_base[comp_idx];

sys/dev/qlxgb/qla_isr.c

330

if (hw->sds[sds_idx].sdsr_next != comp_idx) {

sys/dev/qlxgb/qla_isr.c

333

hw->sds[sds_idx].sdsr_next = comp_idx;

sys/dev/qlxgb/qla_isr.c

335

sdesc = (q80_stat_desc_t *)&hw->sds[sds_idx].sds_ring_base[comp_idx];

sys/dev/qlxgb/qla_isr.c

341

hw->sds[sds_idx].rcv_active = 0;

sys/dev/qlxgb/qla_isr.c

356

if (sds_idx >= ha->hw.num_sds_rings) {

sys/dev/qlxgb/qla_isr.c

384

qla_hw_t *hw;

sys/dev/qlxgb/qla_isr.c

390

hw = &ha->hw;

sys/dev/qlxgb/qla_isr.c

396

if (qla_le32_to_host(*(hw->tx_cons)) != hw->txr_comp) {

sys/dev/qlxgb/qla_isr.c

63

sdsp = &ha->hw.sds[sds_idx];

sys/dev/qlxgb/qla_os.c

1232

ha->hw.sds[i].sdsr_next = 0;

sys/dev/qlxgb/qla_os.c

1233

ha->hw.sds[i].rxb_free = NULL;

sys/dev/qlxgb/qla_os.c

1234

ha->hw.sds[i].rx_free = 0;

sys/dev/qlxgb/qla_os.c

1235

ha->hw.sds[i].rxjb_free = NULL;

sys/dev/qlxgb/qla_os.c

1236

ha->hw.sds[i].rxj_free = 0;

sys/dev/qlxgb/qla_os.c

1362

ha->hw.sds[i].sdsr_next = 0;

sys/dev/qlxgb/qla_os.c

1363

ha->hw.sds[i].rxb_free = NULL;

sys/dev/qlxgb/qla_os.c

1364

ha->hw.sds[i].rx_free = 0;

sys/dev/qlxgb/qla_os.c

1365

ha->hw.sds[i].rxjb_free = NULL;

sys/dev/qlxgb/qla_os.c

1366

ha->hw.sds[i].rxj_free = 0;

sys/dev/qlxgb/qla_os.c

208

qla_hw_t *hw;

sys/dev/qlxgb/qla_os.c

211

hw = &ha->hw;

sys/dev/qlxgb/qla_os.c

218

if (qla_le32_to_host(*(hw->tx_cons)) != hw->txr_comp) {

sys/dev/qlxgb/qla_os.c

718

bcopy(if_getlladdr(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN);

sys/dev/qlxgb/qla_os.c

827

(ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id);

sys/dev/qlxgb/qla_os.c

856

(ha->hw.rx_cntxt_rsp)->rx_rsp.cntxt_id);

sys/dev/qlxgb/qla_os.c

961

if (ha->hw.flags.link_up) {

sys/dev/qlxgb/qla_os.c

967

(ha->hw.flags.link_up ? "link_up" : "link_down")));

sys/dev/qlxgb/qla_os.c

996

if (!ha->hw.flags.link_up) {

sys/dev/qlxgbe/ql_def.h

236

qla_hw_t hw;

sys/dev/qlxgbe/ql_hw.c

1000

ha->hw.enable_9kb = 1;

sys/dev/qlxgbe/ql_hw.c

1004

OID_AUTO, "enable_9kb", CTLFLAG_RW, &ha->hw.enable_9kb,

sys/dev/qlxgbe/ql_hw.c

1005

ha->hw.enable_9kb, "Enable 9Kbyte Buffers when MTU = 9000");

sys/dev/qlxgbe/ql_hw.c

1007

ha->hw.enable_hw_lro = 1;

sys/dev/qlxgbe/ql_hw.c

1011

OID_AUTO, "enable_hw_lro", CTLFLAG_RW, &ha->hw.enable_hw_lro,

sys/dev/qlxgbe/ql_hw.c

1012

ha->hw.enable_hw_lro, "Enable Hardware LRO; Default is true \n"

sys/dev/qlxgbe/ql_hw.c

1020

OID_AUTO, "sp_log_index", CTLFLAG_RW, &ha->hw.sp_log_index,

sys/dev/qlxgbe/ql_hw.c

1021

ha->hw.sp_log_index, "sp_log_index");

sys/dev/qlxgbe/ql_hw.c

1025

OID_AUTO, "sp_log_stop", CTLFLAG_RW, &ha->hw.sp_log_stop,

sys/dev/qlxgbe/ql_hw.c

1026

ha->hw.sp_log_stop, "sp_log_stop");

sys/dev/qlxgbe/ql_hw.c

1028

ha->hw.sp_log_stop_events = 0;

sys/dev/qlxgbe/ql_hw.c

1033

&ha->hw.sp_log_stop_events,

sys/dev/qlxgbe/ql_hw.c

1034

ha->hw.sp_log_stop_events, "Slow path event log is stopped"

sys/dev/qlxgbe/ql_hw.c

1042

ha->hw.mdump_active = 0;

sys/dev/qlxgbe/ql_hw.c

1045

OID_AUTO, "minidump_active", CTLFLAG_RW, &ha->hw.mdump_active,

sys/dev/qlxgbe/ql_hw.c

1046

ha->hw.mdump_active,

sys/dev/qlxgbe/ql_hw.c

1049

ha->hw.mdump_done = 0;

sys/dev/qlxgbe/ql_hw.c

1053

&ha->hw.mdump_done, ha->hw.mdump_done,

sys/dev/qlxgbe/ql_hw.c

1056

ha->hw.mdump_capture_mask = 0xF;

sys/dev/qlxgbe/ql_hw.c

1060

&ha->hw.mdump_capture_mask, ha->hw.mdump_capture_mask,

sys/dev/qlxgbe/ql_hw.c

1094

ha->hw.user_pri_nic = 0;

sys/dev/qlxgbe/ql_hw.c

1097

OID_AUTO, "user_pri_nic", CTLFLAG_RW, &ha->hw.user_pri_nic,

sys/dev/qlxgbe/ql_hw.c

1098

ha->hw.user_pri_nic,

sys/dev/qlxgbe/ql_hw.c

1101

ha->hw.user_pri_iscsi = 4;

sys/dev/qlxgbe/ql_hw.c

1104

OID_AUTO, "user_pri_iscsi", CTLFLAG_RW, &ha->hw.user_pri_iscsi,

sys/dev/qlxgbe/ql_hw.c

1105

ha->hw.user_pri_iscsi,

sys/dev/qlxgbe/ql_hw.c

1117

device_printf(ha->pci_dev, "cable_oui\t\t 0x%08x\n", ha->hw.cable_oui);

sys/dev/qlxgbe/ql_hw.c

1119

if (ha->hw.link_up) {

sys/dev/qlxgbe/ql_hw.c

1125

if (ha->hw.fduplex) {

sys/dev/qlxgbe/ql_hw.c

1131

if (ha->hw.autoneg) {

sys/dev/qlxgbe/ql_hw.c

1137

switch (ha->hw.link_speed) {

sys/dev/qlxgbe/ql_hw.c

1155

switch (ha->hw.module_type) {

sys/dev/qlxgbe/ql_hw.c

1171

ha->hw.cable_length);

sys/dev/qlxgbe/ql_hw.c

1177

ha->hw.cable_length);

sys/dev/qlxgbe/ql_hw.c

1184

ha->hw.cable_length);

sys/dev/qlxgbe/ql_hw.c

1210

ha->hw.module_type);

sys/dev/qlxgbe/ql_hw.c

1214

if (ha->hw.link_faults == 1)

sys/dev/qlxgbe/ql_hw.c

1227

if (ha->hw.dma_buf.flags.sds_ring) {

sys/dev/qlxgbe/ql_hw.c

1228

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

1229

ql_free_dmabuf(ha, &ha->hw.dma_buf.sds_ring[i]);

sys/dev/qlxgbe/ql_hw.c

1231

ha->hw.dma_buf.flags.sds_ring = 0;

sys/dev/qlxgbe/ql_hw.c

1234

if (ha->hw.dma_buf.flags.rds_ring) {

sys/dev/qlxgbe/ql_hw.c

1235

for (i = 0; i < ha->hw.num_rds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

1236

ql_free_dmabuf(ha, &ha->hw.dma_buf.rds_ring[i]);

sys/dev/qlxgbe/ql_hw.c

1238

ha->hw.dma_buf.flags.rds_ring = 0;

sys/dev/qlxgbe/ql_hw.c

1241

if (ha->hw.dma_buf.flags.tx_ring) {

sys/dev/qlxgbe/ql_hw.c

1242

ql_free_dmabuf(ha, &ha->hw.dma_buf.tx_ring);

sys/dev/qlxgbe/ql_hw.c

1243

ha->hw.dma_buf.flags.tx_ring = 0;

sys/dev/qlxgbe/ql_hw.c

1257

qla_hw_t *hw;

sys/dev/qlxgbe/ql_hw.c

1266

hw = &ha->hw;

sys/dev/qlxgbe/ql_hw.c

1271

size = (tx_ring_size * ha->hw.num_tx_rings);

sys/dev/qlxgbe/ql_hw.c

1273

hw->dma_buf.tx_ring.alignment = 8;

sys/dev/qlxgbe/ql_hw.c

1274

hw->dma_buf.tx_ring.size = size + PAGE_SIZE;

sys/dev/qlxgbe/ql_hw.c

1276

if (ql_alloc_dmabuf(ha, &hw->dma_buf.tx_ring)) {

sys/dev/qlxgbe/ql_hw.c

1281

vaddr = (uint8_t *)hw->dma_buf.tx_ring.dma_b;

sys/dev/qlxgbe/ql_hw.c

1282

paddr = hw->dma_buf.tx_ring.dma_addr;

sys/dev/qlxgbe/ql_hw.c

1284

for (i = 0; i < ha->hw.num_tx_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

1285

tx_cntxt = (qla_hw_tx_cntxt_t *)&hw->tx_cntxt[i];

sys/dev/qlxgbe/ql_hw.c

1294

for (i = 0; i < ha->hw.num_tx_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

1295

tx_cntxt = (qla_hw_tx_cntxt_t *)&hw->tx_cntxt[i];

sys/dev/qlxgbe/ql_hw.c

1304

ha->hw.dma_buf.flags.tx_ring = 1;

sys/dev/qlxgbe/ql_hw.c

1307

__func__, (void *)(hw->dma_buf.tx_ring.dma_addr),

sys/dev/qlxgbe/ql_hw.c

1308

hw->dma_buf.tx_ring.dma_b));

sys/dev/qlxgbe/ql_hw.c

1313

for (i = 0; i < hw->num_rds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

1314

hw->dma_buf.rds_ring[i].alignment = 8;

sys/dev/qlxgbe/ql_hw.c

1315

hw->dma_buf.rds_ring[i].size =

sys/dev/qlxgbe/ql_hw.c

1318

if (ql_alloc_dmabuf(ha, &hw->dma_buf.rds_ring[i])) {

sys/dev/qlxgbe/ql_hw.c

1323

ql_free_dmabuf(ha, &hw->dma_buf.rds_ring[j]);

sys/dev/qlxgbe/ql_hw.c

1328

__func__, i, (void *)(hw->dma_buf.rds_ring[i].dma_addr),

sys/dev/qlxgbe/ql_hw.c

1329

hw->dma_buf.rds_ring[i].dma_b));

sys/dev/qlxgbe/ql_hw.c

1332

hw->dma_buf.flags.rds_ring = 1;

sys/dev/qlxgbe/ql_hw.c

1338

for (i = 0; i < hw->num_sds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

1339

hw->dma_buf.sds_ring[i].alignment = 8;

sys/dev/qlxgbe/ql_hw.c

1340

hw->dma_buf.sds_ring[i].size =

sys/dev/qlxgbe/ql_hw.c

1343

if (ql_alloc_dmabuf(ha, &hw->dma_buf.sds_ring[i])) {

sys/dev/qlxgbe/ql_hw.c

1348

ql_free_dmabuf(ha, &hw->dma_buf.sds_ring[j]);

sys/dev/qlxgbe/ql_hw.c

1354

(void *)(hw->dma_buf.sds_ring[i].dma_addr),

sys/dev/qlxgbe/ql_hw.c

1355

hw->dma_buf.sds_ring[i].dma_b));

sys/dev/qlxgbe/ql_hw.c

1357

for (i = 0; i < hw->num_sds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

1358

hw->sds[i].sds_ring_base =

sys/dev/qlxgbe/ql_hw.c

1359

(q80_stat_desc_t *)hw->dma_buf.sds_ring[i].dma_b;

sys/dev/qlxgbe/ql_hw.c

1362

hw->dma_buf.flags.sds_ring = 1;

sys/dev/qlxgbe/ql_hw.c

1428

ha->hw.mbx_comp_msecs[(Q8_MBX_COMP_MSECS - 2)]++;

sys/dev/qlxgbe/ql_hw.c

1466

ha->hw.mbx_comp_msecs[(Q8_MBX_COMP_MSECS - 1)]++;

sys/dev/qlxgbe/ql_hw.c

1481

WRITE_REG32(ha, ha->hw.mbx_intr_mask_offset, 0x0);

sys/dev/qlxgbe/ql_hw.c

1489

ha->hw.mbx_comp_msecs[msecs_200]++;

sys/dev/qlxgbe/ql_hw.c

1491

ha->hw.mbx_comp_msecs[15]++;

sys/dev/qlxgbe/ql_hw.c

1495

ha->hw.mbx_comp_msecs[16]++;

sys/dev/qlxgbe/ql_hw.c

1511

bzero(ha->hw.mbox, (sizeof (uint32_t) * Q8_NUM_MBOX));

sys/dev/qlxgbe/ql_hw.c

1513

mbox = ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1549

c_intr = (q80_config_intr_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1566

ha->hw.intr_id[(start_idx + i)];

sys/dev/qlxgbe/ql_hw.c

1574

ha->hw.mbox, (sizeof (q80_config_intr_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

1580

c_intr_rsp = (q80_config_intr_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1601

ha->hw.intr_id[(start_idx + i)] =

sys/dev/qlxgbe/ql_hw.c

1603

ha->hw.intr_src[(start_idx + i)] =

sys/dev/qlxgbe/ql_hw.c

1628

c_rss = (q80_config_rss_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1657

ha->hw.mbox, (sizeof(q80_config_rss_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

1661

c_rss_rsp = (q80_config_rss_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1688

c_rss_ind = (q80_config_rss_ind_table_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1701

(sizeof (q80_config_rss_ind_table_t) >> 2), ha->hw.mbox,

sys/dev/qlxgbe/ql_hw.c

1707

c_rss_ind_rsp = (q80_config_rss_ind_table_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1730

intrc = (q80_config_intr_coalesc_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1739

intrc->max_pkts = ha->hw.rcv_intr_coalesce & 0xFFFF;

sys/dev/qlxgbe/ql_hw.c

1740

intrc->max_mswait = (ha->hw.rcv_intr_coalesce >> 16) & 0xFFFF;

sys/dev/qlxgbe/ql_hw.c

1743

intrc->max_pkts = ha->hw.xmt_intr_coalesce & 0xFFFF;

sys/dev/qlxgbe/ql_hw.c

1744

intrc->max_mswait = (ha->hw.xmt_intr_coalesce >> 16) & 0xFFFF;

sys/dev/qlxgbe/ql_hw.c

1753

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

1761

ha->hw.mbox, (sizeof(q80_config_intr_coalesc_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

1765

intrc_rsp = (q80_config_intr_coalesc_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1799

cmac = (q80_config_mac_addr_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1814

cmac->cntxt_id = ha->hw.rcv_cntxt_id;

sys/dev/qlxgbe/ql_hw.c

1823

ha->hw.mbox, (sizeof(q80_config_mac_addr_rsp_t) >> 2), 1)) {

sys/dev/qlxgbe/ql_hw.c

1828

cmac_rsp = (q80_config_mac_addr_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1859

rcv_mode = (q80_config_mac_rcv_mode_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1868

rcv_mode->cntxt_id = ha->hw.rcv_cntxt_id;

sys/dev/qlxgbe/ql_hw.c

1872

ha->hw.mbox, (sizeof(q80_config_mac_rcv_mode_rsp_t) >> 2), 1)) {

sys/dev/qlxgbe/ql_hw.c

1876

rcv_mode_rsp = (q80_config_mac_rcv_mode_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1893

ha->hw.mac_rcv_mode |= Q8_MBX_MAC_RCV_PROMISC_ENABLE;

sys/dev/qlxgbe/ql_hw.c

1894

ret = qla_set_mac_rcv_mode(ha, ha->hw.mac_rcv_mode);

sys/dev/qlxgbe/ql_hw.c

1901

ha->hw.mac_rcv_mode &= ~Q8_MBX_MAC_RCV_PROMISC_ENABLE;

sys/dev/qlxgbe/ql_hw.c

1902

(void)qla_set_mac_rcv_mode(ha, ha->hw.mac_rcv_mode);

sys/dev/qlxgbe/ql_hw.c

1910

ha->hw.mac_rcv_mode |= Q8_MBX_MAC_ALL_MULTI_ENABLE;

sys/dev/qlxgbe/ql_hw.c

1911

ret = qla_set_mac_rcv_mode(ha, ha->hw.mac_rcv_mode);

sys/dev/qlxgbe/ql_hw.c

1918

ha->hw.mac_rcv_mode &= ~Q8_MBX_MAC_ALL_MULTI_ENABLE;

sys/dev/qlxgbe/ql_hw.c

1919

(void)qla_set_mac_rcv_mode(ha, ha->hw.mac_rcv_mode);

sys/dev/qlxgbe/ql_hw.c

1937

max_mtu = (q80_set_max_mtu_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1949

ha->hw.mbox, (sizeof (q80_set_max_mtu_rsp_t) >> 2), 1)) {

sys/dev/qlxgbe/ql_hw.c

1954

max_mtu_rsp = (q80_set_max_mtu_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1975

lnk = (q80_link_event_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

1986

ha->hw.mbox, (sizeof (q80_link_event_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

1991

lnk_rsp = (q80_link_event_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

2012

fw_lro = (q80_config_fw_lro_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

2026

ha->hw.mbox, (sizeof (q80_config_fw_lro_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

2031

fw_lro_rsp = (q80_config_fw_lro_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

2052

hw_config = (q80_hw_config_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

2065

ha->hw.mbox, (sizeof (q80_hw_config_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

2069

hw_config_rsp = (q80_hw_config_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

2090

hw_config = (q80_hw_config_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

2101

ha->hw.mbox, (sizeof (q80_hw_config_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

2105

hw_config_rsp = (q80_hw_config_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

2129

stat = (q80_get_stats_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

2139

ha->hw.mbox, (rsp_size >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

2144

stat_rsp = (q80_get_stats_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

2179

stat_rsp = (q80_get_stats_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

2194

bcopy(mstat, &ha->hw.mac, sizeof(q80_mac_stats_t));

sys/dev/qlxgbe/ql_hw.c

2197

__func__, ha->hw.mbox[0]);

sys/dev/qlxgbe/ql_hw.c

2204

cmd |= (ha->hw.rcv_cntxt_id << 16);

sys/dev/qlxgbe/ql_hw.c

2212

bcopy(rstat, &ha->hw.rcv, sizeof(q80_rcv_stats_t));

sys/dev/qlxgbe/ql_hw.c

2215

__func__, ha->hw.mbox[0]);

sys/dev/qlxgbe/ql_hw.c

2224

for (i = 0 ; (i < ha->hw.num_tx_rings); i++) {

sys/dev/qlxgbe/ql_hw.c

2232

cmd |= (ha->hw.tx_cntxt[i].tx_cntxt_id << 16);

sys/dev/qlxgbe/ql_hw.c

2237

bcopy(xstat, &ha->hw.xmt[i], sizeof(q80_xmt_stats_t));

sys/dev/qlxgbe/ql_hw.c

2240

__func__, ha->hw.mbox[0]);

sys/dev/qlxgbe/ql_hw.c

2472

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgbe/ql_hw.c

2535

if (hw->tx_cntxt[txr_idx].txr_free <= (num_tx_cmds + QLA_TX_MIN_FREE)) {

sys/dev/qlxgbe/ql_hw.c

2537

if (hw->tx_cntxt[txr_idx].txr_free <=

sys/dev/qlxgbe/ql_hw.c

2560

tx_cmd = &hw->tx_cntxt[txr_idx].tx_ring_base[tx_idx];

sys/dev/qlxgbe/ql_hw.c

2563

if (nsegs > ha->hw.max_tx_segs)

sys/dev/qlxgbe/ql_hw.c

2564

ha->hw.max_tx_segs = nsegs;

sys/dev/qlxgbe/ql_hw.c

2584

eh->evl_tag |= ha->hw.user_pri_iscsi << 13;

sys/dev/qlxgbe/ql_hw.c

2598

tx_cmd->vlan_tci |= ha->hw.user_pri_iscsi << 13;

sys/dev/qlxgbe/ql_hw.c

2638

txr_next = hw->tx_cntxt[txr_idx].txr_next =

sys/dev/qlxgbe/ql_hw.c

2639

(hw->tx_cntxt[txr_idx].txr_next + 1) &

sys/dev/qlxgbe/ql_hw.c

2646

tx_cmd = &hw->tx_cntxt[txr_idx].tx_ring_base[txr_next];

sys/dev/qlxgbe/ql_hw.c

2653

txr_next = hw->tx_cntxt[txr_idx].txr_next;

sys/dev/qlxgbe/ql_hw.c

2655

tx_cmd = &hw->tx_cntxt[txr_idx].tx_ring_base[txr_next];

sys/dev/qlxgbe/ql_hw.c

266

CTLFLAG_RD, &ha->hw.mac.xmt_frames,

sys/dev/qlxgbe/ql_hw.c

2690

txr_next = hw->tx_cntxt[txr_idx].txr_next =

sys/dev/qlxgbe/ql_hw.c

2691

(hw->tx_cntxt[txr_idx].txr_next + 1) &

sys/dev/qlxgbe/ql_hw.c

2696

tx_cmd = &hw->tx_cntxt[txr_idx].tx_ring_base[txr_next];

sys/dev/qlxgbe/ql_hw.c

2705

txr_next = hw->tx_cntxt[txr_idx].txr_next =

sys/dev/qlxgbe/ql_hw.c

2706

(hw->tx_cntxt[txr_idx].txr_next + 1) &

sys/dev/qlxgbe/ql_hw.c

271

CTLFLAG_RD, &ha->hw.mac.xmt_bytes,

sys/dev/qlxgbe/ql_hw.c

2712

hw->tx_cntxt[txr_idx].txr_free =

sys/dev/qlxgbe/ql_hw.c

2713

hw->tx_cntxt[txr_idx].txr_free - tx_cmd_count;

sys/dev/qlxgbe/ql_hw.c

2715

QL_UPDATE_TX_PRODUCER_INDEX(ha, hw->tx_cntxt[txr_idx].txr_next,\

sys/dev/qlxgbe/ql_hw.c

2730

rss_ind_tbl[i] = i % ha->hw.num_sds_rings;

sys/dev/qlxgbe/ql_hw.c

2741

if (qla_set_rss_ind_table(ha, i, count, ha->hw.rcv_cntxt_id,

sys/dev/qlxgbe/ql_hw.c

2754

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgbe/ql_hw.c

2757

for (i = 0; i < hw->num_sds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

2758

lro = &hw->sds[i].lro;

sys/dev/qlxgbe/ql_hw.c

276

CTLFLAG_RD, &ha->hw.mac.xmt_mcast_pkts,

sys/dev/qlxgbe/ql_hw.c

2782

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgbe/ql_hw.c

2785

for (i = 0; i < hw->num_sds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

2786

lro = &hw->sds[i].lro;

sys/dev/qlxgbe/ql_hw.c

2800

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgbe/ql_hw.c

2803

for (i = 0; i < hw->num_sds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

2804

lro = &hw->sds[i].lro;

sys/dev/qlxgbe/ql_hw.c

281

CTLFLAG_RD, &ha->hw.mac.xmt_bcast_pkts,

sys/dev/qlxgbe/ql_hw.c

2830

if (ha->hw.flags.init_intr_cnxt) {

sys/dev/qlxgbe/ql_hw.c

2831

for (i = 0; i < ha->hw.num_sds_rings; ) {

sys/dev/qlxgbe/ql_hw.c

2832

if ((i + Q8_MAX_INTR_VECTORS) < ha->hw.num_sds_rings)

sys/dev/qlxgbe/ql_hw.c

2835

num_msix = ha->hw.num_sds_rings - i;

sys/dev/qlxgbe/ql_hw.c

2843

ha->hw.flags.init_intr_cnxt = 0;

sys/dev/qlxgbe/ql_hw.c

2847

if (ha->hw.enable_soft_lro) {

sys/dev/qlxgbe/ql_hw.c

286

CTLFLAG_RD, &ha->hw.mac.xmt_pause_frames,

sys/dev/qlxgbe/ql_hw.c

2860

ha->hw.mbx_intr_mask_offset = READ_REG32(ha, Q8_MBOX_INT_MASK_MSIX);

sys/dev/qlxgbe/ql_hw.c

2864

WRITE_REG32(ha, ha->hw.mbx_intr_mask_offset, 0x0);

sys/dev/qlxgbe/ql_hw.c

2871

ha->hw.enable_9kb = 0;

sys/dev/qlxgbe/ql_hw.c

2890

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

2891

bzero(ha->hw.dma_buf.sds_ring[i].dma_b,

sys/dev/qlxgbe/ql_hw.c

2892

ha->hw.dma_buf.sds_ring[i].size);

sys/dev/qlxgbe/ql_hw.c

2895

for (i = 0; i < ha->hw.num_sds_rings; ) {

sys/dev/qlxgbe/ql_hw.c

2896

if ((i + Q8_MAX_INTR_VECTORS) < ha->hw.num_sds_rings)

sys/dev/qlxgbe/ql_hw.c

2899

num_msix = ha->hw.num_sds_rings - i;

sys/dev/qlxgbe/ql_hw.c

291

CTLFLAG_RD, &ha->hw.mac.xmt_cntrl_pkts,

sys/dev/qlxgbe/ql_hw.c

2917

ha->hw.flags.init_intr_cnxt = 1;

sys/dev/qlxgbe/ql_hw.c

2926

for (i = 0; i < ha->hw.num_rds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

2927

rdesc = &ha->hw.rds[i];

sys/dev/qlxgbe/ql_hw.c

2942

ha->hw.max_tx_segs = 0;

sys/dev/qlxgbe/ql_hw.c

2944

if (qla_config_mac_addr(ha, ha->hw.mac_addr, 1, 1))

sys/dev/qlxgbe/ql_hw.c

2947

ha->hw.flags.unicast_mac = 1;

sys/dev/qlxgbe/ql_hw.c

2955

ha->hw.flags.bcast_mac = 1;

sys/dev/qlxgbe/ql_hw.c

296

CTLFLAG_RD, &ha->hw.mac.xmt_pkt_lt_64bytes,

sys/dev/qlxgbe/ql_hw.c

2963

if (ql_set_max_mtu(ha, ha->max_frame_size, ha->hw.rcv_cntxt_id))

sys/dev/qlxgbe/ql_hw.c

2966

if (qla_config_rss(ha, ha->hw.rcv_cntxt_id))

sys/dev/qlxgbe/ql_hw.c

2972

if (qla_config_intr_coalesce(ha, ha->hw.rcv_cntxt_id, 0, 1))

sys/dev/qlxgbe/ql_hw.c

2975

if (qla_link_event_req(ha, ha->hw.rcv_cntxt_id))

sys/dev/qlxgbe/ql_hw.c

2979

if (ha->hw.enable_hw_lro) {

sys/dev/qlxgbe/ql_hw.c

2980

ha->hw.enable_soft_lro = 0;

sys/dev/qlxgbe/ql_hw.c

2982

if (qla_config_fw_lro(ha, ha->hw.rcv_cntxt_id))

sys/dev/qlxgbe/ql_hw.c

2985

ha->hw.enable_soft_lro = 1;

sys/dev/qlxgbe/ql_hw.c

2998

for (i = 0; i < ha->hw.num_sds_rings; i++)

sys/dev/qlxgbe/ql_hw.c

301

CTLFLAG_RD, &ha->hw.mac.xmt_pkt_lt_127bytes,

sys/dev/qlxgbe/ql_hw.c

3011

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgbe/ql_hw.c

3013

map_rings = (q80_rq_map_sds_to_rds_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3020

map_rings->cntxt_id = hw->rcv_cntxt_id;

sys/dev/qlxgbe/ql_hw.c

3030

ha->hw.mbox, (sizeof(q80_rsp_add_rcv_rings_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

3035

map_rings_rsp = (q80_rsp_map_sds_to_rds_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3058

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgbe/ql_hw.c

306

CTLFLAG_RD, &ha->hw.mac.xmt_pkt_lt_255bytes,

sys/dev/qlxgbe/ql_hw.c

3071

for (i = 0; i < hw->num_sds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

3072

sdesc = (q80_stat_desc_t *)&hw->sds[i].sds_ring_base[0];

sys/dev/qlxgbe/ql_hw.c

3080

rcntxt_sds_rings = hw->num_sds_rings;

sys/dev/qlxgbe/ql_hw.c

3081

if (hw->num_sds_rings > MAX_RCNTXT_SDS_RINGS)

sys/dev/qlxgbe/ql_hw.c

3084

rcntxt_rds_rings = hw->num_rds_rings;

sys/dev/qlxgbe/ql_hw.c

3086

if (hw->num_rds_rings > MAX_RDS_RING_SETS)

sys/dev/qlxgbe/ql_hw.c

3089

rcntxt = (q80_rq_rcv_cntxt_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3102

if (ha->hw.enable_9kb)

sys/dev/qlxgbe/ql_hw.c

3107

if (ha->hw.num_rds_rings > 1) {

sys/dev/qlxgbe/ql_hw.c

311

CTLFLAG_RD, &ha->hw.mac.xmt_pkt_lt_511bytes,

sys/dev/qlxgbe/ql_hw.c

3121

qla_host_to_le64(hw->dma_buf.sds_ring[i].dma_addr);

sys/dev/qlxgbe/ql_hw.c

3124

rcntxt->sds[i].intr_id = qla_host_to_le16(hw->intr_id[i]);

sys/dev/qlxgbe/ql_hw.c

3130

qla_host_to_le64(hw->dma_buf.rds_ring[i].dma_addr);

sys/dev/qlxgbe/ql_hw.c

3132

if (ha->hw.enable_9kb)

sys/dev/qlxgbe/ql_hw.c

3144

ha->hw.mbox, (sizeof(q80_rsp_rcv_cntxt_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

3149

rcntxt_rsp = (q80_rsp_rcv_cntxt_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3159

hw->sds[i].sds_consumer = rcntxt_rsp->sds_cons[i];

sys/dev/qlxgbe/ql_hw.c

316

CTLFLAG_RD, &ha->hw.mac.xmt_pkt_lt_1023bytes,

sys/dev/qlxgbe/ql_hw.c

3163

hw->rds[i].prod_std = rcntxt_rsp->rds[i].prod_std;

sys/dev/qlxgbe/ql_hw.c

3166

hw->rcv_cntxt_id = rcntxt_rsp->cntxt_id;

sys/dev/qlxgbe/ql_hw.c

3168

ha->hw.flags.init_rx_cnxt = 1;

sys/dev/qlxgbe/ql_hw.c

3170

if (hw->num_sds_rings > MAX_RCNTXT_SDS_RINGS) {

sys/dev/qlxgbe/ql_hw.c

3171

for (i = MAX_RCNTXT_SDS_RINGS; i < hw->num_sds_rings;) {

sys/dev/qlxgbe/ql_hw.c

3172

if ((i + MAX_RCNTXT_SDS_RINGS) < hw->num_sds_rings)

sys/dev/qlxgbe/ql_hw.c

3175

max_idx = hw->num_sds_rings - i;

sys/dev/qlxgbe/ql_hw.c

3185

if (hw->num_rds_rings > 1) {

sys/dev/qlxgbe/ql_hw.c

3186

for (i = 0; i < hw->num_rds_rings; ) {

sys/dev/qlxgbe/ql_hw.c

3187

if ((i + MAX_SDS_TO_RDS_MAP) < hw->num_rds_rings)

sys/dev/qlxgbe/ql_hw.c

3190

max_idx = hw->num_rds_rings - i;

sys/dev/qlxgbe/ql_hw.c

321

CTLFLAG_RD, &ha->hw.mac.xmt_pkt_lt_1518bytes,

sys/dev/qlxgbe/ql_hw.c

3210

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgbe/ql_hw.c

3212

add_rcv = (q80_rq_add_rcv_rings_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3221

add_rcv->cntxt_id = hw->rcv_cntxt_id;

sys/dev/qlxgbe/ql_hw.c

3227

qla_host_to_le64(hw->dma_buf.sds_ring[j].dma_addr);

sys/dev/qlxgbe/ql_hw.c

3232

add_rcv->sds[i].intr_id = qla_host_to_le16(hw->intr_id[j]);

sys/dev/qlxgbe/ql_hw.c

3240

qla_host_to_le64(hw->dma_buf.rds_ring[j].dma_addr);

sys/dev/qlxgbe/ql_hw.c

3242

if (ha->hw.enable_9kb)

sys/dev/qlxgbe/ql_hw.c

3254

ha->hw.mbox, (sizeof(q80_rsp_add_rcv_rings_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

3259

add_rcv_rsp = (q80_rsp_add_rcv_rings_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

326

CTLFLAG_RD, &ha->hw.mac.xmt_pkt_gt_1518bytes,

sys/dev/qlxgbe/ql_hw.c

3269

hw->sds[(i + sds_idx)].sds_consumer = add_rcv_rsp->sds_cons[i];

sys/dev/qlxgbe/ql_hw.c

3273

hw->rds[(i + sds_idx)].prod_std = add_rcv_rsp->rds[i].prod_std;

sys/dev/qlxgbe/ql_hw.c

3292

if (!ha->hw.flags.init_rx_cnxt)

sys/dev/qlxgbe/ql_hw.c

3298

if (ha->hw.flags.bcast_mac) {

sys/dev/qlxgbe/ql_hw.c

3304

ha->hw.flags.bcast_mac = 0;

sys/dev/qlxgbe/ql_hw.c

3307

if (ha->hw.flags.unicast_mac) {

sys/dev/qlxgbe/ql_hw.c

3308

if (qla_config_mac_addr(ha, ha->hw.mac_addr, 0, 1))

sys/dev/qlxgbe/ql_hw.c

331

CTLFLAG_RD, &ha->hw.mac.rcv_frames,

sys/dev/qlxgbe/ql_hw.c

3310

ha->hw.flags.unicast_mac = 0;

sys/dev/qlxgbe/ql_hw.c

3313

rcntxt = (q80_rcv_cntxt_destroy_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3320

rcntxt->cntxt_id = ha->hw.rcv_cntxt_id;

sys/dev/qlxgbe/ql_hw.c

3324

ha->hw.mbox, (sizeof(q80_rcv_cntxt_destroy_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

3328

rcntxt_rsp = (q80_rcv_cntxt_destroy_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3336

ha->hw.flags.init_rx_cnxt = 0;

sys/dev/qlxgbe/ql_hw.c

3348

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgbe/ql_hw.c

3355

hw_tx_cntxt = &hw->tx_cntxt[txr_idx];

sys/dev/qlxgbe/ql_hw.c

336

CTLFLAG_RD, &ha->hw.mac.rcv_bytes,

sys/dev/qlxgbe/ql_hw.c

3362

tcntxt = (q80_rq_tx_cntxt_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3376

if (txr_idx >= (ha->hw.num_tx_rings >> 1)) {

sys/dev/qlxgbe/ql_hw.c

3380

intr_idx = txr_idx % (ha->hw.num_tx_rings >> 1);

sys/dev/qlxgbe/ql_hw.c

3395

tcntxt->tx_ring[0].intr_id = qla_host_to_le16(hw->intr_id[intr_idx]);

sys/dev/qlxgbe/ql_hw.c

3404

ha->hw.mbox,

sys/dev/qlxgbe/ql_hw.c

3409

tcntxt_rsp = (q80_rsp_tx_cntxt_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

341

CTLFLAG_RD, &ha->hw.mac.rcv_mcast_pkts,

sys/dev/qlxgbe/ql_hw.c

3439

tcntxt = (q80_tx_cntxt_destroy_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3446

tcntxt->cntxt_id = ha->hw.tx_cntxt[txr_idx].tx_cntxt_id;

sys/dev/qlxgbe/ql_hw.c

3450

ha->hw.mbox, (sizeof (q80_tx_cntxt_destroy_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

3454

tcntxt_rsp = (q80_tx_cntxt_destroy_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

346

CTLFLAG_RD, &ha->hw.mac.rcv_bcast_pkts,

sys/dev/qlxgbe/ql_hw.c

3471

if (!ha->hw.flags.init_tx_cnxt)

sys/dev/qlxgbe/ql_hw.c

3474

for (i = 0; i < ha->hw.num_tx_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

3478

ha->hw.flags.init_tx_cnxt = 0;

sys/dev/qlxgbe/ql_hw.c

3488

for (i = 0; i < ha->hw.num_tx_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

3497

ha->hw.flags.init_tx_cnxt = 1;

sys/dev/qlxgbe/ql_hw.c

3508

nmcast = ha->hw.nmcast;

sys/dev/qlxgbe/ql_hw.c

351

CTLFLAG_RD, &ha->hw.mac.rcv_pause_frames,

sys/dev/qlxgbe/ql_hw.c

3513

mcast = ha->hw.mac_addr_arr;

sys/dev/qlxgbe/ql_hw.c

3517

if ((ha->hw.mcast[i].addr[0] != 0) ||

sys/dev/qlxgbe/ql_hw.c

3518

(ha->hw.mcast[i].addr[1] != 0) ||

sys/dev/qlxgbe/ql_hw.c

3519

(ha->hw.mcast[i].addr[2] != 0) ||

sys/dev/qlxgbe/ql_hw.c

3520

(ha->hw.mcast[i].addr[3] != 0) ||

sys/dev/qlxgbe/ql_hw.c

3521

(ha->hw.mcast[i].addr[4] != 0) ||

sys/dev/qlxgbe/ql_hw.c

3522

(ha->hw.mcast[i].addr[5] != 0)) {

sys/dev/qlxgbe/ql_hw.c

3523

bcopy(ha->hw.mcast[i].addr, mcast, ETHER_ADDR_LEN);

sys/dev/qlxgbe/ql_hw.c

3529

__func__, ha->hw.mcast[i].addr[0],

sys/dev/qlxgbe/ql_hw.c

3530

ha->hw.mcast[i].addr[1], ha->hw.mcast[i].addr[2],

sys/dev/qlxgbe/ql_hw.c

3531

ha->hw.mcast[i].addr[3], ha->hw.mcast[i].addr[4],

sys/dev/qlxgbe/ql_hw.c

3532

ha->hw.mcast[i].addr[5]);

sys/dev/qlxgbe/ql_hw.c

3535

if (qla_config_mac_addr(ha, ha->hw.mac_addr_arr,

sys/dev/qlxgbe/ql_hw.c

3543

mcast = ha->hw.mac_addr_arr;

sys/dev/qlxgbe/ql_hw.c

3553

if (qla_config_mac_addr(ha, ha->hw.mac_addr_arr, add_mcast,

sys/dev/qlxgbe/ql_hw.c

356

CTLFLAG_RD, &ha->hw.mac.rcv_cntrl_pkts,

sys/dev/qlxgbe/ql_hw.c

3582

bzero(ha->hw.mcast, (sizeof (qla_mcast_t) * Q8_MAX_NUM_MULTICAST_ADDRS));

sys/dev/qlxgbe/ql_hw.c

3583

ha->hw.nmcast = 0;

sys/dev/qlxgbe/ql_hw.c

3594

if (QL_MAC_CMP(ha->hw.mcast[i].addr, mta) == 0)

sys/dev/qlxgbe/ql_hw.c

3606

if ((ha->hw.mcast[i].addr[0] == 0) &&

sys/dev/qlxgbe/ql_hw.c

3607

(ha->hw.mcast[i].addr[1] == 0) &&

sys/dev/qlxgbe/ql_hw.c

3608

(ha->hw.mcast[i].addr[2] == 0) &&

sys/dev/qlxgbe/ql_hw.c

3609

(ha->hw.mcast[i].addr[3] == 0) &&

sys/dev/qlxgbe/ql_hw.c

361

CTLFLAG_RD, &ha->hw.mac.rcv_pkt_lt_64bytes,

sys/dev/qlxgbe/ql_hw.c

3610

(ha->hw.mcast[i].addr[4] == 0) &&

sys/dev/qlxgbe/ql_hw.c

3611

(ha->hw.mcast[i].addr[5] == 0)) {

sys/dev/qlxgbe/ql_hw.c

3612

bcopy(mta, ha->hw.mcast[i].addr, Q8_MAC_ADDR_LEN);

sys/dev/qlxgbe/ql_hw.c

3613

ha->hw.nmcast++;

sys/dev/qlxgbe/ql_hw.c

3631

if (QL_MAC_CMP(ha->hw.mcast[i].addr, mta) == 0) {

sys/dev/qlxgbe/ql_hw.c

3632

ha->hw.mcast[i].addr[0] = 0;

sys/dev/qlxgbe/ql_hw.c

3633

ha->hw.mcast[i].addr[1] = 0;

sys/dev/qlxgbe/ql_hw.c

3634

ha->hw.mcast[i].addr[2] = 0;

sys/dev/qlxgbe/ql_hw.c

3635

ha->hw.mcast[i].addr[3] = 0;

sys/dev/qlxgbe/ql_hw.c

3636

ha->hw.mcast[i].addr[4] = 0;

sys/dev/qlxgbe/ql_hw.c

3637

ha->hw.mcast[i].addr[5] = 0;

sys/dev/qlxgbe/ql_hw.c

3639

ha->hw.nmcast--;

sys/dev/qlxgbe/ql_hw.c

366

CTLFLAG_RD, &ha->hw.mac.rcv_pkt_lt_127bytes,

sys/dev/qlxgbe/ql_hw.c

3666

mcast = ha->hw.mac_addr_arr;

sys/dev/qlxgbe/ql_hw.c

3686

if (qla_config_mac_addr(ha, ha->hw.mac_addr_arr,

sys/dev/qlxgbe/ql_hw.c

3694

qla_hw_add_mcast(ha, ha->hw.mac_addr_arr,

sys/dev/qlxgbe/ql_hw.c

3697

qla_hw_del_mcast(ha, ha->hw.mac_addr_arr,

sys/dev/qlxgbe/ql_hw.c

3702

mcast = ha->hw.mac_addr_arr;

sys/dev/qlxgbe/ql_hw.c

371

CTLFLAG_RD, &ha->hw.mac.rcv_pkt_lt_255bytes,

sys/dev/qlxgbe/ql_hw.c

3710

if (qla_config_mac_addr(ha, ha->hw.mac_addr_arr, add_mac,

sys/dev/qlxgbe/ql_hw.c

3716

qla_hw_add_mcast(ha, ha->hw.mac_addr_arr, count);

sys/dev/qlxgbe/ql_hw.c

3718

qla_hw_del_mcast(ha, ha->hw.mac_addr_arr, count);

sys/dev/qlxgbe/ql_hw.c

3733

qla_hw_t *hw = &ha->hw;

sys/dev/qlxgbe/ql_hw.c

3737

hw_tx_cntxt = &hw->tx_cntxt[txr_idx];

sys/dev/qlxgbe/ql_hw.c

376

CTLFLAG_RD, &ha->hw.mac.rcv_pkt_lt_511bytes,

sys/dev/qlxgbe/ql_hw.c

3785

prev_link_state = ha->hw.link_up;

sys/dev/qlxgbe/ql_hw.c

3797

atomic_store_rel_8(&ha->hw.link_up, (uint8_t)link_state);

sys/dev/qlxgbe/ql_hw.c

3799

if (prev_link_state != ha->hw.link_up) {

sys/dev/qlxgbe/ql_hw.c

3800

if (ha->hw.link_up) {

sys/dev/qlxgbe/ql_hw.c

381

CTLFLAG_RD, &ha->hw.mac.rcv_pkt_lt_1023bytes,

sys/dev/qlxgbe/ql_hw.c

3814

ha->hw.health_count++;

sys/dev/qlxgbe/ql_hw.c

3816

if (ha->hw.health_count < 500)

sys/dev/qlxgbe/ql_hw.c

3819

ha->hw.health_count = 0;

sys/dev/qlxgbe/ql_hw.c

3829

if (ha->hw.sp_log_stop_events & Q8_SP_LOG_STOP_TEMP_FAILURE)

sys/dev/qlxgbe/ql_hw.c

3830

ha->hw.sp_log_stop = -1;

sys/dev/qlxgbe/ql_hw.c

3838

if ((val != ha->hw.hbeat_value) &&

sys/dev/qlxgbe/ql_hw.c

3840

ha->hw.hbeat_value = val;

sys/dev/qlxgbe/ql_hw.c

3841

ha->hw.hbeat_failure = 0;

sys/dev/qlxgbe/ql_hw.c

3845

ha->hw.hbeat_failure++;

sys/dev/qlxgbe/ql_hw.c

3847

if ((ha->dbg_level & 0x8000) && (ha->hw.hbeat_failure == 1))

sys/dev/qlxgbe/ql_hw.c

3850

if (ha->hw.hbeat_failure < 2) /* we ignore the first failure */

sys/dev/qlxgbe/ql_hw.c

386

CTLFLAG_RD, &ha->hw.mac.rcv_pkt_lt_1518bytes,

sys/dev/qlxgbe/ql_hw.c

3867

if (ha->hw.sp_log_stop_events & Q8_SP_LOG_STOP_HBEAT_FAILURE)

sys/dev/qlxgbe/ql_hw.c

3868

ha->hw.sp_log_stop = -1;

sys/dev/qlxgbe/ql_hw.c

3885

init_nic = (q80_init_nic_func_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3899

ha->hw.mbox, (sizeof (q80_init_nic_func_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

3904

init_nic_rsp = (q80_init_nic_func_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

391

CTLFLAG_RD, &ha->hw.mac.rcv_pkt_gt_1518bytes,

sys/dev/qlxgbe/ql_hw.c

3928

stop_nic = (q80_stop_nic_func_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3941

ha->hw.mbox, (sizeof (q80_stop_nic_func_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

3946

stop_nic_rsp = (q80_stop_nic_func_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

396

CTLFLAG_RD, &ha->hw.mac.rcv_len_error,

sys/dev/qlxgbe/ql_hw.c

3968

fw_dcbx = (q80_query_fw_dcbx_caps_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

3978

ha->hw.mbox, (sizeof (q80_query_fw_dcbx_caps_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

3983

fw_dcbx_rsp = (q80_query_fw_dcbx_caps_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

4008

idc_ack = (q80_idc_ack_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

401

CTLFLAG_RD, &ha->hw.mac.rcv_len_small,

sys/dev/qlxgbe/ql_hw.c

4020

ha->hw.imd_compl= 0;

sys/dev/qlxgbe/ql_hw.c

4024

ha->hw.mbox, (sizeof (q80_idc_ack_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

4029

idc_ack_rsp = (q80_idc_ack_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

4038

while (count && !ha->hw.imd_compl) {

sys/dev/qlxgbe/ql_hw.c

406

CTLFLAG_RD, &ha->hw.mac.rcv_len_large,

sys/dev/qlxgbe/ql_hw.c

4062

pcfg = (q80_set_port_cfg_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

4078

ha->hw.imd_compl= 0;

sys/dev/qlxgbe/ql_hw.c

4082

ha->hw.mbox, (sizeof (q80_set_port_cfg_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

4087

pfg_rsp = (q80_set_port_cfg_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

4092

while (count && !ha->hw.imd_compl) {

sys/dev/qlxgbe/ql_hw.c

411

CTLFLAG_RD, &ha->hw.mac.rcv_jabber,

sys/dev/qlxgbe/ql_hw.c

4129

md_size = (q80_config_md_templ_size_t *) ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

4137

(sizeof(q80_config_md_templ_size_t) >> 2), ha->hw.mbox,

sys/dev/qlxgbe/ql_hw.c

4144

md_size_rsp = (q80_config_md_templ_size_rsp_t *) ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

416

CTLFLAG_RD, &ha->hw.mac.rcv_dropped,

sys/dev/qlxgbe/ql_hw.c

4168

pcfg = (q80_get_port_cfg_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

4177

ha->hw.mbox, (sizeof (q80_get_port_cfg_rsp_t) >> 2), 0)) {

sys/dev/qlxgbe/ql_hw.c

4182

pcfg_rsp = (q80_get_port_cfg_rsp_t *)ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

421

CTLFLAG_RD, &ha->hw.mac.fcs_error,

sys/dev/qlxgbe/ql_hw.c

426

CTLFLAG_RD, &ha->hw.mac.align_error,

sys/dev/qlxgbe/ql_hw.c

4283

switch (ha->hw.aen_mb0) {

sys/dev/qlxgbe/ql_hw.c

4285

(void)qla_idc_ack(ha, ha->hw.aen_mb1, ha->hw.aen_mb2,

sys/dev/qlxgbe/ql_hw.c

4286

ha->hw.aen_mb3, ha->hw.aen_mb4);

sys/dev/qlxgbe/ql_hw.c

4306

md_templ = (q80_config_md_templ_cmd_t *) ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

431

CTLFLAG_RD, &ha->hw.mac.eswitched_frames,

sys/dev/qlxgbe/ql_hw.c

4313

md_templ->buf_addr = ha->hw.dma_buf.minidump.dma_addr;

sys/dev/qlxgbe/ql_hw.c

4314

md_templ->buff_size = ha->hw.dma_buf.minidump.size;

sys/dev/qlxgbe/ql_hw.c

4318

ha->hw.mbox,

sys/dev/qlxgbe/ql_hw.c

4325

md_templ_rsp = (q80_config_md_templ_cmd_rsp_t *) ha->hw.mbox;

sys/dev/qlxgbe/ql_hw.c

436

CTLFLAG_RD, &ha->hw.mac.eswitched_bytes,

sys/dev/qlxgbe/ql_hw.c

4400

hdr = (ql_minidump_template_hdr_t *)ha->hw.dma_buf.minidump.dma_b;

sys/dev/qlxgbe/ql_hw.c

4405

if (i & ha->hw.mdump_capture_mask)

sys/dev/qlxgbe/ql_hw.c

441

CTLFLAG_RD, &ha->hw.mac.eswitched_mcast_frames,

sys/dev/qlxgbe/ql_hw.c

4415

if (ha->hw.mdump_buffer != NULL) {

sys/dev/qlxgbe/ql_hw.c

4416

free(ha->hw.mdump_buffer, M_QLA83XXBUF);

sys/dev/qlxgbe/ql_hw.c

4417

ha->hw.mdump_buffer = NULL;

sys/dev/qlxgbe/ql_hw.c

4418

ha->hw.mdump_buffer_size = 0;

sys/dev/qlxgbe/ql_hw.c

4426

ha->hw.mdump_buffer_size = ql_minidump_size(ha);

sys/dev/qlxgbe/ql_hw.c

4428

if (!ha->hw.mdump_buffer_size)

sys/dev/qlxgbe/ql_hw.c

4431

ha->hw.mdump_buffer = malloc(ha->hw.mdump_buffer_size, M_QLA83XXBUF,

sys/dev/qlxgbe/ql_hw.c

4434

if (ha->hw.mdump_buffer == NULL)

sys/dev/qlxgbe/ql_hw.c

4443

if (ha->hw.mdump_template != NULL) {

sys/dev/qlxgbe/ql_hw.c

4444

free(ha->hw.mdump_template, M_QLA83XXBUF);

sys/dev/qlxgbe/ql_hw.c

4445

ha->hw.mdump_template = NULL;

sys/dev/qlxgbe/ql_hw.c

4446

ha->hw.mdump_template_size = 0;

sys/dev/qlxgbe/ql_hw.c

4454

ha->hw.mdump_template_size = ha->hw.dma_buf.minidump.size;

sys/dev/qlxgbe/ql_hw.c

4456

ha->hw.mdump_template = malloc(ha->hw.mdump_template_size,

sys/dev/qlxgbe/ql_hw.c

4459

if (ha->hw.mdump_template == NULL)

sys/dev/qlxgbe/ql_hw.c

446

CTLFLAG_RD, &ha->hw.mac.eswitched_bcast_frames,

sys/dev/qlxgbe/ql_hw.c

4490

count = ha->hw.dma_buf.minidump.size / sizeof (uint32_t);

sys/dev/qlxgbe/ql_hw.c

4491

template_buff = ha->hw.dma_buf.minidump.dma_b;

sys/dev/qlxgbe/ql_hw.c

451

CTLFLAG_RD, &ha->hw.mac.eswitched_ucast_frames,

sys/dev/qlxgbe/ql_hw.c

4526

ha->hw.dma_buf.minidump.alignment = 8;

sys/dev/qlxgbe/ql_hw.c

4527

ha->hw.dma_buf.minidump.size = template_size;

sys/dev/qlxgbe/ql_hw.c

4530

if (ql_alloc_dmabuf(ha, &ha->hw.dma_buf.minidump)) {

sys/dev/qlxgbe/ql_hw.c

4535

ha->hw.dma_buf.flags.minidump = 1;

sys/dev/qlxgbe/ql_hw.c

4542

ha->hw.dma_buf.minidump.dma_b = ql83xx_minidump;

sys/dev/qlxgbe/ql_hw.c

4553

ha->hw.mdump_init = 1;

sys/dev/qlxgbe/ql_hw.c

456

CTLFLAG_RD, &ha->hw.mac.eswitched_err_free_frames,

sys/dev/qlxgbe/ql_hw.c

4576

ha->hw.mdump_init = 0;

sys/dev/qlxgbe/ql_hw.c

4577

if (ha->hw.dma_buf.flags.minidump) {

sys/dev/qlxgbe/ql_hw.c

4578

ha->hw.dma_buf.flags.minidump = 0;

sys/dev/qlxgbe/ql_hw.c

4579

ql_free_dmabuf(ha, &ha->hw.dma_buf.minidump);

sys/dev/qlxgbe/ql_hw.c

4591

if (!ha->hw.mdump_init)

sys/dev/qlxgbe/ql_hw.c

4594

if (ha->hw.mdump_done)

sys/dev/qlxgbe/ql_hw.c

4596

ha->hw.mdump_usec_ts = qla_get_usec_timestamp();

sys/dev/qlxgbe/ql_hw.c

4597

ha->hw.mdump_start_seq_index = ql_stop_sequence(ha);

sys/dev/qlxgbe/ql_hw.c

4599

bzero(ha->hw.mdump_buffer, ha->hw.mdump_buffer_size);

sys/dev/qlxgbe/ql_hw.c

4600

bzero(ha->hw.mdump_template, ha->hw.mdump_template_size);

sys/dev/qlxgbe/ql_hw.c

4602

bcopy(ha->hw.dma_buf.minidump.dma_b, ha->hw.mdump_template,

sys/dev/qlxgbe/ql_hw.c

4603

ha->hw.mdump_template_size);

sys/dev/qlxgbe/ql_hw.c

4607

ql_start_sequence(ha, ha->hw.mdump_start_seq_index);

sys/dev/qlxgbe/ql_hw.c

4609

ha->hw.mdump_done = 1;

sys/dev/qlxgbe/ql_hw.c

461

CTLFLAG_RD, &ha->hw.mac.eswitched_err_free_bytes,

sys/dev/qlxgbe/ql_hw.c

4640

template_hdr = (ql_minidump_template_hdr_t *)ha->hw.mdump_template;

sys/dev/qlxgbe/ql_hw.c

4645

dump_buff = (char *) ha->hw.mdump_buffer;

sys/dev/qlxgbe/ql_hw.c

4656

capture_mask = ha->hw.mdump_capture_mask;

sys/dev/qlxgbe/ql_hw.c

4657

dump_size = ha->hw.mdump_buffer_size;

sys/dev/qlxgbe/ql_hw.c

483

CTLFLAG_RD, &ha->hw.rcv.total_bytes,

sys/dev/qlxgbe/ql_hw.c

488

CTLFLAG_RD, &ha->hw.rcv.total_pkts,

sys/dev/qlxgbe/ql_hw.c

493

CTLFLAG_RD, &ha->hw.rcv.lro_pkt_count,

sys/dev/qlxgbe/ql_hw.c

498

CTLFLAG_RD, &ha->hw.rcv.sw_pkt_count,

sys/dev/qlxgbe/ql_hw.c

503

CTLFLAG_RD, &ha->hw.rcv.ip_chksum_err,

sys/dev/qlxgbe/ql_hw.c

508

CTLFLAG_RD, &ha->hw.rcv.pkts_wo_acntxts,

sys/dev/qlxgbe/ql_hw.c

513

CTLFLAG_RD, &ha->hw.rcv.pkts_dropped_no_sds_card,

sys/dev/qlxgbe/ql_hw.c

518

CTLFLAG_RD, &ha->hw.rcv.pkts_dropped_no_sds_host,

sys/dev/qlxgbe/ql_hw.c

523

CTLFLAG_RD, &ha->hw.rcv.oversized_pkts,

sys/dev/qlxgbe/ql_hw.c

528

CTLFLAG_RD, &ha->hw.rcv.pkts_dropped_no_rds,

sys/dev/qlxgbe/ql_hw.c

533

CTLFLAG_RD, &ha->hw.rcv.unxpctd_mcast_pkts,

sys/dev/qlxgbe/ql_hw.c

538

CTLFLAG_RD, &ha->hw.rcv.re1_fbq_error,

sys/dev/qlxgbe/ql_hw.c

543

CTLFLAG_RD, &ha->hw.rcv.invalid_mac_addr,

sys/dev/qlxgbe/ql_hw.c

548

CTLFLAG_RD, &ha->hw.rcv.rds_prime_trys,

sys/dev/qlxgbe/ql_hw.c

553

CTLFLAG_RD, &ha->hw.rcv.rds_prime_success,

sys/dev/qlxgbe/ql_hw.c

558

CTLFLAG_RD, &ha->hw.rcv.lro_flows_added,

sys/dev/qlxgbe/ql_hw.c

563

CTLFLAG_RD, &ha->hw.rcv.lro_flows_deleted,

sys/dev/qlxgbe/ql_hw.c

568

CTLFLAG_RD, &ha->hw.rcv.lro_flows_active,

sys/dev/qlxgbe/ql_hw.c

573

CTLFLAG_RD, &ha->hw.rcv.pkts_droped_unknown,

sys/dev/qlxgbe/ql_hw.c

578

CTLFLAG_RD, &ha->hw.rcv.pkts_cnt_oversized,

sys/dev/qlxgbe/ql_hw.c

601

for (i = 0; i < ha->hw.num_tx_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

613

CTLFLAG_RD, &ha->hw.xmt[i].total_bytes,

sys/dev/qlxgbe/ql_hw.c

618

CTLFLAG_RD, &ha->hw.xmt[i].total_pkts,

sys/dev/qlxgbe/ql_hw.c

623

CTLFLAG_RD, &ha->hw.xmt[i].errors,

sys/dev/qlxgbe/ql_hw.c

628

CTLFLAG_RD, &ha->hw.xmt[i].pkts_dropped,

sys/dev/qlxgbe/ql_hw.c

633

CTLFLAG_RD, &ha->hw.xmt[i].switch_pkts,

sys/dev/qlxgbe/ql_hw.c

638

CTLFLAG_RD, &ha->hw.xmt[i].num_buffers,

sys/dev/qlxgbe/ql_hw.c

656

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[0],

sys/dev/qlxgbe/ql_hw.c

661

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[1],

sys/dev/qlxgbe/ql_hw.c

666

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[2],

sys/dev/qlxgbe/ql_hw.c

671

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[3],

sys/dev/qlxgbe/ql_hw.c

676

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[4],

sys/dev/qlxgbe/ql_hw.c

681

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[5],

sys/dev/qlxgbe/ql_hw.c

686

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[6],

sys/dev/qlxgbe/ql_hw.c

691

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[7],

sys/dev/qlxgbe/ql_hw.c

696

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[8],

sys/dev/qlxgbe/ql_hw.c

701

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[9],

sys/dev/qlxgbe/ql_hw.c

706

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[10],

sys/dev/qlxgbe/ql_hw.c

711

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[11],

sys/dev/qlxgbe/ql_hw.c

716

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[12],

sys/dev/qlxgbe/ql_hw.c

721

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[13],

sys/dev/qlxgbe/ql_hw.c

726

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[14],

sys/dev/qlxgbe/ql_hw.c

731

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[15],

sys/dev/qlxgbe/ql_hw.c

736

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[16],

sys/dev/qlxgbe/ql_hw.c

741

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[17],

sys/dev/qlxgbe/ql_hw.c

746

CTLFLAG_RD, &ha->hw.mbx_comp_msecs[18],

sys/dev/qlxgbe/ql_hw.c

779

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

789

CTLFLAG_RD, &ha->hw.sds[i].intr_count,

sys/dev/qlxgbe/ql_hw.c

794

CTLFLAG_RD, &ha->hw.sds[i].rx_free,

sys/dev/qlxgbe/ql_hw.c

795

ha->hw.sds[i].rx_free, "rx_free");

sys/dev/qlxgbe/ql_hw.c

817

for (i = 0; i < ha->hw.num_rds_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

827

CTLFLAG_RD, &ha->hw.rds[i].count,

sys/dev/qlxgbe/ql_hw.c

832

CTLFLAG_RD, &ha->hw.rds[i].lro_pkt_count,

sys/dev/qlxgbe/ql_hw.c

837

CTLFLAG_RD, &ha->hw.rds[i].lro_bytes,

sys/dev/qlxgbe/ql_hw.c

861

for (i = 0; i < ha->hw.num_tx_rings; i++) {

sys/dev/qlxgbe/ql_hw.c

907

OID_AUTO, "num_rds_rings", CTLFLAG_RD, &ha->hw.num_rds_rings,

sys/dev/qlxgbe/ql_hw.c

908

ha->hw.num_rds_rings, "Number of Rcv Descriptor Rings");

sys/dev/qlxgbe/ql_hw.c

912

OID_AUTO, "num_sds_rings", CTLFLAG_RD, &ha->hw.num_sds_rings,

sys/dev/qlxgbe/ql_hw.c

913

ha->hw.num_sds_rings, "Number of Status Descriptor Rings");

sys/dev/qlxgbe/ql_hw.c

917

OID_AUTO, "num_tx_rings", CTLFLAG_RD, &ha->hw.num_tx_rings,

sys/dev/qlxgbe/ql_hw.c

918

ha->hw.num_tx_rings, "Number of Transmit Rings");

sys/dev/qlxgbe/ql_hw.c

927

OID_AUTO, "max_tx_segs", CTLFLAG_RD, &ha->hw.max_tx_segs,

sys/dev/qlxgbe/ql_hw.c

928

ha->hw.max_tx_segs, "Max # of Segments in a non-TSO pkt");

sys/dev/qlxgbe/ql_hw.c

930

ha->hw.sds_cidx_thres = 32;

sys/dev/qlxgbe/ql_hw.c

933

OID_AUTO, "sds_cidx_thres", CTLFLAG_RW, &ha->hw.sds_cidx_thres,

sys/dev/qlxgbe/ql_hw.c

934

ha->hw.sds_cidx_thres,

sys/dev/qlxgbe/ql_hw.c

938

ha->hw.rds_pidx_thres = 32;

sys/dev/qlxgbe/ql_hw.c

941

OID_AUTO, "rds_pidx_thres", CTLFLAG_RW, &ha->hw.rds_pidx_thres,

sys/dev/qlxgbe/ql_hw.c

942

ha->hw.rds_pidx_thres,

sys/dev/qlxgbe/ql_hw.c

946

ha->hw.rcv_intr_coalesce = (3 << 16) | 256;

sys/dev/qlxgbe/ql_hw.c

950

&ha->hw.rcv_intr_coalesce,

sys/dev/qlxgbe/ql_hw.c

951

ha->hw.rcv_intr_coalesce,

sys/dev/qlxgbe/ql_hw.c

959

ha->hw.xmt_intr_coalesce = (64 << 16) | 64;

sys/dev/qlxgbe/ql_hw.c

963

&ha->hw.xmt_intr_coalesce,

sys/dev/qlxgbe/ql_hw.c

964

ha->hw.xmt_intr_coalesce,

sys/dev/qlxgbe/ql_hw.h

1719

WRITE_REG32(ha, ha->hw.tx_cntxt[i].tx_prod_reg, val)

sys/dev/qlxgbe/ql_hw.h

1722

bus_write_4((ha->pci_reg), (ha->hw.sds[i].sds_consumer), val);

sys/dev/qlxgbe/ql_hw.h

1725

bus_write_4((ha->pci_reg), (ha->hw.intr_src[i]), 0);

sys/dev/qlxgbe/ql_inline.h

107

if ((ha->hw.module_type == 0x4) ||

sys/dev/qlxgbe/ql_inline.h

108

(ha->hw.module_type == 0x5) ||

sys/dev/qlxgbe/ql_inline.h

109

(ha->hw.module_type == 0x6))

sys/dev/qlxgbe/ql_inline.h

122

return (ha->hw.mac_addr);

sys/dev/qlxgbe/ql_inline.h

131

rcv_desc = (q80_recv_desc_t *)ha->hw.dma_buf.rds_ring[r_idx].dma_b;

sys/dev/qlxgbe/ql_inline.h

147

for (i = 0; i < ha->hw.num_rds_rings; i++)

sys/dev/qlxgbe/ql_inline.h

148

bzero((void *)ha->hw.dma_buf.rds_ring[i].dma_b,

sys/dev/qlxgbe/ql_ioctl.c

129

if (!ha->hw.flags.fdt_valid) {

sys/dev/qlxgbe/ql_ioctl.c

153

if (!ha->hw.flags.fdt_valid) {

sys/dev/qlxgbe/ql_ioctl.c

180

if (!ha->hw.flags.fdt_valid) {

sys/dev/qlxgbe/ql_ioctl.c

210

if (ha->hw.mdump_init == 0) {

sys/dev/qlxgbe/ql_ioctl.c

216

fw_dump->minidump_size = ha->hw.mdump_buffer_size +

sys/dev/qlxgbe/ql_ioctl.c

217

ha->hw.mdump_template_size;

sys/dev/qlxgbe/ql_ioctl.c

224

if (ha->hw.mdump_init == 0) {

sys/dev/qlxgbe/ql_ioctl.c

233

(fw_dump->minidump_size != (ha->hw.mdump_buffer_size +

sys/dev/qlxgbe/ql_ioctl.c

234

ha->hw.mdump_template_size))) {

sys/dev/qlxgbe/ql_ioctl.c

238

(ha->hw.mdump_buffer_size + ha->hw.mdump_template_size));

sys/dev/qlxgbe/ql_ioctl.c

256

fw_dump->usec_ts = ha->hw.mdump_usec_ts;

sys/dev/qlxgbe/ql_ioctl.c

258

if (!ha->hw.mdump_done) {

sys/dev/qlxgbe/ql_ioctl.c

267

if (!ha->hw.mdump_done) {

sys/dev/qlxgbe/ql_ioctl.c

286

if (ha->hw.mdump_done)

sys/dev/qlxgbe/ql_ioctl.c

292

if (!ha->hw.mdump_done) {

sys/dev/qlxgbe/ql_ioctl.c

298

fw_dump->usec_ts = ha->hw.mdump_usec_ts;

sys/dev/qlxgbe/ql_ioctl.c

301

ha->hw.mdump_done = 0;

sys/dev/qlxgbe/ql_ioctl.c

310

if ((rval = copyout(ha->hw.mdump_template,

sys/dev/qlxgbe/ql_ioctl.c

311

fw_dump->minidump, ha->hw.mdump_template_size))) {

sys/dev/qlxgbe/ql_ioctl.c

317

if ((rval = copyout(ha->hw.mdump_buffer,

sys/dev/qlxgbe/ql_ioctl.c

319

ha->hw.mdump_template_size),

sys/dev/qlxgbe/ql_ioctl.c

320

ha->hw.mdump_buffer_size))) {

sys/dev/qlxgbe/ql_ioctl.c

366

if (ha->hw.drvr_state == NULL)

sys/dev/qlxgbe/ql_ioctl.c

371

rval = copyout(ha->hw.drvr_state, state->buffer, drvr_state_size);

sys/dev/qlxgbe/ql_ioctl.c

373

bzero(ha->hw.drvr_state, drvr_state_size);

sys/dev/qlxgbe/ql_ioctl.c

387

size = ha->hw.num_tx_rings * (sizeof (qla_drvr_state_tx_t));

sys/dev/qlxgbe/ql_ioctl.c

390

size = ha->hw.num_rds_rings * (sizeof (qla_drvr_state_rx_t));

sys/dev/qlxgbe/ql_ioctl.c

393

size = ha->hw.num_sds_rings * (sizeof (qla_drvr_state_sds_t));

sys/dev/qlxgbe/ql_ioctl.c

396

size = sizeof(q80_tx_cmd_t) * NUM_TX_DESCRIPTORS * ha->hw.num_tx_rings;

sys/dev/qlxgbe/ql_ioctl.c

399

size = sizeof(q80_recv_desc_t) * NUM_RX_DESCRIPTORS * ha->hw.num_rds_rings;

sys/dev/qlxgbe/ql_ioctl.c

403

ha->hw.num_sds_rings;

sys/dev/qlxgbe/ql_ioctl.c

414

for (i = 0; i < ha->hw.num_tx_rings; i++) {

sys/dev/qlxgbe/ql_ioctl.c

415

tx_state->base_p_addr = ha->hw.tx_cntxt[i].tx_ring_paddr;

sys/dev/qlxgbe/ql_ioctl.c

416

tx_state->cons_p_addr = ha->hw.tx_cntxt[i].tx_cons_paddr;

sys/dev/qlxgbe/ql_ioctl.c

417

tx_state->tx_prod_reg = ha->hw.tx_cntxt[i].tx_prod_reg;

sys/dev/qlxgbe/ql_ioctl.c

418

tx_state->tx_cntxt_id = ha->hw.tx_cntxt[i].tx_cntxt_id;

sys/dev/qlxgbe/ql_ioctl.c

419

tx_state->txr_free = ha->hw.tx_cntxt[i].txr_free;

sys/dev/qlxgbe/ql_ioctl.c

420

tx_state->txr_next = ha->hw.tx_cntxt[i].txr_next;

sys/dev/qlxgbe/ql_ioctl.c

421

tx_state->txr_comp = ha->hw.tx_cntxt[i].txr_comp;

sys/dev/qlxgbe/ql_ioctl.c

432

for (i = 0; i < ha->hw.num_rds_rings; i++) {

sys/dev/qlxgbe/ql_ioctl.c

433

rx_state->prod_std = ha->hw.rds[i].prod_std;

sys/dev/qlxgbe/ql_ioctl.c

434

rx_state->rx_next = ha->hw.rds[i].rx_next;

sys/dev/qlxgbe/ql_ioctl.c

445

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_ioctl.c

446

sds_state->sdsr_next = ha->hw.sds[i].sdsr_next;

sys/dev/qlxgbe/ql_ioctl.c

447

sds_state->sds_consumer = ha->hw.sds[i].sds_consumer;

sys/dev/qlxgbe/ql_ioctl.c

462

state_buffer = ha->hw.drvr_state;

sys/dev/qlxgbe/ql_ioctl.c

482

bcopy(ha->hw.mac_addr, hdr->mac_addr, ETHER_ADDR_LEN);

sys/dev/qlxgbe/ql_ioctl.c

484

hdr->link_speed = ha->hw.link_speed;

sys/dev/qlxgbe/ql_ioctl.c

485

hdr->cable_length = ha->hw.cable_length;

sys/dev/qlxgbe/ql_ioctl.c

486

hdr->cable_oui = ha->hw.cable_oui;

sys/dev/qlxgbe/ql_ioctl.c

487

hdr->link_up = ha->hw.link_up;

sys/dev/qlxgbe/ql_ioctl.c

488

hdr->module_type = ha->hw.module_type;

sys/dev/qlxgbe/ql_ioctl.c

489

hdr->link_faults = ha->hw.link_faults;

sys/dev/qlxgbe/ql_ioctl.c

490

hdr->rcv_intr_coalesce = ha->hw.rcv_intr_coalesce;

sys/dev/qlxgbe/ql_ioctl.c

491

hdr->xmt_intr_coalesce = ha->hw.xmt_intr_coalesce;

sys/dev/qlxgbe/ql_ioctl.c

500

size = ha->hw.num_tx_rings * (sizeof (qla_drvr_state_tx_t));

sys/dev/qlxgbe/ql_ioctl.c

506

size = ha->hw.num_rds_rings * (sizeof (qla_drvr_state_rx_t));

sys/dev/qlxgbe/ql_ioctl.c

512

size = ha->hw.num_sds_rings * (sizeof (qla_drvr_state_sds_t));

sys/dev/qlxgbe/ql_ioctl.c

516

hdr->num_tx_rings = ha->hw.num_tx_rings;

sys/dev/qlxgbe/ql_ioctl.c

521

bcopy(ha->hw.dma_buf.tx_ring.dma_b, ptr, size);

sys/dev/qlxgbe/ql_ioctl.c

528

hdr->num_rx_rings = ha->hw.num_rds_rings;

sys/dev/qlxgbe/ql_ioctl.c

530

for (i = 0; i < ha->hw.num_rds_rings; i++) {

sys/dev/qlxgbe/ql_ioctl.c

531

bcopy(ha->hw.dma_buf.rds_ring[i].dma_b, ptr, hdr->rxr_size);

sys/dev/qlxgbe/ql_ioctl.c

539

hdr->num_sds_rings = ha->hw.num_sds_rings;

sys/dev/qlxgbe/ql_ioctl.c

542

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_ioctl.c

543

bcopy(ha->hw.dma_buf.sds_ring[i].dma_b, ptr, hdr->sds_ring_size);

sys/dev/qlxgbe/ql_ioctl.c

556

ha->hw.drvr_state = malloc(drvr_state_size, M_QLA83XXBUF, M_NOWAIT);

sys/dev/qlxgbe/ql_ioctl.c

558

if (ha->hw.drvr_state != NULL)

sys/dev/qlxgbe/ql_ioctl.c

559

bzero(ha->hw.drvr_state, drvr_state_size);

sys/dev/qlxgbe/ql_ioctl.c

567

if (ha->hw.drvr_state != NULL)

sys/dev/qlxgbe/ql_ioctl.c

568

free(ha->hw.drvr_state, M_QLA83XXBUF);

sys/dev/qlxgbe/ql_ioctl.c

579

if (((sp_log = ha->hw.sp_log) == NULL) || ha->hw.sp_log_stop)

sys/dev/qlxgbe/ql_ioctl.c

584

sp_e = &sp_log[ha->hw.sp_log_index];

sys/dev/qlxgbe/ql_ioctl.c

599

ha->hw.sp_log_index = (ha->hw.sp_log_index + 1) & (NUM_LOG_ENTRIES - 1);

sys/dev/qlxgbe/ql_ioctl.c

601

if (ha->hw.sp_log_num_entries < NUM_LOG_ENTRIES)

sys/dev/qlxgbe/ql_ioctl.c

602

ha->hw.sp_log_num_entries++;

sys/dev/qlxgbe/ql_ioctl.c

616

ha->hw.sp_log = malloc(size, M_QLA83XXBUF, M_NOWAIT);

sys/dev/qlxgbe/ql_ioctl.c

618

if (ha->hw.sp_log != NULL)

sys/dev/qlxgbe/ql_ioctl.c

619

bzero(ha->hw.sp_log, size);

sys/dev/qlxgbe/ql_ioctl.c

621

ha->hw.sp_log_index = 0;

sys/dev/qlxgbe/ql_ioctl.c

622

ha->hw.sp_log_num_entries = 0;

sys/dev/qlxgbe/ql_ioctl.c

630

if (ha->hw.sp_log != NULL)

sys/dev/qlxgbe/ql_ioctl.c

631

free(ha->hw.sp_log, M_QLA83XXBUF);

sys/dev/qlxgbe/ql_ioctl.c

641

if ((ha->hw.sp_log == NULL) || (log->buffer == NULL))

sys/dev/qlxgbe/ql_ioctl.c

648

rval = copyout(ha->hw.sp_log, log->buffer, size);

sys/dev/qlxgbe/ql_ioctl.c

651

log->next_idx = ha->hw.sp_log_index;

sys/dev/qlxgbe/ql_ioctl.c

652

log->num_entries = ha->hw.sp_log_num_entries;

sys/dev/qlxgbe/ql_isr.c

169

if (ha->hw.enable_soft_lro)

sys/dev/qlxgbe/ql_isr.c

204

if (ha->hw.num_rds_rings > 1)

sys/dev/qlxgbe/ql_isr.c

207

ha->hw.rds[r_idx].count++;

sys/dev/qlxgbe/ql_isr.c

211

ha->hw.rds[r_idx].lro_pkt_count++;

sys/dev/qlxgbe/ql_isr.c

213

sdsp = &ha->hw.sds[sds_idx];

sys/dev/qlxgbe/ql_isr.c

222

ha->hw.rds[r_idx].lro_bytes += pkt_length;

sys/dev/qlxgbe/ql_isr.c

368

&ha->hw.sds[sds_idx].sds_ring_base[comp_idx];

sys/dev/qlxgbe/ql_isr.c

467

qla_hw_t *hw;

sys/dev/qlxgbe/ql_isr.c

478

hw = &ha->hw;

sys/dev/qlxgbe/ql_isr.c

480

hw->sds[sds_idx].rcv_active = 1;

sys/dev/qlxgbe/ql_isr.c

482

hw->sds[sds_idx].rcv_active = 0;

sys/dev/qlxgbe/ql_isr.c

491

comp_idx = hw->sds[sds_idx].sdsr_next;

sys/dev/qlxgbe/ql_isr.c

495

&hw->sds[sds_idx].sds_ring_base[comp_idx];

sys/dev/qlxgbe/ql_isr.c

536

&hw->sds[sds_idx].sds_ring_base[c_idx];

sys/dev/qlxgbe/ql_isr.c

599

&hw->sds[sds_idx].sds_ring_base[c_idx];

sys/dev/qlxgbe/ql_isr.c

699

&hw->sds[sds_idx].sds_ring_base[comp_idx];

sys/dev/qlxgbe/ql_isr.c

702

if (sds_replenish_threshold > ha->hw.sds_cidx_thres) {

sys/dev/qlxgbe/ql_isr.c

704

if (hw->sds[sds_idx].sdsr_next != comp_idx) {

sys/dev/qlxgbe/ql_isr.c

708

hw->sds[sds_idx].sdsr_next = comp_idx;

sys/dev/qlxgbe/ql_isr.c

713

if (ha->hw.enable_soft_lro) {

sys/dev/qlxgbe/ql_isr.c

716

lro = &ha->hw.sds[sds_idx].lro;

sys/dev/qlxgbe/ql_isr.c

72

lro = &ha->hw.sds[sds_idx].lro;

sys/dev/qlxgbe/ql_isr.c

724

if (hw->sds[sds_idx].sdsr_next != comp_idx) {

sys/dev/qlxgbe/ql_isr.c

726

hw->sds[sds_idx].sdsr_next = comp_idx;

sys/dev/qlxgbe/ql_isr.c

728

if (ha->hw.num_rds_rings > 1)

sys/dev/qlxgbe/ql_isr.c

731

sdsp = &ha->hw.sds[sds_idx];

sys/dev/qlxgbe/ql_isr.c

737

sdesc = (q80_stat_desc_t *)&hw->sds[sds_idx].sds_ring_base[comp_idx];

sys/dev/qlxgbe/ql_isr.c

744

hw->sds[sds_idx].rcv_active = 0;

sys/dev/qlxgbe/ql_isr.c

75

if (ha->hw.num_rds_rings > 1)

sys/dev/qlxgbe/ql_isr.c

765

WRITE_REG32(ha, ha->hw.mbx_intr_mask_offset, 0);

sys/dev/qlxgbe/ql_isr.c

779

ha->hw.cable_oui = READ_REG32(ha, (Q8_FW_MBOX0 + 4));

sys/dev/qlxgbe/ql_isr.c

78

ha->hw.rds[r_idx].count++;

sys/dev/qlxgbe/ql_isr.c

782

ha->hw.cable_length = data & 0xFFFF;

sys/dev/qlxgbe/ql_isr.c

785

ha->hw.link_speed = data & 0xFFF;

sys/dev/qlxgbe/ql_isr.c

789

prev_link_state = ha->hw.link_up;

sys/dev/qlxgbe/ql_isr.c

792

atomic_store_rel_8(&ha->hw.link_up, (uint8_t)data);

sys/dev/qlxgbe/ql_isr.c

798

if (prev_link_state != ha->hw.link_up) {

sys/dev/qlxgbe/ql_isr.c

799

if (ha->hw.link_up)

sys/dev/qlxgbe/ql_isr.c

80

sdsp = &ha->hw.sds[sds_idx];

sys/dev/qlxgbe/ql_isr.c

805

ha->hw.module_type = ((data >> 8) & 0xFF);

sys/dev/qlxgbe/ql_isr.c

806

ha->hw.fduplex = (((data & 0xFF0000) == 0) ? 0 : 1);

sys/dev/qlxgbe/ql_isr.c

807

ha->hw.autoneg = (((data & 0xFF000000) == 0) ? 0 : 1);

sys/dev/qlxgbe/ql_isr.c

810

ha->hw.loopback_mode = data & 0x03;

sys/dev/qlxgbe/ql_isr.c

812

ha->hw.link_faults = (data >> 3) & 0xFF;

sys/dev/qlxgbe/ql_isr.c

818

ha->hw.imd_compl=1;

sys/dev/qlxgbe/ql_isr.c

823

ha->hw.aen_mb0 = 0x8101;

sys/dev/qlxgbe/ql_isr.c

824

ha->hw.aen_mb1 = READ_REG32(ha, (Q8_FW_MBOX0 + 4));

sys/dev/qlxgbe/ql_isr.c

825

ha->hw.aen_mb2 = READ_REG32(ha, (Q8_FW_MBOX0 + 8));

sys/dev/qlxgbe/ql_isr.c

826

ha->hw.aen_mb3 = READ_REG32(ha, (Q8_FW_MBOX0 + 12));

sys/dev/qlxgbe/ql_isr.c

827

ha->hw.aen_mb4 = READ_REG32(ha, (Q8_FW_MBOX0 + 16));

sys/dev/qlxgbe/ql_isr.c

829

__func__, data, ha->hw.aen_mb1, ha->hw.aen_mb2,

sys/dev/qlxgbe/ql_isr.c

830

ha->hw.aen_mb3, ha->hw.aen_mb4);

sys/dev/qlxgbe/ql_isr.c

882

WRITE_REG32(ha, ha->hw.mbx_intr_mask_offset, 0x0);

sys/dev/qlxgbe/ql_isr.c

895

uint32_t replenish_thresh = ha->hw.rds_pidx_thres;

sys/dev/qlxgbe/ql_isr.c

897

rdesc = &ha->hw.rds[r_idx];

sys/dev/qlxgbe/ql_isr.c

936

replenish_thresh = ha->hw.rds_pidx_thres;

sys/dev/qlxgbe/ql_isr.c

952

qla_hw_t *hw;

sys/dev/qlxgbe/ql_isr.c

957

hw = &ha->hw;

sys/dev/qlxgbe/ql_isr.c

960

if ((idx = ivec->sds_idx) >= ha->hw.num_sds_rings)

sys/dev/qlxgbe/ql_isr.c

964

hw->sds[idx].intr_count++;

sys/dev/qlxgbe/ql_misc.c

1044

ha->hw.rst_seq[ha->hw.rst_seq_idx++] = value;

sys/dev/qlxgbe/ql_misc.c

1045

if (ha->hw.rst_seq_idx == Q8_MAX_RESET_SEQ_IDX)

sys/dev/qlxgbe/ql_misc.c

1046

ha->hw.rst_seq_idx = 1;

sys/dev/qlxgbe/ql_misc.c

1065

value = ha->hw.rst_seq[hdr->index_a];

sys/dev/qlxgbe/ql_misc.c

1275

bzero(ha->hw.rst_seq, sizeof (ha->hw.rst_seq));

sys/dev/qlxgbe/ql_misc.c

1337

bzero(ha->hw.rst_seq, sizeof (ha->hw.rst_seq));

sys/dev/qlxgbe/ql_misc.c

1366

bzero(ha->hw.rst_seq, sizeof (ha->hw.rst_seq));

sys/dev/qlxgbe/ql_misc.c

259

qla_hw_t *hw;

sys/dev/qlxgbe/ql_misc.c

261

hw = &ha->hw;

sys/dev/qlxgbe/ql_misc.c

265

(uint32_t *)&hw->fdt + (count >> 2))) {

sys/dev/qlxgbe/ql_misc.c

342

if (hw->fdt.flash_manuf == data32)

sys/dev/qlxgbe/ql_misc.c

354

data32 = Q8_WR_ENABLE_FL_ADDR | ha->hw.fdt.write_statusreg_cmd;

sys/dev/qlxgbe/ql_misc.c

363

data32 = ha->hw.fdt.write_enable_bits;

sys/dev/qlxgbe/ql_misc.c

365

data32 = ha->hw.fdt.write_disable_bits;

sys/dev/qlxgbe/ql_misc.c

449

data32 = Q8_ERASE_FL_ADDR_MASK | ha->hw.fdt.erase_cmd;

sys/dev/qlxgbe/ql_misc.c

791

ha->hw.flags.fdt_valid = 1;

sys/dev/qlxgbe/ql_misc.c

797

if (ha->hw.sp_log_stop_events & Q8_SP_LOG_STOP_HW_INIT_FAILURE)

sys/dev/qlxgbe/ql_misc.c

798

ha->hw.sp_log_stop = -1;

sys/dev/qlxgbe/ql_misc.c

820

ha->hw.mac_addr[5] = macp[0];

sys/dev/qlxgbe/ql_misc.c

821

ha->hw.mac_addr[4] = macp[1];

sys/dev/qlxgbe/ql_misc.c

822

ha->hw.mac_addr[3] = macp[2];

sys/dev/qlxgbe/ql_misc.c

823

ha->hw.mac_addr[2] = macp[3];

sys/dev/qlxgbe/ql_misc.c

826

ha->hw.mac_addr[1] = macp[0];

sys/dev/qlxgbe/ql_misc.c

827

ha->hw.mac_addr[0] = macp[1];

sys/dev/qlxgbe/ql_os.c

1241

if (ha->hw.link_up) {

sys/dev/qlxgbe/ql_os.c

1247

(ha->hw.link_up ? "link_up" : "link_down")));

sys/dev/qlxgbe/ql_os.c

1265

tx_idx = ha->hw.tx_cntxt[txr_idx].txr_next;

sys/dev/qlxgbe/ql_os.c

1427

if (!(if_getdrvflags(ifp) & IFF_DRV_RUNNING) || (!ha->hw.link_up)) {

sys/dev/qlxgbe/ql_os.c

1433

(if_getdrvflags(ifp) & IFF_DRV_RUNNING) && ha->hw.link_up) {

sys/dev/qlxgbe/ql_os.c

1438

ql_hw_tx_done_locked(ha, (fp->txr_idx + (ha->hw.num_tx_rings >> 1)));

sys/dev/qlxgbe/ql_os.c

1450

(ha->hw.num_tx_rings >> 1);

sys/dev/qlxgbe/ql_os.c

1479

(!ha->hw.link_up))

sys/dev/qlxgbe/ql_os.c

1512

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_os.c

1542

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_os.c

1559

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_os.c

1581

ha->hw.num_sds_rings;

sys/dev/qlxgbe/ql_os.c

1616

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_os.c

1647

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_os.c

1703

for (i = 0; i < ha->hw.num_tx_rings; i++) {

sys/dev/qlxgbe/ql_os.c

1708

for (j = 0; j < ha->hw.num_tx_rings; j++) {

sys/dev/qlxgbe/ql_os.c

1764

for (j = 0; j < ha->hw.num_tx_rings; j++) {

sys/dev/qlxgbe/ql_os.c

1774

for (i = 0; i < ha->hw.num_tx_rings; i++) {

sys/dev/qlxgbe/ql_os.c

1788

for (r = 0; r < ha->hw.num_rds_rings; r++) {

sys/dev/qlxgbe/ql_os.c

1822

for (r = 0; r < ha->hw.num_rds_rings; r++) {

sys/dev/qlxgbe/ql_os.c

1858

for (r = 0; r < ha->hw.num_rds_rings; r++) {

sys/dev/qlxgbe/ql_os.c

1897

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_os.c

1898

ha->hw.sds[i].sdsr_next = 0;

sys/dev/qlxgbe/ql_os.c

1899

ha->hw.sds[i].rxb_free = NULL;

sys/dev/qlxgbe/ql_os.c

1900

ha->hw.sds[i].rx_free = 0;

sys/dev/qlxgbe/ql_os.c

1922

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_os.c

1923

ha->hw.sds[i].sdsr_next = 0;

sys/dev/qlxgbe/ql_os.c

1924

ha->hw.sds[i].rxb_free = NULL;

sys/dev/qlxgbe/ql_os.c

1925

ha->hw.sds[i].rx_free = 0;

sys/dev/qlxgbe/ql_os.c

1942

if (ha->hw.enable_9kb)

sys/dev/qlxgbe/ql_os.c

1951

if (ha->hw.enable_9kb)

sys/dev/qlxgbe/ql_os.c

2059

ha->hw.imd_compl = 1;

sys/dev/qlxgbe/ql_os.c

2075

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_os.c

2166

*((uint32_t *)&ha->hw.flags) = 0;

sys/dev/qlxgbe/ql_os.c

2192

if (ha->hw.sp_log_stop_events &

sys/dev/qlxgbe/ql_os.c

2194

ha->hw.sp_log_stop = -1;

sys/dev/qlxgbe/ql_os.c

2205

if (ha->hw.sp_log_stop_events &

sys/dev/qlxgbe/ql_os.c

2207

ha->hw.sp_log_stop = -1;

sys/dev/qlxgbe/ql_os.c

365

ha->hw.num_sds_rings = MAX_SDS_RINGS;

sys/dev/qlxgbe/ql_os.c

366

ha->hw.num_rds_rings = MAX_RDS_RINGS;

sys/dev/qlxgbe/ql_os.c

367

ha->hw.num_tx_rings = NUM_TX_RINGS;

sys/dev/qlxgbe/ql_os.c

381

if (ha->msix_count < (ha->hw.num_sds_rings + 1)) {

sys/dev/qlxgbe/ql_os.c

382

ha->hw.num_sds_rings = ha->msix_count - 1;

sys/dev/qlxgbe/ql_os.c

414

if (ha->hw.num_sds_rings > 15) {

sys/dev/qlxgbe/ql_os.c

415

ha->hw.num_sds_rings = 15;

sys/dev/qlxgbe/ql_os.c

419

ha->hw.num_rds_rings = ha->hw.num_sds_rings;

sys/dev/qlxgbe/ql_os.c

420

ha->hw.num_tx_rings = ha->hw.num_sds_rings;

sys/dev/qlxgbe/ql_os.c

423

ha->hw.num_tx_rings = ha->hw.num_sds_rings * 2;

sys/dev/qlxgbe/ql_os.c

428

ha->msix_count = ha->hw.num_sds_rings + 1;

sys/dev/qlxgbe/ql_os.c

451

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_os.c

486

ha->hw.num_sds_rings, ha->hw.num_rds_rings, ha->msix_count);

sys/dev/qlxgbe/ql_os.c

676

for (i = 0; i < ha->hw.num_sds_rings; i++) {

sys/dev/qlxgbe/ql_os.c

919

bcopy(if_getlladdr(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN);

sys/dev/qlxgbe/ql_os.c

933

if (ha->hw.sp_log_stop_events & Q8_SP_LOG_STOP_IF_START_FAILURE)

sys/dev/qlxgbe/ql_os.c

934

ha->hw.sp_log_stop = -1;

sys/dev/ral/rt2560.c

1095

int hw, error;

sys/dev/ral/rt2560.c

1099

hw = RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr;

sys/dev/ral/rt2560.c

1100

hw /= RT2560_RX_DESC_SIZE;

sys/dev/ral/rt2560.c

1105

for (; sc->rxq.cur_decrypt != hw;) {

sys/dev/ral/rt2560.c

862

int hw;

sys/dev/ral/rt2560.c

865

hw = RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr;

sys/dev/ral/rt2560.c

866

hw /= RT2560_TX_DESC_SIZE;

sys/dev/ral/rt2560.c

871

while (sc->txq.next_encrypt != hw) {

sys/dev/ral/rt2560.c

873

printf("hw encrypt %d, cur_encrypt %d\n", hw,

sys/dev/ral/rt2860.c

1132

uint32_t hw;

sys/dev/ral/rt2860.c

1136

hw = RAL_READ(sc, RT2860_TX_DTX_IDX(qid));

sys/dev/ral/rt2860.c

1137

while (ring->next != hw) {

sys/dev/ral/rt2860.c

1187

uint32_t hw;

sys/dev/ral/rt2860.c

1193

hw = RAL_READ(sc, RT2860_FS_DRX_IDX) & 0xfff;

sys/dev/ral/rt2860.c

1194

while (sc->rxq.cur != hw) {

sys/dev/syscons/sysmouse.c

142

mousehw_t *hw;

sys/dev/syscons/sysmouse.c

147

hw = (mousehw_t *)data;

sys/dev/syscons/sysmouse.c

148

hw->buttons = 10; /* XXX unknown */

sys/dev/syscons/sysmouse.c

149

hw->iftype = MOUSE_IF_SYSMOUSE;

sys/dev/syscons/sysmouse.c

150

hw->type = MOUSE_MOUSE;

sys/dev/syscons/sysmouse.c

151

hw->model = MOUSE_MODEL_GENERIC;

sys/dev/syscons/sysmouse.c

152

hw->hwid = 0;

sys/dev/tsec/if_tsec_fdt.c

361

} hw;

sys/dev/tsec/if_tsec_fdt.c

364

hw.reg[0] = hw.reg[1] = 0;

sys/dev/tsec/if_tsec_fdt.c

367

i = OF_getprop(sc->node, "local-mac-address", (void *)hw.addr, 6);

sys/dev/tsec/if_tsec_fdt.c

368

if (i == 6 && (hw.reg[0] != 0 || hw.reg[1] != 0)) {

sys/dev/tsec/if_tsec_fdt.c

369

bcopy(hw.addr, addr, 6);

sys/dev/tsec/if_tsec_fdt.c

374

i = OF_getprop(sc->node, "mac-address", (void *)hw.addr, 6);

sys/dev/tsec/if_tsec_fdt.c

375

if (i == 6 && (hw.reg[0] != 0 || hw.reg[1] != 0)) {

sys/dev/tsec/if_tsec_fdt.c

376

bcopy(hw.addr, addr, 6);

sys/dev/tsec/if_tsec_fdt.c

384

hw.reg[0] = TSEC_READ(sc, TSEC_REG_MACSTNADDR1);

sys/dev/tsec/if_tsec_fdt.c

385

hw.reg[1] = TSEC_READ(sc, TSEC_REG_MACSTNADDR2);

sys/dev/tsec/if_tsec_fdt.c

387

addr[5-i] = hw.addr[i];

sys/dev/usb/input/usbhid.c

722

usbhid_init_device_info(struct usb_attach_arg *uaa, struct hid_device_info *hw)

sys/dev/usb/input/usbhid.c

725

hw->idBus = BUS_USB;

sys/dev/usb/input/usbhid.c

726

hw->idVendor = uaa->info.idVendor;

sys/dev/usb/input/usbhid.c

727

hw->idProduct = uaa->info.idProduct;

sys/dev/usb/input/usbhid.c

728

hw->idVersion = uaa->info.bcdDevice;

sys/dev/usb/input/usbhid.c

731

hid_add_dynamic_quirk(hw, USB_GET_DRIVER_INFO(uaa));

sys/dev/usb/input/usbhid.c

735

usbhid_fill_device_info(struct usb_attach_arg *uaa, struct hid_device_info *hw)

sys/dev/usb/input/usbhid.c

742

snprintf(hw->name, sizeof(hw->name), "%s %s",

sys/dev/usb/input/usbhid.c

744

strlcpy(hw->serial, usb_get_serial(udev), sizeof(hw->serial));

sys/dev/usb/input/usbhid.c

751

hw->rdescsize =

sys/dev/usb/input/usbhid.c

759

hid_add_dynamic_quirk(hw, HQ_NOWRITE);

sys/dev/vt/vt_sysmouse.c

381

mousehw_t *hw = (mousehw_t *)data;

sys/dev/vt/vt_sysmouse.c

383

hw->buttons = 10;

sys/dev/vt/vt_sysmouse.c

384

hw->iftype = MOUSE_IF_SYSMOUSE;

sys/dev/vt/vt_sysmouse.c

385

hw->type = MOUSE_MOUSE;

sys/dev/vt/vt_sysmouse.c

386

hw->model = MOUSE_MODEL_GENERIC;

sys/dev/vt/vt_sysmouse.c

387

hw->hwid = 0;

sys/dev/wpi/if_wpi.c

2181

uint32_t hw;

sys/dev/wpi/if_wpi.c

2186

hw = le32toh(sc->shared->next) & 0xfff;

sys/dev/wpi/if_wpi.c

2187

hw = (hw == 0) ? WPI_RX_RING_COUNT - 1 : hw - 1;

sys/dev/wpi/if_wpi.c

2189

while (sc->rxq.cur != hw) {

sys/dev/wtap/wtap_hal/hal.c

222

uint32_t intval = hal->hw.timer_intr_intval;

sys/dev/wtap/wtap_hal/hal.c

224

hal->hw.tsf += ticks_to_msecs(intval);

sys/dev/wtap/wtap_hal/hal.c

226

callout_schedule(&hal->hw.timer_intr, intval);

sys/dev/wtap/wtap_hal/hal.c

234

callout_stop(&hal->hw.timer_intr);

sys/dev/wtap/wtap_hal/hal.c

235

hal->hw.tsf = 0;

sys/dev/wtap/wtap_hal/hal.c

236

callout_reset(&hal->hw.timer_intr, hal->hw.timer_intr_intval,

sys/dev/wtap/wtap_hal/hal.c

245

return (hal->hw.tsf);

sys/dev/wtap/wtap_hal/hal.c

75

callout_init_mtx(&hal->hw.timer_intr, &hal->hal_mtx, 0);

sys/dev/wtap/wtap_hal/hal.c

76

hal->hw.timer_intr_intval = msecs_to_ticks(HAL_TIMER_INTVAL);

sys/dev/wtap/wtap_hal/hal.h

51

} hw;

sys/kern/kern_mib.c

77

SYSCTL_ROOT_NODE(CTL_HW, hw, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,

sys/powerpc/powermac/ata_dbdma.c

281

sc->sc_ch.hw.status = ata_dbdma_status;

sys/powerpc/powermac/ata_kauai.c

307

sc->sc_ch.sc_ch.hw.begin_transaction = ata_kauai_begin_transaction;

sys/powerpc/powermac/ata_macio.c

253

sc->sc_ch.sc_ch.hw.begin_transaction = ata_macio_begin_transaction;

usr.bin/diff/diffreg.c

1215

print_space(0, hw + lpad, *pflags);

usr.bin/diff/diffreg.c

1218

print_space(nc, hw - nc + lpad, *pflags);

usr.bin/diff/diffreg.c

1227

print_space(hw + lpad + 1, rpad, *pflags);

usr.bin/diff/diffreg.c

1297

if (diff_format == D_SIDEBYSIDE && hw < nc)

usr.bin/diff/diffreg.c

1298

nc = hw;

usr.bin/diff/diffreg.c

1315

while (j < nc && (hw == 0 || col < hw)) {

usr.bin/diff/diffreg.c

1347

if (hw > 0 && newcol >= hw)

usr.bin/diff/diffreg.c

1351

if (hw > 0 && newcol > hw)

usr.bin/diff/diffreg.c

1352

newcol = hw;

usr.bin/diff/diffreg.c

211

static int hw, lpad,rpad; /* half width and padding */

usr.bin/diff/diffreg.c

301

hw = (width - 3) / 2;

usr.bin/diff/diffreg.c

304

hw = 0;

usr.bin/diff/diffreg.c

308

hw = 0;

usr.bin/diff/diffreg.c

310

hw = (width - 3) / 2;

usr.bin/diff/diffreg.c

311

while (hw > 0 && roundup(hw + 3, tabsize) + hw > width)

usr.bin/diff/diffreg.c

312

hw--;

usr.bin/diff/diffreg.c

313

if (width - (roundup(hw + 3, tabsize) + hw) < tabsize)

usr.bin/diff/diffreg.c

314

width = roundup(hw + 3, tabsize) + hw;

usr.bin/diff/diffreg.c

316

lpad = (width - hw * 2 - 1) / 2;

usr.bin/diff/diffreg.c

317

rpad = (width - hw * 2 - 1) - lpad;

usr.bin/diff/diffreg.c

936

print_space(nc, hw - nc + lpad + 1 + rpad, flags);

usr.sbin/moused/moused/moused.c

2000

r_init_touchpad_hw(fd, q, &r->tp.hw, &r->ev);

usr.sbin/moused/moused/moused.c

2001

r_init_touchpad_info(q, &r->tp.hw, &r->tp.info);

usr.sbin/moused/moused/moused.c

2002

r_init_touchpad_accel(&r->tp.hw, &r->accel);

usr.sbin/moused/moused/moused.c

2075

const struct tpcaps *tphw = &tp->hw;

usr.sbin/moused/moused/moused.c

259

struct tpcaps hw; /* touchpad capabilities */

usr.sbin/moused/moused/moused.c

2828

const struct tpcaps *tphw = &tp->hw;

usr.sbin/moused/msconvd/msconvd.c

1016

rodent.hw.iftype = MOUSE_IF_SERIAL;

usr.sbin/moused/msconvd/msconvd.c

1020

rodent.hw.model = t->val2;

usr.sbin/moused/msconvd/msconvd.c

1235

if (rodent.hw.iftype == MOUSE_IF_SYSMOUSE)

usr.sbin/moused/msconvd/msconvd.c

1641

switch (rodent.hw.model) {

usr.sbin/moused/msconvd/msconvd.c

368

mousehw_t hw; /* mouse device hardware information */

usr.sbin/moused/msconvd/msconvd.c

597

rodent.portname, r_if(rodent.hw.iftype),

usr.sbin/moused/msconvd/msconvd.c

598

r_name(rodent.rtype), r_model(rodent.hw.model));

usr.sbin/moused/msconvd/msconvd.c

602

printf("%s\n", r_if(rodent.hw.iftype));

usr.sbin/moused/msconvd/msconvd.c

606

printf("%s\n", r_model(rodent.hw.model));

usr.sbin/moused/msconvd/msconvd.c

610

rodent.portname, r_if(rodent.hw.iftype),

usr.sbin/moused/msconvd/msconvd.c

611

r_name(rodent.rtype), r_model(rodent.hw.model));

usr.sbin/moused/msconvd/msconvd.c

800

"%s mouse on %s", r_model(rodent.hw.model), rodent.portname);

usr.sbin/moused/msconvd/msconvd.c

801

uisetup.id.bustype = r_bustype(rodent.hw.iftype);

usr.sbin/moused/msconvd/msconvd.c

970

rodent.hw.iftype = MOUSE_IF_UNKNOWN;

usr.sbin/moused/msconvd/msconvd.c

971

rodent.hw.model = MOUSE_MODEL_GENERIC;

usr.sbin/moused/msconvd/msconvd.c

972

ioctl(rodent.mfd, MOUSE_GETHWINFO, &rodent.hw);