sys/arm/arm/gic.c

162

bus_write_1((_sc)->gic_res[GIC_RES_DIST], (_reg), (_val))

sys/arm/broadcom/bcm2835/bcm2838_pci.c

362

bus_write_1(sc->base.base.res, offset, val);

sys/arm/freescale/imx/imx_i2c.c

219

bus_write_1(sc->res, off, val);

sys/arm/nvidia/tegra_sdhci.c

174

bus_write_1(sc->mem_res, off, val);

sys/dev/ae/if_ae.c

199

bus_write_1((sc)->mem[0], (reg), (val))

sys/dev/ahci/ahci.h

568

bus_write_1((res), (offset), (value))

sys/dev/alc/if_alcvar.h

264

bus_write_1((_sc)->alc_res[0], (reg), (val))

sys/dev/ale/if_alevar.h

233

bus_write_1((_sc)->ale_res[0], (reg), (val))

sys/dev/amdpm/amdpm.c

136

(bus_write_1(amdpm->res, register, value))

sys/dev/amdsbwd/amdsbwd.c

135

bus_write_1(res, 0, reg); /* Index */

sys/dev/amdsbwd/amdsbwd.c

142

bus_write_1(res, 0, reg); /* Index */

sys/dev/amdsbwd/amdsbwd.c

143

bus_write_1(res, 1, val); /* Data */

sys/dev/amdsmb/amdsmb.c

121

(bus_write_1(amdsmb->res, register, value))

sys/dev/asmc/asmcvar.h

63

bus_write_1(sc->sc_ioport, 0x00, val)

sys/dev/asmc/asmcvar.h

71

bus_write_1(sc->sc_ioport, 0x04, val)

sys/dev/ata/ata-all.h

520

bus_write_1((res), (offset), (value))

sys/dev/bhnd/bhnd.h

1501

bus_write_1((r)->res, (o), (v)) : \

sys/dev/bhnd/bhndb/bhndb_pci.c

1602

return (bus_write_1(r, res_offset, value));

sys/dev/bhnd/bhndb/bhndb_pci.c

721

bus_write_1(r, r_offset, value);

sys/dev/dpaa2/dpaa2_swp.c

1025

bus_write_1(map, offset + i, p8[i]);

sys/dev/dpaa2/dpaa2_swp.c

1029

bus_write_1(map, offset, c->verb | swp->vdq.valid_bit);

sys/dev/dpaa2/dpaa2_swp.c

1036

bus_write_1(map, offset, c->verb | swp->vdq.valid_bit);

sys/dev/dpaa2/dpaa2_swp.c

1108

bus_write_1(map, offset + i, cmd_pdat8[i]);

sys/dev/dpaa2/dpaa2_swp.c

1112

bus_write_1(map, offset, cmdid | swp->mr.valid_bit);

sys/dev/dpaa2/dpaa2_swp.c

1118

bus_write_1(map, offset, cmdid | swp->mc.valid_bit);

sys/dev/dpaa2/dpaa2_swp.c

881

bus_write_1(map,

sys/dev/dpaa2/dpaa2_swp.c

899

bus_write_1(map,

sys/dev/dpaa2/dpaa2_swp.c

905

bus_write_1(map,

sys/dev/dpaa2/dpaa2_swp.c

973

bus_write_1(map, offset + i, cmd_pdat8[i]);

sys/dev/dpaa2/dpaa2_swp.c

977

bus_write_1(map, offset, c->verb | RAR_VB(rar) | buf_num);

sys/dev/dpaa2/dpaa2_swp.c

983

bus_write_1(map, offset, c->verb | RAR_VB(rar) | buf_num);

sys/dev/flash/cqspi.c

85

#define WRITE1(_sc, _reg, _val) bus_write_1((_sc)->res[0], _reg, _val)

sys/dev/flash/cqspi.c

89

#define WRITE_DATA_1(_sc, _reg, _val) bus_write_1((_sc)->res[1], _reg, _val)

sys/dev/fxp/if_fxpvar.h

247

#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->fxp_res[0], reg, val)

sys/dev/glxiic/glxiic.c

1059

bus_write_1(sc->smb_res, GLXIIC_SMB_ADDR,

sys/dev/glxiic/glxiic.c

1062

bus_write_1(sc->smb_res, GLXIIC_SMB_ADDR, 0);

sys/dev/glxiic/glxiic.c

1066

bus_write_1(sc->smb_res, GLXIIC_SMB_CTRL1,

sys/dev/glxiic/glxiic.c

493

bus_write_1(sc->smb_res, GLXIIC_SMB_STS, (GLXIIC_SMB_STS_SLVSTP_BIT |

sys/dev/glxiic/glxiic.c

510

bus_write_1(sc->smb_res, GLXIIC_SMB_CTRL1,

sys/dev/glxiic/glxiic.c

523

bus_write_1(sc->smb_res, GLXIIC_SMB_STS,

sys/dev/glxiic/glxiic.c

659

bus_write_1(sc->smb_res, GLXIIC_SMB_SDA, data);

sys/dev/glxiic/glxiic.c

740

bus_write_1(sc->smb_res, GLXIIC_SMB_SDA, slave);

sys/dev/glxiic/glxiic.c

745

bus_write_1(sc->smb_res, GLXIIC_SMB_CTRL1,

sys/dev/glxiic/glxiic.c

774

bus_write_1(sc->smb_res, GLXIIC_SMB_STS,

sys/dev/glxiic/glxiic.c

783

bus_write_1(sc->smb_res, GLXIIC_SMB_SDA, *sc->data++);

sys/dev/glxiic/glxiic.c

816

bus_write_1(sc->smb_res, GLXIIC_SMB_STS,

sys/dev/glxiic/glxiic.c

836

bus_write_1(sc->smb_res, GLXIIC_SMB_CTRL1,

sys/dev/glxiic/glxiic.c

874

bus_write_1(sc->smb_res, GLXIIC_SMB_CTRL1,

sys/dev/glxiic/glxiic.c

976

bus_write_1(sc->smb_res, GLXIIC_SMB_CTRL1,

sys/dev/gpio/pl061.c

153

bus_write_1(sc->sc_mem_res, a, tmp);

sys/dev/gpio/pl061.c

212

bus_write_1(sc->sc_mem_res, PL061_PIN_TO_ADDR(pin), d);

sys/dev/gpio/pl061.c

230

bus_write_1(sc->sc_mem_res, PL061_PIN_TO_ADDR(pin), d);

sys/dev/gpio/pl061.c

385

bus_write_1(sc->sc_mem_res, PL061_INTCLR, mask);

sys/dev/gpio/pl061.c

397

bus_write_1(sc->sc_mem_res, PL061_INTCLR, mask);

sys/dev/gpio/pl061.c

464

bus_write_1(sc->sc_mem_res, PL061_INTMASK, 0);

sys/dev/hdmi/dwc_hdmi.h

54

bus_write_1(sc->sc_mem_res, off << sc->sc_reg_shift, val);

sys/dev/ichsmb/ichsmb.c

123

bus_write_1(sc->io_res, ICH_HST_STA, 0xff);

sys/dev/ichsmb/ichsmb.c

178

bus_write_1(sc->io_res, ICH_XMIT_SLVA,

sys/dev/ichsmb/ichsmb.c

181

bus_write_1(sc->io_res, ICH_HST_CNT,

sys/dev/ichsmb/ichsmb.c

204

bus_write_1(sc->io_res, ICH_XMIT_SLVA,

sys/dev/ichsmb/ichsmb.c

206

bus_write_1(sc->io_res, ICH_HST_CMD, byte);

sys/dev/ichsmb/ichsmb.c

207

bus_write_1(sc->io_res, ICH_HST_CNT,

sys/dev/ichsmb/ichsmb.c

226

bus_write_1(sc->io_res, ICH_XMIT_SLVA,

sys/dev/ichsmb/ichsmb.c

228

bus_write_1(sc->io_res, ICH_HST_CNT,

sys/dev/ichsmb/ichsmb.c

249

bus_write_1(sc->io_res, ICH_XMIT_SLVA,

sys/dev/ichsmb/ichsmb.c

251

bus_write_1(sc->io_res, ICH_HST_CMD, cmd);

sys/dev/ichsmb/ichsmb.c

252

bus_write_1(sc->io_res, ICH_D0, byte);

sys/dev/ichsmb/ichsmb.c

253

bus_write_1(sc->io_res, ICH_HST_CNT,

sys/dev/ichsmb/ichsmb.c

273

bus_write_1(sc->io_res, ICH_XMIT_SLVA,

sys/dev/ichsmb/ichsmb.c

275

bus_write_1(sc->io_res, ICH_HST_CMD, cmd);

sys/dev/ichsmb/ichsmb.c

276

bus_write_1(sc->io_res, ICH_D0, word & 0xff);

sys/dev/ichsmb/ichsmb.c

277

bus_write_1(sc->io_res, ICH_D1, word >> 8);

sys/dev/ichsmb/ichsmb.c

278

bus_write_1(sc->io_res, ICH_HST_CNT,

sys/dev/ichsmb/ichsmb.c

297

bus_write_1(sc->io_res, ICH_XMIT_SLVA,

sys/dev/ichsmb/ichsmb.c

299

bus_write_1(sc->io_res, ICH_HST_CMD, cmd);

sys/dev/ichsmb/ichsmb.c

300

bus_write_1(sc->io_res, ICH_HST_CNT,

sys/dev/ichsmb/ichsmb.c

320

bus_write_1(sc->io_res, ICH_XMIT_SLVA,

sys/dev/ichsmb/ichsmb.c

322

bus_write_1(sc->io_res, ICH_HST_CMD, cmd);

sys/dev/ichsmb/ichsmb.c

323

bus_write_1(sc->io_res, ICH_HST_CNT,

sys/dev/ichsmb/ichsmb.c

348

bus_write_1(sc->io_res, ICH_XMIT_SLVA,

sys/dev/ichsmb/ichsmb.c

350

bus_write_1(sc->io_res, ICH_HST_CMD, cmd);

sys/dev/ichsmb/ichsmb.c

351

bus_write_1(sc->io_res, ICH_D0, sdata & 0xff);

sys/dev/ichsmb/ichsmb.c

352

bus_write_1(sc->io_res, ICH_D1, sdata >> 8);

sys/dev/ichsmb/ichsmb.c

353

bus_write_1(sc->io_res, ICH_HST_CNT,

sys/dev/ichsmb/ichsmb.c

399

bus_write_1(sc->io_res, ICH_XMIT_SLVA,

sys/dev/ichsmb/ichsmb.c

401

bus_write_1(sc->io_res, ICH_HST_CMD, cmd);

sys/dev/ichsmb/ichsmb.c

402

bus_write_1(sc->io_res, ICH_D0, count);

sys/dev/ichsmb/ichsmb.c

403

bus_write_1(sc->io_res, ICH_BLOCK_DB, buf[0]);

sys/dev/ichsmb/ichsmb.c

404

bus_write_1(sc->io_res, ICH_HST_CNT,

sys/dev/ichsmb/ichsmb.c

428

bus_write_1(sc->io_res, ICH_XMIT_SLVA,

sys/dev/ichsmb/ichsmb.c

430

bus_write_1(sc->io_res, ICH_HST_CMD, cmd);

sys/dev/ichsmb/ichsmb.c

431

bus_write_1(sc->io_res, ICH_HST_CNT,

sys/dev/ichsmb/ichsmb.c

521

bus_write_1(sc->io_res, ICH_HST_CNT,

sys/dev/ichsmb/ichsmb.c

535

bus_write_1(sc->io_res,

sys/dev/ichsmb/ichsmb.c

564

bus_write_1(sc->io_res,

sys/dev/ichsmb/ichsmb.c

579

bus_write_1(sc->io_res,

sys/dev/ichsmb/ichsmb.c

602

bus_write_1(sc->io_res,

sys/dev/ichsmb/ichsmb.c

617

bus_write_1(sc->io_res,

sys/dev/ichsmb/ichsmb.c

624

bus_write_1(sc->io_res, ICH_HST_STA, status);

sys/dev/ichsmb/ichsmb.c

712

bus_write_1(sc->io_res, ICH_HST_CNT, 0);

sys/dev/ichwd/ichwd.c

321

bus_write_1((sc)->tco_res, (off), (val))

sys/dev/ida/idavar.h

44

bus_write_1((ida)->regs, port, val)

sys/dev/iicbus/controller/cadence/cdnc_i2c.c

114

#define WR1(sc, off, val) (bus_write_1((sc)->mem_res, (off), (val)))

sys/dev/iicbus/controller/opencores/iicoc.c

56

bus_write_1(sc->mem_res, reg<<sc->reg_shift, value);

sys/dev/intel/pchtherm.c

170

bus_write_1(sc->tbar, PCHTHERM_REG_TSEL,

sys/dev/intpm/intpm.c

127

bus_write_1(res, 0, reg); /* Index */

sys/dev/intpm/intpm.c

364

bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, PIIX4_SMBSLVCNT_ALTEN);

sys/dev/intpm/intpm.c

432

bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, 0);

sys/dev/intpm/intpm.c

435

bus_write_1(sc->io_res, PIIX4_SMBHSTSTS,

sys/dev/intpm/intpm.c

454

bus_write_1(sc->io_res, PIIX4_SMBHSTCNT,

sys/dev/intpm/intpm.c

480

bus_write_1(sc->io_res, PIIX4_SMBSLVSTS,

sys/dev/intpm/intpm.c

498

bus_write_1(sc->io_res, PIIX4_SMBSLVCNT,

sys/dev/intpm/intpm.c

509

bus_write_1(sc->io_res, PIIX4_SMBHSTADD, SMBALTRESP | LSB);

sys/dev/intpm/intpm.c

520

bus_write_1(sc->io_res, PIIX4_SMBSLVCNT,

sys/dev/intpm/intpm.c

540

bus_write_1(sc->io_res, PIIX4_SMBHSTCNT, tmp);

sys/dev/intpm/intpm.c

602

bus_write_1(sc->io_res, PIIX4_SMBHSTCNT, tmp & ~PIIX4_SMBHSTCNT_INTREN);

sys/dev/intpm/intpm.c

628

bus_write_1(sc->io_res, PIIX4_SMBSLVCNT,

sys/dev/intpm/intpm.c

639

bus_write_1(sc->io_res, PIIX4_SMBSLVCNT, PIIX4_SMBSLVCNT_ALTEN);

sys/dev/intpm/intpm.c

673

bus_write_1(sc->io_res, PIIX4_SMBHSTADD, data);

sys/dev/intpm/intpm.c

692

bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave & ~LSB);

sys/dev/intpm/intpm.c

693

bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, byte);

sys/dev/intpm/intpm.c

712

bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave | LSB);

sys/dev/intpm/intpm.c

742

bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave & ~LSB);

sys/dev/intpm/intpm.c

743

bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);

sys/dev/intpm/intpm.c

744

bus_write_1(sc->io_res, PIIX4_SMBHSTDAT0, byte);

sys/dev/intpm/intpm.c

763

bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave & ~LSB);

sys/dev/intpm/intpm.c

764

bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);

sys/dev/intpm/intpm.c

765

bus_write_1(sc->io_res, PIIX4_SMBHSTDAT0, word & 0xff);

sys/dev/intpm/intpm.c

766

bus_write_1(sc->io_res, PIIX4_SMBHSTDAT1, (word >> 8) & 0xff);

sys/dev/intpm/intpm.c

785

bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave | LSB);

sys/dev/intpm/intpm.c

786

bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);

sys/dev/intpm/intpm.c

807

bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave | LSB);

sys/dev/intpm/intpm.c

808

bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);

sys/dev/intpm/intpm.c

845

bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave & ~LSB);

sys/dev/intpm/intpm.c

846

bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);

sys/dev/intpm/intpm.c

848

bus_write_1(sc->io_res, PIIX4_SMBBLKDAT, buf[i]);

sys/dev/intpm/intpm.c

849

bus_write_1(sc->io_res, PIIX4_SMBHSTDAT0, count);

sys/dev/intpm/intpm.c

873

bus_write_1(sc->io_res, PIIX4_SMBHSTADD, slave | LSB);

sys/dev/intpm/intpm.c

874

bus_write_1(sc->io_res, PIIX4_SMBHSTCMD, cmd);

sys/dev/ipmi/ipmivars.h

216

bus_write_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x), value)

sys/dev/ipmi/ipmivars.h

222

bus_write_1((sc)->ipmi_io_res[(x)], 0, value)

sys/dev/ips/ips.h

63

#define ips_write_1(sc,offset,value) bus_write_1(sc->iores, offset, value)

sys/dev/mgb/if_mgb.h

225

bus_write_1((sc)->regs, reg, val)

sys/dev/mlx/mlxreg.h

118

#define MLX_V4_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V4_MAILBOX + idx, val)

sys/dev/mlx/mlxreg.h

127

#define MLX_V4_PUT_FWERROR(sc, val) bus_write_1(sc->mlx_mem, MLX_V4_FWERROR, val)

sys/dev/mlx/mlxreg.h

163

#define MLX_V5_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V5_MAILBOX + idx, val)

sys/dev/mlx/mlxreg.h

167

#define MLX_V5_PUT_IDBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V5_IDBR, val)

sys/dev/mlx/mlxreg.h

169

#define MLX_V5_PUT_ODBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V5_ODBR, val)

sys/dev/mlx/mlxreg.h

170

#define MLX_V5_PUT_IER(sc, val) bus_write_1(sc->mlx_mem, MLX_V5_IER, val)

sys/dev/mlx/mlxreg.h

172

#define MLX_V5_PUT_FWERROR(sc, val) bus_write_1(sc->mlx_mem, MLX_V5_FWERROR, val)

sys/dev/mlx/mlxreg.h

81

#define MLX_V3_PUT_MAILBOX(sc, idx, val) bus_write_1(sc->mlx_mem, MLX_V3_MAILBOX + idx, val)

sys/dev/mlx/mlxreg.h

85

#define MLX_V3_PUT_IDBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_IDBR, val)

sys/dev/mlx/mlxreg.h

87

#define MLX_V3_PUT_ODBR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_ODBR, val)

sys/dev/mlx/mlxreg.h

88

#define MLX_V3_PUT_IER(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_IER, val)

sys/dev/mlx/mlxreg.h

90

#define MLX_V3_PUT_FWERROR(sc, val) bus_write_1(sc->mlx_mem, MLX_V3_FWERROR, val)

sys/dev/msk/if_mskreg.h

2129

bus_write_1((sc)->msk_res[0], (reg), (val))

sys/dev/msk/if_mskreg.h

2143

bus_write_1((sc)->msk_res[0], Y2_CFG_SPC + (reg), (val))

sys/dev/mvs/mvs.h

648

bus_write_1((res), (offset), (value))

sys/dev/nctgpio/nctgpio.c

775

bus_write_1(sc->iores, NCT_IO_GSR, grpnum);

sys/dev/nctgpio/nctgpio.c

799

bus_write_1(sc->iores, reg, val);

sys/dev/ncthwm/ncthwm.c

121

bus_write_1(sc->iores, 0, reg);

sys/dev/ncthwm/ncthwm.c

122

bus_write_1(sc->iores, 1, val);

sys/dev/ncthwm/ncthwm.c

128

bus_write_1(sc->iores, 0, reg);

sys/dev/nfsmb/nfsmb.c

128

(bus_write_1(nfsmb->res, register, value))

sys/dev/pbio/pbio.c

148

bus_write_1(scp->res, off, val);

sys/dev/pcf/pcfvar.h

101

bus_write_1(sc->res_ioport, 0, data);

sys/dev/pcf/pcfvar.h

109

bus_write_1(sc->res_ioport, 1, data);

sys/dev/pci/pci.c

3790

bus_write_1(res, eecp + XHCI_XECP_OS_SEM, 1);

sys/dev/pci/pci_dw.c

127

bus_write_1(sc->dbi_res, reg, val);

sys/dev/pci/pci_dw.c

597

bus_write_1(res, reg, val);

sys/dev/pci/pci_host_generic.c

350

bus_write_1(sc->res, offset, val);

sys/dev/pci/pci_user.c

1086

bus_write_1(res, offset, pbi->pbi_value);

sys/dev/ppc/ppc.c

1330

#define w_reg(reg, ppc, byte) (bus_write_1((ppc)->res_ioport, reg, byte))

sys/dev/ppc/ppcreg.h

163

#define w_dtr(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_SPP_DTR, byte))

sys/dev/ppc/ppcreg.h

164

#define w_str(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_SPP_STR, byte))

sys/dev/ppc/ppcreg.h

165

#define w_ctr(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_SPP_CTR, byte))

sys/dev/ppc/ppcreg.h

167

#define w_epp_A(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_EPP_ADDR, byte))

sys/dev/ppc/ppcreg.h

168

#define w_epp_D(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_EPP_DATA, byte))

sys/dev/ppc/ppcreg.h

169

#define w_ecr(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_ECP_ECR, byte))

sys/dev/ppc/ppcreg.h

170

#define w_fifo(ppc, byte) (bus_write_1((ppc)->res_ioport, PPC_ECP_D_FIFO, byte))

sys/dev/proto/proto_core.c

418

bus_write_1(r->r_d.res, ofs, buf.x1[0]);

sys/dev/puc/pucdata.c

1807

bus_write_1(bar->b_res, REG_SPR, REG_ACR);

sys/dev/puc/pucdata.c

1808

bus_write_1(bar->b_res, REG_ICR, acr);

sys/dev/puc/pucdata.c

1920

bus_write_1(bar->b_res, REG_LCR, LCR_DLAB);

sys/dev/puc/pucdata.c

1921

bus_write_1(bar->b_res, REG_SPR, 0);

sys/dev/puc/pucdata.c

1923

bus_write_1(bar->b_res, REG_SPR, 0x80 + -cfg->clock);

sys/dev/puc/pucdata.c

1925

bus_write_1(bar->b_res, REG_LCR, 0);

sys/dev/puc/pucdata.c

2012

bus_write_1(bar->b_res, 0x250, 0x89);

sys/dev/puc/pucdata.c

2013

bus_write_1(bar->b_res, 0x3f0, 0x87);

sys/dev/puc/pucdata.c

2014

bus_write_1(bar->b_res, 0x3f0, 0x87);

sys/dev/puc/pucdata.c

2018

bus_write_1(bar->b_res, efir, 0x09);

sys/dev/puc/pucdata.c

2022

bus_write_1(bar->b_res, efir, 0x16);

sys/dev/puc/pucdata.c

2024

bus_write_1(bar->b_res, efir, 0x16);

sys/dev/puc/pucdata.c

2025

bus_write_1(bar->b_res, efir + 1, v | 0x04);

sys/dev/puc/pucdata.c

2026

bus_write_1(bar->b_res, efir, 0x16);

sys/dev/puc/pucdata.c

2027

bus_write_1(bar->b_res, efir + 1, v & ~0x04);

sys/dev/puc/pucdata.c

2029

bus_write_1(bar->b_res, efir, 0x23);

sys/dev/puc/pucdata.c

2030

bus_write_1(bar->b_res, efir + 1, (ofs + 0x78) >> 2);

sys/dev/puc/pucdata.c

2031

bus_write_1(bar->b_res, efir, 0x24);

sys/dev/puc/pucdata.c

2032

bus_write_1(bar->b_res, efir + 1, (ofs + 0xf8) >> 2);

sys/dev/puc/pucdata.c

2033

bus_write_1(bar->b_res, efir, 0x25);

sys/dev/puc/pucdata.c

2034

bus_write_1(bar->b_res, efir + 1, (ofs + 0xe8) >> 2);

sys/dev/puc/pucdata.c

2035

bus_write_1(bar->b_res, efir, 0x17);

sys/dev/puc/pucdata.c

2036

bus_write_1(bar->b_res, efir + 1, 0x03);

sys/dev/puc/pucdata.c

2037

bus_write_1(bar->b_res, efir, 0x28);

sys/dev/puc/pucdata.c

2038

bus_write_1(bar->b_res, efir + 1, 0x43);

sys/dev/puc/pucdata.c

2041

bus_write_1(bar->b_res, 0x250, 0xaa);

sys/dev/puc/pucdata.c

2042

bus_write_1(bar->b_res, 0x3f0, 0xaa);

sys/dev/puc/pucdata.c

2221

bus_write_1(bar->b_res, 0x1000 + (idx << 9) + 0x92,

sys/dev/puc/pucdata.c

2333

bus_write_1(bar->b_res, /* OPT_IMRREG0 */ 0xc, 0xff);

sys/dev/sdhci/sdhci_acpi.c

127

bus_write_1(sc->mem_res, off, val);

sys/dev/sdhci/sdhci_fdt.c

266

bus_write_1(sc->mem_res[slot->num], off, val);

sys/dev/sdhci/sdhci_pci.c

191

bus_write_1(sc->mem_res[slot->num], off, val);

sys/dev/sdhci/sdhci_xenon.c

80

bus_write_1(sc->mem_res, off, val);

sys/dev/sge/if_sge.c

182

#define CSR_WRITE_1(cs, reg, val) bus_write_1(sc->sge_res, reg, val)

sys/dev/siis/siis.h

444

bus_write_1((res), (offset), (value))

sys/dev/sk/if_skreg.h

1279

bus_write_1((sc)->sk_res[0], (reg), (val))

sys/dev/smc/if_smc.c

180

bus_write_1(sc->smc_reg, offset, val);

sys/dev/spibus/controller/allwinner/aw_spi.c

160

#define AW_SPI_WRITE_1(sc, reg, val) bus_write_1((sc)->res[0], (reg), (val))

sys/dev/sram/mmio_sram.c

142

bus_write_1(sc->res[0], offset, val);

sys/dev/ste/if_stereg.h

486

bus_write_1((sc)->ste_res, reg, val)

sys/dev/stge/if_stgereg.h

94

bus_write_1((_sc)->sc_res[0], (reg), (val))

sys/dev/superio/superio.c

110

bus_write_1(res, 0, reg);

sys/dev/superio/superio.c

129

bus_write_1(res, 0, reg);

sys/dev/superio/superio.c

130

bus_write_1(res, 1, val);

sys/dev/superio/superio.c

196

bus_write_1(res, 0, 0x87);

sys/dev/superio/superio.c

197

bus_write_1(res, 0, 0x01);

sys/dev/superio/superio.c

198

bus_write_1(res, 0, 0x55);

sys/dev/superio/superio.c

199

bus_write_1(res, 0, port == 0x2e ? 0x55 : 0xaa);

sys/dev/superio/superio.c

217

bus_write_1(res, 0, 0x87);

sys/dev/superio/superio.c

218

bus_write_1(res, 0, 0x87);

sys/dev/superio/superio.c

224

bus_write_1(res, 0, 0xaa);

sys/dev/superio/superio.c

236

bus_write_1(res, 0, 0x87);

sys/dev/superio/superio.c

237

bus_write_1(res, 0, 0x87);

sys/dev/superio/superio.c

243

bus_write_1(res, 0, 0xaa);

sys/dev/sym/sym_hipd.c

848

#define OUTB_OFF(o, v) bus_write_1(np->io_res, (o), (v))

sys/dev/sym/sym_hipd.c

858

#define OUTB_OFF(o, v) bus_write_1(np->mmio_res, (o), (v))

sys/dev/tpm/tpm_bus.c

68

bus_write_1(sc->mem_res, off, val);

sys/dev/usb/controller/musb_otg_allwinner.c

521

bus_write_1(sc->res[0], MUSB2_REG_AWIN_VEND0, VEND0_PIO_MODE);

sys/dev/vge/if_vgevar.h

221

bus_write_1(sc->vge_res, reg, val)

sys/dev/viapm/viapm.c

77

(bus_write_1(viapm->iores, port, (u_char)(val)))

sys/dev/virtio/mmio/virtio_mmio.c

105

bus_write_1((sc)->res[0], (o), (v))

sys/dev/virtio/pci/virtio_pci_legacy.c

117

bus_write_1((sc)->vtpci_res, (o), (v))

sys/dev/virtio/pci/virtio_pci_modern.c

1330

bus_write_1(&sc->vtpci_common_res_map.vtrm_map, off, val);

sys/dev/virtio/pci/virtio_pci_modern.c

1419

bus_write_1(&sc->vtpci_device_res_map.vtrm_map, off, val);

sys/dev/vmd/vmd.c

217

return (bus_write_1(sc->vmd_regs_res[0], offset, val));

sys/dev/vr/if_vrreg.h

751

#define CSR_WRITE_1(sc, reg, val) bus_write_1(sc->vr_res, reg, val)

sys/powerpc/amigaone/cpld_a1222.c

133

bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);

sys/powerpc/amigaone/cpld_a1222.c

134

bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr);

sys/powerpc/amigaone/cpld_a1222.c

136

bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);

sys/powerpc/amigaone/cpld_a1222.c

137

bus_write_1(sc->sc_mem, CPLD_MEM_DATA, data);

sys/powerpc/amigaone/cpld_a1222.c

144

bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);

sys/powerpc/amigaone/cpld_a1222.c

145

bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_L, addr);

sys/powerpc/amigaone/cpld_a1222.c

147

bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);

sys/powerpc/amigaone/cpld_a1222.c

162

bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr);

sys/powerpc/amigaone/cpld_a1222.c

165

bus_write_1(sc->sc_mem, CPLD_MEM_ADDR_H, addr + 1);

sys/powerpc/mpc85xx/atpic.c

131

bus_write_1(sc->sc_res[icu], ofs, val);

sys/powerpc/mpc85xx/fsl_espi.c

107

#define FSL_ESPI_WRITE_FIFO(sc,off,val) bus_write_1(sc->sc_mem_res, off, val)

sys/powerpc/powermac/atibl.c

169

bus_write_1(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, (reg & 0x3f));

sys/powerpc/powermac/atibl.c

190

bus_write_1(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX,

sys/powerpc/powermac/cuda.c

286

bus_write_1(sc->sc_memr, offset, value);

sys/powerpc/powermac/macgpio.c

294

bus_write_1(sc->sc_gpios,dinfo->gpio_num,val);

sys/powerpc/powermac/macgpio.c

316

bus_write_1(sc->sc_gpios,dinfo->gpio_num,val);

sys/powerpc/powermac/macgpio.c

349

bus_write_1(sc->sc_gpios,dinfo->gpio_num,val);

sys/powerpc/powermac/macgpio.c

390

bus_write_1(sc->sc_gpios, GPIO_BASE + i, sc->sc_saved_gpios[i]);

sys/powerpc/powermac/macgpio.c

392

bus_write_1(sc->sc_gpios, GPIO_EXTINT_BASE + i, sc->sc_saved_extint_gpios[i]);

sys/powerpc/powermac/macio.c

744

bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 5);

sys/powerpc/powermac/macio.c

746

bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 4);

sys/powerpc/powermac/macio.c

754

bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0b, 0);

sys/powerpc/powermac/macio.c

755

bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0a, 0x28);

sys/powerpc/powermac/macio.c

756

bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0d, 0x28);

sys/powerpc/powermac/macio.c

757

bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0d, 0x28);

sys/powerpc/powermac/macio.c

758

bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0e, 0x28);

sys/powerpc/powermac/macio.c

783

bus_write_1(sc->sc_memr, sc->sc_timebase, 4);

sys/powerpc/powermac/macio.c

785

bus_write_1(sc->sc_memr, sc->sc_timebase, 0);

sys/powerpc/powermac/pmu.c

556

bus_write_1(sc->sc_memr, offset, value);

sys/powerpc/powernv/xive.c

269

bus_write_1(sc->sc_mem, sc->sc_offset + offset, val);

sys/powerpc/pseries/xics.c

264

bus_write_1(sc->mem[i], 4, 0xff);

sys/powerpc/pseries/xics.c

265

bus_write_1(sc->mem[i], 12, 0xff);

sys/powerpc/pseries/xics.c

404

bus_write_1(regs, 12, 0xff);

sys/powerpc/pseries/xics.c

508

bus_write_1(xicp_mem_for_cpu(cpu), 12, XICP_PRIORITY);

sys/riscv/starfive/jh7110_pcie.c

211

bus_write_1(sc->cfg_mem_res, offset, val);

tools/bus_space/C/libbus.h

36

int bus_write_1(int rid, long ofs, uint8_t val);

tools/bus_space/Python/lang.c

424

{ "write_1", bus_write_1, METH_VARARGS, "Write a 1-byte data item." },