sys/dev/pci/drm/amd/amdgpu/aldebaran.c

332

amdgpu_device_set_cg_state(adev, AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

3431

i = state == AMD_CG_STATE_GATE ? j : adev->num_ip_blocks - j - 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

3580

amdgpu_device_set_cg_state(adev, AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

1285

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/amdgpu_vce.c

349

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/athub_v1_0.c

79

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/athub_v1_0.c

81

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/athub_v2_0.c

85

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/athub_v2_0.c

87

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/athub_v2_1.c

78

athub_v2_1_update_medium_grain_clock_gating(adev, state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/athub_v2_1.c

79

athub_v2_1_update_medium_grain_light_sleep(adev, state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/athub_v3_0.c

116

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/athub_v3_0.c

118

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/athub_v4_1_0.c

101

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/athub_v4_1_0.c

99

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/cik_sdma.c

1190

if (state == AMD_CG_STATE_GATE)

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8490

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5730

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4264

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

3451

if (state == AMD_CG_STATE_GATE)

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

4823

if (state == AMD_CG_STATE_GATE)

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

5952

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5291

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2782

adev, state == AMD_CG_STATE_GATE, i);

sys/dev/pci/drm/amd/amdgpu/gmc_v6_0.c

1104

if (state == AMD_CG_STATE_GATE)

sys/dev/pci/drm/amd/amdgpu/gmc_v7_0.c

1321

if (state == AMD_CG_STATE_GATE)

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

1674

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

1676

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/ih_v6_0.c

705

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/ih_v6_1.c

682

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/ih_v7_0.c

672

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

709

bool enable = (state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

561

bool enable = (state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/jpeg_v3_0.c

501

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0.c

661

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1049

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_5.c

689

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_0.c

587

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_1.c

700

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_0.c

590

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_0.c

592

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_7.c

560

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_7.c

565

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v2_0.c

664

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v2_0.c

666

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v2_3.c

577

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v2_3.c

579

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0.c

628

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0.c

632

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_1.c

564

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_1.c

566

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_2.c

550

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_2.c

552

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c

712

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c

714

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v4_1_0.c

609

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v4_1_0.c

613

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c

678

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c

680

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/navi10_ih.c

675

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/nv.c

1060

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/nv.c

1062

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/nv.c

1064

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/nv.c

1066

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1501

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

1503

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

2309

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

2311

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

2019

adev, state == AMD_CG_STATE_GATE, inst_mask);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

2021

adev, state == AMD_CG_STATE_GATE, inst_mask);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1836

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1838

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1808

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1810

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/si_dma.c

656

enable = (state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/sienna_cichlid.c

210

amdgpu_device_set_cg_state(adev, AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/smu_v13_0_10.c

211

amdgpu_device_set_cg_state(adev, AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1430

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1432

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1434

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1436

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1438

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1440

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1442

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1448

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1450

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1452

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1454

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1456

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc15.c

1461

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc21.c

975

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc21.c

977

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc21.c

979

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc24.c

547

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc24.c

549

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/soc24.c

551

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

771

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

259

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

252

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

797

bool enable = (state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

1459

bool enable = (state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

578

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

646

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vce_v2_0.c

517

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vce_v2_0.c

589

if (state == AMD_CG_STATE_GATE) {

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

500

return vce_v3_0_set_clockgating_state(ip_block, AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

528

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c

767

bool enable = (state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vce_v4_0.c

594

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1447

bool enable = (state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1401

bool enable = (state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1988

bool enable = (state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

2251

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

2110

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1732

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

1595

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

1316

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

1432

bool enable = state == AMD_CG_STATE_GATE;

sys/dev/pci/drm/amd/amdgpu/vega10_ih.c

613

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vega20_ih.c

710

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vi.c

1958

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vi.c

1960

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vi.c

1962

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vi.c

1964

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vi.c

1969

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vi.c

1971

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vi.c

1973

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/amdgpu/vi.c

1975

state == AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/pm/amdgpu_dpm.c

1081

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_clockpowergating.c

126

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_clockpowergating.c

154

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

1991

AMD_CG_STATE_GATE);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

2023

AMD_CG_STATE_GATE);