sys/dev/ic/z8530tty.c

896

uint8_t tmp3, tmp4, tmp5;

sys/dev/ic/z8530tty.c

956

tmp3 = cs->cs_preg[3];

sys/dev/ic/z8530tty.c

958

CLR(tmp3, ZSWR3_RXSIZE);

sys/dev/ic/z8530tty.c

962

SET(tmp3, ZSWR3_RX_5);

sys/dev/ic/z8530tty.c

966

SET(tmp3, ZSWR3_RX_6);

sys/dev/ic/z8530tty.c

970

SET(tmp3, ZSWR3_RX_7);

sys/dev/ic/z8530tty.c

974

SET(tmp3, ZSWR3_RX_8);

sys/dev/ic/z8530tty.c

978

cs->cs_preg[3] = tmp3;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1808

uint16_t tmp3 = 0;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1929

&tmp3);

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1930

tmp3 = (tmp3 >> 5) & 0x3;

sys/dev/pci/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

1931

data->vddc_phase_shed_control = ((tmp3 << 1) | (tmp3 >> 1)) & 0x3;