bin/ksh/vi.c

1875

char mc; /* new "more character" at the right of window */

bin/ksh/vi.c

1996

mc = '+';

bin/ksh/vi.c

1998

mc = '<';

bin/ksh/vi.c

2000

mc = '>';

bin/ksh/vi.c

2002

mc = ' ';

bin/ksh/vi.c

2003

if (mc != morec) {

bin/ksh/vi.c

2005

x_putc(mc);

bin/ksh/vi.c

2007

morec = mc;

games/sail/pl_3.c

144

hit += QUAL[index][mc->qual-1];

games/sail/pl_3.c

165

if (((temp = mc->class) >= 5 || temp == 1) && windspeed == 5)

games/sail/pl_3.c

54

crew[0] = mc->crew1;

games/sail/pl_3.c

55

crew[1] = mc->crew2;

games/sail/pl_3.c

56

crew[2] = mc->crew3;

games/sail/pl_3.c

74

guns = mc->gunR;

games/sail/pl_3.c

75

car = mc->carR;

games/sail/pl_3.c

79

guns = mc->gunL;

games/sail/pl_3.c

80

car = mc->carL;

games/sail/pl_4.c

43

rig = mc->rig1;

games/sail/pl_4.c

45

if (windspeed == 6 || (windspeed == 5 && mc->class > 4))

games/sail/pl_4.c

47

if (mc->crew3 && rig) {

games/sail/pl_5.c

154

crew[0] = mc->crew1;

games/sail/pl_5.c

155

crew[1] = mc->crew2;

games/sail/pl_5.c

156

crew[2] = mc->crew3;

games/sail/pl_5.c

55

if (!mc->crew3 || snagged(ms) || !windspeed) {

games/sail/pl_6.c

150

if (!mc->crew3) {

games/sail/pl_6.c

44

struct shipspecs *ptr = mc;

games/sail/pl_7.c

134

if (mf->FS && (!mc->rig1 || windspeed == 6))

games/sail/pl_7.c

342

(void) wprintw(stat_w, "Hull %2d\n", mc->hull);

games/sail/pl_7.c

344

mc->crew1, mc->crew2, mc->crew3);

games/sail/pl_7.c

345

(void) wprintw(stat_w, "Guns %2d %2d\n", mc->gunL, mc->gunR);

games/sail/pl_7.c

346

(void) wprintw(stat_w, "Carr %2d %2d\n", mc->carL, mc->carR);

games/sail/pl_7.c

347

(void) wprintw(stat_w, "Rigg %d %d %d ", mc->rig1, mc->rig2, mc->rig3);

games/sail/pl_7.c

348

if (mc->rig4 < 0)

games/sail/pl_7.c

351

(void) wprintw(stat_w, "%d", mc->rig4);

games/sail/pl_7.c

458

mc->class,

games/sail/pl_7.c

459

classname[mc->class],

games/sail/pl_7.c

460

mc->guns,

games/sail/pl_7.c

65

struct shipspecs *mc; /* ms->specs */

games/sail/pl_main.c

165

mc = ms->specs;

games/sail/pl_main.c

185

ms->shipname, mc->guns, classname[mc->class],

games/sail/pl_main.c

186

qualname[mc->qual]);

games/sail/player.h

112

extern struct shipspecs *mc; /* ms->specs */

sbin/unwind/libunbound/util/data/msgreply.c

699

int mc;

sbin/unwind/libunbound/util/data/msgreply.c

702

if((mc = query_dname_compare(msg1->qname, msg2->qname)) != 0)

sbin/unwind/libunbound/util/data/msgreply.c

703

return mc;

sys/arch/alpha/pci/mcpcia.c

85

#define MCPCIA_SYSBASE(mc) \

sys/arch/alpha/pci/mcpcia.c

86

((((unsigned long) (mc)->cc_gid) << MCBUS_GID_SHIFT) | \

sys/arch/alpha/pci/mcpcia.c

87

(((unsigned long) (mc)->cc_mid) << MCBUS_MID_SHIFT) | \

sys/arch/amd64/stand/libsa/softraid_amd64.c

130

struct sr_meta_chunk *mc;

sys/arch/amd64/stand/libsa/softraid_amd64.c

182

mc = (struct sr_meta_chunk *)(md + 1);

sys/arch/amd64/stand/libsa/softraid_amd64.c

183

mc += md->ssdi.ssd_chunk_id;

sys/arch/amd64/stand/libsa/softraid_amd64.c

197

bc->sbc_state = mc->scm_status;

sys/arch/arm64/dev/aplmbox.c

146

aplmbox_channel(void *cookie, uint32_t *cells, struct mbox_client *mc)

sys/arch/arm64/dev/aplmbox.c

150

if (mc) {

sys/arch/arm64/dev/aplmbox.c

151

sc->sc_rx_callback = mc->mc_rx_callback;

sys/arch/arm64/dev/aplmbox.c

152

sc->sc_rx_arg = mc->mc_rx_arg;

sys/arch/arm64/dev/aplmbox.c

154

if (mc->mc_flags & MC_WAKEUP)

sys/arch/arm64/dev/rtkit.c

107

struct mbox_channel *mc;

sys/arch/arm64/dev/rtkit.c

139

rtkit_recv(struct mbox_channel *mc, struct aplmbox_msg *msg)

sys/arch/arm64/dev/rtkit.c

141

return mbox_recv(mc, msg, sizeof(*msg));

sys/arch/arm64/dev/rtkit.c

158

return mbox_send(state->mc, &msg, sizeof(msg));

sys/arch/arm64/dev/rtkit.c

758

struct mbox_channel *mc = state->mc;

sys/arch/arm64/dev/rtkit.c

765

error = rtkit_recv(mc, &msg);

sys/arch/arm64/dev/rtkit.c

837

state->mc = mbox_channel(node, name, &client);

sys/arch/arm64/dev/rtkit.c

838

if (state->mc == NULL) {

sys/arch/arm64/stand/efiboot/softraid_arm64.c

133

struct sr_meta_chunk *mc;

sys/arch/arm64/stand/efiboot/softraid_arm64.c

179

mc = (struct sr_meta_chunk *)(md + 1);

sys/arch/arm64/stand/efiboot/softraid_arm64.c

180

mc += md->ssdi.ssd_chunk_id;

sys/arch/arm64/stand/efiboot/softraid_arm64.c

191

bc->sbc_state = mc->scm_status;

sys/arch/hppa/dev/cpu.c

125

printf("L%s-%c ", lvls[pdc_model.pa_lvl], "AB"[pdc_model.mc]);

sys/arch/hppa/include/pdc.h

332

u_int mc : 1; /* module category (A - 0, B - 1) */

sys/arch/i386/stand/libsa/softraid_i386.c

126

struct sr_meta_chunk *mc;

sys/arch/i386/stand/libsa/softraid_i386.c

178

mc = (struct sr_meta_chunk *)(md + 1);

sys/arch/i386/stand/libsa/softraid_i386.c

179

mc += md->ssdi.ssd_chunk_id;

sys/arch/i386/stand/libsa/softraid_i386.c

193

bc->sbc_state = mc->scm_status;

sys/arch/macppc/dev/awacs.c

657

awacs_set_port(void *h, mixer_ctrl_t *mc)

sys/arch/macppc/dev/awacs.c

662

DPRINTF("awacs_set_port dev = %d, type = %d\n", mc->dev, mc->type);

sys/arch/macppc/dev/awacs.c

664

l = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT];

sys/arch/macppc/dev/awacs.c

665

r = mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];

sys/arch/macppc/dev/awacs.c

667

switch (mc->dev) {

sys/arch/macppc/dev/awacs.c

670

if (mc->un.mask == sc->sc_output_mask)

sys/arch/macppc/dev/awacs.c

673

if (mc->un.mask & 1 << 0)

sys/arch/macppc/dev/awacs.c

675

if (mc->un.mask & 1 << 1)

sys/arch/macppc/dev/awacs.c

679

sc->sc_output_mask = mc->un.mask;

sys/arch/macppc/dev/awacs.c

698

if (mc->un.mask == sc->sc_record_source)

sys/arch/macppc/dev/awacs.c

700

switch(mc->un.mask) {

sys/arch/macppc/dev/awacs.c

719

sc->sc_record_source = mc->un.mask;

sys/arch/macppc/dev/awacs.c

727

awacs_get_port(void *h, mixer_ctrl_t *mc)

sys/arch/macppc/dev/awacs.c

732

DPRINTF("awacs_get_port dev = %d, type = %d\n", mc->dev, mc->type);

sys/arch/macppc/dev/awacs.c

734

switch (mc->dev) {

sys/arch/macppc/dev/awacs.c

736

mc->un.mask = sc->sc_output_mask;

sys/arch/macppc/dev/awacs.c

743

mc->un.mask = 1 << 0;

sys/arch/macppc/dev/awacs.c

744

mc->un.value.num_channels = 2;

sys/arch/macppc/dev/awacs.c

745

mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = l;

sys/arch/macppc/dev/awacs.c

746

mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r;

sys/arch/macppc/dev/awacs.c

753

mc->un.mask = 1 << 1;

sys/arch/macppc/dev/awacs.c

754

mc->un.value.num_channels = 2;

sys/arch/macppc/dev/awacs.c

755

mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = l;

sys/arch/macppc/dev/awacs.c

756

mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r;

sys/arch/macppc/dev/awacs.c

760

mc->un.mask = sc->sc_record_source;

sys/arch/macppc/dev/awacs.c

767

mc->un.mask = sc->sc_record_source;

sys/arch/macppc/dev/awacs.c

768

mc->un.value.num_channels = 2;

sys/arch/macppc/dev/awacs.c

769

mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = l;

sys/arch/macppc/dev/awacs.c

770

mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r;

sys/arch/macppc/dev/i2s.c

312

i2s_set_port(void *h, mixer_ctrl_t *mc)

sys/arch/macppc/dev/i2s.c

317

DPRINTF(("i2s_set_port dev = %d, type = %d\n", mc->dev, mc->type));

sys/arch/macppc/dev/i2s.c

319

l = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT];

sys/arch/macppc/dev/i2s.c

320

r = mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];

sys/arch/macppc/dev/i2s.c

322

switch (mc->dev) {

sys/arch/macppc/dev/i2s.c

325

if (mc->un.mask == sc->sc_output_mask)

sys/arch/macppc/dev/i2s.c

331

if (mc->un.mask & I2S_SELECT_SPEAKER)

sys/arch/macppc/dev/i2s.c

333

if (mc->un.mask & I2S_SELECT_HEADPHONE)

sys/arch/macppc/dev/i2s.c

335

if (mc->un.mask & I2S_SELECT_LINEOUT)

sys/arch/macppc/dev/i2s.c

338

sc->sc_output_mask = mc->un.mask;

sys/arch/macppc/dev/i2s.c

346

if (mc->type != AUDIO_MIXER_ENUM)

sys/arch/macppc/dev/i2s.c

349

sc->sc_mute = (mc->un.ord != 0);

sys/arch/macppc/dev/i2s.c

381

if (mc->un.mask == sc->sc_record_source)

sys/arch/macppc/dev/i2s.c

383

switch (mc->un.mask) {

sys/arch/macppc/dev/i2s.c

392

(*sc->sc_setinput)(sc, mc->un.mask);

sys/arch/macppc/dev/i2s.c

393

sc->sc_record_source = mc->un.mask;

sys/arch/macppc/dev/i2s.c

405

i2s_get_port(void *h, mixer_ctrl_t *mc)

sys/arch/macppc/dev/i2s.c

409

DPRINTF(("i2s_get_port dev = %d, type = %d\n", mc->dev, mc->type));

sys/arch/macppc/dev/i2s.c

411

switch (mc->dev) {

sys/arch/macppc/dev/i2s.c

413

mc->un.mask = sc->sc_output_mask;

sys/arch/macppc/dev/i2s.c

417

mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = sc->sc_vol_l;

sys/arch/macppc/dev/i2s.c

418

mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = sc->sc_vol_r;

sys/arch/macppc/dev/i2s.c

422

mc->un.ord = sc->sc_mute;

sys/arch/macppc/dev/i2s.c

426

mc->un.mask = sc->sc_record_source;

sys/arch/macppc/dev/i2s.c

430

if (mc->un.value.num_channels != 1)

sys/arch/macppc/dev/i2s.c

432

mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_bass;

sys/arch/macppc/dev/i2s.c

436

if (mc->un.value.num_channels != 1)

sys/arch/macppc/dev/i2s.c

438

mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->sc_treble;

sys/arch/macppc/dev/i2s.c

443

mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 0;

sys/arch/macppc/dev/i2s.c

444

mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 0;

sys/arch/riscv64/stand/efiboot/softraid_riscv64.c

133

struct sr_meta_chunk *mc;

sys/arch/riscv64/stand/efiboot/softraid_riscv64.c

179

mc = (struct sr_meta_chunk *)(md + 1);

sys/arch/riscv64/stand/efiboot/softraid_riscv64.c

180

mc += md->ssdi.ssd_chunk_id;

sys/arch/riscv64/stand/efiboot/softraid_riscv64.c

191

bc->sbc_state = mc->scm_status;

sys/arch/sparc64/stand/ofwboot/softraid_sparc64.c

128

struct sr_meta_chunk *mc;

sys/arch/sparc64/stand/ofwboot/softraid_sparc64.c

179

mc = (struct sr_meta_chunk *)(md + 1);

sys/arch/sparc64/stand/ofwboot/softraid_sparc64.c

180

mc += md->ssdi.ssd_chunk_id;

sys/arch/sparc64/stand/ofwboot/softraid_sparc64.c

196

bc->sbc_state = mc->scm_status;

sys/dev/acpi/acpidmar.c

429

struct dmar_map_cookie *mc = dmam->_dm_cookie;

sys/dev/acpi/acpidmar.c

431

if (mc)

sys/dev/acpi/acpidmar.c

432

return mc->dm_orig_flags;

sys/dev/acpi/acpidmar.c

782

struct dmar_map_cookie *mc = map->_dm_cookie;

sys/dev/acpi/acpidmar.c

839

EX_NOWAIT, &mc->dm_er[i], &res);

sys/dev/acpi/acpidmar.c

897

struct dmar_map_cookie *mc;

sys/dev/acpi/acpidmar.c

906

mc = malloc(sizeof(*mc), M_DEVBUF,

sys/dev/acpi/acpidmar.c

908

if (mc == NULL) {

sys/dev/acpi/acpidmar.c

912

mc->dm_er = mallocarray(dmam->_dm_segcnt, sizeof(*mc->dm_er),

sys/dev/acpi/acpidmar.c

914

if (mc->dm_er == NULL) {

sys/dev/acpi/acpidmar.c

915

free(mc, M_DEVBUF, sizeof(*mc));

sys/dev/acpi/acpidmar.c

919

mc->dm_orig_flags = flags & ~(BUS_DMA_WAITOK | BUS_DMA_NOWAIT);

sys/dev/acpi/acpidmar.c

921

dmam->_dm_cookie = mc;

sys/dev/acpi/acpidmar.c

930

struct dmar_map_cookie *mc = dmam->_dm_cookie;

sys/dev/acpi/acpidmar.c

933

free(mc->dm_er, M_DEVBUF, dmam->_dm_segcnt * sizeof(*mc->dm_er));

sys/dev/acpi/acpidmar.c

934

free(mc, M_DEVBUF, sizeof(*mc));

sys/dev/fdt/es8316ac.c

524

escodec_set_port(void *priv, mixer_ctrl_t *mc)

sys/dev/fdt/es8316ac.c

531

if ((mix = escodec_get_mixer(mc->dev)) == NULL)

sys/dev/fdt/es8316ac.c

541

nvol = mc->un.value.level[ch] >> shift;

sys/dev/fdt/es8316ac.c

555

if (mc->un.ord < 0 || mc->un.ord > 1)

sys/dev/fdt/es8316ac.c

559

if (mc->un.ord)

sys/dev/fdt/es8316ac.c

573

escodec_get_port(void *priv, mixer_ctrl_t *mc)

sys/dev/fdt/es8316ac.c

580

if ((mix = escodec_get_mixer(mc->dev)) == NULL)

sys/dev/fdt/es8316ac.c

594

mc->un.value.level[ch] = nvol;

sys/dev/fdt/es8316ac.c

602

mc->un.ord = (val & mix->mask[0]) != 0;

sys/dev/fdt/qccpucp.c

130

qccpucp_channel(void *cookie, uint32_t *cells, struct mbox_client *mc)

sys/dev/fdt/qcipcc.c

245

qcipcc_channel(void *cookie, uint32_t *cells, struct mbox_client *mc)

sys/dev/fdt/sncodec.c

271

sncodec_set_port(void *priv, mixer_ctrl_t *mc)

sys/dev/fdt/sncodec.c

277

switch (mc->dev) {

sys/dev/fdt/sncodec.c

279

level = mc->un.value.level[AUDIO_MIXER_LEVEL_MONO];

sys/dev/fdt/sncodec.c

285

sc->sc_mute = mc->un.ord ?

sys/dev/fdt/sncodec.c

301

sncodec_get_port(void *priv, mixer_ctrl_t *mc)

sys/dev/fdt/sncodec.c

306

switch (mc->dev) {

sys/dev/fdt/sncodec.c

308

mc->un.value.num_channels = 1;

sys/dev/fdt/sncodec.c

310

mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] = level;

sys/dev/fdt/sncodec.c

314

mc->un.ord = (sc->sc_mute == MODE_CTRL_MODE_MUTE);

sys/dev/fdt/tascodec.c

258

tascodec_set_port(void *priv, mixer_ctrl_t *mc)

sys/dev/fdt/tascodec.c

264

switch (mc->dev) {

sys/dev/fdt/tascodec.c

266

level = mc->un.value.level[AUDIO_MIXER_LEVEL_MONO];

sys/dev/fdt/tascodec.c

272

sc->sc_mute = mc->un.ord ?

sys/dev/fdt/tascodec.c

289

tascodec_get_port(void *priv, mixer_ctrl_t *mc)

sys/dev/fdt/tascodec.c

294

switch (mc->dev) {

sys/dev/fdt/tascodec.c

296

mc->un.value.num_channels = 1;

sys/dev/fdt/tascodec.c

298

mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] = level;

sys/dev/fdt/tascodec.c

302

mc->un.ord = (sc->sc_mute == PWR_CTL_MODE_MUTE);

sys/dev/ic/arcofi.c

668

arcofi_set_port(void *v, mixer_ctrl_t *mc)

sys/dev/ic/arcofi.c

674

switch (mc->dev) {

sys/dev/ic/arcofi.c

679

if (mc->un.value.num_channels != 1)

sys/dev/ic/arcofi.c

686

if (mc->type != AUDIO_MIXER_ENUM)

sys/dev/ic/arcofi.c

699

switch (mc->dev) {

sys/dev/ic/arcofi.c

703

arcofi_mi_to_gain(mc->un.value.level[AUDIO_MIXER_LEVEL_MONO]);

sys/dev/ic/arcofi.c

708

arcofi_mi_to_gain(mc->un.value.level[AUDIO_MIXER_LEVEL_MONO]);

sys/dev/ic/arcofi.c

713

if (mc->un.ord)

sys/dev/ic/arcofi.c

719

if (mc->un.ord)

sys/dev/ic/arcofi.c

725

if (mc->un.ord)

sys/dev/ic/arcofi.c

745

arcofi_get_port(void *v, mixer_ctrl_t *mc)

sys/dev/ic/arcofi.c

751

switch (mc->dev) {

sys/dev/ic/arcofi.c

756

if (mc->un.value.num_channels != 1)

sys/dev/ic/arcofi.c

764

if (mc->type != AUDIO_MIXER_ENUM)

sys/dev/ic/arcofi.c

777

switch (mc->dev) {

sys/dev/ic/arcofi.c

780

mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] =

sys/dev/ic/arcofi.c

785

mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] =

sys/dev/ic/arcofi.c

791

mc->un.ord = portmask & AUDIO_LINE_IN ? 0 : 1;

sys/dev/ic/arcofi.c

794

mc->un.ord = portmask & AUDIO_LINE_OUT ? 0 : 1;

sys/dev/ic/arcofi.c

797

mc->un.ord = portmask & AUDIO_SPEAKER ? 0 : 1;

sys/dev/ic/dwhdmi.c

769

dwhdmi_audio_set_port(void *priv, mixer_ctrl_t *mc)

sys/dev/ic/dwhdmi.c

773

switch (mc->dev) {

sys/dev/ic/dwhdmi.c

776

sc->sc_swvol = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT];

sys/dev/ic/dwhdmi.c

784

dwhdmi_audio_get_port(void *priv, mixer_ctrl_t *mc)

sys/dev/ic/dwhdmi.c

788

switch (mc->dev) {

sys/dev/ic/dwhdmi.c

791

mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = sc->sc_swvol;

sys/dev/ic/dwhdmi.c

792

mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = sc->sc_swvol;

sys/dev/ic/nvmereg.h

399

u_int8_t mc; /* Metadata Capabilities */

sys/dev/ic/ti.c

1001

free(mc, M_DEVBUF, sizeof *mc);

sys/dev/ic/ti.c

1007

mc = malloc(sizeof(struct ti_mc_entry), M_DEVBUF,

sys/dev/ic/ti.c

1009

if (mc == NULL)

sys/dev/ic/ti.c

1012

bcopy(enm->enm_addrlo, &mc->mc_addr,

sys/dev/ic/ti.c

1014

SLIST_INSERT_HEAD(&sc->ti_mc_listhead, mc,

sys/dev/ic/ti.c

1016

ti_add_mcast(sc, &mc->mc_addr);

sys/dev/ic/ti.c

975

struct ti_mc_entry *mc;

sys/dev/ic/ti.c

998

mc = SLIST_FIRST(&sc->ti_mc_listhead);

sys/dev/ic/ti.c

999

ti_del_mcast(sc, &mc->mc_addr);

sys/dev/ofw/ofw_misc.c

1246

struct mbox_channel *mc;

sys/dev/ofw/ofw_misc.c

1258

mc = malloc(sizeof(*mc), M_DEVBUF, M_WAITOK);

sys/dev/ofw/ofw_misc.c

1259

mc->mc_md = md;

sys/dev/ofw/ofw_misc.c

1260

mc->mc_cookie = cookie;

sys/dev/ofw/ofw_misc.c

1261

return mc;

sys/dev/ofw/ofw_misc.c

1285

struct mbox_channel *mc = NULL;

sys/dev/ofw/ofw_misc.c

1300

mc = mbox_channel_cells(mbox, client);

sys/dev/ofw/ofw_misc.c

1308

return mc;

sys/dev/ofw/ofw_misc.c

1324

mbox_send(struct mbox_channel *mc, const void *data, size_t len)

sys/dev/ofw/ofw_misc.c

1326

struct mbox_device *md = mc->mc_md;

sys/dev/ofw/ofw_misc.c

1329

return md->md_send(mc->mc_cookie, data, len);

sys/dev/ofw/ofw_misc.c

1335

mbox_recv(struct mbox_channel *mc, void *data, size_t len)

sys/dev/ofw/ofw_misc.c

1337

struct mbox_device *md = mc->mc_md;

sys/dev/ofw/ofw_misc.c

1340

return md->md_recv(mc->mc_cookie, data, len);

sys/dev/pci/auixp.c

407

auixp_set_port(void *hdl, mixer_ctrl_t *mc)

sys/dev/pci/auixp.c

412

return co->codec_if->vtbl->mixer_set_port(co->codec_if, mc);

sys/dev/pci/auixp.c

418

auixp_get_port(void *hdl, mixer_ctrl_t *mc)

sys/dev/pci/auixp.c

423

return co->codec_if->vtbl->mixer_get_port(co->codec_if, mc);

sys/dev/pci/azalia.c

4068

azalia_set_port(void *v, mixer_ctrl_t *mc)

sys/dev/pci/azalia.c

4076

if (mc->dev < 0 || mc->dev >= co->nmixers)

sys/dev/pci/azalia.c

4079

m = &co->mixers[mc->dev];

sys/dev/pci/azalia.c

4080

if (mc->type != m->devinfo.type)

sys/dev/pci/azalia.c

4083

return azalia_mixer_set(co, m->nid, m->target, mc);

sys/dev/pci/azalia.c

4087

azalia_get_port(void *v, mixer_ctrl_t *mc)

sys/dev/pci/azalia.c

4095

if (mc->dev < 0 || mc->dev >= co->nmixers)

sys/dev/pci/azalia.c

4098

m = &co->mixers[mc->dev];

sys/dev/pci/azalia.c

4099

mc->type = m->devinfo.type;

sys/dev/pci/azalia.c

4101

return azalia_mixer_get(co, m->nid, m->target, mc);

sys/dev/pci/azalia_codec.c

1486

mixer_ctrl_t mc;

sys/dev/pci/azalia_codec.c

1497

bzero(&mc, sizeof(mc));

sys/dev/pci/azalia_codec.c

1498

mc.dev = i;

sys/dev/pci/azalia_codec.c

1499

mc.type = AUDIO_MIXER_ENUM;

sys/dev/pci/azalia_codec.c

1500

azalia_mixer_set(this, m->nid, m->target, &mc);

sys/dev/pci/azalia_codec.c

1511

bzero(&mc, sizeof(mc));

sys/dev/pci/azalia_codec.c

1512

mc.dev = i;

sys/dev/pci/azalia_codec.c

1513

mc.type = AUDIO_MIXER_VALUE;

sys/dev/pci/azalia_codec.c

1514

mc.un.value.num_channels = 1;

sys/dev/pci/azalia_codec.c

1515

mc.un.value.level[0] = AUDIO_MAX_GAIN / 2;

sys/dev/pci/azalia_codec.c

1517

mc.un.value.num_channels = 2;

sys/dev/pci/azalia_codec.c

1518

mc.un.value.level[1] = mc.un.value.level[0];

sys/dev/pci/azalia_codec.c

1520

azalia_mixer_set(this, m->nid, m->target, &mc);

sys/dev/pci/azalia_codec.c

1530

bzero(&mc, sizeof(mc));

sys/dev/pci/azalia_codec.c

1531

mc.dev = i;

sys/dev/pci/azalia_codec.c

1532

mc.type = AUDIO_MIXER_SET;

sys/dev/pci/azalia_codec.c

1544

mc.un.mask |= 1 << j;

sys/dev/pci/azalia_codec.c

1546

azalia_mixer_set(this, m->nid, m->target, &mc);

sys/dev/pci/azalia_codec.c

1555

azalia_mixer_get(this, m->nid, m->target, &mc);

sys/dev/pci/azalia_codec.c

1557

if (mc.un.ord == m->devinfo.un.e.member[j].ord)

sys/dev/pci/azalia_codec.c

1561

bzero(&mc, sizeof(mc));

sys/dev/pci/azalia_codec.c

1562

mc.dev = i;

sys/dev/pci/azalia_codec.c

1563

mc.type = AUDIO_MIXER_ENUM;

sys/dev/pci/azalia_codec.c

1564

mc.un.ord = m->devinfo.un.e.member[0].ord;

sys/dev/pci/azalia_codec.c

1566

azalia_mixer_set(this, m->nid, m->target, &mc);

sys/dev/pci/azalia_codec.c

1576

mc.type = AUDIO_MIXER_VALUE;

sys/dev/pci/azalia_codec.c

1578

azalia_mixer_get(this, w->nid, tgt, &mc);

sys/dev/pci/azalia_codec.c

1579

this->playvols.vol_l = mc.un.value.level[0];

sys/dev/pci/azalia_codec.c

1580

this->playvols.vol_r = mc.un.value.level[0];

sys/dev/pci/azalia_codec.c

1590

mc.type = AUDIO_MIXER_VALUE;

sys/dev/pci/azalia_codec.c

1600

azalia_mixer_get(this, w->nid, tgt, &mc);

sys/dev/pci/azalia_codec.c

1601

this->recvols.vol_l = mc.un.value.level[0];

sys/dev/pci/azalia_codec.c

1602

this->recvols.vol_r = mc.un.value.level[0];

sys/dev/pci/azalia_codec.c

1690

mixer_ctrl_t *mc)

sys/dev/pci/azalia_codec.c

1696

if (mc->type == AUDIO_MIXER_CLASS) {

sys/dev/pci/azalia_codec.c

1701

else if (IS_MI_TARGET_INAMP(target) && mc->type == AUDIO_MIXER_ENUM) {

sys/dev/pci/azalia_codec.c

1707

mc->un.ord = result & CORB_GAGM_MUTE ? 1 : 0;

sys/dev/pci/azalia_codec.c

1711

else if (IS_MI_TARGET_INAMP(target) && mc->type == AUDIO_MIXER_VALUE) {

sys/dev/pci/azalia_codec.c

1717

mc->un.value.level[0] = azalia_mixer_from_device_value(this,

sys/dev/pci/azalia_codec.c

1729

mc->un.value.num_channels = WIDGET_CHANNELS(&this->w[n]);

sys/dev/pci/azalia_codec.c

1730

if (mc->un.value.num_channels == 2) {

sys/dev/pci/azalia_codec.c

1737

mc->un.value.level[1] = azalia_mixer_from_device_value

sys/dev/pci/azalia_codec.c

1743

else if (target == MI_TARGET_OUTAMP && mc->type == AUDIO_MIXER_ENUM) {

sys/dev/pci/azalia_codec.c

1748

mc->un.ord = result & CORB_GAGM_MUTE ? 1 : 0;

sys/dev/pci/azalia_codec.c

1752

else if (target == MI_TARGET_OUTAMP && mc->type == AUDIO_MIXER_VALUE) {

sys/dev/pci/azalia_codec.c

1757

mc->un.value.level[0] = azalia_mixer_from_device_value(this,

sys/dev/pci/azalia_codec.c

1759

mc->un.value.num_channels = WIDGET_CHANNELS(&this->w[nid]);

sys/dev/pci/azalia_codec.c

1760

if (mc->un.value.num_channels == 2) {

sys/dev/pci/azalia_codec.c

1766

mc->un.value.level[1] = azalia_mixer_from_device_value

sys/dev/pci/azalia_codec.c

1780

mc->un.ord = -1;

sys/dev/pci/azalia_codec.c

1782

mc->un.ord = result;

sys/dev/pci/azalia_codec.c

1794

mc->un.ord = 0;

sys/dev/pci/azalia_codec.c

1796

mc->un.ord = 1;

sys/dev/pci/azalia_codec.c

1801

mc->un.ord = 3;

sys/dev/pci/azalia_codec.c

1803

mc->un.ord = 4;

sys/dev/pci/azalia_codec.c

1805

mc->un.ord = 5;

sys/dev/pci/azalia_codec.c

1807

mc->un.ord = 6;

sys/dev/pci/azalia_codec.c

1809

mc->un.ord = 2;

sys/dev/pci/azalia_codec.c

1819

mc->un.ord = result & CORB_PWC_HEADPHONE ? 1 : 0;

sys/dev/pci/azalia_codec.c

1824

mc->un.ord = this->dacs.cur;

sys/dev/pci/azalia_codec.c

1829

mc->un.ord = this->adcs.cur;

sys/dev/pci/azalia_codec.c

1838

mc->un.mask = result & 0xff & ~(CORB_DCC_DIGEN | CORB_DCC_NAUDIO);

sys/dev/pci/azalia_codec.c

1844

mc->un.value.num_channels = 1;

sys/dev/pci/azalia_codec.c

1845

mc->un.value.level[0] = CORB_DCC_CC(result);

sys/dev/pci/azalia_codec.c

1854

mc->un.ord = result & CORB_EAPD_EAPD ? 1 : 0;

sys/dev/pci/azalia_codec.c

1863

mc->un.ord = result & CORB_PS_PRESENCE ? 1 : 0;

sys/dev/pci/azalia_codec.c

1867

else if (target == MI_TARGET_MUTESET && mc->type == AUDIO_MIXER_SET) {

sys/dev/pci/azalia_codec.c

1875

mc->un.mask = 0;

sys/dev/pci/azalia_codec.c

1885

mc->un.mask |= (result & CORB_GAGM_MUTE) ? 0 : (1 << i);

sys/dev/pci/azalia_codec.c

1890

else if (target == MI_TARGET_MIXERSET && mc->type == AUDIO_MIXER_SET) {

sys/dev/pci/azalia_codec.c

1898

mc->un.mask = 0;

sys/dev/pci/azalia_codec.c

1902

mc->un.mask |= (1 << i);

sys/dev/pci/azalia_codec.c

1906

else if (target == MI_TARGET_SENSESET && mc->type == AUDIO_MIXER_SET) {

sys/dev/pci/azalia_codec.c

1909

mc->un.mask = this->spkr_muters;

sys/dev/pci/azalia_codec.c

1918

if (mc->type == AUDIO_MIXER_VALUE) {

sys/dev/pci/azalia_codec.c

1919

mc->un.value.num_channels = 2;

sys/dev/pci/azalia_codec.c

1920

mc->un.value.level[0] = this->playvols.vol_l;

sys/dev/pci/azalia_codec.c

1921

mc->un.value.level[1] = this->playvols.vol_r;

sys/dev/pci/azalia_codec.c

1923

} else if (mc->type == AUDIO_MIXER_ENUM) {

sys/dev/pci/azalia_codec.c

1924

mc->un.ord = this->playvols.mute;

sys/dev/pci/azalia_codec.c

1926

} else if (mc->type == AUDIO_MIXER_SET) {

sys/dev/pci/azalia_codec.c

1927

mc->un.mask = this->playvols.cur;

sys/dev/pci/azalia_codec.c

1938

if (mc->type == AUDIO_MIXER_VALUE) {

sys/dev/pci/azalia_codec.c

1939

mc->un.value.num_channels = 2;

sys/dev/pci/azalia_codec.c

1940

mc->un.value.level[0] = this->recvols.vol_l;

sys/dev/pci/azalia_codec.c

1941

mc->un.value.level[1] = this->recvols.vol_r;

sys/dev/pci/azalia_codec.c

1943

} else if (mc->type == AUDIO_MIXER_ENUM) {

sys/dev/pci/azalia_codec.c

1944

mc->un.ord = this->recvols.mute;

sys/dev/pci/azalia_codec.c

1946

} else if (mc->type == AUDIO_MIXER_SET) {

sys/dev/pci/azalia_codec.c

1947

mc->un.mask = this->recvols.cur;

sys/dev/pci/azalia_codec.c

1965

azalia_mixer_set(codec_t *this, nid_t nid, int target, const mixer_ctrl_t *mc)

sys/dev/pci/azalia_codec.c

1970

if (mc->type == AUDIO_MIXER_CLASS) {

sys/dev/pci/azalia_codec.c

1975

else if (IS_MI_TARGET_INAMP(target) && mc->type == AUDIO_MIXER_ENUM) {

sys/dev/pci/azalia_codec.c

1985

if (mc->un.ord)

sys/dev/pci/azalia_codec.c

2001

if (mc->un.ord)

sys/dev/pci/azalia_codec.c

2011

else if (IS_MI_TARGET_INAMP(target) && mc->type == AUDIO_MIXER_VALUE) {

sys/dev/pci/azalia_codec.c

2012

if (mc->un.value.num_channels < 1)

sys/dev/pci/azalia_codec.c

2020

mc->un.value.level[0]);

sys/dev/pci/azalia_codec.c

2029

if (mc->un.value.num_channels >= 2 &&

sys/dev/pci/azalia_codec.c

2038

mc->un.value.level[1]);

sys/dev/pci/azalia_codec.c

2051

else if (target == MI_TARGET_OUTAMP && mc->type == AUDIO_MIXER_ENUM) {

sys/dev/pci/azalia_codec.c

2057

if (mc->un.ord)

sys/dev/pci/azalia_codec.c

2071

if (mc->un.ord)

sys/dev/pci/azalia_codec.c

2081

else if (target == MI_TARGET_OUTAMP && mc->type == AUDIO_MIXER_VALUE) {

sys/dev/pci/azalia_codec.c

2082

if (mc->un.value.num_channels < 1)

sys/dev/pci/azalia_codec.c

2089

mc->un.value.level[0]);

sys/dev/pci/azalia_codec.c

2097

if (mc->un.value.num_channels >= 2 &&

sys/dev/pci/azalia_codec.c

2105

mc->un.value.level[1]);

sys/dev/pci/azalia_codec.c

2118

if (mc->un.ord < 0 ||

sys/dev/pci/azalia_codec.c

2119

mc->un.ord >= this->w[nid].nconnections ||

sys/dev/pci/azalia_codec.c

2121

this->w[nid].connections[mc->un.ord]))

sys/dev/pci/azalia_codec.c

2124

CORB_SET_CONNECTION_SELECT_CONTROL, mc->un.ord, &result);

sys/dev/pci/azalia_codec.c

2139

if (mc->un.ord == 0) {

sys/dev/pci/azalia_codec.c

2141

} else if (mc->un.ord == 1) {

sys/dev/pci/azalia_codec.c

2150

if (mc->un.ord == 3)

sys/dev/pci/azalia_codec.c

2152

if (mc->un.ord == 4)

sys/dev/pci/azalia_codec.c

2154

if (mc->un.ord == 5)

sys/dev/pci/azalia_codec.c

2156

if (mc->un.ord == 6)

sys/dev/pci/azalia_codec.c

2178

if (mc->un.ord >= 2)

sys/dev/pci/azalia_codec.c

2184

if (mc->un.ord == 0) {

sys/dev/pci/azalia_codec.c

2199

if (mc->un.ord >= this->dacs.ngroups)

sys/dev/pci/azalia_codec.c

2201

if (mc->un.ord != this->dacs.cur)

sys/dev/pci/azalia_codec.c

2203

mc->un.ord, this->adcs.cur);

sys/dev/pci/azalia_codec.c

2212

if (mc->un.ord >= this->adcs.ngroups)

sys/dev/pci/azalia_codec.c

2214

if (mc->un.ord != this->adcs.cur)

sys/dev/pci/azalia_codec.c

2216

this->dacs.cur, mc->un.ord);

sys/dev/pci/azalia_codec.c

2226

result |= mc->un.mask & 0xff & ~CORB_DCC_DIGEN;

sys/dev/pci/azalia_codec.c

2232

if (mc->un.value.num_channels != 1)

sys/dev/pci/azalia_codec.c

2234

if (mc->un.value.level[0] > 127)

sys/dev/pci/azalia_codec.c

2237

mc->un.value.level[0], NULL);

sys/dev/pci/azalia_codec.c

2244

if (mc->un.ord >= 2)

sys/dev/pci/azalia_codec.c

2251

if (mc->un.ord == 0) {

sys/dev/pci/azalia_codec.c

2266

else if (target == MI_TARGET_MUTESET && mc->type == AUDIO_MIXER_SET) {

sys/dev/pci/azalia_codec.c

2290

if ((mc->un.mask & (1 << i)) == 0)

sys/dev/pci/azalia_codec.c

2307

if ((mc->un.mask & (1 << i)) == 0)

sys/dev/pci/azalia_codec.c

2318

else if (target == MI_TARGET_MIXERSET && mc->type == AUDIO_MIXER_SET) {

sys/dev/pci/azalia_codec.c

2322

else if (target == MI_TARGET_SENSESET && mc->type == AUDIO_MIXER_SET) {

sys/dev/pci/azalia_codec.c

2325

this->spkr_muters = mc->un.mask;

sys/dev/pci/azalia_codec.c

2338

if (mc->type == AUDIO_MIXER_VALUE) {

sys/dev/pci/azalia_codec.c

2339

if (mc->un.value.num_channels != 2)

sys/dev/pci/azalia_codec.c

2341

this->playvols.vol_l = mc->un.value.level[0];

sys/dev/pci/azalia_codec.c

2342

this->playvols.vol_r = mc->un.value.level[1];

sys/dev/pci/azalia_codec.c

2370

} else if (mc->type == AUDIO_MIXER_ENUM) {

sys/dev/pci/azalia_codec.c

2371

if (mc->un.ord != 0 && mc->un.ord != 1)

sys/dev/pci/azalia_codec.c

2373

this->playvols.mute = mc->un.ord;

sys/dev/pci/azalia_codec.c

2401

} else if (mc->type == AUDIO_MIXER_SET) {

sys/dev/pci/azalia_codec.c

2403

(mc->un.mask & this->playvols.mask);

sys/dev/pci/azalia_codec.c

2419

if (mc->type == AUDIO_MIXER_VALUE) {

sys/dev/pci/azalia_codec.c

2420

if (mc->un.value.num_channels != 2)

sys/dev/pci/azalia_codec.c

2422

this->recvols.vol_l = mc->un.value.level[0];

sys/dev/pci/azalia_codec.c

2423

this->recvols.vol_r = mc->un.value.level[1];

sys/dev/pci/azalia_codec.c

2449

} else if (mc->type == AUDIO_MIXER_ENUM) {

sys/dev/pci/azalia_codec.c

2450

if (mc->un.ord != 0 && mc->un.ord != 1)

sys/dev/pci/azalia_codec.c

2452

this->recvols.mute = mc->un.ord;

sys/dev/pci/azalia_codec.c

2477

} else if (mc->type == AUDIO_MIXER_SET) {

sys/dev/pci/azalia_codec.c

2478

this->recvols.cur = (mc->un.mask & this->recvols.mask);

sys/dev/pci/azalia_codec.c

735

mixer_ctrl_t mc;

sys/dev/pci/azalia_codec.c

743

mc.type = AUDIO_MIXER_ENUM;

sys/dev/pci/azalia_codec.c

762

mc.un.ord = vol;

sys/dev/pci/azalia_codec.c

764

MI_TARGET_OUTAMP, &mc);

sys/dev/pci/azalia_codec.c

769

MI_TARGET_OUTAMP, &mc);

sys/dev/pci/azalia_codec.c

772

mc.un.ord = vol ? 0 : 1;

sys/dev/pci/azalia_codec.c

774

MI_TARGET_PINDIR, &mc);

sys/dev/pci/azalia_codec.c

779

MI_TARGET_PINDIR, &mc);

sys/dev/pci/azalia_codec.c

782

mc.un.ord = vol;

sys/dev/pci/azalia_codec.c

784

MI_TARGET_OUTAMP, &mc);

sys/dev/pci/azalia_codec.c

815

mc.type = AUDIO_MIXER_VALUE;

sys/dev/pci/azalia_codec.c

816

mc.un.value.num_channels = 2;

sys/dev/pci/azalia_codec.c

817

mc.un.value.level[0] = this->playvols.vol_l;

sys/dev/pci/azalia_codec.c

818

mc.un.value.level[1] = this->playvols.vol_r;

sys/dev/pci/azalia_codec.c

820

MI_TARGET_PLAYVOL, &mc);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

213

void amdgpu_gmc_vram_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

219

mc->vram_start = base;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

220

mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

221

if (limit < mc->real_vram_size)

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

222

mc->real_vram_size = limit;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

224

if (vis_limit && vis_limit < mc->visible_vram_size)

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

225

mc->visible_vram_size = vis_limit;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

227

if (mc->real_vram_size < mc->visible_vram_size)

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

228

mc->visible_vram_size = mc->real_vram_size;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

230

if (mc->xgmi.num_physical_nodes == 0) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

231

mc->fb_start = mc->vram_start;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

232

mc->fb_end = mc->vram_end;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

235

mc->mc_vram_size >> 20, mc->vram_start,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

236

mc->vram_end, mc->real_vram_size >> 20);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

255

void amdgpu_gmc_sysvm_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

258

u64 hive_vram_end = mc->xgmi.node_segment_size * mc->xgmi.num_physical_nodes - 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

259

mc->vram_start = mc->xgmi.node_segment_size * mc->xgmi.physical_node_id;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

260

mc->vram_end = mc->vram_start + mc->xgmi.node_segment_size - 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

262

mc->gart_start = ALIGN(hive_vram_end + 1, four_gb);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

263

mc->gart_end = mc->gart_start + mc->gart_size - 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

268

mc->vram_start = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

269

mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

270

mc->visible_vram_size = min(mc->visible_vram_size, mc->real_vram_size);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

272

mc->fb_start = hive_vram_start;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

273

mc->fb_end = hive_vram_end;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

276

mc->mc_vram_size >> 20, mc->vram_start,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

277

mc->vram_end, mc->real_vram_size >> 20);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

279

mc->gart_size >> 20, mc->gart_start, mc->gart_end);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

293

void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

303

size_bf = mc->fb_start;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

304

size_af = max_mc_address + 1 - ALIGN(mc->fb_end + 1, four_gb);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

306

if (mc->gart_size > max(size_bf, size_af)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

308

mc->gart_size = max(size_bf, size_af);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

313

mc->gart_start = max_mc_address - mc->gart_size + 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

316

if (size_bf >= mc->gart_size)

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

317

mc->gart_start = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

319

mc->gart_start = ALIGN(mc->fb_end, four_gb);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

323

if ((size_bf >= mc->gart_size && size_bf < size_af) ||

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

324

(size_af < mc->gart_size))

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

325

mc->gart_start = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

327

mc->gart_start = max_mc_address - mc->gart_size + 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

331

mc->gart_start &= ~(four_gb - 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

332

mc->gart_end = mc->gart_start + mc->gart_size - 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

334

mc->gart_size >> 20, mc->gart_start, mc->gart_end);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

348

void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

354

if (mc->fb_start > mc->gart_start) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

355

size_bf = (mc->fb_start & sixteen_gb_mask) -

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

356

ALIGN(mc->gart_end + 1, sixteen_gb);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

357

size_af = mc->mc_mask + 1 - ALIGN(mc->fb_end + 1, sixteen_gb);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

359

size_bf = mc->fb_start & sixteen_gb_mask;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

360

size_af = (mc->gart_start & sixteen_gb_mask) -

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

361

ALIGN(mc->fb_end + 1, sixteen_gb);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

365

mc->agp_start = (mc->fb_start - size_bf) & sixteen_gb_mask;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

366

mc->agp_size = size_bf;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

368

mc->agp_start = ALIGN(mc->fb_end + 1, sixteen_gb);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

369

mc->agp_size = size_af;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

372

mc->agp_end = mc->agp_start + mc->agp_size - 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

374

mc->agp_size >> 20, mc->agp_start, mc->agp_end);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

389

struct amdgpu_gmc *mc)

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

391

mc->agp_start = 0xffffffffffff;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

392

mc->agp_end = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.c

393

mc->agp_size = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.h

409

void amdgpu_gmc_sysvm_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.h

410

void amdgpu_gmc_vram_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.h

413

struct amdgpu_gmc *mc,

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.h

416

struct amdgpu_gmc *mc);

sys/dev/pci/drm/amd/amdgpu/amdgpu_gmc.h

418

struct amdgpu_gmc *mc);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.h

434

struct mc_firmware_header_v1_0 mc;

sys/dev/pci/drm/amd/amdgpu/gmc_v10_0.c

666

struct amdgpu_gmc *mc)

sys/dev/pci/drm/amd/amdgpu/gmc_v10_0.c

675

amdgpu_gmc_set_agp_default(adev, mc);

sys/dev/pci/drm/amd/amdgpu/gmc_v10_0.c

677

amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_BEST_FIT);

sys/dev/pci/drm/amd/amdgpu/gmc_v10_0.c

679

amdgpu_gmc_agp_location(adev, mc);

sys/dev/pci/drm/amd/amdgpu/gmc_v11_0.c

666

struct amdgpu_gmc *mc)

sys/dev/pci/drm/amd/amdgpu/gmc_v11_0.c

672

amdgpu_gmc_set_agp_default(adev, mc);

sys/dev/pci/drm/amd/amdgpu/gmc_v11_0.c

674

amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_HIGH);

sys/dev/pci/drm/amd/amdgpu/gmc_v11_0.c

678

amdgpu_gmc_agp_location(adev, mc);

sys/dev/pci/drm/amd/amdgpu/gmc_v12_0.c

680

struct amdgpu_gmc *mc)

sys/dev/pci/drm/amd/amdgpu/gmc_v12_0.c

686

amdgpu_gmc_set_agp_default(adev, mc);

sys/dev/pci/drm/amd/amdgpu/gmc_v12_0.c

688

amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_LOW);

sys/dev/pci/drm/amd/amdgpu/gmc_v12_0.c

690

amdgpu_gmc_agp_location(adev, mc);

sys/dev/pci/drm/amd/amdgpu/gmc_v6_0.c

208

struct amdgpu_gmc *mc)

sys/dev/pci/drm/amd/amdgpu/gmc_v6_0.c

214

amdgpu_gmc_set_agp_default(adev, mc);

sys/dev/pci/drm/amd/amdgpu/gmc_v6_0.c

215

amdgpu_gmc_vram_location(adev, mc, base);

sys/dev/pci/drm/amd/amdgpu/gmc_v6_0.c

216

amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_BEST_FIT);

sys/dev/pci/drm/amd/amdgpu/gmc_v7_0.c

239

struct amdgpu_gmc *mc)

sys/dev/pci/drm/amd/amdgpu/gmc_v7_0.c

245

amdgpu_gmc_set_agp_default(adev, mc);

sys/dev/pci/drm/amd/amdgpu/gmc_v7_0.c

246

amdgpu_gmc_vram_location(adev, mc, base);

sys/dev/pci/drm/amd/amdgpu/gmc_v7_0.c

247

amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_BEST_FIT);

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

412

struct amdgpu_gmc *mc)

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

420

amdgpu_gmc_set_agp_default(adev, mc);

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

421

amdgpu_gmc_vram_location(adev, mc, base);

sys/dev/pci/drm/amd/amdgpu/gmc_v8_0.c

422

amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_BEST_FIT);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1678

struct amdgpu_gmc *mc)

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1682

amdgpu_gmc_set_agp_default(adev, mc);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1687

amdgpu_gmc_sysvm_location(adev, mc);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1689

amdgpu_gmc_vram_location(adev, mc, base);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1690

amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_BEST_FIT);

sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c

1692

amdgpu_gmc_agp_location(adev, mc);

sys/dev/pci/drm/radeon/cik.c

3869

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/pci/drm/radeon/cik.c

4108

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/cik.c

5295

rdev->mc.vram_start >> 12);

sys/dev/pci/drm/radeon/cik.c

5297

rdev->mc.vram_end >> 12);

sys/dev/pci/drm/radeon/cik.c

5300

tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;

sys/dev/pci/drm/radeon/cik.c

5301

tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);

sys/dev/pci/drm/radeon/cik.c

5304

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

sys/dev/pci/drm/radeon/cik.c

5334

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/cik.c

5372

rdev->mc.vram_width = numchan * chansize;

sys/dev/pci/drm/radeon/cik.c

5374

rdev->mc.aper_base = rdev->fb_aper_offset;

sys/dev/pci/drm/radeon/cik.c

5375

rdev->mc.aper_size = rdev->fb_aper_size;

sys/dev/pci/drm/radeon/cik.c

5377

rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/pci/drm/radeon/cik.c

5378

rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/pci/drm/radeon/cik.c

5379

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/pci/drm/radeon/cik.c

5380

si_vram_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/cik.c

5450

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/pci/drm/radeon/cik.c

5451

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/pci/drm/radeon/cik.c

5523

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/pci/drm/radeon/cik_sdma.c

256

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/pci/drm/radeon/cik_sdma.c

434

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/evergreen.c

2441

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/pci/drm/radeon/evergreen.c

2442

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/pci/drm/radeon/evergreen.c

2452

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/pci/drm/radeon/evergreen.c

2769

upper_32_bits(rdev->mc.vram_start));

sys/dev/pci/drm/radeon/evergreen.c

2771

upper_32_bits(rdev->mc.vram_start));

sys/dev/pci/drm/radeon/evergreen.c

2773

(u32)rdev->mc.vram_start);

sys/dev/pci/drm/radeon/evergreen.c

2775

(u32)rdev->mc.vram_start);

sys/dev/pci/drm/radeon/evergreen.c

2779

WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH, upper_32_bits(rdev->mc.vram_start));

sys/dev/pci/drm/radeon/evergreen.c

2780

WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start);

sys/dev/pci/drm/radeon/evergreen.c

2873

if (rdev->mc.vram_start < rdev->mc.gtt_start) {

sys/dev/pci/drm/radeon/evergreen.c

2876

rdev->mc.vram_start >> 12);

sys/dev/pci/drm/radeon/evergreen.c

2878

rdev->mc.gtt_end >> 12);

sys/dev/pci/drm/radeon/evergreen.c

2882

rdev->mc.gtt_start >> 12);

sys/dev/pci/drm/radeon/evergreen.c

2884

rdev->mc.vram_end >> 12);

sys/dev/pci/drm/radeon/evergreen.c

2888

rdev->mc.vram_start >> 12);

sys/dev/pci/drm/radeon/evergreen.c

2890

rdev->mc.vram_end >> 12);

sys/dev/pci/drm/radeon/evergreen.c

2898

tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24;

sys/dev/pci/drm/radeon/evergreen.c

2899

tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20;

sys/dev/pci/drm/radeon/evergreen.c

2902

tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;

sys/dev/pci/drm/radeon/evergreen.c

2903

tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);

sys/dev/pci/drm/radeon/evergreen.c

2905

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

sys/dev/pci/drm/radeon/evergreen.c

2909

WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16);

sys/dev/pci/drm/radeon/evergreen.c

2910

WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16);

sys/dev/pci/drm/radeon/evergreen.c

2911

WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);

sys/dev/pci/drm/radeon/evergreen.c

3715

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/evergreen.c

3745

rdev->mc.vram_width = numchan * chansize;

sys/dev/pci/drm/radeon/evergreen.c

3747

rdev->mc.aper_base = rdev->fb_aper_offset;

sys/dev/pci/drm/radeon/evergreen.c

3748

rdev->mc.aper_size = rdev->fb_aper_size;

sys/dev/pci/drm/radeon/evergreen.c

3754

rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/pci/drm/radeon/evergreen.c

3755

rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/pci/drm/radeon/evergreen.c

3758

rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/pci/drm/radeon/evergreen.c

3759

rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

sys/dev/pci/drm/radeon/evergreen.c

3761

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/pci/drm/radeon/evergreen.c

3762

r700_vram_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/ni.c

1279

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/pci/drm/radeon/ni.c

1280

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/pci/drm/radeon/ni.c

1326

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/pci/drm/radeon/ni.c

1441

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/pci/drm/radeon/ni.c

1715

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/ni_dma.c

162

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/pci/drm/radeon/ni_dma.c

258

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/r100.c

1247

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/r100.c

1275

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/pci/drm/radeon/r100.c

2732

rdev->mc.vram_is_ddr = false;

sys/dev/pci/drm/radeon/r100.c

2734

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/r100.c

2736

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/r100.c

2742

rdev->mc.vram_width = 32;

sys/dev/pci/drm/radeon/r100.c

2744

rdev->mc.vram_width = 64;

sys/dev/pci/drm/radeon/r100.c

2747

rdev->mc.vram_width /= 4;

sys/dev/pci/drm/radeon/r100.c

2748

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/r100.c

2753

rdev->mc.vram_width = 128;

sys/dev/pci/drm/radeon/r100.c

2755

rdev->mc.vram_width = 64;

sys/dev/pci/drm/radeon/r100.c

2759

rdev->mc.vram_width = 128;

sys/dev/pci/drm/radeon/r100.c

2806

rdev->mc.aper_base = rdev->fb_aper_offset;

sys/dev/pci/drm/radeon/r100.c

2807

rdev->mc.aper_size = rdev->fb_aper_size;

sys/dev/pci/drm/radeon/r100.c

2808

rdev->mc.visible_vram_size = r100_get_accessible_vram(rdev);

sys/dev/pci/drm/radeon/r100.c

2810

if (rdev->mc.visible_vram_size > rdev->mc.aper_size)

sys/dev/pci/drm/radeon/r100.c

2811

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/pci/drm/radeon/r100.c

2817

rdev->mc.real_vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16);

sys/dev/pci/drm/radeon/r100.c

2818

WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/r100.c

2819

rdev->mc.mc_vram_size = rdev->mc.real_vram_size;

sys/dev/pci/drm/radeon/r100.c

2821

rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);

sys/dev/pci/drm/radeon/r100.c

2825

if (rdev->mc.real_vram_size == 0) {

sys/dev/pci/drm/radeon/r100.c

2826

rdev->mc.real_vram_size = 8192 * 1024;

sys/dev/pci/drm/radeon/r100.c

2827

WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/r100.c

2832

if (rdev->mc.aper_size > config_aper_size)

sys/dev/pci/drm/radeon/r100.c

2833

config_aper_size = rdev->mc.aper_size;

sys/dev/pci/drm/radeon/r100.c

2835

if (config_aper_size > rdev->mc.real_vram_size)

sys/dev/pci/drm/radeon/r100.c

2836

rdev->mc.mc_vram_size = config_aper_size;

sys/dev/pci/drm/radeon/r100.c

2838

rdev->mc.mc_vram_size = rdev->mc.real_vram_size;

sys/dev/pci/drm/radeon/r100.c

2862

base = rdev->mc.aper_base;

sys/dev/pci/drm/radeon/r100.c

2865

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/pci/drm/radeon/r100.c

2866

rdev->mc.gtt_base_align = 0;

sys/dev/pci/drm/radeon/r100.c

2868

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/r100.c

3283

temp = (rdev->mc.vram_width / 8) * (rdev->mc.vram_is_ddr ? 2 : 1);

sys/dev/pci/drm/radeon/r100.c

3415

if (rdev->mc.vram_is_ddr)

sys/dev/pci/drm/radeon/r100.c

3420

if (rdev->mc.vram_width == 128)

sys/dev/pci/drm/radeon/r100.c

3429

if (rdev->mc.vram_is_ddr) {

sys/dev/pci/drm/radeon/r100.c

3430

if (rdev->mc.vram_width == 32) {

sys/dev/pci/drm/radeon/r100.c

3457

temp_ff.full = dfixed_const((2 * (cur_size - (rdev->mc.vram_is_ddr + 1))));

sys/dev/pci/drm/radeon/r100.c

3598

temp = (rdev->mc.vram_width * rdev->mc.vram_is_ddr + 1)/128;

sys/dev/pci/drm/radeon/r100.c

3835

WREG32(R_00023C_DISPLAY_BASE_ADDR, rdev->mc.vram_start);

sys/dev/pci/drm/radeon/r100.c

3837

WREG32(R_00033C_CRTC2_DISPLAY_BASE_ADDR, rdev->mc.vram_start);

sys/dev/pci/drm/radeon/r100.c

3864

S_00014C_MC_AGP_START(rdev->mc.gtt_start >> 16) |

sys/dev/pci/drm/radeon/r100.c

3865

S_00014C_MC_AGP_TOP(rdev->mc.gtt_end >> 16));

sys/dev/pci/drm/radeon/r100.c

3866

WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base));

sys/dev/pci/drm/radeon/r100.c

3869

upper_32_bits(rdev->mc.agp_base) & 0xff);

sys/dev/pci/drm/radeon/r100.c

3881

S_000148_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/pci/drm/radeon/r100.c

3882

S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/pci/drm/radeon/r100.c

679

WREG32(RADEON_AIC_LO_ADDR, rdev->mc.gtt_start);

sys/dev/pci/drm/radeon/r100.c

680

WREG32(RADEON_AIC_HI_ADDR, rdev->mc.gtt_end);

sys/dev/pci/drm/radeon/r100.c

687

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/pci/drm/radeon/r300.c

1337

S_00014C_MC_AGP_START(rdev->mc.gtt_start >> 16) |

sys/dev/pci/drm/radeon/r300.c

1338

S_00014C_MC_AGP_TOP(rdev->mc.gtt_end >> 16));

sys/dev/pci/drm/radeon/r300.c

1339

WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base));

sys/dev/pci/drm/radeon/r300.c

1341

upper_32_bits(rdev->mc.agp_base) & 0xff);

sys/dev/pci/drm/radeon/r300.c

1352

S_000148_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/pci/drm/radeon/r300.c

1353

S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/pci/drm/radeon/r300.c

167

WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_start);

sys/dev/pci/drm/radeon/r300.c

168

tmp = rdev->mc.gtt_end & ~RADEON_GPU_PAGE_MASK;

sys/dev/pci/drm/radeon/r300.c

175

WREG32_PCIE(RADEON_PCIE_TX_DISCARD_RD_ADDR_LO, rdev->mc.vram_start);

sys/dev/pci/drm/radeon/r300.c

185

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/pci/drm/radeon/r300.c

481

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/r300.c

485

case 0: rdev->mc.vram_width = 64; break;

sys/dev/pci/drm/radeon/r300.c

486

case 1: rdev->mc.vram_width = 128; break;

sys/dev/pci/drm/radeon/r300.c

487

case 2: rdev->mc.vram_width = 256; break;

sys/dev/pci/drm/radeon/r300.c

488

default: rdev->mc.vram_width = 128; break;

sys/dev/pci/drm/radeon/r300.c

491

base = rdev->mc.aper_base;

sys/dev/pci/drm/radeon/r300.c

494

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/pci/drm/radeon/r300.c

495

rdev->mc.gtt_base_align = 0;

sys/dev/pci/drm/radeon/r300.c

497

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/r520.c

102

rdev->mc.vram_width = 32;

sys/dev/pci/drm/radeon/r520.c

105

rdev->mc.vram_width = 64;

sys/dev/pci/drm/radeon/r520.c

108

rdev->mc.vram_width = 128;

sys/dev/pci/drm/radeon/r520.c

111

rdev->mc.vram_width = 256;

sys/dev/pci/drm/radeon/r520.c

114

rdev->mc.vram_width = 128;

sys/dev/pci/drm/radeon/r520.c

118

rdev->mc.vram_width *= 2;

sys/dev/pci/drm/radeon/r520.c

126

radeon_vram_location(rdev, &rdev->mc, 0);

sys/dev/pci/drm/radeon/r520.c

127

rdev->mc.gtt_base_align = 0;

sys/dev/pci/drm/radeon/r520.c

129

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/r520.c

144

WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/r520.c

147

S_000004_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/pci/drm/radeon/r520.c

148

S_000004_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/pci/drm/radeon/r520.c

150

S_000134_HDP_FB_START(rdev->mc.vram_start >> 16));

sys/dev/pci/drm/radeon/r520.c

153

S_000005_MC_AGP_START(rdev->mc.gtt_start >> 16) |

sys/dev/pci/drm/radeon/r520.c

154

S_000005_MC_AGP_TOP(rdev->mc.gtt_end >> 16));

sys/dev/pci/drm/radeon/r520.c

155

WREG32_MC(R_000006_AGP_BASE, lower_32_bits(rdev->mc.agp_base));

sys/dev/pci/drm/radeon/r520.c

157

S_000007_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base)));

sys/dev/pci/drm/radeon/r520.c

97

rdev->mc.vram_width = 128;

sys/dev/pci/drm/radeon/r520.c

98

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/r600.c

1094

WREG32(VM_CONTEXT0_INVALIDATION_LOW_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/pci/drm/radeon/r600.c

1095

WREG32(VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (rdev->mc.gtt_end - 1) >> 12);

sys/dev/pci/drm/radeon/r600.c

1168

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/pci/drm/radeon/r600.c

1169

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/pci/drm/radeon/r600.c

1180

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/pci/drm/radeon/r600.c

1326

if (rdev->mc.vram_start < rdev->mc.gtt_start) {

sys/dev/pci/drm/radeon/r600.c

1329

rdev->mc.vram_start >> 12);

sys/dev/pci/drm/radeon/r600.c

1331

rdev->mc.gtt_end >> 12);

sys/dev/pci/drm/radeon/r600.c

1335

rdev->mc.gtt_start >> 12);

sys/dev/pci/drm/radeon/r600.c

1337

rdev->mc.vram_end >> 12);

sys/dev/pci/drm/radeon/r600.c

1340

WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start >> 12);

sys/dev/pci/drm/radeon/r600.c

1341

WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end >> 12);

sys/dev/pci/drm/radeon/r600.c

1344

tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;

sys/dev/pci/drm/radeon/r600.c

1345

tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);

sys/dev/pci/drm/radeon/r600.c

1347

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

sys/dev/pci/drm/radeon/r600.c

1351

WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 22);

sys/dev/pci/drm/radeon/r600.c

1352

WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 22);

sys/dev/pci/drm/radeon/r600.c

1353

WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);

sys/dev/pci/drm/radeon/r600.c

1389

static void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)

sys/dev/pci/drm/radeon/r600.c

1393

if (mc->mc_vram_size > 0xE0000000) {

sys/dev/pci/drm/radeon/r600.c

1396

mc->real_vram_size = 0xE0000000;

sys/dev/pci/drm/radeon/r600.c

1397

mc->mc_vram_size = 0xE0000000;

sys/dev/pci/drm/radeon/r600.c

1400

size_bf = mc->gtt_start;

sys/dev/pci/drm/radeon/r600.c

1401

size_af = mc->mc_mask - mc->gtt_end;

sys/dev/pci/drm/radeon/r600.c

1403

if (mc->mc_vram_size > size_bf) {

sys/dev/pci/drm/radeon/r600.c

1405

mc->real_vram_size = size_bf;

sys/dev/pci/drm/radeon/r600.c

1406

mc->mc_vram_size = size_bf;

sys/dev/pci/drm/radeon/r600.c

1408

mc->vram_start = mc->gtt_start - mc->mc_vram_size;

sys/dev/pci/drm/radeon/r600.c

1410

if (mc->mc_vram_size > size_af) {

sys/dev/pci/drm/radeon/r600.c

1412

mc->real_vram_size = size_af;

sys/dev/pci/drm/radeon/r600.c

1413

mc->mc_vram_size = size_af;

sys/dev/pci/drm/radeon/r600.c

1415

mc->vram_start = mc->gtt_end + 1;

sys/dev/pci/drm/radeon/r600.c

1417

mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;

sys/dev/pci/drm/radeon/r600.c

1419

mc->mc_vram_size >> 20, mc->vram_start,

sys/dev/pci/drm/radeon/r600.c

1420

mc->vram_end, mc->real_vram_size >> 20);

sys/dev/pci/drm/radeon/r600.c

1427

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/pci/drm/radeon/r600.c

1428

rdev->mc.gtt_base_align = 0;

sys/dev/pci/drm/radeon/r600.c

1429

radeon_gtt_location(rdev, mc);

sys/dev/pci/drm/radeon/r600.c

1441

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/r600.c

1466

rdev->mc.vram_width = numchan * chansize;

sys/dev/pci/drm/radeon/r600.c

1468

rdev->mc.aper_base = rdev->fb_aper_offset;

sys/dev/pci/drm/radeon/r600.c

1469

rdev->mc.aper_size = rdev->fb_aper_size;

sys/dev/pci/drm/radeon/r600.c

1471

rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/pci/drm/radeon/r600.c

1472

rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/pci/drm/radeon/r600.c

1473

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/pci/drm/radeon/r600.c

1474

r600_vram_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/r600.c

1478

rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);

sys/dev/pci/drm/radeon/r600.c

1487

if (k8_addr + rdev->mc.visible_vram_size < 0x100000000ULL)

sys/dev/pci/drm/radeon/r600.c

1493

if (rdev->mc.igp_sideport_enabled == false && radeon_fastfb == 1) {

sys/dev/pci/drm/radeon/r600.c

1495

(unsigned long long)rdev->mc.aper_base, k8_addr);

sys/dev/pci/drm/radeon/r600.c

1496

rdev->mc.aper_base = (resource_size_t)k8_addr;

sys/dev/pci/drm/radeon/r600.c

2426

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/pci/drm/radeon/r600.c

2775

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/r600_dma.c

103

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/pci/drm/radeon/r600_dma.c

180

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/radeon.h

2404

struct radeon_mc mc;

sys/dev/pci/drm/radeon/radeon.h

2857

extern void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base);

sys/dev/pci/drm/radeon/radeon.h

2858

extern void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);

sys/dev/pci/drm/radeon/radeon_agp.c

359

rdev->mc.agp_base = rdev->ddev->agp->info.ai_aperture_base;

sys/dev/pci/drm/radeon/radeon_agp.c

360

rdev->mc.gtt_size = rdev->ddev->agp->info.ai_aperture_size;

sys/dev/pci/drm/radeon/radeon_agp.c

361

rdev->mc.gtt_start = rdev->mc.agp_base;

sys/dev/pci/drm/radeon/radeon_agp.c

362

rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1;

sys/dev/pci/drm/radeon/radeon_agp.c

364

rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end);

sys/dev/pci/drm/radeon/radeon_agp.c

367

start = atop(bus_space_mmap(rdev->memt, rdev->mc.gtt_start, 0, 0, 0));

sys/dev/pci/drm/radeon/radeon_agp.c

368

end = start + atop(rdev->mc.gtt_size);

sys/dev/pci/drm/radeon/radeon_asic.c

176

rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;

sys/dev/pci/drm/radeon/radeon_asic.h

468

void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);

sys/dev/pci/drm/radeon/radeon_clocks.c

705

if (rdev->mc.vram_width == 64) {

sys/dev/pci/drm/radeon/radeon_device.c

1150

rdev->mc.gtt_size = (uint64_t)radeon_gart_size << 20;

sys/dev/pci/drm/radeon/radeon_device.c

1307

rdev->mc.gtt_size = 512 * 1024 * 1024;

sys/dev/pci/drm/radeon/radeon_device.c

1365

rdev->mc.mc_mask = 0xffffffffffULL; /* 40 bit MC */

sys/dev/pci/drm/radeon/radeon_device.c

1367

rdev->mc.mc_mask = 0xfffffffffULL; /* 36 bit MC */

sys/dev/pci/drm/radeon/radeon_device.c

1369

rdev->mc.mc_mask = 0xffffffffULL; /* 32 bit MC */

sys/dev/pci/drm/radeon/radeon_device.c

578

void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base)

sys/dev/pci/drm/radeon/radeon_device.c

582

mc->vram_start = base;

sys/dev/pci/drm/radeon/radeon_device.c

583

if (mc->mc_vram_size > (rdev->mc.mc_mask - base + 1)) {

sys/dev/pci/drm/radeon/radeon_device.c

585

mc->real_vram_size = mc->aper_size;

sys/dev/pci/drm/radeon/radeon_device.c

586

mc->mc_vram_size = mc->aper_size;

sys/dev/pci/drm/radeon/radeon_device.c

588

mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;

sys/dev/pci/drm/radeon/radeon_device.c

589

if (rdev->flags & RADEON_IS_AGP && mc->vram_end > mc->gtt_start && mc->vram_start <= mc->gtt_end) {

sys/dev/pci/drm/radeon/radeon_device.c

591

mc->real_vram_size = mc->aper_size;

sys/dev/pci/drm/radeon/radeon_device.c

592

mc->mc_vram_size = mc->aper_size;

sys/dev/pci/drm/radeon/radeon_device.c

594

mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;

sys/dev/pci/drm/radeon/radeon_device.c

595

if (limit && limit < mc->real_vram_size)

sys/dev/pci/drm/radeon/radeon_device.c

596

mc->real_vram_size = limit;

sys/dev/pci/drm/radeon/radeon_device.c

598

mc->mc_vram_size >> 20, mc->vram_start,

sys/dev/pci/drm/radeon/radeon_device.c

599

mc->vram_end, mc->real_vram_size >> 20);

sys/dev/pci/drm/radeon/radeon_device.c

614

void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)

sys/dev/pci/drm/radeon/radeon_device.c

618

size_af = ((rdev->mc.mc_mask - mc->vram_end) + mc->gtt_base_align) & ~mc->gtt_base_align;

sys/dev/pci/drm/radeon/radeon_device.c

619

size_bf = mc->vram_start & ~mc->gtt_base_align;

sys/dev/pci/drm/radeon/radeon_device.c

621

if (mc->gtt_size > size_bf) {

sys/dev/pci/drm/radeon/radeon_device.c

623

mc->gtt_size = size_bf;

sys/dev/pci/drm/radeon/radeon_device.c

625

mc->gtt_start = (mc->vram_start & ~mc->gtt_base_align) - mc->gtt_size;

sys/dev/pci/drm/radeon/radeon_device.c

627

if (mc->gtt_size > size_af) {

sys/dev/pci/drm/radeon/radeon_device.c

629

mc->gtt_size = size_af;

sys/dev/pci/drm/radeon/radeon_device.c

631

mc->gtt_start = (mc->vram_end + 1 + mc->gtt_base_align) & ~mc->gtt_base_align;

sys/dev/pci/drm/radeon/radeon_device.c

633

mc->gtt_end = mc->gtt_start + mc->gtt_size - 1;

sys/dev/pci/drm/radeon/radeon_device.c

635

mc->gtt_size >> 20, mc->gtt_start, mc->gtt_end);

sys/dev/pci/drm/radeon/radeon_drv.c

1277

if (rdev->mc.real_vram_size <= (8 * 1024 * 1024))

sys/dev/pci/drm/radeon/radeon_drv.c

1279

else if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32 * 1024 * 1024))

sys/dev/pci/drm/radeon/radeon_drv.c

330

if (rdev->mc.real_vram_size <= (8 * 1024 * 1024))

sys/dev/pci/drm/radeon/radeon_drv.c

332

else if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32 * 1024 * 1024))

sys/dev/pci/drm/radeon/radeon_fbdev.c

271

tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;

sys/dev/pci/drm/radeon/radeon_fbdev.c

272

info->fix.smem_start = rdev->mc.aper_base + tmp;

sys/dev/pci/drm/radeon/radeon_fbdev.c

282

DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);

sys/dev/pci/drm/radeon/radeon_gart.c

390

rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;

sys/dev/pci/drm/radeon/radeon_gart.c

391

rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;

sys/dev/pci/drm/radeon/radeon_gem.c

183

max_size = rdev->mc.gtt_size - rdev->gart_pin_size;

sys/dev/pci/drm/radeon/radeon_gem.c

395

args->vram_visible = rdev->mc.visible_vram_size;

sys/dev/pci/drm/radeon/radeon_gem.c

397

args->gart_size = rdev->mc.gtt_size;

sys/dev/pci/drm/radeon/radeon_legacy_crtc.c

471

radeon_crtc->legacy_display_base_addr = rdev->mc.vram_start;

sys/dev/pci/drm/radeon/radeon_object.c

122

rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;

sys/dev/pci/drm/radeon/radeon_object.c

290

domain_start = bo->rdev->mc.vram_start;

sys/dev/pci/drm/radeon/radeon_object.c

292

domain_start = bo->rdev->mc.gtt_start;

sys/dev/pci/drm/radeon/radeon_object.c

309

(!max_offset || max_offset > bo->rdev->mc.visible_vram_size))

sys/dev/pci/drm/radeon/radeon_object.c

311

bo->rdev->mc.visible_vram_size >> PAGE_SHIFT;

sys/dev/pci/drm/radeon/radeon_object.c

355

if (rdev->mc.igp_sideport_enabled == false)

sys/dev/pci/drm/radeon/radeon_object.c

392

arch_io_reserve_memtype_wc(rdev->mc.aper_base,

sys/dev/pci/drm/radeon/radeon_object.c

393

rdev->mc.aper_size);

sys/dev/pci/drm/radeon/radeon_object.c

399

rdev->mc.vram_mtrr = arch_phys_wc_add(rdev->mc.aper_base,

sys/dev/pci/drm/radeon/radeon_object.c

400

rdev->mc.aper_size);

sys/dev/pci/drm/radeon/radeon_object.c

402

drm_mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size, DRM_MTRR_WC);

sys/dev/pci/drm/radeon/radeon_object.c

404

rdev->mc.vram_mtrr = 1;

sys/dev/pci/drm/radeon/radeon_object.c

408

start = atop(bus_space_mmap(rdev->memt, rdev->mc.aper_base, 0, 0, 0));

sys/dev/pci/drm/radeon/radeon_object.c

409

end = start + atop(rdev->mc.aper_size);

sys/dev/pci/drm/radeon/radeon_object.c

413

rdev->mc.mc_vram_size >> 20,

sys/dev/pci/drm/radeon/radeon_object.c

414

(unsigned long long)rdev->mc.aper_size >> 20);

sys/dev/pci/drm/radeon/radeon_object.c

416

rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');

sys/dev/pci/drm/radeon/radeon_object.c

424

arch_phys_wc_del(rdev->mc.vram_mtrr);

sys/dev/pci/drm/radeon/radeon_object.c

425

arch_io_free_memtype_wc(rdev->mc.aper_base, rdev->mc.aper_size);

sys/dev/pci/drm/radeon/radeon_object.c

427

drm_mtrr_del(0, rdev->mc.aper_base, rdev->mc.aper_size, DRM_MTRR_WC);

sys/dev/pci/drm/radeon/radeon_object.c

435

u64 real_vram_size = rdev->mc.real_vram_size;

sys/dev/pci/drm/radeon/radeon_object.c

754

if ((offset + size) <= rdev->mc.visible_vram_size)

sys/dev/pci/drm/radeon/radeon_object.c

763

lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT;

sys/dev/pci/drm/radeon/radeon_object.c

777

if ((offset + size) > rdev->mc.visible_vram_size)

sys/dev/pci/drm/radeon/radeon_object.c

86

rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size) {

sys/dev/pci/drm/radeon/radeon_object.c

88

rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;

sys/dev/pci/drm/radeon/radeon_object.h

100

start = rdev->mc.gtt_start;

sys/dev/pci/drm/radeon/radeon_object.h

103

start = rdev->mc.vram_start;

sys/dev/pci/drm/radeon/radeon_test.c

158

(gtt_addr - rdev->mc.gtt_start +

sys/dev/pci/drm/radeon/radeon_test.c

161

(vram_addr - rdev->mc.vram_start +

sys/dev/pci/drm/radeon/radeon_test.c

209

(vram_addr - rdev->mc.vram_start +

sys/dev/pci/drm/radeon/radeon_test.c

212

(gtt_addr - rdev->mc.gtt_start +

sys/dev/pci/drm/radeon/radeon_test.c

222

gtt_addr - rdev->mc.gtt_start);

sys/dev/pci/drm/radeon/radeon_test.c

60

n = rdev->mc.gtt_size - rdev->gart_pin_size;

sys/dev/pci/drm/radeon/radeon_ttm.c

112

else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&

sys/dev/pci/drm/radeon/radeon_ttm.c

113

bo->resource->start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {

sys/dev/pci/drm/radeon/radeon_ttm.c

114

unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;

sys/dev/pci/drm/radeon/radeon_ttm.c

159

old_start += rdev->mc.vram_start;

sys/dev/pci/drm/radeon/radeon_ttm.c

162

old_start += rdev->mc.gtt_start;

sys/dev/pci/drm/radeon/radeon_ttm.c

170

new_start += rdev->mc.vram_start;

sys/dev/pci/drm/radeon/radeon_ttm.c

173

new_start += rdev->mc.gtt_start;

sys/dev/pci/drm/radeon/radeon_ttm.c

278

rdev->mc.agp_base;

sys/dev/pci/drm/radeon/radeon_ttm.c

287

if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)

sys/dev/pci/drm/radeon/radeon_ttm.c

289

mem->bus.offset += rdev->mc.aper_base;

sys/dev/pci/drm/radeon/radeon_ttm.c

737

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/pci/drm/radeon/radeon_ttm.c

761

(unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));

sys/dev/pci/drm/radeon/radeon_ttm.c

769

(unsigned)(rdev->mc.gtt_size / (1024 * 1024)));

sys/dev/pci/drm/radeon/radeon_ttm.c

81

false, rdev->mc.real_vram_size >> PAGE_SHIFT);

sys/dev/pci/drm/radeon/radeon_ttm.c

827

i_size_write(inode, rdev->mc.mc_vram_size);

sys/dev/pci/drm/radeon/radeon_ttm.c

846

if (*pos >= rdev->mc.mc_vram_size)

sys/dev/pci/drm/radeon/radeon_ttm.c

87

true, rdev->mc.gtt_size >> PAGE_SHIFT);

sys/dev/pci/drm/radeon/radeon_ttm.c

879

i_size_write(inode, rdev->mc.gtt_size);

sys/dev/pci/drm/radeon/radeon_ucode.h

212

struct mc_firmware_header_v1_0 mc;

sys/dev/pci/drm/radeon/rs400.c

120

switch (rdev->mc.gtt_size / (1024 * 1024)) {

sys/dev/pci/drm/radeon/rs400.c

153

tmp = REG_SET(RS690_MC_AGP_TOP, rdev->mc.gtt_end >> 16);

sys/dev/pci/drm/radeon/rs400.c

154

tmp |= REG_SET(RS690_MC_AGP_START, rdev->mc.gtt_start >> 16);

sys/dev/pci/drm/radeon/rs400.c

192

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/pci/drm/radeon/rs400.c

286

rdev->mc.igp_sideport_enabled = radeon_combios_sideport_present(rdev);

sys/dev/pci/drm/radeon/rs400.c

288

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/rs400.c

289

rdev->mc.vram_width = 128;

sys/dev/pci/drm/radeon/rs400.c

292

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/pci/drm/radeon/rs400.c

293

rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;

sys/dev/pci/drm/radeon/rs400.c

294

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/rs400.c

414

S_000148_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/pci/drm/radeon/rs400.c

415

S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/pci/drm/radeon/rs400.c

46

switch (rdev->mc.gtt_size/(1024*1024)) {

sys/dev/pci/drm/radeon/rs400.c

57

(unsigned)(rdev->mc.gtt_size >> 20));

sys/dev/pci/drm/radeon/rs400.c

60

rdev->mc.gtt_size = 32 * 1024 * 1024;

sys/dev/pci/drm/radeon/rs400.c

90

switch (rdev->mc.gtt_size / (1024 * 1024)) {

sys/dev/pci/drm/radeon/rs600.c

605

WREG32_MC(R_00013C_MC_PT0_CONTEXT0_FLAT_START_ADDR, rdev->mc.gtt_start);

sys/dev/pci/drm/radeon/rs600.c

606

WREG32_MC(R_00014C_MC_PT0_CONTEXT0_FLAT_END_ADDR, rdev->mc.gtt_end);

sys/dev/pci/drm/radeon/rs600.c

610

WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start);

sys/dev/pci/drm/radeon/rs600.c

611

WREG32_MC(R_000114_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR, rdev->mc.vram_end);

sys/dev/pci/drm/radeon/rs600.c

620

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/pci/drm/radeon/rs600.c

883

rdev->mc.aper_base = rdev->fb_aper_offset;

sys/dev/pci/drm/radeon/rs600.c

884

rdev->mc.aper_size = rdev->fb_aper_size;

sys/dev/pci/drm/radeon/rs600.c

885

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/rs600.c

886

rdev->mc.vram_width = 128;

sys/dev/pci/drm/radeon/rs600.c

887

rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);

sys/dev/pci/drm/radeon/rs600.c

888

rdev->mc.mc_vram_size = rdev->mc.real_vram_size;

sys/dev/pci/drm/radeon/rs600.c

889

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/pci/drm/radeon/rs600.c

890

rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);

sys/dev/pci/drm/radeon/rs600.c

893

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/pci/drm/radeon/rs600.c

894

rdev->mc.gtt_base_align = 0;

sys/dev/pci/drm/radeon/rs600.c

895

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/rs600.c

977

S_000004_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/pci/drm/radeon/rs600.c

978

S_000004_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/pci/drm/radeon/rs600.c

980

S_000134_HDP_FB_START(rdev->mc.vram_start >> 16));

sys/dev/pci/drm/radeon/rs690.c

157

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/rs690.c

158

rdev->mc.vram_width = 128;

sys/dev/pci/drm/radeon/rs690.c

159

rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);

sys/dev/pci/drm/radeon/rs690.c

160

rdev->mc.mc_vram_size = rdev->mc.real_vram_size;

sys/dev/pci/drm/radeon/rs690.c

161

rdev->mc.aper_base = rdev->fb_aper_offset;

sys/dev/pci/drm/radeon/rs690.c

162

rdev->mc.aper_size = rdev->fb_aper_size;

sys/dev/pci/drm/radeon/rs690.c

163

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/pci/drm/radeon/rs690.c

166

rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);

sys/dev/pci/drm/radeon/rs690.c

171

if (rdev->mc.igp_sideport_enabled &&

sys/dev/pci/drm/radeon/rs690.c

172

(rdev->mc.real_vram_size == (384 * 1024 * 1024))) {

sys/dev/pci/drm/radeon/rs690.c

174

rdev->mc.real_vram_size -= 128 * 1024 * 1024;

sys/dev/pci/drm/radeon/rs690.c

175

rdev->mc.mc_vram_size = rdev->mc.real_vram_size;

sys/dev/pci/drm/radeon/rs690.c

184

if (k8_addr + rdev->mc.visible_vram_size < 0x100000000ULL)

sys/dev/pci/drm/radeon/rs690.c

190

if (!rdev->mc.igp_sideport_enabled && radeon_fastfb == 1) {

sys/dev/pci/drm/radeon/rs690.c

192

(unsigned long long)rdev->mc.aper_base, k8_addr);

sys/dev/pci/drm/radeon/rs690.c

193

rdev->mc.aper_base = (resource_size_t)k8_addr;

sys/dev/pci/drm/radeon/rs690.c

199

radeon_vram_location(rdev, &rdev->mc, base);

sys/dev/pci/drm/radeon/rs690.c

200

rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;

sys/dev/pci/drm/radeon/rs690.c

201

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/rs690.c

366

if (rdev->mc.igp_sideport_enabled) {

sys/dev/pci/drm/radeon/rs690.c

688

S_000100_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/pci/drm/radeon/rs690.c

689

S_000100_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/pci/drm/radeon/rs690.c

691

S_000134_HDP_FB_START(rdev->mc.vram_start >> 16));

sys/dev/pci/drm/radeon/rv515.c

168

rdev->mc.vram_width = 128;

sys/dev/pci/drm/radeon/rv515.c

169

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/rv515.c

173

rdev->mc.vram_width = 64;

sys/dev/pci/drm/radeon/rv515.c

176

rdev->mc.vram_width = 128;

sys/dev/pci/drm/radeon/rv515.c

179

rdev->mc.vram_width = 128;

sys/dev/pci/drm/radeon/rv515.c

189

radeon_vram_location(rdev, &rdev->mc, 0);

sys/dev/pci/drm/radeon/rv515.c

190

rdev->mc.gtt_base_align = 0;

sys/dev/pci/drm/radeon/rv515.c

192

radeon_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/rv515.c

360

upper_32_bits(rdev->mc.vram_start));

sys/dev/pci/drm/radeon/rv515.c

362

upper_32_bits(rdev->mc.vram_start));

sys/dev/pci/drm/radeon/rv515.c

365

upper_32_bits(rdev->mc.vram_start));

sys/dev/pci/drm/radeon/rv515.c

367

upper_32_bits(rdev->mc.vram_start));

sys/dev/pci/drm/radeon/rv515.c

371

(u32)rdev->mc.vram_start);

sys/dev/pci/drm/radeon/rv515.c

373

(u32)rdev->mc.vram_start);

sys/dev/pci/drm/radeon/rv515.c

375

WREG32(R_000310_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start);

sys/dev/pci/drm/radeon/rv515.c

451

WREG32(R_0000F8_CONFIG_MEMSIZE, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/rv515.c

454

S_000001_MC_FB_START(rdev->mc.vram_start >> 16) |

sys/dev/pci/drm/radeon/rv515.c

455

S_000001_MC_FB_TOP(rdev->mc.vram_end >> 16));

sys/dev/pci/drm/radeon/rv515.c

457

S_000134_HDP_FB_START(rdev->mc.vram_start >> 16));

sys/dev/pci/drm/radeon/rv515.c

460

S_000002_MC_AGP_START(rdev->mc.gtt_start >> 16) |

sys/dev/pci/drm/radeon/rv515.c

461

S_000002_MC_AGP_TOP(rdev->mc.gtt_end >> 16));

sys/dev/pci/drm/radeon/rv515.c

462

WREG32_MC(R_000003_MC_AGP_BASE, lower_32_bits(rdev->mc.agp_base));

sys/dev/pci/drm/radeon/rv515.c

464

S_000004_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base)));

sys/dev/pci/drm/radeon/rv770.c

1032

if (rdev->mc.vram_start < rdev->mc.gtt_start) {

sys/dev/pci/drm/radeon/rv770.c

1035

rdev->mc.vram_start >> 12);

sys/dev/pci/drm/radeon/rv770.c

1037

rdev->mc.gtt_end >> 12);

sys/dev/pci/drm/radeon/rv770.c

1041

rdev->mc.gtt_start >> 12);

sys/dev/pci/drm/radeon/rv770.c

1043

rdev->mc.vram_end >> 12);

sys/dev/pci/drm/radeon/rv770.c

1047

rdev->mc.vram_start >> 12);

sys/dev/pci/drm/radeon/rv770.c

1049

rdev->mc.vram_end >> 12);

sys/dev/pci/drm/radeon/rv770.c

1052

tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;

sys/dev/pci/drm/radeon/rv770.c

1053

tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);

sys/dev/pci/drm/radeon/rv770.c

1055

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

sys/dev/pci/drm/radeon/rv770.c

1059

WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16);

sys/dev/pci/drm/radeon/rv770.c

1060

WREG32(MC_VM_AGP_BOT, rdev->mc.gtt_start >> 16);

sys/dev/pci/drm/radeon/rv770.c

1061

WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);

sys/dev/pci/drm/radeon/rv770.c

1083

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/pci/drm/radeon/rv770.c

1603

void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)

sys/dev/pci/drm/radeon/rv770.c

1607

if (mc->mc_vram_size > 0xE0000000) {

sys/dev/pci/drm/radeon/rv770.c

1610

mc->real_vram_size = 0xE0000000;

sys/dev/pci/drm/radeon/rv770.c

1611

mc->mc_vram_size = 0xE0000000;

sys/dev/pci/drm/radeon/rv770.c

1614

size_bf = mc->gtt_start;

sys/dev/pci/drm/radeon/rv770.c

1615

size_af = mc->mc_mask - mc->gtt_end;

sys/dev/pci/drm/radeon/rv770.c

1617

if (mc->mc_vram_size > size_bf) {

sys/dev/pci/drm/radeon/rv770.c

1619

mc->real_vram_size = size_bf;

sys/dev/pci/drm/radeon/rv770.c

1620

mc->mc_vram_size = size_bf;

sys/dev/pci/drm/radeon/rv770.c

1622

mc->vram_start = mc->gtt_start - mc->mc_vram_size;

sys/dev/pci/drm/radeon/rv770.c

1624

if (mc->mc_vram_size > size_af) {

sys/dev/pci/drm/radeon/rv770.c

1626

mc->real_vram_size = size_af;

sys/dev/pci/drm/radeon/rv770.c

1627

mc->mc_vram_size = size_af;

sys/dev/pci/drm/radeon/rv770.c

1629

mc->vram_start = mc->gtt_end + 1;

sys/dev/pci/drm/radeon/rv770.c

1631

mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;

sys/dev/pci/drm/radeon/rv770.c

1633

mc->mc_vram_size >> 20, mc->vram_start,

sys/dev/pci/drm/radeon/rv770.c

1634

mc->vram_end, mc->real_vram_size >> 20);

sys/dev/pci/drm/radeon/rv770.c

1636

radeon_vram_location(rdev, &rdev->mc, 0);

sys/dev/pci/drm/radeon/rv770.c

1637

rdev->mc.gtt_base_align = 0;

sys/dev/pci/drm/radeon/rv770.c

1638

radeon_gtt_location(rdev, mc);

sys/dev/pci/drm/radeon/rv770.c

1648

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/rv770.c

1673

rdev->mc.vram_width = numchan * chansize;

sys/dev/pci/drm/radeon/rv770.c

1675

rdev->mc.aper_base = rdev->fb_aper_offset;

sys/dev/pci/drm/radeon/rv770.c

1676

rdev->mc.aper_size = rdev->fb_aper_size;

sys/dev/pci/drm/radeon/rv770.c

1678

rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/pci/drm/radeon/rv770.c

1679

rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

sys/dev/pci/drm/radeon/rv770.c

1680

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/pci/drm/radeon/rv770.c

1681

r700_vram_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/rv770.c

926

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/pci/drm/radeon/rv770.c

927

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/pci/drm/radeon/rv770.c

938

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/pci/drm/radeon/si.c

3446

radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

sys/dev/pci/drm/radeon/si.c

3749

radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

sys/dev/pci/drm/radeon/si.c

4146

rdev->mc.vram_start >> 12);

sys/dev/pci/drm/radeon/si.c

4148

rdev->mc.vram_end >> 12);

sys/dev/pci/drm/radeon/si.c

4151

tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;

sys/dev/pci/drm/radeon/si.c

4152

tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);

sys/dev/pci/drm/radeon/si.c

4155

WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));

sys/dev/pci/drm/radeon/si.c

4173

struct radeon_mc *mc)

sys/dev/pci/drm/radeon/si.c

4175

if (mc->mc_vram_size > 0xFFC0000000ULL) {

sys/dev/pci/drm/radeon/si.c

4178

mc->real_vram_size = 0xFFC0000000ULL;

sys/dev/pci/drm/radeon/si.c

4179

mc->mc_vram_size = 0xFFC0000000ULL;

sys/dev/pci/drm/radeon/si.c

4181

radeon_vram_location(rdev, &rdev->mc, 0);

sys/dev/pci/drm/radeon/si.c

4182

rdev->mc.gtt_base_align = 0;

sys/dev/pci/drm/radeon/si.c

4183

radeon_gtt_location(rdev, mc);

sys/dev/pci/drm/radeon/si.c

4192

rdev->mc.vram_is_ddr = true;

sys/dev/pci/drm/radeon/si.c

4232

rdev->mc.vram_width = numchan * chansize;

sys/dev/pci/drm/radeon/si.c

4234

rdev->mc.aper_base = rdev->fb_aper_offset;

sys/dev/pci/drm/radeon/si.c

4235

rdev->mc.aper_size = rdev->fb_aper_size;

sys/dev/pci/drm/radeon/si.c

4244

rdev->mc.mc_vram_size = tmp * 1024ULL * 1024ULL;

sys/dev/pci/drm/radeon/si.c

4245

rdev->mc.real_vram_size = rdev->mc.mc_vram_size;

sys/dev/pci/drm/radeon/si.c

4246

rdev->mc.visible_vram_size = rdev->mc.aper_size;

sys/dev/pci/drm/radeon/si.c

4247

si_vram_gtt_location(rdev, &rdev->mc);

sys/dev/pci/drm/radeon/si.c

4296

WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);

sys/dev/pci/drm/radeon/si.c

4297

WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);

sys/dev/pci/drm/radeon/si.c

4347

(unsigned)(rdev->mc.gtt_size >> 20),

sys/dev/pci/drm/radeon/si.h

32

void si_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc);

sys/dev/pci/esa.c

447

esa_set_port(void *hdl, mixer_ctrl_t *mc)

sys/dev/pci/esa.c

452

return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, mc));

sys/dev/pci/esa.c

456

esa_get_port(void *hdl, mixer_ctrl_t *mc)

sys/dev/pci/esa.c

461

return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, mc));

sys/dev/pci/if_myx.c

1035

struct myx_cmd mc;

sys/dev/pci/if_myx.c

1041

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1042

if (myx_cmd(sc, MYXCMD_RESET, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1072

if (myx_cmd(sc, MYXCMD_GET_RXRINGSZ, &mc, &r) != 0) {

sys/dev/pci/if_myx.c

1078

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1079

if (myx_cmd(sc, MYXCMD_GET_TXRINGSZ, &mc, &r) != 0) {

sys/dev/pci/if_myx.c

1106

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1107

mc.mc_data0 = htobe32(size);

sys/dev/pci/if_myx.c

1108

if (myx_cmd(sc, MYXCMD_SET_INTRQSZ, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1113

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1114

mc.mc_data0 = htobe32(MYX_ADDRLOW(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

1115

mc.mc_data1 = htobe32(MYX_ADDRHIGH(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

1116

if (myx_cmd(sc, MYXCMD_SET_INTRQDMA, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1125

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1126

if (myx_cmd(sc, MYXCMD_GET_INTRACKOFF, &mc,

sys/dev/pci/if_myx.c

1132

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1133

if (myx_cmd(sc, MYXCMD_GET_INTRDEASSERTOFF, &mc,

sys/dev/pci/if_myx.c

1139

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1140

if (myx_cmd(sc, MYXCMD_GET_INTRCOALDELAYOFF, &mc,

sys/dev/pci/if_myx.c

1155

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1156

if (myx_cmd(sc, MYXCMD_UNSET_PROMISC, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1161

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1162

if (myx_cmd(sc, MYXCMD_FC_DEFAULT, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1167

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1168

if (myx_cmd(sc, MYXCMD_GET_TXRINGOFF, &mc,

sys/dev/pci/if_myx.c

1174

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1175

if (myx_cmd(sc, MYXCMD_GET_RXSMALLRINGOFF, &mc,

sys/dev/pci/if_myx.c

1181

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1182

if (myx_cmd(sc, MYXCMD_GET_RXBIGRINGOFF, &mc,

sys/dev/pci/if_myx.c

1200

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1201

mc.mc_data0 = htobe32(MYX_ADDRLOW(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

1202

mc.mc_data1 = htobe32(MYX_ADDRHIGH(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

1203

mc.mc_data2 = htobe32(sizeof(struct myx_status));

sys/dev/pci/if_myx.c

1204

if (myx_cmd(sc, MYXCMD_SET_STATSDMA, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1211

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1212

mc.mc_data0 = htobe32(maxpkt);

sys/dev/pci/if_myx.c

1213

if (myx_cmd(sc, MYXCMD_SET_MTU, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1233

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1234

mc.mc_data0 = htobe32(MYX_RXSMALL_SIZE - ETHER_ALIGN);

sys/dev/pci/if_myx.c

1235

if (myx_cmd(sc, MYXCMD_SET_SMALLBUFSZ, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1240

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1241

mc.mc_data0 = htobe32(16384);

sys/dev/pci/if_myx.c

1242

if (myx_cmd(sc, MYXCMD_SET_BIGBUFSZ, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1249

if (myx_cmd(sc, MYXCMD_SET_IFUP, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1288

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1289

if (myx_cmd(sc, MYXCMD_RESET, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1301

struct myx_cmd mc;

sys/dev/pci/if_myx.c

1303

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1304

mc.mc_data0 = htobe32(addr[0] << 24 | addr[1] << 16 |

sys/dev/pci/if_myx.c

1306

mc.mc_data1 = htobe32(addr[4] << 8 | addr[5]);

sys/dev/pci/if_myx.c

1308

if (myx_cmd(sc, cmd, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1318

struct myx_cmd mc;

sys/dev/pci/if_myx.c

1327

MYXCMD_SET_PROMISC : MYXCMD_UNSET_PROMISC, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1332

if (myx_cmd(sc, MYXCMD_SET_ALLMULTI, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1337

if (myx_cmd(sc, MYXCMD_UNSET_MCAST, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1352

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1353

mc.mc_data0 = htobe32(addr[0] << 24 | addr[1] << 16 |

sys/dev/pci/if_myx.c

1355

mc.mc_data1 = htobe32(addr[4] << 24 | addr[5] << 16);

sys/dev/pci/if_myx.c

1356

if (myx_cmd(sc, MYXCMD_SET_MCASTGROUP, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1364

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1365

if (myx_cmd(sc, MYXCMD_UNSET_ALLMULTI, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

1377

struct myx_cmd mc;

sys/dev/pci/if_myx.c

1392

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1393

(void)myx_cmd(sc, MYXCMD_SET_IFDOWN, &mc, NULL);

sys/dev/pci/if_myx.c

1409

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

1410

if (myx_cmd(sc, MYXCMD_RESET, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

2173

const struct myx_counter *mc = &myx_counters[i];

sys/dev/pci/if_myx.c

2175

bemtoh32((uint32_t *)((uint8_t *)sts + mc->mc_offset));

sys/dev/pci/if_myx.c

2252

const struct myx_counter *mc = &myx_counters[i];

sys/dev/pci/if_myx.c

2254

kstat_kv_unit_init(&mk->mk_counters[i], mc->mc_name,

sys/dev/pci/if_myx.c

473

struct myx_cmd mc;

sys/dev/pci/if_myx.c

499

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

501

if (myx_cmd(sc, MYXCMD_RESET, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

559

struct myx_cmd mc;

sys/dev/pci/if_myx.c

586

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

587

mc.mc_data0 = htobe32(MYX_ADDRLOW(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

588

mc.mc_data1 = htobe32(MYX_ADDRHIGH(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

589

mc.mc_data2 = htobe32(4096 * 0x10000);

sys/dev/pci/if_myx.c

590

if (myx_cmd(sc, MYXCMD_UNALIGNED_DMA_TEST, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

595

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

596

mc.mc_data0 = htobe32(MYX_ADDRLOW(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

597

mc.mc_data1 = htobe32(MYX_ADDRHIGH(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

598

mc.mc_data2 = htobe32(4096 * 0x1);

sys/dev/pci/if_myx.c

599

if (myx_cmd(sc, MYXCMD_UNALIGNED_DMA_TEST, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

604

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

605

mc.mc_data0 = htobe32(MYX_ADDRLOW(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

606

mc.mc_data1 = htobe32(MYX_ADDRHIGH(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

607

mc.mc_data2 = htobe32(4096 * 0x10001);

sys/dev/pci/if_myx.c

608

if (myx_cmd(sc, MYXCMD_UNALIGNED_DMA_TEST, &mc, NULL) != 0) {

sys/dev/pci/if_myx.c

693

myx_cmd(struct myx_softc *sc, u_int32_t cmd, struct myx_cmd *mc, u_int32_t *r)

sys/dev/pci/if_myx.c

700

mc->mc_cmd = htobe32(cmd);

sys/dev/pci/if_myx.c

701

mc->mc_addr_high = htobe32(MYX_ADDRHIGH(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

702

mc->mc_addr_low = htobe32(MYX_ADDRLOW(map->dm_segs[0].ds_addr));

sys/dev/pci/if_myx.c

708

myx_write(sc, MYX_CMD, (u_int8_t *)mc, sizeof(struct myx_cmd));

sys/dev/pci/if_myx.c

972

struct myx_cmd mc;

sys/dev/pci/if_myx.c

977

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

978

mc.mc_data0 = htobe32(0); /* get 1 byte */

sys/dev/pci/if_myx.c

979

mc.mc_data1 = htobe32((addr << 8) | off);

sys/dev/pci/if_myx.c

980

result = myx_cmd(sc, MYXCMD_I2C_READ, &mc, NULL);

sys/dev/pci/if_myx.c

985

memset(&mc, 0, sizeof(mc));

sys/dev/pci/if_myx.c

986

mc.mc_data0 = htobe32(off);

sys/dev/pci/if_myx.c

987

result = myx_cmd(sc, MYXCMD_I2C_BYTE, &mc, &r);

sys/dev/pci/pci.c

1642

bus_space_tag_t memt, pcireg_t *mc, struct msix_vector *table)

sys/dev/pci/pci.c

1667

*mc = reg;

sys/dev/pci/pci.c

1672

bus_space_tag_t memt, pcireg_t mc, struct msix_vector *table)

sys/dev/pci/pci.c

1702

pci_conf_write(pc, tag, off, mc);

sys/dev/pci/pci.c

1736

bus_space_tag_t memt, pcireg_t *mc, struct msix_vector *table)

sys/dev/pci/pci.c

1742

bus_space_tag_t memt, pcireg_t mc, struct msix_vector *table)

sys/dev/softraid.c

4969

struct sr_meta_chunk *mc;

sys/dev/softraid.c

4997

mc = (struct sr_meta_chunk *)(m + 1);

sys/dev/softraid.c

4998

for (i = 0; i < m->ssdi.ssd_chunk_no; i++, mc++) {

sys/dev/softraid.c

4999

printf("\t\tscm_volid %d\n", mc->scmi.scm_volid);

sys/dev/softraid.c

5000

printf("\t\tscm_chunk_id %d\n", mc->scmi.scm_chunk_id);

sys/dev/softraid.c

5001

printf("\t\tscm_devname %s\n", mc->scmi.scm_devname);

sys/dev/softraid.c

5002

printf("\t\tscm_size %lld\n", mc->scmi.scm_size);

sys/dev/softraid.c

5003

printf("\t\tscm_coerced_size %lld\n",mc->scmi.scm_coerced_size);

sys/dev/softraid.c

5005

sr_uuid_print(&mc->scmi.scm_uuid, 1);

sys/dev/softraid.c

5007

sr_checksum_print(mc->scm_checksum);

sys/dev/softraid.c

5009

printf("\t\tscm_status %d\n", mc->scm_status);

sys/dev/softraid.c

908

struct sr_meta_chunk *mc;

sys/dev/softraid.c

994

mc = (struct sr_meta_chunk *)(sm + 1);

sys/dev/softraid.c

995

if (strncmp(mc[sm->ssdi.ssd_chunk_id].scmi.scm_devname, devname,

sys/dev/softraid.c

996

sizeof(mc[sm->ssdi.ssd_chunk_id].scmi.scm_devname)))

sys/dev/softraid.c

998

DEVNAME(sc), mc[sm->ssdi.ssd_chunk_id].scmi.scm_devname,

sys/dev/usb/dwc2/dwc2_core.h

186

unsigned char mc;

sys/dev/wscons/wsmouse.c

1258

int *mc = red + m; /* row-wise minimal elements of cs */

sys/dev/wscons/wsmouse.c

1259

int *cs = mc + m; /* the column set */

sys/dev/wscons/wsmouse.c

1264

for (; p < mc; *p++ = 0) {}

sys/dev/wscons/wsmouse.c

1280

for (p = mc; p < cs; *p++ = col) {}

sys/dev/wscons/wsmouse.c

1284

mc[row] -= n;

sys/dev/wscons/wsmouse.c

1287

if (mc[i] >= 0) {

sys/dev/wscons/wsmouse.c

1288

d = p[mc[i]] - cd[mc[i]];

sys/dev/wscons/wsmouse.c

1292

mc[i] = j;

sys/dev/wscons/wsmouse.c

1307

for (j = mc[row]; (r2c[row] = j) != col;) {

sys/dev/wscons/wsmouse.c

1309

j = mc[row] + n;

sys/net/if_bridge.c

1160

struct mbuf *mc;

sys/net/if_bridge.c

1222

mc = m_dup_pkt(m, ETHER_ALIGN, M_NOWAIT);

sys/net/if_bridge.c

1223

if (mc == NULL)

sys/net/if_bridge.c

1226

bridge_ifinput(ifp, mc);

sys/net/if_bridge.c

1285

struct mbuf *mc;

sys/net/if_bridge.c

1336

mc = m;

sys/net/if_bridge.c

1339

mc = m_dup_pkt(m, ETHER_ALIGN, M_NOWAIT);

sys/net/if_bridge.c

1340

if (mc == NULL) {

sys/net/if_bridge.c

1346

mc = bridge_ip(&sc->sc_if, BRIDGE_OUT, dst_if, eh, mc);

sys/net/if_bridge.c

1347

if (mc == NULL)

sys/net/if_bridge.c

1350

len = mc->m_pkthdr.len;

sys/net/if_bridge.c

1352

if ((mc->m_flags & M_VLANTAG) &&

sys/net/if_bridge.c

1357

bridge_fragment(&sc->sc_if, dst_if, eh, mc);

sys/net/if_bridge.c

1359

bridge_ifenqueue(&sc->sc_if, dst_if, mc);

sys/net/if_bridge.c

1408

struct mbuf *mc;

sys/net/if_bridge.c

1418

mc = m_copym(m, 0, M_COPYALL, M_DONTWAIT);

sys/net/if_bridge.c

1419

if (mc == NULL) {

sys/net/if_bridge.c

1424

error = bridge_ifenqueue(brifp, ifp, mc);

sys/net/if_bridge.c

869

struct mbuf *mc;

sys/net/if_bridge.c

895

mc = m_dup_pkt(m, ETHER_ALIGN, M_NOWAIT);

sys/net/if_bridge.c

896

if (mc == NULL) {

sys/net/if_bridge.c

901

error = bridge_ifenqueue(brifp, dst_if, mc);

sys/net/if_trunk.c

815

struct trunk_mc *mc;

sys/net/if_trunk.c

823

if ((mc = malloc(sizeof(*mc), M_DEVBUF, M_NOWAIT)) == NULL) {

sys/net/if_trunk.c

829

ETHER_LOOKUP_MULTI(addrlo, addrhi, &tr->tr_ac, mc->mc_enm);

sys/net/if_trunk.c

830

bcopy(&ifr->ifr_addr, &mc->mc_addr, ifr->ifr_addr.sa_len);

sys/net/if_trunk.c

831

SLIST_INSERT_HEAD(&tr->tr_mc_head, mc, mc_entries);

sys/net/if_trunk.c

851

struct trunk_mc *mc;

sys/net/if_trunk.c

861

SLIST_FOREACH(mc, &tr->tr_mc_head, mc_entries)

sys/net/if_trunk.c

862

if (mc->mc_enm == enm)

sys/net/if_trunk.c

866

if (mc == NULL)

sys/net/if_trunk.c

875

SLIST_REMOVE(&tr->tr_mc_head, mc, trunk_mc, mc_entries);

sys/net/if_trunk.c

876

free(mc, M_DEVBUF, sizeof(*mc));

sys/net/if_trunk.c

892

struct trunk_mc *mc;

sys/net/if_trunk.c

896

while ((mc = SLIST_FIRST(&tr->tr_mc_head)) != NULL) {

sys/net/if_trunk.c

897

bcopy(&mc->mc_addr, &ifr->ifr_addr, mc->mc_addr.ss_len);

sys/net/if_trunk.c

902

SLIST_REMOVE(&tr->tr_mc_head, mc, trunk_mc, mc_entries);

sys/net/if_trunk.c

903

free(mc, M_DEVBUF, sizeof(*mc));

sys/net/if_trunk.c

911

struct trunk_mc *mc;

sys/net/if_trunk.c

917

SLIST_FOREACH(mc, &tr->tr_mc_head, mc_entries) {

sys/net/if_trunk.c

918

bcopy(&mc->mc_addr, &ifr->ifr_addr, mc->mc_addr.ss_len);

sys/net/if_vlan.c

1084

struct vlan_mc_entry *mc;

sys/net/if_vlan.c

1097

if ((mc = malloc(sizeof(*mc), M_DEVBUF, M_NOWAIT)) == NULL) {

sys/net/if_vlan.c

1107

ETHER_LOOKUP_MULTI(addrlo, addrhi, &sc->sc_ac, mc->mc_enm);

sys/net/if_vlan.c

1108

memcpy(&mc->mc_addr, &ifr->ifr_addr, ifr->ifr_addr.sa_len);

sys/net/if_vlan.c

1109

LIST_INSERT_HEAD(&sc->sc_mc_listhead, mc, mc_entries);

sys/net/if_vlan.c

1122

LIST_REMOVE(mc, mc_entries);

sys/net/if_vlan.c

1123

free(mc, M_DEVBUF, sizeof(*mc));

sys/net/if_vlan.c

1135

struct vlan_mc_entry *mc;

sys/net/if_vlan.c

1149

LIST_FOREACH(mc, &sc->sc_mc_listhead, mc_entries) {

sys/net/if_vlan.c

1150

if (mc->mc_enm == enm)

sys/net/if_vlan.c

1155

if (mc == NULL)

sys/net/if_vlan.c

1177

LIST_REMOVE(mc, mc_entries);

sys/net/if_vlan.c

1178

free(mc, M_DEVBUF, sizeof(*mc));

sys/net/if_vlan.c

1200

struct vlan_mc_entry *mc;

sys/net/if_vlan.c

1211

LIST_FOREACH(mc, &sc->sc_mc_listhead, mc_entries) {

sys/net/if_vlan.c

1212

memcpy(&ifr->ifr_addr, &mc->mc_addr, mc->mc_addr.ss_len);

sys/net/if_vlan.c

1221

struct vlan_mc_entry *mc;

sys/net/if_vlan.c

1223

while ((mc = LIST_FIRST(&sc->sc_mc_listhead)) != NULL) {

sys/net/if_vlan.c

1224

LIST_REMOVE(mc, mc_entries);

sys/net/if_vlan.c

1225

free(mc, M_DEVBUF, sizeof(*mc));

sys/net/if_wg.c

1586

struct mbuf *mc;

sys/net/if_wg.c

1609

if ((mc = m_clget(NULL, M_NOWAIT, out_len + max_hdr)) == NULL)

sys/net/if_wg.c

1611

m_align(mc, out_len);

sys/net/if_wg.c

1613

data = mtod(mc, struct wg_pkt_data *);

sys/net/if_wg.c

1623

mc->m_pkthdr.ph_flowid = m->m_pkthdr.ph_flowid;

sys/net/if_wg.c

1625

mc->m_pkthdr.pf.prio = m->m_pkthdr.pf.prio;

sys/net/if_wg.c

1633

m_freem(mc);

sys/net/if_wg.c

1648

mc->m_pkthdr.ph_loopcnt = m->m_pkthdr.ph_loopcnt;

sys/net/if_wg.c

1649

mc->m_flags &= ~(M_MCAST | M_BCAST);

sys/net/if_wg.c

1650

mc->m_pkthdr.len = mc->m_len = out_len;

sys/net/if_wg.c

1658

wg_peer_counters_add(peer, mc->m_pkthdr.len, 0);

sys/net/if_wg.c

1660

t->t_mbuf = mc;

sys/netinet/ip_carp.c

2509

struct carp_mc_entry *mc;

sys/netinet/ip_carp.c

2528

mc = malloc(sizeof(*mc), M_DEVBUF, M_NOWAIT);

sys/netinet/ip_carp.c

2529

if (mc == NULL) {

sys/netinet/ip_carp.c

2539

ETHER_LOOKUP_MULTI(addrlo, addrhi, &sc->sc_ac, mc->mc_enm);

sys/netinet/ip_carp.c

2540

memcpy(&mc->mc_addr, &ifr->ifr_addr, ifr->ifr_addr.sa_len);

sys/netinet/ip_carp.c

2541

LIST_INSERT_HEAD(&sc->carp_mc_listhead, mc, mc_entries);

sys/netinet/ip_carp.c

2552

LIST_REMOVE(mc, mc_entries);

sys/netinet/ip_carp.c

2553

free(mc, M_DEVBUF, sizeof(*mc));

sys/netinet/ip_carp.c

2566

struct carp_mc_entry *mc;

sys/netinet/ip_carp.c

2586

LIST_FOREACH(mc, &sc->carp_mc_listhead, mc_entries)

sys/netinet/ip_carp.c

2587

if (mc->mc_enm == enm)

sys/netinet/ip_carp.c

2591

if (mc == NULL) {

sys/netinet/ip_carp.c

2604

LIST_REMOVE(mc, mc_entries);

sys/netinet/ip_carp.c

2605

free(mc, M_DEVBUF, sizeof(*mc));

sys/netinet/ip_carp.c

2621

struct carp_mc_entry *mc;

sys/netinet/ip_carp.c

2635

while ((mc = LIST_FIRST(&sc->carp_mc_listhead)) != NULL) {

sys/netinet/ip_carp.c

2636

memcpy(&ifr->ifr_addr, &mc->mc_addr, mc->mc_addr.ss_len);

sys/netinet/ip_carp.c

2638

LIST_REMOVE(mc, mc_entries);

sys/netinet/ip_carp.c

2639

free(mc, M_DEVBUF, sizeof(*mc));

sys/netinet/ip_mroute.c

1344

struct mbuf *mc;

sys/netinet/ip_mroute.c

1421

mc = m_dup_pkt(m, max_linkhdr, M_NOWAIT);

sys/netinet/ip_mroute.c

1422

if (mc == NULL) {

sys/netinet/ip_mroute.c

1436

ip_output(mc, NULL, NULL, flags | IP_FORWARDING, &imo, NULL, 0);

sys/netinet6/icmp6.c

1017

LIST_FOREACH(mc, &icmp6_mtudisc_callbacks, mc_list)

sys/netinet6/icmp6.c

1018

(*mc->mc_func)(&sin6, m->m_pkthdr.ph_rtableid);

sys/netinet6/icmp6.c

214

struct icmp6_mtudisc_callback *mc;

sys/netinet6/icmp6.c

216

LIST_FOREACH(mc, &icmp6_mtudisc_callbacks, mc_list) {

sys/netinet6/icmp6.c

217

if (mc->mc_func == func)

sys/netinet6/icmp6.c

221

mc = malloc(sizeof(*mc), M_PCB, M_NOWAIT);

sys/netinet6/icmp6.c

222

if (mc == NULL)

sys/netinet6/icmp6.c

225

mc->mc_func = func;

sys/netinet6/icmp6.c

226

LIST_INSERT_HEAD(&icmp6_mtudisc_callbacks, mc, mc_list);

sys/netinet6/icmp6.c

953

struct icmp6_mtudisc_callback *mc;

usr.bin/cvs/checkout.c

239

struct module_checkout *mc;

usr.bin/cvs/checkout.c

301

mc = cvs_module_lookup(argv[i]);

usr.bin/cvs/checkout.c

302

current_module = mc;

usr.bin/cvs/checkout.c

304

RB_FOREACH(fl, cvs_flisthead, &(mc->mc_ignores))

usr.bin/cvs/checkout.c

307

RB_FOREACH(fl, cvs_flisthead, &(mc->mc_modules)) {

usr.bin/cvs/checkout.c

313

if (!(mc->mc_flags & MODULE_ALIAS) || dflag != NULL)

usr.bin/cvs/checkout.c

316

if (mc->mc_flags & MODULE_NORECURSE)

usr.bin/cvs/checkout.c

321

else if (mc->mc_flags & MODULE_ALIAS)

usr.bin/cvs/checkout.c

324

wdir = mc->mc_name;

usr.bin/cvs/checkout.c

331

if (!(mc->mc_flags & MODULE_ALIAS)) {

usr.bin/cvs/checkout.c

370

if (nflag != 1 && mc->mc_prog != NULL &&

usr.bin/cvs/checkout.c

371

mc->mc_flags & MODULE_RUN_ON_CHECKOUT)

usr.bin/cvs/checkout.c

372

cvs_exec(mc->mc_prog, NULL, 0);

usr.bin/cvs/checkout.c

377

if (mc->mc_canfree == 1) {

usr.bin/cvs/checkout.c

378

for (fl = RB_MIN(cvs_flisthead, &(mc->mc_modules));

usr.bin/cvs/checkout.c

381

&(mc->mc_modules), fl);

usr.bin/cvs/checkout.c

383

&(mc->mc_modules), fl);

usr.bin/cvs/checkout.c

394

free(mc);

usr.bin/cvs/commit.c

216

mc = cvs_module_lookup(repo);

usr.bin/cvs/commit.c

217

if (mc->mc_prog != NULL &&

usr.bin/cvs/commit.c

218

(mc->mc_flags & MODULE_RUN_ON_COMMIT))

usr.bin/cvs/commit.c

219

cvs_exec(mc->mc_prog, NULL, 0);

usr.bin/cvs/commit.c

67

struct module_checkout *mc;

usr.bin/cvs/modules.c

219

struct module_checkout *mc;

usr.bin/cvs/modules.c

222

mc = xmalloc(sizeof(*mc));

usr.bin/cvs/modules.c

226

mc->mc_modules = mi->mi_modules;

usr.bin/cvs/modules.c

227

mc->mc_ignores = mi->mi_ignores;

usr.bin/cvs/modules.c

228

mc->mc_canfree = 0;

usr.bin/cvs/modules.c

229

mc->mc_name = mi->mi_name;

usr.bin/cvs/modules.c

230

mc->mc_flags = mi->mi_flags;

usr.bin/cvs/modules.c

231

mc->mc_prog = mi->mi_prog;

usr.bin/cvs/modules.c

232

return (mc);

usr.bin/cvs/modules.c

236

RB_INIT(&(mc->mc_modules));

usr.bin/cvs/modules.c

237

RB_INIT(&(mc->mc_ignores));

usr.bin/cvs/modules.c

238

cvs_file_get(name, 0, &(mc->mc_modules), 0);

usr.bin/cvs/modules.c

239

mc->mc_canfree = 1;

usr.bin/cvs/modules.c

240

mc->mc_name = name;

usr.bin/cvs/modules.c

241

mc->mc_flags = MODULE_ALIAS;

usr.bin/cvs/modules.c

242

mc->mc_prog = NULL;

usr.bin/cvs/modules.c

244

return (mc);

usr.bin/mail/list.c

113

int tok, beg, mc, star, other, valdot, colmod, colresult;

usr.bin/mail/list.c

120

mc = 0;

usr.bin/mail/list.c

135

mc++;

usr.bin/mail/list.c

231

mc = 0;

usr.bin/mail/list.c

236

mc++;

usr.bin/mail/list.c

238

if (mc == 0) {

usr.bin/mail/list.c

250

if ((np > namelist || colmod != 0) && mc == 0)

usr.bin/mail/list.c

261

for (mc = 0, np = &namelist[0]; *np != NULL; np++)

usr.bin/mail/list.c

264

mc++;

usr.bin/mail/list.c

270

mc++;

usr.bin/mail/list.c

274

if (mc == 0)

usr.bin/mail/list.c

281

mc = 0;

usr.bin/mail/list.c

284

mc++;

usr.bin/mail/list.c

287

if (mc == 0) {

usr.bin/mandoc/roff_term.c

151

p->mc = n->child->string;

usr.bin/mandoc/term.c

451

p->mc = NULL;

usr.bin/mandoc/term.c

454

if (p->mc != NULL) {

usr.bin/mandoc/term.c

459

term_word(p, p->mc);

usr.bin/mandoc/term.h

120

const char *mc; /* Margin character. */

usr.bin/mg/cmode.c

358

getmatch(int c, int mc)

usr.bin/mg/cmode.c

364

match = (mc == '"');

usr.bin/mg/cmode.c

367

match = (mc == '\'');

usr.bin/mg/cmode.c

370

match = (mc == ')');

usr.bin/mg/cmode.c

373

match = (mc == ']');

usr.bin/mg/cmode.c

376

match = (mc == '}');

usr.bin/ssh/channels.h

326

int channel_proxy_downstream(struct ssh *, Channel *mc);

usr.sbin/dvmrpd/kmroute.c

214

struct mfcctl mc;

usr.sbin/dvmrpd/kmroute.c

220

mc.mfcc_origin = mfc->origin;

usr.sbin/dvmrpd/kmroute.c

221

mc.mfcc_mcastgrp = mfc->group;

usr.sbin/dvmrpd/kmroute.c

222

mc.mfcc_parent = mfc->ifindex;

usr.sbin/dvmrpd/kmroute.c

225

mc.mfcc_ttls[i] = mfc->ttls[i];

usr.sbin/dvmrpd/kmroute.c

228

if (setsockopt(fd, IPPROTO_IP, MRT_ADD_MFC, &mc, sizeof(mc))

usr.sbin/dvmrpd/kmroute.c

241

struct mfcctl mc;

usr.sbin/dvmrpd/kmroute.c

245

mc.mfcc_origin = mfc->origin;

usr.sbin/dvmrpd/kmroute.c

246

mc.mfcc_mcastgrp = mfc->group;

usr.sbin/dvmrpd/kmroute.c

248

if (setsockopt(fd, IPPROTO_IP, MRT_DEL_MFC, &mc, sizeof(mc))

usr.sbin/lpd/lp.c

180

CGETNUM(mc, 0);

usr.sbin/mrouted/kern.c

149

struct mfcctl mc;

usr.sbin/mrouted/kern.c

156

mc.mfcc_origin.s_addr = origin;

usr.sbin/mrouted/kern.c

158

mc.mfcc_originmask.s_addr = 0xffffffff;

usr.sbin/mrouted/kern.c

160

mc.mfcc_mcastgrp.s_addr = g->gt_mcastgrp;

usr.sbin/mrouted/kern.c

161

mc.mfcc_parent = g->gt_route ? g->gt_route->rt_parent : NO_VIF;

usr.sbin/mrouted/kern.c

163

mc.mfcc_ttls[i] = g->gt_ttls[i];

usr.sbin/mrouted/kern.c

167

(char *)&mc, sizeof(mc)) == -1) {

usr.sbin/mrouted/kern.c

181

struct mfcctl mc;

usr.sbin/mrouted/kern.c

188

mc.mfcc_origin.s_addr = origin;

usr.sbin/mrouted/kern.c

190

mc.mfcc_originmask.s_addr = 0xffffffff;

usr.sbin/mrouted/kern.c

192

mc.mfcc_mcastgrp.s_addr = g->gt_mcastgrp;

usr.sbin/mrouted/kern.c

196

(char *)&mc, sizeof(mc))) == -1) {

usr.sbin/unbound/util/data/msgreply.c

699

int mc;

usr.sbin/unbound/util/data/msgreply.c

702

if((mc = query_dname_compare(msg1->qname, msg2->qname)) != 0)

usr.sbin/unbound/util/data/msgreply.c

703

return mc;