lib/libm/arch/amd64/fenv.c

200

unsigned short control;

lib/libm/arch/amd64/fenv.c

208

__asm__ volatile ("fnstcw %0" : "=m" (control));

lib/libm/arch/amd64/fenv.c

210

return (control & _X87_ROUND_MASK);

lib/libm/arch/amd64/fenv.c

222

unsigned short control;

lib/libm/arch/amd64/fenv.c

230

__asm__ volatile ("fnstcw %0" : "=m" (control));

lib/libm/arch/amd64/fenv.c

233

control &= ~_X87_ROUND_MASK;

lib/libm/arch/amd64/fenv.c

234

control |= round;

lib/libm/arch/amd64/fenv.c

237

__asm__ volatile ("fldcw %0" : : "m" (control));

lib/libm/arch/amd64/fenv.c

368

unsigned short control;

lib/libm/arch/amd64/fenv.c

372

__asm__ volatile ("fnstcw %0" : "=m" (control));

lib/libm/arch/amd64/fenv.c

375

omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;

lib/libm/arch/amd64/fenv.c

376

control &= ~mask;

lib/libm/arch/amd64/fenv.c

377

__asm__ volatile ("fldcw %0" : : "m" (control));

lib/libm/arch/amd64/fenv.c

389

unsigned short control;

lib/libm/arch/amd64/fenv.c

393

__asm__ volatile ("fnstcw %0" : "=m" (control));

lib/libm/arch/amd64/fenv.c

396

omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;

lib/libm/arch/amd64/fenv.c

397

control |= mask;

lib/libm/arch/amd64/fenv.c

398

__asm__ volatile ("fldcw %0" : : "m" (control));

lib/libm/arch/amd64/fenv.c

409

unsigned short control;

lib/libm/arch/amd64/fenv.c

415

__asm__ volatile ("fnstcw %0" : "=m" (control));

lib/libm/arch/amd64/fenv.c

417

return (~control & FE_ALL_EXCEPT);

lib/libm/arch/i387/fenv.c

236

unsigned short control;

lib/libm/arch/i387/fenv.c

244

__asm__ volatile ("fnstcw %0" : "=m" (control));

lib/libm/arch/i387/fenv.c

246

return (control & _X87_ROUND_MASK);

lib/libm/arch/i387/fenv.c

258

unsigned short control;

lib/libm/arch/i387/fenv.c

266

__asm__ volatile ("fnstcw %0" : "=m" (control));

lib/libm/arch/i387/fenv.c

269

control &= ~_X87_ROUND_MASK;

lib/libm/arch/i387/fenv.c

270

control |= round;

lib/libm/arch/i387/fenv.c

273

__asm__ volatile ("fldcw %0" : : "m" (control));

lib/libm/arch/i387/fenv.c

411

unsigned short control;

lib/libm/arch/i387/fenv.c

415

__asm__ volatile ("fnstcw %0" : "=m" (control));

lib/libm/arch/i387/fenv.c

419

omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;

lib/libm/arch/i387/fenv.c

420

control &= ~mask;

lib/libm/arch/i387/fenv.c

421

__asm__ volatile ("fldcw %0" : : "m" (control));

lib/libm/arch/i387/fenv.c

435

unsigned short control;

lib/libm/arch/i387/fenv.c

439

__asm__ volatile ("fnstcw %0" : "=m" (control));

lib/libm/arch/i387/fenv.c

443

omask = ~(control | (mxcsr >> _SSE_MASK_SHIFT)) & FE_ALL_EXCEPT;

lib/libm/arch/i387/fenv.c

444

control |= mask;

lib/libm/arch/i387/fenv.c

445

__asm__ volatile ("fldcw %0" : : "m" (control));

lib/libm/arch/i387/fenv.c

458

unsigned short control;

lib/libm/arch/i387/fenv.c

464

__asm__ volatile ("fnstcw %0" : "=m" (control));

lib/libm/arch/i387/fenv.c

466

return (~control & FE_ALL_EXCEPT);

lib/libossaudio/ossaudio.c

144

i = malloc(sizeof(struct control));

lib/libossaudio/ossaudio.c

167

struct control *c;

lib/libossaudio/ossaudio.c

224

struct control *c;

lib/libossaudio/ossaudio.c

56

struct control *next;

lib/libossaudio/ossaudio.c

67

static struct control *controls;

lib/libossaudio/ossaudio.c

95

struct control *i, **pi;

libexec/login_ldap/aldap.c

454

aldap_parse_page_control(struct ber_element *control, size_t len)

libexec/login_ldap/aldap.c

463

ober_scanf_elements(control, "ss", &oid, &encoded);

libexec/login_ldap/aldap.c

464

ober_set_readbuf(&b, encoded, control->be_next->be_len);

regress/sys/kern/unixsockets/unfdpassfail.c

34

char control[CMSG_SPACE(sizeof(int)*2)];

regress/sys/kern/unixsockets/unfdpassfail.c

74

msgh.msg_control = msg_control.control;

regress/sys/kern/unixsockets/unfdpassfail.c

75

msgh.msg_controllen = sizeof(msg_control.control);

regress/sys/kern/unixsockets/ungc.c

114

msgh.msg_control = msg_control.control;

regress/sys/kern/unixsockets/ungc.c

33

char control[CMSG_SPACE(sizeof(int) * 2)];

regress/sys/kern/unixsockets/ungc.c

61

msgh.msg_control = msg_control.control;

regress/sys/kern/unixsockets/unsopassgc.c

109

msgh.msg_control = msg_control.control;

regress/sys/kern/unixsockets/unsopassgc.c

110

msgh.msg_controllen = sizeof(msg_control.control);

regress/sys/kern/unixsockets/unsopassgc.c

158

msgh.msg_control = msg_control.control;

regress/sys/kern/unixsockets/unsopassgc.c

159

msgh.msg_controllen = sizeof(msg_control.control);

regress/sys/kern/unixsockets/unsopassgc.c

217

msgh.msg_control = msg_control.control;

regress/sys/kern/unixsockets/unsopassgc.c

218

msgh.msg_controllen = sizeof(msg_control.control);

regress/sys/kern/unixsockets/unsopassgc.c

82

char control[CMSG_SPACE(sizeof(int) * PASSFD_NUM)];

sbin/iked/iked.c

55

{ "control", PROC_CONTROL, parent_dispatch_control, control },

sbin/iked/iked.h

976

void control(struct privsep *, struct privsep_proc *);

sbin/unwind/libunbound/daemon/acl_list.h

140

enum acl_access control);

sbin/unwind/libunbound/daemon/acl_list.h

96

enum acl_access control;

sbin/unwind/libunbound/util/netevent.c

1357

} control;

sbin/unwind/libunbound/util/netevent.c

1366

msg.msg_control = control.buf;

sbin/unwind/libunbound/util/netevent.c

1368

msg.msg_controllen = sizeof(control.buf);

sbin/unwind/libunbound/util/netevent.c

1372

doq_set_localaddr_cmsg(&msg, sizeof(control.buf), &paddr->localaddr,

sbin/unwind/libunbound/util/netevent.c

635

} control;

sbin/unwind/libunbound/util/netevent.c

653

msg.msg_control = control.buf;

sbin/unwind/libunbound/util/netevent.c

655

msg.msg_controllen = sizeof(control.buf);

sbin/unwind/libunbound/util/netevent.c

665

log_assert(msg.msg_controllen <= sizeof(control.buf));

sbin/unwind/libunbound/util/netevent.c

681

log_assert(msg.msg_controllen <= sizeof(control.buf));

sbin/unwind/libunbound/util/netevent.c

699

log_assert(msg.msg_controllen <= sizeof(control.buf));

sbin/unwind/libunbound/util/netevent.c

716

log_assert(msg.msg_controllen <= sizeof(control.buf));

sys/arch/hppa/dev/elroy.c

1265

elroy_write32(&r->control, elroy_read32(&r->control) &

sys/arch/hppa/dev/elroy.c

254

u_int32_t arb_mask, err_cfg, control;

sys/arch/hppa/dev/elroy.c

260

control = elroy_read32(&r->control);

sys/arch/hppa/dev/elroy.c

265

elroy_write32(&r->control, (control | htole32(ELROY_CONTROL_CE)) &

sys/arch/hppa/dev/elroy.c

272

elroy_write32(&r->control, control |

sys/arch/hppa/dev/elroy.c

274

elroy_write32(&r->control, control);

sys/arch/hppa/dev/elroy.c

289

u_int32_t arb_mask, err_cfg, control;

sys/arch/hppa/dev/elroy.c

295

control = elroy_read32(&r->control);

sys/arch/hppa/dev/elroy.c

300

elroy_write32(&r->control, (control | htole32(ELROY_CONTROL_CE)) &

sys/arch/hppa/dev/elroy.c

313

elroy_write32(&r->control, control |

sys/arch/hppa/dev/elroy.c

315

elroy_write32(&r->control, control);

sys/arch/hppa/dev/elroyreg.h

55

u_int32_t control; /* 0x108 */

sys/arch/hppa/stand/libsa/cmd_hppa.c

916

uint32_t arb_mask, err_cfg, control;

sys/arch/hppa/stand/libsa/cmd_hppa.c

923

control = *(volatile uint32_t *)&elroy->control;

sys/arch/hppa/stand/libsa/cmd_hppa.c

930

*(volatile uint32_t *)&elroy->control =

sys/arch/hppa/stand/libsa/cmd_hppa.c

931

(control | htole32(ELROY_CONTROL_CE)) & ~htole32(ELROY_CONTROL_HF);

sys/arch/hppa/stand/libsa/cmd_hppa.c

937

*(volatile uint32_t *)&elroy->control =

sys/arch/hppa/stand/libsa/cmd_hppa.c

938

control | htole32(ELROY_CONTROL_CE | ELROY_CONTROL_CL);

sys/arch/hppa/stand/libsa/cmd_hppa.c

939

*(volatile uint32_t *)&elroy->control = control;

sys/arch/i386/isa/npx.c

191

int control;

sys/arch/i386/isa/npx.c

215

control = 0x5a5a;

sys/arch/i386/isa/npx.c

216

fnstcw(&control);

sys/arch/i386/isa/npx.c

217

if ((control & 0x1f3f) == 0x033f) {

sys/arch/i386/isa/npx.c

222

control &= ~(1 << 2); /* enable divide by 0 trap */

sys/arch/i386/isa/npx.c

223

fldcw(&control);

sys/arch/i386/pci/glxsb.c

551

glxsb_aes(struct glxsb_softc *sc, uint32_t control, uint32_t psrc,

sys/arch/i386/pci/glxsb.c

576

control |= SB_CTL_CBC;

sys/arch/i386/pci/glxsb.c

584

control | SB_CTL_WK | SB_CTL_DC | SB_CTL_SC | SB_CTL_ST);

sys/arch/i386/pci/glxsb.c

655

uint32_t control;

sys/arch/i386/pci/glxsb.c

677

control = SB_CTL_ENC;

sys/arch/i386/pci/glxsb.c

698

control = SB_CTL_DEC;

sys/arch/i386/pci/glxsb.c

733

glxsb_aes(sc, control, op_psrc, op_pdst, ses->ses_key,

sys/arch/loongson/dev/stsec.c

252

int status, control, batl, bath;

sys/arch/loongson/dev/stsec.c

265

stsec_read(sc, ST7_CONTROL, &control) != 0 ||

sys/arch/loongson/dev/stsec.c

299

ks->value = !!ISSET(control, STC_CHARGE_ENABLE);

sys/arch/loongson/dev/stsec.c

324

if (ISSET(control, STC_CHARGE_ENABLE))

sys/arch/loongson/dev/voyager.c

372

uint32_t control, value;

sys/arch/loongson/dev/voyager.c

377

control = bus_space_read_4(sc->sc_mmiot, sc->sc_mmioh,

sys/arch/loongson/dev/voyager.c

383

if ((control & 1) == 0) {

sys/arch/loongson/dev/voyager.c

394

control = bus_space_read_4(sc->sc_mmiot, sc->sc_mmioh,

sys/arch/loongson/dev/voyager.c

400

if ((control & 1) == 0) {

sys/arch/luna88k/dev/siotty.c

412

siomctl(struct siotty_softc *sc, int control, int op)

sys/arch/luna88k/dev/siotty.c

417

if (control & TIOCM_BREAK)

sys/arch/luna88k/dev/siotty.c

419

if (control & TIOCM_DTR)

sys/arch/luna88k/dev/siotty.c

421

if (control & TIOCM_RTS)

sys/arch/m88k/m88k/db_trace.c

124

} *ptr, control[] = {

sys/arch/m88k/m88k/db_trace.c

159

for (ptr = &control[0]; ptr < &control[nitems(control)]; ptr++)

sys/dev/ata/atascsi.h

234

u_int8_t control;

sys/dev/fdt/sxitwi.c

493

sxitwi_wait(struct sxitwi_softc *sc, u_int control, u_int expect, int flags)

sys/dev/fdt/sxitwi.c

498

sxitwi_write_4(sc, TWSI_CONTROL, control | sc->sc_twsien_iflg);

sys/dev/fdt/sxitwi.c

501

control = sxitwi_read_4(sc, TWSI_CONTROL);

sys/dev/fdt/sxitwi.c

502

if (control & CONTROL_IFLG)

sys/dev/ic/ahci.c

3021

fis->control = ATA_FIS_CONTROL_4BIT;

sys/dev/ic/ahci.c

3059

fis->control = ATA_FIS_CONTROL_4BIT;

sys/dev/ic/aic79xx.c

10056

scb->hscb->task_attribute = scb->hscb->control & SCB_TAG_TYPE;

sys/dev/ic/aic79xx.c

1119

scb->hscb->control &= ~(TAG_ENB|SCB_TAG_TYPE);

sys/dev/ic/aic79xx.c

1120

scb->hscb->control |= MK_MESSAGE;

sys/dev/ic/aic79xx.c

1121

ahd_outb(ahd, SCB_CONTROL, scb->hscb->control);

sys/dev/ic/aic79xx.c

2415

if ((scb->hscb->control & TAG_ENB) != 0)

sys/dev/ic/aic79xx.c

2728

hscb->control,

sys/dev/ic/aic79xx.c

3408

pending_scb->hscb->control &= ~MK_MESSAGE;

sys/dev/ic/aic79xx.c

3442

u_int control;

sys/dev/ic/aic79xx.c

3446

control = ahd_inb_scbram(ahd, SCB_CONTROL);

sys/dev/ic/aic79xx.c

3447

control &= ~MK_MESSAGE;

sys/dev/ic/aic79xx.c

3448

control |= pending_scb->hscb->control & MK_MESSAGE;

sys/dev/ic/aic79xx.c

3449

ahd_outb(ahd, SCB_CONTROL, control);

sys/dev/ic/aic79xx.c

3543

if ((scb->hscb->control & TARGET_SCB) != 0)

sys/dev/ic/aic79xx.c

3597

if ((scb->hscb->control & DISCENB) != 0)

sys/dev/ic/aic79xx.c

3602

if ((scb->hscb->control & TAG_ENB) != 0) {

sys/dev/ic/aic79xx.c

3604

scb->hscb->control & (TAG_ENB|SCB_TAG_TYPE);

sys/dev/ic/aic79xx.c

3625

if ((scb->hscb->control & TAG_ENB) != 0) {

sys/dev/ic/aic79xx.c

3633

(scb->hscb->control & TAG_ENB) != 0 ? " Tag" : "");

sys/dev/ic/aic79xx.c

3658

"SCB flags = %x", SCB_GET_TAG(scb), scb->hscb->control,

sys/dev/ic/aic79xx.c

3669

scb->hscb->control &= ~MK_MESSAGE;

sys/dev/ic/aic79xx.c

4783

} else if ((scb->hscb->control & MSG_SIMPLE_TASK) != 0) {

sys/dev/ic/aic79xx.c

4787

tag_type = (scb->hscb->control & MSG_SIMPLE_TASK);

sys/dev/ic/aic79xx.c

4811

scb->hscb->control &= mask;

sys/dev/ic/aic79xx.c

5809

scb->hscb->control = 0;

sys/dev/ic/aic79xx.c

6351

ahd_outb(ahd, ABRTBYTEPTR, offsetof(struct hardware_scb, control));

sys/dev/ic/aic79xx.c

8016

sc->control = 0;

sys/dev/ic/aic79xx.c

8025

hscb->control = 0;

sys/dev/ic/aic79xx.c

8041

hscb->control |= MK_MESSAGE;

sys/dev/ic/aic79xx.h

513

/*18*/ uint8_t control; /* See SCB_CONTROL in aic79xx.reg for details */

sys/dev/ic/aic79xx_openbsd.c

286

scb->hscb->control = 0;

sys/dev/ic/aic79xx_openbsd.c

299

hscb->control = 0;

sys/dev/ic/aic79xx_openbsd.c

305

hscb->control |= MK_MESSAGE;

sys/dev/ic/aic79xx_openbsd.c

379

scb->hscb->control |= DISCENB;

sys/dev/ic/aic79xx_openbsd.c

382

scb->hscb->control |= TAG_ENB;

sys/dev/ic/aic79xx_openbsd.c

387

scb->hscb->control &= ~MK_MESSAGE;

sys/dev/ic/aic79xx_openbsd.c

392

scb->hscb->control |= MK_MESSAGE;

sys/dev/ic/aic7xxx.c

1387

if ((scb->hscb->control & TAG_ENB) != 0)

sys/dev/ic/aic7xxx.c

1569

hscb->control,

sys/dev/ic/aic7xxx.c

2153

pending_hscb->control &= ~ULTRAENB;

sys/dev/ic/aic7xxx.c

2155

pending_hscb->control |= ULTRAENB;

sys/dev/ic/aic7xxx.c

2161

pending_hscb->control &= ~MK_MESSAGE;

sys/dev/ic/aic7xxx.c

2182

u_int control;

sys/dev/ic/aic7xxx.c

2192

control = ahc_inb(ahc, SCB_CONTROL);

sys/dev/ic/aic7xxx.c

2193

control &= ~(ULTRAENB|MK_MESSAGE);

sys/dev/ic/aic7xxx.c

2194

control |= pending_hscb->control & (ULTRAENB|MK_MESSAGE);

sys/dev/ic/aic7xxx.c

2195

ahc_outb(ahc, SCB_CONTROL, control);

sys/dev/ic/aic7xxx.c

2329

if ((scb->hscb->control & DISCENB) != 0)

sys/dev/ic/aic7xxx.c

2334

if ((scb->hscb->control & TAG_ENB) != 0) {

sys/dev/ic/aic7xxx.c

2336

scb->hscb->control & (TAG_ENB|SCB_TAG_TYPE);

sys/dev/ic/aic7xxx.c

2356

if ((scb->hscb->control & TAG_ENB) != 0)

sys/dev/ic/aic7xxx.c

2363

(scb->hscb->control & TAG_ENB) != 0 ? " Tag" : "");

sys/dev/ic/aic7xxx.c

2380

"SCB flags = %x", scb->hscb->tag, scb->hscb->control,

sys/dev/ic/aic7xxx.c

2389

scb->hscb->control &= ~MK_MESSAGE;

sys/dev/ic/aic7xxx.c

3530

} else if ((scb->hscb->control & MSG_SIMPLE_TASK) != 0) {

sys/dev/ic/aic7xxx.c

3534

tag_type = (scb->hscb->control & MSG_SIMPLE_TASK);

sys/dev/ic/aic7xxx.c

3558

scb->hscb->control &= mask;

sys/dev/ic/aic7xxx.c

557

sc->control = 0;

sys/dev/ic/aic7xxx.c

566

hscb->control = 0;

sys/dev/ic/aic7xxx.c

583

hscb->control |= MK_MESSAGE;

sys/dev/ic/aic7xxx.c

6556

ahc_scb_control_print(scb->hscb->control, &cur_col, 60);

sys/dev/ic/aic7xxx_openbsd.c

271

hscb->control = 0;

sys/dev/ic/aic7xxx_openbsd.c

283

hscb->control = 0;

sys/dev/ic/aic7xxx_openbsd.c

289

hscb->control |= MK_MESSAGE;

sys/dev/ic/aic7xxx_openbsd.c

381

scb->hscb->control |= ULTRAENB;

sys/dev/ic/aic7xxx_openbsd.c

384

scb->hscb->control |= DISCENB;

sys/dev/ic/aic7xxx_openbsd.c

388

scb->hscb->control |= MK_MESSAGE;

sys/dev/ic/aic7xxx_openbsd.c

392

scb->hscb->control |= TAG_ENB;

sys/dev/ic/aic7xxx_openbsd.c

413

if ((scb->hscb->control & (TARGET_SCB|TAG_ENB)) == 0

sys/dev/ic/aic7xxx_openbsd.c

736

hscb->control = 0;

sys/dev/ic/aic7xxxvar.h

477

/*24*/ uint8_t control; /* See SCB_CONTROL in aic7xxx.reg for details */

sys/dev/ic/cacreg.h

131

u_int8_t control;

sys/dev/ic/lpt.c

149

u_int8_t control;

sys/dev/ic/lpt.c

181

control = LPC_SELECT | LPC_NINIT;

sys/dev/ic/lpt.c

182

bus_space_write_1(sc->sc_iot, sc->sc_ioh, lpt_control, control);

sys/dev/ic/lpt.c

203

control |= LPC_IENABLE;

sys/dev/ic/lpt.c

205

control |= LPC_AUTOLF;

sys/dev/ic/lpt.c

206

sc->sc_control = control;

sys/dev/ic/lpt.c

207

bus_space_write_1(sc->sc_iot, sc->sc_ioh, lpt_control, control);

sys/dev/ic/lpt.c

288

u_int8_t control = sc->sc_control;

sys/dev/ic/lpt.c

318

control | LPC_STROBE);

sys/dev/ic/lpt.c

320

bus_space_write_1(iot, ioh, lpt_control, control);

sys/dev/ic/lpt.c

402

u_int8_t control = sc->sc_control;

sys/dev/ic/lpt.c

406

bus_space_write_1(iot, ioh, lpt_control, control | LPC_STROBE);

sys/dev/ic/lpt.c

408

bus_space_write_1(iot, ioh, lpt_control, control);

sys/dev/ic/qlareg.h

386

u_int8_t control;

sys/dev/ic/qwx.c

23741

for (i = 0; i < ARRAY_SIZE(arvif->bitrate_mask.control); i++) {

sys/dev/ic/qwx.c

23742

arvif->bitrate_mask.control[i].legacy = 0xffffffff;

sys/dev/ic/qwx.c

23743

arvif->bitrate_mask.control[i].gi = 0;

sys/dev/ic/qwx.c

23744

memset(arvif->bitrate_mask.control[i].ht_mcs, 0xff,

sys/dev/ic/qwx.c

23745

sizeof(arvif->bitrate_mask.control[i].ht_mcs));

sys/dev/ic/qwx.c

23746

memset(arvif->bitrate_mask.control[i].vht_mcs, 0xff,

sys/dev/ic/qwx.c

23747

sizeof(arvif->bitrate_mask.control[i].vht_mcs));

sys/dev/ic/qwx.c

23748

memset(arvif->bitrate_mask.control[i].he_mcs, 0xff,

sys/dev/ic/qwx.c

23749

sizeof(arvif->bitrate_mask.control[i].he_mcs));

sys/dev/ic/qwz.c

20923

for (i = 0; i < ARRAY_SIZE(arvif->bitrate_mask.control); i++) {

sys/dev/ic/qwz.c

20924

arvif->bitrate_mask.control[i].legacy = 0xffffffff;

sys/dev/ic/qwz.c

20925

arvif->bitrate_mask.control[i].gi = 0;

sys/dev/ic/qwz.c

20926

memset(arvif->bitrate_mask.control[i].ht_mcs, 0xff,

sys/dev/ic/qwz.c

20927

sizeof(arvif->bitrate_mask.control[i].ht_mcs));

sys/dev/ic/qwz.c

20928

memset(arvif->bitrate_mask.control[i].vht_mcs, 0xff,

sys/dev/ic/qwz.c

20929

sizeof(arvif->bitrate_mask.control[i].vht_mcs));

sys/dev/ic/qwz.c

20930

memset(arvif->bitrate_mask.control[i].he_mcs, 0xff,

sys/dev/ic/qwz.c

20931

sizeof(arvif->bitrate_mask.control[i].he_mcs));

sys/dev/ic/sili.c

1216

prb->control = SILI_PRB_SOFT_RESET;

sys/dev/ic/sili.c

1267

sreset.control = htole16(SILI_PRB_SOFT_RESET | SILI_PRB_INTERRUPT_MASK);

sys/dev/ic/sili.c

1430

atapi->control = htole16(SILI_PRB_PACKET_WRITE);

sys/dev/ic/sili.c

1432

atapi->control = htole16(SILI_PRB_PACKET_READ);

sys/dev/ic/sili.c

1439

ata->control = 0;

sys/dev/ic/sili.c

1674

read_10h.control = htole16(SILI_PRB_INTERRUPT_MASK);

sys/dev/ic/sili.c

1782

fis->control = ATA_FIS_CONTROL_4BIT;

sys/dev/ic/sili.c

1828

fis->control = ATA_FIS_CONTROL_4BIT;

sys/dev/ic/silireg.h

217

u_int16_t control;

sys/dev/ic/silireg.h

227

u_int16_t control;

sys/dev/ic/silireg.h

239

u_int16_t control;

sys/dev/ic/silireg.h

253

u_int16_t control;

sys/dev/ic/siop.c

1159

cmd->control = 0;

sys/dev/pci/auacer.c

457

uint32_t control;

sys/dev/pci/auacer.c

487

control = READ4(sc, ALI_SCR);

sys/dev/pci/auacer.c

488

control &= ~ALI_SCR_PCM_246_MASK;

sys/dev/pci/auacer.c

490

control |= ALI_SCR_PCM_4;

sys/dev/pci/auacer.c

492

control |= ALI_SCR_PCM_6;

sys/dev/pci/auacer.c

493

WRITE4(sc, ALI_SCR, control);

sys/dev/pci/auich.c

594

u_int32_t control;

sys/dev/pci/auich.c

597

control = bus_space_read_4(sc->iot, sc->aud_ioh, AUICH_GCTRL);

sys/dev/pci/auich.c

598

control &= ~(AUICH_ACLSO | sc->sc_pcm246_mask);

sys/dev/pci/auich.c

599

control |= (control & AUICH_CRESET) ? AUICH_WRESET : AUICH_CRESET;

sys/dev/pci/auich.c

600

bus_space_write_4(sc->iot, sc->aud_ioh, AUICH_GCTRL, control);

sys/dev/pci/auich.c

656

u_int32_t control;

sys/dev/pci/auich.c

729

control = bus_space_read_4(sc->iot, sc->aud_ioh, AUICH_GCTRL);

sys/dev/pci/auich.c

730

control &= ~(sc->sc_pcm246_mask);

sys/dev/pci/auich.c

732

control |= sc->sc_pcm4;

sys/dev/pci/auich.c

734

control |= sc->sc_pcm6;

sys/dev/pci/auich.c

735

bus_space_write_4(sc->iot, sc->aud_ioh, AUICH_GCTRL, control);

sys/dev/pci/azalia.c

1217

azalia_comresp(const codec_t *codec, nid_t nid, uint32_t control,

sys/dev/pci/azalia.c

1223

err = azalia_set_command(codec->az, codec->address, nid, control,

sys/dev/pci/azalia.c

1234

azalia_set_command(azalia_t *az, int caddr, nid_t nid, uint32_t control,

sys/dev/pci/azalia.c

1246

verb = (caddr << 28) | (nid << 20) | (control << 8) | param;

sys/dev/pci/bktr/bktr_audio.c

273

set_BTSC( bktr_ptr_t bktr, int control )

sys/dev/pci/bktr/bktr_audio.c

275

return( i2cWrite( bktr, TDA9850_WADDR, CON3ADDR, control ) );

sys/dev/pci/bktr/bktr_audio.h

82

int set_BTSC( bktr_ptr_t bktr, int control );

sys/dev/pci/bktr/bktr_tuner.c

761

u_char control;

sys/dev/pci/bktr/bktr_tuner.c

804

control = tuner->pllControl[ band_select ];

sys/dev/pci/bktr/bktr_tuner.c

807

if(!(band && control)) /* Don't try to set un- */

sys/dev/pci/bktr/bktr_tuner.c

812

i2cWrite( bktr, addr, control, band );

sys/dev/pci/bktr/bktr_tuner.c

815

i2cWrite( bktr, addr, control, band );

sys/dev/pci/bktr/bktr_tuner.c

865

control = tuner->pllControl[ band_select ];

sys/dev/pci/bktr/bktr_tuner.c

868

if(!(band && control)) /* Don't try to set un- */

sys/dev/pci/bktr/bktr_tuner.c

875

i2cWrite( bktr, addr, control, band );

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3053

struct amdgpu_ras_eeprom_control *control =

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3079

if (control->tbl_hdr.version < RAS_TABLE_VER_V3) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3081

if (control->ras_num_recs - i >= adev->umc.retire_unit) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3123

struct amdgpu_ras_eeprom_control *control;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3143

control = &con->eeprom_control;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3145

unit_num = data->count / adev->umc.retire_unit - control->ras_num_recs;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3146

save_count = con->bad_page_num - control->ras_num_bad_pages;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3156

if (amdgpu_ras_eeprom_append(control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3163

if (amdgpu_ras_eeprom_append(control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3185

struct amdgpu_ras_eeprom_control *control =

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3191

if (control->ras_num_recs == 0 || amdgpu_bad_page_threshold == 0)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3194

bps = kcalloc(control->ras_num_recs, sizeof(*bps), GFP_KERNEL);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3198

ret = amdgpu_ras_eeprom_read(control, bps, control->ras_num_recs);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3206

if (control->tbl_hdr.version < RAS_TABLE_VER_V3) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3207

for (i = 0; i < control->ras_num_recs; i++) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3208

if ((control->ras_num_recs - i) >= adev->umc.retire_unit) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3211

control->ras_num_pa_recs += adev->umc.retire_unit;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3214

control->ras_num_mca_recs +=

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3215

(control->ras_num_recs - i);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3219

control->ras_num_mca_recs += (control->ras_num_recs - i);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3224

control->ras_num_mca_recs = control->ras_num_recs;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3228

ret = amdgpu_ras_add_bad_pages(adev, bps, control->ras_num_recs, true);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3232

ret = amdgpu_ras_eeprom_check(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3633

struct amdgpu_ras_eeprom_control *control;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3639

control = &con->eeprom_control;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3640

ret = amdgpu_ras_eeprom_init(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3641

control->is_eeprom_valid = !ret;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3644

control->ras_num_pa_recs = control->ras_num_recs;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3650

if (control->ras_num_recs && control->is_eeprom_valid) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3653

control->is_eeprom_valid = false;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3658

adev, control->ras_num_bad_pages);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3662

adev, control->bad_channel_bitmap);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3668

control->tbl_hdr.version < RAS_TABLE_VER_V3)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3669

if (!amdgpu_ras_eeprom_reset_table(control))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1008

g0 = control->ras_fri + num - 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1009

g1 = g0 % control->ras_max_record_count;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1010

if (g0 < control->ras_max_record_count) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1014

g0 = control->ras_max_record_count - control->ras_fri;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1018

mutex_lock(&control->ras_tbl_mutex);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1019

res = __amdgpu_ras_eeprom_read(control, buf, control->ras_fri, g0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1023

res = __amdgpu_ras_eeprom_read(control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1036

__decode_table_record_from_buf(control, &record[i], pp);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1039

if ((record[i].mem_channel < BITS_PER_TYPE(control->bad_channel_bitmap)) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1040

!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1041

control->bad_channel_bitmap |= 1 << record[i].mem_channel;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1047

mutex_unlock(&control->ras_tbl_mutex);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1052

uint32_t amdgpu_ras_eeprom_max_record_count(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1055

amdgpu_ras_set_eeprom_table_version(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1057

if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1070

struct amdgpu_ras_eeprom_control *control = ras ? &ras->eeprom_control : NULL;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1077

if (!ras || !control) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1081

RAS_TBL_SIZE_BYTES, control->ras_max_record_count);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1118

static loff_t amdgpu_ras_debugfs_table_size(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1121

strlen(rec_hdr_str) + rec_hdr_fmt_size * control->ras_num_recs;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1124

void amdgpu_ras_debugfs_set_ret_size(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1126

struct amdgpu_ras *ras = container_of(control, struct amdgpu_ras,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1131

d_inode(de)->i_size = amdgpu_ras_debugfs_table_size(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1139

struct amdgpu_ras_eeprom_control *control = &ras->eeprom_control;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1144

mutex_lock(&control->ras_tbl_mutex);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1166

control->tbl_hdr.header,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1167

control->tbl_hdr.version,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1168

control->tbl_hdr.first_rec_offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1169

control->tbl_hdr.tbl_size,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1170

control->tbl_hdr.checksum);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1196

data_len = amdgpu_ras_debugfs_table_size(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1212

for ( ; size > 0 && s < control->ras_num_recs; s++) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1213

u32 ai = RAS_RI_TO_AI(control, s);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1216

res = __amdgpu_ras_eeprom_read(control, dare, ai, 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1219

__decode_table_record_from_buf(control, &record, dare);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1222

RAS_INDEX_TO_OFFSET(control, ai),

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1244

mutex_unlock(&control->ras_tbl_mutex);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1254

struct amdgpu_ras_eeprom_control *control = ras ? &ras->eeprom_control : NULL;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1261

if (!ras || !control) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1287

void amdgpu_ras_debugfs_set_ret_size(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1302

static int __verify_ras_table_checksum(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1304

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1308

if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1311

control->ras_num_recs * RAS_TABLE_RECORD_SIZE;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1314

control->ras_num_recs * RAS_TABLE_RECORD_SIZE;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1324

control->i2c_address +

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1325

control->ras_header_offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1344

static int __read_table_ras_info(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1346

struct amdgpu_ras_eeprom_table_ras_info *rai = &control->tbl_rai;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1347

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1363

control->i2c_address + control->ras_info_offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1379

int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1381

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1383

struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1396

if (!__get_eeprom_i2c_addr(adev, control))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1399

control->ras_header_offset = RAS_HDR_START;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1400

control->ras_info_offset = RAS_TABLE_V2_1_INFO_START;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1401

rw_init(&control->ras_tbl_mutex, "rastbl");

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1405

control->i2c_address + control->ras_header_offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1418

return amdgpu_ras_eeprom_reset_table(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1424

control->ras_num_recs = RAS_NUM_RECS_V2_1(hdr);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1425

control->ras_record_offset = RAS_RECORD_START_V2_1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1426

control->ras_max_record_count = RAS_MAX_RECORD_COUNT_V2_1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1429

control->ras_num_recs = RAS_NUM_RECS(hdr);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1430

control->ras_record_offset = RAS_RECORD_START;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1431

control->ras_max_record_count = RAS_MAX_RECORD_COUNT;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1440

if (control->ras_num_recs > control->ras_max_record_count) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1443

control->ras_num_recs, control->ras_max_record_count);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1447

control->ras_fri = RAS_OFFSET_TO_INDEX(control, hdr->first_rec_offset);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1448

control->ras_num_mca_recs = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1449

control->ras_num_pa_recs = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1453

int amdgpu_ras_eeprom_check(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1455

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1456

struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1467

if (!__get_eeprom_i2c_addr(adev, control))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1470

control->ras_num_bad_pages = ras->bad_page_num;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1475

control->ras_num_bad_pages);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1478

res = __read_table_ras_info(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1483

res = __verify_ras_table_checksum(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1493

if (10 * control->ras_num_bad_pages >= 9 * ras->bad_page_cnt_threshold)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1495

control->ras_num_bad_pages,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1500

res = __read_table_ras_info(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1505

res = __verify_ras_table_checksum(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1512

if (ras->bad_page_cnt_threshold >= control->ras_num_bad_pages) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1522

control->ras_num_bad_pages,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1524

res = amdgpu_ras_eeprom_correct_header_tag(control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1529

control->ras_num_bad_pages, ras->bad_page_cnt_threshold);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1549

struct amdgpu_ras_eeprom_control *control;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1554

control = &ras->eeprom_control;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1555

if (!control->is_eeprom_valid)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1557

res = __verify_ras_table_checksum(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1562

if (!amdgpu_ras_eeprom_reset_table(control))

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1564

if (!__verify_ras_table_checksum(control)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1569

control->is_eeprom_valid = false;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

173

struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

178

if (!control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

191

control->i2c_address = ((u32) i2c_addr) << 16;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

200

control->i2c_address = EEPROM_I2C_MADDR_0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

204

control->i2c_address = EEPROM_I2C_MADDR_0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

206

control->i2c_address = EEPROM_I2C_MADDR_4;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

209

control->i2c_address = EEPROM_I2C_MADDR_0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

214

control->i2c_address = EEPROM_I2C_MADDR_4;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

216

control->i2c_address = EEPROM_I2C_MADDR_0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

221

control->i2c_address = EEPROM_I2C_MADDR_0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

223

control->i2c_address = EEPROM_I2C_MADDR_4;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

229

control->i2c_address = EEPROM_I2C_MADDR_4;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

262

static int __write_table_header(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

265

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

269

__encode_table_header_to_buf(&control->tbl_hdr, buf);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

274

control->i2c_address +

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

275

control->ras_header_offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

319

static int __write_table_ras_info(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

321

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

332

__encode_table_ras_info_to_buf(&control->tbl_rai, buf);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

337

control->i2c_address +

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

338

control->ras_info_offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

358

static u8 __calc_hdr_byte_sum(const struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

365

sz = sizeof(control->tbl_hdr) - sizeof(control->tbl_hdr.checksum);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

366

pp = (u8 *) &control->tbl_hdr;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

374

static u8 __calc_ras_info_byte_sum(const struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

380

sz = sizeof(control->tbl_rai);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

381

pp = (u8 *) &control->tbl_rai;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

390

struct amdgpu_ras_eeprom_control *control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

393

struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

405

mutex_lock(&control->ras_tbl_mutex);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

408

res = __write_table_header(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

409

mutex_unlock(&control->ras_tbl_mutex);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

414

static void amdgpu_ras_set_eeprom_table_version(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

416

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

417

struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

440

int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

442

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

443

struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

444

struct amdgpu_ras_eeprom_table_ras_info *rai = &control->tbl_rai;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

449

mutex_lock(&control->ras_tbl_mutex);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

452

amdgpu_ras_set_eeprom_table_version(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

471

csum = __calc_hdr_byte_sum(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

473

csum += __calc_ras_info_byte_sum(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

476

res = __write_table_header(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

478

res = __write_table_ras_info(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

480

control->ras_num_recs = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

481

control->ras_num_bad_pages = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

482

control->ras_num_mca_recs = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

483

control->ras_num_pa_recs = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

484

control->ras_fri = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

486

amdgpu_dpm_send_hbm_bad_pages_num(adev, control->ras_num_bad_pages);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

488

control->bad_channel_bitmap = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

489

amdgpu_dpm_send_hbm_bad_channel_flag(adev, control->bad_channel_bitmap);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

492

amdgpu_ras_debugfs_set_ret_size(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

494

mutex_unlock(&control->ras_tbl_mutex);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

500

__encode_table_record_to_buf(struct amdgpu_ras_eeprom_control *control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

528

__decode_table_record_from_buf(struct amdgpu_ras_eeprom_control *control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

599

static int __amdgpu_ras_eeprom_write(struct amdgpu_ras_eeprom_control *control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

602

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

610

control->i2c_address +

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

611

RAS_INDEX_TO_OFFSET(control, fri),

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

631

amdgpu_ras_eeprom_append_table(struct amdgpu_ras_eeprom_control *control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

635

struct amdgpu_ras *con = amdgpu_ras_get_context(to_amdgpu_device(control));

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

636

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

649

__encode_table_record_to_buf(control, &record[i], pp);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

652

if ((record[i].mem_channel < BITS_PER_TYPE(control->bad_channel_bitmap)) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

653

!(control->bad_channel_bitmap & (1 << record[i].mem_channel))) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

654

control->bad_channel_bitmap |= 1 << record[i].mem_channel;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

686

a = control->ras_fri + control->ras_num_recs;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

688

if (b < control->ras_max_record_count) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

689

res = __amdgpu_ras_eeprom_write(control, buf, a, num);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

690

} else if (a < control->ras_max_record_count) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

693

g0 = control->ras_max_record_count - a;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

694

g1 = b % control->ras_max_record_count + 1;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

695

res = __amdgpu_ras_eeprom_write(control, buf, a, g0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

698

res = __amdgpu_ras_eeprom_write(control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

703

if (g1 > control->ras_fri)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

704

control->ras_fri = g1 % control->ras_max_record_count;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

706

a %= control->ras_max_record_count;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

707

b %= control->ras_max_record_count;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

711

res = __amdgpu_ras_eeprom_write(control, buf, a, num);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

714

if (b >= control->ras_fri)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

715

control->ras_fri = (b + 1) % control->ras_max_record_count;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

723

g0 = control->ras_max_record_count - a;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

725

res = __amdgpu_ras_eeprom_write(control, buf, a, g0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

728

res = __amdgpu_ras_eeprom_write(control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

733

control->ras_fri = g1 % control->ras_max_record_count;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

736

control->ras_num_recs = 1 + (control->ras_max_record_count + b

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

737

- control->ras_fri)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

738

% control->ras_max_record_count;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

742

control->ras_num_pa_recs += num;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

744

control->ras_num_mca_recs += num;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

746

control->ras_num_bad_pages = con->bad_page_num;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

753

amdgpu_ras_eeprom_update_header(struct amdgpu_ras_eeprom_control *control)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

755

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

764

control->ras_num_bad_pages > ras->bad_page_cnt_threshold) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

767

control->ras_num_bad_pages, ras->bad_page_cnt_threshold);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

774

control->tbl_hdr.header = RAS_TABLE_HDR_BAD;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

775

if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

776

control->tbl_rai.rma_status = GPU_RETIRED__ECC_REACH_THRESHOLD;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

777

control->tbl_rai.health_percent = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

786

if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

787

control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

789

control->ras_num_recs * RAS_TABLE_RECORD_SIZE;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

791

control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE +

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

792

control->ras_num_recs * RAS_TABLE_RECORD_SIZE;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

793

control->tbl_hdr.checksum = 0;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

795

buf_size = control->ras_num_recs * RAS_TABLE_RECORD_SIZE;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

796

buf = kcalloc(control->ras_num_recs, RAS_TABLE_RECORD_SIZE, GFP_KERNEL);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

800

control->tbl_hdr.tbl_size);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

807

control->i2c_address +

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

808

control->ras_record_offset,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

826

control->tbl_hdr.version >= RAS_TABLE_VER_V2_1 &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

827

control->ras_num_bad_pages <= ras->bad_page_cnt_threshold)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

828

control->tbl_rai.health_percent = ((ras->bad_page_cnt_threshold -

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

829

control->ras_num_bad_pages) * 100) /

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

838

csum += __calc_hdr_byte_sum(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

839

if (control->tbl_hdr.version >= RAS_TABLE_VER_V2_1)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

840

csum += __calc_ras_info_byte_sum(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

843

control->tbl_hdr.checksum = csum;

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

844

res = __write_table_header(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

845

if (!res && control->tbl_hdr.version > RAS_TABLE_VER_V1)

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

846

res = __write_table_ras_info(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

865

int amdgpu_ras_eeprom_append(struct amdgpu_ras_eeprom_control *control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

869

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

879

} else if (num > control->ras_max_record_count) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

882

num, control->ras_max_record_count);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

893

mutex_lock(&control->ras_tbl_mutex);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

895

res = amdgpu_ras_eeprom_append_table(control, record, num);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

897

res = amdgpu_ras_eeprom_update_header(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

899

amdgpu_ras_debugfs_set_ret_size(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

901

mutex_unlock(&control->ras_tbl_mutex);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

920

static int __amdgpu_ras_eeprom_read(struct amdgpu_ras_eeprom_control *control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

923

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

931

control->i2c_address +

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

932

RAS_INDEX_TO_OFFSET(control, fri),

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

962

int amdgpu_ras_eeprom_read(struct amdgpu_ras_eeprom_control *control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

966

struct amdgpu_device *adev = to_amdgpu_device(control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

978

} else if (num > control->ras_num_recs) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

980

num, control->ras_num_recs);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.h

146

int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.h

148

int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.h

152

int amdgpu_ras_eeprom_read(struct amdgpu_ras_eeprom_control *control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.h

155

int amdgpu_ras_eeprom_append(struct amdgpu_ras_eeprom_control *control,

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.h

158

uint32_t amdgpu_ras_eeprom_max_record_count(struct amdgpu_ras_eeprom_control *control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.h

160

void amdgpu_ras_debugfs_set_ret_size(struct amdgpu_ras_eeprom_control *control);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.h

162

int amdgpu_ras_eeprom_check(struct amdgpu_ras_eeprom_control *control);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8647

u32 header, control = 0;

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8654

control |= ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8657

control |= INDIRECT_BUFFER_PRE_ENB(1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8660

control |= INDIRECT_BUFFER_PRE_RESUME(1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8675

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8684

u32 control = INDIRECT_BUFFER_VALID | ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8710

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5865

u32 header, control = 0;

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5869

control |= ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5872

control |= INDIRECT_BUFFER_PRE_ENB(1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5875

control |= INDIRECT_BUFFER_PRE_RESUME(1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5890

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5899

u32 control = INDIRECT_BUFFER_VALID | ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5925

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4420

u32 header, control = 0;

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4424

control |= ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4434

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4443

u32 control = INDIRECT_BUFFER_VALID | ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4453

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1859

u32 header, control = 0;

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1872

control |= ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v6_0.c

1881

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2210

u32 header, control = 0;

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2223

control |= ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2232

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2241

u32 control = INDIRECT_BUFFER_VALID | ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v7_0.c

2266

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6049

u32 header, control = 0;

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6056

control |= ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6059

control |= INDIRECT_BUFFER_PRE_ENB(1);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6072

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6081

u32 control = INDIRECT_BUFFER_VALID | ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6106

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5413

u32 header, control = 0;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5420

control |= ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5423

control |= INDIRECT_BUFFER_PRE_ENB(1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5426

control |= INDIRECT_BUFFER_PRE_RESUME(1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5445

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5451

u32 control = ring->ring[offset];

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5453

control |= INDIRECT_BUFFER_PRE_RESUME(1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5454

ring->ring[offset] = control;

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5514

u32 control = INDIRECT_BUFFER_VALID | ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5540

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2855

u32 control = INDIRECT_BUFFER_VALID | ib->length_dw | (vmid << 24);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2881

amdgpu_ring_write(ring, control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

102

static void smu_v11_0_i2c_clear_status(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

104

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

113

static void smu_v11_0_i2c_configure(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

115

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

135

static void smu_v11_0_i2c_set_clock(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

137

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

159

static void smu_v11_0_i2c_set_address(struct i2c_adapter *control, u16 address)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

161

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

171

static uint32_t smu_v11_0_i2c_poll_tx_status(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

173

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

217

smu_v11_0_i2c_clear_status(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

223

static uint32_t smu_v11_0_i2c_poll_rx_status(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

225

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

238

smu_v11_0_i2c_clear_status(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

268

static uint32_t smu_v11_0_i2c_transmit(struct i2c_adapter *control,

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

272

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

288

smu_v11_0_i2c_set_address(control, address);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

290

smu_v11_0_i2c_enable(control, true);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

293

smu_v11_0_i2c_clear_status(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

337

ret = smu_v11_0_i2c_poll_tx_status(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

367

static uint32_t smu_v11_0_i2c_receive(struct i2c_adapter *control,

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

371

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

378

smu_v11_0_i2c_set_address(control, address);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

381

smu_v11_0_i2c_enable(control, true);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

386

smu_v11_0_i2c_clear_status(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

406

ret = smu_v11_0_i2c_poll_rx_status(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

441

static void smu_v11_0_i2c_abort(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

443

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

458

static bool smu_v11_0_i2c_activity_done(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

460

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

47

static void smu_v11_0_i2c_set_clock_gating(struct i2c_adapter *control, bool en)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

476

smu_v11_0_i2c_abort(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

49

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

497

static void smu_v11_0_i2c_init(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

502

smu_v11_0_i2c_set_clock_gating(control, false);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

504

if (!smu_v11_0_i2c_activity_done(control))

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

508

res = smu_v11_0_i2c_enable(control, false);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

510

smu_v11_0_i2c_abort(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

513

smu_v11_0_i2c_configure(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

516

smu_v11_0_i2c_set_clock(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

520

static void smu_v11_0_i2c_fini(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

522

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

527

res = smu_v11_0_i2c_enable(control, false);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

540

smu_v11_0_i2c_abort(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

556

static bool smu_v11_0_i2c_bus_lock(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

558

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

568

static bool smu_v11_0_i2c_bus_unlock(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

570

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

582

static uint32_t smu_v11_0_i2c_read_data(struct i2c_adapter *control,

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

587

ret = smu_v11_0_i2c_receive(control, msg->addr, msg->buf, msg->len, i2c_flag);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

595

static uint32_t smu_v11_0_i2c_write_data(struct i2c_adapter *control,

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

600

ret = smu_v11_0_i2c_transmit(control, msg->addr, msg->buf, msg->len, i2c_flag);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

728

struct i2c_adapter *control = &smu_i2c->adapter;

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

735

control->owner = THIS_MODULE;

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

736

control->class = I2C_CLASS_HWMON;

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

737

control->dev.parent = &adev->pdev->dev;

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

739

control->algo = &smu_v11_0_i2c_algo;

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

740

snprintf(control->name, sizeof(control->name), "AMDGPU SMU 0");

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

741

control->lock_ops = &smu_v11_0_i2c_i2c_lock_ops;

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

742

control->quirks = &smu_v11_0_i2c_control_quirks;

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

743

i2c_set_adapdata(control, smu_i2c);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

748

res = devm_i2c_add_adapter(adev->dev, control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

76

static int smu_v11_0_i2c_enable(struct i2c_adapter *control, bool enable)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

767

bool smu_v11_0_i2c_test_bus(struct i2c_adapter *control)

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

776

if (!smu_v11_0_i2c_bus_lock(control)) {

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

78

struct amdgpu_smu_i2c_bus *smu_i2c = i2c_get_adapdata(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

781

smu_v11_0_i2c_init(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

784

ret = smu_v11_0_i2c_write_data(control, I2C_TARGET_ADDR, data, 6);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

786

ret = smu_v11_0_i2c_read_data(control, I2C_TARGET_ADDR, data, 6);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

788

smu_v11_0_i2c_fini(control);

sys/dev/pci/drm/amd/amdgpu/smu_v11_0_i2c.c

790

smu_v11_0_i2c_bus_unlock(control);

sys/dev/pci/drm/amd/display/dc/bios/command_table.h

35

struct bp_encoder_control *control);

sys/dev/pci/drm/amd/display/dc/bios/command_table.h

38

struct bp_encoder_control *control);

sys/dev/pci/drm/amd/display/dc/bios/command_table.h

41

struct bp_encoder_control *control);

sys/dev/pci/drm/amd/display/dc/bios/command_table.h

44

struct bp_transmitter_control *control);

sys/dev/pci/drm/amd/display/dc/bios/command_table2.h

35

struct bp_encoder_control *control);

sys/dev/pci/drm/amd/display/dc/bios/command_table2.h

38

struct bp_encoder_control *control);

sys/dev/pci/drm/amd/display/dc/bios/command_table2.h

41

struct bp_encoder_control *control);

sys/dev/pci/drm/amd/display/dc/bios/command_table2.h

44

struct bp_transmitter_control *control);

sys/dev/pci/drm/amd/display/dc/bios/command_table_helper.c

175

struct bp_encoder_control *control,

sys/dev/pci/drm/amd/display/dc/bios/command_table_helper.c

184

if ((control->transmitter == TRANSMITTER_UNIPHY_B) ||

sys/dev/pci/drm/amd/display/dc/bios/command_table_helper.c

185

(control->transmitter == TRANSMITTER_UNIPHY_D) ||

sys/dev/pci/drm/amd/display/dc/bios/command_table_helper.c

186

(control->transmitter == TRANSMITTER_UNIPHY_F)) {

sys/dev/pci/drm/amd/display/dc/bios/command_table_helper.c

201

(uint8_t)(h->transmitter_bp_to_atom(control->transmitter));

sys/dev/pci/drm/amd/display/dc/bios/command_table_helper.c

204

ctrl_param->ucAction = h->encoder_action_to_atom(control->action);

sys/dev/pci/drm/amd/display/dc/bios/command_table_helper.c

205

ctrl_param->usPixelClock = cpu_to_le16((uint16_t)(control->pixel_clock / 10));

sys/dev/pci/drm/amd/display/dc/bios/command_table_helper.c

208

control->signal, control->enable_dp_audio));

sys/dev/pci/drm/amd/display/dc/bios/command_table_helper.c

209

ctrl_param->ucLaneNum = (uint8_t)(control->lanes_number);

sys/dev/pci/drm/amd/display/dc/bios/command_table_helper.h

50

struct bp_encoder_control *control,

sys/dev/pci/drm/amd/display/dc/bios/command_table_helper_struct.h

44

struct bp_encoder_control *control,

sys/dev/pci/drm/amd/display/dmub/inc/dmub_cmd.h

2912

struct aux_reply_control_data control;

sys/dev/pci/drm/amd/display/dmub/src/dmub_srv_stat.c

74

notify->instance = cmd.dp_aux_reply.control.instance;

sys/dev/pci/drm/amd/display/dmub/src/dmub_srv_stat.c

75

notify->result = cmd.dp_aux_reply.control.result;

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1735

struct i2c_adapter *control = &smu_i2c->adapter;

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1741

control->owner = THIS_MODULE;

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1742

control->class = I2C_CLASS_HWMON;

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1743

control->dev.parent = &adev->pdev->dev;

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1745

control->algo = &arcturus_i2c_algo;

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1746

control->quirks = &arcturus_i2c_control_quirks;

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1747

snprintf(control->name, sizeof(control->name), "AMDGPU SMU %d", i);

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1748

i2c_set_adapdata(control, smu_i2c);

sys/dev/pci/drm/amd/pm/swsmu/smu11/arcturus_ppt.c

1750

res = devm_i2c_add_adapter(adev->dev, control);

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

3132

struct i2c_adapter *control = &smu_i2c->adapter;

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

3138

control->owner = THIS_MODULE;

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

3139

control->class = I2C_CLASS_HWMON;

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

3140

control->dev.parent = &adev->pdev->dev;

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

3142

control->algo = &navi10_i2c_algo;

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

3143

snprintf(control->name, sizeof(control->name), "AMDGPU SMU %d", i);

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

3144

control->quirks = &navi10_i2c_control_quirks;

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

3145

i2c_set_adapdata(control, smu_i2c);

sys/dev/pci/drm/amd/pm/swsmu/smu11/navi10_ppt.c

3147

res = devm_i2c_add_adapter(adev->dev, control);

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2638

struct i2c_adapter *control = &smu_i2c->adapter;

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2644

control->owner = THIS_MODULE;

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2645

control->class = I2C_CLASS_HWMON;

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2646

control->dev.parent = &adev->pdev->dev;

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2648

control->algo = &sienna_cichlid_i2c_algo;

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2649

snprintf(control->name, sizeof(control->name), "AMDGPU SMU %d", i);

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2650

control->quirks = &sienna_cichlid_i2c_control_quirks;

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2651

i2c_set_adapdata(control, smu_i2c);

sys/dev/pci/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

2653

res = devm_i2c_add_adapter(adev->dev, control);

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

1631

struct i2c_adapter *control = &smu_i2c->adapter;

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

1638

control->owner = THIS_MODULE;

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

1639

control->dev.parent = &adev->pdev->dev;

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

1641

control->algo = &aldebaran_i2c_algo;

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

1642

snprintf(control->name, sizeof(control->name), "AMDGPU SMU 0");

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

1643

control->quirks = &aldebaran_i2c_control_quirks;

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

1644

i2c_set_adapdata(control, smu_i2c);

sys/dev/pci/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c

1646

res = devm_i2c_add_adapter(adev->dev, control);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

2823

struct i2c_adapter *control = &smu_i2c->adapter;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

2829

control->owner = THIS_MODULE;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

2830

control->dev.parent = &adev->pdev->dev;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

2832

control->algo = &smu_v13_0_0_i2c_algo;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

2833

snprintf(control->name, sizeof(control->name), "AMDGPU SMU %d", i);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

2834

control->quirks = &smu_v13_0_0_i2c_control_quirks;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

2835

i2c_set_adapdata(control, smu_i2c);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c

2837

res = devm_i2c_add_adapter(adev->dev, control);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2500

struct i2c_adapter *control = &smu_i2c->adapter;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2506

control->owner = THIS_MODULE;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2507

control->dev.parent = &adev->pdev->dev;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2509

control->algo = &smu_v13_0_6_i2c_algo;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2510

snprintf(control->name, sizeof(control->name), "AMDGPU SMU %d", i);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2511

control->quirks = &smu_v13_0_6_i2c_control_quirks;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2512

i2c_set_adapdata(control, smu_i2c);

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

2514

res = devm_i2c_add_adapter(adev->dev, control);

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

2079

struct i2c_adapter *control = &smu_i2c->adapter;

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

2085

control->owner = THIS_MODULE;

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

2086

control->dev.parent = &adev->pdev->dev;

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

2088

control->algo = &smu_v14_0_2_i2c_algo;

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

2089

snprintf(control->name, sizeof(control->name), "AMDGPU SMU %d", i);

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

2090

control->quirks = &smu_v14_0_2_i2c_control_quirks;

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

2091

i2c_set_adapdata(control, smu_i2c);

sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c

2093

res = devm_i2c_add_adapter(adev->dev, control);

sys/dev/pci/drm/i915/display/intel_crtc_state_dump.c

332

pipe_config->gmch_pfit.control,

sys/dev/pci/drm/i915/display/intel_cx0_phy_regs.h

280

#define PHY_CX0_VDROVRD_CTL(lane, tx, control) \

sys/dev/pci/drm/i915/display/intel_cx0_phy_regs.h

282

((lane) ^ (tx)) * 0x10 + (control))

sys/dev/pci/drm/i915/display/intel_cx0_phy_regs.h

285

#define PHY_CX0_TX_CONTROL(tx, control) (0x400 + ((tx) - 1) * 0x200 + (control))

sys/dev/pci/drm/i915/display/intel_cx0_phy_regs.h

288

#define PHY_CMN1_CONTROL(tx, control) (0x800 + ((tx) - 1) * 0x200 + (control))

sys/dev/pci/drm/i915/display/intel_display.c

5306

PIPE_CONF_CHECK_X(gmch_pfit.control);

sys/dev/pci/drm/i915/display/intel_display_types.h

1158

u32 control;

sys/dev/pci/drm/i915/display/intel_lvds.c

151

crtc_state->gmch_pfit.control |= tmp & PFIT_PANEL_8TO6_DITHER_ENABLE;

sys/dev/pci/drm/i915/display/intel_overlay.c

1182

crtc->config->gmch_pfit.control & PFIT_ENABLE) {

sys/dev/pci/drm/i915/display/intel_pfit.c

540

crtc_state->gmch_pfit.control = pfit_control;

sys/dev/pci/drm/i915/display/intel_pfit.c

659

if (!crtc_state->gmch_pfit.control)

sys/dev/pci/drm/i915/display/intel_pfit.c

673

crtc_state->gmch_pfit.control);

sys/dev/pci/drm/i915/display/intel_pfit.c

686

if (!old_crtc_state->gmch_pfit.control)

sys/dev/pci/drm/i915/display/intel_pfit.c

728

crtc_state->gmch_pfit.control = tmp;

sys/dev/pci/drm/i915/display/intel_pps.c

727

u32 control;

sys/dev/pci/drm/i915/display/intel_pps.c

731

control = intel_de_read(display, _pp_ctrl_reg(intel_dp));

sys/dev/pci/drm/i915/display/intel_pps.c

733

(control & PANEL_UNLOCK_MASK) != PANEL_UNLOCK_REGS)) {

sys/dev/pci/drm/i915/display/intel_pps.c

734

control &= ~PANEL_UNLOCK_MASK;

sys/dev/pci/drm/i915/display/intel_pps.c

735

control |= PANEL_UNLOCK_REGS;

sys/dev/pci/drm/i915/display/intel_pps.c

737

return control;

sys/dev/pci/drm/i915/gt/uc/intel_guc_ct.c

188

static int guc_action_control_ctb(struct intel_guc *guc, u32 control)

sys/dev/pci/drm/i915/gt/uc/intel_guc_ct.c

194

FIELD_PREP(HOST2GUC_CONTROL_CTB_REQUEST_MSG_1_CONTROL, control),

sys/dev/pci/drm/i915/gt/uc/intel_guc_ct.c

198

GEM_BUG_ON(control != GUC_CTB_CONTROL_DISABLE && control != GUC_CTB_CONTROL_ENABLE);

sys/dev/pci/drm/i915/gvt/interrupt.c

428

u16 control, data;

sys/dev/pci/drm/i915/gvt/interrupt.c

431

control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset));

sys/dev/pci/drm/i915/gvt/interrupt.c

436

if (!(control & MSI_CAP_EN))

sys/dev/pci/drm/i915/gvt/interrupt.c

439

if (WARN(control & GENMASK(15, 1), "only support one MSI format\n"))

sys/dev/pci/drm/radeon/cik.c

3654

u32 size_in_bytes, cur_size_in_bytes, control;

sys/dev/pci/drm/radeon/cik.c

3677

control = 0;

sys/dev/pci/drm/radeon/cik.c

3679

control |= PACKET3_DMA_DATA_CP_SYNC;

sys/dev/pci/drm/radeon/cik.c

3681

radeon_ring_write(ring, control);

sys/dev/pci/drm/radeon/cik.c

3723

u32 header, control = INDIRECT_BUFFER_VALID;

sys/dev/pci/drm/radeon/cik.c

3751

control |= ib->length_dw | (vm_id << 24);

sys/dev/pci/drm/radeon/cik.c

3756

radeon_ring_write(ring, control);

sys/dev/pci/if_iwireg.h

186

uint8_t control;

sys/dev/pci/if_iwmreg.h

4713

uint16_t control;

sys/dev/pci/if_iwn.c

5674

node.control = IWN_NODE_UPDATE;

sys/dev/pci/if_iwn.c

5703

node.control = IWN_NODE_UPDATE;

sys/dev/pci/if_iwn.c

5868

node.control = IWN_NODE_UPDATE;

sys/dev/pci/if_iwn.c

5893

node.control = IWN_NODE_UPDATE;

sys/dev/pci/if_iwn.c

5925

node.control = IWN_NODE_UPDATE;

sys/dev/pci/if_iwn.c

5972

node.control = IWN_NODE_UPDATE;

sys/dev/pci/if_iwnreg.h

601

uint8_t control;

sys/dev/pci/if_iwnreg.h

657

uint8_t control;

sys/dev/pci/if_iwx.c

1034

prph_sc_ctrl->control.control_flags = htole32(control_flags);

sys/dev/pci/if_iwx.c

936

ctxt_info->control.control_flags = htole32(control_flags);

sys/dev/pci/if_iwxreg.h

218

struct iwx_context_info_control control;

sys/dev/pci/if_iwxreg.h

380

struct iwx_prph_scratch_control control;

sys/dev/pci/if_mwx.c

4608

u16 control = le16_to_cpu(bar->control);

sys/dev/pci/if_mwx.c

4610

tid = FIELD_GET(IEEE80211_BAR_CTRL_TID_INFO_MASK, control);

sys/dev/pci/if_stge.c

797

uint64_t control;

sys/dev/pci/if_stge.c

813

control = letoh64(sc->sc_txdescs[i].tfd_control);

sys/dev/pci/if_stge.c

814

if ((control & TFD_TFDDone) == 0)

sys/dev/pci/if_wpi.c

2753

node.control = WPI_NODE_UPDATE;

sys/dev/pci/if_wpi.c

2779

node.control = WPI_NODE_UPDATE;

sys/dev/pci/if_wpireg.h

348

uint8_t control;

sys/dev/pci/ixgbe_phy.c

1222

uint16_t phy_offset, control, eword, edata, block_crc;

sys/dev/pci/ixgbe_phy.c

1272

control = (eword & IXGBE_CONTROL_MASK_NL) >>

sys/dev/pci/ixgbe_phy.c

1275

switch (control) {

sys/dev/pcmcia/if_malo.c

1582

cmalo_cmd_set_radio(struct malo_softc *sc, uint16_t control)

sys/dev/pcmcia/if_malo.c

1599

if (control) {

sys/dev/pcmcia/if_malo.c

1600

body->control = htole16(MALO_CMD_RADIO_ON);

sys/dev/pcmcia/if_malo.c

1601

body->control |= htole16(MALO_CMD_RADIO_AUTO_P);

sys/dev/pcmcia/if_malovar.h

137

uint16_t control;

sys/dev/pcmcia/if_malovar.h

308

uint8_t control;

sys/dev/pcmcia/if_malovar.h

321

uint32_t control;

sys/dev/pv/hyperv.c

383

hv_hypercall(struct hv_softc *sc, uint64_t control, void *input,

sys/dev/pv/hyperv.c

405

status = hv_hypercall_trampoline(control, input_pa, output_pa);

sys/dev/pv/hyperv.c

408

uint32_t control_hi = control >> 32;

sys/dev/pv/hyperv.c

409

uint32_t control_lo = control & 0xfffffffff;

sys/dev/sbus/cgtwelvereg.h

120

u_int32_t control;

sys/dev/sbus/cgtwelvereg.h

208

u_int32_t control;

sys/dev/usb/if_athn_usb.c

1924

if (__predict_false(len < htc->control[0]))

sys/dev/usb/if_athn_usb.c

1926

len -= htc->control[0];

sys/dev/usb/if_athn_usb.c

2047

if (m->m_len < htc->control[0])

sys/dev/usb/if_athn_usb.c

2049

m_adj(m, -(int)htc->control[0]);

sys/dev/usb/if_athn_usb.h

218

uint8_t control[4];

sys/kern/uipc_socket.c

600

struct mbuf *control, int flags)

sys/kern/uipc_socket.c

614

m_freem(control);

sys/kern/uipc_socket.c

619

if (control) {

sys/kern/uipc_socket.c

626

clen = control->m_len;

sys/kern/uipc_socket.c

630

mtod(control, struct cmsghdr *)->cmsg_type == SCM_RIGHTS)

sys/kern/uipc_socket.c

708

error = pru_sendoob(so, top, addr, control);

sys/kern/uipc_socket.c

710

error = pru_send(so, top, addr, control);

sys/kern/uipc_socket.c

714

control = NULL;

sys/kern/uipc_socket.c

727

m_freem(control);

sys/kern/uipc_socket2.c

905

struct mbuf *control)

sys/kern/uipc_socket2.c

916

for (n = control; n; n = n->m_next) {

sys/kern/uipc_socket2.c

933

control = m0;

sys/kern/uipc_socket2.c

934

m->m_next = control;

sys/kern/uipc_socket2.c

953

sbappendcontrol(struct sockbuf *sb, struct mbuf *m0, struct mbuf *control)

sys/kern/uipc_socket2.c

960

if (control == NULL)

sys/kern/uipc_socket2.c

962

for (m = control; ; m = m->m_next) {

sys/kern/uipc_socket2.c

984

for (m = control; m->m_next != NULL; m = m->m_next)

sys/kern/uipc_socket2.c

988

SBLINKRECORD(sb, control);

sys/kern/uipc_syscalls.c

1040

struct mbuf *from = NULL, *control = NULL;

sys/kern/uipc_syscalls.c

1079

mp->msg_control ? &control : NULL,

sys/kern/uipc_syscalls.c

1121

if (len <= 0 || control == NULL)

sys/kern/uipc_syscalls.c

1124

struct mbuf *m = control;

sys/kern/uipc_syscalls.c

1164

m_freem(control);

sys/kern/uipc_syscalls.c

706

struct mbuf *to, *control;

sys/kern/uipc_syscalls.c

764

error = sockargs(&control, mp->msg_control,

sys/kern/uipc_syscalls.c

770

ktrcmsghdr(p, mtod(control, char *),

sys/kern/uipc_syscalls.c

774

control = NULL;

sys/kern/uipc_syscalls.c

785

error = sosend(so, to, &auio, NULL, control, flags);

sys/kern/uipc_usrreq.c

1210

unp_internalize(struct mbuf *control, struct proc *p)

sys/kern/uipc_usrreq.c

1213

struct cmsghdr *cm = mtod(control, struct cmsghdr *);

sys/kern/uipc_usrreq.c

1224

if (control->m_len < CMSG_LEN(0) || cm->cmsg_len < CMSG_LEN(0))

sys/kern/uipc_usrreq.c

1227

!(cm->cmsg_len == control->m_len ||

sys/kern/uipc_usrreq.c

1228

control->m_len == CMSG_ALIGN(cm->cmsg_len)))

sys/kern/uipc_usrreq.c

1243

control->m_len;

sys/kern/uipc_usrreq.c

1244

if (neededspace > m_trailingspace(control)) {

sys/kern/uipc_usrreq.c

1247

if (control->m_flags & M_EXT) {

sys/kern/uipc_usrreq.c

1253

tmp = malloc(control->m_len, M_TEMP, M_WAITOK);

sys/kern/uipc_usrreq.c

1254

memcpy(tmp, mtod(control, caddr_t), control->m_len);

sys/kern/uipc_usrreq.c

1257

MCLGET(control, M_WAIT);

sys/kern/uipc_usrreq.c

1258

if ((control->m_flags & M_EXT) == 0) {

sys/kern/uipc_usrreq.c

1259

free(tmp, M_TEMP, control->m_len);

sys/kern/uipc_usrreq.c

1265

cm = mtod(control, struct cmsghdr *);

sys/kern/uipc_usrreq.c

1266

memcpy(cm, tmp, control->m_len);

sys/kern/uipc_usrreq.c

1267

free(tmp, M_TEMP, control->m_len);

sys/kern/uipc_usrreq.c

1273

control->m_len = CMSG_SPACE(nfds * sizeof(struct fdpass));

sys/kern/uipc_usrreq.c

510

struct mbuf *control)

sys/kern/uipc_usrreq.c

516

if (control) {

sys/kern/uipc_usrreq.c

518

error = unp_internalize(control, curproc);

sys/kern/uipc_usrreq.c

550

if (control) {

sys/kern/uipc_usrreq.c

551

if (sbappendcontrol(&so2->so_rcv, m, control)) {

sys/kern/uipc_usrreq.c

552

control = NULL;

sys/kern/uipc_usrreq.c

577

if (control && error)

sys/kern/uipc_usrreq.c

578

unp_dispose(control);

sys/kern/uipc_usrreq.c

581

m_freem(control);

sys/kern/uipc_usrreq.c

589

struct mbuf *control)

sys/kern/uipc_usrreq.c

596

if (control) {

sys/kern/uipc_usrreq.c

598

error = unp_internalize(control, curproc);

sys/kern/uipc_usrreq.c

630

if (sbappendaddr(&so2->so_rcv, from, m, control)) {

sys/kern/uipc_usrreq.c

633

control = NULL;

sys/kern/uipc_usrreq.c

645

if (control && error)

sys/kern/uipc_usrreq.c

646

unp_dispose(control);

sys/kern/uipc_usrreq.c

649

m_freem(control);

sys/net/if_ethersubr.c

1706

struct mbuf *control)

sys/net/if_ethersubr.c

1725

m_freem(control);

sys/net/if_llc.h

51

u_int8_t control;

sys/net/if_llc.h

61

u_int8_t control;

sys/net/if_llc.h

65

u_int8_t control;

sys/net/if_llc.h

75

u_int8_t control;

sys/net/if_llc.h

80

u_int8_t control;

sys/net/if_llc.h

85

#define llc_control llc_un.type_u.control

sys/net/if_ppp.c

653

int protocol, address, control;

sys/net/if_ppp.c

680

control = PPP_UI;

sys/net/if_ppp.c

687

control = PPP_UI;

sys/net/if_ppp.c

694

control = PPP_CONTROL(dst->sa_data);

sys/net/if_ppp.c

728

*cp++ = control;

sys/net/if_ppp.c

874

int address, control, protocol;

sys/net/if_ppp.c

892

control = PPP_CONTROL(cp);

sys/net/if_ppp.c

928

cp[1] = control;

sys/net/if_ppp.c

980

control == PPP_UI && protocol != PPP_ALLSTATIONS &&

sys/net/if_spppsubr.c

175

u_char control;

sys/net/if_spppsubr.c

481

ht.control = PPP_UI;

sys/net/if_spppsubr.c

499

if (ht.control != PPP_UI)

sys/net/if_spppsubr.c

511

ht.address, ht.control, ntohs(ht.protocol));

sys/net/if_spppsubr.c

567

ht.address, ht.control, ntohs(ht.protocol));

sys/net/if_wg.c

833

struct mbuf peernam, *control = NULL;

sys/net/if_wg.c

839

control = sbcreatecontrol(&e->e_local.l_in,

sys/net/if_wg.c

845

control = sbcreatecontrol(&e->e_local.l_pktinfo6,

sys/net/if_wg.c

864

ret = sosend(sc->sc_so4, &peernam, NULL, m, control, 0);

sys/net/if_wg.c

867

ret = sosend(sc->sc_so6, &peernam, NULL, m, control, 0);

sys/net/if_wg.c

871

m_freem(control);

sys/net/pfkeyv2.c

331

struct mbuf *control)

sys/net/pfkeyv2.c

337

if (control && control->m_len) {

sys/net/pfkeyv2.c

351

m_freem(control);

sys/net/rtsock.c

306

struct mbuf *control)

sys/net/rtsock.c

312

if (control && control->m_len) {

sys/net/rtsock.c

326

m_freem(control);

sys/netinet/ip_divert.c

305

struct mbuf *control)

sys/netinet/ip_divert.c

310

return (divert_output(inp, m, addr, control));

sys/netinet/ip_divert.c

80

struct mbuf *control)

sys/netinet/ip_divert.c

86

m_freem(control);

sys/netinet/ip_gre.c

102

m_freem(control);

sys/netinet/ip_gre.c

107

return rip_send(so, m, nam, control);

sys/netinet/ip_gre.c

73

struct mbuf *control)

sys/netinet/raw_ip.c

261

struct mbuf *control)

sys/netinet/raw_ip.c

594

struct mbuf *control)

sys/netinet/raw_ip.c

633

m_freem(control);

sys/netinet/tcp_usrreq.c

1000

m_freem(control);

sys/netinet/tcp_usrreq.c

834

struct mbuf *control)

sys/netinet/tcp_usrreq.c

843

if (control && control->m_len) {

sys/netinet/tcp_usrreq.c

865

m_freem(control);

sys/netinet/tcp_usrreq.c

953

struct mbuf *control)

sys/netinet/tcp_usrreq.c

962

if (control && control->m_len) {

sys/netinet/udp_usrreq.c

1108

m_freem(control);

sys/netinet/udp_usrreq.c

1231

struct mbuf *control)

sys/netinet/udp_usrreq.c

1266

m_freem(control);

sys/netinet/udp_usrreq.c

1273

return (udp_output(inp, m, addr, control));

sys/netinet/udp_usrreq.c

942

struct mbuf *control)

sys/netinet/udp_usrreq.c

954

return (udp6_output(inp, m, addr, control));

sys/netinet/udp_usrreq.c

968

if (control) {

sys/netinet/udp_usrreq.c

977

if (control->m_next) {

sys/netinet/udp_usrreq.c

982

clen = control->m_len;

sys/netinet/udp_usrreq.c

983

cmsgs = mtod(control, caddr_t);

sys/netinet6/ip6_divert.c

271

struct mbuf *control)

sys/netinet6/ip6_divert.c

276

return (divert6_output(inp, m, addr, control));

sys/netinet6/ip6_divert.c

74

struct mbuf *control)

sys/netinet6/ip6_divert.c

80

m_freem(control);

sys/netinet6/ip6_output.c

2216

ip6_setpktopts(struct mbuf *control, struct ip6_pktopts *opt,

sys/netinet6/ip6_output.c

2224

if (control == NULL || opt == NULL)

sys/netinet6/ip6_output.c

2248

if (control->m_next)

sys/netinet6/ip6_output.c

2251

clen = control->m_len;

sys/netinet6/ip6_output.c

2252

cmsgs = mtod(control, caddr_t);

sys/netinet6/raw_ip6.c

384

struct mbuf *control)

sys/netinet6/raw_ip6.c

401

if (control) {

sys/netinet6/raw_ip6.c

402

if ((error = ip6_setpktopts(control, &opt,

sys/netinet6/raw_ip6.c

531

if (control) {

sys/netinet6/raw_ip6.c

533

m_freem(control);

sys/netinet6/raw_ip6.c

727

struct mbuf *control)

sys/netinet6/raw_ip6.c

762

error = rip6_output(m, so, sin6tosa(&dst), control);

sys/netinet6/raw_ip6.c

763

control = NULL;

sys/netinet6/raw_ip6.c

767

m_freem(control);

sys/netinet6/udp6_output.c

108

if (control) {

sys/netinet6/udp6_output.c

109

if ((error = ip6_setpktopts(control, &opt,

sys/netinet6/udp6_output.c

244

if (control) {

sys/netinet6/udp6_output.c

246

m_freem(control);

sys/netinet6/udp6_output.c

93

struct mbuf *control)

sys/nfs/nfs_socket.c

532

struct mbuf *control;

sys/nfs/nfs_socket.c

677

error = soreceive(so, NULL, &auio, mp, &control,

sys/nfs/nfs_socket.c

679

m_freem(control);

sys/nfs/nfs_socket.c

685

(!error && *mp == NULL && control));

sys/scsi/cd.c

1149

if (toc->entries[tocidx].control & 4) {

sys/scsi/cd.c

1540

int control)

sys/scsi/cd.c

1564

cmd->control = control;

sys/scsi/cd.h

107

u_int8_t control;

sys/scsi/cd.h

116

u_int8_t control;

sys/scsi/cd.h

125

u_int8_t control;

sys/scsi/cd.h

137

u_int8_t control;

sys/scsi/cd.h

146

u_int8_t control;

sys/scsi/cd.h

158

u_int8_t control;

sys/scsi/cd.h

172

u_int8_t control;

sys/scsi/cd.h

183

u_int8_t control;

sys/scsi/cd.h

264

u_int8_t control;

sys/scsi/cd.h

40

u_int8_t control;

sys/scsi/cd.h

54

u_int8_t control;

sys/scsi/cd.h

62

u_int8_t control;

sys/scsi/cd.h

77

u_int8_t control;

sys/scsi/cd.h

89

u_int8_t control;

sys/scsi/cd.h

98

u_int8_t control;

sys/scsi/scsi_all.h

106

u_int8_t control;

sys/scsi/scsi_all.h

116

u_int8_t control;

sys/scsi/scsi_all.h

126

u_int8_t control;

sys/scsi/scsi_all.h

134

u_int8_t control;

sys/scsi/scsi_all.h

142

u_int8_t control;

sys/scsi/scsi_all.h

150

u_int8_t control;

sys/scsi/scsi_all.h

158

u_int8_t control;

sys/scsi/scsi_all.h

173

u_int8_t control;

sys/scsi/scsi_all.h

57

u_int8_t control;

sys/scsi/scsi_all.h

593

u_int8_t control;

sys/scsi/scsi_all.h

607

u_int8_t control;

sys/scsi/scsi_all.h

69

u_int8_t control;

sys/scsi/scsi_all.h

77

u_int8_t control;

sys/scsi/scsi_all.h

90

u_int8_t control;

sys/scsi/scsi_changer.h

114

u_int8_t control;

sys/scsi/scsi_changer.h

130

u_int8_t control;

sys/scsi/scsi_changer.h

147

u_int8_t control;

sys/scsi/scsi_changer.h

161

u_int8_t control;

sys/scsi/scsi_changer.h

85

u_int8_t control;

sys/scsi/scsi_changer.h

97

u_int8_t control;

sys/scsi/scsi_disk.h

145

u_int8_t control;

sys/scsi/scsi_disk.h

156

u_int8_t control;

sys/scsi/scsi_disk.h

164

u_int8_t control;

sys/scsi/scsi_disk.h

174

u_int8_t control;

sys/scsi/scsi_disk.h

183

u_int8_t control;

sys/scsi/scsi_disk.h

192

u_int8_t control;

sys/scsi/scsi_disk.h

203

u_int8_t control;

sys/scsi/scsi_disk.h

215

u_int8_t control;

sys/scsi/scsi_disk.h

224

u_int8_t control;

sys/scsi/scsi_disk.h

246

u_int8_t control;

sys/scsi/scsi_disk.h

256

u_int8_t control;

sys/scsi/scsi_disk.h

267

u_int8_t control;

sys/scsi/scsi_disk.h

282

u_int8_t control;

sys/scsi/scsi_disk.h

72

u_int8_t control;

sys/scsi/scsi_tape.h

111

u_int8_t control;

sys/scsi/scsi_tape.h

121

u_int8_t control;

sys/scsi/scsi_tape.h

129

u_int8_t control;

sys/scsi/scsi_tape.h

68

u_int8_t control;

sys/scsi/scsi_tape.h

81

u_int8_t control;

sys/scsi/scsi_tape.h

89

u_int8_t control;

sys/scsi/scsi_tape.h

98

u_int8_t control;

sys/scsi/ses.h

43

u_int8_t control;

sys/sys/cdio.h

26

u_int control:4;

sys/sys/cdio.h

31

u_int control:4;

sys/sys/cdio.h

53

u_int control:4;

sys/sys/cdio.h

58

u_int control:4;

sys/sys/cdio.h

87

u_int control:4;

sys/sys/cdio.h

92

u_int control:4;

sys/sys/protosw.h

338

struct mbuf *control)

sys/sys/protosw.h

340

return (*so->so_proto->pr_usrreqs->pru_send)(so, top, addr, control);

sys/sys/protosw.h

376

struct mbuf *control)

sys/sys/protosw.h

380

top, addr, control);

sys/sys/protosw.h

382

m_freem(control);

usr.bin/cdio/cddb.c

240

names[i] = strdup(e->control & 4 ? "data" : "audio");

usr.bin/cdio/cdio.c

1378

(e->control & 4) ? "data" : "audio");

usr.bin/cdio/rip.c

542

info.isaudio = (toc_buffer[i].control & 4) == 0;

usr.bin/ldap/aldap.c

454

aldap_parse_page_control(struct ber_element *control, size_t len)

usr.bin/ldap/aldap.c

463

ober_scanf_elements(control, "ss", &oid, &encoded);

usr.bin/ldap/aldap.c

464

ober_set_readbuf(&b, encoded, control->be_next->be_len);

usr.bin/mandoc/roff.c

124

char control; /* control character */

usr.bin/mandoc/roff.c

1805

buf->buf[pos] != r->control &&

usr.bin/mandoc/roff.c

3594

if (*p == '\0' || (r->control = *p++) == '.')

usr.bin/mandoc/roff.c

3595

r->control = '\0';

usr.bin/mandoc/roff.c

4410

if (r->control != '\0' && cp[pos] == r->control)

usr.bin/mandoc/roff.c

4412

else if (r->control != '\0')

usr.bin/mandoc/roff.c

771

r->control = '\0';

usr.bin/telnet/commands.c

1084

printf("%-15s [%s]\r\n", sl->name, control(*sl->charp)); \

usr.bin/telnet/commands.c

1151

printf("Escape character is '%s'.\r\n", control(escape));

usr.bin/telnet/commands.c

1625

printf("Escape character is '%s'.\r\n", control(escape));

usr.bin/telnet/commands.c

763

control(rlogin));

usr.bin/telnet/commands.c

766

printf("Telnet escape character is '%s'.\r\n", control(escape));

usr.bin/telnet/commands.c

840

printf("%s character is '%s'.\r\n", ct->name, control(*(ct->charp)));

usr.bin/telnet/commands.c

901

printf("%s character is '%s'.\r\n", ct->name, control(*(ct->charp)));

usr.sbin/iscsictl/iscsictl.c

104

TAILQ_INIT(&control.channel);

usr.sbin/iscsictl/iscsictl.c

105

if ((control.fd = socket(AF_UNIX, SOCK_SEQPACKET, 0)) == -1)

usr.sbin/iscsictl/iscsictl.c

112

if (connect(control.fd, (struct sockaddr *)&sun, sizeof(sun)) == -1)

usr.sbin/iscsictl/iscsictl.c

193

close(control.fd);

usr.sbin/iscsictl/iscsictl.c

200

TAILQ_INSERT_TAIL(&control.channel, pdu, entry);

usr.sbin/iscsictl/iscsictl.c

208

while ((pdu = TAILQ_FIRST(&control.channel)) != NULL) {

usr.sbin/iscsictl/iscsictl.c

209

TAILQ_REMOVE(&control.channel, pdu, entry);

usr.sbin/iscsictl/iscsictl.c

221

if (ctl_sendpdu(control.fd, pdu) == -1)

usr.sbin/iscsictl/iscsictl.c

224

if ((n = recv(control.fd, cbuf, sizeof(cbuf), 0)) == -1 &&

usr.sbin/iscsictl/iscsictl.c

415

while ((pdu = TAILQ_FIRST(&control.channel)) != NULL) {

usr.sbin/iscsictl/iscsictl.c

416

TAILQ_REMOVE(&control.channel, pdu, entry);

usr.sbin/iscsictl/iscsictl.c

53

} control;

usr.sbin/iscsid/control.c

144

struct control *c;

usr.sbin/iscsid/control.c

168

if ((c = malloc(sizeof(struct control))) == NULL) {

usr.sbin/iscsid/control.c

181

control_close(struct control *c)

usr.sbin/iscsid/control.c

203

struct control *c = bula;

usr.sbin/iscsid/control.c

310

struct control *c = ch;

usr.sbin/iscsid/control.c

51

void control_close(struct control *);

usr.sbin/lpd/lpd.c

117

control(debug, verbose);

usr.sbin/lpd/lpd.h

108

void control(int, int);

usr.sbin/mopd/common/rc.c

37

u_char tmpc, code, control;

usr.sbin/mopd/common/rc.c

77

control = mopGetChar(pkt, &idx); /* Control */

usr.sbin/mopd/common/rc.c

78

fprintf(fd, "Control : %02x ", control);

usr.sbin/mopd/common/rc.c

79

if ((control & (1<<MOP_K_BOT_CNTL_SERVER)))

usr.sbin/mopd/common/rc.c

83

if ((control & (1<<MOP_K_BOT_CNTL_DEVICE)))

usr.sbin/mopd/common/rc.c

89

if ((control & (1<<MOP_K_BOT_CNTL_DEVICE))) {

usr.sbin/smtpd/smtpd.c

754

return control();

usr.sbin/smtpd/smtpd.h

1302

int control(void);

usr.sbin/tcpdump/appletalk.h

112

u_char control;

usr.sbin/tcpdump/appletalk.h

78

u_char control;

usr.sbin/tcpdump/print-atalk.c

268

switch (ap->control & 0xc0) {

usr.sbin/tcpdump/print-atalk.c

272

ap->control & atpXO? " " : "*",

usr.sbin/tcpdump/print-atalk.c

280

switch (ap->control & (atpEOM|atpSTS)) {

usr.sbin/tcpdump/print-atalk.c

295

ap->control & atpEOM? "*" : " ",

usr.sbin/tcpdump/print-atalk.c

297

switch (ap->control & (atpXO|atpSTS)) {

usr.sbin/tcpdump/print-atalk.c

320

if (ap->control & (atpXO|atpEOM|atpSTS)) {

usr.sbin/tcpdump/print-atalk.c

322

if (ap->control & atpXO) {

usr.sbin/tcpdump/print-atalk.c

326

if (ap->control & atpEOM) {

usr.sbin/tcpdump/print-atalk.c

330

if (ap->control & atpSTS) {

usr.sbin/tcpdump/print-atalk.c

339

printf(" atp-0x%x %d (%d)", ap->control,

usr.sbin/tcpdump/print-atalk.c

396

if (np->control == nbpNATLKerr) {

usr.sbin/tcpdump/print-atalk.c

399

} else if (np->control == nbpNATLKok) {

usr.sbin/tcpdump/print-atalk.c

404

np->control, np->id, length + nbpHeaderSize);

usr.sbin/tcpdump/print-atalk.c

413

switch (i = np->control & 0xf0) {

usr.sbin/tcpdump/print-atalk.c

428

if ((np->control & 0xf) != 1)

usr.sbin/tcpdump/print-atalk.c

429

printf(" [ntup=%d]", np->control & 0xf);

usr.sbin/tcpdump/print-atalk.c

443

for (i = np->control & 0xf; --i >= 0 && tp; )

usr.sbin/tcpdump/print-atalk.c

453

for (i = np->control & 0xf; --i >= 0 && tp; )

usr.sbin/tcpdump/print-atalk.c

458

printf(" nbp-0x%x %d (%d)", np->control, np->id,

usr.sbin/tcpdump/print-llc.c

170

control = llc.llcu;

usr.sbin/tcpdump/print-llc.c

175

control = llc.llcis;

usr.sbin/tcpdump/print-llc.c

181

netbeui_print(control, p, p + min(caplen, length));

usr.sbin/tcpdump/print-llc.c

66

u_short control;

usr.sbin/tcpdump/print-ppp.c

1402

uint8_t address, control;

usr.sbin/tcpdump/print-ppp.c

1407

if (l < sizeof(address) + sizeof(control))

usr.sbin/tcpdump/print-ppp.c

1411

control = p[1];

usr.sbin/tcpdump/print-ppp.c

1413

p += sizeof(address) + sizeof(control);

usr.sbin/tcpdump/print-ppp.c

1414

l -= sizeof(address) + sizeof(control);

usr.sbin/tcpdump/print-ppp.c

1415

length -= sizeof(address) + sizeof(control);

usr.sbin/tcpdump/print-ppp.c

1420

printf("%02x %02x %u ", address, control, length);

usr.sbin/tcpdump/print-ppp.c

1422

if (control != 0x3) {

usr.sbin/tcpdump/print-smb.c

800

void netbeui_print(u_short control, const uchar *data, const uchar *maxbuf)

usr.sbin/tcpdump/print-smb.c

814

printf("NetBeui type 0x%X ", control);

usr.sbin/unbound/daemon/acl_list.c

101

*control = acl_deny;

usr.sbin/unbound/daemon/acl_list.c

103

*control = acl_refuse;

usr.sbin/unbound/daemon/acl_list.c

105

*control = acl_deny_non_local;

usr.sbin/unbound/daemon/acl_list.c

107

*control = acl_refuse_non_local;

usr.sbin/unbound/daemon/acl_list.c

109

*control = acl_allow_snoop;

usr.sbin/unbound/daemon/acl_list.c

111

*control = acl_allow_setrd;

usr.sbin/unbound/daemon/acl_list.c

113

*control = acl_allow_cookie;

usr.sbin/unbound/daemon/acl_list.c

129

enum acl_access control;

usr.sbin/unbound/daemon/acl_list.c

130

if(!parse_acl_access(s2, &control)) {

usr.sbin/unbound/daemon/acl_list.c

137

if(!acl_list_insert(acl, &addr, addrlen, net, control,

usr.sbin/unbound/daemon/acl_list.c

182

socklen_t addrlen, enum acl_access control)

usr.sbin/unbound/daemon/acl_list.c

192

addrlen, net, control, 1))) {

usr.sbin/unbound/daemon/acl_list.c

206

enum acl_access control;

usr.sbin/unbound/daemon/acl_list.c

207

if(!parse_acl_access(s2, &control)) {

usr.sbin/unbound/daemon/acl_list.c

215

node->control = control;

usr.sbin/unbound/daemon/acl_list.c

222

enum acl_access control)

usr.sbin/unbound/daemon/acl_list.c

224

struct acl_addr* node = acl_find_or_create(acl_interface, addr, addrlen, control);

usr.sbin/unbound/daemon/acl_list.c

764

if(acl) return acl->control;

usr.sbin/unbound/daemon/acl_list.c

79

socklen_t addrlen, int net, enum acl_access control,

usr.sbin/unbound/daemon/acl_list.c

86

node->control = control;

usr.sbin/unbound/daemon/acl_list.c

96

parse_acl_access(const char* str, enum acl_access* control)

usr.sbin/unbound/daemon/acl_list.c

99

*control = acl_allow;

usr.sbin/unbound/daemon/acl_list.h

140

enum acl_access control);

usr.sbin/unbound/daemon/acl_list.h

96

enum acl_access control;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

109

control = malloc(n);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

110

if(!control) {

usr.sbin/unbound/dnstap/dnstap_fstrm.c

113

control[0] = 0;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

114

control[1] = htonl(4+4+4+strlen(contenttype));

usr.sbin/unbound/dnstap/dnstap_fstrm.c

115

control[2] = htonl(FSTRM_CONTROL_FRAME_READY);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

116

control[3] = htonl(FSTRM_CONTROL_FIELD_TYPE_CONTENT_TYPE);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

117

control[4] = htonl(strlen(contenttype));

usr.sbin/unbound/dnstap/dnstap_fstrm.c

118

memmove(&control[5], contenttype, strlen(contenttype));

usr.sbin/unbound/dnstap/dnstap_fstrm.c

120

return control;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

125

uint32_t* control;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

137

control = malloc(n);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

138

if(!control) {

usr.sbin/unbound/dnstap/dnstap_fstrm.c

141

control[0] = 0;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

142

control[1] = htonl(4+4+4+strlen(contenttype));

usr.sbin/unbound/dnstap/dnstap_fstrm.c

143

control[2] = htonl(FSTRM_CONTROL_FRAME_ACCEPT);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

144

control[3] = htonl(FSTRM_CONTROL_FIELD_TYPE_CONTENT_TYPE);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

145

control[4] = htonl(strlen(contenttype));

usr.sbin/unbound/dnstap/dnstap_fstrm.c

146

memmove(&control[5], contenttype, strlen(contenttype));

usr.sbin/unbound/dnstap/dnstap_fstrm.c

148

return control;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

153

uint32_t* control;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

162

control = malloc(n);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

163

if(!control) {

usr.sbin/unbound/dnstap/dnstap_fstrm.c

166

control[0] = 0;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

167

control[1] = htonl(4);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

168

control[2] = htonl(FSTRM_CONTROL_FRAME_FINISH);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

170

return control;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

51

uint32_t* control;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

62

control = malloc(n);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

63

if(!control)

usr.sbin/unbound/dnstap/dnstap_fstrm.c

65

control[0] = 0;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

66

control[1] = htonl(4+4+4+strlen(contenttype));

usr.sbin/unbound/dnstap/dnstap_fstrm.c

67

control[2] = htonl(FSTRM_CONTROL_FRAME_START);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

68

control[3] = htonl(FSTRM_CONTROL_FIELD_TYPE_CONTENT_TYPE);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

69

control[4] = htonl(strlen(contenttype));

usr.sbin/unbound/dnstap/dnstap_fstrm.c

70

memmove(&control[5], contenttype, strlen(contenttype));

usr.sbin/unbound/dnstap/dnstap_fstrm.c

72

return control;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

77

uint32_t* control;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

85

control = malloc(n);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

86

if(!control)

usr.sbin/unbound/dnstap/dnstap_fstrm.c

88

control[0] = 0;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

89

control[1] = htonl(4);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

90

control[2] = htonl(FSTRM_CONTROL_FRAME_STOP);

usr.sbin/unbound/dnstap/dnstap_fstrm.c

92

return control;

usr.sbin/unbound/dnstap/dnstap_fstrm.c

97

uint32_t* control;

usr.sbin/unbound/util/netevent.c

1357

} control;

usr.sbin/unbound/util/netevent.c

1366

msg.msg_control = control.buf;

usr.sbin/unbound/util/netevent.c

1368

msg.msg_controllen = sizeof(control.buf);

usr.sbin/unbound/util/netevent.c

1372

doq_set_localaddr_cmsg(&msg, sizeof(control.buf), &paddr->localaddr,

usr.sbin/unbound/util/netevent.c

635

} control;

usr.sbin/unbound/util/netevent.c

653

msg.msg_control = control.buf;

usr.sbin/unbound/util/netevent.c

655

msg.msg_controllen = sizeof(control.buf);

usr.sbin/unbound/util/netevent.c

665

log_assert(msg.msg_controllen <= sizeof(control.buf));

usr.sbin/unbound/util/netevent.c

681

log_assert(msg.msg_controllen <= sizeof(control.buf));

usr.sbin/unbound/util/netevent.c

699

log_assert(msg.msg_controllen <= sizeof(control.buf));

usr.sbin/unbound/util/netevent.c

716

log_assert(msg.msg_controllen <= sizeof(control.buf));

usr.sbin/vmd/fw_cfg.c

176

uint32_t len = 0, control = fw->control;

usr.sbin/vmd/fw_cfg.c

178

fw->control = 0;

usr.sbin/vmd/fw_cfg.c

179

if (control & FW_CFG_DMA_SELECT) {

usr.sbin/vmd/fw_cfg.c

180

uint16_t selector = control >> 16;

usr.sbin/vmd/fw_cfg.c

191

if (control & FW_CFG_DMA_WRITE) {

usr.sbin/vmd/fw_cfg.c

192

fw->control |= FW_CFG_DMA_ERROR;

usr.sbin/vmd/fw_cfg.c

193

} else if (control & FW_CFG_DMA_READ) {

usr.sbin/vmd/fw_cfg.c

197

fw->control |= FW_CFG_DMA_ERROR;

usr.sbin/vmd/fw_cfg.c

204

fw->control |= FW_CFG_DMA_ERROR;

usr.sbin/vmd/fw_cfg.c

280

fw_dma.control = be32toh(fw_dma.control);

usr.sbin/vmd/fw_cfg.c

287

data = be32toh(fw_dma.control);

usr.sbin/vmd/fw_cfg.c

41

uint32_t control;

usr.sbin/vmd/proc.h

163

void control(struct privsep *, struct privsep_proc *);

usr.sbin/vmd/vioscsi.h

106

u_int8_t control;

usr.sbin/vmd/vioscsi.h

152

u_int8_t control;

usr.sbin/vmd/vioscsi.h

80

u_int8_t control;

usr.sbin/vmd/vioscsi.h

96

u_int8_t control;

usr.sbin/vmd/vmd.c

71

{ "control", PROC_CONTROL, vmd_dispatch_control, control },

usr.sbin/ypldap/aldap.c

490

aldap_parse_page_control(struct ber_element *control, size_t len)

usr.sbin/ypldap/aldap.c

499

ober_scanf_elements(control, "ss", &oid, &encoded);

usr.sbin/ypldap/aldap.c

500

ober_set_readbuf(&b, encoded, control->be_next->be_len);