sys/dev/pci/drm/i915/display/g4x_hdmi.c

658

return port == PORT_B || port == PORT_C;

sys/dev/pci/drm/i915/display/g4x_hdmi.c

660

return port == PORT_B || port == PORT_C || port == PORT_D;

sys/dev/pci/drm/i915/display/icl_dsi.c

1117

if (is_vid_mode(intel_dsi) || (intel_dsi->ports & BIT(PORT_B)))

sys/dev/pci/drm/i915/display/icl_dsi.c

1547

if (intel_dsi->ports == BIT(PORT_B))

sys/dev/pci/drm/i915/display/icl_dsi.c

1559

if (intel_dsi->ports == (BIT(PORT_B) | BIT(PORT_A)))

sys/dev/pci/drm/i915/display/icl_dsi.c

1562

else if (intel_dsi->ports == BIT(PORT_B))

sys/dev/pci/drm/i915/display/icl_dsi.c

1688

if (intel_dsi->ports == BIT(PORT_B))

sys/dev/pci/drm/i915/display/icl_dsi.c

2011

intel_dsi->ports = BIT(PORT_A) | BIT(PORT_B);

sys/dev/pci/drm/i915/display/icl_dsi.c

242

port = PORT_B;

sys/dev/pci/drm/i915/display/intel_audio_regs.h

161

#define VLV_AUD_PORT_EN_DBG(port) _MMIO_BASE_PORT3(VLV_DISPLAY_BASE, (port) - PORT_B, \

sys/dev/pci/drm/i915/display/intel_bios.c

1652

enum port port_bc = DISPLAY_VER(display) >= 11 ? PORT_B : PORT_C;

sys/dev/pci/drm/i915/display/intel_bios.c

2347

[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },

sys/dev/pci/drm/i915/display/intel_bios.c

2362

[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },

sys/dev/pci/drm/i915/display/intel_bios.c

2373

[PORT_B] = { -1 },

sys/dev/pci/drm/i915/display/intel_bios.c

2382

[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },

sys/dev/pci/drm/i915/display/intel_bios.c

2422

return PORT_B;

sys/dev/pci/drm/i915/display/intel_ddi.c

1930

case PORT_B:

sys/dev/pci/drm/i915/display/intel_ddi.c

3391

[PORT_B] = TRANSCODER_A,

sys/dev/pci/drm/i915/display/intel_ddi.c

5033

case PORT_B:

sys/dev/pci/drm/i915/display/intel_display.c

7794

found = intel_sdvo_init(display, PCH_SDVOB, PORT_B);

sys/dev/pci/drm/i915/display/intel_display.c

7796

g4x_hdmi_init(display, PCH_HDMIB, PORT_B);

sys/dev/pci/drm/i915/display/intel_display.c

7798

g4x_dp_init(display, PCH_DP_B, PORT_B);

sys/dev/pci/drm/i915/display/intel_display.c

7833

has_edp = intel_dp_is_port_edp(display, PORT_B);

sys/dev/pci/drm/i915/display/intel_display.c

7834

has_port = intel_bios_is_port_present(display, PORT_B);

sys/dev/pci/drm/i915/display/intel_display.c

7836

has_edp &= g4x_dp_init(display, VLV_DP_B, PORT_B);

sys/dev/pci/drm/i915/display/intel_display.c

7838

g4x_hdmi_init(display, VLV_HDMIB, PORT_B);

sys/dev/pci/drm/i915/display/intel_display.c

7873

found = intel_sdvo_init(display, GEN3_SDVOB, PORT_B);

sys/dev/pci/drm/i915/display/intel_display.c

7877

g4x_hdmi_init(display, GEN4_HDMIB, PORT_B);

sys/dev/pci/drm/i915/display/intel_display.c

7881

g4x_dp_init(display, DP_B, PORT_B);

sys/dev/pci/drm/i915/display/intel_display.h

103

case PORT_B:

sys/dev/pci/drm/i915/display/intel_display_debugfs.c

859

lpsp_capable = encoder->port <= PORT_B;

sys/dev/pci/drm/i915/display/intel_display_debugfs.c

866

lpsp_capable = encoder->port <= PORT_B;

sys/dev/pci/drm/i915/display/intel_display_device.c

1037

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |

sys/dev/pci/drm/i915/display/intel_display_device.c

1054

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |

sys/dev/pci/drm/i915/display/intel_display_device.c

1077

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |

sys/dev/pci/drm/i915/display/intel_display_device.c

1174

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) |

sys/dev/pci/drm/i915/display/intel_display_device.c

1239

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D_XELPD) |

sys/dev/pci/drm/i915/display/intel_display_device.c

1342

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | \

sys/dev/pci/drm/i915/display/intel_display_device.c

1368

BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_TC1) | BIT(PORT_TC2),

sys/dev/pci/drm/i915/display/intel_display_device.c

264

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C), /* DVO A/B/C */

sys/dev/pci/drm/i915/display/intel_display_device.c

273

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */

sys/dev/pci/drm/i915/display/intel_display_device.c

283

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */

sys/dev/pci/drm/i915/display/intel_display_device.c

293

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C), /* DVO B/C */

sys/dev/pci/drm/i915/display/intel_display_device.c

308

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) /* SDVO B/C */

sys/dev/pci/drm/i915/display/intel_display_device.c

404

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C), /* SDVO B/C */

sys/dev/pci/drm/i915/display/intel_display_device.c

416

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C), /* SDVO B/C */

sys/dev/pci/drm/i915/display/intel_display_device.c

427

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D */

sys/dev/pci/drm/i915/display/intel_display_device.c

439

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* SDVO/HDMI/DP B/C, DP D */

sys/dev/pci/drm/i915/display/intel_display_device.c

454

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

sys/dev/pci/drm/i915/display/intel_display_device.c

483

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

sys/dev/pci/drm/i915/display/intel_display_device.c

508

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */

sys/dev/pci/drm/i915/display/intel_display_device.c

537

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C), /* HDMI/DP B/C */

sys/dev/pci/drm/i915/display/intel_display_device.c

586

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

sys/dev/pci/drm/i915/display/intel_display_device.c

639

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

sys/dev/pci/drm/i915/display/intel_display_device.c

658

.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D), /* HDMI/DP B/C/D */

sys/dev/pci/drm/i915/display/intel_display_device.c

683

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

sys/dev/pci/drm/i915/display/intel_display_device.c

834

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C)

sys/dev/pci/drm/i915/display/intel_display_device.c

932

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) | BIT(PORT_E),

sys/dev/pci/drm/i915/display/intel_display_device.c

940

.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D),

sys/dev/pci/drm/i915/display/intel_display_irq.c

1269

PORT_A : PORT_B;

sys/dev/pci/drm/i915/display/intel_display_irq.c

1301

port = (te_trigger & DSI1_TE) ? PORT_B : PORT_A;

sys/dev/pci/drm/i915/display/intel_display_irq.c

1694

port = PORT_B;

sys/dev/pci/drm/i915/display/intel_display_power.c

2395

.port_end = PORT_B,

sys/dev/pci/drm/i915/display/intel_display_regs.h

2020

#define TRANS_DP_PORT_SEL(port) REG_FIELD_PREP(TRANS_DP_PORT_SEL_MASK, (port) - PORT_B)

sys/dev/pci/drm/i915/display/intel_dp.c

6767

port != PORT_B && port != PORT_C))

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

1181

case PORT_B:

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

176

[DPIO_CH0] = { .port = PORT_B },

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

199

[DPIO_CH0] = { .port = PORT_B },

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

665

case PORT_B:

sys/dev/pci/drm/i915/display/intel_dpio_phy.c

679

case PORT_B:

sys/dev/pci/drm/i915/display/intel_dsi_vbt.c

96

if (intel_dsi->ports & BIT(PORT_B))

sys/dev/pci/drm/i915/display/intel_dsi_vbt.c

97

return PORT_B;

sys/dev/pci/drm/i915/display/intel_dvo.c

107

.port = PORT_B,

sys/dev/pci/drm/i915/display/intel_hdcp.c

2289

case PORT_B ... PORT_F:

sys/dev/pci/drm/i915/display/intel_hdcp.c

466

case PORT_B:

sys/dev/pci/drm/i915/display/intel_hdmi.c

2730

case PORT_B:

sys/dev/pci/drm/i915/display/intel_hdmi.c

2753

case PORT_B:

sys/dev/pci/drm/i915/display/intel_hdmi.c

2773

case PORT_B:

sys/dev/pci/drm/i915/display/intel_hdmi.c

2877

WARN_ON(encoder->port == PORT_B || encoder->port == PORT_C);

sys/dev/pci/drm/i915/display/intel_hdmi.c

2895

case PORT_B:

sys/dev/pci/drm/i915/display/intel_lpe_audio.c

364

ppdata = &pdata->port[port - PORT_B];

sys/dev/pci/drm/i915/display/intel_lpe_audio.c

391

pdata->notify_audio_lpe(display->audio.lpe.platdev, port - PORT_B);

sys/dev/pci/drm/i915/display/intel_pch_display.c

100

assert_pch_hdmi_disabled(display, pipe, PORT_B, PCH_HDMIB);

sys/dev/pci/drm/i915/display/intel_pch_display.c

169

ibx_sanitize_pch_dp_port(display, PORT_B, PCH_DP_B);

sys/dev/pci/drm/i915/display/intel_pch_display.c

174

ibx_sanitize_pch_hdmi_port(display, PORT_B, PCH_HDMIB);

sys/dev/pci/drm/i915/display/intel_pch_display.c

438

drm_WARN_ON(display->drm, port < PORT_B || port > PORT_D);

sys/dev/pci/drm/i915/display/intel_pch_display.c

85

assert_pch_dp_disabled(display, pipe, PORT_B, PCH_DP_B);

sys/dev/pci/drm/i915/display/intel_pipe_crc.c

106

case PORT_B:

sys/dev/pci/drm/i915/display/intel_psr.c

1202

return pipe <= PIPE_B && port <= PORT_B;

sys/dev/pci/drm/i915/display/intel_sdvo.c

1627

if (intel_sdvo->base.port == PORT_B)

sys/dev/pci/drm/i915/display/intel_sdvo.c

234

if (intel_sdvo->base.port == PORT_B)

sys/dev/pci/drm/i915/display/intel_sdvo.c

2622

if (sdvo->base.port == PORT_B)

sys/dev/pci/drm/i915/display/intel_sdvo.c

2645

if (sdvo->base.port == PORT_B)

sys/dev/pci/drm/i915/display/intel_sdvo.c

2689

if (sdvo->base.port == PORT_B) {

sys/dev/pci/drm/i915/display/intel_sdvo.c

2716

if (sdvo->base.port == PORT_B)

sys/dev/pci/drm/i915/display/intel_sdvo.c

3372

return port == PORT_B;

sys/dev/pci/drm/i915/display/intel_sdvo.c

3374

return port == PORT_B || port == PORT_C;

sys/dev/pci/drm/i915/display/intel_sdvo.c

3470

if (intel_sdvo->base.port == PORT_B)

sys/dev/pci/drm/i915/display/intel_sdvo.c

412

#define SDVO_NAME(svdo) ((svdo)->base.port == PORT_B ? "SDVOB" : "SDVOC")

sys/dev/pci/drm/i915/gvt/display.c

308

if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {

sys/dev/pci/drm/i915/gvt/display.c

315

vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) |=

sys/dev/pci/drm/i915/gvt/display.c

317

vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) &=

sys/dev/pci/drm/i915/gvt/display.c

320

vgpu_vreg_t(vgpu, BXT_PORT_PLL_ENABLE(PORT_B)) |=

sys/dev/pci/drm/i915/gvt/display.c

324

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |=

sys/dev/pci/drm/i915/gvt/display.c

326

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &=

sys/dev/pci/drm/i915/gvt/display.c

331

(PORT_B << TRANS_DDI_PORT_SHIFT) |

sys/dev/pci/drm/i915/gvt/display.c

362

(PORT_B << TRANS_DDI_PORT_SHIFT) |

sys/dev/pci/drm/i915/gvt/display.c

416

if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {

sys/dev/pci/drm/i915/gvt/display.c

418

~DPLL_CTRL2_DDI_CLK_OFF(PORT_B);

sys/dev/pci/drm/i915/gvt/display.c

420

DPLL_CTRL2_DDI_CLK_SEL(DPLL_ID_SKL_DPLL0, PORT_B);

sys/dev/pci/drm/i915/gvt/display.c

422

DPLL_CTRL2_DDI_SEL_OVERRIDE(PORT_B);

sys/dev/pci/drm/i915/gvt/display.c

429

(PORT_B << TRANS_DDI_PORT_SHIFT) |

sys/dev/pci/drm/i915/gvt/display.c

432

vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_B)) &=

sys/dev/pci/drm/i915/gvt/display.c

434

vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_B)) |=

sys/dev/pci/drm/i915/gvt/display.c

437

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= DDI_BUF_CTL_ENABLE;

sys/dev/pci/drm/i915/gvt/display.c

438

vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &= ~DDI_BUF_IS_IDLE;

sys/dev/pci/drm/i915/gvt/display.c

725

if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) {

sys/dev/pci/drm/i915/gvt/display.c

785

clean_virtual_dp_monitor(vgpu, PORT_B);

sys/dev/pci/drm/i915/gvt/display.c

814

return setup_virtual_dp_monitor(vgpu, PORT_B, GVT_DP_B,

sys/dev/pci/drm/i915/gvt/edid.c

108

port = PORT_B;

sys/dev/pci/drm/i915/gvt/edid.c

126

port = PORT_B;

sys/dev/pci/drm/i915/gvt/edid.c

92

port = PORT_B;

sys/dev/pci/drm/i915/gvt/handlers.c

2371

MMIO_DH(DDI_BUF_CTL(PORT_B), D_ALL, NULL, ddi_buf_ctl_mmio_write);

sys/dev/pci/drm/i915/gvt/handlers.c

2377

MMIO_DH(DP_TP_CTL(PORT_B), D_ALL, NULL, dp_tp_ctl_mmio_write);

sys/dev/pci/drm/i915/gvt/handlers.c

2383

MMIO_DH(DP_TP_STATUS(PORT_B), D_ALL, NULL, dp_tp_status_mmio_write);

sys/dev/pci/drm/i915/gvt/handlers.c

2787

MMIO_DH(BXT_PORT_PLL_ENABLE(PORT_B), D_BXT,

sys/dev/pci/drm/i915/gvt/handlers.c

564

case PORT_B:

sys/dev/pci/drm/i915/gvt/handlers.c

671

if (port != PORT_B && port != PORT_D) {

sys/dev/pci/drm/i915/gvt/handlers.c

958

calc_index(offset, DP_TP_CTL(PORT_A), DP_TP_CTL(PORT_B), DP_TP_CTL(PORT_E))

sys/dev/pci/drm/i915/gvt/mmio.c

280

vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) &=

sys/dev/pci/drm/i915/gvt/mmio.c

282

vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) |=

sys/dev/pci/drm/i915/gvt/vgpu.c

376

ret = intel_gvt_set_edid(vgpu, PORT_B);

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1143

MMIO_D(BXT_PHY_CTL(PORT_B));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

1146

MMIO_D(BXT_PORT_PLL_ENABLE(PORT_B));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

499

MMIO_D(PORT_CLK_SEL(PORT_B));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

530

MMIO_D(DDI_BUF_CTL(PORT_B));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

535

MMIO_D(DP_TP_CTL(PORT_B));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

540

MMIO_D(DP_TP_STATUS(PORT_B));