#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.34 2026/06/13 20:16:23 rkujawa Exp $");
#ifdef _KERNEL_OPT
#include "opt_ppcarch.h"
#include "opt_ppcparam.h"
#endif
#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/systm.h>
#include <sys/timetc.h>
#include <sys/cpu.h>
#include <uvm/uvm_extern.h>
#include <prop/proplib.h>
#include <powerpc/spr.h>
#include <powerpc/ibm4xx/spr.h>
#include <powerpc/ibm4xx/cpu.h>
static u_long ticks_per_sec;
static long ticks_per_intr;
static volatile u_long lasttb, lasttb2;
static u_long ticksmissed;
static volatile int tickspending;
static void init_ppc4xx_tc(void);
static u_int get_ppc4xx_timecount(struct timecounter *);
static struct timecounter ppc4xx_timecounter = {
.tc_get_timecount = get_ppc4xx_timecount,
.tc_counter_mask = ~0u,
.tc_name = "ppc_timebase",
.tc_quality = 100,
};
void decr_intr(struct clockframe *);
void stat_intr(struct clockframe *);
#ifdef FAST_STAT_CLOCK
#define PERIOD_POWER 17
#define TCR_PERIOD TCR_FP_2_17
#else
#define PERIOD_POWER 21
#define TCR_PERIOD TCR_FP_2_21
#endif
#ifdef PPC_IBM440
void (*ibm4xx_tprof_samplefn)(struct clockframe *);
u_int ibm4xx_tprof_div;
#endif
void
stat_intr(struct clockframe *frame)
{
struct cpu_info * const ci = curcpu();
mtspr(SPR_TSR, TSR_FIS);
ci->ci_data.cpu_nintr++;
ci->ci_ev_statclock.ev_count++;
#ifdef PPC_IBM440
if (ibm4xx_tprof_div != 0) {
static u_int statdiv;
(*ibm4xx_tprof_samplefn)(frame);
if (++statdiv < ibm4xx_tprof_div)
return;
statdiv = 0;
}
#endif
int s = splclock();
__asm volatile ("wrteei 1");
if (IPL_CLOCK > s) {
ci->ci_idepth++;
statclock(frame);
ci->ci_idepth--;
}
splx(s);
}
void
decr_intr(struct clockframe *frame)
{
struct cpu_info * const ci = curcpu();
int pcpl;
long tbtick, xticks;
int nticks;
if (!ticks_per_intr)
return;
tbtick = mftbl();
mtspr(SPR_TSR, TSR_PIS);
xticks = tbtick - lasttb2;
for (nticks = 0; xticks > ticks_per_intr; nticks++)
xticks -= ticks_per_intr;
lasttb2 = tbtick - xticks;
ci->ci_data.cpu_nintr++;
ci->ci_ev_clock.ev_count++;
pcpl = splclock();
__asm volatile ("wrteei 1");
if (pcpl >= IPL_CLOCK) {
tickspending += nticks;
ticksmissed += nticks;
} else {
nticks += tickspending;
tickspending = 0;
lasttb = lasttb2;
ci->ci_idepth++;
while (nticks-- > 0)
hardclock(frame);
ci->ci_idepth--;
}
splx(pcpl);
}
void
cpu_initclocks(void)
{
struct cpu_info * const ci = curcpu();
evcnt_attach_static(&ci->ci_ev_clock);
evcnt_attach_static(&ci->ci_ev_statclock);
ticks_per_intr = ticks_per_sec / hz;
stathz = profhz = ticks_per_sec / (1 << PERIOD_POWER);
printf("Setting PIT to %ld/%d = %ld\n", ticks_per_sec, hz,
ticks_per_intr);
lasttb2 = lasttb = mftbl();
#ifdef PPC_IBM440
mtspr(SPR_DECAR, ticks_per_intr);
mtspr(SPR_DEC, ticks_per_intr);
mtspr(SPR_TCR, TCR_DIE | TCR_ARE | TCR_FIE | TCR_PERIOD);
#else
mtspr(SPR_PIT, ticks_per_intr);
mtspr(SPR_TCR, TCR_PIE | TCR_ARE | TCR_FIE | TCR_PERIOD);
#endif
init_ppc4xx_tc();
}
void
calc_delayconst(void)
{
prop_number_t freq;
freq = prop_dictionary_get(board_properties, "processor-frequency");
#ifndef PPC_CPU_FREQ
KASSERT(freq != NULL);
#else
if (freq == NULL)
ticks_per_sec = (u_long) PPC_CPU_FREQ;
else
#endif
ticks_per_sec = (u_long) prop_number_integer_value(freq);
}
static u_int
get_ppc4xx_timecount(struct timecounter *tc)
{
u_long tb;
int msr;
__asm volatile ("mfmsr %0; wrteei 0" : "=r" (msr));
tb = mftbl();
__asm volatile ("mtmsr %0" :: "r" (msr));
return tb;
}
void
delay(unsigned int n)
{
u_quad_t tb;
u_long tbh, tbl, scratch;
tb = mftb();
tb += ((u_quad_t)n * ticks_per_sec + 999999) / 1000000;
tbh = tb >> 32;
tbl = tb;
__asm volatile (
"1:"
#ifdef PPC_IBM403
"mftbhi %0;"
#else
"mftbu %0;"
#endif
"cmplw %0,%1;"
"blt 1b;"
"bgt 2f;"
#ifdef PPC_IBM403
"mftblo %0;"
#else
"mftb %0;"
#endif
"cmplw %0,%2;"
"blt 1b;"
"2:"
: "=&r" (scratch)
: "r" (tbh), "r" (tbl)
: "cr0");
}
void
setstatclockrate(int arg)
{
}
static void
init_ppc4xx_tc(void)
{
ppc4xx_timecounter.tc_frequency = ticks_per_sec;
tc_init(&ppc4xx_timecounter);
}