#ifndef MPI_TYPE_H
#define MPI_TYPE_H
#ifndef MPI_POINTER
#define MPI_POINTER *
#endif
#ifdef __NetBSD__
typedef int8_t S8;
typedef uint8_t U8;
typedef int16_t S16;
typedef uint16_t U16;
typedef int32_t S32;
typedef uint32_t U32;
#else
typedef signed char S8;
typedef unsigned char U8;
typedef signed short S16;
typedef unsigned short U16;
#if defined(unix) || defined(__arm) || defined(ALPHA) || defined(__GNUC__)
typedef signed int S32;
typedef unsigned int U32;
#else
typedef signed long S32;
typedef unsigned long U32;
#endif
#endif
typedef struct _S64
{
U32 Low;
S32 High;
} S64;
typedef struct _U64
{
U32 Low;
U32 High;
} U64;
typedef S8 *PS8;
typedef U8 *PU8;
typedef S16 *PS16;
typedef U16 *PU16;
typedef S32 *PS32;
typedef U32 *PU32;
typedef S64 *PS64;
typedef U64 *PU64;
#endif
#ifndef MPI_H
#define MPI_H
#define MPI_VERSION_MAJOR (0x01)
#define MPI_VERSION_MINOR (0x02)
#define MPI_VERSION ((MPI_VERSION_MAJOR << 8) | MPI_VERSION_MINOR)
#define MPI_IOC_STATE_RESET (0x00000000)
#define MPI_IOC_STATE_READY (0x10000000)
#define MPI_IOC_STATE_OPERATIONAL (0x20000000)
#define MPI_IOC_STATE_FAULT (0x40000000)
#define MPI_IOC_STATE_MASK (0xF0000000)
#define MPI_IOC_STATE_SHIFT (28)
#define MPI_FAULT_REQUEST_MESSAGE_PCI_PARITY_ERROR (0x8111)
#define MPI_FAULT_REQUEST_MESSAGE_PCI_BUS_FAULT (0x8112)
#define MPI_FAULT_REPLY_MESSAGE_PCI_PARITY_ERROR (0x8113)
#define MPI_FAULT_REPLY_MESSAGE_PCI_BUS_FAULT (0x8114)
#define MPI_FAULT_DATA_SEND_PCI_PARITY_ERROR (0x8115)
#define MPI_FAULT_DATA_SEND_PCI_BUS_FAULT (0x8116)
#define MPI_FAULT_DATA_RECEIVE_PCI_PARITY_ERROR (0x8117)
#define MPI_FAULT_DATA_RECEIVE_PCI_BUS_FAULT (0x8118)
#define MPI_DOORBELL_OFFSET (0x00000000)
#define MPI_DOORBELL_ACTIVE (0x08000000)
#define MPI_DOORBELL_USED (MPI_DOORBELL_ACTIVE)
#define MPI_DOORBELL_ACTIVE_SHIFT (27)
#define MPI_DOORBELL_WHO_INIT_MASK (0x07000000)
#define MPI_DOORBELL_WHO_INIT_SHIFT (24)
#define MPI_DOORBELL_FUNCTION_MASK (0xFF000000)
#define MPI_DOORBELL_FUNCTION_SHIFT (24)
#define MPI_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
#define MPI_DOORBELL_ADD_DWORDS_SHIFT (16)
#define MPI_DOORBELL_DATA_MASK (0x0000FFFF)
#define MPI_WRITE_SEQUENCE_OFFSET (0x00000004)
#define MPI_WRSEQ_KEY_VALUE_MASK (0x0000000F)
#define MPI_WRSEQ_1ST_KEY_VALUE (0x04)
#define MPI_WRSEQ_2ND_KEY_VALUE (0x0B)
#define MPI_WRSEQ_3RD_KEY_VALUE (0x02)
#define MPI_WRSEQ_4TH_KEY_VALUE (0x07)
#define MPI_WRSEQ_5TH_KEY_VALUE (0x0D)
#define MPI_DIAGNOSTIC_OFFSET (0x00000008)
#define MPI_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
#define MPI_DIAG_PREVENT_IOC_BOOT (0x00000200)
#define MPI_DIAG_DRWE (0x00000080)
#define MPI_DIAG_FLASH_BAD_SIG (0x00000040)
#define MPI_DIAG_RESET_HISTORY (0x00000020)
#define MPI_DIAG_RW_ENABLE (0x00000010)
#define MPI_DIAG_RESET_ADAPTER (0x00000004)
#define MPI_DIAG_DISABLE_ARM (0x00000002)
#define MPI_DIAG_MEM_ENABLE (0x00000001)
#define MPI_TEST_BASE_ADDRESS_OFFSET (0x0000000C)
#define MPI_DIAG_RW_DATA_OFFSET (0x00000010)
#define MPI_DIAG_RW_ADDRESS_OFFSET (0x00000014)
#define MPI_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
#define MPI_HIS_IOP_DOORBELL_STATUS (0x80000000)
#define MPI_HIS_REPLY_MESSAGE_INTERRUPT (0x00000008)
#define MPI_HIS_DOORBELL_INTERRUPT (0x00000001)
#define MPI_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
#define MPI_HIM_RIM (0x00000008)
#define MPI_HIM_DIM (0x00000001)
#define MPI_REQUEST_QUEUE_OFFSET (0x00000040)
#define MPI_REQUEST_POST_FIFO_OFFSET (0x00000040)
#define MPI_REPLY_QUEUE_OFFSET (0x00000044)
#define MPI_REPLY_POST_FIFO_OFFSET (0x00000044)
#define MPI_REPLY_FREE_FIFO_OFFSET (0x00000044)
#define MPI_REQ_MF_DESCRIPTOR_NB_MASK (0x00000003)
#define MPI_REQ_MF_DESCRIPTOR_F_BIT (0x00000004)
#define MPI_REQ_MF_DESCRIPTOR_ADDRESS_MASK (0xFFFFFFF8)
#define MPI_ADDRESS_REPLY_A_BIT (0x80000000)
#define MPI_ADDRESS_REPLY_ADDRESS_MASK (0x7FFFFFFF)
#define MPI_CONTEXT_REPLY_A_BIT (0x80000000)
#define MPI_CONTEXT_REPLY_TYPE_MASK (0x60000000)
#define MPI_CONTEXT_REPLY_TYPE_SCSI_INIT (0x00)
#define MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET (0x01)
#define MPI_CONTEXT_REPLY_TYPE_LAN (0x02)
#define MPI_CONTEXT_REPLY_TYPE_SHIFT (29)
#define MPI_CONTEXT_REPLY_CONTEXT_MASK (0x1FFFFFFF)
#define MPI_GET_CONTEXT_REPLY_TYPE(x) (((x) & MPI_CONTEXT_REPLY_TYPE_MASK) \
>> MPI_CONTEXT_REPLY_TYPE_SHIFT)
#define MPI_SET_CONTEXT_REPLY_TYPE(x, typ) \
((x) = ((x) & ~MPI_CONTEXT_REPLY_TYPE_MASK) | \
(((typ) << MPI_CONTEXT_REPLY_TYPE_SHIFT) & \
MPI_CONTEXT_REPLY_TYPE_MASK))
#define MPI_FUNCTION_SCSI_IO_REQUEST (0x00)
#define MPI_FUNCTION_SCSI_TASK_MGMT (0x01)
#define MPI_FUNCTION_IOC_INIT (0x02)
#define MPI_FUNCTION_IOC_FACTS (0x03)
#define MPI_FUNCTION_CONFIG (0x04)
#define MPI_FUNCTION_PORT_FACTS (0x05)
#define MPI_FUNCTION_PORT_ENABLE (0x06)
#define MPI_FUNCTION_EVENT_NOTIFICATION (0x07)
#define MPI_FUNCTION_EVENT_ACK (0x08)
#define MPI_FUNCTION_FW_DOWNLOAD (0x09)
#define MPI_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
#define MPI_FUNCTION_TARGET_ASSIST (0x0B)
#define MPI_FUNCTION_TARGET_STATUS_SEND (0x0C)
#define MPI_FUNCTION_TARGET_MODE_ABORT (0x0D)
#define MPI_FUNCTION_TARGET_FC_BUF_POST_LINK_SRVC (0x0E)
#define MPI_FUNCTION_TARGET_FC_RSP_LINK_SRVC (0x0F)
#define MPI_FUNCTION_TARGET_FC_EX_SEND_LINK_SRVC (0x10)
#define MPI_FUNCTION_TARGET_FC_ABORT (0x11)
#define MPI_FUNCTION_FC_LINK_SRVC_BUF_POST (0x0E)
#define MPI_FUNCTION_FC_LINK_SRVC_RSP (0x0F)
#define MPI_FUNCTION_FC_EX_LINK_SRVC_SEND (0x10)
#define MPI_FUNCTION_FC_ABORT (0x11)
#define MPI_FUNCTION_FW_UPLOAD (0x12)
#define MPI_FUNCTION_FC_COMMON_TRANSPORT_SEND (0x13)
#define MPI_FUNCTION_FC_PRIMITIVE_SEND (0x14)
#define MPI_FUNCTION_RAID_ACTION (0x15)
#define MPI_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16)
#define MPI_FUNCTION_TOOLBOX (0x17)
#define MPI_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18)
#define MPI_FUNCTION_LAN_SEND (0x20)
#define MPI_FUNCTION_LAN_RECEIVE (0x21)
#define MPI_FUNCTION_LAN_RESET (0x22)
#define MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
#define MPI_FUNCTION_IO_UNIT_RESET (0x41)
#define MPI_FUNCTION_HANDSHAKE (0x42)
#define MPI_FUNCTION_REPLY_FRAME_REMOVAL (0x43)
typedef struct _SGE_SIMPLE32
{
U32 FlagsLength;
U32 Address;
} SGE_SIMPLE32, MPI_POINTER PTR_SGE_SIMPLE32,
SGESimple32_t, MPI_POINTER pSGESimple32_t;
typedef struct _SGE_SIMPLE64
{
U32 FlagsLength;
U64 Address;
} SGE_SIMPLE64, MPI_POINTER PTR_SGE_SIMPLE64,
SGESimple64_t, MPI_POINTER pSGESimple64_t;
typedef struct _SGE_SIMPLE_UNION
{
U32 FlagsLength;
union
{
U32 Address32;
U64 Address64;
} _u;
} SGESimpleUnion_t, MPI_POINTER pSGESimpleUnion_t,
SGE_SIMPLE_UNION, MPI_POINTER PTR_SGE_SIMPLE_UNION;
typedef struct _SGE_CHAIN32
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
U32 Address;
} SGE_CHAIN32, MPI_POINTER PTR_SGE_CHAIN32,
SGEChain32_t, MPI_POINTER pSGEChain32_t;
typedef struct _SGE_CHAIN64
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
U64 Address;
} SGE_CHAIN64, MPI_POINTER PTR_SGE_CHAIN64,
SGEChain64_t, MPI_POINTER pSGEChain64_t;
typedef struct _SGE_CHAIN_UNION
{
U16 Length;
U8 NextChainOffset;
U8 Flags;
union
{
U32 Address32;
U64 Address64;
} _u;
} SGE_CHAIN_UNION, MPI_POINTER PTR_SGE_CHAIN_UNION,
SGEChainUnion_t, MPI_POINTER pSGEChainUnion_t;
typedef struct _SGE_TRANSACTION32
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[1];
U32 TransactionDetails[1];
} SGE_TRANSACTION32, MPI_POINTER PTR_SGE_TRANSACTION32,
SGETransaction32_t, MPI_POINTER pSGETransaction32_t;
typedef struct _SGE_TRANSACTION64
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[2];
U32 TransactionDetails[1];
} SGE_TRANSACTION64, MPI_POINTER PTR_SGE_TRANSACTION64,
SGETransaction64_t, MPI_POINTER pSGETransaction64_t;
typedef struct _SGE_TRANSACTION96
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[3];
U32 TransactionDetails[1];
} SGE_TRANSACTION96, MPI_POINTER PTR_SGE_TRANSACTION96,
SGETransaction96_t, MPI_POINTER pSGETransaction96_t;
typedef struct _SGE_TRANSACTION128
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 TransactionContext[4];
U32 TransactionDetails[1];
} SGE_TRANSACTION128, MPI_POINTER PTR_SGE_TRANSACTION128,
SGETransaction_t128, MPI_POINTER pSGETransaction_t128;
typedef struct _SGE_TRANSACTION_UNION
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
union
{
U32 TransactionContext32[1];
U32 TransactionContext64[2];
U32 TransactionContext96[3];
U32 TransactionContext128[4];
} _u;
U32 TransactionDetails[1];
} SGE_TRANSACTION_UNION, MPI_POINTER PTR_SGE_TRANSACTION_UNION,
SGETransactionUnion_t, MPI_POINTER pSGETransactionUnion_t;
typedef struct _SGE_IO_UNION
{
union
{
SGE_SIMPLE_UNION Simple;
SGE_CHAIN_UNION Chain;
} _u;
} SGE_IO_UNION, MPI_POINTER PTR_SGE_IO_UNION,
SGEIOUnion_t, MPI_POINTER pSGEIOUnion_t;
typedef struct _SGE_TRANS_SIMPLE_UNION
{
union
{
SGE_SIMPLE_UNION Simple;
SGE_TRANSACTION_UNION Transaction;
} _u;
} SGE_TRANS_SIMPLE_UNION, MPI_POINTER PTR_SGE_TRANS_SIMPLE_UNION,
SGETransSimpleUnion_t, MPI_POINTER pSGETransSimpleUnion_t;
typedef struct _SGE_MPI_UNION
{
union
{
SGE_SIMPLE_UNION Simple;
SGE_CHAIN_UNION Chain;
SGE_TRANSACTION_UNION Transaction;
} _u;
} SGE_MPI_UNION, MPI_POINTER PTR_SGE_MPI_UNION,
MPI_SGE_UNION_t, MPI_POINTER pMPI_SGE_UNION_t,
SGEAllUnion_t, MPI_POINTER pSGEAllUnion_t;
#define MPI_SGE_FLAGS_LAST_ELEMENT (0x80)
#define MPI_SGE_FLAGS_END_OF_BUFFER (0x40)
#define MPI_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
#define MPI_SGE_FLAGS_LOCAL_ADDRESS (0x08)
#define MPI_SGE_FLAGS_DIRECTION (0x04)
#define MPI_SGE_FLAGS_ADDRESS_SIZE (0x02)
#define MPI_SGE_FLAGS_END_OF_LIST (0x01)
#define MPI_SGE_FLAGS_SHIFT (24)
#define MPI_SGE_LENGTH_MASK (0x00FFFFFF)
#define MPI_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
#define MPI_SGE_FLAGS_TRANSACTION_ELEMENT (0x00)
#define MPI_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
#define MPI_SGE_FLAGS_CHAIN_ELEMENT (0x30)
#define MPI_SGE_FLAGS_ELEMENT_MASK (0x30)
#define MPI_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
#define MPI_SGE_FLAGS_IOC_TO_HOST (0x00)
#define MPI_SGE_FLAGS_HOST_TO_IOC (0x04)
#define MPI_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
#define MPI_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
#define MPI_SGE_FLAGS_32_BIT_CONTEXT (0x00)
#define MPI_SGE_FLAGS_64_BIT_CONTEXT (0x02)
#define MPI_SGE_FLAGS_96_BIT_CONTEXT (0x04)
#define MPI_SGE_FLAGS_128_BIT_CONTEXT (0x06)
#define MPI_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
#define MPI_SGE_CHAIN_OFFSET_SHIFT (16)
#define MPI_SGE_SET_FLAGS(f) ((U32)(f) << MPI_SGE_FLAGS_SHIFT)
#define MPI_SGE_GET_FLAGS(fl) (((fl) & ~MPI_SGE_LENGTH_MASK) >> MPI_SGE_FLAGS_SHIFT)
#define MPI_SGE_LENGTH(fl) ((fl) & MPI_SGE_LENGTH_MASK)
#define MPI_SGE_CHAIN_LENGTH(fl) ((fl) & MPI_SGE_CHAIN_LENGTH_MASK)
#define MPI_SGE_SET_FLAGS_LENGTH(f,l) (MPI_SGE_SET_FLAGS(f) | MPI_SGE_LENGTH(l))
#define MPI_pSGE_GET_FLAGS(psg) MPI_SGE_GET_FLAGS((psg)->FlagsLength)
#define MPI_pSGE_GET_LENGTH(psg) MPI_SGE_LENGTH((psg)->FlagsLength)
#define MPI_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI_SGE_SET_FLAGS_LENGTH(f,l)
#define MPI_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI_SGE_SET_FLAGS(f)
#define MPI_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI_SGE_LENGTH(l)
#define MPI_GET_CHAIN_OFFSET(x) ((x&MPI_SGE_CHAIN_OFFSET_MASK)>>MPI_SGE_CHAIN_OFFSET_SHIFT)
typedef struct _MSG_REQUEST_HEADER
{
U8 Reserved[2];
U8 ChainOffset;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
} MSG_REQUEST_HEADER, MPI_POINTER PTR_MSG_REQUEST_HEADER,
MPIHeader_t, MPI_POINTER pMPIHeader_t;
typedef struct _MSG_DEFAULT_REPLY
{
U8 Reserved[2];
U8 MsgLength;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
U8 Reserved2[2];
U16 IOCStatus;
U32 IOCLogInfo;
} MSG_DEFAULT_REPLY, MPI_POINTER PTR_MSG_DEFAULT_REPLY,
MPIDefaultReply_t, MPI_POINTER pMPIDefaultReply_t;
#define MPI_MSGFLAGS_CONTINUATION_REPLY (0x80)
#define MPI_IOCSTATUS_SUCCESS (0x0000)
#define MPI_IOCSTATUS_INVALID_FUNCTION (0x0001)
#define MPI_IOCSTATUS_BUSY (0x0002)
#define MPI_IOCSTATUS_INVALID_SGL (0x0003)
#define MPI_IOCSTATUS_INTERNAL_ERROR (0x0004)
#define MPI_IOCSTATUS_RESERVED (0x0005)
#define MPI_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
#define MPI_IOCSTATUS_INVALID_FIELD (0x0007)
#define MPI_IOCSTATUS_INVALID_STATE (0x0008)
#define MPI_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
#define MPI_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
#define MPI_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
#define MPI_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
#define MPI_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
#define MPI_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
#define MPI_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
#define MPI_IOCSTATUS_SCSI_INVALID_BUS (0x0041)
#define MPI_IOCSTATUS_SCSI_INVALID_TARGETID (0x0042)
#define MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
#define MPI_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
#define MPI_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
#define MPI_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
#define MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
#define MPI_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
#define MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
#define MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
#define MPI_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
#define MPI_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
#define MPI_IOCSTATUS_TARGET_PRIORITY_IO (0x0060)
#define MPI_IOCSTATUS_TARGET_INVALID_PORT (0x0061)
#define MPI_IOCSTATUS_TARGET_INVALID_IOCINDEX (0x0062)
#define MPI_IOCSTATUS_TARGET_ABORTED (0x0063)
#define MPI_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
#define MPI_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
#define MPI_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
#define MPI_IOCSTATUS_TARGET_STS_DATA_NOT_SENT (0x006B)
#define MPI_IOCSTATUS_TARGET_FC_ABORTED (0x0066)
#define MPI_IOCSTATUS_TARGET_FC_RX_ID_INVALID (0x0067)
#define MPI_IOCSTATUS_TARGET_FC_DID_INVALID (0x0068)
#define MPI_IOCSTATUS_TARGET_FC_NODE_LOGGED_OUT (0x0069)
#define MPI_IOCSTATUS_FC_ABORTED (0x0066)
#define MPI_IOCSTATUS_FC_RX_ID_INVALID (0x0067)
#define MPI_IOCSTATUS_FC_DID_INVALID (0x0068)
#define MPI_IOCSTATUS_FC_NODE_LOGGED_OUT (0x0069)
#define MPI_IOCSTATUS_LAN_DEVICE_NOT_FOUND (0x0080)
#define MPI_IOCSTATUS_LAN_DEVICE_FAILURE (0x0081)
#define MPI_IOCSTATUS_LAN_TRANSMIT_ERROR (0x0082)
#define MPI_IOCSTATUS_LAN_TRANSMIT_ABORTED (0x0083)
#define MPI_IOCSTATUS_LAN_RECEIVE_ERROR (0x0084)
#define MPI_IOCSTATUS_LAN_RECEIVE_ABORTED (0x0085)
#define MPI_IOCSTATUS_LAN_PARTIAL_PACKET (0x0086)
#define MPI_IOCSTATUS_LAN_CANCELED (0x0087)
#define MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
#define MPI_IOCSTATUS_MASK (0x7FFF)
#define MPI_IOCLOGINFO_TYPE_MASK (0xF0000000)
#define MPI_IOCLOGINFO_TYPE_NONE (0x0)
#define MPI_IOCLOGINFO_TYPE_SCSI (0x1)
#define MPI_IOCLOGINFO_TYPE_FC (0x2)
#define MPI_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
#endif
#ifndef MPI_CNFG_H
#define MPI_CNFG_H
typedef struct _CONFIG_PAGE_HEADER
{
U8 PageVersion;
U8 PageLength;
U8 PageNumber;
U8 PageType;
} fCONFIG_PAGE_HEADER, MPI_POINTER PTR_CONFIG_PAGE_HEADER,
ConfigPageHeader_t, MPI_POINTER pConfigPageHeader_t;
typedef union _CONFIG_PAGE_HEADER_UNION
{
ConfigPageHeader_t Struct;
U8 Bytes[4];
U16 Word16[2];
U32 Word32;
} ConfigPageHeaderUnion, MPI_POINTER pConfigPageHeaderUnion,
fCONFIG_PAGE_HEADER_UNION, MPI_POINTER PTR_CONFIG_PAGE_HEADER_UNION;
#define MPI_CONFIG_PAGEATTR_READ_ONLY (0x00)
#define MPI_CONFIG_PAGEATTR_CHANGEABLE (0x10)
#define MPI_CONFIG_PAGEATTR_PERSISTENT (0x20)
#define MPI_CONFIG_PAGEATTR_RO_PERSISTENT (0x30)
#define MPI_CONFIG_PAGEATTR_MASK (0xF0)
#define MPI_CONFIG_PAGETYPE_IO_UNIT (0x00)
#define MPI_CONFIG_PAGETYPE_IOC (0x01)
#define MPI_CONFIG_PAGETYPE_BIOS (0x02)
#define MPI_CONFIG_PAGETYPE_SCSI_PORT (0x03)
#define MPI_CONFIG_PAGETYPE_SCSI_DEVICE (0x04)
#define MPI_CONFIG_PAGETYPE_FC_PORT (0x05)
#define MPI_CONFIG_PAGETYPE_FC_DEVICE (0x06)
#define MPI_CONFIG_PAGETYPE_LAN (0x07)
#define MPI_CONFIG_PAGETYPE_RAID_VOLUME (0x08)
#define MPI_CONFIG_PAGETYPE_MANUFACTURING (0x09)
#define MPI_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A)
#define MPI_CONFIG_PAGETYPE_MASK (0x0F)
#define MPI_CONFIG_TYPENUM_MASK (0x0FFF)
#define MPI_SCSI_PORT_PGAD_PORT_MASK (0x000000FF)
#define MPI_SCSI_DEVICE_TARGET_ID_MASK (0x000000FF)
#define MPI_SCSI_DEVICE_TARGET_ID_SHIFT (0)
#define MPI_SCSI_DEVICE_BUS_MASK (0x0000FF00)
#define MPI_SCSI_DEVICE_BUS_SHIFT (8)
#define MPI_FC_PORT_PGAD_PORT_MASK (0xF0000000)
#define MPI_FC_PORT_PGAD_PORT_SHIFT (28)
#define MPI_FC_PORT_PGAD_FORM_MASK (0x0F000000)
#define MPI_FC_PORT_PGAD_FORM_INDEX (0x01000000)
#define MPI_FC_PORT_PGAD_INDEX_MASK (0x0000FFFF)
#define MPI_FC_PORT_PGAD_INDEX_SHIFT (0)
#define MPI_FC_DEVICE_PGAD_PORT_MASK (0xF0000000)
#define MPI_FC_DEVICE_PGAD_PORT_SHIFT (28)
#define MPI_FC_DEVICE_PGAD_FORM_MASK (0x0F000000)
#define MPI_FC_DEVICE_PGAD_FORM_NEXT_DID (0x00000000)
#define MPI_FC_DEVICE_PGAD_ND_PORT_MASK (0xF0000000)
#define MPI_FC_DEVICE_PGAD_ND_PORT_SHIFT (28)
#define MPI_FC_DEVICE_PGAD_ND_DID_MASK (0x00FFFFFF)
#define MPI_FC_DEVICE_PGAD_ND_DID_SHIFT (0)
#define MPI_FC_DEVICE_PGAD_FORM_BUS_TID (0x01000000)
#define MPI_FC_DEVICE_PGAD_BT_BUS_MASK (0x0000FF00)
#define MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT (8)
#define MPI_FC_DEVICE_PGAD_BT_TID_MASK (0x000000FF)
#define MPI_FC_DEVICE_PGAD_BT_TID_SHIFT (0)
#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF)
#define MPI_PHYSDISK_PGAD_PHYSDISKNUM_SHIFT (0)
typedef struct _MSG_CONFIG
{
U8 Action;
U8 Reserved;
U8 ChainOffset;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
U8 Reserved2[8];
fCONFIG_PAGE_HEADER Header;
U32 PageAddress;
SGE_IO_UNION PageBufferSGE;
} MSG_CONFIG, MPI_POINTER PTR_MSG_CONFIG,
Config_t, MPI_POINTER pConfig_t;
#define MPI_CONFIG_ACTION_PAGE_HEADER (0x00)
#define MPI_CONFIG_ACTION_PAGE_READ_CURRENT (0x01)
#define MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02)
#define MPI_CONFIG_ACTION_PAGE_DEFAULT (0x03)
#define MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04)
#define MPI_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05)
#define MPI_CONFIG_ACTION_PAGE_READ_NVRAM (0x06)
typedef struct _MSG_CONFIG_REPLY
{
U8 Action;
U8 Reserved;
U8 MsgLength;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
U8 Reserved2[2];
U16 IOCStatus;
U32 IOCLogInfo;
fCONFIG_PAGE_HEADER Header;
} MSG_CONFIG_REPLY, MPI_POINTER PTR_MSG_CONFIG_REPLY,
ConfigReply_t, MPI_POINTER pConfigReply_t;
#define MPI_MANUFACTPAGE_DEVICEID_FC909 (0x0621)
#define MPI_MANUFACTPAGE_DEVICEID_FC919 (0x0624)
#define MPI_MANUFACTPAGE_DEVICEID_FC929 (0x0622)
#define MPI_MANUFACTPAGE_DEVICEID_FC919X (0x0628)
#define MPI_MANUFACTPAGE_DEVICEID_FC929X (0x0626)
#define MPI_MANUFACTPAGE_DEVID_53C1030 (0x0030)
#define MPI_MANUFACTPAGE_DEVID_53C1030ZC (0x0031)
#define MPI_MANUFACTPAGE_DEVID_1030_53C1035 (0x0032)
#define MPI_MANUFACTPAGE_DEVID_1030ZC_53C1035 (0x0033)
#define MPI_MANUFACTPAGE_DEVID_53C1035 (0x0040)
#define MPI_MANUFACTPAGE_DEVID_53C1035ZC (0x0041)
typedef struct _CONFIG_PAGE_MANUFACTURING_0
{
fCONFIG_PAGE_HEADER Header;
U8 ChipName[16];
U8 ChipRevision[8];
U8 BoardName[16];
U8 BoardAssembly[16];
U8 BoardTracerNumber[16];
} fCONFIG_PAGE_MANUFACTURING_0, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_0,
ManufacturingPage0_t, MPI_POINTER pManufacturingPage0_t;
#define MPI_MANUFACTURING0_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_MANUFACTURING_1
{
fCONFIG_PAGE_HEADER Header;
U8 VPD[256];
} fCONFIG_PAGE_MANUFACTURING_1, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_1,
ManufacturingPage1_t, MPI_POINTER pManufacturingPage1_t;
#define MPI_MANUFACTURING1_PAGEVERSION (0x00)
typedef struct _MPI_CHIP_REVISION_ID
{
U16 DeviceID;
U8 PCIRevisionID;
U8 Reserved;
} MPI_CHIP_REVISION_ID, MPI_POINTER PTR_MPI_CHIP_REVISION_ID,
MpiChipRevisionId_t, MPI_POINTER pMpiChipRevisionId_t;
#ifndef MPI_MAN_PAGE_2_HW_SETTINGS_WORDS
#define MPI_MAN_PAGE_2_HW_SETTINGS_WORDS (1)
#endif
typedef struct _CONFIG_PAGE_MANUFACTURING_2
{
fCONFIG_PAGE_HEADER Header;
MPI_CHIP_REVISION_ID ChipId;
U32 HwSettings[MPI_MAN_PAGE_2_HW_SETTINGS_WORDS];
} fCONFIG_PAGE_MANUFACTURING_2, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_2,
ManufacturingPage2_t, MPI_POINTER pManufacturingPage2_t;
#define MPI_MANUFACTURING2_PAGEVERSION (0x00)
#ifndef MPI_MAN_PAGE_3_INFO_WORDS
#define MPI_MAN_PAGE_3_INFO_WORDS (1)
#endif
typedef struct _CONFIG_PAGE_MANUFACTURING_3
{
fCONFIG_PAGE_HEADER Header;
MPI_CHIP_REVISION_ID ChipId;
U32 Info[MPI_MAN_PAGE_3_INFO_WORDS];
} fCONFIG_PAGE_MANUFACTURING_3, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_3,
ManufacturingPage3_t, MPI_POINTER pManufacturingPage3_t;
#define MPI_MANUFACTURING3_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_MANUFACTURING_4
{
fCONFIG_PAGE_HEADER Header;
U32 Reserved1;
U8 InfoOffset0;
U8 InfoSize0;
U8 InfoOffset1;
U8 InfoSize1;
U8 InquirySize;
U8 Reserved2;
U16 Reserved3;
U8 InquiryData[56];
U32 ISVolumeSettings;
U32 IMEVolumeSettings;
U32 IMVolumeSettings;
} fCONFIG_PAGE_MANUFACTURING_4, MPI_POINTER PTR_CONFIG_PAGE_MANUFACTURING_4,
ManufacturingPage4_t, MPI_POINTER pManufacturingPage4_t;
#define MPI_MANUFACTURING4_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_IO_UNIT_0
{
fCONFIG_PAGE_HEADER Header;
U64 UniqueValue;
} fCONFIG_PAGE_IO_UNIT_0, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_0,
IOUnitPage0_t, MPI_POINTER pIOUnitPage0_t;
#define MPI_IOUNITPAGE0_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_IO_UNIT_1
{
fCONFIG_PAGE_HEADER Header;
U32 Flags;
} fCONFIG_PAGE_IO_UNIT_1, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_1,
IOUnitPage1_t, MPI_POINTER pIOUnitPage1_t;
#define MPI_IOUNITPAGE1_PAGEVERSION (0x00)
#define MPI_IOUNITPAGE1_MULTI_FUNCTION (0x00000000)
#define MPI_IOUNITPAGE1_SINGLE_FUNCTION (0x00000001)
#define MPI_IOUNITPAGE1_MULTI_PATHING (0x00000002)
#define MPI_IOUNITPAGE1_SINGLE_PATHING (0x00000000)
#define MPI_IOUNITPAGE1_DISABLE_IR (0x00000040)
#define MPI_IOUNITPAGE1_FORCE_32 (0x00000080)
typedef struct _MPI_ADAPTER_INFO
{
U8 PciBusNumber;
U8 PciDeviceAndFunctionNumber;
U16 AdapterFlags;
} MPI_ADAPTER_INFO, MPI_POINTER PTR_MPI_ADAPTER_INFO,
MpiAdapterInfo_t, MPI_POINTER pMpiAdapterInfo_t;
#define MPI_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001)
#define MPI_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002)
typedef struct _CONFIG_PAGE_IO_UNIT_2
{
fCONFIG_PAGE_HEADER Header;
U32 Flags;
U32 BiosVersion;
MPI_ADAPTER_INFO AdapterOrder[4];
} fCONFIG_PAGE_IO_UNIT_2, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_2,
IOUnitPage2_t, MPI_POINTER pIOUnitPage2_t;
#define MPI_IOUNITPAGE2_PAGEVERSION (0x00)
#define MPI_IOUNITPAGE2_FLAGS_PAUSE_ON_ERROR (0x00000002)
#define MPI_IOUNITPAGE2_FLAGS_VERBOSE_ENABLE (0x00000004)
#define MPI_IOUNITPAGE2_FLAGS_COLOR_VIDEO_DISABLE (0x00000008)
#define MPI_IOUNITPAGE2_FLAGS_DONT_HOOK_INT_40 (0x00000010)
#ifndef MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX
#define MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1)
#endif
typedef struct _CONFIG_PAGE_IO_UNIT_3
{
fCONFIG_PAGE_HEADER Header;
U8 GPIOCount;
U8 Reserved1;
U16 Reserved2;
U16 GPIOVal[MPI_IO_UNIT_PAGE_3_GPIO_VAL_MAX];
} fCONFIG_PAGE_IO_UNIT_3, MPI_POINTER PTR_CONFIG_PAGE_IO_UNIT_3,
IOUnitPage3_t, MPI_POINTER pIOUnitPage3_t;
#define MPI_IOUNITPAGE3_PAGEVERSION (0x01)
#define MPI_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFC)
#define MPI_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2)
#define MPI_IOUNITPAGE3_GPIO_SETTING_OFF (0x00)
#define MPI_IOUNITPAGE3_GPIO_SETTING_ON (0x01)
typedef struct _CONFIG_PAGE_IOC_0
{
fCONFIG_PAGE_HEADER Header;
U32 TotalNVStore;
U32 FreeNVStore;
U16 VendorID;
U16 DeviceID;
U8 RevisionID;
U8 Reserved[3];
U32 ClassCode;
U16 SubsystemVendorID;
U16 SubsystemID;
} fCONFIG_PAGE_IOC_0, MPI_POINTER PTR_CONFIG_PAGE_IOC_0,
IOCPage0_t, MPI_POINTER pIOCPage0_t;
#define MPI_IOCPAGE0_PAGEVERSION (0x01)
typedef struct _CONFIG_PAGE_IOC_1
{
fCONFIG_PAGE_HEADER Header;
U32 Flags;
U32 CoalescingTimeout;
U8 CoalescingDepth;
U8 Reserved[3];
} fCONFIG_PAGE_IOC_1, MPI_POINTER PTR_CONFIG_PAGE_IOC_1,
IOCPage1_t, MPI_POINTER pIOCPage1_t;
#define MPI_IOCPAGE1_PAGEVERSION (0x00)
#define MPI_IOCPAGE1_REPLY_COALESCING (0x00000001)
typedef struct _CONFIG_PAGE_IOC_2_RAID_VOL
{
U8 VolumeID;
U8 VolumeBus;
U8 VolumeIOC;
U8 VolumePageNumber;
U8 VolumeType;
U8 Reserved2;
U16 Reserved3;
} fCONFIG_PAGE_IOC_2_RAID_VOL, MPI_POINTER PTR_CONFIG_PAGE_IOC_2_RAID_VOL,
ConfigPageIoc2RaidVol_t, MPI_POINTER pConfigPageIoc2RaidVol_t;
#ifndef MPI_IOC_PAGE_2_RAID_VOLUME_MAX
#define MPI_IOC_PAGE_2_RAID_VOLUME_MAX (1)
#endif
typedef struct _CONFIG_PAGE_IOC_2
{
fCONFIG_PAGE_HEADER Header;
U32 CapabilitiesFlags;
U8 NumActiveVolumes;
U8 MaxVolumes;
U8 NumActivePhysDisks;
U8 MaxPhysDisks;
fCONFIG_PAGE_IOC_2_RAID_VOL RaidVolume[MPI_IOC_PAGE_2_RAID_VOLUME_MAX];
} fCONFIG_PAGE_IOC_2, MPI_POINTER PTR_CONFIG_PAGE_IOC_2,
IOCPage2_t, MPI_POINTER pIOCPage2_t;
#define MPI_IOCPAGE2_PAGEVERSION (0x01)
#define MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT (0x00000001)
#define MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT (0x00000002)
#define MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT (0x00000004)
#define MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT (0x20000000)
#define MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT (0x40000000)
#define MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT (0x80000000)
#define MPI_RAID_VOL_TYPE_IS (0x00)
#define MPI_RAID_VOL_TYPE_IME (0x01)
#define MPI_RAID_VOL_TYPE_IM (0x02)
typedef struct _IOC_3_PHYS_DISK
{
U8 PhysDiskID;
U8 PhysDiskBus;
U8 PhysDiskIOC;
U8 PhysDiskNum;
} IOC_3_PHYS_DISK, MPI_POINTER PTR_IOC_3_PHYS_DISK,
Ioc3PhysDisk_t, MPI_POINTER pIoc3PhysDisk_t;
#ifndef MPI_IOC_PAGE_3_PHYSDISK_MAX
#define MPI_IOC_PAGE_3_PHYSDISK_MAX (1)
#endif
typedef struct _CONFIG_PAGE_IOC_3
{
fCONFIG_PAGE_HEADER Header;
U8 NumPhysDisks;
U8 Reserved1;
U16 Reserved2;
IOC_3_PHYS_DISK PhysDisk[MPI_IOC_PAGE_3_PHYSDISK_MAX];
} fCONFIG_PAGE_IOC_3, MPI_POINTER PTR_CONFIG_PAGE_IOC_3,
IOCPage3_t, MPI_POINTER pIOCPage3_t;
#define MPI_IOCPAGE3_PAGEVERSION (0x00)
typedef struct _IOC_4_SEP
{
U8 SEPTargetID;
U8 SEPBus;
U16 Reserved;
} IOC_4_SEP, MPI_POINTER PTR_IOC_4_SEP,
Ioc4Sep_t, MPI_POINTER pIoc4Sep_t;
#ifndef MPI_IOC_PAGE_4_SEP_MAX
#define MPI_IOC_PAGE_4_SEP_MAX (1)
#endif
typedef struct _CONFIG_PAGE_IOC_4
{
fCONFIG_PAGE_HEADER Header;
U8 ActiveSEP;
U8 MaxSEP;
U16 Reserved1;
IOC_4_SEP SEP[MPI_IOC_PAGE_4_SEP_MAX];
} fCONFIG_PAGE_IOC_4, MPI_POINTER PTR_CONFIG_PAGE_IOC_4,
IOCPage4_t, MPI_POINTER pIOCPage4_t;
#define MPI_IOCPAGE4_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_SCSI_PORT_0
{
fCONFIG_PAGE_HEADER Header;
U32 Capabilities;
U32 PhysicalInterface;
} fCONFIG_PAGE_SCSI_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_0,
SCSIPortPage0_t, MPI_POINTER pSCSIPortPage0_t;
#define MPI_SCSIPORTPAGE0_PAGEVERSION (0x01)
#define MPI_SCSIPORTPAGE0_CAP_IU (0x00000001)
#define MPI_SCSIPORTPAGE0_CAP_DT (0x00000002)
#define MPI_SCSIPORTPAGE0_CAP_QAS (0x00000004)
#define MPI_SCSIPORTPAGE0_CAP_MIN_SYNC_PERIOD_MASK (0x0000FF00)
#define MPI_SCSIPORTPAGE0_CAP_MAX_SYNC_OFFSET_MASK (0x00FF0000)
#define MPI_SCSIPORTPAGE0_CAP_WIDE (0x20000000)
#define MPI_SCSIPORTPAGE0_CAP_AIP (0x80000000)
#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_TYPE_MASK (0x00000003)
#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_HVD (0x01)
#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_SE (0x02)
#define MPI_SCSIPORTPAGE0_PHY_SIGNAL_LVD (0x03)
typedef struct _CONFIG_PAGE_SCSI_PORT_1
{
fCONFIG_PAGE_HEADER Header;
U32 Configuration;
U32 OnBusTimerValue;
} fCONFIG_PAGE_SCSI_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_1,
SCSIPortPage1_t, MPI_POINTER pSCSIPortPage1_t;
#define MPI_SCSIPORTPAGE1_PAGEVERSION (0x02)
#define MPI_SCSIPORTPAGE1_CFG_PORT_SCSI_ID_MASK (0x000000FF)
#define MPI_SCSIPORTPAGE1_CFG_PORT_RESPONSE_ID_MASK (0xFFFF0000)
typedef struct _MPI_DEVICE_INFO
{
U8 Timeout;
U8 SyncFactor;
U16 DeviceFlags;
} MPI_DEVICE_INFO, MPI_POINTER PTR_MPI_DEVICE_INFO,
MpiDeviceInfo_t, MPI_POINTER pMpiDeviceInfo_t;
typedef struct _CONFIG_PAGE_SCSI_PORT_2
{
fCONFIG_PAGE_HEADER Header;
U32 PortFlags;
U32 PortSettings;
MPI_DEVICE_INFO DeviceSettings[16];
} fCONFIG_PAGE_SCSI_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_PORT_2,
SCSIPortPage2_t, MPI_POINTER pSCSIPortPage2_t;
#define MPI_SCSIPORTPAGE2_PAGEVERSION (0x01)
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_SCAN_HIGH_TO_LOW (0x00000001)
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_AVOID_SCSI_RESET (0x00000004)
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_ALTERNATE_CHS (0x00000008)
#define MPI_SCSIPORTPAGE2_PORT_FLAGS_TERMINATION_DISABLE (0x00000010)
#define MPI_SCSIPORTPAGE2_PORT_HOST_ID_MASK (0x0000000F)
#define MPI_SCSIPORTPAGE2_PORT_MASK_INIT_HBA (0x00000030)
#define MPI_SCSIPORTPAGE2_PORT_DISABLE_INIT_HBA (0x00000000)
#define MPI_SCSIPORTPAGE2_PORT_BIOS_INIT_HBA (0x00000010)
#define MPI_SCSIPORTPAGE2_PORT_OS_INIT_HBA (0x00000020)
#define MPI_SCSIPORTPAGE2_PORT_BIOS_OS_INIT_HBA (0x00000030)
#define MPI_SCSIPORTPAGE2_PORT_REMOVABLE_MEDIA (0x000000C0)
#define MPI_SCSIPORTPAGE2_PORT_SPINUP_DELAY_MASK (0x00000F00)
#define MPI_SCSIPORTPAGE2_PORT_MASK_NEGO_MASTER_SETTINGS (0x00003000)
#define MPI_SCSIPORTPAGE2_PORT_NEGO_MASTER_SETTINGS (0x00000000)
#define MPI_SCSIPORTPAGE2_PORT_NONE_MASTER_SETTINGS (0x00001000)
#define MPI_SCSIPORTPAGE2_PORT_ALL_MASTER_SETTINGS (0x00003000)
#define MPI_SCSIPORTPAGE2_DEVICE_DISCONNECT_ENABLE (0x0001)
#define MPI_SCSIPORTPAGE2_DEVICE_ID_SCAN_ENABLE (0x0002)
#define MPI_SCSIPORTPAGE2_DEVICE_LUN_SCAN_ENABLE (0x0004)
#define MPI_SCSIPORTPAGE2_DEVICE_TAG_QUEUE_ENABLE (0x0008)
#define MPI_SCSIPORTPAGE2_DEVICE_WIDE_DISABLE (0x0010)
#define MPI_SCSIPORTPAGE2_DEVICE_BOOT_CHOICE (0x0020)
typedef struct _CONFIG_PAGE_SCSI_DEVICE_0
{
fCONFIG_PAGE_HEADER Header;
U32 NegotiatedParameters;
U32 Information;
} fCONFIG_PAGE_SCSI_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_0,
SCSIDevicePage0_t, MPI_POINTER pSCSIDevicePage0_t;
#define MPI_SCSIDEVPAGE0_PAGEVERSION (0x02)
#define MPI_SCSIDEVPAGE0_NP_IU (0x00000001)
#define MPI_SCSIDEVPAGE0_NP_DT (0x00000002)
#define MPI_SCSIDEVPAGE0_NP_QAS (0x00000004)
#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_PERIOD_MASK (0x0000FF00)
#define MPI_SCSIDEVPAGE0_NP_NEG_SYNC_OFFSET_MASK (0x00FF0000)
#define MPI_SCSIDEVPAGE0_NP_WIDE (0x20000000)
#define MPI_SCSIDEVPAGE0_NP_AIP (0x80000000)
#define MPI_SCSIDEVPAGE0_INFO_PARAMS_NEGOTIATED (0x00000001)
#define MPI_SCSIDEVPAGE0_INFO_SDTR_REJECTED (0x00000002)
#define MPI_SCSIDEVPAGE0_INFO_WDTR_REJECTED (0x00000004)
#define MPI_SCSIDEVPAGE0_INFO_PPR_REJECTED (0x00000008)
typedef struct _CONFIG_PAGE_SCSI_DEVICE_1
{
fCONFIG_PAGE_HEADER Header;
U32 RequestedParameters;
U32 Reserved;
U32 Configuration;
} fCONFIG_PAGE_SCSI_DEVICE_1, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_1,
SCSIDevicePage1_t, MPI_POINTER pSCSIDevicePage1_t;
#define MPI_SCSIDEVPAGE1_PAGEVERSION (0x03)
#define MPI_SCSIDEVPAGE1_RP_IU (0x00000001)
#define MPI_SCSIDEVPAGE1_RP_DT (0x00000002)
#define MPI_SCSIDEVPAGE1_RP_QAS (0x00000004)
#define MPI_SCSIDEVPAGE1_RP_MIN_SYNC_PERIOD_MASK (0x0000FF00)
#define MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK (0x00FF0000)
#define MPI_SCSIDEVPAGE1_RP_WIDE (0x20000000)
#define MPI_SCSIDEVPAGE1_RP_AIP (0x80000000)
#define MPI_SCSIDEVPAGE1_DV_LVD_DRIVE_STRENGTH_MASK (0x00000003)
#define MPI_SCSIDEVPAGE1_DV_SE_SLEW_RATE_MASK (0x00000300)
#define MPI_SCSIDEVPAGE1_CONF_WDTR_DISALLOWED (0x00000002)
#define MPI_SCSIDEVPAGE1_CONF_SDTR_DISALLOWED (0x00000004)
typedef struct _CONFIG_PAGE_SCSI_DEVICE_2
{
fCONFIG_PAGE_HEADER Header;
U32 DomainValidation;
U32 ParityPipeSelect;
U32 DataPipeSelect;
} fCONFIG_PAGE_SCSI_DEVICE_2, MPI_POINTER PTR_CONFIG_PAGE_SCSI_DEVICE_2,
SCSIDevicePage2_t, MPI_POINTER pSCSIDevicePage2_t;
#define MPI_SCSIDEVPAGE2_PAGEVERSION (0x00)
#define MPI_SCSIDEVPAGE2_DV_ISI_ENABLE (0x00000010)
#define MPI_SCSIDEVPAGE2_DV_SECONDARY_DRIVER_ENABLE (0x00000020)
#define MPI_SCSIDEVPAGE2_DV_SLEW_RATE_CTRL (0x00000380)
#define MPI_SCSIDEVPAGE2_DV_PRIM_DRIVE_STR_CTRL (0x00001C00)
#define MPI_SCSIDEVPAGE2_DV_SECOND_DRIVE_STR_CTRL (0x0000E000)
#define MPI_SCSIDEVPAGE2_DV_XCLKH_ST (0x10000000)
#define MPI_SCSIDEVPAGE2_DV_XCLKS_ST (0x20000000)
#define MPI_SCSIDEVPAGE2_DV_XCLKH_DT (0x40000000)
#define MPI_SCSIDEVPAGE2_DV_XCLKS_DT (0x80000000)
#define MPI_SCSIDEVPAGE2_PPS_PPS_MASK (0x00000003)
#define MPI_SCSIDEVPAGE2_DPS_BIT_0_PL_SELECT_MASK (0x00000003)
#define MPI_SCSIDEVPAGE2_DPS_BIT_1_PL_SELECT_MASK (0x0000000C)
#define MPI_SCSIDEVPAGE2_DPS_BIT_2_PL_SELECT_MASK (0x00000030)
#define MPI_SCSIDEVPAGE2_DPS_BIT_3_PL_SELECT_MASK (0x000000C0)
#define MPI_SCSIDEVPAGE2_DPS_BIT_4_PL_SELECT_MASK (0x00000300)
#define MPI_SCSIDEVPAGE2_DPS_BIT_5_PL_SELECT_MASK (0x00000C00)
#define MPI_SCSIDEVPAGE2_DPS_BIT_6_PL_SELECT_MASK (0x00003000)
#define MPI_SCSIDEVPAGE2_DPS_BIT_7_PL_SELECT_MASK (0x0000C000)
#define MPI_SCSIDEVPAGE2_DPS_BIT_8_PL_SELECT_MASK (0x00030000)
#define MPI_SCSIDEVPAGE2_DPS_BIT_9_PL_SELECT_MASK (0x000C0000)
#define MPI_SCSIDEVPAGE2_DPS_BIT_10_PL_SELECT_MASK (0x00300000)
#define MPI_SCSIDEVPAGE2_DPS_BIT_11_PL_SELECT_MASK (0x00C00000)
#define MPI_SCSIDEVPAGE2_DPS_BIT_12_PL_SELECT_MASK (0x03000000)
#define MPI_SCSIDEVPAGE2_DPS_BIT_13_PL_SELECT_MASK (0x0C000000)
#define MPI_SCSIDEVPAGE2_DPS_BIT_14_PL_SELECT_MASK (0x30000000)
#define MPI_SCSIDEVPAGE2_DPS_BIT_15_PL_SELECT_MASK (0xC0000000)
typedef struct _CONFIG_PAGE_FC_PORT_0
{
fCONFIG_PAGE_HEADER Header;
U32 Flags;
U8 MPIPortNumber;
U8 LinkType;
U8 PortState;
U8 Reserved;
U32 PortIdentifier;
U64 WWNN;
U64 WWPN;
U32 SupportedServiceClass;
U32 SupportedSpeeds;
U32 CurrentSpeed;
U32 MaxFrameSize;
U64 FabricWWNN;
U64 FabricWWPN;
U32 DiscoveredPortsCount;
U32 MaxInitiators;
} fCONFIG_PAGE_FC_PORT_0, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_0,
FCPortPage0_t, MPI_POINTER pFCPortPage0_t;
#define MPI_FCPORTPAGE0_PAGEVERSION (0x01)
#define MPI_FCPORTPAGE0_FLAGS_PROT_MASK (0x0000000F)
#define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_INIT (MPI_PORTFACTS_PROTOCOL_INITIATOR)
#define MPI_FCPORTPAGE0_FLAGS_PROT_FCP_TARG (MPI_PORTFACTS_PROTOCOL_TARGET)
#define MPI_FCPORTPAGE0_FLAGS_PROT_LAN (MPI_PORTFACTS_PROTOCOL_LAN)
#define MPI_FCPORTPAGE0_FLAGS_PROT_LOGBUSADDR (MPI_PORTFACTS_PROTOCOL_LOGBUSADDR)
#define MPI_FCPORTPAGE0_FLAGS_ALIAS_ALPA_SUPPORTED (0x00000010)
#define MPI_FCPORTPAGE0_FLAGS_ALIAS_WWN_SUPPORTED (0x00000020)
#define MPI_FCPORTPAGE0_FLAGS_FABRIC_WWN_VALID (0x00000030)
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_TYPE_MASK (0x00000F00)
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_NO_INIT (0x00000000)
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_POINT_TO_POINT (0x00000100)
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PRIVATE_LOOP (0x00000200)
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_FABRIC_DIRECT (0x00000400)
#define MPI_FCPORTPAGE0_FLAGS_ATTACH_PUBLIC_LOOP (0x00000800)
#define MPI_FCPORTPAGE0_LTYPE_RESERVED (0x00)
#define MPI_FCPORTPAGE0_LTYPE_OTHER (0x01)
#define MPI_FCPORTPAGE0_LTYPE_UNKNOWN (0x02)
#define MPI_FCPORTPAGE0_LTYPE_COPPER (0x03)
#define MPI_FCPORTPAGE0_LTYPE_SINGLE_1300 (0x04)
#define MPI_FCPORTPAGE0_LTYPE_SINGLE_1500 (0x05)
#define MPI_FCPORTPAGE0_LTYPE_50_LASER_MULTI (0x06)
#define MPI_FCPORTPAGE0_LTYPE_50_LED_MULTI (0x07)
#define MPI_FCPORTPAGE0_LTYPE_62_LASER_MULTI (0x08)
#define MPI_FCPORTPAGE0_LTYPE_62_LED_MULTI (0x09)
#define MPI_FCPORTPAGE0_LTYPE_MULTI_LONG_WAVE (0x0A)
#define MPI_FCPORTPAGE0_LTYPE_MULTI_SHORT_WAVE (0x0B)
#define MPI_FCPORTPAGE0_LTYPE_LASER_SHORT_WAVE (0x0C)
#define MPI_FCPORTPAGE0_LTYPE_LED_SHORT_WAVE (0x0D)
#define MPI_FCPORTPAGE0_LTYPE_1300_LONG_WAVE (0x0E)
#define MPI_FCPORTPAGE0_LTYPE_1500_LONG_WAVE (0x0F)
#define MPI_FCPORTPAGE0_PORTSTATE_UNKNOWN (0x01)
#define MPI_FCPORTPAGE0_PORTSTATE_ONLINE (0x02)
#define MPI_FCPORTPAGE0_PORTSTATE_OFFLINE (0x03)
#define MPI_FCPORTPAGE0_PORTSTATE_BYPASSED (0x04)
#define MPI_FCPORTPAGE0_PORTSTATE_DIAGNOST (0x05)
#define MPI_FCPORTPAGE0_PORTSTATE_LINKDOWN (0x06)
#define MPI_FCPORTPAGE0_PORTSTATE_ERROR (0x07)
#define MPI_FCPORTPAGE0_PORTSTATE_LOOPBACK (0x08)
#define MPI_FCPORTPAGE0_SUPPORT_CLASS_1 (0x00000001)
#define MPI_FCPORTPAGE0_SUPPORT_CLASS_2 (0x00000002)
#define MPI_FCPORTPAGE0_SUPPORT_CLASS_3 (0x00000004)
#define MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED (0x00000001)
#define MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED (0x00000002)
#define MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED (0x00000004)
#define MPI_FCPORTPAGE0_CURRENT_SPEED_1GBIT MPI_FCPORTPAGE0_SUPPORT_1GBIT_SPEED
#define MPI_FCPORTPAGE0_CURRENT_SPEED_2GBIT MPI_FCPORTPAGE0_SUPPORT_2GBIT_SPEED
#define MPI_FCPORTPAGE0_CURRENT_SPEED_10GBIT MPI_FCPORTPAGE0_SUPPORT_10GBIT_SPEED
typedef struct _CONFIG_PAGE_FC_PORT_1
{
fCONFIG_PAGE_HEADER Header;
U32 Flags;
U64 NoSEEPROMWWNN;
U64 NoSEEPROMWWPN;
U8 HardALPA;
U8 LinkConfig;
U8 TopologyConfig;
U8 Reserved;
} fCONFIG_PAGE_FC_PORT_1, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_1,
FCPortPage1_t, MPI_POINTER pFCPortPage1_t;
#define MPI_FCPORTPAGE1_PAGEVERSION (0x02)
#define MPI_FCPORTPAGE1_FLAGS_EXT_FCP_STATUS_EN (0x08000000)
#define MPI_FCPORTPAGE1_FLAGS_IMMEDIATE_ERROR_REPLY (0x04000000)
#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_DID (0x00000001)
#define MPI_FCPORTPAGE1_FLAGS_SORT_BY_WWN (0x00000000)
#define MPI_FCPORTPAGE1_FLAGS_PROT_MASK (0xF0000000)
#define MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT (28)
#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_INIT ((U32)MPI_PORTFACTS_PROTOCOL_INITIATOR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
#define MPI_FCPORTPAGE1_FLAGS_PROT_FCP_TARG ((U32)MPI_PORTFACTS_PROTOCOL_TARGET << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
#define MPI_FCPORTPAGE1_FLAGS_PROT_LAN ((U32)MPI_PORTFACTS_PROTOCOL_LAN << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
#define MPI_FCPORTPAGE1_FLAGS_PROT_LOGBUSADDR ((U32)MPI_PORTFACTS_PROTOCOL_LOGBUSADDR << MPI_FCPORTPAGE1_FLAGS_PROT_SHIFT)
#define MPI_FCPORTPAGE1_HARD_ALPA_NOT_USED (0xFF)
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_MASK (0x0F)
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_1GIG (0x00)
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_2GIG (0x01)
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_4GIG (0x02)
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_10GIG (0x03)
#define MPI_FCPORTPAGE1_LCONFIG_SPEED_AUTO (0x0F)
#define MPI_FCPORTPAGE1_TOPOLOGY_MASK (0x0F)
#define MPI_FCPORTPAGE1_TOPOLOGY_NLPORT (0x01)
#define MPI_FCPORTPAGE1_TOPOLOGY_NPORT (0x02)
#define MPI_FCPORTPAGE1_TOPOLOGY_AUTO (0x0F)
typedef struct _CONFIG_PAGE_FC_PORT_2
{
fCONFIG_PAGE_HEADER Header;
U8 NumberActive;
U8 ALPA[127];
} fCONFIG_PAGE_FC_PORT_2, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_2,
FCPortPage2_t, MPI_POINTER pFCPortPage2_t;
#define MPI_FCPORTPAGE2_PAGEVERSION (0x01)
typedef struct _WWN_FORMAT
{
U64 WWNN;
U64 WWPN;
} WWN_FORMAT, MPI_POINTER PTR_WWN_FORMAT,
WWNFormat, MPI_POINTER pWWNFormat;
typedef union _FC_PORT_PERSISTENT_PHYSICAL_ID
{
WWN_FORMAT WWN;
U32 Did;
} FC_PORT_PERSISTENT_PHYSICAL_ID, MPI_POINTER PTR_FC_PORT_PERSISTENT_PHYSICAL_ID,
PersistentPhysicalId_t, MPI_POINTER pPersistentPhysicalId_t;
typedef struct _FC_PORT_PERSISTENT
{
FC_PORT_PERSISTENT_PHYSICAL_ID PhysicalIdentifier;
U8 TargetID;
U8 Bus;
U16 Flags;
} FC_PORT_PERSISTENT, MPI_POINTER PTR_FC_PORT_PERSISTENT,
PersistentData_t, MPI_POINTER pPersistentData_t;
#define MPI_PERSISTENT_FLAGS_SHIFT (16)
#define MPI_PERSISTENT_FLAGS_ENTRY_VALID (0x0001)
#define MPI_PERSISTENT_FLAGS_SCAN_ID (0x0002)
#define MPI_PERSISTENT_FLAGS_SCAN_LUNS (0x0004)
#define MPI_PERSISTENT_FLAGS_BOOT_DEVICE (0x0008)
#define MPI_PERSISTENT_FLAGS_BY_DID (0x0080)
#ifndef MPI_FC_PORT_PAGE_3_ENTRY_MAX
#define MPI_FC_PORT_PAGE_3_ENTRY_MAX (1)
#endif
typedef struct _CONFIG_PAGE_FC_PORT_3
{
fCONFIG_PAGE_HEADER Header;
FC_PORT_PERSISTENT Entry[MPI_FC_PORT_PAGE_3_ENTRY_MAX];
} fCONFIG_PAGE_FC_PORT_3, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_3,
FCPortPage3_t, MPI_POINTER pFCPortPage3_t;
#define MPI_FCPORTPAGE3_PAGEVERSION (0x01)
typedef struct _CONFIG_PAGE_FC_PORT_4
{
fCONFIG_PAGE_HEADER Header;
U32 PortFlags;
U32 PortSettings;
} fCONFIG_PAGE_FC_PORT_4, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_4,
FCPortPage4_t, MPI_POINTER pFCPortPage4_t;
#define MPI_FCPORTPAGE4_PAGEVERSION (0x00)
#define MPI_FCPORTPAGE4_PORT_FLAGS_ALTERNATE_CHS (0x00000008)
#define MPI_FCPORTPAGE4_PORT_MASK_INIT_HBA (0x00000030)
#define MPI_FCPORTPAGE4_PORT_DISABLE_INIT_HBA (0x00000000)
#define MPI_FCPORTPAGE4_PORT_BIOS_INIT_HBA (0x00000010)
#define MPI_FCPORTPAGE4_PORT_OS_INIT_HBA (0x00000020)
#define MPI_FCPORTPAGE4_PORT_BIOS_OS_INIT_HBA (0x00000030)
#define MPI_FCPORTPAGE4_PORT_REMOVABLE_MEDIA (0x000000C0)
#define MPI_FCPORTPAGE4_PORT_SPINUP_DELAY_MASK (0x00000F00)
typedef struct _CONFIG_PAGE_FC_PORT_5_ALIAS_INFO
{
U8 Flags;
U8 AliasAlpa;
U16 Reserved;
U64 AliasWWNN;
U64 AliasWWPN;
} fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5_ALIAS_INFO,
FcPortPage5AliasInfo_t, MPI_POINTER pFcPortPage5AliasInfo_t;
#ifndef MPI_FC_PORT_PAGE_5_ALIAS_MAX
#define MPI_FC_PORT_PAGE_5_ALIAS_MAX (1)
#endif
typedef struct _CONFIG_PAGE_FC_PORT_5
{
fCONFIG_PAGE_HEADER Header;
fCONFIG_PAGE_FC_PORT_5_ALIAS_INFO AliasInfo[MPI_FC_PORT_PAGE_5_ALIAS_MAX];
} fCONFIG_PAGE_FC_PORT_5, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_5,
FCPortPage5_t, MPI_POINTER pFCPortPage5_t;
#define MPI_FCPORTPAGE5_PAGEVERSION (0x00)
#define MPI_FCPORTPAGE5_FLAGS_ALIAS_ALPA_VALID (0x01)
#define MPI_FCPORTPAGE5_FLAGS_ALIAS_WWN_VALID (0x02)
typedef struct _CONFIG_PAGE_FC_PORT_6
{
fCONFIG_PAGE_HEADER Header;
U32 Reserved;
U64 TimeSinceReset;
U64 TxFrames;
U64 RxFrames;
U64 TxWords;
U64 RxWords;
U64 LipCount;
U64 NosCount;
U64 ErrorFrames;
U64 DumpedFrames;
U64 LinkFailureCount;
U64 LossOfSyncCount;
U64 LossOfSignalCount;
U64 PrimativeSeqErrCount;
U64 InvalidTxWordCount;
U64 InvalidCrcCount;
U64 FcpInitiatorIoCount;
} fCONFIG_PAGE_FC_PORT_6, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_6,
FCPortPage6_t, MPI_POINTER pFCPortPage6_t;
#define MPI_FCPORTPAGE6_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_FC_PORT_7
{
fCONFIG_PAGE_HEADER Header;
U32 Reserved;
U8 PortSymbolicName[256];
} fCONFIG_PAGE_FC_PORT_7, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_7,
FCPortPage7_t, MPI_POINTER pFCPortPage7_t;
#define MPI_FCPORTPAGE7_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_FC_PORT_8
{
fCONFIG_PAGE_HEADER Header;
U32 BitVector[8];
} fCONFIG_PAGE_FC_PORT_8, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_8,
FCPortPage8_t, MPI_POINTER pFCPortPage8_t;
#define MPI_FCPORTPAGE8_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_FC_PORT_9
{
fCONFIG_PAGE_HEADER Header;
U32 Reserved;
U64 GlobalWWPN;
U64 GlobalWWNN;
U32 UnitType;
U32 PhysicalPortNumber;
U32 NumAttachedNodes;
U16 IPVersion;
U16 UDPPortNumber;
U8 IPAddress[16];
U16 Reserved1;
U16 TopologyDiscoveryFlags;
} fCONFIG_PAGE_FC_PORT_9, MPI_POINTER PTR_CONFIG_PAGE_FC_PORT_9,
FCPortPage9_t, MPI_POINTER pFCPortPage9_t;
#define MPI_FCPORTPAGE9_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_FC_DEVICE_0
{
fCONFIG_PAGE_HEADER Header;
U64 WWNN;
U64 WWPN;
U32 PortIdentifier;
U8 Protocol;
U8 Flags;
U16 BBCredit;
U16 MaxRxFrameSize;
U8 Reserved1;
U8 PortNumber;
U8 FcPhLowestVersion;
U8 FcPhHighestVersion;
U8 CurrentTargetID;
U8 CurrentBus;
} fCONFIG_PAGE_FC_DEVICE_0, MPI_POINTER PTR_CONFIG_PAGE_FC_DEVICE_0,
FCDevicePage0_t, MPI_POINTER pFCDevicePage0_t;
#define MPI_FC_DEVICE_PAGE0_PAGEVERSION (0x02)
#define MPI_FC_DEVICE_PAGE0_FLAGS_TARGETID_BUS_VALID (0x01)
#define MPI_FC_DEVICE_PAGE0_PROT_IP (0x01)
#define MPI_FC_DEVICE_PAGE0_PROT_FCP_TARGET (0x02)
#define MPI_FC_DEVICE_PAGE0_PROT_FCP_INITIATOR (0x04)
#define MPI_FC_DEVICE_PAGE0_PGAD_PORT_MASK (MPI_FC_DEVICE_PGAD_PORT_MASK)
#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_MASK (MPI_FC_DEVICE_PGAD_FORM_MASK)
#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_NEXT_DID (MPI_FC_DEVICE_PGAD_FORM_NEXT_DID)
#define MPI_FC_DEVICE_PAGE0_PGAD_FORM_BUS_TID (MPI_FC_DEVICE_PGAD_FORM_BUS_TID)
#define MPI_FC_DEVICE_PAGE0_PGAD_DID_MASK (MPI_FC_DEVICE_PGAD_ND_DID_MASK)
#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_MASK (MPI_FC_DEVICE_PGAD_BT_BUS_MASK)
#define MPI_FC_DEVICE_PAGE0_PGAD_BUS_SHIFT (MPI_FC_DEVICE_PGAD_BT_BUS_SHIFT)
#define MPI_FC_DEVICE_PAGE0_PGAD_TID_MASK (MPI_FC_DEVICE_PGAD_BT_TID_MASK)
typedef struct _RAID_VOL0_PHYS_DISK
{
U16 Reserved;
U8 PhysDiskMap;
U8 PhysDiskNum;
} RAID_VOL0_PHYS_DISK, MPI_POINTER PTR_RAID_VOL0_PHYS_DISK,
RaidVol0PhysDisk_t, MPI_POINTER pRaidVol0PhysDisk_t;
#define MPI_RAIDVOL0_PHYSDISK_PRIMARY (0x01)
#define MPI_RAIDVOL0_PHYSDISK_SECONDARY (0x02)
typedef struct _RAID_VOL0_STATUS
{
U8 Flags;
U8 State;
U16 Reserved;
} RAID_VOL0_STATUS, MPI_POINTER PTR_RAID_VOL0_STATUS,
RaidVol0Status_t, MPI_POINTER pRaidVol0Status_t;
#define MPI_RAIDVOL0_STATUS_FLAG_ENABLED (0x01)
#define MPI_RAIDVOL0_STATUS_FLAG_QUIESCED (0x02)
#define MPI_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x04)
#define MPI_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE (0x08)
#define MPI_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL (0x10)
#define MPI_RAIDVOL0_STATUS_STATE_OPTIMAL (0x00)
#define MPI_RAIDVOL0_STATUS_STATE_DEGRADED (0x01)
#define MPI_RAIDVOL0_STATUS_STATE_FAILED (0x02)
#define MPI_RAIDVOL0_STATUS_STATE_MISSING (0x03)
typedef struct _RAID_VOL0_SETTINGS
{
U16 Settings;
U8 HotSparePool;
U8 Reserved;
} RAID_VOL0_SETTINGS, MPI_POINTER PTR_RAID_VOL0_SETTINGS,
RaidVol0Settings, MPI_POINTER pRaidVol0Settings;
#define MPI_RAIDVOL0_SETTING_WRITE_CACHING_ENABLE (0x0001)
#define MPI_RAIDVOL0_SETTING_OFFLINE_ON_SMART (0x0002)
#define MPI_RAIDVOL0_SETTING_AUTO_CONFIGURE (0x0004)
#define MPI_RAIDVOL0_SETTING_PRIORITY_RESYNC (0x0008)
#define MPI_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0010)
#define MPI_RAIDVOL0_SETTING_USE_DEFAULTS (0x8000)
#define MPI_RAID_HOT_SPARE_POOL_0 (0x01)
#define MPI_RAID_HOT_SPARE_POOL_1 (0x02)
#define MPI_RAID_HOT_SPARE_POOL_2 (0x04)
#define MPI_RAID_HOT_SPARE_POOL_3 (0x08)
#define MPI_RAID_HOT_SPARE_POOL_4 (0x10)
#define MPI_RAID_HOT_SPARE_POOL_5 (0x20)
#define MPI_RAID_HOT_SPARE_POOL_6 (0x40)
#define MPI_RAID_HOT_SPARE_POOL_7 (0x80)
#ifndef MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX
#define MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX (1)
#endif
typedef struct _CONFIG_PAGE_RAID_VOL_0
{
fCONFIG_PAGE_HEADER Header;
U8 VolumeID;
U8 VolumeBus;
U8 VolumeIOC;
U8 VolumeType;
RAID_VOL0_STATUS VolumeStatus;
RAID_VOL0_SETTINGS VolumeSettings;
U32 MaxLBA;
U32 Reserved1;
U32 StripeSize;
U32 Reserved2;
U32 Reserved3;
U8 NumPhysDisks;
U8 Reserved4;
U16 Reserved5;
RAID_VOL0_PHYS_DISK PhysDisk[MPI_RAID_VOL_PAGE_0_PHYSDISK_MAX];
} fCONFIG_PAGE_RAID_VOL_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_VOL_0,
RaidVolumePage0_t, MPI_POINTER pRaidVolumePage0_t;
#define MPI_RAIDVOLPAGE0_PAGEVERSION (0x00)
typedef struct _RAID_PHYS_DISK0_ERROR_DATA
{
U8 ErrorCdbByte;
U8 ErrorSenseKey;
U16 Reserved;
U16 ErrorCount;
U8 ErrorASC;
U8 ErrorASCQ;
U16 SmartCount;
U8 SmartASC;
U8 SmartASCQ;
} RAID_PHYS_DISK0_ERROR_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_ERROR_DATA,
RaidPhysDisk0ErrorData_t, MPI_POINTER pRaidPhysDisk0ErrorData_t;
typedef struct _RAID_PHYS_DISK_INQUIRY_DATA
{
U8 VendorID[8];
U8 ProductID[16];
U8 ProductRevLevel[4];
U8 Info[32];
} RAID_PHYS_DISK0_INQUIRY_DATA, MPI_POINTER PTR_RAID_PHYS_DISK0_INQUIRY_DATA,
RaidPhysDisk0InquiryData, MPI_POINTER pRaidPhysDisk0InquiryData;
typedef struct _RAID_PHYS_DISK0_SETTINGS
{
U8 SepID;
U8 SepBus;
U8 HotSparePool;
U8 PhysDiskSettings;
} RAID_PHYS_DISK0_SETTINGS, MPI_POINTER PTR_RAID_PHYS_DISK0_SETTINGS,
RaidPhysDiskSettings_t, MPI_POINTER pRaidPhysDiskSettings_t;
typedef struct _RAID_PHYS_DISK0_STATUS
{
U8 Flags;
U8 State;
U16 Reserved;
} RAID_PHYS_DISK0_STATUS, MPI_POINTER PTR_RAID_PHYS_DISK0_STATUS,
RaidPhysDiskStatus_t, MPI_POINTER pRaidPhysDiskStatus_t;
#define MPI_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x01)
#define MPI_PHYSDISK0_STATUS_FLAG_QUIESCED (0x02)
#define MPI_PHYSDISK0_STATUS_ONLINE (0x00)
#define MPI_PHYSDISK0_STATUS_MISSING (0x01)
#define MPI_PHYSDISK0_STATUS_NOT_COMPATIBLE (0x02)
#define MPI_PHYSDISK0_STATUS_FAILED (0x03)
#define MPI_PHYSDISK0_STATUS_INITIALIZING (0x04)
#define MPI_PHYSDISK0_STATUS_OFFLINE_REQUESTED (0x05)
#define MPI_PHYSDISK0_STATUS_FAILED_REQUESTED (0x06)
#define MPI_PHYSDISK0_STATUS_OTHER_OFFLINE (0xFF)
typedef struct _CONFIG_PAGE_RAID_PHYS_DISK_0
{
fCONFIG_PAGE_HEADER Header;
U8 PhysDiskID;
U8 PhysDiskBus;
U8 PhysDiskIOC;
U8 PhysDiskNum;
RAID_PHYS_DISK0_SETTINGS PhysDiskSettings;
U32 Reserved1;
U32 Reserved2;
U32 Reserved3;
U8 DiskIdentifier[16];
RAID_PHYS_DISK0_INQUIRY_DATA InquiryData;
RAID_PHYS_DISK0_STATUS PhysDiskStatus;
U32 MaxLBA;
RAID_PHYS_DISK0_ERROR_DATA ErrorData;
} fCONFIG_PAGE_RAID_PHYS_DISK_0, MPI_POINTER PTR_CONFIG_PAGE_RAID_PHYS_DISK_0,
RaidPhysDiskPage0_t, MPI_POINTER pRaidPhysDiskPage0_t;
#define MPI_RAIDPHYSDISKPAGE0_PAGEVERSION (0x00)
typedef struct _CONFIG_PAGE_LAN_0
{
ConfigPageHeader_t Header;
U16 TxRxModes;
U16 Reserved;
U32 PacketPrePad;
} fCONFIG_PAGE_LAN_0, MPI_POINTER PTR_CONFIG_PAGE_LAN_0,
LANPage0_t, MPI_POINTER pLANPage0_t;
#define MPI_LAN_PAGE0_PAGEVERSION (0x01)
#define MPI_LAN_PAGE0_RETURN_LOOPBACK (0x0000)
#define MPI_LAN_PAGE0_SUPPRESS_LOOPBACK (0x0001)
#define MPI_LAN_PAGE0_LOOPBACK_MASK (0x0001)
typedef struct _CONFIG_PAGE_LAN_1
{
ConfigPageHeader_t Header;
U16 Reserved;
U8 CurrentDeviceState;
U8 Reserved1;
U32 MinPacketSize;
U32 MaxPacketSize;
U32 HardwareAddressLow;
U32 HardwareAddressHigh;
U32 MaxWireSpeedLow;
U32 MaxWireSpeedHigh;
U32 BucketsRemaining;
U32 MaxReplySize;
U32 NegWireSpeedLow;
U32 NegWireSpeedHigh;
} fCONFIG_PAGE_LAN_1, MPI_POINTER PTR_CONFIG_PAGE_LAN_1,
LANPage1_t, MPI_POINTER pLANPage1_t;
#define MPI_LAN_PAGE1_PAGEVERSION (0x03)
#define MPI_LAN_PAGE1_DEV_STATE_RESET (0x00)
#define MPI_LAN_PAGE1_DEV_STATE_OPERATIONAL (0x01)
#endif
#ifndef MPI_FC_H
#define MPI_FC_H
typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REQUEST
{
U8 BufferPostFlags;
U8 BufferCount;
U8 ChainOffset;
U8 Function;
U16 Reserved;
U8 Reserved1;
U8 MsgFlags;
U32 MsgContext;
SGE_TRANS_SIMPLE_UNION SGL;
} MSG_LINK_SERVICE_BUFFER_POST_REQUEST,
MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REQUEST,
LinkServiceBufferPostRequest_t, MPI_POINTER pLinkServiceBufferPostRequest_t;
#define LINK_SERVICE_BUFFER_POST_FLAGS_PORT_MASK (0x01)
typedef struct _WWNFORMAT
{
U32 PortNameHigh;
U32 PortNameLow;
U32 NodeNameHigh;
U32 NodeNameLow;
} WWNFORMAT,
WwnFormat_t;
typedef struct _MSG_LINK_SERVICE_BUFFER_POST_REPLY
{
U8 Flags;
U8 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved1;
U8 PortNumber;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved2;
U16 IOCStatus;
U32 IOCLogInfo;
U32 TransferLength;
U32 TransactionContext;
U32 Rctl_Did;
U32 Csctl_Sid;
U32 Type_Fctl;
U16 SeqCnt;
U8 Dfctl;
U8 SeqId;
U16 Rxid;
U16 Oxid;
U32 Parameter;
WWNFORMAT Wwn;
} MSG_LINK_SERVICE_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_BUFFER_POST_REPLY,
LinkServiceBufferPostReply_t, MPI_POINTER pLinkServiceBufferPostReply_t;
#define MPI_LS_BUF_POST_REPLY_FLAG_NO_RSP_NEEDED (0x80)
#define MPI_FC_DID_MASK (0x00FFFFFF)
#define MPI_FC_DID_SHIFT (0)
#define MPI_FC_RCTL_MASK (0xFF000000)
#define MPI_FC_RCTL_SHIFT (24)
#define MPI_FC_SID_MASK (0x00FFFFFF)
#define MPI_FC_SID_SHIFT (0)
#define MPI_FC_CSCTL_MASK (0xFF000000)
#define MPI_FC_CSCTL_SHIFT (24)
#define MPI_FC_FCTL_MASK (0x00FFFFFF)
#define MPI_FC_FCTL_SHIFT (0)
#define MPI_FC_TYPE_MASK (0xFF000000)
#define MPI_FC_TYPE_SHIFT (24)
#define FCP_TARGET_DID_MASK (0x00FFFFFF)
#define FCP_TARGET_DID_SHIFT (0)
#define FCP_TARGET_RCTL_MASK (0xFF000000)
#define FCP_TARGET_RCTL_SHIFT (24)
#define FCP_TARGET_SID_MASK (0x00FFFFFF)
#define FCP_TARGET_SID_SHIFT (0)
#define FCP_TARGET_CSCTL_MASK (0xFF000000)
#define FCP_TARGET_CSCTL_SHIFT (24)
#define FCP_TARGET_FCTL_MASK (0x00FFFFFF)
#define FCP_TARGET_FCTL_SHIFT (0)
#define FCP_TARGET_TYPE_MASK (0xFF000000)
#define FCP_TARGET_TYPE_SHIFT (24)
typedef struct _MSG_LINK_SERVICE_RSP_REQUEST
{
U8 RspFlags;
U8 RspLength;
U8 ChainOffset;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U32 Rctl_Did;
U32 Csctl_Sid;
U32 Type_Fctl;
U16 SeqCnt;
U8 Dfctl;
U8 SeqId;
U16 Rxid;
U16 Oxid;
U32 Parameter;
SGE_SIMPLE_UNION SGL;
} MSG_LINK_SERVICE_RSP_REQUEST, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REQUEST,
LinkServiceRspRequest_t, MPI_POINTER pLinkServiceRspRequest_t;
#define LINK_SERVICE_RSP_FLAGS_IMMEDIATE (0x80)
#define LINK_SERVICE_RSP_FLAGS_PORT_MASK (0x01)
typedef struct _MSG_LINK_SERVICE_RSP_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved1;
U8 Reserved_0100_InitiatorIndex;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
U32 InitiatorIndex;
} MSG_LINK_SERVICE_RSP_REPLY, MPI_POINTER PTR_MSG_LINK_SERVICE_RSP_REPLY,
LinkServiceRspReply_t, MPI_POINTER pLinkServiceRspReply_t;
typedef struct _MSG_EXLINK_SERVICE_SEND_REQUEST
{
U8 SendFlags;
U8 Reserved;
U8 ChainOffset;
U8 Function;
U32 MsgFlags_Did;
U32 MsgContext;
U32 ElsCommandCode;
SGE_SIMPLE_UNION SGL;
} MSG_EXLINK_SERVICE_SEND_REQUEST, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REQUEST,
ExLinkServiceSendRequest_t, MPI_POINTER pExLinkServiceSendRequest_t;
#define EX_LINK_SERVICE_SEND_DID_MASK (0x00FFFFFF)
#define EX_LINK_SERVICE_SEND_DID_SHIFT (0)
#define EX_LINK_SERVICE_SEND_MSGFLAGS_MASK (0xFF000000)
#define EX_LINK_SERVICE_SEND_MSGFLAGS_SHIFT (24)
typedef struct _MSG_EXLINK_SERVICE_SEND_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
U32 ResponseLength;
} MSG_EXLINK_SERVICE_SEND_REPLY, MPI_POINTER PTR_MSG_EXLINK_SERVICE_SEND_REPLY,
ExLinkServiceSendReply_t, MPI_POINTER pExLinkServiceSendReply_t;
typedef struct _MSG_FC_ABORT_REQUEST
{
U8 AbortFlags;
U8 AbortType;
U8 ChainOffset;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U32 TransactionContextToAbort;
} MSG_FC_ABORT_REQUEST, MPI_POINTER PTR_MSG_FC_ABORT_REQUEST,
FcAbortRequest_t, MPI_POINTER pFcAbortRequest_t;
#define FC_ABORT_FLAG_PORT_MASK (0x01)
#define FC_ABORT_TYPE_ALL_FC_BUFFERS (0x00)
#define FC_ABORT_TYPE_EXACT_FC_BUFFER (0x01)
#define FC_ABORT_TYPE_CT_SEND_REQUEST (0x02)
#define FC_ABORT_TYPE_EXLINKSEND_REQUEST (0x03)
typedef struct _MSG_FC_ABORT_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
} MSG_FC_ABORT_REPLY, MPI_POINTER PTR_MSG_FC_ABORT_REPLY,
FcAbortReply_t, MPI_POINTER pFcAbortReply_t;
typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REQUEST
{
U8 SendFlags;
U8 Reserved;
U8 ChainOffset;
U8 Function;
U32 MsgFlags_Did;
U32 MsgContext;
U16 CTCommandCode;
U8 FsType;
U8 Reserved1;
SGE_SIMPLE_UNION SGL;
} MSG_FC_COMMON_TRANSPORT_SEND_REQUEST,
MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REQUEST,
FcCommonTransportSendRequest_t, MPI_POINTER pFcCommonTransportSendRequest_t;
#define MPI_FC_CT_SEND_DID_MASK (0x00FFFFFF)
#define MPI_FC_CT_SEND_DID_SHIFT (0)
#define MPI_FC_CT_SEND_MSGFLAGS_MASK (0xFF000000)
#define MPI_FC_CT_SEND_MSGFLAGS_SHIFT (24)
typedef struct _MSG_FC_COMMON_TRANSPORT_SEND_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
U32 ResponseLength;
} MSG_FC_COMMON_TRANSPORT_SEND_REPLY, MPI_POINTER PTR_MSG_FC_COMMON_TRANSPORT_SEND_REPLY,
FcCommonTransportSendReply_t, MPI_POINTER pFcCommonTransportSendReply_t;
typedef struct _MSG_FC_PRIMITIVE_SEND_REQUEST
{
U8 SendFlags;
U8 Reserved;
U8 ChainOffset;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U8 FcPrimitive[4];
} MSG_FC_PRIMITIVE_SEND_REQUEST, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REQUEST,
FcPrimitiveSendRequest_t, MPI_POINTER pFcPrimitiveSendRequest_t;
#define MPI_FC_PRIM_SEND_FLAGS_PORT_MASK (0x01)
#define MPI_FC_PRIM_SEND_FLAGS_RESET_LINK (0x04)
#define MPI_FC_PRIM_SEND_FLAGS_STOP_SEND (0x08)
#define MPI_FC_PRIM_SEND_FLAGS_SEND_ONCE (0x10)
#define MPI_FC_PRIM_SEND_FLAGS_SEND_AROUND (0x20)
#define MPI_FC_PRIM_SEND_FLAGS_UNTIL_FULL (0x40)
#define MPI_FC_PRIM_SEND_FLAGS_FOREVER (0x80)
typedef struct _MSG_FC_PRIMITIVE_SEND_REPLY
{
U8 SendFlags;
U8 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
} MSG_FC_PRIMITIVE_SEND_REPLY, MPI_POINTER PTR_MSG_FC_PRIMITIVE_SEND_REPLY,
FcPrimitiveSendReply_t, MPI_POINTER pFcPrimitiveSendReply_t;
#endif
#ifndef MPI_INIT_H
#define MPI_INIT_H
typedef struct _MSG_SCSI_IO_REQUEST
{
U8 TargetID;
U8 Bus;
U8 ChainOffset;
U8 Function;
U8 CDBLength;
U8 SenseBufferLength;
U8 Reserved;
U8 MsgFlags;
U32 MsgContext;
U8 LUN[8];
U32 Control;
U8 CDB[16];
U32 DataLength;
U32 SenseBufferLowAddr;
SGE_IO_UNION SGL;
} MSG_SCSI_IO_REQUEST, MPI_POINTER PTR_MSG_SCSI_IO_REQUEST,
SCSIIORequest_t, MPI_POINTER pSCSIIORequest_t;
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH (0x01)
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_32 (0x00)
#define MPI_SCSIIO_MSGFLGS_SENSE_WIDTH_64 (0x01)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOCATION (0x02)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_HOST (0x00)
#define MPI_SCSIIO_MSGFLGS_SENSE_LOC_IOC (0x02)
#define MPI_SCSIIO_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI_SCSIIO_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI_SCSIIO_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
#define MPI_SCSIIO_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
#define MPI_SCSIIO_LUN_LEVEL_1_WORD (0xFF00)
#define MPI_SCSIIO_LUN_LEVEL_1_DWORD (0x0000FF00)
#define MPI_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
#define MPI_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
#define MPI_SCSIIO_CONTROL_WRITE (0x01000000)
#define MPI_SCSIIO_CONTROL_READ (0x02000000)
#define MPI_SCSIIO_CONTROL_ADDCDBLEN_MASK (0x3C000000)
#define MPI_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
#define MPI_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
#define MPI_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
#define MPI_SCSIIO_CONTROL_HEADOFQ (0x00000100)
#define MPI_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
#define MPI_SCSIIO_CONTROL_ACAQ (0x00000400)
#define MPI_SCSIIO_CONTROL_UNTAGGED (0x00000500)
#define MPI_SCSIIO_CONTROL_NO_DISCONNECT (0x00000700)
#define MPI_SCSIIO_CONTROL_TASKMANAGE_MASK (0x00FF0000)
#define MPI_SCSIIO_CONTROL_OBSOLETE (0x00800000)
#define MPI_SCSIIO_CONTROL_CLEAR_ACA_RSV (0x00400000)
#define MPI_SCSIIO_CONTROL_TARGET_RESET (0x00200000)
#define MPI_SCSIIO_CONTROL_LUN_RESET_RSV (0x00100000)
#define MPI_SCSIIO_CONTROL_RESERVED (0x00080000)
#define MPI_SCSIIO_CONTROL_CLR_TASK_SET_RSV (0x00040000)
#define MPI_SCSIIO_CONTROL_ABORT_TASK_SET (0x00020000)
#define MPI_SCSIIO_CONTROL_RESERVED2 (0x00010000)
typedef struct _MSG_SCSI_IO_REPLY
{
U8 TargetID;
U8 Bus;
U8 MsgLength;
U8 Function;
U8 CDBLength;
U8 SenseBufferLength;
U8 Reserved;
U8 MsgFlags;
U32 MsgContext;
U8 SCSIStatus;
U8 SCSIState;
U16 IOCStatus;
U32 IOCLogInfo;
U32 TransferCount;
U32 SenseCount;
U32 ResponseInfo;
} MSG_SCSI_IO_REPLY, MPI_POINTER PTR_MSG_SCSI_IO_REPLY,
SCSIIOReply_t, MPI_POINTER pSCSIIOReply_t;
#define MPI_SCSI_STATUS_SUCCESS (0x00)
#define MPI_SCSI_STATUS_CHECK_CONDITION (0x02)
#define MPI_SCSI_STATUS_CONDITION_MET (0x04)
#define MPI_SCSI_STATUS_BUSY (0x08)
#define MPI_SCSI_STATUS_INTERMEDIATE (0x10)
#define MPI_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
#define MPI_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
#define MPI_SCSI_STATUS_COMMAND_TERMINATED (0x22)
#define MPI_SCSI_STATUS_TASK_SET_FULL (0x28)
#define MPI_SCSI_STATUS_ACA_ACTIVE (0x30)
#define MPI_SCSI_STATE_AUTOSENSE_VALID (0x01)
#define MPI_SCSI_STATE_AUTOSENSE_FAILED (0x02)
#define MPI_SCSI_STATE_NO_SCSI_STATUS (0x04)
#define MPI_SCSI_STATE_TERMINATED (0x08)
#define MPI_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
#define MPI_SCSI_STATE_QUEUE_TAG_REJECTED (0x20)
#define MPI_SCSI_RSP_INFO_FUNCTION_COMPLETE (0x00000000)
#define MPI_SCSI_RSP_INFO_FCP_BURST_LEN_ERROR (0x01000000)
#define MPI_SCSI_RSP_INFO_CMND_FIELDS_INVALID (0x02000000)
#define MPI_SCSI_RSP_INFO_FCP_DATA_RO_ERROR (0x03000000)
#define MPI_SCSI_RSP_INFO_TASK_MGMT_UNSUPPORTED (0x04000000)
#define MPI_SCSI_RSP_INFO_TASK_MGMT_FAILED (0x05000000)
#define MPI_SCSI_RSP_INFO_SPI_LQ_INVALID_TYPE (0x06000000)
typedef struct _MSG_SCSI_TASK_MGMT
{
U8 TargetID;
U8 Bus;
U8 ChainOffset;
U8 Function;
U8 Reserved;
U8 TaskType;
U8 Reserved1;
U8 MsgFlags;
U32 MsgContext;
U8 LUN[8];
U32 Reserved2[7];
U32 TaskMsgContext;
} MSG_SCSI_TASK_MGMT, MPI_POINTER PTR_SCSI_TASK_MGMT,
SCSITaskMgmt_t, MPI_POINTER pSCSITaskMgmt_t;
#define MPI_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
#define MPI_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
#define MPI_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
#define MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS (0x04)
#define MPI_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
#define MPI_SCSITASKMGMT_MSGFLAGS_TARGET_RESET_OPTION (0x00)
#define MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION (0x02)
#define MPI_SCSITASKMGMT_MSGFLAGS_LIPRESET_RESET_OPTION (0x04)
typedef struct _MSG_SCSI_TASK_MGMT_REPLY
{
U8 TargetID;
U8 Bus;
U8 MsgLength;
U8 Function;
U8 Reserved;
U8 TaskType;
U8 Reserved1;
U8 MsgFlags;
U32 MsgContext;
U8 Reserved2[2];
U16 IOCStatus;
U32 IOCLogInfo;
U32 TerminationCount;
} MSG_SCSI_TASK_MGMT_REPLY, MPI_POINTER PTR_MSG_SCSI_TASK_MGMT_REPLY,
SCSITaskMgmtReply_t, MPI_POINTER pSCSITaskMgmtReply_t;
typedef struct _MSG_SEP_REQUEST
{
U8 TargetID;
U8 Bus;
U8 ChainOffset;
U8 Function;
U8 Action;
U8 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U32 SlotStatus;
} MSG_SEP_REQUEST, MPI_POINTER PTR_MSG_SEP_REQUEST,
SEPRequest_t, MPI_POINTER pSEPRequest_t;
#define MPI_SEP_REQ_ACTION_WRITE_STATUS (0x00)
#define MPI_SEP_REQ_ACTION_READ_STATUS (0x01)
#define MPI_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI_SEP_REQ_SLOTSTATUS_PARITY_CHECK (0x00000020)
#define MPI_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
#define MPI_SEP_REQ_SLOTSTATUS_REQUEST_INSERT (0x00080000)
#define MPI_SEP_REQ_SLOTSTATUS_DO_NOT_MOVE (0x00400000)
#define MPI_SEP_REQ_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
#define MPI_SEP_REQ_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
#define MPI_SEP_REQ_SLOTSTATUS_DEV_OFF (0x10000000)
#define MPI_SEP_REQ_SLOTSTATUS_SWAP_RESET (0x80000000)
typedef struct _MSG_SEP_REPLY
{
U8 TargetID;
U8 Bus;
U8 MsgLength;
U8 Function;
U8 Action;
U8 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
U32 SlotStatus;
} MSG_SEP_REPLY, MPI_POINTER PTR_MSG_SEP_REPLY,
SEPReply_t, MPI_POINTER pSEPReply_t;
#define MPI_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI_SEP_REPLY_SLOTSTATUS_PARITY_CHECK (0x00000020)
#define MPI_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI_SEP_REPLY_SLOTSTATUS_REPORT (0x00010000)
#define MPI_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
#define MPI_SEP_REPLY_SLOTSTATUS_INSERT_READY (0x00080000)
#define MPI_SEP_REPLY_SLOTSTATUS_DO_NOT_REMOVE (0x00400000)
#define MPI_SEP_REPLY_SLOTSTATUS_B_BYPASS_ENABLED (0x01000000)
#define MPI_SEP_REPLY_SLOTSTATUS_A_BYPASS_ENABLED (0x02000000)
#define MPI_SEP_REPLY_SLOTSTATUS_B_ENABLE_BYPASS (0x04000000)
#define MPI_SEP_REPLY_SLOTSTATUS_A_ENABLE_BYPASS (0x08000000)
#define MPI_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x10000000)
#define MPI_SEP_REPLY_SLOTSTATUS_FAULT_SENSED (0x40000000)
#define MPI_SEP_REPLY_SLOTSTATUS_SWAPPED (0x80000000)
#endif
#ifndef MPI_IOC_H
#define MPI_IOC_H
typedef struct _MSG_IOC_INIT
{
U8 WhoInit;
U8 Reserved;
U8 ChainOffset;
U8 Function;
U8 Flags;
U8 MaxDevices;
U8 MaxBuses;
U8 MsgFlags;
U32 MsgContext;
U16 ReplyFrameSize;
U8 Reserved1[2];
U32 HostMfaHighAddr;
U32 SenseBufferHighAddr;
} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
IOCInit_t, MPI_POINTER pIOCInit_t;
#define MPI_WHOINIT_NO_ONE (0x00)
#define MPI_WHOINIT_SYSTEM_BIOS (0x01)
#define MPI_WHOINIT_ROM_BIOS (0x02)
#define MPI_WHOINIT_PCI_PEER (0x03)
#define MPI_WHOINIT_HOST_DRIVER (0x04)
#define MPI_WHOINIT_MANUFACTURER (0x05)
#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
typedef struct _MSG_IOC_INIT_REPLY
{
U8 WhoInit;
U8 Reserved;
U8 MsgLength;
U8 Function;
U8 Flags;
U8 MaxDevices;
U8 MaxBuses;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved2;
U16 IOCStatus;
U32 IOCLogInfo;
} MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
typedef struct _MSG_IOC_FACTS
{
U8 Reserved[2];
U8 ChainOffset;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
} MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
IOCFacts_t, MPI_POINTER pIOCFacts_t;
typedef struct _MPI_FW_VERSION_STRUCT
{
U8 Dev;
U8 Unit;
U8 Minor;
U8 Major;
} MPI_FW_VERSION_STRUCT;
typedef union _MPI_FW_VERSION
{
MPI_FW_VERSION_STRUCT Struct;
U32 Word;
} MPI_FW_VERSION;
typedef struct _MSG_IOC_FACTS_REPLY
{
U16 MsgVersion;
U8 MsgLength;
U8 Function;
U16 Reserved;
U8 IOCNumber;
U8 MsgFlags;
U32 MsgContext;
U16 IOCExceptions;
U16 IOCStatus;
U32 IOCLogInfo;
U8 MaxChainDepth;
U8 WhoInit;
U8 BlockSize;
U8 Flags;
U16 ReplyQueueDepth;
U16 RequestFrameSize;
U16 Reserved_0101_FWVersion;
U16 ProductID;
U32 CurrentHostMfaHighAddr;
U16 GlobalCredits;
U8 NumberOfPorts;
U8 EventState;
U32 CurrentSenseBufferHighAddr;
U16 CurReplyFrameSize;
U8 MaxDevices;
U8 MaxBuses;
U32 FWImageSize;
U32 Reserved4;
MPI_FW_VERSION FWVersion;
} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
typedef struct _MSG_PORT_FACTS
{
U8 Reserved[2];
U8 ChainOffset;
U8 Function;
U8 Reserved1[2];
U8 PortNumber;
U8 MsgFlags;
U32 MsgContext;
} MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
PortFacts_t, MPI_POINTER pPortFacts_t;
typedef struct _MSG_PORT_FACTS_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved1;
U8 PortNumber;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved2;
U16 IOCStatus;
U32 IOCLogInfo;
U8 Reserved3;
U8 PortType;
U16 MaxDevices;
U16 PortSCSIID;
U16 ProtocolFlags;
U16 MaxPostedCmdBuffers;
U16 MaxPersistentIDs;
U16 MaxLanBuckets;
U16 Reserved4;
U32 Reserved5;
} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
#define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
#define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
#define MPI_PORTFACTS_PORTTYPE_FC (0x10)
#define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
#define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
#define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
#define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
#define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
#define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
typedef struct _MSG_PORT_ENABLE
{
U8 Reserved[2];
U8 ChainOffset;
U8 Function;
U8 Reserved1[2];
U8 PortNumber;
U8 MsgFlags;
U32 MsgContext;
} MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
PortEnable_t, MPI_POINTER pPortEnable_t;
typedef struct _MSG_PORT_ENABLE_REPLY
{
U8 Reserved[2];
U8 MsgLength;
U8 Function;
U8 Reserved1[2];
U8 PortNumber;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved2;
U16 IOCStatus;
U32 IOCLogInfo;
} MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
typedef struct _MSG_EVENT_NOTIFY
{
U8 Switch;
U8 Reserved;
U8 ChainOffset;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
} MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
EventNotification_t, MPI_POINTER pEventNotification_t;
typedef struct _MSG_EVENT_NOTIFY_REPLY
{
U16 EventDataLength;
U8 MsgLength;
U8 Function;
U8 Reserved1[2];
U8 AckRequired;
U8 MsgFlags;
U32 MsgContext;
U8 Reserved2[2];
U16 IOCStatus;
U32 IOCLogInfo;
U32 Event;
U32 EventContext;
U32 Data[1];
} MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
typedef struct _MSG_EVENT_ACK
{
U8 Reserved[2];
U8 ChainOffset;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
U32 Event;
U32 EventContext;
} MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
EventAck_t, MPI_POINTER pEventAck_t;
typedef struct _MSG_EVENT_ACK_REPLY
{
U8 Reserved[2];
U8 MsgLength;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
U16 Reserved2;
U16 IOCStatus;
U32 IOCLogInfo;
} MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
EventAckReply_t, MPI_POINTER pEventAckReply_t;
#define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
#define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
#define MPI_EVENT_NONE (0x00000000)
#define MPI_EVENT_LOG_DATA (0x00000001)
#define MPI_EVENT_STATE_CHANGE (0x00000002)
#define MPI_EVENT_UNIT_ATTENTION (0x00000003)
#define MPI_EVENT_IOC_BUS_RESET (0x00000004)
#define MPI_EVENT_EXT_BUS_RESET (0x00000005)
#define MPI_EVENT_RESCAN (0x00000006)
#define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
#define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
#define MPI_EVENT_LOGOUT (0x00000009)
#define MPI_EVENT_EVENT_CHANGE (0x0000000A)
#define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
#define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
#define MPI_EVENT_QUEUE_FULL (0x0000000E)
#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
#define MPI_EVENT_SAS_SES (0x00000010)
#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
#define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
#define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
#define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014)
#define MPI_EVENT_IR2 (0x00000015)
#define MPI_EVENT_SAS_DISCOVERY (0x00000016)
#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
typedef struct _EVENT_DATA_EVENT_CHANGE
{
U8 EventState;
U8 Reserved;
U16 Reserved1;
} EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
typedef struct _EVENT_DATA_SCSI
{
U8 TargetID;
U8 BusPort;
U16 Reserved;
} EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
{
U8 TargetID;
U8 Bus;
U8 ReasonCode;
U8 LUN;
U8 ASC;
U8 ASCQ;
U16 Reserved;
} EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
MpiEventDataScsiDeviceStatusChange_t,
MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
#define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
#define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
#define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
typedef struct _EVENT_DATA_LINK_STATUS
{
U8 State;
U8 Reserved;
U16 Reserved1;
U8 Reserved2;
U8 Port;
U16 Reserved3;
} EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
#define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
#define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
typedef struct _EVENT_DATA_LOOP_STATE
{
U8 Character4;
U8 Character3;
U8 Type;
U8 Reserved;
U8 Reserved1;
U8 Port;
U16 Reserved2;
} EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
#define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
#define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
#define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
typedef struct _EVENT_DATA_LOGOUT
{
U32 NPortID;
U8 Reserved;
U8 Port;
U16 Reserved1;
} EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
typedef struct _EVENT_DATA_RAID
{
U8 VolumeID;
U8 VolumeBus;
U8 ReasonCode;
U8 PhysDiskNum;
U8 ASC;
U8 ASCQ;
U16 Reserved;
U32 SettingsStatus;
} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
{
U8 PhyNum;
U8 LinkRates;
U16 DevHandle;
U64 SASAddress;
} EVENT_DATA_SAS_PHY_LINK_STATUS,
MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
EventDataSASPhyLinkStatus_t, MPI_POINTER pEventDataSASPhyLinkStatus_t;
#define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
#define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
#define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
#define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
#define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEG (0x02)
#define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
#define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
#define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
typedef struct _MSG_FW_DOWNLOAD
{
U8 ImageType;
U8 Reserved;
U8 ChainOffset;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
SGE_MPI_UNION SGL;
} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
FWDownload_t, MPI_POINTER pFWDownload_t;
#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
typedef struct _FWDownloadTCSGE
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 Reserved_0100_Checksum;
U32 ImageOffset;
U32 ImageSize;
} FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
typedef struct _MSG_FW_DOWNLOAD_REPLY
{
U8 ImageType;
U8 Reserved;
U8 MsgLength;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
U16 Reserved2;
U16 IOCStatus;
U32 IOCLogInfo;
} MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
typedef struct _MSG_FW_UPLOAD
{
U8 ImageType;
U8 Reserved;
U8 ChainOffset;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
SGE_MPI_UNION SGL;
} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
FWUpload_t, MPI_POINTER pFWUpload_t;
#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
#define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
typedef struct _FWUploadTCSGE
{
U8 Reserved;
U8 ContextSize;
U8 DetailsLength;
U8 Flags;
U32 Reserved1;
U32 ImageOffset;
U32 ImageSize;
} FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
typedef struct _MSG_FW_UPLOAD_REPLY
{
U8 ImageType;
U8 Reserved;
U8 MsgLength;
U8 Function;
U8 Reserved1[3];
U8 MsgFlags;
U32 MsgContext;
U16 Reserved2;
U16 IOCStatus;
U32 IOCLogInfo;
U32 ActualImageSize;
} MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
typedef struct _MPI_FW_HEADER
{
U32 ArmBranchInstruction0;
U32 Signature0;
U32 Signature1;
U32 Signature2;
U32 ArmBranchInstruction1;
U32 ArmBranchInstruction2;
U32 Reserved;
U32 Checksum;
U16 VendorId;
U16 ProductId;
MPI_FW_VERSION FWVersion;
U32 SeqCodeVersion;
U32 ImageSize;
U32 NextImageHeaderOffset;
U32 LoadStartAddress;
U32 IopResetVectorValue;
U32 IopResetRegAddr;
U32 VersionNameWhat;
U8 VersionName[32];
U32 VendorNameWhat;
U8 VendorName[32];
} MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
#define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
#define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
#define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
#define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
#define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
#define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
#define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
#define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
#define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
#define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
#define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
#define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
#define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
#define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
#define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
#define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
#define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
#define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
#define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
#define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
#define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
#define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
#define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001)
#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002)
typedef struct _MPI_EXT_IMAGE_HEADER
{
U8 ImageType;
U8 Reserved;
U16 Reserved1;
U32 Checksum;
U32 ImageSize;
U32 NextImageHeaderOffset;
U32 LoadStartAddress;
U32 Reserved2;
} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
#define MPI_EXT_IMAGE_TYPE_FW (0x01)
#define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
#endif
#ifndef MPI_LAN_H
#define MPI_LAN_H
typedef struct _MSG_LAN_SEND_REQUEST
{
U16 Reserved;
U8 ChainOffset;
U8 Function;
U16 Reserved2;
U8 PortNumber;
U8 MsgFlags;
U32 MsgContext;
SGE_MPI_UNION SG_List[1];
} MSG_LAN_SEND_REQUEST, MPI_POINTER PTR_MSG_LAN_SEND_REQUEST,
LANSendRequest_t, MPI_POINTER pLANSendRequest_t;
typedef struct _MSG_LAN_SEND_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U8 Reserved2;
U8 NumberOfContexts;
U8 PortNumber;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
U32 BufferContext;
} MSG_LAN_SEND_REPLY, MPI_POINTER PTR_MSG_LAN_SEND_REPLY,
LANSendReply_t, MPI_POINTER pLANSendReply_t;
typedef struct _MSG_LAN_RECEIVE_POST_REQUEST
{
U16 Reserved;
U8 ChainOffset;
U8 Function;
U16 Reserved2;
U8 PortNumber;
U8 MsgFlags;
U32 MsgContext;
U32 BucketCount;
SGE_MPI_UNION SG_List[1];
} MSG_LAN_RECEIVE_POST_REQUEST, MPI_POINTER PTR_MSG_LAN_RECEIVE_POST_REQUEST,
LANReceivePostRequest_t, MPI_POINTER pLANReceivePostRequest_t;
typedef struct _MSG_LAN_RECEIVE_POST_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U8 Reserved2;
U8 NumberOfContexts;
U8 PortNumber;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
U32 BucketsRemaining;
U32 PacketOffset;
U32 PacketLength;
U32 BucketContext[1];
} MSG_LAN_RECEIVE_POST_REPLY, MPI_POINTER PTR_MSG_LAN_RECEIVE_POST_REPLY,
LANReceivePostReply_t, MPI_POINTER pLANReceivePostReply_t;
typedef struct _MSG_LAN_RESET_REQUEST
{
U16 Reserved;
U8 ChainOffset;
U8 Function;
U16 Reserved2;
U8 PortNumber;
U8 MsgFlags;
U32 MsgContext;
} MSG_LAN_RESET_REQUEST, MPI_POINTER PTR_MSG_LAN_RESET_REQUEST,
LANResetRequest_t, MPI_POINTER pLANResetRequest_t;
typedef struct _MSG_LAN_RESET_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved2;
U8 PortNumber;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
} MSG_LAN_RESET_REPLY, MPI_POINTER PTR_MSG_LAN_RESET_REPLY,
LANResetReply_t, MPI_POINTER pLANResetReply_t;
#define LAN_REPLY_PACKET_LENGTH_MASK (0x0000FFFF)
#define LAN_REPLY_PACKET_LENGTH_SHIFT (0)
#define LAN_REPLY_BUCKET_CONTEXT_MASK (0x07FF0000)
#define LAN_REPLY_BUCKET_CONTEXT_SHIFT (16)
#define LAN_REPLY_BUFFER_CONTEXT_MASK (0x07FFFFFF)
#define LAN_REPLY_BUFFER_CONTEXT_SHIFT (0)
#define LAN_REPLY_FORM_MASK (0x18000000)
#define LAN_REPLY_FORM_RECEIVE_SINGLE (0x00)
#define LAN_REPLY_FORM_RECEIVE_MULTIPLE (0x01)
#define LAN_REPLY_FORM_SEND_SINGLE (0x02)
#define LAN_REPLY_FORM_MESSAGE_CONTEXT (0x03)
#define LAN_REPLY_FORM_SHIFT (27)
#define GET_LAN_PACKET_LENGTH(x) (((x) & LAN_REPLY_PACKET_LENGTH_MASK) \
>> LAN_REPLY_PACKET_LENGTH_SHIFT)
#define SET_LAN_PACKET_LENGTH(x, lth) \
((x) = ((x) & ~LAN_REPLY_PACKET_LENGTH_MASK) | \
(((lth) << LAN_REPLY_PACKET_LENGTH_SHIFT) & \
LAN_REPLY_PACKET_LENGTH_MASK))
#define GET_LAN_BUCKET_CONTEXT(x) (((x) & LAN_REPLY_BUCKET_CONTEXT_MASK) \
>> LAN_REPLY_BUCKET_CONTEXT_SHIFT)
#define SET_LAN_BUCKET_CONTEXT(x, ctx) \
((x) = ((x) & ~LAN_REPLY_BUCKET_CONTEXT_MASK) | \
(((ctx) << LAN_REPLY_BUCKET_CONTEXT_SHIFT) & \
LAN_REPLY_BUCKET_CONTEXT_MASK))
#define GET_LAN_BUFFER_CONTEXT(x) (((x) & LAN_REPLY_BUFFER_CONTEXT_MASK) \
>> LAN_REPLY_BUFFER_CONTEXT_SHIFT)
#define SET_LAN_BUFFER_CONTEXT(x, ctx) \
((x) = ((x) & ~LAN_REPLY_BUFFER_CONTEXT_MASK) | \
(((ctx) << LAN_REPLY_BUFFER_CONTEXT_SHIFT) & \
LAN_REPLY_BUFFER_CONTEXT_MASK))
#define GET_LAN_FORM(x) (((x) & LAN_REPLY_FORM_MASK) \
>> LAN_REPLY_FORM_SHIFT)
#define SET_LAN_FORM(x, frm) \
((x) = ((x) & ~LAN_REPLY_FORM_MASK) | \
(((frm) << LAN_REPLY_FORM_SHIFT) & \
LAN_REPLY_FORM_MASK))
#define MPI_LAN_DEVICE_STATE_RESET (0x00)
#define MPI_LAN_DEVICE_STATE_OPERATIONAL (0x01)
#define MPI_LAN_TX_MODES_ENABLE_LOOPBACK_SUPPRESSION (0x01)
#endif
#ifndef MPI_TARG_H
#define MPI_TARG_H
typedef struct _CMD_BUFFER_DESCRIPTOR
{
U16 IoIndex;
U16 Reserved;
union
{
U32 PhysicalAddress32;
U64 PhysicalAddress64;
} _u;
} CMD_BUFFER_DESCRIPTOR, MPI_POINTER PTR_CMD_BUFFER_DESCRIPTOR,
CmdBufferDescriptor_t, MPI_POINTER pCmdBufferDescriptor_t;
typedef struct _MSG_TARGET_CMD_BUFFER_POST_REQUEST
{
U8 BufferPostFlags;
U8 BufferCount;
U8 ChainOffset;
U8 Function;
U8 BufferLength;
U8 Reserved;
U8 Reserved1;
U8 MsgFlags;
U32 MsgContext;
CMD_BUFFER_DESCRIPTOR Buffer[1];
} MSG_TARGET_CMD_BUFFER_POST_REQUEST, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REQUEST,
TargetCmdBufferPostRequest_t, MPI_POINTER pTargetCmdBufferPostRequest_t;
#define CMD_BUFFER_POST_FLAGS_PORT_MASK (0x01)
#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_MASK (0x80)
#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_32 (0)
#define CMD_BUFFER_POST_FLAGS_ADDR_MODE_64 (1)
#define CMD_BUFFER_POST_FLAGS_64_BIT_ADDR (0x80)
#define CMD_BUFFER_POST_IO_INDEX_MASK (0x00003FFF)
#define CMD_BUFFER_POST_IO_INDEX_MASK_0100 (0x000003FF)
typedef struct _MSG_TARGET_CMD_BUFFER_POST_REPLY
{
U8 BufferPostFlags;
U8 BufferCount;
U8 MsgLength;
U8 Function;
U8 BufferLength;
U8 Reserved;
U8 Reserved1;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved2;
U16 IOCStatus;
U32 IOCLogInfo;
} MSG_TARGET_CMD_BUFFER_POST_REPLY, MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_REPLY,
TargetCmdBufferPostReply_t, MPI_POINTER pTargetCmdBufferPostReply_t;
typedef struct _MSG_PRIORITY_CMD_RECEIVED_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U8 PriorityReason;
U8 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
U32 ReplyWord;
} MSG_PRIORITY_CMD_RECEIVED_REPLY, MPI_POINTER PTR_MSG_PRIORITY_CMD_RECEIVED_REPLY,
PriorityCommandReceivedReply_t, MPI_POINTER pPriorityCommandReceivedReply_t;
#define PRIORITY_REASON_NO_DISCONNECT (0x00)
#define PRIORITY_REASON_SCSI_TASK_MANAGEMENT (0x01)
#define PRIORITY_REASON_CMD_PARITY_ERR (0x02)
#define PRIORITY_REASON_MSG_OUT_PARITY_ERR (0x03)
#define PRIORITY_REASON_LQ_CRC_ERR (0x04)
#define PRIORITY_REASON_CMD_CRC_ERR (0x05)
#define PRIORITY_REASON_PROTOCOL_ERR (0x06)
#define PRIORITY_REASON_DATA_OUT_PARITY_ERR (0x07)
#define PRIORITY_REASON_DATA_OUT_CRC_ERR (0x08)
#define PRIORITY_REASON_UNKNOWN (0xFF)
typedef struct _MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U8 PriorityReason;
U8 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
U32 ReplyWord;
} MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
MPI_POINTER PTR_MSG_TARGET_CMD_BUFFER_POST_ERROR_REPLY,
TargetCmdBufferPostErrorReply_t, MPI_POINTER pTargetCmdBufferPostErrorReply_t;
typedef struct _MPI_TARGET_FCP_CMD_BUFFER
{
U8 FcpLun[8];
U8 FcpCntl[4];
U8 FcpCdb[16];
U32 FcpDl;
} MPI_TARGET_FCP_CMD_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_CMD_BUFFER,
MpiTargetFcpCmdBuffer, MPI_POINTER pMpiTargetFcpCmdBuffer;
typedef struct _MPI_TARGET_SCSI_SPI_CMD_BUFFER
{
U8 L_QType;
U8 Reserved;
U16 Tag;
U8 LogicalUnitNumber[8];
U32 DataLength;
U8 ReservedFirstByteOfCommandIU;
U8 TaskAttribute;
U8 TaskManagementFlags;
U8 AdditionalCDBLength;
U8 CDB[16];
} MPI_TARGET_SCSI_SPI_CMD_BUFFER,
MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_CMD_BUFFER,
MpiTargetScsiSpiCmdBuffer, MPI_POINTER pMpiTargetScsiSpiCmdBuffer;
typedef struct _MSG_TARGET_ASSIST_REQUEST
{
U8 StatusCode;
U8 TargetAssistFlags;
U8 ChainOffset;
U8 Function;
U16 QueueTag;
U8 Reserved;
U8 MsgFlags;
U32 MsgContext;
U32 ReplyWord;
U8 LUN[8];
U32 RelativeOffset;
U32 DataLength;
SGE_IO_UNION SGL[1];
} MSG_TARGET_ASSIST_REQUEST, MPI_POINTER PTR_MSG_TARGET_ASSIST_REQUEST,
TargetAssistRequest_t, MPI_POINTER pTargetAssistRequest_t;
#define TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01)
#define TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02)
#define TARGET_ASSIST_FLAGS_HIGH_PRIORITY (0x04)
#define TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80)
typedef struct _MSG_TARGET_ERROR_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U8 PriorityReason;
U8 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
U32 ReplyWord;
U32 TransferCount;
} MSG_TARGET_ERROR_REPLY, MPI_POINTER PTR_MSG_TARGET_ERROR_REPLY,
TargetErrorReply_t, MPI_POINTER pTargetErrorReply_t;
typedef struct _MSG_TARGET_STATUS_SEND_REQUEST
{
U8 StatusCode;
U8 StatusFlags;
U8 ChainOffset;
U8 Function;
U16 QueueTag;
U8 Reserved;
U8 MsgFlags;
U32 MsgContext;
U32 ReplyWord;
U8 LUN[8];
SGE_SIMPLE_UNION StatusDataSGE;
} MSG_TARGET_STATUS_SEND_REQUEST, MPI_POINTER PTR_MSG_TARGET_STATUS_SEND_REQUEST,
TargetStatusSendRequest_t, MPI_POINTER pTargetStatusSendRequest_t;
#define TARGET_STATUS_SEND_FLAGS_AUTO_GOOD_STATUS (0x01)
#define TARGET_STATUS_SEND_FLAGS_HIGH_PRIORITY (0x04)
#define TARGET_STATUS_SEND_FLAGS_REPOST_CMD_BUFFER (0x80)
typedef struct _MPI_TARGET_FCP_RSP_BUFFER
{
U8 Reserved0[8];
U8 FcpStatus;
U8 FcpFlags;
U8 Reserved1[2];
U32 FcpResid;
U32 FcpSenseLength;
U32 FcpResponseLength;
U8 FcpResponseData[8];
U8 FcpSenseData[32];
} MPI_TARGET_FCP_RSP_BUFFER, MPI_POINTER PTR_MPI_TARGET_FCP_RSP_BUFFER,
MpiTargetFcpRspBuffer, MPI_POINTER pMpiTargetFcpRspBuffer;
typedef struct _MPI_TARGET_SCSI_SPI_STATUS_IU
{
U8 Reserved0;
U8 Reserved1;
U8 Valid;
U8 Status;
U32 SenseDataListLength;
U32 PktFailuresListLength;
U8 SenseData[52];
} MPI_TARGET_SCSI_SPI_STATUS_IU, MPI_POINTER PTR_MPI_TARGET_SCSI_SPI_STATUS_IU,
TargetScsiSpiStatusIU_t, MPI_POINTER pTargetScsiSpiStatusIU_t;
typedef struct _MSG_TARGET_MODE_ABORT_REQUEST
{
U8 AbortType;
U8 Reserved;
U8 ChainOffset;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U32 ReplyWord;
U32 MsgContextToAbort;
} MSG_TARGET_MODE_ABORT, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT,
TargetModeAbort_t, MPI_POINTER pTargetModeAbort_t;
#define TARGET_MODE_ABORT_TYPE_ALL_CMD_BUFFERS (0x00)
#define TARGET_MODE_ABORT_TYPE_ALL_IO (0x01)
#define TARGET_MODE_ABORT_TYPE_EXACT_IO (0x02)
#define TARGET_MODE_ABORT_TYPE_EXACT_IO_REQUEST (0x03)
typedef struct _MSG_TARGET_MODE_ABORT_REPLY
{
U16 Reserved;
U8 MsgLength;
U8 Function;
U16 Reserved1;
U8 Reserved2;
U8 MsgFlags;
U32 MsgContext;
U16 Reserved3;
U16 IOCStatus;
U32 IOCLogInfo;
U32 AbortCount;
} MSG_TARGET_MODE_ABORT_REPLY, MPI_POINTER PTR_MSG_TARGET_MODE_ABORT_REPLY,
TargetModeAbortReply_t, MPI_POINTER pTargetModeAbortReply_t;
#define TARGET_MODE_REPLY_IO_INDEX_MASK (0x00003FFF)
#define TARGET_MODE_REPLY_IO_INDEX_SHIFT (0)
#define TARGET_MODE_REPLY_INITIATOR_INDEX_MASK (0x03FFC000)
#define TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT (14)
#define TARGET_MODE_REPLY_ALIAS_MASK (0x0C000000)
#define TARGET_MODE_REPLY_ALIAS_SHIFT (26)
#define TARGET_MODE_REPLY_PORT_MASK (0x10000000)
#define TARGET_MODE_REPLY_PORT_SHIFT (28)
#define GET_IO_INDEX(x) (((x) & TARGET_MODE_REPLY_IO_INDEX_MASK) \
>> TARGET_MODE_REPLY_IO_INDEX_SHIFT)
#define SET_IO_INDEX(t, i) \
((t) = ((t) & ~TARGET_MODE_REPLY_IO_INDEX_MASK) | \
(((i) << TARGET_MODE_REPLY_IO_INDEX_SHIFT) & \
TARGET_MODE_REPLY_IO_INDEX_MASK))
#define GET_INITIATOR_INDEX(x) (((x) & TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) \
>> TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT)
#define SET_INITIATOR_INDEX(t, ii) \
((t) = ((t) & ~TARGET_MODE_REPLY_INITIATOR_INDEX_MASK) | \
(((ii) << TARGET_MODE_REPLY_INITIATOR_INDEX_SHIFT) & \
TARGET_MODE_REPLY_INITIATOR_INDEX_MASK))
#define GET_ALIAS(x) (((x) & TARGET_MODE_REPLY_ALIAS_MASK) \
>> TARGET_MODE_REPLY_ALIAS_SHIFT)
#define SET_ALIAS(t, a) ((t) = ((t) & ~TARGET_MODE_REPLY_ALIAS_MASK) | \
(((a) << TARGET_MODE_REPLY_ALIAS_SHIFT) & \
TARGET_MODE_REPLY_ALIAS_MASK))
#define GET_PORT(x) (((x) & TARGET_MODE_REPLY_PORT_MASK) \
>> TARGET_MODE_REPLY_PORT_SHIFT)
#define SET_PORT(t, p) ((t) = ((t) & ~TARGET_MODE_REPLY_PORT_MASK) | \
(((p) << TARGET_MODE_REPLY_PORT_SHIFT) & \
TARGET_MODE_REPLY_PORT_MASK))
#define TARGET_MODE_REPLY_0100_MASK_HOST_INDEX (0x000003FF)
#define TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX (0)
#define TARGET_MODE_REPLY_0100_MASK_IOC_INDEX (0x001FF800)
#define TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX (11)
#define TARGET_MODE_REPLY_0100_PORT_MASK (0x00400000)
#define TARGET_MODE_REPLY_0100_PORT_SHIFT (22)
#define TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX (0x1F800000)
#define TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX (23)
#define GET_HOST_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) \
>> TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX)
#define SET_HOST_INDEX_0100(t, hi) \
((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_HOST_INDEX) | \
(((hi) << TARGET_MODE_REPLY_0100_SHIFT_HOST_INDEX) & \
TARGET_MODE_REPLY_0100_MASK_HOST_INDEX))
#define GET_IOC_INDEX_0100(x) (((x) & TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) \
>> TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX)
#define SET_IOC_INDEX_0100(t, ii) \
((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_IOC_INDEX) | \
(((ii) << TARGET_MODE_REPLY_0100_SHIFT_IOC_INDEX) & \
TARGET_MODE_REPLY_0100_MASK_IOC_INDEX))
#define GET_INITIATOR_INDEX_0100(x) \
(((x) & TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) \
>> TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX)
#define SET_INITIATOR_INDEX_0100(t, ii) \
((t) = ((t) & ~TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX) | \
(((ii) << TARGET_MODE_REPLY_0100_SHIFT_INITIATOR_INDEX) & \
TARGET_MODE_REPLY_0100_MASK_INITIATOR_INDEX))
#endif
