MS
, MS(ac->acp_aci_aifsn, WME_PARAM_ACM) ? "acm " : ""
, MS(ac->acp_aci_aifsn, WME_PARAM_AIFSN)
, MS(ac->acp_logcwminmax, WME_PARAM_LOGCWMIN)
, MS(ac->acp_logcwminmax, WME_PARAM_LOGCWMAX)
failcnt = MS(ds->ds_status1, AR_TXS1_DATA_FAIL_CNT);
failcnt += MS(ds->ds_status9, AR_TXS9_FINAL_IDX) * 2;
mask |= MS(reg, AR_ISR_S0_QCU_TXOK);
mask |= MS(reg, AR_ISR_S0_QCU_TXDESC);
mask |= MS(reg, AR_ISR_S1_QCU_TXERR);
mask |= MS(reg, AR_ISR_S1_QCU_TXEOL);
MS(intr5, AR_ISR_S5_GENTIMER_TRIG),
MS(intr5, AR_ISR_S5_GENTIMER_THRESH));
synth_delay = MS(AR_READ(sc, AR_PHY_RX_DELAY), AR_PHY_RX_DELAY_DELAY);
nf[i] = MS(reg, AR9280_PHY_MINCCA_PWR);
nf[i] = MS(reg, AR_PHY_MINCCA_PWR);
nf_ext[i] = MS(reg, AR9280_PHY_EXT_MINCCA_PWR);
nf_ext[i] = MS(reg, AR_PHY_EXT_MINCCA_PWR);
sc->sc_rfsilent_pin = MS(base->rfSilent,
kc_entries_log = MS(base->deviceCap, AR_EEP_DEVCAP_KC_ENTRIES);
*val = MS(reg, AR_EEPROM_STATUS_DATA_VAL);
tap->wr_dbm_antsignal = MS(ds->ds_status4, AR_RXS4_RSSI_COMBINED);
tap->wr_antenna = MS(ds->ds_status3, AR_RXS3_ANTENNA);
rate = MS(ds->ds_status0, AR_RXS0_RATE);
rate = MS(ds->ds_status3, AR_RXS3_RATE);
MS(ds->ds_status8, AR_RXS8_PHY_ERR_CODE));
len = MS(ds->ds_status1, AR_RXS1_DATA_LEN);
len = MS(ds->ds_status1, AR_RXS1_DATA_LEN);
rssi = MS(ds->ds_status4, AR_RXS4_RSSI_COMBINED);
overlap = MS(AR_READ(sc, AR_PHY_TPCRG5),
rssi = MS(ds->ds_status5, AR_RXS5_RSSI_COMBINED);
qid = MS(ds->ds_info, AR_TXI_QCU_NUM);
failcnt = MS(ds->ds_status3, AR_TXS3_DATA_FAIL_CNT);
failcnt += MS(ds->ds_status8, AR_TXS8_FINAL_IDX) * 2;
MS(intr5, AR_ISR_S5_GENTIMER_TRIG),
MS(intr5, AR_ISR_S5_GENTIMER_THRESH));
synth_delay = MS(AR_READ(sc, AR_PHY_RX_DELAY), AR_PHY_RX_DELAY_DELAY);
nf[i] = MS(reg, AR_PHY_MINCCA_PWR);
nf_ext[i] = MS(reg, AR_PHY_EXT_MINCCA_PWR);
sc->sc_trainpow = MS(AR_READ(sc, AR_PHY_PWRTX_RATE5),
*val = MS(reg, AR_EEPROM_STATUS_DATA_VAL);
scale = MS(AR_READ(sc, AR_PHY_TPC_12),
atemp = MS(reg, AR_PHY_TPC_19_ALPHA_THERM);
avolt = MS(reg, AR_PHY_TPC_19_ALPHA_VOLT);
tempcal = MS(reg, AR_PHY_TPC_18_THERM_CAL);
voltcal = MS(reg, AR_PHY_TPC_18_VOLT_CAL);
temp = MS(reg, AR_PHY_BB_THERM_ADC_4_LATEST_THERM);
volt = MS(reg, AR_PHY_BB_THERM_ADC_4_LATEST_VOLT);
delta = (int8_t)MS(AR_READ(sc, AR_PHY_TPC_11_B(chain)),
MS(txgain, AR_PHY_TXGAIN_TXBB1DBGAIN));
MS(txgain, AR_PHY_TXGAIN_TXBB6DBGAIN));
MS(txgain, AR_PHY_TXGAIN_TXMXRGAIN));
MS(txgain, AR_PHY_TXGAIN_PADRVGNA));
MS(txgain, AR_PHY_TXGAIN_PADRVGNB));
MS(txgain, AR_PHY_TXGAIN_PADRVGNC));
MS(txgain, AR_PHY_TXGAIN_PADRVGND));
if ((int)MS(sc->sc_txgain[i], AR_PHY_TXGAIN_INDEX) >= gain)
if (MS(reg, AR_OTP_STATUS_TYPE) == AR_OTP_STATUS_VALID) {
tap->wr_dbm_antsignal = MS(ds->ds_status5, AR_RXS5_RSSI_COMBINED);
tap->wr_antenna = MS(ds->ds_status4, AR_RXS4_ANTENNA);
rate = MS(ds->ds_status1, AR_RXS1_RATE);
MS(ds->ds_status11, AR_RXS11_PHY_ERR_CODE));
len = MS(ds->ds_status2, AR_RXS2_DATA_LEN);
len = MS(ds->ds_status2, AR_RXS2_DATA_LEN);
MS(modal->miscBits, AR5416_EEP_MISC_TX_DAC_SCALE_CCK));
MS(modal->miscBits, AR5416_EEP_MISC_TX_CLIP));
sc->sc_tx_gain_tbl[i] = MS(reg, AR_PHY_TX_GAIN);
pdadc = MS(reg, AR_PHY_TX_PWRCTRL_PD_AVG_OUT);
ccomp_svg = MS(reg, AR9285_AN_RF2G6_CCOMP);
maxgain = MS(reg, AR_PHY_TX_PWRCTRL_TX_GAIN_TAB_MAX);
clcgain = MS(reg, AR_PHY_TX_GAIN_CLC);
if (MS(reg, AR_PHY_CLC_I0) == 0)
if (MS(reg, AR_PHY_CLC_Q0) == 0)
overlap = MS(AR_READ(sc, AR_PHY_TPCRG5),
overlap = MS(AR_READ(sc, AR_PHY_TPCRG5),
pdadc = MS(reg, AR_PHY_TX_PWRCTRL_PD_AVG_OUT);
sc->sc_rfsilent_pin = MS(base->rfSilent,
sc->sc_txchainmask = MS(base->txrxMask, AR_EEP_TX_MASK);
sc->sc_rxchainmask = MS(base->txrxMask, AR_EEP_RX_MASK);
type = MS(eep->baseEepHeader.txrxgain, AR_EEP_RX_GAIN);
type = MS(eep->baseEepHeader.txrxgain, AR_EEP_TX_GAIN);
MS(ant_div_ctrl, AR_EEP_ANT_DIV_CTRL_ALL));
ftrig = MS(reg, AR_TXCFG_FTRIG);
if (MS(AR_READ(sc, AR_OBS_BUS_1), AR_OBS_BUS_1_RX_STATE) == 0)
return MS(AR_READ(sc, AR_QSTS(qid)), AR_Q_STS_PEND_FR_CNT) != 0 ||
if (MS(reg, AR_SREV_ID) == 0xff) {
sc->sc_mac_ver = MS(reg, AR_SREV_VERSION2);
sc->sc_mac_rev = MS(reg, AR_SREV_REVISION2);
sc->sc_mac_ver = MS(reg, AR_SREV_VERSION);
sc->sc_mac_rev = MS(reg, AR_SREV_REVISION);
sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE);
sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY);
pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN);
rate = MS(rxdw3, R92C_RXDW3_RATE);
infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8;
shift = MS(rxdw0, R92C_RXDW0_SHIFT);
return MS(val, R92C_LSSI_READBACK_DATA);
if (MS(rtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) ==
return MS(reg, R92C_EFUSE_CTRL_DATA);
if (MS(rtwn_read_4(sc, R92C_HPON_FSM),
if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0)
} else if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) != 0) {
if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 1)
return MS(val, R92C_LSSI_READBACK_DATA);
if (MS(urtwn_read_4(sc, R92C_LLT_INIT), R92C_LLT_INIT_OP) ==
return MS(reg, R92C_EFUSE_CTRL_DATA);
if (MS(urtwn_read_4(sc, R92C_HPON_FSM),
if (MS(reg, R92C_SYS_CFG_CHIP_VER_RTL) == 0) {
sc->board_type = MS(rom->rf_opt1, R92C_ROM_RF1_BOARD_TYPE);
sc->regulatory = MS(rom->rf_opt1, R92C_ROM_RF1_REGULATORY);
sc->regulatory = MS(sc->r88e_rom[0xc1], R92C_ROM_RF1_REGULATORY);
rate = MS(rxdw3, R92C_RXDW3_RATE);
infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8;
npkts = MS(le32toh(stat->rxdw2), R92E_RXDW2_PKTCNT);
npkts = MS(le32toh(stat->rxdw2), R92C_RXDW2_PKTCNT);
pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN);
infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8;
if (MS(reg, R92C_USB_EP_HQ) != 0)
if (MS(reg, R92C_USB_EP_NQ) != 0)
if (MS(reg, R92C_USB_EP_LQ) != 0)
wmep->wmep_acm = MS(frm[0], WME_PARAM_ACM);
wmep->wmep_aifsn = MS(frm[0], WME_PARAM_AIFSN);
wmep->wmep_logcwmin = MS(frm[1], WME_PARAM_LOGCWMIN);
wmep->wmep_logcwmax = MS(frm[1], WME_PARAM_LOGCWMAX);
itv.it_value.tv_sec = wait / MS;
itv.it_value.tv_usec = (wait - itv.it_value.tv_sec * MS) * MS;
case MS:
case MS:
mac = MS;
const char *MS; /* stty flags to set if lp is a tty */
extern const char *MS; /* stty flags to set if lp is a tty */
MS = cgetstr(bp, "ms", &s) == -1 ? NULL : s;
if (MS) {
p = strdup(MS);