sys/arch/evbmips/cavium/machdep.c

226

btinfo_paddr = MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE,

sys/arch/evbmips/cavium/machdep.c

242

fdt_data = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE,

sys/arch/evbmips/cavium/machdep.c

364

memdesc = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE,

sys/arch/evbmips/cavium/machdep.c

379

block = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE, blockaddr);

sys/arch/evbmips/loongson/loongson2_machdep.c

282

awrreg = (volatile uint64_t *)MIPS_PHYS_TO_XKPHYS(CCA_UNCACHED,

sys/arch/evbmips/loongson/loongson2_machdep.c

287

awrreg = (volatile uint64_t *)MIPS_PHYS_TO_XKPHYS(CCA_UNCACHED,

sys/arch/evbmips/loongson/loongson2_machdep.c

292

awrreg = (volatile uint64_t *)MIPS_PHYS_TO_XKPHYS(CCA_UNCACHED,

sys/arch/evbmips/mipssim/machdep.c

265

memptr = (void *)MIPS_PHYS_TO_XKPHYS(CCA_CACHEABLE,

sys/arch/mips/cavium/octeon_intr.c

223

#define X(a) MIPS_PHYS_TO_XKPHYS(OCTEON_CCA_NONE, (a))

sys/arch/mips/cavium/octeonvar.h

282

return mips3_ld(MIPS_PHYS_TO_XKPHYS(OCTEON_CCA_NONE, address));

sys/arch/mips/cavium/octeonvar.h

288

mips3_sd(MIPS_PHYS_TO_XKPHYS(OCTEON_CCA_NONE, address), value);

sys/arch/mips/include/mips3_pte.h

101

#define MIPS3_XPHYS_UNCACHED MIPS_PHYS_TO_XKPHYS(2, 0)

sys/arch/mips/include/mips3_pte.h

102

#define MIPS3_XPHYS_ACC MIPS_PHYS_TO_XKPHYS(mips_options.mips3_cca_devmem, 0)

sys/arch/mips/include/mips3_pte.h

111

#define MIPS3_DEFAULT_XKPHYS_CACHED MIPS_PHYS_TO_XKPHYS(3, 0)

sys/arch/mips/mips/mips_machdep.c

1294

opts->mips3_xkphys_cached = MIPS_PHYS_TO_XKPHYS(cca, 0);

sys/arch/mips/sibyte/pci/sbbrz_pci.c

190

addr = MIPS_PHYS_TO_XKPHYS(MIPS3_TLB_ATTR_UNCACHED, addr);

sys/arch/mips/sibyte/pci/sbbrz_pci.c

214

addr = MIPS_PHYS_TO_XKPHYS(MIPS3_TLB_ATTR_UNCACHED, addr);