L1_S_SIZE
return L1_S_SIZE - (va & L1_S_OFFSET);
L1_S_SIZE, VM_PROT_READ|VM_PROT_WRITE,
for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
loop1 += L1_S_SIZE)
L1_S_SIZE, VM_PROT_READ|VM_PROT_WRITE, PMAP_NOCACHE);
pmap_unmap_chunk(kernel_l1pt.pv_va, CYCV_SDRAM_VBASE, L1_S_SIZE);
#define CYCV_SDRAM_SIZE L1_S_SIZE
for (;pmap_curmaxkvaddr < maxkvaddr; pmap_curmaxkvaddr += L1_S_SIZE,
__CTASSERT(0x100000000ULL == ((uint64_t)L2_SIZE * L2_BUCKET_SIZE * L1_S_SIZE));
size = howmany(virtual_end - pmap_curmaxkvaddr, L1_S_SIZE);
KASSERT((va & ((L1_S_SIZE * (PAGE_SIZE / L2_T_SIZE)) - 1)) == 0);
PDE_SYNC_RANGE(&pdep[l1slot], L1_SS_SIZE / L1_S_SIZE);
va += L1_S_SIZE;
pa += L1_S_SIZE;
resid -= L1_S_SIZE;
KASSERT(size == L1_SS_SIZE || size == L1_S_SIZE);
PDE_SYNC_RANGE(&pdep[l1slot], size / L1_S_SIZE);
limit = L1_S_SIZE - ((vaddr_t)dst & L1_S_OFFSET);
((((va) | (pa)) & L1_S_OFFSET) == 0 && (size) >= L1_S_SIZE)
#define PMAP_MAPSIZE2 L1_S_SIZE
#define DEVMAP_SIZE(s) roundup2((s), L1_S_SIZE)
KASSERTMSG((((uintptr_t)pdep / sizeof(pde)) & (L1_SS_SIZE / L1_S_SIZE - 1)) == 0, "%p", pdep);
for (int k = 1; k < L1_SS_SIZE / L1_S_SIZE; k++) {
#define L1_S_OFFSET (L1_S_SIZE - 1)
#define GEMINI_WATCHDOG_VBASE (GEMINI_GLOBAL_VBASE + L1_S_SIZE)
#define GEMINI_UART_VBASE (GEMINI_WATCHDOG_VBASE + L1_S_SIZE)
#define GEMINI_LPCHC_VBASE (GEMINI_UART_VBASE + L1_S_SIZE)
#define GEMINI_LPCIO_VBASE (GEMINI_LPCHC_VBASE + L1_S_SIZE)
#define GEMINI_TIMER_VBASE (GEMINI_LPCIO_VBASE + L1_S_SIZE)
#define GEMINI_DRAMC_VBASE (GEMINI_TIMER_VBASE + L1_S_SIZE)
#define GEMINI_RAMDISK_VBASE (GEMINI_DRAMC_VBASE + L1_S_SIZE)
+ (L1_S_SIZE * 4) - 1) & ~((L1_S_SIZE * 4) - 1))
L1_S_SIZE,
L1_S_SIZE,
L1_S_SIZE,
L1_S_SIZE,
L1_S_SIZE,
L1_S_SIZE,
L1_S_SIZE,
L1_S_SIZE,
L1_S_SIZE,
bus_size_t sz = L1_S_SIZE;
L1_S_SIZE
L1_S_SIZE * 4
#define _V(n) (MINI2440_IO_VBASE + (n) * L1_S_SIZE)
L1_S_SIZE * 4
#define _V(n) (SMDK2410_IO_VBASE + (n) * L1_S_SIZE)
md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1));
md_root_start = ((physical_end - MD_ROOT_SIZE) & ~(L1_S_SIZE-1));
L1_S_SIZE,
L1_S_SIZE,
L1_S_SIZE,
L1_S_SIZE,
L1_S_SIZE,
for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
int nsections = tp->size / L1_S_SIZE;
va += L1_S_SIZE;
pa += L1_S_SIZE;
isa_mem_virtaddr = ofw_map(isa_mem_physaddr, L1_S_SIZE, 0);
isa_io_virtaddr = ofw_map(isa_io_physaddr, L1_S_SIZE, 0);