sys/arch/arm/acpi/acpi_machdep.c

327

type | (mpsafe ? IST_MPSAFE : 0), handler, NULL,

sys/arch/arm/acpi/acpi_machdep.c

331

type | (mpsafe ? IST_MPSAFE : 0), acpi_md_intr, ai,

sys/arch/arm/acpi/acpi_pci_machdep.c

550

const int mpsafe = (ih & ARM_PCI_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/acpi/acpi_pci_machdep.c

562

pi->pi_ih = intr_establish_xname(irq, IPL_VM, IST_LEVEL | IST_MPSAFE,

sys/arch/arm/acpi/cpu_acpi.c

394

type | IST_MPSAFE, armv8_pmu_intr, NULL, xname);

sys/arch/arm/acpi/gtmr_acpi.c

82

ih = intr_establish_xname(irq, ipl, type | IST_MPSAFE, gtmr_intr, NULL, device_xname(self));

sys/arch/arm/apple/apple_intc.c

238

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/apple/apple_intc.c

518

IPL_HIGH, IST_LEVEL | IST_MPSAFE, apple_intc_ipi_handler,

sys/arch/arm/apple/apple_pcie.c

691

ipl, IST_LEVEL | (mpsafe ? IST_MPSAFE : 0), func, arg, xname);

sys/arch/arm/broadcom/bcm2835_intr.c

553

int iflags = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/broadcom/bcm2835_intr.c

904

IST_LEVEL | IST_MPSAFE, bcm2836mp_ipi_handler, ci);

sys/arch/arm/broadcom/bcm2835_intr.c

921

int iflags = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/cortex/a9tmr.c

158

IST_EDGE | IST_MPSAFE, a9tmr_intr, NULL);

sys/arch/arm/cortex/gic.c

706

intr_establish_xname(SOFTINT_BIO, IPL_SOFTBIO, IST_MPSAFE | IST_EDGE,

sys/arch/arm/cortex/gic.c

708

intr_establish_xname(SOFTINT_CLOCK, IPL_SOFTCLOCK, IST_MPSAFE | IST_EDGE,

sys/arch/arm/cortex/gic.c

710

intr_establish_xname(SOFTINT_NET, IPL_SOFTNET, IST_MPSAFE | IST_EDGE,

sys/arch/arm/cortex/gic.c

712

intr_establish_xname(SOFTINT_SERIAL, IPL_SOFTSERIAL, IST_MPSAFE | IST_EDGE,

sys/arch/arm/cortex/gic.c

719

IST_MPSAFE | IST_EDGE, pic_ipi_ast, (void *)-1, "IPI ast");

sys/arch/arm/cortex/gic.c

721

IST_MPSAFE | IST_EDGE, pic_ipi_xcall, (void *)-1, "IPI xcall");

sys/arch/arm/cortex/gic.c

723

IST_MPSAFE | IST_EDGE, pic_ipi_generic, (void *)-1, "IPI generic");

sys/arch/arm/cortex/gic.c

725

IST_MPSAFE | IST_EDGE, pic_ipi_nop, (void *)-1, "IPI nop");

sys/arch/arm/cortex/gic.c

727

IST_MPSAFE | IST_EDGE, pic_ipi_shootdown, (void *)-1, "IPI shootdown");

sys/arch/arm/cortex/gic.c

730

IST_MPSAFE | IST_EDGE, pic_ipi_ddb, NULL, "IPI ddb");

sys/arch/arm/cortex/gic.c

734

IST_MPSAFE | IST_EDGE, pic_ipi_kpreempt, (void *)-1, "IPI kpreempt");

sys/arch/arm/cortex/gic_v2m.c

337

const int mpsafe = (ih & ARM_PCI_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/cortex/gicv3.c

940

intr_establish_xname(IPI_AST, IPL_VM, IST_MPSAFE | IST_EDGE, pic_ipi_ast, (void *)-1, "IPI ast");

sys/arch/arm/cortex/gicv3.c

941

intr_establish_xname(IPI_XCALL, IPL_HIGH, IST_MPSAFE | IST_EDGE, pic_ipi_xcall, (void *)-1, "IPI xcall");

sys/arch/arm/cortex/gicv3.c

942

intr_establish_xname(IPI_GENERIC, IPL_HIGH, IST_MPSAFE | IST_EDGE, pic_ipi_generic, (void *)-1, "IPI generic");

sys/arch/arm/cortex/gicv3.c

943

intr_establish_xname(IPI_NOP, IPL_VM, IST_MPSAFE | IST_EDGE, pic_ipi_nop, (void *)-1, "IPI nop");

sys/arch/arm/cortex/gicv3.c

944

intr_establish_xname(IPI_SHOOTDOWN, IPL_SCHED, IST_MPSAFE | IST_EDGE, pic_ipi_shootdown, (void *)-1, "IPI shootdown");

sys/arch/arm/cortex/gicv3.c

946

intr_establish_xname(IPI_DDB, IPL_HIGH, IST_MPSAFE | IST_EDGE, pic_ipi_ddb, NULL, "IPI ddb");

sys/arch/arm/cortex/gicv3.c

949

intr_establish_xname(IPI_KPREEMPT, IPL_VM, IST_MPSAFE | IST_EDGE, pic_ipi_kpreempt, (void *)-1, "IPI kpreempt");

sys/arch/arm/cortex/gicv3_its.c

801

const int mpsafe = (ih & ARM_PCI_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/cortex/gtmr.c

155

IST_LEVEL | IST_MPSAFE, gtmr_intr, NULL);

sys/arch/arm/fdt/gic_fdt.c

262

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/fdt/gicv3_fdt.c

362

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/imx/imx23_icoll.c

300

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/nvidia/tegra_drm_mode.c

317

crtc->ih = intr_establish_xname(intr, IPL_VM, IST_LEVEL | IST_MPSAFE,

sys/arch/arm/nvidia/tegra_lic.c

136

int iflags = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/nxp/imx6_gpc.c

133

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/nxp/imx7_gpc.c

220

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/nxp/imx7_gpc.c

231

imx7gpc_unmask(sc, irq - 32, mpsafe == IST_MPSAFE);

sys/arch/arm/nxp/imx_gpio.c

246

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/pic/pic.c

764

is->is_mpsafe = (type & IST_MPSAFE) || ipl != IPL_VM;

sys/arch/arm/sunxi/sunxi_intc.c

148

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/ti/am18xx_intc.c

125

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/arm/ti/ti_omapintc.c

195

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/riscv/dev/plic.c

91

ih->ih_mpsafe = (flags & IST_MPSAFE) != 0;

sys/arch/riscv/dev/plic_fdt.c

71

(flags & FDT_INTR_MPSAFE) != 0 ? IST_MPSAFE : 0, func, arg, xname);

sys/arch/riscv/fdt/intc_fdt.c

213

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;

sys/arch/riscv/fdt/intc_fdt.c

284

(irq->intr_istflags & IST_MPSAFE) != 0;

sys/arch/riscv/fdt/intc_fdt.c

351

intc_intr_establish(sc, IRQ_SUPERVISOR_TIMER, IPL_SCHED, IST_MPSAFE,

sys/arch/riscv/fdt/intc_fdt.c

355

intc_intr_establish(sc, IRQ_SUPERVISOR_SOFTWARE, IPL_HIGH, IST_MPSAFE,

sys/arch/riscv/starfive/jh7110_pcie.c

282

const u_int mpsafe = (flags & FDT_INTR_MPSAFE) ? IST_MPSAFE : 0;