sys/arch/arm/footbridge/footbridge_intr.h

110

hwpend = footbridge_ipending & ICU_INT_HWMASK & ~footbridge_imask[ipl];

sys/arch/arm/footbridge/footbridge_intr.h

91

uint32_t tmp = intr_enabled & ICU_INT_HWMASK;

sys/arch/arm/footbridge/footbridge_irqhandler.c

336

hwpend |= (footbridge_ipending & ICU_INT_HWMASK) & ~imask;

sys/arch/arm/s3c2xx0/s3c2800_intr.c

92

while ((irqbits = icreg(INTCTL_IRQPND) & ICU_INT_HWMASK) != 0) {

sys/arch/arm/xscale/i80321_icu.c

140

: "r" (intr_steer & ICU_INT_HWMASK));

sys/arch/arm/xscale/i80321_icu.c

451

hwpend |= ((i80321_ipending & ICU_INT_HWMASK) & ~imask);

sys/arch/arm/xscale/i80321_intr.h

59

: "r" (intr_enabled & ICU_INT_HWMASK));

sys/arch/arm/xscale/i80321_intr.h

77

hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~i80321_imask[new];