sys/arch/aarch64/aarch64/aarch64_tlb.c

105

tlb_record_asids(u_long *mapp, tlb_asid_t asid_max)

sys/arch/aarch64/aarch64/aarch64_tlb.c

117

tlb_walk(void *ctx, bool (*func)(void *, vaddr_t, tlb_asid_t, pt_entry_t))

sys/arch/aarch64/aarch64/aarch64_tlb.c

45

tlb_asid_t

sys/arch/aarch64/aarch64/aarch64_tlb.c

55

tlb_set_asid(tlb_asid_t asid, pmap_t pm)

sys/arch/aarch64/aarch64/aarch64_tlb.c

79

tlb_invalidate_asids(tlb_asid_t lo, tlb_asid_t hi)

sys/arch/aarch64/aarch64/aarch64_tlb.c

87

tlb_invalidate_addr(vaddr_t va, tlb_asid_t asid)

sys/arch/aarch64/aarch64/aarch64_tlb.c

95

tlb_update_addr(vaddr_t va, tlb_asid_t asid, pt_entry_t pte, bool insert_p)

sys/arch/aarch64/aarch64/pmap.c

2006

const tlb_asid_t asid = pai->pai_asid;

sys/arch/aarch64/include/cpu.h

156

tlb_asid_t ci_pmap_asid_cur;

sys/arch/aarch64/include/pmap.h

404

pmap_md_asid_activate(tlb_asid_t asid, pmap_t pm, struct lwp *l)

sys/arch/aarch64/include/pmap.h

66

static inline tlb_asid_t

sys/arch/aarch64/include/pmap_machdep.h

174

pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte)

sys/arch/arm/arm32/arm32_tlb.c

128

tlb_invalidate_addr(vaddr_t va, tlb_asid_t asid)

sys/arch/arm/arm32/arm32_tlb.c

143

tlb_update_addr(vaddr_t va, tlb_asid_t asid, pt_entry_t pte, bool insert_p)

sys/arch/arm/arm32/arm32_tlb.c

151

tlb_cortex_a5_record_asids(u_long *mapp, tlb_asid_t asid_max)

sys/arch/arm/arm32/arm32_tlb.c

166

const tlb_asid_t asid = __SHIFTOUT(d,

sys/arch/arm/arm32/arm32_tlb.c

183

tlb_cortex_a7_record_asids(u_long *mapp, tlb_asid_t asid_max)

sys/arch/arm/arm32/arm32_tlb.c

199

const tlb_asid_t asid = __SHIFTOUT(d01,

sys/arch/arm/arm32/arm32_tlb.c

215

tlb_record_asids(u_long *mapp, tlb_asid_t asid_max)

sys/arch/arm/arm32/arm32_tlb.c

237

tlb_walk(void *ctx, bool (*func)(void *, vaddr_t, tlb_asid_t, pt_entry_t))

sys/arch/arm/arm32/arm32_tlb.c

46

tlb_asid_t

sys/arch/arm/arm32/arm32_tlb.c

55

tlb_set_asid(tlb_asid_t asid, pmap_t pm)

sys/arch/arm/arm32/arm32_tlb.c

96

tlb_invalidate_asids(tlb_asid_t lo, tlb_asid_t hi)

sys/arch/arm/arm32/db_machdep.c

244

tlb_print_asid(bool ng_p, tlb_asid_t asid)

sys/arch/arm/arm32/db_machdep.c

298

const tlb_asid_t asid = __SHIFTOUT(d, ARM_A5_TLBDATA_ASID);

sys/arch/arm/arm32/db_machdep.c

361

const tlb_asid_t asid = __SHIFTOUT(d01, ARM_A7_TLBDATA01_ASID);

sys/arch/arm/arm32/fault.c

477

tlb_asid_t asid = tlb_get_asid();

sys/arch/arm/include/arm32/pmap.h

278

pmap_md_asid_activate(tlb_asid_t asid, pmap_t pm, struct lwp *l)

sys/arch/arm/include/cpu.h

241

tlb_asid_t ci_pmap_asid_cur;

sys/arch/arm/include/cpufunc.h

114

void (*cf_setttb) (u_int, tlb_asid_t);

sys/arch/arm/include/cpufunc.h

210

void (*cf_context_switch) (u_int, tlb_asid_t);

sys/arch/arm/include/cpufunc_proto.h

244

void arm11_setttb (u_int, tlb_asid_t);

sys/arch/arm/include/cpufunc_proto.h

245

void arm11_context_switch (u_int, tlb_asid_t);

sys/arch/arm/include/cpufunc_proto.h

282

void armv7_setttb(u_int, tlb_asid_t);

sys/arch/arm/include/cpufunc_proto.h

283

void armv7_context_switch(u_int, tlb_asid_t);

sys/arch/m68k/include/pmap_coldfire.h

140

pmap_md_asid_activate(tlb_asid_t asid, struct pmap *pm, struct lwp *l)

sys/arch/m68k/include/pmap_coldfire.h

88

bool pmap_md_tlb_check_entry(void *, vaddr_t, tlb_asid_t, pt_entry_t);

sys/arch/mips/include/locore.h

586

tlb_asid_t (*ljv_tlb_get_asid)(void);

sys/arch/mips/include/locore.h

587

void (*ljv_tlb_set_asid)(tlb_asid_t pid);

sys/arch/mips/include/locore.h

588

void (*ljv_tlb_invalidate_asids)(tlb_asid_t, tlb_asid_t);

sys/arch/mips/include/locore.h

589

void (*ljv_tlb_invalidate_addr)(vaddr_t, tlb_asid_t);

sys/arch/mips/include/locore.h

592

u_int (*ljv_tlb_record_asids)(u_long *, tlb_asid_t);

sys/arch/mips/include/locore.h

593

int (*ljv_tlb_update_addr)(vaddr_t, tlb_asid_t, pt_entry_t, bool);

sys/arch/mips/include/pmap.h

131

bool pmap_md_tlb_check_entry(void *, vaddr_t, tlb_asid_t, pt_entry_t);

sys/arch/mips/include/pmap.h

146

pmap_md_asid_activate(tlb_asid_t asid, struct pmap *pm, struct lwp *l)

sys/arch/mips/mips/mips_fixup.c

550

tlb_asid_t

sys/arch/mips/mips/mips_fixup.c

556

void tlb_invalidate_addr(vaddr_t, tlb_asid_t) __stub;

sys/arch/mips/mips/mips_fixup.c

558

bool tlb_update_addr(vaddr_t, tlb_asid_t, pt_entry_t, bool)

sys/arch/mips/mips/mips_fixup.c

575

tlb_asid_t

sys/arch/mips/mips/mips_fixup.c

594

tlb_invalidate_addr(vaddr_t va, tlb_asid_t asid)

sys/arch/mips/mips/mips_fixup.c

612

tlb_record_asids(u_long *bitmap, tlb_asid_t asid_max)

sys/arch/mips/mips/mips_fixup.c

619

tlb_update_addr(vaddr_t va, tlb_asid_t asid, pt_entry_t pte, bool insert)

sys/arch/mips/mips/pmap_machdep.c

854

pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte)

sys/arch/mips/mips/pmap_machdep.c

907

tlb_asid_t asid;

sys/arch/mips/mips/pmap_machdep.c

919

tlb_asid_t asid0 = (pte_global_p(pte) ? KERNEL_PID : asid);

sys/arch/mips/mips/pmap_machdep.c

926

tlb_asid_t asid1 = (pte_global_p(pte) ? KERNEL_PID : asid);

sys/arch/mips/mips/trap.c

421

tlb_asid_t asid = tlb_get_asid();

sys/arch/powerpc/booke/booke_pmap.c

410

pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte)

sys/arch/powerpc/booke/booke_stubs.c

120

u_int tlb_record_asids(u_long *, tlb_asid_t) __stub;

sys/arch/powerpc/booke/booke_stubs.c

123

tlb_record_asids(u_long *bitmap, tlb_asid_t asid_max)

sys/arch/powerpc/booke/booke_stubs.c

48

void tlb_set_asid(tlb_asid_t, struct pmap *) __stub;

sys/arch/powerpc/booke/booke_stubs.c

51

tlb_set_asid(tlb_asid_t asid, struct pmap *pm)

sys/arch/powerpc/booke/booke_stubs.c

56

tlb_asid_t tlb_get_asid(void) __stub;

sys/arch/powerpc/booke/booke_stubs.c

58

tlb_asid_t

sys/arch/powerpc/booke/booke_stubs.c

80

void tlb_invalidate_asids(tlb_asid_t, tlb_asid_t) __stub;

sys/arch/powerpc/booke/booke_stubs.c

83

tlb_invalidate_asids(tlb_asid_t asid_lo, tlb_asid_t asid_hi)

sys/arch/powerpc/booke/booke_stubs.c

88

void tlb_invalidate_addr(vaddr_t, tlb_asid_t) __stub;

sys/arch/powerpc/booke/booke_stubs.c

91

tlb_invalidate_addr(vaddr_t va, tlb_asid_t asid)

sys/arch/powerpc/booke/booke_stubs.c

96

bool tlb_update_addr(vaddr_t, tlb_asid_t, pt_entry_t, bool) __stub;

sys/arch/powerpc/booke/booke_stubs.c

99

tlb_update_addr(vaddr_t va, tlb_asid_t asid, pt_entry_t pte, bool insert_p)

sys/arch/powerpc/booke/e500_tlb.c

346

static tlb_asid_t

sys/arch/powerpc/booke/e500_tlb.c

353

e500_tlb_set_asid(tlb_asid_t asid)

sys/arch/powerpc/booke/e500_tlb.c

429

e500_tlb_invalidate_asids(tlb_asid_t asid_lo, tlb_asid_t asid_hi)

sys/arch/powerpc/booke/e500_tlb.c

471

e500_tlb_record_asids(u_long *bitmap, tlb_asid_t asid_max)

sys/arch/powerpc/booke/e500_tlb.c

508

e500_tlb_invalidate_addr(vaddr_t va, tlb_asid_t asid)

sys/arch/powerpc/booke/e500_tlb.c

537

e500_tlb_update_addr(vaddr_t va, tlb_asid_t asid, pt_entry_t pte, bool insert)

sys/arch/powerpc/include/booke/pmap.h

173

pmap_md_asid_activate(tlb_asid_t asid, struct pmap *pm, struct lwp *l)

sys/arch/powerpc/include/booke/pmap.h

96

bool pmap_md_tlb_check_entry(void *, vaddr_t, tlb_asid_t, pt_entry_t);

sys/arch/riscv/include/cpu.h

75

tlb_asid_t ci_pmap_asid_cur;

sys/arch/riscv/include/pmap.h

204

pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte)

sys/arch/riscv/include/pmap.h

257

pmap_md_asid_activate(tlb_asid_t asid, struct pmap *pmap, struct lwp *l)

sys/arch/riscv/riscv/riscv_tlb.c

112

tlb_invalidate_addr(vaddr_t va, tlb_asid_t asid)

sys/arch/riscv/riscv/riscv_tlb.c

149

tlb_update_addr(vaddr_t va, tlb_asid_t asid, pt_entry_t pte, bool insert_p)

sys/arch/riscv/riscv/riscv_tlb.c

159

tlb_record_asids(u_long *ptr, tlb_asid_t asid_max)

sys/arch/riscv/riscv/riscv_tlb.c

168

tlb_walk(void *ctx, bool (*func)(void *, vaddr_t, tlb_asid_t, pt_entry_t))

sys/arch/riscv/riscv/riscv_tlb.c

48

tlb_asid_t

sys/arch/riscv/riscv/riscv_tlb.c

55

tlb_set_asid(tlb_asid_t asid, struct pmap *pm)

sys/arch/riscv/riscv/riscv_tlb.c

76

tlb_invalidate_asids(tlb_asid_t lo, tlb_asid_t hi)

sys/arch/riscv/riscv/riscv_tlb.c

78

tlb_asid_t asid;

sys/arch/riscv/riscv/trap.c

444

tlb_asid_t asid = tlb_get_asid();

sys/uvm/pmap/pmap.c

385

tlb_asid_t asid = tlb_get_asid();

sys/uvm/pmap/pmap_tlb.c

1104

const tlb_asid_t asid __debugused = tlb_get_asid();

sys/uvm/pmap/pmap_tlb.c

1117

pmap_tlb_check(pmap_t pm, bool (*func)(void *, vaddr_t, tlb_asid_t, pt_entry_t))

sys/uvm/pmap/pmap_tlb.c

158

for (tlb_asid_t asid = 0; asid <= KERNEL_PID; asid++) \

sys/uvm/pmap/pmap_tlb.c

383

const tlb_asid_t asid_max = pmap_md_tlb_asid_max();

sys/uvm/pmap/pmap_tlb.c

389

KASSERT(__type_fit(tlb_asid_t, ti->ti_asid_max + 1));

sys/uvm/pmap/pmap_tlb.c

425

for (tlb_asid_t asid = 1; asid <= ti->ti_asid_max; asid++) {

sys/uvm/pmap/pmap_tlb.h

124

tlb_asid_t ti_asid_hint; /* probable next ASID to use */

sys/uvm/pmap/pmap_tlb.h

125

tlb_asid_t ti_asid_max;

sys/uvm/pmap/pmap_tlb.h

189

void pmap_tlb_check(pmap_t, bool (*)(void *, vaddr_t, tlb_asid_t, pt_entry_t));

sys/uvm/pmap/tlb.h

38

typedef bool (*tlb_walkfunc_t)(void *, vaddr_t, tlb_asid_t, pt_entry_t);

sys/uvm/pmap/tlb.h

41

void (*md_tlb_set_asid)(tlb_asid_t);

sys/uvm/pmap/tlb.h

42

tlb_asid_t

sys/uvm/pmap/tlb.h

46

void (*md_tlb_invalidate_asids)(tlb_asid_t, tlb_asid_t);

sys/uvm/pmap/tlb.h

47

void (*md_tlb_invalidate_addr)(vaddr_t, tlb_asid_t);

sys/uvm/pmap/tlb.h

48

bool (*md_tlb_update_addr)(vaddr_t, tlb_asid_t, pt_entry_t, bool);

sys/uvm/pmap/tlb.h

51

u_int (*md_tlb_record_asids)(u_long *, tlb_asid_t);

sys/uvm/pmap/tlb.h

56

tlb_asid_t

sys/uvm/pmap/tlb.h

58

void tlb_set_asid(tlb_asid_t, struct pmap *);

sys/uvm/pmap/tlb.h

61

void tlb_invalidate_asids(tlb_asid_t, tlb_asid_t);

sys/uvm/pmap/tlb.h

62

void tlb_invalidate_addr(vaddr_t, tlb_asid_t);

sys/uvm/pmap/tlb.h

63

bool tlb_update_addr(vaddr_t, tlb_asid_t, pt_entry_t, bool);

sys/uvm/pmap/tlb.h

64

u_int tlb_record_asids(u_long *, tlb_asid_t);