Symbol: DBG_INIT
sys/dev/ic/arn5008.c
2391
DPRINTFN(DBG_INIT, sc, "writing modal init vals\n");
sys/dev/ic/arn5008.c
2421
DPRINTFN(DBG_INIT, sc, "writing common init vals\n");
sys/dev/ic/arn5008.c
2445
DPRINTFN(DBG_INIT, sc, "writing fast pll clock init vals\n");
sys/dev/ic/arn5008.c
306
DPRINTFN(DBG_INIT, sc,
sys/dev/ic/arn5008.c
311
DPRINTFN(DBG_INIT, sc, "non-native ROM endianness\n");
sys/dev/ic/arn5008.c
324
DPRINTFN(DBG_INIT, sc,
sys/dev/ic/arn9003.c
3221
DPRINTFN(DBG_INIT, sc, "writing pre and core init vals\n");
sys/dev/ic/arn9003.c
3249
DPRINTFN(DBG_INIT, sc, "writing post init vals\n");
sys/dev/ic/arn9003.c
3272
DPRINTFN(DBG_INIT, sc, "writing fast pll clock init vals\n");
sys/dev/ic/arn9003.c
409
DPRINTFN(DBG_INIT, sc, "unknown template image %d\n",
sys/dev/ic/arn9003.c
430
DPRINTFN(DBG_INIT, sc, "ROM chunk @%zd/%zd\n",
sys/dev/ic/arn9003.c
440
DPRINTFN(DBG_INIT, sc, "block length mismatch %zd\n",
sys/dev/ic/arn9003.c
481
DPRINTFN(DBG_INIT, sc,
sys/dev/ic/arn9003.c
503
DPRINTFN(DBG_INIT, sc,
sys/dev/ic/arn9280.c
128
DPRINTFN(DBG_INIT, sc, "AR_AN_TOP2 fixup required\n");
sys/dev/ic/arn9280.c
137
DPRINTFN(DBG_INIT, sc, "Rx gain type=0x%x\n", type);
sys/dev/ic/arn9280.c
152
DPRINTFN(DBG_INIT, sc, "Tx gain type=0x%x\n", type);
sys/dev/ic/arn9285.c
692
DPRINTFN(DBG_INIT, sc, "CLC threshold=%d\n", thresh);
sys/dev/ic/athn.c
212
DPRINTFN(DBG_INIT, sc,
sys/dev/ic/athn.c
216
DPRINTFN(DBG_INIT, sc, "%zd key cache entries\n", sc->sc_kc_entries);
sys/dev/ic/athn.c
230
DPRINTFN(DBG_INIT, sc, "using %s loop power control\n",
sys/dev/ic/athn.c
232
DPRINTFN(DBG_INIT, sc, "txchainmask=0x%x rxchainmask=0x%x\n",
sys/dev/ic/athn.c
693
DPRINTFN(DBG_INIT, sc, "RTC not waking up\n");
sys/dev/ic/athn.c
728
DPRINTFN(DBG_INIT, sc, "RTC stuck in MAC reset\n");
sys/dev/ic/athn.c
762
DPRINTFN(DBG_INIT, sc, "RTC not waking up\n");
sys/dev/ic/athn.c
823
DPRINTFN(DBG_INIT, sc, "AR_RTC_PLL_CONTROL=0x%08x\n", pll);
sys/dev/usb/if_athn_usb.c
1204
DPRINTFN(DBG_INIT, usc,
sys/dev/usb/if_athn_usb.c
2848
DPRINTFN(DBG_INIT, sc, "creating VAP\n");
sys/dev/usb/if_athn_usb.c
2862
DPRINTFN(DBG_INIT | DBG_NODES, sc, "creating default node %u\n",
sys/dev/usb/if_athn_usb.c
2877
DPRINTFN(DBG_INIT, sc, "updating target configuration\n");
sys/dev/usb/if_otus.c
1590
DPRINTFN(DBG_INIT, sc, "rate=0x%02x ridx=%d\n",
sys/dev/usb/if_otus.c
2473
DPRINTFN(DBG_FN | DBG_INIT, sc, "\n");
sys/dev/usb/if_otus.c
3169
DPRINTFN(DBG_FN | DBG_INIT, sc, "\n");
sys/dev/usb/if_otus.c
915
DPRINTFN(DBG_FN | DBG_INIT, sc, "regdomain=0x%04x\n", domain);
sys/dev/usb/if_urtwn.c
1358
DPRINTFN(DBG_INIT, "%04jx: %02jx", i, rom[i], 0, 0);
sys/dev/usb/if_urtwn.c
1523
DPRINTFN(DBG_INIT,
sys/dev/usb/if_urtwn.c
1682
DPRINTFN(DBG_INIT, "mode=%#jx", mode, 0, 0, 0);
sys/dev/usb/if_urtwn.c
1683
DPRINTFN(DBG_INIT, "rates=%#jx, basicrates=%#jx, "
sys/dev/usb/if_urtwn.c
1704
DPRINTFN(DBG_INIT, "maxbasicrate=%jd", maxbasicrate, 0, 0, 0);
sys/dev/usb/if_urtwn.c
1718
DPRINTFN(DBG_INIT, "maxrate=%jd", maxrate, 0, 0, 0);
sys/dev/usb/if_urtwn.c
3570
DPRINTFN(DBG_INIT, "FW V%jd.%jd",
sys/dev/usb/if_urtwn.c
3572
DPRINTFN(DBG_INIT, "%02jd-%02jd %02jd:%02jd",
sys/dev/usb/if_urtwn.c
3685
DPRINTFN(DBG_INIT, "USB endpoints mapping %#jx", reg, 0, 0, 0);
sys/dev/usb/if_urtwn.c
681
DPRINTFN(DBG_INIT, "found %jd/%jd bulk-in/out pipes",