sys/arch/arm/rockchip/rk_emmcphy.c

104

syscon_read_4((sc)->sc_syscon, (sc)->sc_regbase + (reg))

sys/arch/arm/rockchip/rk_emmcphy.c

106

syscon_write_4((sc)->sc_syscon, (sc)->sc_regbase + (reg), (val))

sys/arch/arm/rockchip/rk_emmcphy.c

256

sc->sc_regbase = addr;

sys/arch/arm/rockchip/rk_emmcphy.c

98

bus_addr_t sc_regbase;

sys/arch/arm/ti/am3_prcm.c

231

regoff += (regbase - sc->sc_regbase);

sys/arch/arm/ti/am3_prcm.c

269

if (fdtbus_get_reg(phandle, 0, &sc->sc_regbase, NULL) != 0) {

sys/arch/arm/ti/am3_prcm.c

70

bus_addr_t sc_regbase;

sys/arch/arm/ti/omap4_prcm.c

259

regoff += (regbase - sc->sc_regbase);

sys/arch/arm/ti/omap4_prcm.c

298

if (fdtbus_get_reg(phandle, 0, &sc->sc_regbase, NULL) != 0) {

sys/arch/arm/ti/omap4_prcm.c

71

bus_addr_t sc_regbase;

sys/arch/macppc/dev/adb.c

114

sc->sc_regbase = mapiodev(ca->ca_reg[0], ca->ca_reg[1], false);

sys/arch/macppc/dev/adb.c

115

Via1Base = sc->sc_regbase;

sys/arch/macppc/dev/adbvar.h

72

char *sc_regbase;

sys/arch/newsmips/apbus/if_sn_ap.c

100

sc->sc_regbase = (void *)apa->apa_hwbase;

sys/arch/newsmips/apbus/if_sn_ap.c

105

sc->sc_regbase =

sys/arch/newsmips/apbus/if_snvar.h

27

#define NIC_GET(sc, reg) ((sc)->sc_regbase[(reg) * 4 + 3])

sys/arch/newsmips/apbus/if_snvar.h

28

#define NIC_PUT(sc, reg, val) ((sc)->sc_regbase[(reg) * 4 + 3] = val)

sys/arch/newsmips/apbus/if_snvar.h

90

volatile uint16_t *sc_regbase; /* register base address */

sys/dev/pci/machfb.c

2064

if ((offset >= sc->sc_regbase) &&

sys/dev/pci/machfb.c

2065

(offset < (sc->sc_regbase + sc->sc_regsize))) {

sys/dev/pci/machfb.c

474

if ((sc->sc_regbase != 0) && (sc->sc_regbase != 0xffffffff)) {

sys/dev/pci/machfb.c

476

0, &sc->sc_regt, &sc->sc_regh, &sc->sc_regbase,

sys/dev/pci/machfb.c

507

(u_int)sc->sc_regbase);