sys/arch/evbarm/stand/board/sscom.c

194

uint32_t pllcon = read_reg(S3C2800_CLKMAN_BASE+CLKMAN_PLLCON);

sys/arch/evbarm/stand/board/sscom.c

195

uint32_t div = read_reg(S3C2800_CLKMAN_BASE+CLKMAN_CLKCON);

sys/arch/evbarm/stand/board/sscom.c

200

uint32_t pllcon = read_reg(S3C2410_CLKMAN_BASE+CLKMAN_MPLLCON);

sys/arch/evbarm/stand/board/sscom.c

201

uint32_t div = read_reg(S3C2410_CLKMAN_BASE+CLKMAN_CLKDIVN);

sys/dev/i2c/bmx280thpi2c.c

140

.read_reg = bmx280thpi2c_read_register,

sys/dev/i2c/sc16is7xxi2c.c

138

.read_reg = sc16is7xxi2c_read_register,

sys/dev/ic/bmx280.c

452

error = sc->sc_funcs->read_reg(sc, reg, &chip_id, 1);

sys/dev/ic/bmx280.c

469

error = sc->sc_funcs->read_reg(sc, reg, raw_blob_tp, 24);

sys/dev/ic/bmx280.c

488

error = sc->sc_funcs->read_reg(sc, reg, raw_blob_h, 1);

sys/dev/ic/bmx280.c

495

error = sc->sc_funcs->read_reg(sc, reg, &raw_blob_h[1], 7);

sys/dev/ic/bmx280.c

740

ierror = sc->sc_funcs->read_reg(sc, reg, &running, 1);

sys/dev/ic/bmx280.c

795

ierror = sc->sc_funcs->read_reg(sc, reg, raw_press_temp_hum, rlen);

sys/dev/ic/bmx280var.h

54

int (*read_reg)(struct bmx280_sc *, uint8_t, uint8_t *,

sys/dev/ic/sc16is7xx.c

203

error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOSTATE, 1, &r, 1);

sys/dev/ic/sc16is7xx.c

217

error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOSTATE, 1, &r, 1);

sys/dev/ic/sc16is7xx.c

234

error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 1, &iocontrol, 1);

sys/dev/ic/sc16is7xx.c

252

error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 1, &iocontrol, 1);

sys/dev/ic/sc16is7xx.c

257

error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IODIR, 1, &iodir, 1);

sys/dev/ic/sc16is7xx.c

446

error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 0, &iocontrol_reg, 1);

sys/dev/ic/sc16is7xx.c

452

error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 0, &iocontrol_reg, 1);

sys/dev/ic/sc16is7xx.c

491

error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_LCR, 1, buf, 1);

sys/dev/ic/sc16is7xx.c

528

error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 1, &iocontrol_reg, 1);

sys/dev/ic/sc16is7xx.c

596

error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IOCONTROL, 1, &iocontrol_reg, 1);

sys/dev/ic/sc16is7xx.c

599

error = sc->sc_funcs->read_reg(sc, SC16IS7XX_REGISTER_IODIR, 1, &iodir_reg, 1);

sys/dev/ic/sc16is7xxvar.h

47

int (*read_reg)(struct sc16is7xx_sc *, uint8_t, int, uint8_t *,

sys/dev/pci/igc/if_igc.c

3763

phy->ops.read_reg(hw, 0x1e, &phy_ver);

sys/dev/pci/igc/igc_hw.h

233

int (*read_reg)(struct igc_hw *, uint32_t, uint16_t *);

sys/dev/pci/igc/igc_i225.c

157

phy->ops.read_reg = igc_read_phy_reg_gpy;

sys/dev/pci/igc/igc_mac.c

599

ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &mii_status_reg);

sys/dev/pci/igc/igc_mac.c

602

ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &mii_status_reg);

sys/dev/pci/igc/igc_mac.c

615

ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,

sys/dev/pci/igc/igc_mac.c

619

ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,

sys/dev/pci/igc/igc_phy.c

148

if (!phy->ops.read_reg)

sys/dev/pci/igc/igc_phy.c

151

ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);

sys/dev/pci/igc/igc_phy.c

157

ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);

sys/dev/pci/igc/igc_phy.c

303

ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);

sys/dev/pci/igc/igc_phy.c

309

ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL,

sys/dev/pci/igc/igc_phy.c

317

ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK <<

sys/dev/pci/igc/igc_phy.c

34

phy->ops.read_reg = igc_null_read_reg;

sys/dev/pci/igc/igc_phy.c

498

ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);

sys/dev/pci/igc/igc_phy.c

617

if (!hw->phy.ops.read_reg)

sys/dev/pci/igc/igc_phy.c

622

ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);

sys/dev/pci/igc/igc_phy.c

625

ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);

sys/dev/pci/igc/igc_phy.c

657

if (!hw->phy.ops.read_reg)

sys/dev/pci/igc/igc_phy.c

665

ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);

sys/dev/pci/igc/igc_phy.c

676

ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);

sys/dev/pci/igc/igc_phy.c

761

hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);

sys/dev/pci/igc/igc_phy.c

781

hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);

sys/dev/pci/igc/igc_phy.c

888

ret_val = hw->phy.ops.read_reg(hw, IGC_MMDAAD, data);

sys/dev/pci/igma.c

302

reg = co->read_reg(cd, cd->vga_cntrl);

sys/dev/pci/igma.c

520

reg = co->read_reg(cd, ii->ii_reg);

sys/dev/pci/igma.c

541

reg = co->read_reg(cd, ii->ii_reg);

sys/dev/pci/igma.c

565

reg = co->read_reg(cd, ii->ii_reg);

sys/dev/pci/igma/igmafb.c

382

r = co->read_reg(cd, PIPE_HTOTAL(pipe));

sys/dev/pci/igma/igmafb.c

384

r = co->read_reg(cd, PIPE_VTOTAL(pipe));

sys/dev/pci/igma/igmafb.c

392

r = co->read_reg(cd, PF_WINSZ(pipe));

sys/dev/pci/igma/igmafb.c

421

r = co->read_reg(cd, sc->sc_chip.vga_cntrl);

sys/dev/pci/igma/igmafb.c

442

r = co->read_reg(cd, PRI_CTRL(pipe));

sys/dev/pci/igma/igmafb.c

472

if ((co->read_reg(cd, PIPE_CONF(pipe)) & PIPE_CONF_STATE) == 0)

sys/dev/pci/igma/igmafb.c

477

r = co->read_reg(cd, 0x42000);

sys/dev/pci/igma/igmafb.c

479

r = co->read_reg(cd, 0x42004);

sys/dev/pci/igma/igmafb.c

489

r = co->read_reg(cd, sc->sc_chip.vga_cntrl);

sys/dev/pci/igma/igmafb.c

514

fwbcl = co->read_reg(cd, FW_BLC_SELF);

sys/dev/pci/igma/igmafb.c

517

cntrl = co->read_reg(cd, CUR_CNTR(pipe));

sys/dev/pci/igma/igmafb.c

525

co->read_reg(cd, CUR_BASE(pipe)));

sys/dev/pci/igma/igmafb.c

538

r = co->read_reg(cd, PF_CTRL_I965);

sys/dev/pci/igma/igmafb.c

549

r = co->read_reg(cd, cd->backlight_cntrl);

sys/dev/pci/igma/igmafb.c

552

r = co->read_reg(cd, RAWCLK_FREQ);

sys/dev/pci/igma/igmafb.c

568

r = co->read_reg(cd, cd->backlight_cntrl);

sys/dev/pci/igma/igmafb.c

580

r = co->read_reg(cd, cd->backlight_cntrl);

sys/dev/pci/igmavar.h

28

u_int32_t (*read_reg)(const struct igma_chip *, int);

sys/dev/pci/ixgbe/ixgbe.c

5996

if (hw->phy.ops.read_reg(hw, IXGBE_PHY_CURRENT_TEMP,

sys/dev/pci/ixgbe/ixgbe.c

6040

if (hw->phy.ops.read_reg(hw, IXGBE_PHY_OVERTEMP_STATUS,

sys/dev/pci/ixgbe/ixgbe_82598.c

1249

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/pci/ixgbe/ixgbe_82598.c

621

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/pci/ixgbe/ixgbe_82598.c

665

hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg);

sys/dev/pci/ixgbe/ixgbe_82598.c

666

hw->phy.ops.read_reg(hw, 0xC79F, IXGBE_TWINAX_DEV, &link_reg);

sys/dev/pci/ixgbe/ixgbe_82598.c

667

hw->phy.ops.read_reg(hw, 0xC00C, IXGBE_TWINAX_DEV,

sys/dev/pci/ixgbe/ixgbe_82598.c

679

hw->phy.ops.read_reg(hw, 0xC79F,

sys/dev/pci/ixgbe/ixgbe_82598.c

682

hw->phy.ops.read_reg(hw, 0xC00C,

sys/dev/pci/ixgbe/ixgbe_82599.c

2223

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/pci/ixgbe/ixgbe_api.c

540

return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,

sys/dev/pci/ixgbe/ixgbe_common.c

281

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,

sys/dev/pci/ixgbe/ixgbe_common.c

3109

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT,

sys/dev/pci/ixgbe/ixgbe_common.c

3112

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_LP,

sys/dev/pci/ixgbe/ixgbe_common.c

628

hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECL,

sys/dev/pci/ixgbe/ixgbe_common.c

630

hw->phy.ops.read_reg(hw, IXGBE_PCRC8ECH,

sys/dev/pci/ixgbe/ixgbe_common.c

632

hw->phy.ops.read_reg(hw, IXGBE_LDPCECL,

sys/dev/pci/ixgbe/ixgbe_common.c

634

hw->phy.ops.read_reg(hw, IXGBE_LDPCECH,

sys/dev/pci/ixgbe/ixgbe_phy.c

1037

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe/ixgbe_phy.c

1075

hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/pci/ixgbe/ixgbe_phy.c

1090

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG,

sys/dev/pci/ixgbe/ixgbe_phy.c

1105

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,

sys/dev/pci/ixgbe/ixgbe_phy.c

1123

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,

sys/dev/pci/ixgbe/ixgbe_phy.c

1146

status = hw->phy.ops.read_reg(hw, TNX_FW_REV,

sys/dev/pci/ixgbe/ixgbe_phy.c

1165

status = hw->phy.ops.read_reg(hw, AQ_FW_REV,

sys/dev/pci/ixgbe/ixgbe_phy.c

1191

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,

sys/dev/pci/ixgbe/ixgbe_phy.c

1200

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL,

sys/dev/pci/ixgbe/ixgbe_phy.c

264

phy->ops.read_reg = ixgbe_read_phy_reg_generic;

sys/dev/pci/ixgbe/ixgbe_phy.c

2728

hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG,

sys/dev/pci/ixgbe/ixgbe_phy.c

2753

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_VENDOR_SPECIFIC_1_CONTROL,

sys/dev/pci/ixgbe/ixgbe_phy.c

310

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/pci/ixgbe/ixgbe_phy.c

416

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,

sys/dev/pci/ixgbe/ixgbe_phy.c

440

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_HIGH,

sys/dev/pci/ixgbe/ixgbe_phy.c

446

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_ID_LOW,

sys/dev/pci/ixgbe/ixgbe_phy.c

541

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe/ixgbe_phy.c

553

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe/ixgbe_phy.c

804

hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/pci/ixgbe/ixgbe_phy.c

817

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG,

sys/dev/pci/ixgbe/ixgbe_phy.c

847

hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG,

sys/dev/pci/ixgbe/ixgbe_phy.c

865

hw->phy.ops.read_reg(hw, MDIO_PMAPMD_CTRL1, MDIO_MMD_PMAPMD,

sys/dev/pci/ixgbe/ixgbe_phy.c

873

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,

sys/dev/pci/ixgbe/ixgbe_phy.c

886

hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL,

sys/dev/pci/ixgbe/ixgbe_phy.c

954

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_SPEED_ABILITY,

sys/dev/pci/ixgbe/ixgbe_type.h

4134

s32 (*read_reg)(struct ixgbe_hw *, u32, u32, u16 *);

sys/dev/pci/ixgbe/ixgbe_x540.c

350

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/pci/ixgbe/ixgbe_x550.c

2145

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,

sys/dev/pci/ixgbe/ixgbe_x550.c

2154

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_FLAG,

sys/dev/pci/ixgbe/ixgbe_x550.c

2164

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_ALARM_1,

sys/dev/pci/ixgbe/ixgbe_x550.c

2178

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_FAULT_MSG,

sys/dev/pci/ixgbe/ixgbe_x550.c

2194

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_CHIP_STD_INT_FLAG,

sys/dev/pci/ixgbe/ixgbe_x550.c

2202

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM2,

sys/dev/pci/ixgbe/ixgbe_x550.c

2244

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe/ixgbe_x550.c

2262

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK,

sys/dev/pci/ixgbe/ixgbe_x550.c

2280

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK,

sys/dev/pci/ixgbe/ixgbe_x550.c

2298

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK,

sys/dev/pci/ixgbe/ixgbe_x550.c

2472

hw->phy.ops.read_reg = ixgbe_read_phy_reg_x550a;

sys/dev/pci/ixgbe/ixgbe_x550.c

2483

hw->phy.ops.read_reg = ixgbe_read_phy_reg_x550a;

sys/dev/pci/ixgbe/ixgbe_x550.c

2517

phy->ops.read_reg = ixgbe_read_phy_reg_x550em;

sys/dev/pci/ixgbe/ixgbe_x550.c

2522

phy->ops.read_reg = ixgbe_read_phy_reg_x550em;

sys/dev/pci/ixgbe/ixgbe_x550.c

2533

phy->ops.read_reg = ixgbe_read_phy_reg_x550em;

sys/dev/pci/ixgbe/ixgbe_x550.c

2747

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe/ixgbe_x550.c

2759

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe/ixgbe_x550.c

2958

ret_val = hw->phy.ops.read_reg(hw, IXGBE_CS4227_EFUSE_PDF_SKU,

sys/dev/pci/ixgbe/ixgbe_x550.c

2976

ret_val = hw->phy.ops.read_reg(hw, reg_slice,

sys/dev/pci/ixgbe/ixgbe_x550.c

2993

ret_val = hw->phy.ops.read_reg(hw, reg_slice,

sys/dev/pci/ixgbe/ixgbe_x550.c

3143

ret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/pci/ixgbe/ixgbe_x550.c

3149

ret = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/pci/ixgbe/ixgbe_x550.c

3192

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe/ixgbe_x550.c

3851

hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_EXT_ABILITY,

sys/dev/pci/ixgbe/ixgbe_x550.c

4000

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_STAT,

sys/dev/pci/ixgbe/ixgbe_x550.c

4023

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_VENDOR_TX_ALARM,

sys/dev/pci/ixgbe/ixgbe_x550.c

4030

status = hw->phy.ops.read_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG,

sys/dev/pci/ixgbe/ixgbe_x550.c

4037

status = hw->phy.ops.read_reg(hw,

sys/dev/pci/ixgbe/ixgbe_x550.c

4071

status = hw->phy.ops.read_reg(hw, IXGBE_AUTO_NEG_LP_STATUS,

sys/dev/pci/ixgbe/ixgbe_x550.c

4703

status = hw->phy.ops.read_reg(hw, IXGBE_MDIO_AUTO_NEG_STATUS,

sys/dev/pci/ixgbe/ixgbe_x550.c

610

hw->phy.ops.read_reg = NULL;

sys/dev/podulebus/esp_podule.c

140

esc->sc_esp_glue.gl_read_reg = devices[i].read_reg;

sys/dev/podulebus/esp_podule.c

99

uint8_t (*read_reg)(struct ncr53c9x_softc *, int);

sys/dev/spi/bmx280thpspi.c

142

.read_reg = bmx280thpspi_read_reg,

sys/dev/spi/sc16is7xxspi.c

135

.read_reg = sc16is7xxspi_read_register,

sys/dev/usb/uchcom.c

503

return read_reg(sc, UCHCOM_REG_STAT1, rval, UCHCOM_REG_STAT2, NULL);

sys/dev/usb/uchcom.c

596

err = read_reg(sc, UCHCOM_REG_BREAK, &brk, UCHCOM_REG_LCR, &lcr);

sys/dev/usb/uchcom.c

702

err = read_reg(sc, UCHCOM_REG_LCR, &lcr, UCHCOM_REG_LCR2, &lcr2);