r4
#define THI r4
#define TLO r4
#define ATOMIC_OP_32(op) ATOMIC_OP_32_ARG(op,op,%r4)
#define ATOMIC_OP_32_NV(op) ATOMIC_OP_32_ARG_NV(op,op,%r4)
#define ATOMIC_OP_64(op) ATOMIC_OP_64_ARG(op,op,%r4)
#define ATOMIC_OP_64_NV(op) ATOMIC_OP_64_ARG_NV(op,op,%r4)
li %r4,-1 ;\
#define _DO_CERROR() lwz %r4,_C_LABEL(errno)@got(%r2) ;\
stw %r3,0(%r4) ;\
li %r4,-1 ;\
mov r0, r4; \
mov r0, r4; \
r4 = 6.89400381446725342846854215600008055e-01L,
q = one+y*(r1+y*(r2+y*(r3+y*(r4+y*(r5+y*(r6+y*(r7+y*(r8+
q = 1+y*(r1+y*(r2+y*(r3+y*(r4+y*(r5+y*(r6+y*r7))))));
p = r0+z*(r1+z*(r2+z*(r3+z*(r4+z*r5))));
r4 = 1.86459191715652901344e-02, /* 0x3F9317EA, 0x742ED475 */
q = one+y*(r1+y*(r2+y*(r3+y*(r4+y*(r5+y*r6)))));
q = one+y*(r1+y*(r2+y*(r3+y*(r4+y*(r5+y*r6)))));
r4 = 1.8645919859e-02, /* 0x3c98bf54 */
extern void os_readsysinfo(int what, int *r0, int *r1, int *r2, int *r3, int *r4);
r->r4 = st.st_size;
off_t off = r->r4;
r->r0 = r->r2 = r->r3 = r->r4 = r->r5 = 0;
r->r4 = st.st_size;
size_t skip = r->r4;
r->r4 = off;
uint32_t r0, r1, r2, r3, r4, r5, r6, r7;
register register_t r4 asm ("r4");
r4 = args[4];
"r" (r0), "r" (r1), "r" (r2), "r" (r3), "r" (r4) :
"r" (r0), "r" (r1), "r" (r2), "r" (r3), "r" (r4) :
ldr r0, [r4, #CI_INTR_DEPTH]/* Get current intr depth */ ;\
ldr r0, [r4, #CI_CPL] /* Get current priority level */;\
ldr r1, [r4, #CI_SOFTINTS] /* Get pending softint mask */ ;\
GET_CURX(r4, r5) /* r4 = curcpu, r5 = curlwp */ ;\
ldr r1, [r4, #CI_CTRL] /* Fetch control register */ ;\
2: ldr r1, [r4, #CI_CURLWP] /* get curlwp from cpu_info */ ;\
ldr r1, [r4, #CI_CTRL] /* Fetch control register */ ;\
GET_CURX(r4, r5) /* r4 = curcpu, r5 = curlwp */
str r4, [sp, #(TF_R4-TF_R6)]!; /* save callee-saved r4 */ \
push {r4-r11}; /* Push the callee saved registers */ \
push {r4-r7}; /* Push some of the callee saved registers */ \
ldr r4, [sp], #(TF_R6-TF_R4); /* restore callee-saved r4 */ \
pop {r4-r11}; /* pop the callee saved registers */ \
R(r2); R(r4); R(w2); R(w4);
volatile uint32_t r4;
mov.l @r14+, r4 /* tf_r4 */ ;\
TF(r4);
movd \arg, %r4
muld2 %r4, %r0 /* result *= arg */
clrq %r4 /* r4, r5 are 0 on finish */
int r4;
unsigned r0, r1, r2, r3, r4, r5; /* Registers saved when interrupt */
tramp.r0 = tramp.r1 = tramp.r2 = tramp.r3 = tramp.r4 = tramp.r5 = 0;
uint32_t r4 = P->r[4];
p0 = r0*k0 + 5*r4*k1 + 5*r3*k2 + 5*r2*k3 + 5*r1*k4;
p1 = r1*k0 + r0*k1 + 5*r4*k2 + 5*r3*k3 + 5*r2*k4;
p2 = r2*k0 + r1*k1 + r0*k2 + 5*r4*k3 + 5*r3*k4;
p3 = r3*k0 + r2*k1 + r1*k2 + r0*k3 + 5*r4*k4;
p4 = r4*k0 + r3*k1 + r2*k2 + r1*k3 + r0*k4;
uint64_t r0, r1, r2, r3, r4, r5, r6, r7;
r4 = (q4 >> 16) | (q4 << 48);
q[4] = q1 ^ q2 ^ q3 ^ q5 ^ r1 ^ r3 ^ r4 ^ r5 ^ r6 ^ r7 ^ rotr32(q1 ^ q2 ^ q4 ^ q5 ^ q7 ^ r1 ^ r4 ^ r5 ^ r6);
q[5] = q2 ^ q3 ^ q4 ^ q6 ^ r2 ^ r4 ^ r5 ^ r6 ^ r7 ^ rotr32(q2 ^ q3 ^ q5 ^ q6 ^ r2 ^ r5 ^ r6 ^ r7);
q[7] = q4 ^ q5 ^ q6 ^ r4 ^ r6 ^ r7 ^ rotr32(q4 ^ q5 ^ q7 ^ r4 ^ r7);
q[5] = q4 ^ r4 ^ r5 ^ rotr32(q5 ^ r5);
uint64_t r0, r1, r2, r3, r4, r5, r6, r7;
r4 = (q4 >> 16) | (q4 << 48);
q[4] = q3 ^ r3 ^ q7 ^ r7 ^ r4 ^ rotr32(q4 ^ r4);
uint32_t r0, r1, r2, r3, r4, r5, r6, r7;
r4 = (q4 >> 8) | (q4 << 24);
q[4] = q1 ^ q2 ^ q3 ^ q5 ^ r1 ^ r3 ^ r4 ^ r5 ^ r6 ^ r7 ^ rotr16(q1 ^ q2 ^ q4 ^ q5 ^ q7 ^ r1 ^ r4 ^ r5 ^ r6);
q[5] = q2 ^ q3 ^ q4 ^ q6 ^ r2 ^ r4 ^ r5 ^ r6 ^ r7 ^ rotr16(q2 ^ q3 ^ q5 ^ q6 ^ r2 ^ r5 ^ r6 ^ r7);
q[7] = q4 ^ q5 ^ q6 ^ r4 ^ r6 ^ r7 ^ rotr16(q4 ^ q5 ^ q7 ^ r4 ^ r7);
uint32_t r0, r1, r2, r3, r4, r5, r6, r7;
r4 = (q4 >> 8) | (q4 << 24);
q[4] = q3 ^ r3 ^ q7 ^ r7 ^ r4 ^ rotr16(q4 ^ r4);
q[5] = q4 ^ r4 ^ r5 ^ rotr16(q5 ^ r5);
__m128i r0, r1, r2, r3, r4, r5, r6, r7;
r4 = _mm_srli_epi32(q4, 8) | _mm_slli_epi32(q4, 24);
q[4] = q1 ^ q2 ^ q3 ^ q5 ^ r1 ^ r3 ^ r4 ^ r5 ^ r6 ^ r7 ^ rotr16(q1 ^ q2 ^ q4 ^ q5 ^ q7 ^ r1 ^ r4 ^ r5 ^ r6);
q[5] = q2 ^ q3 ^ q4 ^ q6 ^ r2 ^ r4 ^ r5 ^ r6 ^ r7 ^ rotr16(q2 ^ q3 ^ q5 ^ q6 ^ r2 ^ r5 ^ r6 ^ r7);
q[7] = q4 ^ q5 ^ q6 ^ r4 ^ r6 ^ r7 ^ rotr16(q4 ^ q5 ^ q7 ^ r4 ^ r7);
r4 = _mm_srli_epi32(q4, 8) | _mm_slli_epi32(q4, 24);
q[4] = q3 ^ r3 ^ q7 ^ r7 ^ r4 ^ rotr16(q4 ^ r4);
q[5] = q4 ^ r4 ^ r5 ^ rotr16(q5 ^ r5);
__m128i r0, r1, r2, r3, r4, r5, r6, r7;
int r1, r2, r3, r4, r5, r6;
r4 = pcic_read(h, mem_map_index[win].sysmem_stop_lsb);
"%02x%02x\n", win, r1, r2, r3, r4, r5, r6));
uint32_t r4;
r4 = nvme_read4(sc, NVME_CC);
printf("%s: cc 0x%04x\n", DEVNAME(sc), r4);
printf("%s: iocqes %u (%u)\n", DEVNAME(sc), NVME_CC_IOCQES_R(r4),
(1 << NVME_CC_IOCQES_R(r4)));
printf("%s: iosqes %u (%u)\n", DEVNAME(sc), NVME_CC_IOSQES_R(r4),
(1 << NVME_CC_IOSQES_R(r4)));
printf("%s: shn %u\n", DEVNAME(sc), NVME_CC_SHN_R(r4));
printf("%s: ams %u\n", DEVNAME(sc), NVME_CC_AMS_R(r4));
printf("%s: mps %u (%u)\n", DEVNAME(sc), NVME_CC_MPS_R(r4),
(1 << NVME_CC_MPS_R(r4)));
printf("%s: css %u\n", DEVNAME(sc), NVME_CC_CSS_R(r4));
printf("%s: en %u\n", DEVNAME(sc), ISSET(r4, NVME_CC_EN) ? 1 : 0);
r4 = nvme_read4(sc, NVME_CSTS);
printf("%s: csts 0x%08x\n", DEVNAME(sc), r4);
printf("%s: rdy %u\n", DEVNAME(sc), r4 & NVME_CSTS_RDY);
printf("%s: cfs %u\n", DEVNAME(sc), r4 & NVME_CSTS_CFS);
printf("%s: shst %x\n", DEVNAME(sc), r4 & NVME_CSTS_SHST_MASK);
r4 = nvme_read4(sc, NVME_AQA);
printf("%s: aqa 0x%08x\n", DEVNAME(sc), r4);
printf("%s: acqs %u\n", DEVNAME(sc), NVME_AQA_ACQS_R(r4));
printf("%s: asqs %u\n", DEVNAME(sc), NVME_AQA_ASQS_R(r4));
rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4);
uint32_t r4;
uint32_t r1, r2, r3, r4;
rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
uint32_t r1, r2, r3, r4;
uint32_t r2, r3, r4;
r4 = rfprog[i].r4 | sc->freq << 13 | txpow2 << 4;
rt2860_rf_write(sc, RT2860_RF4, r4);
rt2860_rf_write(sc, RT2860_RF4, r4);
rt2860_rf_write(sc, RT2860_RF4, r4);
int32_t r1, r2, r3, r4, temp;
r4 = le32toh(sc->rawtemp);
r4 = ((r4 & 0xffffff) ^ 0x800000) - 0x800000;
temp = (259 * (r4 - r2)) / (r3 - r1);
int r1, r2, r3, r4, r5, r6, r7 = 0;
r4 = Pcic_read(sc, regbase_win + PCIC_SMM_STOP_HIGH);
"%02x%02x", win, r1, r2, r3, r4, r5, r6);
rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
uint32_t r1, r2, r3, r4;
uint32_t r2, r3, r4;
r4 = rfprog[i].r4 | sc->freq << 13 | txpow2 << 4;
run_rt2870_rf_write(sc, RT2860_RF4, r4);
run_rt2870_rf_write(sc, RT2860_RF4, r4);
run_rt2870_rf_write(sc, RT2860_RF4, r4);
uint32_t r1, r2, r3, r4;
ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
uint32_t r4;
register long r4 __asm("r4") = nonnull(4);
"+r"(r4),
register long r4 __asm("r4") = nonnull(4);
"+r"(r4),
register long r4 __asm("r4") = nonnull(4);
"+r"(r4),
register long r4 __asm("r4") = nonnull(4);
"+r"(r4),