sys/arch/evbmips/cavium/machdep.c

220

btinfo_paddr = mips3_ld(arg3 + OCTEON_BTINFO_PADDR_OFFSET);

sys/arch/evbmips/cavium/machdep.c

273

uint64_t wdog = mips3_ld(wdog_reg);

sys/arch/evbmips/sbmips/cpu.c

58

#define READ_REG(rp) mips3_ld((register_t)(rp))

sys/arch/evbmips/sbmips/rtc.c

420

#define READ_REG(rp) mips3_ld((register_t)(MIPS_PHYS_TO_KSEG1(rp)))

sys/arch/evbmips/sbmips/sb1250_icu.c

93

#define READ_REG(rp) mips3_ld((register_t)(rp))

sys/arch/mips/cavium/octeon_cpunode.c

373

uint64_t wdog = mips3_ld(cpu->cpu_wdog);

sys/arch/mips/cavium/octeon_cpunode.c

404

uint64_t wdog = mips3_ld(cpu->cpu_wdog);

sys/arch/mips/cavium/octeon_intr.c

489

const uint64_t sum1 = mips3_ld(cpu->cpu_int_sum1);

sys/arch/mips/cavium/octeon_intr.c

492

hwpend[0] = mips3_ld(cpu->cpu_ip4_sum0)

sys/arch/mips/cavium/octeon_intr.c

496

hwpend[0] = mips3_ld(cpu->cpu_ip3_sum0)

sys/arch/mips/cavium/octeon_intr.c

500

hwpend[0] = mips3_ld(cpu->cpu_ip2_sum0)

sys/arch/mips/cavium/octeon_intr.c

548

ipi_mask &= mips3_ld(cpu->cpu_mbox_set);

sys/arch/mips/cavium/octeonvar.h

282

return mips3_ld(MIPS_PHYS_TO_XKPHYS(OCTEON_CCA_NONE, address));

sys/arch/mips/include/locore.h

476

uint64_t mips3_ld(register_t addr);

sys/arch/mips/include/locore.h

479

static inline uint64_t mips3_ld(register_t addr) __unused;

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1007

return (uint32_t)mips3_ld(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

1018

return mips3_ld(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

707

const CHIP_TYPE val = mips3_ld(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

729

const CHIP_TYPE val = mips3_ld(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

749

const CHIP_TYPE val = mips3_ld(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

766

const uint64_t r = CHIP_SWAP64(mips3_ld(h) >> shift);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

979

return (uint8_t)mips3_ld(h);

sys/arch/mips/mips/bus_space_alignstride_chipdep.c

994

return (uint16_t)mips3_ld(h);

sys/arch/mips/sibyte/dev/sbbuswatch.c

43

#define READ_REG(rp) mips3_ld((register_t)(rp))

sys/arch/mips/sibyte/dev/sbgbus.c

137

rv = mips3_ld((volatile uint64_t *)MIPS_PHYS_TO_KSEG1(

sys/arch/mips/sibyte/dev/sbgbus.c

141

rv = mips3_ld((volatile uint64_t *)MIPS_PHYS_TO_KSEG1(

sys/arch/mips/sibyte/dev/sbjcn.c

238

#define READ_REG(rp) (mips3_ld((volatile uint64_t *)(rp)))

sys/arch/mips/sibyte/dev/sbmac.c

115

#define SBMAC_READCSR(t) mips3_ld((register_t)(t))

sys/arch/mips/sibyte/dev/sbobio.c

183

sysrev = mips3_ld((register_t)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_REVISION));

sys/arch/mips/sibyte/dev/sbobio.c

208

sysrev = mips3_ld((register_t)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_REVISION));

sys/arch/mips/sibyte/dev/sbscn.c

247

#define READ_REG(rp) (mips3_ld((register_t)(rp)))

sys/arch/mips/sibyte/dev/sbtimer.c

61

#define READ_REG(rp) mips3_ld((register_t)(rp))

sys/arch/mips/sibyte/dev/sbwdog.c

81

#define READ_REG(rp) (mips3_ld((register_t)(rp)))

sys/arch/mips/sibyte/pci/sbbrz.c

177

regval = mips3_ld((register_t)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG));

sys/arch/mips/sibyte/pci/sbbrz_pci.c

150

regval = mips3_ld((register_t)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG));

sys/arch/mips/sibyte/pci/sbbrz_pci.c

197

return mips3_ld(addr);

sys/arch/mips/sibyte/pci/sbpcihb.c

85

regval = mips3_ld((void *)MIPS_PHYS_TO_KSEG0(A_SCD_SYSTEM_CFG));

sys/arch/sbmips/sbmips/cpu.c

57

#define READ_REG(rp) mips3_ld((register_t)(rp))

sys/arch/sbmips/sbmips/rtc.c

420

#define READ_REG(rp) mips3_ld((register_t)(MIPS_PHYS_TO_KSEG1(rp)))

sys/arch/sbmips/sbmips/sb1250_icu.c

93

#define READ_REG(rp) mips3_ld((register_t)(rp))

sys/arch/sgimips/mace/mace.c

320

isa_irq = mips3_ld(MIPS_PHYS_TO_KSEG1(MACE_BASE