_REG_PC
u->uc_mcontext.__gregs[_REG_PC] = (__greg_t)(uintptr_t)start;
gr[_REG_PC] = (__greg_t)(uintptr_t)func;
uc.uc_mcontext.__gregs[_REG_PC] = sc->sc_pc;
gr[_REG_PC] = (unsigned long)start;
gr[_REG_PC] = (__greg_t)func;
u->uc_mcontext.__gregs[_REG_PC] = (__greg_t)(uintptr_t)start;
gr[_REG_PC] = (__greg_t)(uintptr_t)func;
gr[_REG_PC] = (unsigned long)start;
u->uc_mcontext.__gregs[_REG_PC] = (int)start;
uc.uc_mcontext.__gregs[_REG_PC] = sc->sc_pc;
mcp->__gregs[_REG_PC] = (__greg_t)func;
u->uc_mcontext.__gregs[_REG_PC] = (uintptr_t)start; /* PC */
gr[_REG_PC] = (uintptr_t)func;
gr[_REG_PC] = (__greg_t)func;
gr[_REG_PC] = (__greg_t)func; // XXX -- this is the descriptor address!
u->uc_mcontext.__gregs[_REG_PC] = (uintptr_t)start; /* PC */
gr[_REG_PC] = (uintptr_t)func;
u->uc_mcontext.__gregs[_REG_PC] = (__greg_t) start;
gr[_REG_PC] = (__greg_t)func;
gr[_REG_PC] = (ulong) start;
uc.uc_mcontext.__gregs[_REG_PC] = sc->sc_pc;
gr[_REG_PC] = (__greg_t)func;
gr[_REG_PC] = (ulong) start;
uc.uc_mcontext.__gregs[_REG_PC] = sc->sc_pc;
gr[_REG_PC] = (__greg_t)func;
uc.uc_mcontext.__gregs[_REG_PC] = jb->jb_sc.sc_pc;
gr[_REG_PC] = (__greg_t)(uintptr_t)start + 2;
gr[_REG_PC] = (__greg_t)(uintptr_t)func+2;
|| (mcp->__gregs[_REG_PC] & 3))
CTASSERT(offsetof(struct reg, r_pc) == _REG_PC * sizeof(__greg_t));
gr[_REG_PC] = frame->tf_regs[FRAME_PC];
(void *) gr[_REG_PC])) != -1)
gr[_REG_PC] = ras_pc;
frame->tf_regs[FRAME_PC] = gr[_REG_PC];
#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
gr[_REG_PC] = tf->tf_pc;
(void *) gr[_REG_PC])) != -1)
gr[_REG_PC] = ras_pc;
tf->tf_pc = gr[_REG_PC];
#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
gr[_REG_PC] = frame->f_pc;
(void *) gr[_REG_PC])) != -1)
gr[_REG_PC] = ras_pc;
frame->f_pc = gr[_REG_PC];
#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
gr[_REG_PC] = tf->tf_srr0;
tf->tf_srr0 = gr[_REG_PC];
#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
if ((int32_t) mcp->__gregs[_REG_PC] < 0
|| (mcp->__gregs[_REG_PC] & 1))
tf->tf_pc = (int32_t) gr[_REG_PC];
mcp->__gregs[_REG_PC] = tf->tf_pc;
if ((intptr_t) mcp->__gregs[_REG_PC] < 0
|| (mcp->__gregs[_REG_PC] & 1))
#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
gr[_REG_PC] = tf->tf_spc;
(void *) gr[_REG_PC])) != -1)
gr[_REG_PC] = ras_pc;
tf->tf_spc = gr[_REG_PC];
#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
(uc)->uc_mcontext.__gregs[_REG_PC] = (pc); \
r[_REG_PC] = tf->tf_pc;
(void *) r[_REG_PC])) != -1) {
r[_REG_PC] = ras_pc;
if (((gr[_REG_PC] | gr[_REG_nPC]) & 3) != 0 ||
gr[_REG_PC] == 0 || gr[_REG_nPC] == 0)
tf->tf_pc = r[_REG_PC];
gr[_REG_PC] = tf->tf_pc;
(void *) gr[_REG_PC])) != -1) {
gr[_REG_PC] = ras_pc;
if (((gr[_REG_PC] | gr[_REG_nPC]) & 3) != 0 ||
gr[_REG_PC] == 0 || gr[_REG_nPC] == 0)
tf->tf_pc = (uint64_t)gr[_REG_PC];
gr[_REG_PC] = tf->tf_pc;
if (((gr[_REG_PC] | gr[_REG_nPC]) & 3) != 0 ||
gr[_REG_PC] == 0 || gr[_REG_nPC] == 0)
tf->tf_pc = (uint64_t)gr[_REG_PC];
#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC])
gr[_REG_PC] = tf->tf_pc;
tf->tf_pc = gr[_REG_PC];
uc->uc_mcontext.__gregs[_REG_PC] = ctx->pc;
ctx->pc = uc.uc_mcontext.__gregs[_REG_PC];
uc->uc_mcontext.__gregs[_REG_PC] |= 0x1f /*PSR_SYS32_MODE*/;
uc->uc_mcontext.__gregs[_REG_PC] = 0x100002;
uc->uc_mcontext.__gregs[_REG_PC] = 0;