PMAP_NOCACHE
case PMAP_NOCACHE:
case PMAP_NOCACHE:
pflag = PMAP_NOCACHE;
case PMAP_NOCACHE:
VM_PROT_READ, PMAP_NOCACHE);
L1_S_SIZE, VM_PROT_READ|VM_PROT_WRITE, PMAP_NOCACHE);
pmap_flags |= PMAP_NOCACHE;
if (!(flags & PMAP_NOCACHE))
case PMAP_NOCACHE:
case PMAP_NOCACHE:
: PMAP_NOCACHE;
: PMAP_NOCACHE;
: PMAP_NOCACHE;
(flag & BUS_SPACE_MAP_CACHEABLE) ? 0 : PMAP_NOCACHE);
: PMAP_NOCACHE;
: PMAP_NOCACHE;
: PMAP_NOCACHE;
: PMAP_NOCACHE;
: PMAP_NOCACHE;
: PMAP_NOCACHE;
: PMAP_NOCACHE;
PMAP_NOCACHE),
PMAP_NOCACHE),
PMAP_NOCACHE),
PMAP_NOCACHE),
PMAP_NOCACHE),
PMAP_NOCACHE),
PMAP_NOCACHE),
PMAP_NOCACHE),
PMAP_NOCACHE),
: PMAP_NOCACHE;
: PMAP_NOCACHE;
: PMAP_NOCACHE;
: PMAP_NOCACHE;
VM_PROT_READ|VM_PROT_WRITE, PMAP_NOCACHE);
PMAP_NOCACHE);
PMAP_NOCACHE);
VM_PROT_READ | VM_PROT_WRITE, PMAP_NOCACHE);
hppa_cpu_hastlbu_p() ? PMAP_NOCACHE : 0;
if (IS_IOPAGE_P(pa) || (flags & PMAP_NOCACHE))
(flags & PMAP_NOCACHE) != 0, (flags & PMAP_WRITE_COMBINE) != 0,
case PMAP_NOCACHE:
: PMAP_NOCACHE;
if (__predict_false(flags & PMAP_NOCACHE)) {
cacheable = !(cacheable & PMAP_NOCACHE);
((flags & BUS_DMA_COHERENT) ? PMAP_NOCACHE : 0);
PMAP_NOCACHE);
*out_flags = PMAP_NOCACHE;
*out_flags = PMAP_NOCACHE;
pt_entry_t *pte_proto = (flags & PMAP_NOCACHE) ? pmap_pte_proto_ci
flags |= PMAP_NOCACHE;
(pte_ci_p(pte) ? PMAP_NOCACHE : 0);
const int flags = MMU_IS_HP_CLASS ? PMAP_NOCACHE|PMAP_WIRED
const int flags = MMU_IS_HP_CLASS ? PMAP_NOCACHE|PMAP_WIRED
PMAP_WIRED | PMAP_NOCACHE);
PMAP_WIRED | PMAP_NOCACHE);
*flagsp = PMAP_NOCACHE;
UVM_PROT_READ | UVM_PROT_WRITE, PMAP_NOCACHE);
if (flags & PMAP_NOCACHE) {
*flagsp = PMAP_NOCACHE;
: (PMAP_WIRED | PMAP_NOCACHE);
| ((flags & PMAP_NOCACHE) ? MIPS3_PG_UNCACHED : MIPS3_PG_CACHED)
| ((flags & PMAP_NOCACHE) ? MIPS1_PG_N : 0)
const bool cached = (flags & PMAP_NOCACHE) == 0
prefetchable ? 0 : PMAP_NOCACHE);
prefetchable ? 0 : PMAP_NOCACHE);
KASSERT((flags & (PMAP_NOCACHE | PME_WRITETHROUG)) !=
(PMAP_NOCACHE | PME_WRITETHROUG));
if (flags & PMAP_NOCACHE) {
KASSERT((flags & (PMAP_NOCACHE | PME_WRITETHROUG)) !=
(PMAP_NOCACHE | PME_WRITETHROUG));
if (flags & PMAP_NOCACHE)
if (__predict_false(flags & PMAP_NOCACHE)) {
PMAP_NOCACHE | (prefetchable ? PMAP_MD_PREFETCHABLE : 0));
PMAP_NOCACHE | PMAP_WIRED);
if ((flags & PMAP_NOCACHE) == 0) {
if ((flags & PMAP_NOCACHE) == 0) {
u_int flags = PMAP_NOCACHE;
flags &= ~PMAP_NOCACHE;
(PPC_DMAMEM_UNCACHED(flags) ? PMAP_NOCACHE : 0));
pmap_flags |= PMAP_NOCACHE;
} else if (flags & PMAP_NOCACHE) {
flags |= PMAP_NOCACHE;
if ((flags & PMAP_NOCACHE) != 0)
pmapflags |= PMAP_NOCACHE;
pmapflags = PMAP_NOCACHE;
flags |= PMAP_NOCACHE;
case PMAP_NOCACHE:
case PMAP_NOCACHE:
case PMAP_NOCACHE:
if (flags & PMAP_NOCACHE)
pmap_kenter_pa(va, base, VM_PROT_READ|VM_PROT_WRITE, PMAP_NOCACHE);
flags |= PMAP_NOCACHE;
flags |= PMAP_NOCACHE;
flags |= PMAP_NOCACHE;
if ((flags & PMAP_NOCACHE) == 0 && !PMAP_PAGE_COLOROK_P(pa, va))