sys/arch/arm/broadcom/bcm53xx_pax.c
163
bcmpax_conf_write(sc, 0, PCI_MAPREG_START+4, iwin1_start);
sys/arch/arm/broadcom/bcm53xx_pax.c
173
bcmpax_conf_write(sc, 0, PCI_MAPREG_START+8, iwin2_start);
sys/arch/arm/s3c2xx0/s3c2800_pci.c
607
bus_space_write_4(iot, ioh, PCI_MAPREG_START,
sys/arch/arm/s3c2xx0/s3c2800_pci.c
613
bus_space_write_4(iot, ioh, PCI_MAPREG_START,
sys/arch/arm/s3c2xx0/s3c2800_pci.c
615
bus_space_write_4(iot, ioh, PCI_MAPREG_START + 4,
sys/arch/arm/xscale/becc.c
119
becc_pcicore_write(sc, PCI_MAPREG_START + 0,
sys/arch/arm/xscale/becc.c
122
reg = becc_pcicore_read(sc, PCI_MAPREG_START + 0);
sys/arch/arm/xscale/becc.c
125
becc_pcicore_write(sc, PCI_MAPREG_START + 4,
sys/arch/arm/xscale/becc.c
128
reg = becc_pcicore_read(sc, PCI_MAPREG_START + 4);
sys/arch/arm/xscale/becc.c
135
becc_pcicore_write(sc, PCI_MAPREG_START + 8,
sys/arch/arm/xscale/becc.c
138
reg = becc_pcicore_read(sc, PCI_MAPREG_START + 8);
sys/arch/arm/xscale/i80312.c
173
PCI_MAPREG_START, sc->sc_pin_base);
sys/arch/arm/xscale/i80321.c
126
PCI_MAPREG_START, sc->sc_iwin[0].iwin_base_lo);
sys/arch/arm/xscale/i80321.c
128
PCI_MAPREG_START + 0x04, sc->sc_iwin[0].iwin_base_hi);
sys/arch/arm/xscale/i80321.c
131
sc->sc_atu_sh, PCI_MAPREG_START);
sys/arch/arm/xscale/i80321.c
133
sc->sc_atu_sh, PCI_MAPREG_START + 0x04);
sys/arch/arm/xscale/i80321.c
143
PCI_MAPREG_START + 0x08, sc->sc_iwin[1].iwin_base_lo);
sys/arch/arm/xscale/i80321.c
145
PCI_MAPREG_START + 0x0c, sc->sc_iwin[1].iwin_base_hi);
sys/arch/arm/xscale/i80321.c
148
sc->sc_atu_sh, PCI_MAPREG_START + 0x08);
sys/arch/arm/xscale/i80321.c
150
sc->sc_atu_sh, PCI_MAPREG_START + 0x0c);
sys/arch/arm/xscale/i80321.c
161
PCI_MAPREG_START + 0x10, sc->sc_iwin[2].iwin_base_lo);
sys/arch/arm/xscale/i80321.c
163
PCI_MAPREG_START + 0x14, sc->sc_iwin[2].iwin_base_hi);
sys/arch/arm/xscale/i80321.c
166
sc->sc_atu_sh, PCI_MAPREG_START + 0x10);
sys/arch/arm/xscale/i80321.c
168
sc->sc_atu_sh, PCI_MAPREG_START + 0x14);
sys/arch/atari/pci/pci_hades.c
235
pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
sys/arch/atari/pci/pci_machdep.c
386
for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
sys/arch/atari/pci/pci_milan.c
176
pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
sys/arch/atari/pci/pci_tseng.c
89
pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
sys/arch/atari/pci/pci_tseng.c
91
pci_conf_write(pc, tag, PCI_MAPREG_START + 4,
sys/arch/bebox/bebox/autoconf.c
183
bar0 = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
sys/arch/bebox/stand/boot/pci.c
74
#define BAR_BASE (PCI_MAPREG_START >> 2)
sys/arch/dreamcast/dev/g2/gapspci_pci.c
106
PCI_MAPREG_START + 4, 0x01000000);
sys/arch/dreamcast/dev/g2/gapspci_pci.c
165
if (reg == (PCI_MAPREG_START + 4)) {
sys/arch/dreamcast/dev/g2/gapspci_pci.c
188
if (reg == (PCI_MAPREG_START + 4) && val != 0x01000000)
sys/arch/evbarm/hdl_g/i80321_mainbus.c
123
b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
sys/arch/evbarm/hdl_g/i80321_mainbus.c
124
b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
sys/arch/evbarm/hdl_g/i80321_mainbus.c
125
b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
sys/arch/evbarm/hdl_g/i80321_mainbus.c
126
b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
sys/arch/evbarm/iq80321/i80321_mainbus.c
140
b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
sys/arch/evbarm/iq80321/i80321_mainbus.c
141
b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
sys/arch/evbarm/iq80321/i80321_mainbus.c
142
b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
sys/arch/evbarm/iq80321/i80321_mainbus.c
143
b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
sys/arch/evbarm/iyonix/autoconf.c
145
bar0 = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
sys/arch/evbarm/iyonix/autoconf.c
147
PCI_MAPREG_START + 0x04);
sys/arch/evbarm/iyonix/i80321_mainbus.c
139
b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
sys/arch/evbarm/iyonix/i80321_mainbus.c
140
b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
sys/arch/evbarm/iyonix/i80321_mainbus.c
141
b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
sys/arch/evbarm/iyonix/i80321_mainbus.c
142
b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
sys/arch/evbarm/stand/board/becc_mem.c
60
#define BECC_SDRAM_BAR (PCI_MAPREG_START + 0x08)
sys/arch/evbmips/gdium/gdium_genfb.c
81
PCI_MAPREG_START);
sys/arch/evbmips/gdium/machdep.c
159
v = pci_conf_read(pba->pba_pc, high_dev, PCI_MAPREG_START);
sys/arch/evbmips/gdium/machdep.c
165
pci_mapreg_info(pba->pba_pc, high_dev, PCI_MAPREG_START,
sys/arch/evbmips/gdium/machdep.c
167
pci_mapreg_info(pba->pba_pc, ralink_dev, PCI_MAPREG_START,
sys/arch/evbmips/gdium/machdep.c
178
pci_conf_write(pba->pba_pc, ralink_dev, PCI_MAPREG_START, v);
sys/arch/evbmips/loongson/dev/glx.c
337
static const pcireg_t pcib_bar_sizes[(4 + PCI_MAPREG_END - PCI_MAPREG_START) / 4] = {
sys/arch/evbmips/loongson/dev/glx.c
346
static pcireg_t pcib_bar_values[(4 + PCI_MAPREG_END - PCI_MAPREG_START) / 4];
sys/arch/evbmips/loongson/dev/glx.c
348
static const uint64_t pcib_bar_msr[(4 + PCI_MAPREG_END - PCI_MAPREG_START) / 4] = {
sys/arch/evbmips/loongson/dev/glx.c
388
case PCI_MAPREG_START + 0x00:
sys/arch/evbmips/loongson/dev/glx.c
389
case PCI_MAPREG_START + 0x04:
sys/arch/evbmips/loongson/dev/glx.c
390
case PCI_MAPREG_START + 0x08:
sys/arch/evbmips/loongson/dev/glx.c
391
case PCI_MAPREG_START + 0x0c:
sys/arch/evbmips/loongson/dev/glx.c
392
case PCI_MAPREG_START + 0x10:
sys/arch/evbmips/loongson/dev/glx.c
393
case PCI_MAPREG_START + 0x14:
sys/arch/evbmips/loongson/dev/glx.c
394
case PCI_MAPREG_START + 0x18:
sys/arch/evbmips/loongson/dev/glx.c
395
index = (reg - PCI_MAPREG_START) / 4;
sys/arch/evbmips/loongson/dev/glx.c
452
case PCI_MAPREG_START + 0x00:
sys/arch/evbmips/loongson/dev/glx.c
453
case PCI_MAPREG_START + 0x04:
sys/arch/evbmips/loongson/dev/glx.c
454
case PCI_MAPREG_START + 0x08:
sys/arch/evbmips/loongson/dev/glx.c
455
case PCI_MAPREG_START + 0x0c:
sys/arch/evbmips/loongson/dev/glx.c
456
case PCI_MAPREG_START + 0x10:
sys/arch/evbmips/loongson/dev/glx.c
457
case PCI_MAPREG_START + 0x14:
sys/arch/evbmips/loongson/dev/glx.c
458
case PCI_MAPREG_START + 0x18:
sys/arch/evbmips/loongson/dev/glx.c
459
index = (reg - PCI_MAPREG_START) / 4;
sys/arch/evbmips/loongson/dev/glx.c
515
case PCI_MAPREG_START + 0x10:
sys/arch/evbmips/loongson/dev/glx.c
571
case PCI_MAPREG_START + 0x10:
sys/arch/evbmips/loongson/dev/glx.c
640
case PCI_MAPREG_START:
sys/arch/evbmips/loongson/dev/glx.c
683
case PCI_MAPREG_START:
sys/arch/evbmips/loongson/dev/glx.c
743
case PCI_MAPREG_START + 0x00:
sys/arch/evbmips/loongson/dev/glx.c
795
case PCI_MAPREG_START + 0x00:
sys/arch/evbmips/loongson/dev/glx.c
863
case PCI_MAPREG_START + 0x00:
sys/arch/evbmips/loongson/dev/glx.c
920
case PCI_MAPREG_START + 0x00:
sys/arch/evbmips/loongson/gdium_machdep.c
119
for (bar = PCI_MAPREG_START; bar < PCI_MAPREG_END; bar += 4)
sys/arch/evbmips/loongson/gdium_machdep.c
128
pci_conf_write(pc, tag, PCI_MAPREG_START, 0x06228000);
sys/arch/evbmips/loongson/gdium_machdep.c
355
reg = pci_conf_read(pc, tag, PCI_MAPREG_START);
sys/arch/hpcmips/dev/mq200_pci.c
100
res = pci_mapreg_info(psc->sc_pc, psc->sc_pcitag, PCI_MAPREG_START+4,
sys/arch/hpcmips/dev/mq200_pci.c
92
res = pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
sys/arch/hpcmips/vr/vrc4172pci.c
270
reg == PCI_MAPREG_START) {
sys/arch/hpcmips/vr/vrc4172pci.c
305
reg == PCI_MAPREG_START) {
sys/arch/hpcmips/vr/vrpciu.c
317
pci_conf_write(pc, pci_make_tag(pc, 0, 0, 0), PCI_MAPREG_START,
sys/arch/hpcmips/vr/vrpciu.c
319
pci_conf_write(pc, pci_make_tag(pc, 0, 1, 0), PCI_MAPREG_START,
sys/arch/hppa/dev/sti_pci_machdep.c
121
if (bar < PCI_MAPREG_START || bar > PCI_MAPREG_PPB_END) {
sys/arch/hppa/dev/sti_pci_machdep.c
77
for (bar = PCI_MAPREG_START; bar <= PCI_MAPREG_PPB_END; ) {
sys/arch/i386/pci/glxsb.c
224
if (pci_mapreg_map(pa, PCI_MAPREG_START,
sys/arch/iyonix/iyonix/autoconf.c
145
bar0 = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
sys/arch/iyonix/iyonix/autoconf.c
147
PCI_MAPREG_START + 0x04);
sys/arch/iyonix/iyonix/i80321_mainbus.c
139
b0l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x0);
sys/arch/iyonix/iyonix/i80321_mainbus.c
140
b0u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x4);
sys/arch/iyonix/iyonix/i80321_mainbus.c
141
b1l = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0x8);
sys/arch/iyonix/iyonix/i80321_mainbus.c
142
b1u = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, PCI_MAPREG_START+0xc);
sys/arch/mips/adm5120/dev/admpci.c
229
pci_conf_read(&sc->sc_pc, tag, PCI_MAPREG_START));
sys/arch/prep/stand/boot/pci.c
62
#define BAR_BASE (PCI_MAPREG_START >> 2)
sys/arch/sparc/dev/ebus.c
356
if (ea->ea_reg[n].hi < PCI_MAPREG_START) {
sys/arch/sparc/dev/ebus.c
357
ea->ea_reg[n].hi = PCI_MAPREG_START
sys/arch/x86/pci/pci_addr_fixup.c
181
reg_start = PCI_MAPREG_START;
sys/arch/x86/pci/pci_addr_fixup.c
185
reg_start = PCI_MAPREG_START;
sys/arch/x86/pci/pci_addr_fixup.c
189
reg_start = PCI_MAPREG_START;
sys/arch/xen/xen/pciback.c
244
PCI_MAPREG_START + i * 4);
sys/arch/xen/xen/pciback.c
245
if (pci_mapreg_map(pa, PCI_MAPREG_START + i * 4,
sys/arch/xen/xen/pciback.c
85
#define PCI_NBARS ((PCI_MAPREG_END - PCI_MAPREG_START) / 4)
sys/arch/xen/xen/xpci_xenbus.c
595
for (reg = PCI_MAPREG_START;
sys/dev/cardbus/cardbus_map.c
148
(reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3))) {
sys/dev/cardbus/cardbus_map.c
88
if(reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3)) {
sys/dev/cardbus/sdhc_cardbus.c
158
if (Cardbus_mapreg_map(ct, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM, 0,
sys/dev/ic/aic6915reg.h
236
#define SF_PCI_MEMBA (PCI_MAPREG_START + 0x00)
sys/dev/ic/aic6915reg.h
237
#define SF_PCI_IOBA (PCI_MAPREG_START + 0x08)
sys/dev/ic/aic79xxvar.h
1319
#define AHD_PCI_IOADDR0 PCI_MAPREG_START /* I/O BAR*/
sys/dev/ic/aic79xxvar.h
1320
#define AHD_PCI_MEMADDR (PCI_MAPREG_START + 4) /* Memory BAR */
sys/dev/ic/aic79xxvar.h
1321
#define AHD_PCI_IOADDR1 (PCI_MAPREG_START + 12)/* Second I/O BAR */
sys/dev/pci/aac_pci.c
576
if (pci_mapreg_map(pa, PCI_MAPREG_START,
sys/dev/pci/ahc_pci.c
75
#define AHC_PCI_IOADDR PCI_MAPREG_START /* I/O Address */
sys/dev/pci/ahc_pci.c
76
#define AHC_PCI_MEMADDR (PCI_MAPREG_START + 4) /* Mem I/O Address */
sys/dev/pci/ahd_pci.c
55
#define AHD_PCI_IOADDR PCI_MAPREG_START /* I/O Address */
sys/dev/pci/ahd_pci.c
56
#define AHD_PCI_MEMADDR (PCI_MAPREG_START + 4) /* Mem I/O Address */
sys/dev/pci/arcmsrvar.h
24
#define ARC_PCI_BAR PCI_MAPREG_START
sys/dev/pci/bktr/bktr_os.c
1420
retval = pci_mem_find(pc, pa->pa_tag, PCI_MAPREG_START,
sys/dev/pci/bktr/bktr_os.c
1482
retval = pci_mapreg_map(pa, PCI_MAPREG_START,
sys/dev/pci/bochsfb.c
131
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
sys/dev/pci/bochsfb.c
140
if (pci_mapreg_map(pa, PCI_MAPREG_START + 8, PCI_MAPREG_TYPE_MEM,
sys/dev/pci/cmpcireg.h
45
#define CMPCI_PCI_IOBASEREG (PCI_MAPREG_START)
sys/dev/pci/cxgb/cxgb_main.c
345
sc->regs_rid = PCI_MAPREG_START;
sys/dev/pci/cxgb/cxgb_main.c
346
t3_os_pci_read_config_4(sc, PCI_MAPREG_START, ®);
sys/dev/pci/gcscaudio.c
281
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
sys/dev/pci/genfb_pci.c
156
for (bar = PCI_MAPREG_START; bar <= PCI_MAPREG_ROM; bar += 4) {
sys/dev/pci/genfb_pci.c
163
sc->sc_bars[(bar - PCI_MAPREG_START) >> 2] = rom;
sys/dev/pci/hifn7751reg.h
51
#define HIFN_BAR0 (PCI_MAPREG_START + 0) /* PUC register map */
sys/dev/pci/hifn7751reg.h
52
#define HIFN_BAR1 (PCI_MAPREG_START + 4) /* DMA register map */
sys/dev/pci/ibmcd.c
106
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
sys/dev/pci/ibmcd.c
107
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &sc->sc_iot,
sys/dev/pci/if_bwfm_pci.c
418
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x00,
sys/dev/pci/if_bwfm_pci.c
425
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
sys/dev/pci/if_cas.c
235
address = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
sys/dev/pci/if_cas.c
237
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START, address);
sys/dev/pci/if_fxp_pci.c
273
pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x0,
sys/dev/pci/if_fxp_pci.c
274
psc->psc_regs[(PCI_MAPREG_START+0x0)>>2]);
sys/dev/pci/if_fxp_pci.c
275
pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x4,
sys/dev/pci/if_fxp_pci.c
276
psc->psc_regs[(PCI_MAPREG_START+0x4)>>2]);
sys/dev/pci/if_fxp_pci.c
277
pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x8,
sys/dev/pci/if_fxp_pci.c
278
psc->psc_regs[(PCI_MAPREG_START+0x8)>>2]);
sys/dev/pci/if_fxp_pci.c
501
psc->psc_regs[(PCI_MAPREG_START+0x0)>>2] =
sys/dev/pci/if_fxp_pci.c
502
pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x0);
sys/dev/pci/if_fxp_pci.c
503
psc->psc_regs[(PCI_MAPREG_START+0x4)>>2] =
sys/dev/pci/if_fxp_pci.c
504
pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x4);
sys/dev/pci/if_fxp_pci.c
505
psc->psc_regs[(PCI_MAPREG_START+0x8)>>2] =
sys/dev/pci/if_fxp_pci.c
506
pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x8);
sys/dev/pci/if_gem_pci.c
216
#define PCI_GEM_BASEADDR (PCI_MAPREG_START + 0x00)
sys/dev/pci/if_iavf.c
118
#define IAVF_PCIREG PCI_MAPREG_START
sys/dev/pci/if_iwm.c
8975
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
sys/dev/pci/if_iwm.c
8976
err = pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
sys/dev/pci/if_iwnreg.h
59
#define IWN_PCI_BAR0 PCI_MAPREG_START
sys/dev/pci/if_ixl.c
178
#define IXL_PCIREG PCI_MAPREG_START
sys/dev/pci/if_lii.c
260
switch (cmd = pci_mapreg_type(sc->sc_pc, sc->sc_tag, PCI_MAPREG_START)) {
sys/dev/pci/if_lii.c
269
if (pci_mapreg_map(pa, PCI_MAPREG_START, cmd, 0,
sys/dev/pci/if_mcx.c
81
#define MCX_HCA_BAR PCI_MAPREG_START /* BAR 0 */
sys/dev/pci/if_pcnreg.h
54
#define PCN_PCI_CBIO (PCI_MAPREG_START + 0x00)
sys/dev/pci/if_pcnreg.h
55
#define PCN_PCI_CBMEM (PCI_MAPREG_START + 0x04)
sys/dev/pci/if_rgereg.h
20
#define RGE_PCI_BAR0 PCI_MAPREG_START
sys/dev/pci/if_rgereg.h
21
#define RGE_PCI_BAR1 (PCI_MAPREG_START + 4)
sys/dev/pci/if_rgereg.h
22
#define RGE_PCI_BAR2 (PCI_MAPREG_START + 8)
sys/dev/pci/if_sipreg.h
181
#define SIP_PCI_CFGIOA (PCI_MAPREG_START + 0x00)
sys/dev/pci/if_sipreg.h
183
#define SIP_PCI_CFGMA (PCI_MAPREG_START + 0x04)
sys/dev/pci/if_sipreg.h
186
#define SIP_PCI_CFGMA1 (PCI_MAPREG_START + 0x08)
sys/dev/pci/if_stereg.h
100
#define STE_PCI_IOBA (PCI_MAPREG_START + 0x00)
sys/dev/pci/if_stereg.h
101
#define STE_PCI_MMBA (PCI_MAPREG_START + 0x04)
sys/dev/pci/if_stgereg.h
123
#define STGE_PCI_IOBA (PCI_MAPREG_START + 0x00)
sys/dev/pci/if_stgereg.h
124
#define STGE_PCI_MMBA (PCI_MAPREG_START + 0x04)
sys/dev/pci/if_wm.c
2150
for (i = PCI_MAPREG_START; i < PCI_MAPREG_END; i += 4) {
sys/dev/pci/if_wmreg.h
407
#define WM_PCI_MMBA PCI_MAPREG_START
sys/dev/pci/igc/if_igc.h
190
#define IGC_PCIREG PCI_MAPREG_START
sys/dev/pci/igsfb_pci.c
219
#define IGS_MEM_MAPREG (PCI_MAPREG_START + 0)
sys/dev/pci/iha_pci.c
129
ioh_valid = pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
sys/dev/pci/iop_pci.c
129
for (i = PCI_MAPREG_START; i < PCI_MAPREG_END; i += 4) {
sys/dev/pci/joy_pci.c
99
for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END;
sys/dev/pci/lynxfb.c
211
if (pci_mapreg_info(pc, tag, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
sys/dev/pci/lynxfb.c
293
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
sys/dev/pci/machfb.c
457
reg = PCI_MAPREG_START + (bar * 4);
sys/dev/pci/mgafbreg.h
34
#define MILL_BAR_REG PCI_MAPREG_START
sys/dev/pci/mgafbreg.h
35
#define MILL_BAR_FB (PCI_MAPREG_START + 4)
sys/dev/pci/mgafbreg.h
36
#define MILL2_BAR_REG (PCI_MAPREG_START + 4)
sys/dev/pci/mgafbreg.h
37
#define MILL2_BAR_FB PCI_MAPREG_START
sys/dev/pci/mpii.c
480
for (r = PCI_MAPREG_START; r < PCI_MAPREG_END; r += sizeof(memtype)) {
sys/dev/pci/mpt_pci.c
57
#define MPT_PCI_MMBA (PCI_MAPREG_START+0x04)
sys/dev/pci/mvsata_pci.c
170
if (pci_mapreg_map(pa, PCI_MAPREG_START,
sys/dev/pci/neo.c
572
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM, 0,
sys/dev/pci/neo.c
578
if (pci_mapreg_map(pa, PCI_MAPREG_START + 4, PCI_MAPREG_TYPE_MEM,
sys/dev/pci/njs_pci.c
53
#define NJSC32_PCI_BASEADDR_IO PCI_MAPREG_START
sys/dev/pci/njs_pci.c
54
#define NJSC32_PCI_BASEADDR_MEM (PCI_MAPREG_START + 4)
sys/dev/pci/pci.c
344
for (bar = PCI_MAPREG_START; bar < endbar; bar += width) {
sys/dev/pci/pci_map.c
124
if ((!isrom) && (reg < PCI_MAPREG_START ||
sys/dev/pci/pci_map.c
55
if (reg < PCI_MAPREG_START ||
sys/dev/pci/pci_resource.c
605
pci_resource_scan_bar(pr, pd, PCI_MAPREG_START,
sys/dev/pci/pci_resource.c
609
pci_resource_scan_bar(pr, pd, PCI_MAPREG_START,
sys/dev/pci/pci_subr.c
4734
for (off = PCI_MAPREG_START; off < PCI_MAPREG_END; off += width) {
sys/dev/pci/pciconf.c
636
reg_start = PCI_MAPREG_START;
sys/dev/pci/pciconf.c
645
reg_start = PCI_MAPREG_START;
sys/dev/pci/pciide_i31244_reg.h
48
#define ARTISEA_PCI_DPA_BASE PCI_MAPREG_START
sys/dev/pci/pciide_sl82c105_reg.h
40
#define SYMPH_PORT0_P (PCI_MAPREG_START + 0x00) /* port 0 primary */
sys/dev/pci/pciide_sl82c105_reg.h
41
#define SYMPH_PORT0_S (PCI_MAPREG_START + 0x04) /* port 0 secondary */
sys/dev/pci/pciide_sl82c105_reg.h
42
#define SYMPH_PORT1_P (PCI_MAPREG_START + 0x08) /* port 1 primary */
sys/dev/pci/pciide_sl82c105_reg.h
43
#define SYMPH_PORT1_S (PCI_MAPREG_START + 0x0c) /* port 1 secondary */
sys/dev/pci/pciide_sl82c105_reg.h
44
#define SYMPH_BMIDER (PCI_MAPREG_START + 0x10) /* bus master regs */
sys/dev/pci/pcireg.h
478
#define PCI_BAR(n) (PCI_MAPREG_START + 4 * (n))
sys/dev/pci/pcireg.h
537
(((unsigned)(offset)-PCI_MAPREG_START)/4)
sys/dev/pci/puc.c
214
(long)(PCI_MAPREG_START + 4 * i));
sys/dev/pci/pucvar.h
65
#define PUC_PORT_BAR_INDEX(bar) (((bar) - PCI_MAPREG_START) / 4)
sys/dev/pci/pvscsi.c
1692
for (rid = PCI_MAPREG_START; rid < PCI_MAPREG_END; rid += sizeof(regt)) {
sys/dev/pci/pwdog.c
87
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
sys/dev/pci/pwdog.c
88
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &sc->sc_iot,
sys/dev/pci/qat/qat.c
470
msixtbl_bar = PCI_MAPREG_START +
sys/dev/pci/qat/qat.c
481
for (bar = PCI_MAPREG_START; bar <= PCI_MAPREG_END; bar += 4) {
sys/dev/pci/satalink.c
448
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
sys/dev/pci/satalink.c
462
} else if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
sys/dev/pci/satalink.c
711
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
sys/dev/pci/sdhc_pci.c
41
#define SDHC_PCI_BAR_START PCI_MAPREG_START
sys/dev/pci/sisfb.c
258
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
sys/dev/pci/sisfb.c
265
if (pci_mapreg_map(pa, PCI_MAPREG_START + 4,
sys/dev/pci/sisfb.c
272
if (pci_mapreg_map(pa, PCI_MAPREG_START + 8, PCI_MAPREG_TYPE_IO,
sys/dev/pci/sisfb.c
782
if (pci_mapreg_info(pc, tag, PCI_MAPREG_START,
sys/dev/pci/sisfb.c
798
if (pci_mapreg_info(pc, tag, PCI_MAPREG_START + 4,
sys/dev/pci/sisfb.c
813
if (pci_mapreg_info(pc, tag, PCI_MAPREG_START + 8,
sys/dev/pci/sti_pci.c
353
if (bar < PCI_MAPREG_START || bar > PCI_MAPREG_PPB_END) {
sys/dev/pci/svwsata.c
117
PCI_MAPREG_START + 0x14) == 0) {
sys/dev/pci/svwsata.c
122
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
sys/dev/pci/twa.c
1536
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
sys/dev/pci/twa.c
1544
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
sys/dev/pci/twa.c
1553
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
sys/dev/pci/twa.c
1563
if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
sys/dev/pci/vga_pci.c
202
reg = PCI_MAPREG_START + (bar * 4);
sys/dev/pci/viaide.c
1020
PCI_MAPREG_START + 0x14);
sys/dev/pci/viaide.c
1023
ret = pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
sys/dev/pci/viaide.c
1041
ret = pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
sys/dev/pci/virtio_pci.c
401
bar_type = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
sys/dev/pci/virtio_pci.c
402
if (pci_mapreg_map(pa, PCI_MAPREG_START, bar_type, 0,
sys/dev/pci/virtio_pci.c
81
#define NMAPREG ((PCI_MAPREG_END - PCI_MAPREG_START) / \
sys/dev/pci/weasel_pci.c
112
if (pci_mapreg_map(pa, PCI_MAPREG_START,
sys/dev/pci/xmm7360.c
136
#define WWAN_BAR0 PCI_MAPREG_START
sys/dev/pci/xmm7360.c
137
#define WWAN_BAR1 (PCI_MAPREG_START + 4)
sys/dev/pci/xmm7360.c
138
#define WWAN_BAR2 (PCI_MAPREG_START + 8)
