sys/dev/ic/arn5008.c

1090

if (athn_tx_pending(sc, ATHN_QID_BEACON)) {

sys/dev/ic/arn5008.c

1154

athn_stop_tx_dma(sc, ATHN_QID_BEACON);

sys/dev/ic/arn5008.c

1156

AR_WRITE(sc, AR_QTXDP(ATHN_QID_BEACON), bf->bf_daddr);

sys/dev/ic/arn5008.c

1179

AR_WRITE(sc, AR_Q_TXE, 1 << ATHN_QID_BEACON);

sys/dev/ic/arn9003.c

1236

if (athn_tx_pending(sc, ATHN_QID_BEACON)) {

sys/dev/ic/arn9003.c

1275

SM(AR_TXI_QCU_NUM, ATHN_QID_BEACON) |

sys/dev/ic/arn9003.c

1312

athn_stop_tx_dma(sc, ATHN_QID_BEACON);

sys/dev/ic/arn9003.c

1314

AR_WRITE(sc, AR_QTXDP(ATHN_QID_BEACON), bf->bf_daddr);

sys/dev/ic/arn9003.c

1337

AR_WRITE(sc, AR_Q_TXE, 1 << ATHN_QID_BEACON);

sys/dev/ic/athn.c

1928

AR_SETBITS(sc, AR_QMISC(ATHN_QID_BEACON),

sys/dev/ic/athn.c

1931

AR_SETBITS(sc, AR_DMISC(ATHN_QID_BEACON),

sys/dev/ic/athn.c

1936

AR_WRITE(sc, AR_DLCL_IFS(ATHN_QID_BEACON),