sys/arch/acorn32/include/irqhandler.h

200

extern irqhandler_t *irqhandlers[NIRQS];

sys/arch/arm/iomd/iomd_irqhandler.c

153

if (irq < 0 || irq >= NIRQS)

sys/arch/arm/iomd/iomd_irqhandler.c

264

if (irq < 0 || irq >= NIRQS)

sys/arch/arm/iomd/iomd_irqhandler.c

59

irqhandler_t *irqhandlers[NIRQS];

sys/arch/arm/iomd/iomd_irqhandler.c

84

for (loop = 0; loop < NIRQS; ++loop)

sys/arch/arm/ofw/ofw_irqhandler.c

130

if (irq < 0 || irq >= NIRQS)

sys/arch/arm/ofw/ofw_irqhandler.c

221

if (irq < 0 || irq >= NIRQS)

sys/arch/arm/ofw/ofw_irqhandler.c

56

irqhandler_t *irqhandlers[NIRQS];

sys/arch/arm/ofw/ofw_irqhandler.c

80

for (loop = 0; loop < NIRQS; ++loop) {

sys/arch/arm/sa11x0/sa11x0_irqhandler.c

90

irqhandler_t *irqhandlers[NIRQS];

sys/arch/hpcarm/include/irqhandler.h

77

extern irqhandler_t *irqhandlers[NIRQS];

sys/arch/mips/adm5120/adm5120_intr.c

104

const char * const adm5120_intrnames[NIRQS] = {

sys/arch/mips/adm5120/adm5120_intr.c

143

struct adm5120_intrhead adm5120_intrtab[NIRQS];

sys/arch/mips/adm5120/adm5120_intr.c

172

for (size_t i = 0; i < NIRQS; i++) {

sys/arch/mips/adm5120/adm5120_intr.c

191

if (irq < 0 || irq >= NIRQS)

sys/arch/mips/alchemy/au_icu.c

119

struct au_icu_intrhead au_icu_intrtab[NIRQS];

sys/arch/mips/alchemy/au_icu.c

163

for (size_t i = 0; i < NIRQS; i++) {

sys/arch/mips/alchemy/au_icu.c

197

if (irq >= NIRQS)

sys/arch/mips/alchemy/au_icu.c

386

if (irq >= NIRQS)

sys/arch/mips/alchemy/au_icu.c

409

if (irq >= NIRQS)

sys/arch/mips/atheros/ar_intr.c

81

static struct atheros_intr misc_intrs[NIRQS];

sys/arch/mips/cavium/dev/octeon_intc.c

127

if (irq >= NIRQS) {

sys/arch/mips/cavium/octeon_intr.c

200

static struct octeon_intrhand *octciu_intrs[NIRQS] = {

sys/arch/mips/cavium/octeon_intr.c

306

for (int i = 0; i < NIRQS; i++) {

sys/arch/mips/cavium/octeon_intr.c

343

if (irq >= NIRQS)

sys/arch/mips/cavium/octeon_intr.c

424

const int irq = ih->ih_irq & (NIRQS-1);

sys/arch/mips/cavium/octeon_intr.c

92

static const char * octeon_intrnames[NIRQS] = {

sys/arch/mips/cavium/octeonvar.h

101

struct evcnt cpu_intr_evs[NIRQS];

sys/arch/shark/include/irqhandler.h

138

extern irqhandler_t *irqhandlers[NIRQS];

sys/arch/shark/isa/isa_irqhandler.c

117

for (loop = 0; loop < NIRQS; ++loop) {

sys/arch/shark/isa/isa_irqhandler.c

166

if (irq < 0 || irq >= NIRQS)

sys/arch/shark/isa/isa_irqhandler.c

222

if (irq < 0 || irq >= NIRQS)

sys/arch/shark/isa/isa_irqhandler.c

275

int irqlevel[NIRQS];

sys/arch/shark/isa/isa_irqhandler.c

278

for (irq = 0; irq < NIRQS; irq++) {

sys/arch/shark/isa/isa_irqhandler.c

288

for (irq = 0; irq < NIRQS; irq++)

sys/arch/shark/isa/isa_irqhandler.c

90

irqhandler_t *irqhandlers[NIRQS];