NCRCMD_DMA
v == (NCRCMD_TRANS | NCRCMD_DMA)) {
asc_write_reg(sc, NCR_CMD, NCRCMD_DMA | NCRCMD_NOP);
asc_write_reg(sc, NCR_CMD, NCRCMD_DMA | NCRCMD_NOP);
if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA)) {
sr[NCR_CMD] = NCRCMD_DMA | NCRCMD_TRPAD;
sr[NCR_CMD] = NCRCMD_DMA | NCRCMD_NOP;
sr[NCR_CMD] = NCRCMD_DMA | NCRCMD_TRANS;
NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
(size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA);
NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA)) {
if (reg == NCR_CMD && v == (NCRCMD_TRANS|NCRCMD_DMA))
if (reg == NCR_CMD && val == (NCRCMD_TRANS | NCRCMD_DMA))
val &= ~NCRCMD_DMA; /* DMA not support */