#ifndef QCOM_PHY_QMP_QSERDES_V8_LALBH_
#define QCOM_PHY_QMP_QSERDES_V8_LALBH_
#define QSERDES_V8_LALB_BIST_MODE_LANENO 0x0
#define QSERDES_V8_LALB_BIST_INVERT 0x4
#define QSERDES_V8_LALB_PERL_LENGTH1 0x8
#define QSERDES_V8_LALB_PERL_LENGTH2 0xc
#define QSERDES_V8_LALB_BIST_PATTERN1 0x10
#define QSERDES_V8_LALB_BIST_PATTERN2 0x14
#define QSERDES_V8_LALB_BIST_PATTERN3 0x18
#define QSERDES_V8_LALB_BIST_PATTERN4 0x1c
#define QSERDES_V8_LALB_BIST_PATTERN5 0x20
#define QSERDES_V8_LALB_BIST_PATTERN6 0x24
#define QSERDES_V8_LALB_BIST_PATTERN7 0x28
#define QSERDES_V8_LALB_BIST_PATTERN8 0x2c
#define QSERDES_V8_LALB_PRBS_SEED1 0x30
#define QSERDES_V8_LALB_PRBS_SEED2 0x34
#define QSERDES_V8_LALB_PRBS_SEED3 0x38
#define QSERDES_V8_LALB_PRBS_SEED4 0x3c
#define QSERDES_V8_LALB_PRBS_SEED5 0x40
#define QSERDES_V8_LALB_PRBS_SEED6 0x44
#define QSERDES_V8_LALB_PRBS_SEED7 0x48
#define QSERDES_V8_LALB_SW_RESET_PWRDNB 0x4c
#define QSERDES_V8_LALB_RESET_GEN 0x50
#define QSERDES_V8_LALB_RESET_TSYNC_EN_CTRL 0x54
#define QSERDES_V8_LALB_CDR_EN_RXEQ_RESET 0x58
#define QSERDES_V8_LALB_CLKBUF_ENABLE 0x5c
#define QSERDES_V8_LALB_TX0_EMP_POST1_LVL 0x60
#define QSERDES_V8_LALB_TX1_EMP_POST1_LVL 0x64
#define QSERDES_V8_LALB_TX0_IDLE_CTRL 0x68
#define QSERDES_V8_LALB_TX1_IDLE_CTRL 0x6c
#define QSERDES_V8_LALB_TX0_DRV_LVL 0x70
#define QSERDES_V8_LALB_TX0_DRV_LVL_OFFSET 0x74
#define QSERDES_V8_LALB_TX1_DRV_LVL 0x78
#define QSERDES_V8_LALB_TX1_DRV_LVL_OFFSET 0x7c
#define QSERDES_V8_LALB_TRAN_DRVR_EMP_EN 0x80
#define QSERDES_V8_LALB_TX_LVL_UPDATE_CTRL 0x84
#define QSERDES_V8_LALB_TX0_PRE1_EMPH 0x88
#define QSERDES_V8_LALB_TX1_PRE1_EMPH 0x8c
#define QSERDES_V8_LALB_TX0_PRE2_EMPH 0x90
#define QSERDES_V8_LALB_TX1_PRE2_EMPH 0x94
#define QSERDES_V8_LALB_STALL_LDO_BOOST_EN 0x98
#define QSERDES_V8_LALB_PRE_EMPH_EN_CTRL 0x9c
#define QSERDES_V8_LALB_PCIE5_TOP_LDO_CODE_CTRL1 0xa0
#define QSERDES_V8_LALB_PCIE5_TOP_LDO_CODE_CTRL2 0xa4
#define QSERDES_V8_LALB_PCIE5_TOP_LDO_CODE_CTRL3 0xa8
#define QSERDES_V8_LALB_PCIE5_TOP_LDO_CODE_CTRL4 0xac
#define QSERDES_V8_LALB_TRANSMITTER_EN_CTRL 0xb0
#define QSERDES_V8_LALB_HIGHZ_DRVR_EN 0xb4
#define QSERDES_V8_LALB_TX_MISC_CTRL1 0xb8
#define QSERDES_V8_LALB_LPB_EN_CTRL1 0xbc
#define QSERDES_V8_LALB_LBP_EN_CTRL2 0xc0
#define QSERDES_V8_LALB_TX0_SERDES_BYP_CTRL 0xc4
#define QSERDES_V8_LALB_TX1_SERDES_BYP_CTRL 0xc8
#define QSERDES_V8_LALB_LANE_MODE_1 0xcc
#define QSERDES_V8_LALB_LANE_MODE_2 0xd0
#define QSERDES_V8_LALB_LANE_MODE_3 0xd4
#define QSERDES_V8_LALB_LANE_MODE_4 0xd8
#define QSERDES_V8_LALB_ATB_SEL1 0xdc
#define QSERDES_V8_LALB_ATB_SEL2 0xe0
#define QSERDES_V8_LALB_TX0_RES_CODE_LANE 0xe4
#define QSERDES_V8_LALB_TX0_RESTRIM_ICAL_OVRD 0xe8
#define QSERDES_V8_LALB_TX0_RESTRIM_CAL_CTRL 0xec
#define QSERDES_V8_LALB_TX0_RESTRIM_INIT_CODE 0xf0
#define QSERDES_V8_LALB_TX0_RESTRIM_POST_CAL_OFFSET 0xf4
#define QSERDES_V8_LALB_TX1_RES_CODE_LANE 0xf8
#define QSERDES_V8_LALB_TX1_RESTRIM_ICAL_OVRD 0xfc
#define QSERDES_V8_LALB_TX1_RESTRIM_CAL_CTRL 0x100
#define QSERDES_V8_LALB_TX1_RESTRIM_INIT_CODE 0x104
#define QSERDES_V8_LALB_TX1_RESTRIM_POST_CAL_OFFSET 0x108
#define QSERDES_V8_LALB_TX0_RESTRIM_VREF_SEL 0x10c
#define QSERDES_V8_LALB_TX1_RESTRIM_VREF_SEL 0x110
#define QSERDES_V8_LALB_VMODE_CTRL1 0x114
#define QSERDES_V8_LALB_SLEW_CNTL_RATE01 0x118
#define QSERDES_V8_LALB_SLEW_CNTL_RATE23 0x11c
#define QSERDES_V8_LALB_SLEW_CNTL_RATE4 0x120
#define QSERDES_V8_LALB_ANA_INTERFACE_SELECT1 0x124
#define QSERDES_V8_LALB_ANA_INTERFACE_SELECT2 0x128
#define QSERDES_V8_LALB_ANA_INTERFACE_SELECT3 0x12c
#define QSERDES_V8_LALB_PCS_INTERFACE_SELECT1 0x130
#define QSERDES_V8_LALB_PCS_INTERFACE_SELECT2 0x134
#define QSERDES_V8_LALB_LDO_TIMER_CTRL 0x138
#define QSERDES_V8_LALB_AC_JTAG_ENABLE 0x13c
#define QSERDES_V8_LALB_AC_JTAG_INITP 0x140
#define QSERDES_V8_LALB_AC_JTAG_INITN 0x144
#define QSERDES_V8_LALB_AC_JTAG_LVL 0x148
#define QSERDES_V8_LALB_AC_JTAG_MODE 0x14c
#define QSERDES_V8_LALB_AC_JTAG_RESET 0x150
#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B0 0x154
#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B1 0x158
#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B2 0x15c
#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B3 0x160
#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B4 0x164
#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B5 0x168
#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B6 0x16c
#define QSERDES_V8_LALB_RX_MODE_RATE_0_1_B7 0x170
#define QSERDES_V8_LALB_RX_MODE_RATE2_B0 0x174
#define QSERDES_V8_LALB_RX_MODE_RATE2_B1 0x178
#define QSERDES_V8_LALB_RX_MODE_RATE2_B2 0x17c
#define QSERDES_V8_LALB_RX_MODE_RATE2_B3 0x180
#define QSERDES_V8_LALB_RX_MODE_RATE2_B4 0x184
#define QSERDES_V8_LALB_RX_MODE_RATE2_B5 0x188
#define QSERDES_V8_LALB_RX_MODE_RATE2_B6 0x18c
#define QSERDES_V8_LALB_RX_MODE_RATE2_B7 0x190
#define QSERDES_V8_LALB_RX_MODE_RATE3_B0 0x194
#define QSERDES_V8_LALB_RX_MODE_RATE3_B1 0x198
#define QSERDES_V8_LALB_RX_MODE_RATE3_B2 0x19c
#define QSERDES_V8_LALB_RX_MODE_RATE3_B3 0x1a0
#define QSERDES_V8_LALB_RX_MODE_RATE3_B4 0x1a4
#define QSERDES_V8_LALB_RX_MODE_RATE3_B5 0x1a8
#define QSERDES_V8_LALB_RX_MODE_RATE3_B6 0x1ac
#define QSERDES_V8_LALB_RX_MODE_RATE3_B7 0x1b0
#define QSERDES_V8_LALB_RX_MODE_RATE4_B0 0x1b4
#define QSERDES_V8_LALB_RX_MODE_RATE4_B1 0x1b8
#define QSERDES_V8_LALB_RX_MODE_RATE4_B2 0x1bc
#define QSERDES_V8_LALB_RX_MODE_RATE4_B3 0x1c0
#define QSERDES_V8_LALB_RX_MODE_RATE4_B4 0x1c4
#define QSERDES_V8_LALB_RX_MODE_RATE4_B5 0x1c8
#define QSERDES_V8_LALB_RX_MODE_RATE4_B6 0x1cc
#define QSERDES_V8_LALB_RX_MODE_RATE4_B7 0x1d0
#define QSERDES_V8_LALB_TX_DCC_ANA_CTRL1 0x1d4
#define QSERDES_V8_LALB_TX_DCC_ANA_CTRL2 0x1d8
#define QSERDES_V8_LALB_CMUX_DCC_CTRL1 0x1dc
#define QSERDES_V8_LALB_CMUX_DCC_POSTCAL_OFFSET 0x1e0
#define QSERDES_V8_LALB_CMUX_DCC_OVRD 0x1e4
#define QSERDES_V8_LALB_TX_DCC_CTRL 0x1e8
#define QSERDES_V8_LALB_TX0_CTUNE_DCC_CONFIG 0x1ec
#define QSERDES_V8_LALB_TX0_CTUNE_DCC_POSTCAL_OFFSET 0x1f0
#define QSERDES_V8_LALB_TX0_CTUNE_DCC_OVRD 0x1f4
#define QSERDES_V8_LALB_TX0_FTUNE_MSB_DCC_CONFIG 0x1f8
#define QSERDES_V8_LALB_TX0_FTUNE_MSB_DCC_OFFSET_AND_OVRD 0x1fc
#define QSERDES_V8_LALB_TX0_FTUNE_LSB_DCC_CONFIG 0x200
#define QSERDES_V8_LALB_TX0_FTUNE_LSB_DCC_OFFSET_AND_OVRD 0x204
#define QSERDES_V8_LALB_TX1_CTUNE_DCC_CONFIG 0x208
#define QSERDES_V8_LALB_TX1_CTUNE_DCC_POSTCAL_OFFSET 0x20c
#define QSERDES_V8_LALB_TX1_CTUNE_DCC_OVRD 0x210
#define QSERDES_V8_LALB_TX1_FTUNE_MSB_DCC_CONFIG 0x214
#define QSERDES_V8_LALB_TX1_FTUNE_MSB_DCC_OFFSET_AND_OVRD 0x218
#define QSERDES_V8_LALB_TX1_FTUNE_LSB_DCC_CONFIG 0x21c
#define QSERDES_V8_LALB_TX1_FTUNE_LSB_DCC_OFFSET_AND_OVRD 0x220
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CTRL 0x224
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CODE_OVRD_RATE0 0x228
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CODE_OVRD_RATE1 0x22c
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CODE_OVRD_RATE2 0x230
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CODE_OVRD_RATE3 0x234
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_CODE_OVRD_RATE4 0x238
#define QSERDES_V8_LALB_CDR_VCO_CAL_CTRL 0x23c
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT1_RATE0 0x240
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT2_RATE0 0x244
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT1_RATE1 0x248
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT2_RATE1 0x24c
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT1_RATE2 0x250
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT2_RATE2 0x254
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT1_RATE3 0x258
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT2_RATE3 0x25c
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT1_RATE4 0x260
#define QSERDES_V8_LALB_CDR_VCO_CTUNE_MEAS_CNT2_RATE4 0x264
#define QSERDES_V8_LALB_CDR_VCTRL_RATE_0_1 0x268
#define QSERDES_V8_LALB_CDR_VCTRL_RATE_2_3 0x26c
#define QSERDES_V8_LALB_CDR_VCTRL_RATE_4 0x270
#define QSERDES_V8_LALB_KVCO_INIT_RATE_0_1 0x274
#define QSERDES_V8_LALB_KVCO_INIT_RATE_2_3 0x278
#define QSERDES_V8_LALB_KVCO_INIT_RATE_4 0x27c
#define QSERDES_V8_LALB_KVCO_CODE_OVRD_RATE0 0x280
#define QSERDES_V8_LALB_KVCO_CODE_OVRD_RATE1 0x284
#define QSERDES_V8_LALB_KVCO_CODE_OVRD_RATE2 0x288
#define QSERDES_V8_LALB_KVCO_CODE_OVRD_RATE3 0x28c
#define QSERDES_V8_LALB_KVCO_CODE_OVRD_RATE4 0x290
#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_HIGH_RATE_0_1 0x294
#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_HIGH_RATE_2_3 0x298
#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_HIGH_RATE_4 0x29c
#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_LOW_RATE_0_1 0x2a0
#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_LOW_RATE_2_3 0x2a4
#define QSERDES_V8_LALB_KVCO_CAL_VCTRL_LOW_RATE_4 0x2a8
#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF1_RATE0 0x2ac
#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF2_RATE0 0x2b0
#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF1_RATE1 0x2b4
#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF2_RATE1 0x2b8
#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF1_RATE2 0x2bc
#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF2_RATE2 0x2c0
#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF1_RATE3 0x2c4
#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF2_RATE3 0x2c8
#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF1_RATE4 0x2cc
#define QSERDES_V8_LALB_KVCO_IDEAL_FREQ_DIFF2_RATE4 0x2d0
#define QSERDES_V8_LALB_KP_CDR_UP_DN 0x2d4
#define QSERDES_V8_LALB_KP_CODE_OVRD_RATE_0_1 0x2d8
#define QSERDES_V8_LALB_KP_CODE_OVRD_RATE_2_3 0x2dc
#define QSERDES_V8_LALB_KP_CODE_OVRD_RATE4 0x2e0
#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND1_RATE0 0x2e4
#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND2_RATE0 0x2e8
#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND1_RATE1 0x2ec
#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND2_RATE1 0x2f0
#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND1_RATE2 0x2f4
#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND2_RATE2 0x2f8
#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND1_RATE3 0x2fc
#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND2_RATE3 0x300
#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND1_RATE4 0x304
#define QSERDES_V8_LALB_KP_CAL_UPPER_FREQ_DIFF_BND2_RATE4 0x308
#define QSERDES_V8_LALB_KP_CAL_LOWER_FREQ_DIFF_BND_RATE0 0x30c
#define QSERDES_V8_LALB_KP_CAL_LOWER_FREQ_DIFF_BND_RATE1 0x310
#define QSERDES_V8_LALB_KP_CAL_LOWER_FREQ_DIFF_BND_RATE2 0x314
#define QSERDES_V8_LALB_KP_CAL_LOWER_FREQ_DIFF_BND_RATE3 0x318
#define QSERDES_V8_LALB_KP_CAL_LOWER_FREQ_DIFF_BND_RATE4 0x31c
#define QSERDES_V8_LALB_CDR_KVCO_KP_CAL_FREQ_MEAS_CTRL 0x320
#define QSERDES_V8_LALB_PLLLOCK_CMP_DEBUG_CTRL 0x324
#define QSERDES_V8_LALB_PLLLOCK_CMP_DEBUG_CNT1 0x328
#define QSERDES_V8_LALB_PLLLOCK_CMP_DEBUG_CNT2 0x32c
#define QSERDES_V8_LALB_PLLLOCK_CMP_DEBUG_CNT3 0x330
#define QSERDES_V8_LALB_RX_SUMMER_CAL_SPD_MODE_RATE_0123 0x334
#define QSERDES_V8_LALB_RX_SUMMER_CAL_SPD_MODE_RATE_4 0x338
#define QSERDES_V8_LALB_RX_IVCM_CAL_CODE_OVERRIDE_RATE0 0x33c
#define QSERDES_V8_LALB_RX_IVCM_CAL_CODE_OVERRIDE_RATE1 0x340
#define QSERDES_V8_LALB_RX_IVCM_CAL_CODE_OVERRIDE_RATE2 0x344
#define QSERDES_V8_LALB_RX_IVCM_CAL_CODE_OVERRIDE_RATE3 0x348
#define QSERDES_V8_LALB_RX_IVCM_CAL_CODE_OVERRIDE_RATE4 0x34c
#define QSERDES_V8_LALB_RX_IVCM_CAL_CTRL1 0x350
#define QSERDES_V8_LALB_RX_IVCM_CAL_CTRL2 0x354
#define QSERDES_V8_LALB_RX_IVCM_CAL_CTRL3 0x358
#define QSERDES_V8_LALB_RX_IVCM_CAL_CTRL4 0x35c
#define QSERDES_V8_LALB_RX_IVCM_POSTCAL_OFFSET_RATE0 0x360
#define QSERDES_V8_LALB_RX_IVCM_POSTCAL_OFFSET_RATE1 0x364
#define QSERDES_V8_LALB_RX_IVCM_POSTCAL_OFFSET_RATE2 0x368
#define QSERDES_V8_LALB_RX_IVCM_POSTCAL_OFFSET_RATE3 0x36c
#define QSERDES_V8_LALB_RX_IVCM_POSTCAL_OFFSET_RATE4 0x370
#define QSERDES_V8_LALB_RX_IDAC_I0_DC_OFFSETS 0x374
#define QSERDES_V8_LALB_RX_IDAC_I0BAR_DC_OFFSETS 0x378
#define QSERDES_V8_LALB_RX_IDAC_I1_DC_OFFSETS 0x37c
#define QSERDES_V8_LALB_RX_IDAC_I1BAR_DC_OFFSETS 0x380
#define QSERDES_V8_LALB_RX_IDAC_Q_DC_OFFSETS 0x384
#define QSERDES_V8_LALB_RX_IDAC_QBAR_DC_OFFSETS 0x388
#define QSERDES_V8_LALB_RX_IDAC_A_DC_OFFSETS 0x38c
#define QSERDES_V8_LALB_RX_IDAC_ABAR_DC_OFFSETS 0x390
#define QSERDES_V8_LALB_RX_IDAC_EN 0x394
#define QSERDES_V8_LALB_DATA_SLICER_INIT_TIMER_CTRL 0x398
#define QSERDES_V8_LALB_RX_IDAC_ENABLES 0x39c
#define QSERDES_V8_LALB_RX_IDAC_SIGN 0x3a0
#define QSERDES_V8_LALB_RX_IDAC_TSETTLE 0x3a4
#define QSERDES_V8_LALB_SIGDET_ENABLES 0x3a8
#define QSERDES_V8_LALB_SIGDET_CNTRL 0x3ac
#define QSERDES_V8_LALB_SIGDET_LVL 0x3b0
#define QSERDES_V8_LALB_SIGDET_DEGLITCH_CNTRL 0x3b4
#define QSERDES_V8_LALB_SIGDET_CAL_CTRL1 0x3b8
#define QSERDES_V8_LALB_SIGDET_CAL_CTRL2_AND_CDR_LOCK_EDGE 0x3bc
#define QSERDES_V8_LALB_SIGDET_CAL_TRIM 0x3c0
#define QSERDES_V8_LALB_IA_OFFSET_CENTER_CAL_CTRL 0x3c4
#define QSERDES_V8_LALB_FREQ_LOCK_DET_DLY_RATE0 0x3c8
#define QSERDES_V8_LALB_FREQ_LOCK_DET_DLY_RATE1 0x3cc
#define QSERDES_V8_LALB_FREQ_LOCK_DET_DLY_RATE2 0x3d0
#define QSERDES_V8_LALB_FREQ_LOCK_DET_DLY_RATE3 0x3d4
#define QSERDES_V8_LALB_FREQ_LOCK_DET_DLY_RATE4 0x3d8
#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_RATE0 0x3dc
#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_RATE1 0x3e0
#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_RATE2 0x3e4
#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_RATE3 0x3e8
#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_RATE4 0x3ec
#define QSERDES_V8_LALB_CDR_LOCK_CTRL 0x3f0
#define QSERDES_V8_LALB_CDR_CP_CUR_FLL_RATE0 0x3f4
#define QSERDES_V8_LALB_CDR_CP_CUR_FLL_RATE1 0x3f8
#define QSERDES_V8_LALB_CDR_CP_CUR_FLL_RATE2 0x3fc
#define QSERDES_V8_LALB_CDR_CP_CUR_FLL_RATE3 0x400
#define QSERDES_V8_LALB_CDR_CP_CUR_FLL_RATE4 0x404
#define QSERDES_V8_LALB_CDR_CP_CUR_PLL_RATE0 0x408
#define QSERDES_V8_LALB_CDR_CP_CUR_PLL_RATE1 0x40c
#define QSERDES_V8_LALB_CDR_CP_CUR_PLL_RATE2 0x410
#define QSERDES_V8_LALB_CDR_CP_CUR_PLL_RATE3 0x414
#define QSERDES_V8_LALB_CDR_CP_CUR_PLL_RATE4 0x418
#define QSERDES_V8_LALB_CDR_FLL_DIV_RATIO_RATE_0123 0x41c
#define QSERDES_V8_LALB_CDR_FLL_DIV_RATIO_RATE4 0x420
#define QSERDES_V8_LALB_CDR_LOOP_CCODE_RATE_01 0x424
#define QSERDES_V8_LALB_CDR_LOOP_CCODE_RATE_23 0x428
#define QSERDES_V8_LALB_CDR_LOOP_CCODE_RATE4 0x42c
#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FAST_RATE_0_1 0x430
#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FAST_RATE_2_3 0x434
#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FAST_RATE4 0x438
#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FLL_RATE_0_1 0x43c
#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FLL_RATE_2_3 0x440
#define QSERDES_V8_LALB_CDR_LOOP_RCODE_FLL_RATE4 0x444
#define QSERDES_V8_LALB_CDR_LOOP_RCODE_PLL_RATE_0_1 0x448
#define QSERDES_V8_LALB_CDR_LOOP_RCODE_PLL_RATE_2_3 0x44c
#define QSERDES_V8_LALB_CDR_LOOP_RCODE_PLL_RATE4 0x450
#define QSERDES_V8_LALB_CDR_VCO_CAP_CODE_RATE_0123 0x454
#define QSERDES_V8_LALB_CDR_VCO_CAP_CODE_RATE4 0x458
#define QSERDES_V8_LALB_CDR_VCO_TYPE_CONFIG 0x45c
#define QSERDES_V8_LALB_CDR_VCO_EN_LOWFREQ 0x460
#define QSERDES_V8_LALB_CDR_FAST_SLOW_VCO_OVRD 0x464
#define QSERDES_V8_LALB_CDR_LOOP_FUNC_CTRL 0x468
#define QSERDES_V8_LALB_CDR_FAST_LOCK_EN_CTRL 0x46c
#define QSERDES_V8_LALB_RX_RCVR_EN 0x470
#define QSERDES_V8_LALB_LANE_RATE_CTRL 0x474
#define QSERDES_V8_LALB_RX_TERM_RCVR_CTRL 0x478
#define QSERDES_V8_LALB_REC_DETECT_CTRL 0x47c
#define QSERDES_V8_LALB_RCV_DETECT_LVL 0x480
#define QSERDES_V8_LALB_GM_CAL_EN 0x484
#define QSERDES_V8_LALB_GM_CAL_RES_RATE0_1 0x488
#define QSERDES_V8_LALB_GM_CAL_RES_RATE2_3 0x48c
#define QSERDES_V8_LALB_GM_CAL_RES_RATE4 0x490
#define QSERDES_V8_LALB_RX_TERM_BW_RATE_0123 0x494
#define QSERDES_V8_LALB_RX_TERM_BW_RATE4 0x498
#define QSERDES_V8_LALB_AUX_CLK_CTRL 0x49c
#define QSERDES_V8_LALB_AUX_OFFSET_CONTROL 0x4a0
#define QSERDES_V8_LALB_AUXDATA_TB 0x4a4
#define QSERDES_V8_LALB_EOM_CTRL1 0x4a8
#define QSERDES_V8_LALB_EOM_CTRL2 0x4ac
#define QSERDES_V8_LALB_EOM_CTRL3 0x4b0
#define QSERDES_V8_LALB_EOM_CTRL4 0x4b4
#define QSERDES_V8_LALB_DFE_EN_TIMER 0x4b8
#define QSERDES_V8_LALB_RX_EQ_OFFSET_LSB 0x4bc
#define QSERDES_V8_LALB_RX_EQ_OFFSET_MSB 0x4c0
#define QSERDES_V8_LALB_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x4c4
#define QSERDES_V8_LALB_RX_OFFSET_ADAPTOR_CNTRL2 0x4c8
#define QSERDES_V8_LALB_RX_OFFSET_ADAPTOR_CNTRL3 0x4cc
#define QSERDES_V8_LALB_RX_EQU_ADAPTOR_CNTRL1 0x4d0
#define QSERDES_V8_LALB_RX_EQU_ADAPTOR_CNTRL2 0x4d4
#define QSERDES_V8_LALB_RX_EQU_ADAPTOR_CNTRL3 0x4d8
#define QSERDES_V8_LALB_RX_EQU_ADAPTOR_CNTRL4 0x4dc
#define QSERDES_V8_LALB_RX_EQU_ADAPTOR_CNTRL5 0x4e0
#define QSERDES_V8_LALB_RX_EQU_KEQ_UP_LSB 0x4e4
#define QSERDES_V8_LALB_RX_EQU_KEQ_UP_MSB 0x4e8
#define QSERDES_V8_LALB_RX_EQU_KEQ_DN_LSB 0x4ec
#define QSERDES_V8_LALB_RX_EQU_KEQ_DN_MSB 0x4f0
#define QSERDES_V8_LALB_CTLE_ADP_RESET_INIT_CODE_RATE_0_1_2 0x4f4
#define QSERDES_V8_LALB_CTLE_ADP_RESET_INIT_CODE_RATE_3_4 0x4f8
#define QSERDES_V8_LALB_CTLE_POST_CAL_OFFSET_RATE_0_1_2 0x4fc
#define QSERDES_V8_LALB_CTLE_POST_CAL_OFFSET_RATE_3_4 0x500
#define QSERDES_V8_LALB_RX_VGA_GAIN2_BLK1 0x504
#define QSERDES_V8_LALB_RX_VGA_GAIN2_BLK2 0x508
#define QSERDES_V8_LALB_VGA_CAL_CNTRL1 0x50c
#define QSERDES_V8_LALB_VGA_CAL_CNTRL2 0x510
#define QSERDES_V8_LALB_VGA_CAL_MAN_VAL_RATE0_1 0x514
#define QSERDES_V8_LALB_VGA_CAL_MAN_VAL_RATE2_3 0x518
#define QSERDES_V8_LALB_VGA_CAL_MAN_VAL_RATE4 0x51c
#define QSERDES_V8_LALB_KVGA_CTRL1 0x520
#define QSERDES_V8_LALB_KVGA_CTRL2 0x524
#define QSERDES_V8_LALB_VTHRESH_CAL_CNTRL1 0x528
#define QSERDES_V8_LALB_VTHRESH_CAL_CNTRL2 0x52c
#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_VAL_RATE0 0x530
#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_VAL_RATE1 0x534
#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_VAL_RATE2 0x538
#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_VAL_RATE3 0x53c
#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_VAL_RATE4 0x540
#define QSERDES_V8_LALB_VTHRESH_CAL_MAN_CAL_PAM3 0x544
#define QSERDES_V8_LALB_VTH_POST_CAL_OFFSET_RATE_0_1 0x548
#define QSERDES_V8_LALB_VTH_POST_CAL_OFFSET_RATE_2_3 0x54c
#define QSERDES_V8_LALB_VTH_POST_CAL_OFFSET_RATE4 0x550
#define QSERDES_V8_LALB_DFE_TAP1_CTRL 0x554
#define QSERDES_V8_LALB_DFE_TAP1_MANVAL_KTAP 0x558
#define QSERDES_V8_LALB_DFE_TAP1_POST_CAL_OFFSET_RATE_0_1_2 0x55c
#define QSERDES_V8_LALB_DFE_TAP1_POST_CAL_OFFSET_RATE_3_4 0x560
#define QSERDES_V8_LALB_DFE_TAP2_CTRL 0x564
#define QSERDES_V8_LALB_DFE_TAP2_MANVAL_KTAP 0x568
#define QSERDES_V8_LALB_DFE_TAP3_CTRL 0x56c
#define QSERDES_V8_LALB_DFE_TAP3_MANVAL_KTAP 0x570
#define QSERDES_V8_LALB_DFE_TAP4_CTRL 0x574
#define QSERDES_V8_LALB_DFE_TAP4_MANVAL_KTAP 0x578
#define QSERDES_V8_LALB_DFE_TAP5_CTRL 0x57c
#define QSERDES_V8_LALB_DFE_TAP5_MANVAL_KTAP 0x580
#define QSERDES_V8_LALB_DFE_TAP6_CTRL 0x584
#define QSERDES_V8_LALB_DFE_TAP6_MANVAL_KTAP 0x588
#define QSERDES_V8_LALB_DFE_TAP7_CTRL 0x58c
#define QSERDES_V8_LALB_DFE_TAP7_MANVAL_KTAP 0x590
#define QSERDES_V8_LALB_DFE_TAP1_DAC_ENABLE 0x594
#define QSERDES_V8_LALB_DFE_TAP2_DAC_ENABLE 0x598
#define QSERDES_V8_LALB_DFE_TAP345_DAC_ENABLE 0x59c
#define QSERDES_V8_LALB_DFE_TAP67_DAC_ENABLE 0x5a0
#define QSERDES_V8_LALB_CDR_IQTUNE_CTRL 0x5a4
#define QSERDES_V8_LALB_CDR_IQTUNE_GAIN 0x5a8
#define QSERDES_V8_LALB_CDR_IQTUNE_MAN_INDEX 0x5ac
#define QSERDES_V8_LALB_CDR_IQTUNE_FILTER_CAL_CTRL1 0x5b0
#define QSERDES_V8_LALB_CDR_IQTUNE_FILTER_CAL_CTRL2 0x5b4
#define QSERDES_V8_LALB_CDR_IQTUNE_CLK0_CAL_CODE_RATE0 0x5b8
#define QSERDES_V8_LALB_CDR_IQTUNE_CLK0_CAL_CODE_RATE1 0x5bc
#define QSERDES_V8_LALB_CDR_IQTUNE_CLK0_CAL_CODE_RATE2 0x5c0
#define QSERDES_V8_LALB_CDR_IQTUNE_CLK0_CAL_CODE_RATE3 0x5c4
#define QSERDES_V8_LALB_CDR_IQTUNE_CLK0_CAL_CODE_RATE4 0x5c8
#define QSERDES_V8_LALB_CDR_IQTUNE_CLK90_CAL_CODE_RATE0 0x5cc
#define QSERDES_V8_LALB_CDR_IQTUNE_CLK90_CAL_CODE_RATE1 0x5d0
#define QSERDES_V8_LALB_CDR_IQTUNE_CLK90_CAL_CODE_RATE2 0x5d4
#define QSERDES_V8_LALB_CDR_IQTUNE_CLK90_CAL_CODE_RATE3 0x5d8
#define QSERDES_V8_LALB_CDR_IQTUNE_CLK90_CAL_CODE_RATE4 0x5dc
#define QSERDES_V8_LALB_CDR_IQTUNE_ANA_CTRL 0x5e0
#define QSERDES_V8_LALB_CDR_IQTUNE_VDCC_CTRL 0x5e4
#define QSERDES_V8_LALB_CDR_IQTUNE_DIV2_CTRL_RATE0123 0x5e8
#define QSERDES_V8_LALB_CDR_IQTUNE_DIV2_CTRL_RATE4 0x5ec
#define QSERDES_V8_LALB_BLW_CTRL 0x5f0
#define QSERDES_V8_LALB_BLW_ANA_VER_CTRL 0x5f4
#define QSERDES_V8_LALB_BLW_GAIN_CAL_CTRL 0x5f8
#define QSERDES_V8_LALB_BLW_GAIN_FORCE_CODE 0x5fc
#define QSERDES_V8_LALB_BLW_MAN_VAL_RATE3 0x600
#define QSERDES_V8_LALB_BLW_MAN_VAL_RATE4 0x604
#define QSERDES_V8_LALB_IVTH_CAL_CTRL1 0x608
#define QSERDES_V8_LALB_IVTH_CAL_CTRL2 0x60c
#define QSERDES_V8_LALB_IVTH_CAL_CTRL3 0x610
#define QSERDES_V8_LALB_VTH_I_UP_CNTRL_VAL 0x614
#define QSERDES_V8_LALB_VTH_I_DN_CNTRL_VAL 0x618
#define QSERDES_V8_LALB_NRZ_EYE_HEIGHT_SEL_VAL 0x61c
#define QSERDES_V8_LALB_IVTH_CAL_VAL_OVRD_MUX 0x620
#define QSERDES_V8_LALB_CDR_VCO_CAP_CODE_OVRD_MUXES 0x624
#define QSERDES_V8_LALB_VCO_CTUNE_LOWER_BND_RATE0 0x628
#define QSERDES_V8_LALB_VCO_CTUNE_LOWER_BND_RATE1 0x62c
#define QSERDES_V8_LALB_VCO_CTUNE_LOWER_BND_RATE2 0x630
#define QSERDES_V8_LALB_VCO_CTUNE_LOWER_BND_RATE3 0x634
#define QSERDES_V8_LALB_VCO_CTUNE_LOWER_BND_RATE4 0x638
#define QSERDES_V8_LALB_VCO_CTUNE_UPPER_BND_RATE0 0x63c
#define QSERDES_V8_LALB_VCO_CTUNE_UPPER_BND_RATE1 0x640
#define QSERDES_V8_LALB_VCO_CTUNE_UPPER_BND_RATE2 0x644
#define QSERDES_V8_LALB_VCO_CTUNE_UPPER_BND_RATE3 0x648
#define QSERDES_V8_LALB_VCO_CTUNE_UPPER_BND_RATE4 0x64c
#define QSERDES_V8_LALB_CDR_LOCK_KVCO_OFFSET_RATE0 0x650
#define QSERDES_V8_LALB_CDR_LOCK_KVCO_OFFSET_RATE1 0x654
#define QSERDES_V8_LALB_CDR_LOCK_KVCO_OFFSET_RATE2 0x658
#define QSERDES_V8_LALB_CDR_LOCK_KVCO_OFFSET_RATE3 0x65c
#define QSERDES_V8_LALB_CDR_LOCK_KVCO_OFFSET_RATE4 0x660
#define QSERDES_V8_LALB_CDR_LOCK_KP_OFFSET_RATE0 0x664
#define QSERDES_V8_LALB_CDR_LOCK_KP_OFFSET_RATE1 0x668
#define QSERDES_V8_LALB_CDR_LOCK_KP_OFFSET_RATE2 0x66c
#define QSERDES_V8_LALB_CDR_LOCK_KP_OFFSET_RATE3 0x670
#define QSERDES_V8_LALB_CDR_LOCK_KP_OFFSET_RATE4 0x674
#define QSERDES_V8_LALB_CDR_FASTLOCK_CP_CUR_PLL_RATE0 0x678
#define QSERDES_V8_LALB_CDR_FASTLOCK_CP_CUR_PLL_RATE1 0x67c
#define QSERDES_V8_LALB_CDR_FASTLOCK_CP_CUR_PLL_RATE2 0x680
#define QSERDES_V8_LALB_CDR_FASTLOCK_CP_CUR_PLL_RATE3 0x684
#define QSERDES_V8_LALB_CDR_FASTLOCK_CP_CUR_PLL_RATE4 0x688
#define QSERDES_V8_LALB_DEBUG_BUS_SEL 0x68c
#define QSERDES_V8_LALB_BIST_STATUS 0x690
#define QSERDES_V8_LALB_BIST_ERROR_COUNT1 0x694
#define QSERDES_V8_LALB_BIST_ERROR_COUNT2 0x698
#define QSERDES_V8_LALB_AC_JTAG_OUTP 0x69c
#define QSERDES_V8_LALB_AC_JTAG_OUTN 0x6a0
#define QSERDES_V8_LALB_DATA_SLICER_DEBUG_STATUS 0x6a4
#define QSERDES_V8_LALB_DATA_SLICER_TIMER1_STATUS 0x6a8
#define QSERDES_V8_LALB_DATA_SLICER_TIMER2_STATUS 0x6ac
#define QSERDES_V8_LALB_TX0_RESTRIM_CODE_STATUS 0x6b0
#define QSERDES_V8_LALB_TX0_RESTRIM_ICAL_CODE_STATUS 0x6b4
#define QSERDES_V8_LALB_TX0_RESTRIM_CAL_STATUS 0x6b8
#define QSERDES_V8_LALB_TX1_RESTRIM_CODE_STATUS 0x6bc
#define QSERDES_V8_LALB_TX1_RESTRIM_ICAL_CODE_STATUS 0x6c0
#define QSERDES_V8_LALB_TX1_RESTRIM_CAL_STATUS 0x6c4
#define QSERDES_V8_LALB_CMUX_DCC_CAL_FSM_STATUS 0x6c8
#define QSERDES_V8_LALB_CMUX_DCC_READCODE_STATUS 0x6cc
#define QSERDES_V8_LALB_TX_DCC_CAL_ANA_STATUS 0x6d0
#define QSERDES_V8_LALB_TX0_CTUNE_DCC_FSM_DEBUG_STATUS 0x6d4
#define QSERDES_V8_LALB_TX0_COARSE_DCC_READCODE_STATUS 0x6d8
#define QSERDES_V8_LALB_TX0_FTUNE_MSB_DCC_FSM_DEBUG_STATUS 0x6dc
#define QSERDES_V8_LALB_TX0_FTUNE_LSB_DCC_FSM_DEBUG_STATUS 0x6e0
#define QSERDES_V8_LALB_TX0_FINE_DCC_READCODE_STATUS 0x6e4
#define QSERDES_V8_LALB_TX1_CTUNE_DCC_FSM_DEBUG_STATUS 0x6e8
#define QSERDES_V8_LALB_TX1_COARSE_DCC_READCODE_STATUS 0x6ec
#define QSERDES_V8_LALB_TX1_FTUNE_MSB_DCC_FSM_DEBUG_STATUS 0x6f0
#define QSERDES_V8_LALB_TX1_FTUNE_LSB_DCC_FSM_DEBUG_STATUS 0x6f4
#define QSERDES_V8_LALB_TX1_FINE_DCC_READCODE_STATUS 0x6f8
#define QSERDES_V8_LALB_CDR_VCO_CAL_STATUS 0x6fc
#define QSERDES_V8_LALB_CDR_VCTRL_STATUS 0x700
#define QSERDES_V8_LALB_CDR_VCO_CAP_CODE_STATUS 0x704
#define QSERDES_V8_LALB_KVCO_CAL_DEBUG1_STATUS 0x708
#define QSERDES_V8_LALB_KVCO_CAL_DEBUG2_STATUS 0x70c
#define QSERDES_V8_LALB_KP_CAL_DEBUG1_STATUS 0x710
#define QSERDES_V8_LALB_KP_CAL_DEBUG2_STATUS 0x714
#define QSERDES_V8_LALB_CDR_VCO_FREQ_DEBUG1_STATUS 0x718
#define QSERDES_V8_LALB_CDR_VCO_FREQ_DEBUG2_STATUS 0x71c
#define QSERDES_V8_LALB_CDR_VCO_FREQ_DEBUG3_STATUS 0x720
#define QSERDES_V8_LALB_CDR_VCO_FREQ_DEBUG4_STATUS 0x724
#define QSERDES_V8_LALB_IVCM_CAL_STATUS 0x728
#define QSERDES_V8_LALB_IVCM_CAL_DEBUG_STATUS 0x72c
#define QSERDES_V8_LALB_IDAC_STATUS_I0 0x730
#define QSERDES_V8_LALB_IDAC_STATUS_I0BAR 0x734
#define QSERDES_V8_LALB_IDAC_STATUS_I1 0x738
#define QSERDES_V8_LALB_IDAC_STATUS_I1BAR 0x73c
#define QSERDES_V8_LALB_IDAC_STATUS_Q 0x740
#define QSERDES_V8_LALB_IDAC_STATUS_QBAR 0x744
#define QSERDES_V8_LALB_IDAC_STATUS_A 0x748
#define QSERDES_V8_LALB_IDAC_STATUS_ABAR 0x74c
#define QSERDES_V8_LALB_IDAC_STATUS_SM_ON 0x750
#define QSERDES_V8_LALB_IDAC_STATUS_SIGNERROR 0x754
#define QSERDES_V8_LALB_RX_SIGDET_STATUS 0x758
#define QSERDES_V8_LALB_SIGDET_CAL_CODE_STATUS 0x75c
#define QSERDES_V8_LALB_SIGDET_CAL_FSM_DEBUG_STATUS 0x760
#define QSERDES_V8_LALB_CDR_FREQ_LOCK_CNT_STATUS 0x764
#define QSERDES_V8_LALB_CDR_PHASE_LOCK_CNT_STATUS 0x768
#define QSERDES_V8_LALB_CDR_LOCK_DEBUG_STATUS 0x76c
#define QSERDES_V8_LALB_IDATA_HIGH_STATUS1 0x770
#define QSERDES_V8_LALB_IDATA_HIGH_STATUS2 0x774
#define QSERDES_V8_LALB_IDATA_HIGH_STATUS3 0x778
#define QSERDES_V8_LALB_IDATA_HIGH_STATUS4 0x77c
#define QSERDES_V8_LALB_IDATA_LOW_STATUS1 0x780
#define QSERDES_V8_LALB_IDATA_LOW_STATUS2 0x784
#define QSERDES_V8_LALB_IDATA_LOW_STATUS3 0x788
#define QSERDES_V8_LALB_IDATA_LOW_STATUS4 0x78c
#define QSERDES_V8_LALB_QDATA_STATUS1 0x790
#define QSERDES_V8_LALB_QDATA_STATUS2 0x794
#define QSERDES_V8_LALB_QDATA_STATUS3 0x798
#define QSERDES_V8_LALB_QDATA_STATUS4 0x79c
#define QSERDES_V8_LALB_IA_ERROR_COUNTER_LOW 0x7a0
#define QSERDES_V8_LALB_IA_ERROR_COUNTER_HIGH 0x7a4
#define QSERDES_V8_LALB_EOM_ERR_CNT_LSB_STATUS 0x7a8
#define QSERDES_V8_LALB_EOM_ERR_CNT_MSB_STATUS 0x7ac
#define QSERDES_V8_LALB_EOM_OP_STATUS 0x7b0
#define QSERDES_V8_LALB_AUX_MIXER_INDEX_STATUS 0x7b4
#define QSERDES_V8_LALB_AUX_OFFSET_STATUS 0x7b8
#define QSERDES_V8_LALB_AUXDATA_TB_STATUS 0x7bc
#define QSERDES_V8_LALB_AUX_MIXER_CTRL_0_STATUS 0x7c0
#define QSERDES_V8_LALB_AUX_MIXER_CTRL_90_STATUS 0x7c4
#define QSERDES_V8_LALB_AUX_MIXER_CTRL_180_STATUS 0x7c8
#define QSERDES_V8_LALB_IQ_MIXER_INDEX_STATUS 0x7cc
#define QSERDES_V8_LALB_IQTUNE_FLTR_INDEX_STATUS 0x7d0
#define QSERDES_V8_LALB_IQ_MIXER_CTRL_0_STATUS 0x7d4
#define QSERDES_V8_LALB_IQ_MIXER_CTRL_90_STATUS 0x7d8
#define QSERDES_V8_LALB_IQ_MIXER_CTRL_180_STATUS 0x7dc
#define QSERDES_V8_LALB_READ_EQCODE 0x7e0
#define QSERDES_V8_LALB_READ_OFFSETCODE 0x7e4
#define QSERDES_V8_LALB_VGA_READ_CODE 0x7e8
#define QSERDES_V8_LALB_VTHRESH_READ_CODE 0x7ec
#define QSERDES_V8_LALB_DFE_TAP1_READ_CODE 0x7f0
#define QSERDES_V8_LALB_DFE_TAP2_READ_CODE 0x7f4
#define QSERDES_V8_LALB_DFE_TAP3_READ_CODE 0x7f8
#define QSERDES_V8_LALB_DFE_TAP4_READ_CODE 0x7fc
#define QSERDES_V8_LALB_DFE_TAP5_READ_CODE 0x800
#define QSERDES_V8_LALB_DFE_TAP6_READ_CODE 0x804
#define QSERDES_V8_LALB_DFE_TAP7_READ_CODE 0x808
#define QSERDES_V8_LALB_CDR_IQTUNE_FILTER_BIN_CODE 0x80c
#define QSERDES_V8_LALB_CDR_IQTUNE_FILTER_CLK0_CODE 0x810
#define QSERDES_V8_LALB_CDR_IQTUNE_FILTER_CLK90_CODE 0x814
#define QSERDES_V8_LALB_BLW_READ_CODE 0x818
#define QSERDES_V8_LALB_IA_OFFSET_CAL_DEBUG_STATUS 0x81c
#define QSERDES_V8_LALB_IA_OFFSET_CAL_STATUS 0x820
#define QSERDES_V8_LALB_IVTH_CAL_STATUS 0x824
#define QSERDES_V8_LALB_IVTH_NRZ_EYE_HEIGHT_STATUS 0x828
#define QSERDES_V8_LALB_IVTH_UPPER_EYE_MAX_STATUS 0x82c
#define QSERDES_V8_LALB_IVTH_UPPER_EYE_MIN_STATUS 0x830
#define QSERDES_V8_LALB_IVTH_LOWER_EYE_MAX_STATUS 0x834
#define QSERDES_V8_LALB_IVTH_LOWER_EYE_MIN_STATUS 0x838
#define QSERDES_V8_LALB_IVTH_UP_INIT_CTR_STATUS 0x83c
#define QSERDES_V8_LALB_VTH_I_UP_CNTRL_STATUS 0x840
#define QSERDES_V8_LALB_VTH_I_DN_CNTRL_STATUS 0x844
#define QSERDES_V8_LALB_NRZ_EYE_HEIGHT_SEL_STATUS 0x848
#define QSERDES_V8_LALB_DEBUG_BUS0 0x84c
#define QSERDES_V8_LALB_DEBUG_BUS1 0x850
#define QSERDES_V8_LALB_DEBUG_BUS2 0x854
#define QSERDES_V8_LALB_DEBUG_BUS3 0x858
#define QSERDES_V8_LALB_DIG_BKUP_CTRL1 0x85c
#define QSERDES_V8_LALB_DIG_BKUP_CTRL2 0x860
#define QSERDES_V8_LALB_DIG_BKUP_CTRL3 0x864
#define QSERDES_V8_LALB_DIG_BKUP_CTRL4 0x868
#define QSERDES_V8_LALB_DIG_BKUP_CTRL5 0x86c
#define QSERDES_V8_LALB_DIG_BKUP_CTRL6 0x870
#define QSERDES_V8_LALB_DIG_BKUP_CTRL7 0x874
#define QSERDES_V8_LALB_DIG_BKUP_CTRL8 0x878
#define QSERDES_V8_LALB_DIG_BKUP_CTRL9 0x87c
#define QSERDES_V8_LALB_DIG_BKUP_CTRL10 0x880
#define QSERDES_V8_LALB_DIG_BKUP_CTRL11 0x884
#define QSERDES_V8_LALB_DIG_BKUP_CTRL12 0x888
#define QSERDES_V8_LALB_DIG_BKUP_CTRL13 0x88c
#define QSERDES_V8_LALB_DIG_BKUP_CTRL14 0x890
#define QSERDES_V8_LALB_DIG_BKUP_CTRL15 0x894
#define QSERDES_V8_LALB_DIG_BKUP_CTRL16 0x898
#define QSERDES_V8_LALB_DIG_BKUP_CTRL17 0x89c
#define QSERDES_V8_LALB_DIG_BKUP_CTRL18 0x8a0
#define QSERDES_V8_LALB_DIG_BKUP_CTRL19 0x8a4
#define QSERDES_V8_LALB_DIG_BKUP_CTRL20 0x8a8
#define QSERDES_V8_LALB_DIG_BKUP_CTRL21 0x8ac
#define QSERDES_V8_LALB_DIG_BKUP_CTRL22 0x8b0
#define QSERDES_V8_LALB_DIG_BKUP_CTRL23 0x8b4
#define QSERDES_V8_LALB_DIG_BKUP_CTRL24 0x8b8
#define QSERDES_V8_LALB_DIG_BKUP_CTRL25 0x8bc
#define QSERDES_V8_LALB_DIG_BKUP_CTRL26 0x8c0
#define QSERDES_V8_LALB_DIG_BKUP_CTRL27 0x8c4
#define QSERDES_V8_LALB_DIG_BKUP_CTRL28 0x8c8
#define QSERDES_V8_LALB_DIG_BKUP_CTRL29 0x8cc
#define QSERDES_V8_LALB_DIG_BKUP_CTRL30 0x8d0
#define QSERDES_V8_LALB_DIG_BKUP_CTRL31 0x8d4
#define QSERDES_V8_LALB_DIG_BKUP_CTRL32 0x8d8
#define QSERDES_V8_LALB_DIG_BKUP_CTRL_V2_1 0x8dc
#define QSERDES_V8_LALB_DIG_BKUP_CTRL_V2_2 0x8e0
#define QSERDES_V8_LALB_DIG_BKUP_CTRL_V2_3 0x8e4
#define QSERDES_V8_LALB_DIG_BKUP_CTRL_V2_4 0x8e8
#define QSERDES_V8_LALB_DIG_BKUP_CTRL_V2_5 0x8ec
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS1 0x8f0
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS2 0x8f4
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS3 0x8f8
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS4 0x8fc
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS5 0x900
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS6 0x904
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS7 0x908
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS8 0x90c
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS9 0x910
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS10 0x914
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS11 0x918
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS12 0x91c
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS13 0x920
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS14 0x924
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS15 0x928
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS16 0x92c
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS17 0x930
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS18 0x934
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS19 0x938
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS20 0x93c
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS21 0x940
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS22 0x944
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS23 0x948
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS24 0x94c
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS25 0x950
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS26 0x954
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS27 0x958
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS28 0x95c
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS29 0x960
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS30 0x964
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS31 0x968
#define QSERDES_V8_LALB_DIG_BKUP_RO_BUS32 0x96c
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS1 0x970
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS2 0x974
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS3 0x978
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS4 0x97c
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS5 0x980
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS6 0x984
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS7 0x988
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS8 0x98c
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS9 0x990
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS10 0x994
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS11 0x998
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS12 0x99c
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS13 0x9a0
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS14 0x9a4
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS15 0x9a8
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS16 0x9ac
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS17 0x9b0
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS18 0x9b4
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS19 0x9b8
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS20 0x9bc
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS21 0x9c0
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS22 0x9c4
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS23 0x9c8
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS24 0x9cc
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS25 0x9d0
#define QSERDES_V8_LALB_DIG_BKUP_RO_V2_BUS26 0x9d4
#endif
