root/include/linux/irqchip/riscv-aplic.h
/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2021 Western Digital Corporation or its affiliates.
 * Copyright (C) 2022 Ventana Micro Systems Inc.
 */
#ifndef __LINUX_IRQCHIP_RISCV_APLIC_H
#define __LINUX_IRQCHIP_RISCV_APLIC_H

#include <linux/bitops.h>

#define APLIC_MAX_IDC                   BIT(14)
#define APLIC_MAX_SOURCE                1024

#define APLIC_DOMAINCFG                 0x0000
#define APLIC_DOMAINCFG_RDONLY          0x80000000
#define APLIC_DOMAINCFG_IE              BIT(8)
#define APLIC_DOMAINCFG_DM              BIT(2)
#define APLIC_DOMAINCFG_BE              BIT(0)

#define APLIC_SOURCECFG_BASE            0x0004
#define APLIC_SOURCECFG_D               BIT(10)
#define APLIC_SOURCECFG_CHILDIDX_MASK   0x000003ff
#define APLIC_SOURCECFG_SM_MASK 0x00000007
#define APLIC_SOURCECFG_SM_INACTIVE     0x0
#define APLIC_SOURCECFG_SM_DETACH       0x1
#define APLIC_SOURCECFG_SM_EDGE_RISE    0x4
#define APLIC_SOURCECFG_SM_EDGE_FALL    0x5
#define APLIC_SOURCECFG_SM_LEVEL_HIGH   0x6
#define APLIC_SOURCECFG_SM_LEVEL_LOW    0x7

#define APLIC_MMSICFGADDR               0x1bc0
#define APLIC_MMSICFGADDRH              0x1bc4
#define APLIC_SMSICFGADDR               0x1bc8
#define APLIC_SMSICFGADDRH              0x1bcc

#ifdef CONFIG_RISCV_M_MODE
#define APLIC_xMSICFGADDR               APLIC_MMSICFGADDR
#define APLIC_xMSICFGADDRH              APLIC_MMSICFGADDRH
#else
#define APLIC_xMSICFGADDR               APLIC_SMSICFGADDR
#define APLIC_xMSICFGADDRH              APLIC_SMSICFGADDRH
#endif

#define APLIC_xMSICFGADDRH_L            BIT(31)
#define APLIC_xMSICFGADDRH_HHXS_MASK    0x1f
#define APLIC_xMSICFGADDRH_HHXS_SHIFT   24
#define APLIC_xMSICFGADDRH_HHXS         (APLIC_xMSICFGADDRH_HHXS_MASK << \
                                         APLIC_xMSICFGADDRH_HHXS_SHIFT)
#define APLIC_xMSICFGADDRH_LHXS_MASK    0x7
#define APLIC_xMSICFGADDRH_LHXS_SHIFT   20
#define APLIC_xMSICFGADDRH_LHXS         (APLIC_xMSICFGADDRH_LHXS_MASK << \
                                         APLIC_xMSICFGADDRH_LHXS_SHIFT)
#define APLIC_xMSICFGADDRH_HHXW_MASK    0x7
#define APLIC_xMSICFGADDRH_HHXW_SHIFT   16
#define APLIC_xMSICFGADDRH_HHXW         (APLIC_xMSICFGADDRH_HHXW_MASK << \
                                         APLIC_xMSICFGADDRH_HHXW_SHIFT)
#define APLIC_xMSICFGADDRH_LHXW_MASK    0xf
#define APLIC_xMSICFGADDRH_LHXW_SHIFT   12
#define APLIC_xMSICFGADDRH_LHXW         (APLIC_xMSICFGADDRH_LHXW_MASK << \
                                         APLIC_xMSICFGADDRH_LHXW_SHIFT)
#define APLIC_xMSICFGADDRH_BAPPN_MASK   0xfff
#define APLIC_xMSICFGADDRH_BAPPN_SHIFT  0
#define APLIC_xMSICFGADDRH_BAPPN        (APLIC_xMSICFGADDRH_BAPPN_MASK << \
                                         APLIC_xMSICFGADDRH_BAPPN_SHIFT)

#define APLIC_xMSICFGADDR_PPN_SHIFT     12

#define APLIC_xMSICFGADDR_PPN_HART(__lhxs) \
        (BIT(__lhxs) - 1)

#define APLIC_xMSICFGADDR_PPN_LHX_MASK(__lhxw) \
        (BIT(__lhxw) - 1)
#define APLIC_xMSICFGADDR_PPN_LHX_SHIFT(__lhxs) \
        ((__lhxs))
#define APLIC_xMSICFGADDR_PPN_LHX(__lhxw, __lhxs) \
        (APLIC_xMSICFGADDR_PPN_LHX_MASK(__lhxw) << \
         APLIC_xMSICFGADDR_PPN_LHX_SHIFT(__lhxs))

#define APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) \
        (BIT(__hhxw) - 1)
#define APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs) \
        ((__hhxs) + APLIC_xMSICFGADDR_PPN_SHIFT)
#define APLIC_xMSICFGADDR_PPN_HHX(__hhxw, __hhxs) \
        (APLIC_xMSICFGADDR_PPN_HHX_MASK(__hhxw) << \
         APLIC_xMSICFGADDR_PPN_HHX_SHIFT(__hhxs))

#define APLIC_IRQBITS_PER_REG           32

#define APLIC_SETIP_BASE                0x1c00
#define APLIC_SETIPNUM                  0x1cdc

#define APLIC_CLRIP_BASE                0x1d00
#define APLIC_CLRIPNUM                  0x1ddc

#define APLIC_SETIE_BASE                0x1e00
#define APLIC_SETIENUM                  0x1edc

#define APLIC_CLRIE_BASE                0x1f00
#define APLIC_CLRIENUM                  0x1fdc

#define APLIC_SETIPNUM_LE               0x2000
#define APLIC_SETIPNUM_BE               0x2004

#define APLIC_GENMSI                    0x3000

#define APLIC_TARGET_BASE               0x3004
#define APLIC_TARGET_HART_IDX_SHIFT     18
#define APLIC_TARGET_HART_IDX_MASK      0x3fff
#define APLIC_TARGET_HART_IDX           (APLIC_TARGET_HART_IDX_MASK << \
                                         APLIC_TARGET_HART_IDX_SHIFT)
#define APLIC_TARGET_GUEST_IDX_SHIFT    12
#define APLIC_TARGET_GUEST_IDX_MASK     0x3f
#define APLIC_TARGET_GUEST_IDX          (APLIC_TARGET_GUEST_IDX_MASK << \
                                         APLIC_TARGET_GUEST_IDX_SHIFT)
#define APLIC_TARGET_IPRIO_SHIFT        0
#define APLIC_TARGET_IPRIO_MASK         0xff
#define APLIC_TARGET_IPRIO              (APLIC_TARGET_IPRIO_MASK << \
                                         APLIC_TARGET_IPRIO_SHIFT)
#define APLIC_TARGET_EIID_SHIFT         0
#define APLIC_TARGET_EIID_MASK          0x7ff
#define APLIC_TARGET_EIID               (APLIC_TARGET_EIID_MASK << \
                                         APLIC_TARGET_EIID_SHIFT)

#define APLIC_IDC_BASE                  0x4000
#define APLIC_IDC_SIZE                  32

#define APLIC_IDC_IDELIVERY             0x00

#define APLIC_IDC_IFORCE                0x04

#define APLIC_IDC_ITHRESHOLD            0x08

#define APLIC_IDC_TOPI                  0x18
#define APLIC_IDC_TOPI_ID_SHIFT         16
#define APLIC_IDC_TOPI_ID_MASK          0x3ff
#define APLIC_IDC_TOPI_ID               (APLIC_IDC_TOPI_ID_MASK << \
                                         APLIC_IDC_TOPI_ID_SHIFT)
#define APLIC_IDC_TOPI_PRIO_SHIFT       0
#define APLIC_IDC_TOPI_PRIO_MASK        0xff
#define APLIC_IDC_TOPI_PRIO             (APLIC_IDC_TOPI_PRIO_MASK << \
                                         APLIC_IDC_TOPI_PRIO_SHIFT)

#define APLIC_IDC_CLAIMI                0x1c

#endif