arch/mips/cavium-octeon/executive/cvmx-spi.c

385

stxx_spi4_dat.s.alpha = 32;

arch/mips/include/asm/octeon/cvmx-stxx-defs.h

249

uint64_t alpha:16;

arch/mips/include/asm/octeon/cvmx-stxx-defs.h

253

uint64_t alpha:16;

arch/powerpc/platforms/85xx/p1022_ds.c

103

#define MAKE_AD(alpha, red, blue, green, size, c0, c1, c2, c3) \

arch/powerpc/platforms/85xx/p1022_ds.c

104

cpu_to_le32(AD_BYTE_F | (alpha << AD_ALPHA_C_SHIFT) | \

drivers/clk/qcom/cambistmclkcc-kaanapali.c

45

.alpha = 0x0,

drivers/clk/qcom/cambistmclkcc-sm8750.c

42

.alpha = 0x0,

drivers/clk/qcom/camcc-kaanapali.c

130

.alpha = 0xa2aa,

drivers/clk/qcom/camcc-kaanapali.c

183

.alpha = 0x4aaa,

drivers/clk/qcom/camcc-kaanapali.c

236

.alpha = 0x8777,

drivers/clk/qcom/camcc-kaanapali.c

289

.alpha = 0x8777,

drivers/clk/qcom/camcc-kaanapali.c

342

.alpha = 0x8777,

drivers/clk/qcom/camcc-kaanapali.c

395

.alpha = 0x0,

drivers/clk/qcom/camcc-kaanapali.c

471

.alpha = 0x1555,

drivers/clk/qcom/camcc-kaanapali.c

54

.alpha = 0x8000,

drivers/clk/qcom/camcc-milos.c

145

.alpha = 0x4000,

drivers/clk/qcom/camcc-milos.c

201

.alpha = 0x0,

drivers/clk/qcom/camcc-milos.c

230

.alpha = 0x4000,

drivers/clk/qcom/camcc-milos.c

286

.alpha = 0x7555,

drivers/clk/qcom/camcc-milos.c

342

.alpha = 0x7555,

drivers/clk/qcom/camcc-milos.c

398

.alpha = 0x7555,

drivers/clk/qcom/camcc-milos.c

66

.alpha = 0x8000,

drivers/clk/qcom/camcc-qcs615.c

85

.alpha = 0x55555555,

drivers/clk/qcom/camcc-sa8775p.c

129

.alpha = 0x0,

drivers/clk/qcom/camcc-sa8775p.c

156

.alpha = 0x0,

drivers/clk/qcom/camcc-sa8775p.c

206

.alpha = 0x0,

drivers/clk/qcom/camcc-sa8775p.c

256

.alpha = 0x0,

drivers/clk/qcom/camcc-sa8775p.c

56

.alpha = 0x8000,

drivers/clk/qcom/camcc-sc7180.c

162

.alpha = 0x4000,

drivers/clk/qcom/camcc-sc7180.c

44

.alpha = 0x4000,

drivers/clk/qcom/camcc-sc7180.c

72

.alpha = 0x1555,

drivers/clk/qcom/camcc-sc7280.c

126

.alpha = 0x4000,

drivers/clk/qcom/camcc-sc7280.c

178

.alpha = 0x0,

drivers/clk/qcom/camcc-sc7280.c

251

.alpha = 0x9555,

drivers/clk/qcom/camcc-sc7280.c

303

.alpha = 0x9555,

drivers/clk/qcom/camcc-sc7280.c

355

.alpha = 0x9555,

drivers/clk/qcom/camcc-sc7280.c

407

.alpha = 0x0,

drivers/clk/qcom/camcc-sc7280.c

51

.alpha = 0x8000,

drivers/clk/qcom/camcc-sc8180x.c

128

.alpha = 0x8800,

drivers/clk/qcom/camcc-sc8180x.c

158

.alpha = 0x0,

drivers/clk/qcom/camcc-sc8180x.c

211

.alpha = 0xd555,

drivers/clk/qcom/camcc-sc8180x.c

241

.alpha = 0xd555,

drivers/clk/qcom/camcc-sc8180x.c

271

.alpha = 0xd555,

drivers/clk/qcom/camcc-sc8180x.c

301

.alpha = 0xd555,

drivers/clk/qcom/camcc-sc8180x.c

52

.alpha = 0x8000,

drivers/clk/qcom/camcc-sc8280xp.c

132

.alpha = 0x5555,

drivers/clk/qcom/camcc-sc8280xp.c

185

.alpha = 0x0,

drivers/clk/qcom/camcc-sc8280xp.c

210

.alpha = 0xaaaa,

drivers/clk/qcom/camcc-sc8280xp.c

263

.alpha = 0xaaaa,

drivers/clk/qcom/camcc-sc8280xp.c

316

.alpha = 0xaaaa,

drivers/clk/qcom/camcc-sc8280xp.c

369

.alpha = 0xaaaa,

drivers/clk/qcom/camcc-sc8280xp.c

422

.alpha = 0x0,

drivers/clk/qcom/camcc-sc8280xp.c

57

.alpha = 0x8000,

drivers/clk/qcom/camcc-sdm845.c

1727

cam_cc_pll_config.alpha = 0x4000;

drivers/clk/qcom/camcc-sdm845.c

1731

cam_cc_pll_config.alpha = 0x1556;

drivers/clk/qcom/camcc-sdm845.c

1735

cam_cc_pll_config.alpha = 0x0;

drivers/clk/qcom/camcc-sm4450.c

125

.alpha = 0x4000,

drivers/clk/qcom/camcc-sm4450.c

176

.alpha = 0x0,

drivers/clk/qcom/camcc-sm4450.c

227

.alpha = 0x4000,

drivers/clk/qcom/camcc-sm4450.c

278

.alpha = 0x7555,

drivers/clk/qcom/camcc-sm4450.c

51

.alpha = 0x8000,

drivers/clk/qcom/camcc-sm6350.c

146

.alpha = 0x0,

drivers/clk/qcom/camcc-sm6350.c

208

.alpha = 0x0,

drivers/clk/qcom/camcc-sm6350.c

42

.alpha = 0x4000,

drivers/clk/qcom/camcc-sm6350.c

94

.alpha = 0x1555,

drivers/clk/qcom/camcc-sm7150.c

101

.alpha = 0x6aaa,

drivers/clk/qcom/camcc-sm7150.c

209

.alpha = 0x9555,

drivers/clk/qcom/camcc-sm7150.c

49

.alpha = 0x8000,

drivers/clk/qcom/camcc-sm8150.c

128

.alpha = 0x4000,

drivers/clk/qcom/camcc-sm8150.c

182

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8150.c

236

.alpha = 0xaaaa,

drivers/clk/qcom/camcc-sm8150.c

290

.alpha = 0xaaaa,

drivers/clk/qcom/camcc-sm8150.c

51

.alpha = 0x8000,

drivers/clk/qcom/camcc-sm8250.c

118

.alpha = 0x4000,

drivers/clk/qcom/camcc-sm8250.c

169

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8250.c

220

.alpha = 0x7555,

drivers/clk/qcom/camcc-sm8250.c

271

.alpha = 0x7555,

drivers/clk/qcom/camcc-sm8250.c

44

.alpha = 0x8000,

drivers/clk/qcom/camcc-sm8450.c

170

.alpha = 0xeaaa,

drivers/clk/qcom/camcc-sm8450.c

180

.alpha = 0xeaaa,

drivers/clk/qcom/camcc-sm8450.c

243

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

251

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

277

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

287

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

350

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

360

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

423

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

433

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

496

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

506

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

569

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

579

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

64

.alpha = 0x8000,

drivers/clk/qcom/camcc-sm8450.c

642

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

652

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8450.c

74

.alpha = 0x8000,

drivers/clk/qcom/camcc-sm8550.c

139

.alpha = 0x6555,

drivers/clk/qcom/camcc-sm8550.c

194

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8550.c

222

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8550.c

277

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8550.c

332

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8550.c

387

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8550.c

442

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8550.c

497

.alpha = 0xd555,

drivers/clk/qcom/camcc-sm8550.c

552

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8550.c

607

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8550.c

61

.alpha = 0x8000,

drivers/clk/qcom/camcc-sm8550.c

662

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8550.c

717

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8650.c

137

.alpha = 0x7aaa,

drivers/clk/qcom/camcc-sm8650.c

192

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8650.c

220

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8650.c

275

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8650.c

330

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8650.c

385

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8650.c

440

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8650.c

495

.alpha = 0xd555,

drivers/clk/qcom/camcc-sm8650.c

550

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8650.c

59

.alpha = 0x8000,

drivers/clk/qcom/camcc-sm8650.c

628

.alpha = 0x8aaa,

drivers/clk/qcom/camcc-sm8750.c

124

.alpha = 0xa2aa,

drivers/clk/qcom/camcc-sm8750.c

175

.alpha = 0x4aaa,

drivers/clk/qcom/camcc-sm8750.c

226

.alpha = 0x8777,

drivers/clk/qcom/camcc-sm8750.c

277

.alpha = 0x8777,

drivers/clk/qcom/camcc-sm8750.c

328

.alpha = 0x8777,

drivers/clk/qcom/camcc-sm8750.c

379

.alpha = 0x0,

drivers/clk/qcom/camcc-sm8750.c

50

.alpha = 0x8000,

drivers/clk/qcom/camcc-x1e80100.c

132

.alpha = 0xaaaa,

drivers/clk/qcom/camcc-x1e80100.c

187

.alpha = 0x0,

drivers/clk/qcom/camcc-x1e80100.c

215

.alpha = 0x0,

drivers/clk/qcom/camcc-x1e80100.c

270

.alpha = 0x0,

drivers/clk/qcom/camcc-x1e80100.c

325

.alpha = 0x0,

drivers/clk/qcom/camcc-x1e80100.c

380

.alpha = 0x0,

drivers/clk/qcom/camcc-x1e80100.c

54

.alpha = 0x8000,

drivers/clk/qcom/camcc-x1p42100.c

132

.alpha = 0xeaaa,

drivers/clk/qcom/camcc-x1p42100.c

188

.alpha = 0x0,

drivers/clk/qcom/camcc-x1p42100.c

217

.alpha = 0x0,

drivers/clk/qcom/camcc-x1p42100.c

273

.alpha = 0x0,

drivers/clk/qcom/camcc-x1p42100.c

53

.alpha = 0x8000,

drivers/clk/qcom/clk-alpha-pll.c

1000

return alpha_huayra_pll_calc_rate(rate, l, alpha);

drivers/clk/qcom/clk-alpha-pll.c

1002

alpha_m = alpha >> PLL_HUAYRA_M_SHIFT & PLL_HUAYRA_M_MASK;

drivers/clk/qcom/clk-alpha-pll.c

1003

alpha_n = alpha >> PLL_HUAYRA_N_SHIFT & PLL_HUAYRA_N_MASK;

drivers/clk/qcom/clk-alpha-pll.c

1021

return alpha_huayra_pll_calc_rate(rate, l, alpha);

drivers/clk/qcom/clk-alpha-pll.c

1331

clk_alpha_pll_write_config(regmap, PLL_FRAC(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

1729

clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

1882

clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

1951

clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

2166

clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

2351

clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

2379

clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

2707

clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

2794

regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

2972

clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

462

regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

807

u32 l, u64 alpha, u32 alpha_width, bool alpha_en)

drivers/clk/qcom/clk-alpha-pll.c

812

alpha <<= alpha_width - ALPHA_BITWIDTH;

drivers/clk/qcom/clk-alpha-pll.c

815

regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), upper_32_bits(alpha));

drivers/clk/qcom/clk-alpha-pll.c

817

regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), lower_32_bits(alpha));

drivers/clk/qcom/clk-alpha-pll.c

898

clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);

drivers/clk/qcom/clk-alpha-pll.c

972

u32 l, alpha = 0, ctl, alpha_m, alpha_n;

drivers/clk/qcom/clk-alpha-pll.c

981

regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &alpha);

drivers/clk/qcom/clk-alpha-pll.h

136

u32 alpha;

drivers/clk/qcom/dispcc-eliza.c

118

.alpha = 0x4000,

drivers/clk/qcom/dispcc-eliza.c

151

.alpha = 0x0,

drivers/clk/qcom/dispcc-eliza.c

85

.alpha = 0x6492,

drivers/clk/qcom/dispcc-glymur.c

105

.alpha = 0x4000,

drivers/clk/qcom/dispcc-glymur.c

76

.alpha = 0x6492,

drivers/clk/qcom/dispcc-kaanapali.c

107

.alpha = 0xa000,

drivers/clk/qcom/dispcc-kaanapali.c

137

.alpha = 0x0,

drivers/clk/qcom/dispcc-kaanapali.c

77

.alpha = 0x6492,

drivers/clk/qcom/dispcc-milos.c

59

.alpha = 0x6492,

drivers/clk/qcom/dispcc-sc7180.c

718

disp_cc_pll_config.alpha = 0xe000;

drivers/clk/qcom/dispcc-sc7280.c

41

.alpha = 0x2AAA,

drivers/clk/qcom/dispcc-sc8280xp.c

116

.alpha = 0x4000,

drivers/clk/qcom/dispcc-sc8280xp.c

199

.alpha = 0x5000,

drivers/clk/qcom/dispcc-sc8280xp.c

72

.alpha = 0x2000,

drivers/clk/qcom/dispcc-sdm845.c

858

disp_cc_pll0_config.alpha = 0xcaaa;

drivers/clk/qcom/dispcc-sm4450.c

50

.alpha = 0x4000,

drivers/clk/qcom/dispcc-sm6350.c

40

.alpha = 0x5555,

drivers/clk/qcom/dispcc-sm6375.c

45

.alpha = 0x800,

drivers/clk/qcom/dispcc-sm7150.c

59

.alpha = 0xcaaa,

drivers/clk/qcom/dispcc-sm8250.c

51

.alpha = 0xE000,

drivers/clk/qcom/dispcc-sm8250.c

79

.alpha = 0x4000,

drivers/clk/qcom/dispcc-sm8450.c

128

.alpha = 0x4000,

drivers/clk/qcom/dispcc-sm8450.c

138

.alpha = 0x4000,

drivers/clk/qcom/dispcc-sm8450.c

78

.alpha = 0x6492,

drivers/clk/qcom/dispcc-sm8450.c

88

.alpha = 0x6492,

drivers/clk/qcom/dispcc-sm8550.c

109

.alpha = 0x4000,

drivers/clk/qcom/dispcc-sm8550.c

1791

disp_cc_pll0_config.alpha = 0x4000;

drivers/clk/qcom/dispcc-sm8550.c

78

.alpha = 0x6492,

drivers/clk/qcom/dispcc-sm8750.c

110

.alpha = 0x4000,

drivers/clk/qcom/dispcc-sm8750.c

137

.alpha = 0x0,

drivers/clk/qcom/dispcc-sm8750.c

83

.alpha = 0x6492,

drivers/clk/qcom/dispcc-x1e80100.c

108

.alpha = 0x4000,

drivers/clk/qcom/dispcc-x1e80100.c

77

.alpha = 0x6492,

drivers/clk/qcom/dispcc0-sa8775p.c

62

.alpha = 0x9800,

drivers/clk/qcom/dispcc0-sa8775p.c

89

.alpha = 0x4000,

drivers/clk/qcom/dispcc1-sa8775p.c

62

.alpha = 0x9800,

drivers/clk/qcom/dispcc1-sa8775p.c

89

.alpha = 0x4000,

drivers/clk/qcom/ecpricc-qdu1000.c

51

.alpha = 0x7555,

drivers/clk/qcom/ecpricc-qdu1000.c

81

.alpha = 0xfaaa,

drivers/clk/qcom/gcc-ipq5018.c

3363

.alpha = 0xaaaaaaaa,

drivers/clk/qcom/gcc-ipq6018.c

4199

.alpha = 0x6667,

drivers/clk/qcom/gcc-ipq8074.c

4314

.alpha = 0x0,

drivers/clk/qcom/gcc-qcm2290.c

114

.alpha = 0x0,

drivers/clk/qcom/gcc-qcm2290.c

144

.alpha = 0x55555555,

drivers/clk/qcom/gcc-qcm2290.c

302

.alpha = 0x55555555,

drivers/clk/qcom/gcc-qcm2290.c

359

.alpha = 0x0,

drivers/clk/qcom/gcc-qcs404.c

135

.alpha = 0x0,

drivers/clk/qcom/gcc-sm4450.c

134

.alpha = 0xd555,

drivers/clk/qcom/gcc-sm6115.c

170

.alpha = 0x0,

drivers/clk/qcom/gcc-sm6115.c

360

.alpha = 0xAAAAAAAA,

drivers/clk/qcom/gcc-sm6115.c

418

.alpha = 0x0,

drivers/clk/qcom/gcc-sm6375.c

142

.alpha = 0x0,

drivers/clk/qcom/gcc-sm6375.c

174

.alpha = 0xb555,

drivers/clk/qcom/gcc-sm6375.c

335

.alpha = 0xd555,

drivers/clk/qcom/gcc-sm6375.c

390

.alpha = 0x0,

drivers/clk/qcom/gpucc-glymur.c

46

.alpha = 0xe555,

drivers/clk/qcom/gpucc-kaanapali.c

47

.alpha = 0x7aaa,

drivers/clk/qcom/gpucc-milos.c

48

.alpha = 0x7555,

drivers/clk/qcom/gpucc-qcs615.c

58

.alpha = 0x00,

drivers/clk/qcom/gpucc-qcs615.c

90

.alpha = 0x00,

drivers/clk/qcom/gpucc-sa8775p.c

49

.alpha = 0x3000,

drivers/clk/qcom/gpucc-sa8775p.c

639

gpu_cc_pll0_config.alpha = 0xe555;

drivers/clk/qcom/gpucc-sa8775p.c

75

.alpha = 0x1555,

drivers/clk/qcom/gpucc-sar2130p.c

44

.alpha = 0x7aaa,

drivers/clk/qcom/gpucc-sar2130p.c

76

.alpha = 0xeaaa,

drivers/clk/qcom/gpucc-sc7180.c

229

gpu_cc_pll_config.alpha = 0xc000;

drivers/clk/qcom/gpucc-sc7280.c

54

.alpha = 0xAAA,

drivers/clk/qcom/gpucc-sc8280xp.c

46

.alpha = 0xa555,

drivers/clk/qcom/gpucc-sc8280xp.c

75

.alpha = 0xaaa,

drivers/clk/qcom/gpucc-sdm660.c

310

.alpha = 0xaaaaab00,

drivers/clk/qcom/gpucc-sdm845.c

35

.alpha = 0xaab,

drivers/clk/qcom/gpucc-sm4450.c

48

.alpha = 0x6aaa,

drivers/clk/qcom/gpucc-sm4450.c

76

.alpha = 0xaaa,

drivers/clk/qcom/gpucc-sm6115.c

107

.alpha = 0x55555555,

drivers/clk/qcom/gpucc-sm6115.c

50

.alpha = 0,

drivers/clk/qcom/gpucc-sm6125.c

48

.alpha = 0x00,

drivers/clk/qcom/gpucc-sm6125.c

60

.alpha = 0x00,

drivers/clk/qcom/gpucc-sm6350.c

52

.alpha = 0x5AAA,

drivers/clk/qcom/gpucc-sm6350.c

96

.alpha = 0xC555,

drivers/clk/qcom/gpucc-sm6375.c

51

.alpha = 0xb555,

drivers/clk/qcom/gpucc-sm6375.c

80

.alpha = 0xc555,

drivers/clk/qcom/gpucc-sm8150.c

35

.alpha = 0xaaa,

drivers/clk/qcom/gpucc-sm8250.c

41

.alpha = 0xaaa,

drivers/clk/qcom/gpucc-sm8350.c

42

.alpha = 0x6000,

drivers/clk/qcom/gpucc-sm8350.c

75

.alpha = 0xaaa,

drivers/clk/qcom/gpucc-sm8450.c

44

.alpha = 0xb000,

drivers/clk/qcom/gpucc-sm8450.c

54

.alpha = 0xb000,

drivers/clk/qcom/gpucc-sm8450.c

85

.alpha = 0x1555,

drivers/clk/qcom/gpucc-sm8450.c

95

.alpha = 0x1555,

drivers/clk/qcom/gpucc-sm8550.c

42

.alpha = 0xbaaa,

drivers/clk/qcom/gpucc-sm8550.c

73

.alpha = 0xeaaa,

drivers/clk/qcom/gpucc-sm8650.c

45

.alpha = 0x4aaa,

drivers/clk/qcom/gpucc-sm8650.c

76

.alpha = 0x1555,

drivers/clk/qcom/gpucc-sm8750.c

43

.alpha = 0x1555,

drivers/clk/qcom/gpucc-x1e80100.c

47

.alpha = 0xa000,

drivers/clk/qcom/gpucc-x1e80100.c

75

.alpha = 0xeaaa,

drivers/clk/qcom/gpucc-x1p42100.c

47

.alpha = 0x2aaa,

drivers/clk/qcom/gpucc-x1p42100.c

79

.alpha = 0xeaaa,

drivers/clk/qcom/lpassaudiocc-sc7280.c

127

.alpha = 0x0,

drivers/clk/qcom/lpassaudiocc-sc7280.c

74

.alpha = 0xcccc,

drivers/clk/qcom/lpasscorecc-sc7180.c

35

.alpha = 0x0,

drivers/clk/qcom/lpasscorecc-sc7280.c

38

.alpha = 0x0,

drivers/clk/qcom/nsscc-ipq9574.c

64

.alpha = 0x6666,

drivers/clk/qcom/videocc-glymur.c

43

.alpha = 0x8000,

drivers/clk/qcom/videocc-kaanapali.c

105

.alpha = 0x0,

drivers/clk/qcom/videocc-kaanapali.c

135

.alpha = 0x0,

drivers/clk/qcom/videocc-kaanapali.c

45

.alpha = 0xc000,

drivers/clk/qcom/videocc-kaanapali.c

75

.alpha = 0x0,

drivers/clk/qcom/videocc-milos.c

44

.alpha = 0x8000,

drivers/clk/qcom/videocc-qcs615.c

46

.alpha = 0x00,

drivers/clk/qcom/videocc-sa8775p.c

47

.alpha = 0x3000,

drivers/clk/qcom/videocc-sa8775p.c

74

.alpha = 0x3000,

drivers/clk/qcom/videocc-sc7180.c

220

video_pll0_config.alpha = 0x4000;

drivers/clk/qcom/videocc-sc7280.c

34

.alpha = 0xD555,

drivers/clk/qcom/videocc-sdm845.c

30

.alpha = 0xaaab,

drivers/clk/qcom/videocc-sm6350.c

41

.alpha = 0x4000,

drivers/clk/qcom/videocc-sm7150.c

41

.alpha = 0x0,

drivers/clk/qcom/videocc-sm8150.c

33

.alpha = 0xD555,

drivers/clk/qcom/videocc-sm8250.c

35

.alpha = 0x8000,

drivers/clk/qcom/videocc-sm8250.c

63

.alpha = 0xC000,

drivers/clk/qcom/videocc-sm8350.c

50

.alpha = 0x8000,

drivers/clk/qcom/videocc-sm8350.c

81

.alpha = 0xc000,

drivers/clk/qcom/videocc-sm8450.c

39

.alpha = 0x0,

drivers/clk/qcom/videocc-sm8450.c

50

.alpha = 0x0,

drivers/clk/qcom/videocc-sm8450.c

83

.alpha = 0xc000,

drivers/clk/qcom/videocc-sm8450.c

94

.alpha = 0xc000,

drivers/clk/qcom/videocc-sm8550.c

38

.alpha = 0x8000,

drivers/clk/qcom/videocc-sm8550.c

589

video_cc_pll0_config.alpha = 0x0000;

drivers/clk/qcom/videocc-sm8550.c

591

video_cc_pll1_config.alpha = 0xc000;

drivers/clk/qcom/videocc-sm8550.c

598

video_cc_pll0_config.alpha = 0xa000;

drivers/clk/qcom/videocc-sm8550.c

600

video_cc_pll1_config.alpha = 0xc000;

drivers/clk/qcom/videocc-sm8550.c

70

.alpha = 0xb000,

drivers/clk/qcom/videocc-sm8750.c

42

.alpha = 0x8000,

drivers/clk/qcom/videocc-x1p42100.c

39

.alpha = 0xe000,

drivers/clk/qcom/videocc-x1p42100.c

72

.alpha = 0xb000,

drivers/crypto/intel/qat/qat_common/adf_tl_debugfs.h

31

#define ADF_TL_DBG_RP_INDEX_ALPHA(alpha) ((alpha) - 'A')

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12405

if (old_other_state->alpha != new_other_state->alpha)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

137

if (plane_state->alpha < 0xffff) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

139

*global_alpha_value = plane_state->alpha >> 8;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

247

__field(u32, alpha)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

276

__entry->alpha = state->alpha;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

303

__entry->alpha, __entry->pixel_blend_mode, __entry->rotation,

drivers/gpu/drm/amd/display/dc/dml2_0/cmntypes.h

66

uint8 alpha;

drivers/gpu/drm/arm/display/komeda/komeda_plane.c

38

dflow->layer_alpha = st->alpha >> 8;

drivers/gpu/drm/arm/malidp_planes.c

595

if ((new_plane_state->alpha != DRM_BLEND_ALPHA_OPAQUE) &&

drivers/gpu/drm/arm/malidp_planes.c

791

u8 plane_alpha = new_state->alpha >> 8;

drivers/gpu/drm/arm/malidp_planes.c

870

if (new_state->alpha != DRM_BLEND_ALPHA_OPAQUE) {

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

457

ATMEL_HLCDC_LAYER_GA(state->base.alpha);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

491

cfg |= ATMEL_XLCDC_LAYER_A0(state->base.alpha);

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

680

ovl_s->alpha != DRM_BLEND_ALPHA_OPAQUE)

drivers/gpu/drm/drm_atomic_state_helper.c

255

plane_state->alpha = DRM_BLEND_ALPHA_OPAQUE;

drivers/gpu/drm/drm_atomic_uapi.c

589

state->alpha = val;

drivers/gpu/drm/drm_atomic_uapi.c

686

*val = state->alpha;

drivers/gpu/drm/drm_blend.c

253

plane->state->alpha = DRM_BLEND_ALPHA_OPAQUE;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

266

unsigned int alpha, unsigned int pixel_alpha)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

279

if (alpha != DRM_BLEND_ALPHA_OPAQUE) {

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

292

unsigned int alpha, unsigned int pixel_alpha)

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

294

u32 win_alpha = alpha >> 8;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

310

if (alpha != DRM_BLEND_ALPHA_OPAQUE) {

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

326

unsigned int alpha = state->base.alpha;

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

379

decon_win_set_bldmod(ctx, win, alpha, pixel_alpha);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

380

decon_win_set_bldeq(ctx, win, alpha, pixel_alpha);

drivers/gpu/drm/exynos/exynos7_drm_decon.c

407

unsigned long val, alpha;

drivers/gpu/drm/exynos/exynos7_drm_decon.c

463

alpha = VIDOSDxC_ALPHA0_R_F(0x0) |

drivers/gpu/drm/exynos/exynos7_drm_decon.c

467

writel(alpha, ctx->regs + VIDOSD_C(win));

drivers/gpu/drm/exynos/exynos7_drm_decon.c

469

alpha = VIDOSDxD_ALPHA1_R_F(0xff) |

drivers/gpu/drm/exynos/exynos7_drm_decon.c

473

writel(alpha, ctx->regs + VIDOSD_D(win));

drivers/gpu/drm/exynos/exynos_drm_fimd.c

597

unsigned int alpha, unsigned int pixel_alpha)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

610

if (alpha != DRM_BLEND_ALPHA_OPAQUE) {

drivers/gpu/drm/exynos/exynos_drm_fimd.c

623

unsigned int alpha, unsigned int pixel_alpha)

drivers/gpu/drm/exynos/exynos_drm_fimd.c

625

u32 win_alpha_l = (alpha >> 8) & 0xf;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

626

u32 win_alpha_h = alpha >> 12;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

670

unsigned int alpha = state->base.alpha;

drivers/gpu/drm/exynos/exynos_drm_fimd.c

749

fimd_win_set_bldmod(ctx, win, alpha, pixel_alpha);

drivers/gpu/drm/exynos/exynos_drm_fimd.c

750

fimd_win_set_bldeq(ctx, win, alpha, pixel_alpha);

drivers/gpu/drm/exynos/exynos_drm_ipp.c

310

offsetof(struct exynos_drm_ipp_task, alpha),

drivers/gpu/drm/exynos/exynos_drm_ipp.h

91

struct drm_exynos_ipp_task_alpha alpha;

drivers/gpu/drm/exynos/exynos_mixer.c

315

unsigned int pixel_alpha, unsigned int alpha)

drivers/gpu/drm/exynos/exynos_mixer.c

317

u32 win_alpha = alpha >> 8;

drivers/gpu/drm/exynos/exynos_mixer.c

334

if (alpha != DRM_BLEND_ALPHA_OPAQUE) {

drivers/gpu/drm/exynos/exynos_mixer.c

342

static void mixer_cfg_vp_blend(struct mixer_context *ctx, unsigned int alpha)

drivers/gpu/drm/exynos/exynos_mixer.c

344

u32 win_alpha = alpha >> 8;

drivers/gpu/drm/exynos/exynos_mixer.c

347

if (alpha != DRM_BLEND_ALPHA_OPAQUE) {

drivers/gpu/drm/exynos/exynos_mixer.c

593

mixer_cfg_vp_blend(ctx, state->base.alpha);

drivers/gpu/drm/exynos/exynos_mixer.c

681

mixer_cfg_gfx_blend(ctx, win, pixel_alpha, state->base.alpha);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

109

alpha = DCU_LAYER_AB_WHOLE_FRAME;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

115

alpha = DCU_LAYER_AB_WHOLE_FRAME;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

121

alpha = DCU_LAYER_AB_WHOLE_FRAME;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

145

alpha);

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c

89

unsigned int alpha = DCU_LAYER_AB_NONE, bpp;

drivers/gpu/drm/i915/display/i9xx_plane_regs.h

110

#define PRIM_CONST_ALPHA(alpha) REG_FIELD_PREP(PRIM_CONST_ALPHA_MASK, (alpha))

drivers/gpu/drm/i915/display/intel_display.c

6190

if (old_plane_state->hw.alpha != new_plane_state->hw.alpha) {

drivers/gpu/drm/i915/display/intel_display_types.h

676

u16 alpha;

drivers/gpu/drm/i915/display/intel_plane.c

463

plane_state->hw.alpha = from_plane_state->uapi.alpha;

drivers/gpu/drm/i915/display/intel_psr.c

3006

} else if (new_plane_state->uapi.alpha != old_plane_state->uapi.alpha) {

drivers/gpu/drm/i915/display/intel_sprite_regs.h

318

#define SP_CONST_ALPHA(alpha) REG_FIELD_PREP(SP_CONST_ALPHA_MASK, (alpha))

drivers/gpu/drm/i915/display/skl_universal_plane.c

1359

u8 alpha = plane_state->hw.alpha >> 8;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1361

return (key->max_value & 0xffffff) | PLANE_KEYMAX_ALPHA(alpha);

drivers/gpu/drm/i915/display/skl_universal_plane.c

1367

u8 alpha = plane_state->hw.alpha >> 8;

drivers/gpu/drm/i915/display/skl_universal_plane.c

1371

if (alpha < 0xff)

drivers/gpu/drm/i915/display/skl_universal_plane.c

173

int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)

drivers/gpu/drm/i915/display/skl_universal_plane.c

203

if (alpha)

drivers/gpu/drm/i915/display/skl_universal_plane.c

208

if (alpha)

drivers/gpu/drm/i915/display/skl_universal_plane.c

215

if (alpha)

drivers/gpu/drm/i915/display/skl_universal_plane.c

220

if (alpha)

drivers/gpu/drm/i915/display/skl_universal_plane.c

227

if (alpha)

drivers/gpu/drm/i915/display/skl_universal_plane.c

232

if (alpha)

drivers/gpu/drm/i915/display/skl_universal_plane.c

2416

if (!(plane_state->hw.alpha >> 8)) {

drivers/gpu/drm/i915/display/skl_universal_plane.c

3064

u32 val, base, offset, stride_mult, tiling, alpha;

drivers/gpu/drm/i915/display/skl_universal_plane.c

3104

alpha = REG_FIELD_GET(PLANE_COLOR_ALPHA_MASK, color_ctl);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3106

alpha = REG_FIELD_GET(PLANE_CTL_ALPHA_MASK, val);

drivers/gpu/drm/i915/display/skl_universal_plane.c

3110

val & PLANE_CTL_ORDER_RGBX, alpha);

drivers/gpu/drm/i915/display/skl_universal_plane.h

30

int skl_format_to_fourcc(int format, bool rgb_order, bool alpha);

drivers/gpu/drm/i915/gvt/fb_decoder.c

121

static int skl_format_to_drm(int format, bool rgb_order, bool alpha,

drivers/gpu/drm/i915/gvt/fb_decoder.c

135

skl_pixel_formats_index = alpha ? 6 : 7;

drivers/gpu/drm/i915/gvt/fb_decoder.c

137

skl_pixel_formats_index = alpha ? 8 : 9;

drivers/gpu/drm/imx/dcss/dcss-dev.h

148

bool dcss_dtg_global_alpha_changed(struct dcss_dtg *dtg, int ch_num, int alpha);

drivers/gpu/drm/imx/dcss/dcss-dev.h

150

const struct drm_format_info *format, int alpha);

drivers/gpu/drm/imx/dcss/dcss-dtg.c

170

dtg->alpha = 255;

drivers/gpu/drm/imx/dcss/dcss-dtg.c

173

((dtg->alpha << DEFAULT_FG_ALPHA_POS) & DEFAULT_FG_ALPHA_MASK);

drivers/gpu/drm/imx/dcss/dcss-dtg.c

262

bool dcss_dtg_global_alpha_changed(struct dcss_dtg *dtg, int ch_num, int alpha)

drivers/gpu/drm/imx/dcss/dcss-dtg.c

267

return alpha != dtg->alpha;

drivers/gpu/drm/imx/dcss/dcss-dtg.c

271

const struct drm_format_info *format, int alpha)

drivers/gpu/drm/imx/dcss/dcss-dtg.c

281

if (!format->has_alpha || alpha != 255)

drivers/gpu/drm/imx/dcss/dcss-dtg.c

282

dtg->alpha_cfg = (alpha << DEFAULT_FG_ALPHA_POS) & DEFAULT_FG_ALPHA_MASK;

drivers/gpu/drm/imx/dcss/dcss-dtg.c

286

dtg->alpha = alpha;

drivers/gpu/drm/imx/dcss/dcss-dtg.c

91

u32 alpha;

drivers/gpu/drm/imx/dcss/dcss-plane.c

339

fb->format, new_state->alpha >> 8);

drivers/gpu/drm/imx/dcss/dcss-plane.c

341

if (!dcss_plane->ch_num && (new_state->alpha >> 8) == 0)

drivers/gpu/drm/kmb/kmb_plane.c

308

u16 plane_alpha = state->alpha;

drivers/gpu/drm/logicvc/logicvc_layer.c

194

u32 alpha;

drivers/gpu/drm/logicvc/logicvc_layer.c

213

alpha = new_state->alpha * alpha_max / DRM_BLEND_ALPHA_OPAQUE;

drivers/gpu/drm/logicvc/logicvc_layer.c

216

alpha, alpha_max);

drivers/gpu/drm/logicvc/logicvc_layer.c

219

alpha);

drivers/gpu/drm/logicvc/logicvc_layer.c

355

bool alpha;

drivers/gpu/drm/logicvc/logicvc_layer.c

358

alpha = (layer->config.alpha_mode == LOGICVC_LAYER_ALPHA_PIXEL);

drivers/gpu/drm/logicvc/logicvc_layer.c

363

logicvc_layer_formats[i].alpha == alpha)

drivers/gpu/drm/logicvc/logicvc_layer.c

64

.alpha = true,

drivers/gpu/drm/logicvc/logicvc_layer.h

38

bool alpha;

drivers/gpu/drm/logicvc/logicvc_mode.c

54

if (layer_primary->formats->alpha)

drivers/gpu/drm/mediatek/mtk_disp_ovl.c

516

con |= state->base.alpha & OVL_CON_ALPHA;

drivers/gpu/drm/mediatek/mtk_ethdr.c

184

alpha_con |= state->base.alpha & MIXER_ALPHA;

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

331

fg_alpha = pstate->base.alpha;

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

615

uint32_t color, uint32_t alpha)

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

621

u32 fill_color = (color & 0xFFFFFF) | ((alpha & 0xFF) << 24);

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h

64

uint32_t color, uint32_t alpha);

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

173

bool alpha[4]= { false, false, false, false };

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

186

alpha[idx-1] = format->alpha_enable;

drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c

193

if (alpha[i]) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c

292

fg_alpha = pstates[i]->base.alpha >> 8;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

79

drm_printf(p, "\talpha=%u\n", pstate->base.alpha);

drivers/gpu/drm/nouveau/dispnv04/crtc.c

942

int alpha, i;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

958

alpha = pixel >> 24;

drivers/gpu/drm/nouveau/dispnv04/crtc.c

959

if (alpha > 0 && alpha < 255)

drivers/gpu/drm/nouveau/dispnv04/crtc.c

960

pixel = (pixel & 0x00ffffff) | ((alpha + 1) << 24);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

343

asyw->blend.k1 = asyw->state.alpha >> 8;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf108.c

740

const u32 alpha = grctx->alpha_nr;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf108.c

748

gf100_grctx_patch_wr32(chan, 0x405830, (beta << 16) | alpha);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf108.c

749

gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf108.c

753

const u32 a = alpha;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c

248

const u32 alpha = grctx->alpha_nr;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c

256

gf100_grctx_patch_wr32(chan, 0x405830, (beta << 16) | alpha);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c

257

gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c

261

const u32 a = alpha * gr->ppc_tpc_nr[gpc][ppc];

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c

930

bool alpha = atarget < btarget;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c

938

if (alpha) {

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c

957

alpha = !alpha;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c

904

const u32 alpha = grctx->alpha_nr;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c

911

gf100_grctx_patch_wr32(chan, 0x405830, (attrib << 16) | alpha);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c

912

gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c

916

const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc];

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.c

46

const u32 alpha = grctx->alpha_nr;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.c

55

gf100_grctx_patch_wr32(chan, 0x40585c, alpha);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.c

56

gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.c

60

const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc];

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.c

44

const u32 alpha = grctx->alpha_nr;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.c

54

gf100_grctx_patch_wr32(chan, 0x40585c, alpha);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.c

55

gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.c

59

const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc];

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c

66

const u32 alpha = grctx->alpha_nr;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c

76

gf100_grctx_patch_wr32(chan, 0x40585c, alpha);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c

77

gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c

81

const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc];

drivers/gpu/drm/omapdrm/omap_plane.c

102

info.global_alpha = new_state->alpha >> 8;

drivers/gpu/drm/qxl/qxl_dev.h

548

uint8_t alpha;

drivers/gpu/drm/qxl/qxl_dev.h

554

uint8_t alpha;

drivers/gpu/drm/renesas/rcar-du/rcar_du_plane.c

423

PnALPHAR_ABIT_X | state->state.alpha >> 8);

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

230

.alpha = state->state.alpha >> 8,

drivers/gpu/drm/renesas/rcar-du/rcar_du_vsp.c

66

.alpha = DRM_BLEND_ALPHA_OPAQUE,

drivers/gpu/drm/renesas/rz-du/rzg2l_du_vsp.c

128

.alpha = state->state.alpha >> 8,

drivers/gpu/drm/renesas/shmobile/shmob_drm_plane.c

97

format = LDBBSIFR_EN | ((state->alpha >> 8) << LDBBSIFR_LAY_SHIFT) |

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1084

(fb->format->has_alpha || pstate->alpha != 0xffff)) {

drivers/gpu/drm/rockchip/rockchip_drm_vop2.c

1956

pstate->alpha >> 8);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1799

static bool is_opaque(u16 alpha)

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1801

return (alpha >> 8) == 0xff;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1805

struct vop2_alpha *alpha)

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1814

alpha->src_color_ctrl.val = 0;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1815

alpha->dst_color_ctrl.val = 0;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1816

alpha->src_alpha_ctrl.val = 0;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1817

alpha->dst_alpha_ctrl.val = 0;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1820

alpha->src_color_ctrl.bits.blend_mode = ALPHA_GLOBAL;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1822

alpha->src_color_ctrl.bits.blend_mode = ALPHA_PER_PIX;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1824

alpha->src_color_ctrl.bits.blend_mode = ALPHA_PER_PIX_GLOBAL;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1826

alpha->src_color_ctrl.bits.alpha_en = 1;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1828

if (alpha->src_color_ctrl.bits.blend_mode == ALPHA_GLOBAL) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1829

alpha->src_color_ctrl.bits.color_mode = src_color_mode;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1830

alpha->src_color_ctrl.bits.factor_mode = SRC_FAC_ALPHA_SRC_GLOBAL;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1831

} else if (alpha->src_color_ctrl.bits.blend_mode == ALPHA_PER_PIX) {

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1832

alpha->src_color_ctrl.bits.color_mode = src_color_mode;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1833

alpha->src_color_ctrl.bits.factor_mode = SRC_FAC_ALPHA_ONE;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1835

alpha->src_color_ctrl.bits.color_mode = ALPHA_SRC_PRE_MUL;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1836

alpha->src_color_ctrl.bits.factor_mode = SRC_FAC_ALPHA_SRC_GLOBAL;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1838

alpha->src_color_ctrl.bits.glb_alpha = alpha_config->src_glb_alpha_value >> 8;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1839

alpha->src_color_ctrl.bits.alpha_mode = ALPHA_STRAIGHT;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1840

alpha->src_color_ctrl.bits.alpha_cal_mode = ALPHA_SATURATION;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1842

alpha->dst_color_ctrl.bits.alpha_mode = ALPHA_STRAIGHT;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1843

alpha->dst_color_ctrl.bits.alpha_cal_mode = ALPHA_SATURATION;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1844

alpha->dst_color_ctrl.bits.blend_mode = ALPHA_GLOBAL;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1845

alpha->dst_color_ctrl.bits.glb_alpha = alpha_config->dst_glb_alpha_value >> 8;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1846

alpha->dst_color_ctrl.bits.color_mode = dst_color_mode;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1847

alpha->dst_color_ctrl.bits.factor_mode = ALPHA_SRC_INVERSE;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1849

alpha->src_alpha_ctrl.bits.alpha_mode = ALPHA_STRAIGHT;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1850

alpha->src_alpha_ctrl.bits.blend_mode = alpha->src_color_ctrl.bits.blend_mode;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1851

alpha->src_alpha_ctrl.bits.alpha_cal_mode = ALPHA_SATURATION;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1852

alpha->src_alpha_ctrl.bits.factor_mode = ALPHA_ONE;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1854

alpha->dst_alpha_ctrl.bits.alpha_mode = ALPHA_STRAIGHT;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1856

alpha->dst_alpha_ctrl.bits.blend_mode = ALPHA_PER_PIX;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1858

alpha->dst_alpha_ctrl.bits.blend_mode = ALPHA_PER_PIX_GLOBAL;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1859

alpha->dst_alpha_ctrl.bits.alpha_cal_mode = ALPHA_NO_SATURATION;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1860

alpha->dst_alpha_ctrl.bits.factor_mode = ALPHA_SRC_INVERSE;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1896

struct vop2_alpha alpha;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1908

dst_glb_alpha_val = main_win->base.state->alpha;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1919

vop2_parse_alpha(&alpha_config, &alpha);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1921

alpha.src_color_ctrl.bits.src_dst_swap = swap;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1950

vop2_writel(vop2, src_color_ctrl_reg + offset, alpha.src_color_ctrl.val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1951

vop2_writel(vop2, dst_color_ctrl_reg + offset, alpha.dst_color_ctrl.val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1952

vop2_writel(vop2, src_alpha_ctrl_reg + offset, alpha.src_alpha_ctrl.val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1953

vop2_writel(vop2, dst_alpha_ctrl_reg + offset, alpha.dst_alpha_ctrl.val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1961

struct vop2_alpha alpha;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1982

!is_opaque(plane->state->alpha) &&

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

1990

dst_global_alpha = plane->state->alpha;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2033

alpha_config.src_glb_alpha_value = plane->state->alpha;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2045

alpha_config.src_glb_alpha_value = plane->state->alpha;

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2049

vop2_parse_alpha(&alpha_config, &alpha);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2053

vop2_writel(vop2, src_color_ctrl_reg + offset, alpha.src_color_ctrl.val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2054

vop2_writel(vop2, dst_color_ctrl_reg + offset, alpha.dst_color_ctrl.val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2055

vop2_writel(vop2, src_alpha_ctrl_reg + offset, alpha.src_alpha_ctrl.val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2056

vop2_writel(vop2, dst_alpha_ctrl_reg + offset, alpha.dst_alpha_ctrl.val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2080

vop2_parse_alpha(&alpha_config, &alpha);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2082

vop2_writel(vop2, src_color_ctrl_reg, alpha.src_color_ctrl.val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2083

vop2_writel(vop2, dst_color_ctrl_reg, alpha.dst_color_ctrl.val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2084

vop2_writel(vop2, src_alpha_ctrl_reg, alpha.src_alpha_ctrl.val);

drivers/gpu/drm/rockchip/rockchip_vop2_reg.c

2085

vop2_writel(vop2, dst_alpha_ctrl_reg, alpha.dst_alpha_ctrl.val);

drivers/gpu/drm/sprd/sprd_dpu.c

332

u32 alpha = state->alpha;

drivers/gpu/drm/sprd/sprd_dpu.c

363

layer_reg_wr(ctx, REG_LAY_ALPHA, alpha, index);

drivers/gpu/drm/stm/ltdc.c

1332

val = newstate->alpha >> 8;

drivers/gpu/drm/sun4i/sun4i_backend.c

265

val = SUN4I_BACKEND_ATTCTL_REG0_LAY_GLBALPHA(state->alpha >> 8);

drivers/gpu/drm/sun4i/sun4i_backend.c

266

if (state->alpha != DRM_BLEND_ALPHA_OPAQUE)

drivers/gpu/drm/sun4i/sun4i_backend.c

518

if (fb->format->has_alpha || (plane_state->alpha != DRM_BLEND_ALPHA_OPAQUE))

drivers/gpu/drm/sun4i/sun4i_backend.c

578

(plane_states[0]->alpha != DRM_BLEND_ALPHA_OPAQUE))

drivers/gpu/drm/sun4i/sun4i_backend.c

590

if (fb->format->has_alpha || (p_state->alpha != DRM_BLEND_ALPHA_OPAQUE))

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

48

val = SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA(state->alpha >> 8);

drivers/gpu/drm/sun4i/sun8i_ui_layer.c

49

val |= (state->alpha == DRM_BLEND_ALPHA_OPAQUE) ?

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

47

val |= SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA(state->alpha >> 8);

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

48

val |= (state->alpha == DRM_BLEND_ALPHA_OPAQUE) ?

drivers/gpu/drm/sun4i/sun8i_vi_layer.c

59

SUN8I_MIXER_FCC_GLOBAL_ALPHA(state->alpha >> 8));

drivers/gpu/drm/sysfb/corebootdrm.c

48

.alpha = {

drivers/gpu/drm/tegra/dc.c

308

if (state->blending[0].alpha &&

drivers/gpu/drm/tegra/dc.c

309

state->blending[1].alpha)

drivers/gpu/drm/tegra/dc.c

331

if (state->blending[i].alpha &&

drivers/gpu/drm/tegra/dc.c

338

if (state->blending[0].alpha &&

drivers/gpu/drm/tegra/dc.c

339

state->blending[1].alpha)

drivers/gpu/drm/tegra/dc.c

349

if (state->blending[0].alpha &&

drivers/gpu/drm/tegra/dc.c

353

if (state->blending[1].alpha &&

drivers/gpu/drm/tegra/plane.c

554

unsigned int *alpha)

drivers/gpu/drm/tegra/plane.c

557

*alpha = opaque;

drivers/gpu/drm/tegra/plane.c

563

*alpha = WIN_COLOR_DEPTH_B5G5R5A1;

drivers/gpu/drm/tegra/plane.c

567

*alpha = WIN_COLOR_DEPTH_A1B5G5R5;

drivers/gpu/drm/tegra/plane.c

571

*alpha = WIN_COLOR_DEPTH_R8G8B8A8;

drivers/gpu/drm/tegra/plane.c

575

*alpha = WIN_COLOR_DEPTH_B8G8R8A8;

drivers/gpu/drm/tegra/plane.c

579

*alpha = opaque;

drivers/gpu/drm/tegra/plane.c

685

state->blending[index].alpha = true;

drivers/gpu/drm/tegra/plane.c

687

state->blending[index].alpha = false;

drivers/gpu/drm/tegra/plane.h

39

bool alpha;

drivers/gpu/drm/tidss/tidss_dispc.c

2269

state->alpha >> 8));

drivers/gpu/drm/vc4/vc4_plane.c

1477

mix_plane_alpha = state->alpha != DRM_BLEND_ALPHA_OPAQUE &&

drivers/gpu/drm/vc4/vc4_plane.c

1497

VC4_SET_FIELD(state->alpha >> 8, SCALER_POS0_FIXED_ALPHA) |

drivers/gpu/drm/vc4/vc4_plane.c

1550

VC4_SET_FIELD(state->alpha >> 4,

drivers/gpu/drm/vc4/vc4_plane.c

1683

state->alpha != DRM_BLEND_ALPHA_OPAQUE;

drivers/gpu/drm/vc4/vc4_plane.c

1943

mix_plane_alpha = state->alpha != DRM_BLEND_ALPHA_OPAQUE &&

drivers/gpu/drm/vc4/vc4_plane.c

1969

VC4_SET_FIELD(state->alpha >> 4, SCALER5_CTL2_ALPHA));

drivers/gpu/drm/vc4/vc4_plane.c

2100

state->alpha != DRM_BLEND_ALPHA_OPAQUE;

drivers/gpu/drm/vc4/vc4_plane.c

2283

plane->state->alpha = new_plane_state->alpha;

drivers/gpu/drm/vc4/vc4_plane.c

770

if (state->alpha != DRM_BLEND_ALPHA_OPAQUE && info->has_alpha)

drivers/gpu/drm/vkms/vkms_composer.c

20

static u16 pre_mul_blend_channel(u16 src, u16 dst, u16 alpha)

drivers/gpu/drm/vkms/vkms_composer.c

24

new_color = (src * 0xffff + dst * (0xffff - alpha));

drivers/gpu/drm/vmwgfx/device_include/svga3d_surfacedefs.h

305

uint8 alpha;

drivers/gpu/drm/vmwgfx/device_include/svga3d_types.h

936

uint32 alpha : 1;

drivers/gpu/drm/xlnx/zynqmp_disp.c

800

bool enable, u32 alpha)

drivers/gpu/drm/xlnx/zynqmp_disp.c

803

ZYNQMP_DISP_V_BLEND_SET_GLOBAL_ALPHA_VALUE(alpha) |

drivers/gpu/drm/xlnx/zynqmp_disp.h

51

bool enable, u32 alpha);

drivers/gpu/drm/xlnx/zynqmp_kms.c

123

plane->state->alpha >> 8);

drivers/gpu/drm/xlnx/zynqmp_kms.c

91

plane->state->alpha >> 8);

drivers/gpu/ipu-v3/ipu-dp.c

80

u8 alpha, bool bg_chan)

drivers/gpu/ipu-v3/ipu-dp.c

97

writel(reg | ((u32) alpha << 24),

drivers/hwmon/yogafan.c

103

alpha = (long)div64_s64(temp_num, (s64)(TAU_MS + dt_ms));

drivers/hwmon/yogafan.c

104

step = (delta * alpha) >> 12;

drivers/hwmon/yogafan.c

78

long delta, step, limit, alpha;

drivers/iio/adc/cpcap-adc.c

706

int i, result = 0, alpha;

drivers/iio/adc/cpcap-adc.c

722

alpha = ((value - temp_map[i][0]) * 1000) /

drivers/iio/adc/cpcap-adc.c

726

((alpha * (temp_map[i + 1][1] -

drivers/iio/afe/iio-rescale.c

412

u32 alpha;

drivers/iio/afe/iio-rescale.c

426

ret = device_property_read_u32(dev, "alpha-ppm-per-celsius", &alpha);

drivers/iio/afe/iio-rescale.c

439

tmp = r0 * iexc * alpha / 1000000;

drivers/iio/afe/iio-rescale.c

454

s32 alpha;

drivers/iio/afe/iio-rescale.c

459

ret = device_property_read_u32(dev, "alpha-ppm-per-celsius", &alpha);

drivers/iio/afe/iio-rescale.c

466

rescale->denominator = alpha * sense;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1137

u8 alpha = tpg->alpha_component;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1143

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1313

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1318

buf[0][offset + 1] = (alpha & 0xf0) | r_y_h;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1321

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1324

buf[0][offset] = (b_v << 4) | (alpha >> 4);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1328

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1332

buf[0][offset + 1] = (alpha & 0xf0) | b_v;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1335

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1338

buf[0][offset] = (r_y_h << 4) | (alpha >> 4);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1343

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1348

buf[0][offset + 1] = (alpha & 0x80) | (r_y_h << 2)

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1352

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1356

((alpha & 0x80) >> 7);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1360

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1364

buf[0][offset + 1] = (alpha & 0x80) | (b_v << 2)

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1368

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1372

((alpha & 0x80) >> 7);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1377

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1380

buf[0][offset] = (alpha & 0x80) | (r_y_h << 2) | (g_u_s >> 3);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1404

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1409

buf[0][offset] = alpha;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1416

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1423

buf[0][offset + 3] = alpha;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1428

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1435

buf[0][offset + 3] = alpha;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1438

alpha = 0;

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c

1441

buf[0][offset] = alpha;

drivers/media/dvb-frontends/dib9000.c

1187

s8 alpha;

drivers/media/dvb-frontends/dib9000.c

1342

s8 alpha;

drivers/media/dvb-frontends/dib9000.c

1425

ch.alpha = 1;

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

108

.alpha = (_alpha), \

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

257

if (ctx->in.fmt->alpha && ctx->out.fmt->alpha)

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

261

else if (!ctx->out.fmt->alpha)

drivers/media/platform/amlogic/meson-ge2d/ge2d.c

50

bool alpha;

drivers/media/platform/mediatek/mdp/mtk_mdp_core.h

109

u8 alpha;

drivers/media/platform/mediatek/mdp/mtk_mdp_ipi.h

107

int32_t alpha; /* global alpha */

drivers/media/platform/mediatek/mdp/mtk_mdp_m2m.c

982

ctx->d_frame.alpha = ctrl->val;

drivers/media/platform/mediatek/mdp/mtk_mdp_regs.c

147

misc->alpha = ctx->ctrls.global_alpha->val;

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1112

gm_params->alpha = clamp_val(mat[2] - (1 << WARPEDMODEL_PREC_BITS), S16_MIN, S16_MAX);

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1125

gm_params->alpha = AV1_DIV_ROUND_UP_POW2_SIGNED(gm_params->alpha, WARP_PARAM_REDUCE_BITS) *

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

1146

gm[i].alpha = 0;

drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c

232

short alpha;

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

216

unsigned int alpha;

drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h

395

void mxc_isi_channel_set_alpha(struct mxc_isi_pipe *pipe, u8 alpha);

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

264

void mxc_isi_channel_set_alpha(struct mxc_isi_pipe *pipe, u8 alpha)

drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c

270

val |= CHNL_IMG_CTRL_GBL_ALPHA_VAL(alpha) |

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

164

mxc_isi_channel_set_alpha(m2m->pipe, ctx->ctrls.alpha);

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

431

ctx->ctrls.alpha = ctrl->val;

drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c

62

unsigned int alpha;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

1068

video->ctrls.alpha = ctrl->val;

drivers/media/platform/nxp/imx8-isi/imx8-isi-video.c

937

mxc_isi_channel_set_alpha(pipe, video->ctrls.alpha);

drivers/media/platform/renesas/rcar-vin/rcar-core.c

1186

vin->alpha = 0xff;

drivers/media/platform/renesas/rcar-vin/rcar-dma.c

1577

void rvin_set_alpha(struct rvin_dev *vin, unsigned int alpha)

drivers/media/platform/renesas/rcar-vin/rcar-dma.c

1584

vin->alpha = alpha;

drivers/media/platform/renesas/rcar-vin/rcar-dma.c

1592

if (vin->alpha)

drivers/media/platform/renesas/rcar-vin/rcar-dma.c

1597

dmr |= VNDMR_A8BIT(vin->alpha);

drivers/media/platform/renesas/rcar-vin/rcar-dma.c

869

dmr = (vin->alpha ? VNDMR_ABIT : 0) | VNDMR_DTMD_ARGB;

drivers/media/platform/renesas/rcar-vin/rcar-dma.c

872

dmr = VNDMR_A8BIT(vin->alpha) | VNDMR_EXRGB | VNDMR_DTMD_ARGB;

drivers/media/platform/renesas/rcar-vin/rcar-vin.h

215

unsigned int alpha;

drivers/media/platform/renesas/rcar-vin/rcar-vin.h

276

void rvin_set_alpha(struct rvin_dev *vin, unsigned int alpha);

drivers/media/platform/renesas/rcar_fdp1.c

1699

ctx->alpha = ctrl->val;

drivers/media/platform/renesas/rcar_fdp1.c

610

unsigned char alpha;

drivers/media/platform/renesas/rcar_fdp1.c

979

format |= ctx->alpha << FD1_WPF_FORMAT_PDV_SHIFT;

drivers/media/platform/renesas/vsp1/vsp1_drm.c

877

rpf->alpha = cfg->alpha;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

579

struct vsp1_dl_body *dlb, unsigned int alpha)

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

590

alpha = 255;

drivers/media/platform/renesas/vsp1/vsp1_pipe.c

592

vsp1_uds_set_alpha(pipe->uds, dlb, alpha);

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

174

unsigned int alpha);

drivers/media/platform/renesas/vsp1/vsp1_pipe.h

48

bool alpha;

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

226

(fmtinfo->alpha ? VI6_RPF_ALPH_SEL_ASEL_PACKED

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

232

if (fmtinfo->alpha) {

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

305

rpf->alpha << VI6_RPF_VRTCOL_SET_LAYA_SHIFT);

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

307

(rpf->alpha << VI6_RPF_MULT_ALPHA_RATIO_SHIFT));

drivers/media/platform/renesas/vsp1/vsp1_rpf.c

309

vsp1_pipeline_propagate_alpha(pipe, dlb, rpf->alpha);

drivers/media/platform/renesas/vsp1/vsp1_rwpf.c

359

rwpf->alpha = ctrl->val;

drivers/media/platform/renesas/vsp1/vsp1_rwpf.h

46

unsigned int alpha;

drivers/media/platform/renesas/vsp1/vsp1_uds.c

44

unsigned int alpha)

drivers/media/platform/renesas/vsp1/vsp1_uds.c

49

alpha << VI6_UDS_ALPVAL_VAL0_SHIFT);

drivers/media/platform/renesas/vsp1/vsp1_uds.h

35

unsigned int alpha);

drivers/media/platform/renesas/vsp1/vsp1_video.c

753

uds->scale_alpha = rpf->fmtinfo->alpha;

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

256

if (fmtinfo->alpha)

drivers/media/platform/renesas/vsp1/vsp1_wpf.c

376

outfmt = (wpf->alpha << VI6_WPF_OUTFMT_PDV_SHIFT) | wpf->outfmt;

drivers/media/platform/samsung/exynos-gsc/gsc-core.c

734

ctx->d_frame.alpha = ctrl->val;

drivers/media/platform/samsung/exynos-gsc/gsc-core.h

198

u8 alpha;

drivers/media/platform/samsung/exynos4-is/fimc-core.c

540

ctx->d_frame.alpha = ctrl->val;

drivers/media/platform/samsung/exynos4-is/fimc-core.c

591

ctrls->alpha = v4l2_ctrl_new_std(handler, &fimc_ctrl_ops,

drivers/media/platform/samsung/exynos4-is/fimc-core.c

595

ctrls->alpha = NULL;

drivers/media/platform/samsung/exynos4-is/fimc-core.c

621

ctrls->alpha = NULL;

drivers/media/platform/samsung/exynos4-is/fimc-core.c

638

if (ctrls->alpha)

drivers/media/platform/samsung/exynos4-is/fimc-core.c

639

v4l2_ctrl_activate(ctrls->alpha, active && has_alpha);

drivers/media/platform/samsung/exynos4-is/fimc-core.c

659

struct v4l2_ctrl *ctrl = ctx->ctrls.alpha;

drivers/media/platform/samsung/exynos4-is/fimc-core.h

261

u8 alpha;

drivers/media/platform/samsung/exynos4-is/fimc-core.h

453

struct v4l2_ctrl *alpha;

drivers/media/platform/samsung/exynos4-is/fimc-reg.c

399

cfg |= (frame->alpha << 4);

drivers/media/platform/ti/omap3isp/ispcsi2.c

331

reg |= (ctx->alpha << ISPCSI2_CTX_CTRL3_ALPHA_SHIFT);

drivers/media/platform/ti/omap3isp/ispcsi2.h

84

u16 alpha;

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

482

rockchip_vpu981_av1_dec_get_shear_params(const u32 *params, s64 *alpha,

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

493

*alpha = clamp_val(mat[2] - (1 << WARPEDMODEL_PREC_BITS), S16_MIN, S16_MAX);

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

507

*alpha = AV1_DIV_ROUND_UP_POW2_SIGNED(*alpha, WARP_PARAM_REDUCE_BITS)

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

529

s64 alpha = 0, beta = 0, gamma = 0, delta = 0;

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

546

&alpha, &beta, &gamma, &delta);

drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c

548

*(s16 *)dst = alpha;

drivers/media/test-drivers/vicodec/codec-fwht.c

822

encoding |= encode_plane(frm->alpha, ref_frm->alpha, &rlco,

drivers/media/test-drivers/vicodec/codec-fwht.c

952

if (!decode_plane(cf, &rlco, height, width, ref->alpha, ref_stride,

drivers/media/test-drivers/vicodec/codec-fwht.c

953

ref->luma_alpha_step, dst->alpha, dst_stride,

drivers/media/test-drivers/vicodec/codec-fwht.h

96

u8 *luma, *cb, *cr, *alpha;

drivers/media/test-drivers/vicodec/codec-v4l2-fwht.c

103

rf->alpha = NULL;

drivers/media/test-drivers/vicodec/codec-v4l2-fwht.c

114

rf->alpha = NULL;

drivers/media/test-drivers/vicodec/codec-v4l2-fwht.c

179

rf->alpha = rf->luma;

drivers/media/test-drivers/vicodec/codec-v4l2-fwht.c

190

rf->alpha = rf->cr + 1;

drivers/media/test-drivers/vicodec/codec-v4l2-fwht.c

194

rf->alpha = rf->luma;

drivers/media/test-drivers/vicodec/codec-v4l2-fwht.c

201

rf->alpha = rf->luma + 3;

drivers/media/test-drivers/vicodec/vicodec-core.c

1626

state->ref_frame.alpha = NULL;

drivers/media/test-drivers/vicodec/vicodec-core.c

1634

state->ref_frame.alpha =

drivers/media/test-drivers/vicodec/vicodec-core.c

1637

state->ref_frame.alpha = NULL;

drivers/media/test-drivers/vivid/vivid-core.h

323

struct v4l2_ctrl *alpha;

drivers/media/test-drivers/vivid/vivid-ctrls.c

1722

dev->alpha = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops,

drivers/media/test-drivers/vivid/vivid-kthread-cap.c

513

dev->autogain->cur.val, gain, dev->alpha->cur.val);

drivers/net/ethernet/chelsio/cxgb3/common.h

726

unsigned short alpha[NCCTRL_WIN],

drivers/net/ethernet/chelsio/cxgb3/t3_hw.c

2833

unsigned short alpha[NCCTRL_WIN],

drivers/net/ethernet/chelsio/cxgb3/t3_hw.c

2856

inc = max(((mtu - 40) * alpha[w]) / avg_pkts[w],

drivers/net/ethernet/chelsio/cxgb4/cxgb4.h

1954

const unsigned short *alpha, const unsigned short *beta);

drivers/net/ethernet/chelsio/cxgb4/t4_hw.c

5851

const unsigned short *alpha, const unsigned short *beta)

drivers/net/ethernet/chelsio/cxgb4/t4_hw.c

5873

inc = max(((mtu - 40) * alpha[w]) / avg_pkts[w],

drivers/net/wireless/ath/ath11k/reg.c

846

static bool ath11k_reg_is_world_alpha(char *alpha)

drivers/net/wireless/ath/ath11k/reg.c

848

if (alpha[0] == '0' && alpha[1] == '0')

drivers/net/wireless/ath/ath11k/reg.c

851

if (alpha[0] == 'n' && alpha[1] == 'a')

drivers/net/wireless/ath/ath9k/ar9003_paprd.c

432

int Q_scale_B, Q_beta, Q_alpha, alpha, beta, order_1, order_2;

drivers/net/wireless/ath/ath9k/ar9003_paprd.c

636

alpha = (alpha_raw << 10) / scale_B;

drivers/net/wireless/ath/ath9k/ar9003_paprd.c

653

y3 = (alpha * tmp) >> order2_3x;

drivers/net/wireless/ath/ath9k/ar9003_paprd.c

689

alpha = (alpha_raw << 10) / scale_B;

drivers/net/wireless/ath/ath9k/ar9003_paprd.c

720

y3 = (alpha * tmp -

drivers/net/wireless/ath/ath9k/ar9003_paprd.c

723

y3 = (alpha * tmp +

drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c

1136

u8 alpha;

drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c

1184

alpha = IWL_MVM_FTM_INITIATOR_SMOOTH_ALPHA;

drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c

1186

rtt_avg = div_s64(alpha * rtt + (100 - alpha) * resp->rtt_avg, 100);

drivers/platform/raspberrypi/vchiq-mmal/mmal-parameters.h

708

u32 alpha;

drivers/soc/mediatek/mtk-mmsys.c

234

void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool alpha_sel, u16 alpha,

drivers/soc/mediatek/mtk-mmsys.c

240

alpha << 16 | alpha, cmdq_pkt);

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

159

to->alpha.y0 = alpha_y0;

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

160

to->alpha.u0 = alpha_u0;

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

161

to->alpha.v0 = alpha_v0;

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

162

to->alpha.ydiff = clamp(alpha_ydiff, min_diff, max_diff);

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

163

to->alpha.udiff = clamp(alpha_udiff, min_diff, max_diff);

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

164

to->alpha.vdiff = clamp(alpha_vdiff, min_diff, max_diff);

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

71

s32 alpha;

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

75

alpha = XNR_MAX_ALPHA;

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

77

alpha = ((IA_CSS_XNR3_SIGMA_SCALE * XNR_ALPHA_SCALE_FACTOR) + offset) / sigma;

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

79

if (alpha > XNR_MAX_ALPHA)

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

80

alpha = XNR_MAX_ALPHA;

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3.host.c

83

return alpha;

drivers/staging/media/atomisp/pci/isp/kernels/xnr/xnr_3.0/ia_css_xnr3_param.h

57

struct sh_css_xnr3_alpha_params alpha;

drivers/staging/media/ipu3/include/uapi/intel-ipu3.h

2398

struct ipu3_uapi_anr_alpha alpha[3];

drivers/staging/media/ipu3/include/uapi/intel-ipu3.h

2668

struct ipu3_uapi_xnr3_alpha_params alpha;

drivers/staging/media/ipu3/include/uapi/intel-ipu3.h

797

__u32 alpha:4;

drivers/staging/media/ipu3/ipu3-css-params.c

2867

xnr_dmem->alpha.y0 = 2047;

drivers/staging/media/ipu3/ipu3-css-params.c

2868

xnr_dmem->alpha.u0 = 2047;

drivers/staging/media/ipu3/ipu3-css-params.c

2869

xnr_dmem->alpha.v0 = 2047;

drivers/staging/media/ipu3/ipu3-tables.c

9494

.alpha = { { 13, 13, 13, 13, 0, 0, 0, 0},

drivers/video/fbdev/ffb.c

187

u32 alpha;

drivers/video/fbdev/fsl-diu-fb.c

949

#define MAKE_PF(alpha, red, green, blue, size, c0, c1, c2, c3) \

drivers/video/fbdev/fsl-diu-fb.c

950

cpu_to_le32(PF_BYTE_F | (alpha << PF_ALPHA_C_SHIFT) | \

drivers/video/fbdev/leo.c

146

u32 alpha; /* SS1 only */

drivers/video/fbdev/mmp/hw/mmp_ctrl.h

512

#define CFG_ALPHA(alpha) ((alpha)<<8)

drivers/video/fbdev/omap2/omapfb/dss/overlay-sysfs.c

243

u8 alpha;

drivers/video/fbdev/omap2/omapfb/dss/overlay-sysfs.c

249

r = kstrtou8(buf, 0, &alpha);

drivers/video/fbdev/omap2/omapfb/dss/overlay-sysfs.c

255

info.global_alpha = alpha;

drivers/video/fbdev/omap2/omapfb/dss/overlay-sysfs.c

285

u8 alpha;

drivers/video/fbdev/omap2/omapfb/dss/overlay-sysfs.c

291

r = kstrtou8(buf, 0, &alpha);

drivers/video/fbdev/omap2/omapfb/dss/overlay-sysfs.c

297

info.pre_mult_alpha = alpha;

drivers/video/fbdev/pxa168fb.h

287

#define CFG_ALPHA(alpha) ((alpha) << 8)

drivers/video/fbdev/s3c-fb.c

409

static void vidosd_set_alpha(struct s3c_fb_win *win, u32 alpha)

drivers/video/fbdev/s3c-fb.c

414

writel(alpha, sfb->regs + VIDOSD_C(win->index, sfb->variant));

drivers/video/fbdev/s3c-fb.c

494

u32 alpha = 0;

drivers/video/fbdev/s3c-fb.c

570

alpha = VIDISD14C_ALPHA1_R(0xf) |

drivers/video/fbdev/s3c-fb.c

574

vidosd_set_alpha(win, alpha);

drivers/video/fbdev/sh_mobile_lcdcfb.c

1190

return sysfs_emit(buf, "%u\n", ovl->alpha);

drivers/video/fbdev/sh_mobile_lcdcfb.c

1199

unsigned int alpha;

drivers/video/fbdev/sh_mobile_lcdcfb.c

1202

alpha = simple_strtoul(buf, &endp, 10);

drivers/video/fbdev/sh_mobile_lcdcfb.c

1209

if (alpha > 255)

drivers/video/fbdev/sh_mobile_lcdcfb.c

1212

if (ovl->alpha != alpha) {

drivers/video/fbdev/sh_mobile_lcdcfb.c

1213

ovl->alpha = alpha;

drivers/video/fbdev/sh_mobile_lcdcfb.c

183

unsigned int alpha;

drivers/video/fbdev/sh_mobile_lcdcfb.c

2354

ovl->alpha = 255;

drivers/video/fbdev/sh_mobile_lcdcfb.c

790

format = LDBBSIFR_EN | (ovl->alpha << LDBBSIFR_LAY_SHIFT);

drivers/video/screen_info_generic.c

197

f->alpha.offset = 0;

drivers/video/screen_info_generic.c

198

f->alpha.length = 0;

include/drm/drm_plane.h

131

u16 alpha;

include/linux/soc/mediatek/mtk-mmsys.h

103

void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool alpha_sel, u16 alpha,

include/media/vsp1.h

70

unsigned int alpha;

include/net/pie.h

32

u32 alpha;

include/net/pie.h

94

params->alpha = 2;

include/uapi/drm/drm_mode.h

1559

#define DRM_ARGB64_PREP(alpha, red, green, blue) \

include/uapi/drm/drm_mode.h

1561

__DRM_ARGB64_PREP(alpha, 48) | \

include/uapi/drm/drm_mode.h

1567

#define DRM_ARGB64_PREP_BPC(alpha, red, green, blue, bpc) \

include/uapi/drm/drm_mode.h

1570

__DRM_ARGB64_PREP_BPC(alpha, 48, __bpc) | \

include/uapi/drm/radeon_drm.h

344

unsigned int alpha;

include/video/imx-ipu-v3.h

335

int ipu_dp_set_global_alpha(struct ipu_dp *dp, bool enable, u8 alpha,

include/video/pixel_format.h

14

} alpha, red, green, blue;

include/video/pixel_format.h

27

{ 16, false, { .alpha = {0, 0}, .red = {10, 5}, .green = {5, 5}, .blue = {0, 5} } }

include/video/pixel_format.h

30

{ 16, false, { .alpha = {0, 0}, .red = {11, 5}, .green = {5, 6}, .blue = {0, 5} } }

include/video/pixel_format.h

33

{ 24, false, { .alpha = {0, 0}, .red = {16, 8}, .green = {8, 8}, .blue = {0, 8} } }

include/video/pixel_format.h

36

{ 32, false, { .alpha = {0, 0}, .red = {16, 8}, .green = {8, 8}, .blue = {0, 8} } }

include/video/pixel_format.h

39

{ 32, false, { .alpha = {0, 0}, .red = {0, 8}, .green = {8, 8}, .blue = {16, 8} } }

include/video/pixel_format.h

42

{ 32, false, { .alpha = {0, 0}, .red = {20, 10}, .green = {10, 10}, .blue = {0, 10} } }

include/video/pixel_format.h

78

__pixel_format_cmp_bitfield(lhs, rhs, alpha);

kernel/bpf/tnum.c

77

u64 dv, alpha, beta, chi, mu;

kernel/bpf/tnum.c

80

alpha = dv + a.mask;

kernel/bpf/tnum.c

82

chi = alpha ^ beta;

kernel/bpf/tnum.c

94

u64 alpha, beta, v;

kernel/bpf/tnum.c

96

alpha = a.value | a.mask;

kernel/bpf/tnum.c

99

return TNUM(v, alpha & beta & ~v);

lib/raid/xor/alpha/xor.c

835

DO_XOR_BLOCKS(alpha, xor_alpha_2, xor_alpha_3, xor_alpha_4, xor_alpha_5);

net/ipv4/tcp_dctcp.c

136

u32 alpha = ca->dctcp_alpha;

net/ipv4/tcp_dctcp.c

154

alpha -= min_not_zero(alpha, alpha >> dctcp_shift_g);

net/ipv4/tcp_dctcp.c

163

alpha = min(alpha + delivered_ce, DCTCP_MAX_ALPHA);

net/ipv4/tcp_dctcp.c

169

WRITE_ONCE(ca->dctcp_alpha, alpha);

net/ipv4/tcp_htcp.c

127

if (ca->packetcount >= tcp_snd_cwnd(tp) - (ca->alpha >> 7 ? : 1) &&

net/ipv4/tcp_htcp.c

194

ca->alpha = 2 * factor * ((1 << 7) - ca->beta);

net/ipv4/tcp_htcp.c

195

if (!ca->alpha)

net/ipv4/tcp_htcp.c

196

ca->alpha = ALPHA_BASE;

net/ipv4/tcp_htcp.c

245

if ((tp->snd_cwnd_cnt * ca->alpha)>>7 >= tcp_snd_cwnd(tp)) {

net/ipv4/tcp_htcp.c

262

ca->alpha = ALPHA_BASE;

net/ipv4/tcp_htcp.c

27

u32 alpha; /* Fixed point arith, << 7 */

net/ipv4/tcp_illinois.c

153

return ca->alpha;

net/ipv4/tcp_illinois.c

228

ca->alpha = ALPHA_BASE;

net/ipv4/tcp_illinois.c

234

ca->alpha = alpha(ca, da, dm);

net/ipv4/tcp_illinois.c

249

ca->alpha = ALPHA_BASE;

net/ipv4/tcp_illinois.c

286

delta = (tp->snd_cwnd_cnt * ca->alpha) >> ALPHA_SHIFT;

net/ipv4/tcp_illinois.c

50

u32 alpha; /* Additive increase */

net/ipv4/tcp_illinois.c

73

ca->alpha = ALPHA_MAX;

net/ipv4/tcp_vegas.c

267

} else if (diff < alpha) {

net/ipv4/tcp_vegas.c

44

static int alpha = 2;

net/ipv4/tcp_vegas.c

48

module_param(alpha, int, 0644);

net/ipv4/tcp_vegas.c

49

MODULE_PARM_DESC(alpha, "lower bound of packets in network");

net/sched/sch_dualpi2.c

840

u32 alpha = nla_get_u32(tb[TCA_DUALPI2_ALPHA]);

net/sched/sch_dualpi2.c

842

WRITE_ONCE(q->pi2_alpha, dualpi2_scale_alpha_beta(alpha));

net/sched/sch_fq_pie.c

336

WRITE_ONCE(q->p_params.alpha,

net/sched/sch_fq_pie.c

490

nla_put_u32(skb, TCA_FQ_PIE_ALPHA, READ_ONCE(q->p_params.alpha)) ||

net/sched/sch_pie.c

179

WRITE_ONCE(q->params.alpha, nla_get_u32(tb[TCA_PIE_ALPHA]));

net/sched/sch_pie.c

309

u64 alpha, beta;

net/sched/sch_pie.c

339

alpha = ((u64)params->alpha * (MAX_PROB / PSCHED_TICKS_PER_SEC)) >> 4;

net/sched/sch_pie.c

346

alpha >>= 1;

net/sched/sch_pie.c

352

alpha >>= 2;

net/sched/sch_pie.c

359

delta += alpha * (qdelay - params->target);

net/sched/sch_pie.c

482

nla_put_u32(skb, TCA_PIE_ALPHA, READ_ONCE(q->params.alpha)) ||

tools/testing/selftests/bpf/progs/bpf_dctcp.c

127

__u32 alpha = ca->dctcp_alpha;

tools/testing/selftests/bpf/progs/bpf_dctcp.c

131

alpha -= min_not_zero(alpha, alpha >> dctcp_shift_g);

tools/testing/selftests/bpf/progs/bpf_dctcp.c

141

alpha = min(alpha + delivered_ce, DCTCP_MAX_ALPHA);

tools/testing/selftests/bpf/progs/bpf_dctcp.c

143

ca->dctcp_alpha = alpha;