addr_gpa2hva
u8 *tbl = addr_gpa2hva(vm, test_data.lpi_prop_table);
vcpu_hva = addr_gpa2hva(vm, vcpu_args->gpa);
host_test_mem = addr_gpa2hva(vm, (vm_paddr_t)guest_test_phys_mem);
void *addr_gpa2hva(struct kvm_vm *vm, vm_paddr_t gpa);
.uaddr = (unsigned long)addr_gpa2hva(vm, gpa),
host_test_mem = addr_gpa2hva(vm, (vm_paddr_t)guest_test_phys_mem);
ptep = addr_gpa2hva(vm, vm->mmu.pgd) + pgd_index(vm, vaddr) * 8;
ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pud_index(vm, vaddr) * 8;
ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pmd_index(vm, vaddr) * 8;
ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pte_index(vm, vaddr) * 8;
ptep = addr_gpa2hva(vm, vm->mmu.pgd) + pgd_index(vm, gva) * 8;
ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pud_index(vm, gva) * 8;
ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pmd_index(vm, gva) * 8;
ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) + pte_index(vm, gva) * 8;
ptep = addr_gpa2hva(vm, pte);
ptep = addr_gpa2hva(vm, pgd);
return addr_gpa2hva(vm, addr_gva2gpa(vm, gva));
ptep = addr_gpa2hva(vm, child) + virt_pte_index(vm, gva, level) * 8;
ptep = addr_gpa2hva(vm, pte);
ptep = addr_gpa2hva(vm, table);
ptep = addr_gpa2hva(vm, child) + virt_pte_index(vm, gva, level) * 8;
ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) +
ptep = addr_gpa2hva(vm, vm->mmu.pgd) + pte_index(vm, gva, level) * 8;
ptep = addr_gpa2hva(vm, pte_addr(vm, *ptep)) +
ptep = addr_gpa2hva(vm, pte);
ptep = addr_gpa2hva(vm, pgd);
ptep = addr_gpa2hva(vm, vm->mmu.pgd) + pte_index(vm, vaddr, level) * 8;
entry = addr_gpa2hva(vm, entry[idx] & REGION_ENTRY_ORIGIN);
pte = addr_gpa2hva(vm, ptea);
entry = addr_gpa2hva(vm, addr);
memset(addr_gpa2hva(vm, paddr), 0xff, PAGES_PER_REGION * vm->page_size);
memset(addr_gpa2hva(vm, taddr), 0xff, PAGES_PER_REGION * vm->page_size);
entry = addr_gpa2hva(vm, vm->mmu.pgd);
entry = addr_gpa2hva(vm, entry[idx] & REGION_ENTRY_ORIGIN);
entry = addr_gpa2hva(vm, vm->mmu.pgd);
memset(addr_gpa2hva(vm, smram_gpa), 0x0, SMRAM_SIZE);
memcpy(addr_gpa2hva(vm, smram_gpa) + 0x8000, smi_handler, handler_size);
uint64_t *page_table = addr_gpa2hva(vm, pt_gpa);
pml4e_start = (uint64_t *) addr_gpa2hva(vm, mmu->pgd);
pdpe_start = addr_gpa2hva(vm, *pml4e & PHYSICAL_PAGE_MASK);
pde_start = addr_gpa2hva(vm, *pdpe & PHYSICAL_PAGE_MASK);
pte_start = addr_gpa2hva(vm, *pde & PHYSICAL_PAGE_MASK);
(uint64_t)addr_gpa2hva(vm, gpa_base + offset),
data->hva_slots[slot - 1] = addr_gpa2hva(data->vm, guest_addr);
lowcore = addr_gpa2hva(vm, 0);
hva = addr_gpa2hva(vm, MEM_REGION_GPA);
hva = addr_gpa2hva(vm, MEM_REGION_GPA);
outval = addr_gpa2hva(vm, run->hyperv.u.hcall.params[1]);
#define TEST_HVA(vm, idx) addr_gpa2hva(vm, TEST_GPA(idx))
hva = addr_gpa2hva(vm, HPAGE_GPA);
uint8_t *hva = addr_gpa2hva(vm, gpa + i);
hva = addr_gpa2hva(vm, MEM_REGION_GPA);
rs = addr_gpa2hva(vm, runstate_addr);
shinfo = addr_gpa2hva(vm, SHINFO_VADDR);
vinfo = addr_gpa2hva(vm, VCPU_INFO_VADDR);
struct vcpu_runstate_info *rs = addr_gpa2hva(vm, RUNSTATE_ADDR);
wc = addr_gpa2hva(vm, SHINFO_REGION_GPA + 0xc00);
ti = addr_gpa2hva(vm, SHINFO_REGION_GPA + 0x40 + 0x20);
ti2 = addr_gpa2hva(vm, PVTIME_ADDR);