UART_MCR_DTR
outb(UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2,
outb(UART_MCR_DTR | UART_MCR_RTS, ser->port + UART_MCR);
outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase + UART_MCR);
.off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
.on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
.on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
.off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
.on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
.off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
mcr |= UART_MCR_DTR;
((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
info->MCR |= UART_MCR_DTR;
info->MCR &= ~UART_MCR_DTR;
mcr |= UART_MCR_DTR | UART_MCR_RTS;
mcr &= ~(UART_MCR_DTR | UART_MCR_RTS);
info->MCR |= UART_MCR_DTR;
info->MCR &= ~UART_MCR_DTR;
info->MCR = UART_MCR_DTR | UART_MCR_RTS;
mcr |= UART_MCR_DTR;
if (mcr & UART_MCR_DTR)
serial8250_early_out(port, UART_MCR, UART_MCR_DTR | UART_MCR_RTS);
early_out(port, UART_MCR, UART_MCR_RTS | UART_MCR_DTR);
.mcr_invert = UART_MCR_RTS | UART_MCR_DTR,
.mcr_invert = UART_MCR_RTS | UART_MCR_DTR,
serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS);
UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS);
!!((ch->ch_mistat | ch->ch_mostat) & UART_MCR_DTR),
ch->ch_mostat &= ~(UART_MCR_RTS | UART_MCR_DTR);
!!((ch->ch_mistat | ch->ch_mostat) & UART_MCR_DTR),
if (cause & UART_MCR_DTR)
ch->ch_mostat |= UART_MCR_DTR;
ch->ch_mostat &= ~(UART_MCR_DTR);
ch->ch_mostat &= ~(UART_MCR_RTS | UART_MCR_DTR);
channel->ch_mostat &= ~UART_MCR_DTR;
channel->ch_mostat &= ~(UART_MCR_DTR | UART_MCR_RTS);
if (mstat & UART_MCR_DTR)
channel->ch_mostat |= UART_MCR_DTR;
mcr |= UART_MCR_DTR;
UART_MCR_DTR | UART_MCR_RTS);
mcr |= UART_MCR_DTR;
mcr |= UART_MCR_DTR;
mcr |= UART_MCR_DTR;
mcr &= ~UART_MCR_DTR;
mcr |= UART_MCR_DTR;
mcr &= ~UART_MCR_DTR;
if (mcr & UART_MCR_DTR)
mcr |= UART_MCR_DTR;
(ctrl & UART_MCR_DTR ? TIOCM_DTR : 0) |
priv->mcr |= UART_MCR_DTR;
priv->mcr &= ~UART_MCR_DTR;
val &= ~UART_MCR_DTR;
val |= UART_MCR_DTR;
r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
r = (mcr & UART_MCR_DTR ? TIOCM_DTR : 0) |
tmp &= ~UART_MCR_DTR;
tmp |= UART_MCR_DTR;
mos7720_port->shadowMCR |= (UART_MCR_DTR | UART_MCR_RTS);
result = ((mcr & UART_MCR_DTR) ? TIOCM_DTR : 0) /* 0x002 */
mcr |= UART_MCR_DTR;
mcr &= ~UART_MCR_DTR;
mxport->mcr_state |= UART_MCR_DTR;
mxport->mcr_state &= ~UART_MCR_DTR;
mcr_state |= (UART_MCR_RTS | UART_MCR_DTR);
mcr_state &= ~(UART_MCR_RTS | UART_MCR_DTR);
mcr_state |= UART_MCR_DTR;
mcr_state &= ~UART_MCR_DTR;
result = (((mcr & UART_MCR_DTR) ? TIOCM_DTR : 0) | /* 0x002 */
urb_value |= UART_MCR_DTR;
r = (d[0] & UART_MCR_DTR ? TIOCM_DTR : 0) |
urb_value |= UART_MCR_DTR;
r = (d[0] & UART_MCR_DTR ? TIOCM_DTR : 0) |
if (info->mcr & UART_MCR_DTR)
info->mcr |= UART_MCR_DTR;
info->mcr &= ~UART_MCR_DTR;
firm_set_dtr(port, info->mcr & UART_MCR_DTR);
(data & (UART_MCR_RTS | UART_MCR_DTR))) {
(UART_MCR_RTS | UART_MCR_DTR)))
| UART_MCR_DTR /* Set Data-Terminal-Ready line active */
outb(UART_MCR_RTS | (0&UART_MCR_DTR) | UART_MCR_OUT2,
outb(UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2,
|(0 & UART_MCR_DTR) /* Deactivate Data-Terminal-Ready line */
outb(UART_MCR_RTS | (0&UART_MCR_DTR) | (0&UART_MCR_OUT2),
outb(UART_MCR_RTS | UART_MCR_DTR | (0&UART_MCR_OUT2),
outb(UART_MCR_RTS | (0&UART_MCR_DTR), uart->base + UART_MCR);
outb(UART_MCR_RTS | UART_MCR_DTR, uart->base + UART_MCR);