arch/arm64/net/bpf_jit.h

156

#define A64_STSET(sf, Rn, Rs) A64_ST_OP(sf, Rn, Rs, SET)

arch/arm64/net/bpf_jit.h

166

#define A64_LDSETAL(sf, Rt, Rn, Rs) A64_LD_OP_AL(sf, Rt, Rn, Rs, SET)

arch/mips/mm/uasm-micromips.c

199

if (ip->fields & SET)

arch/mips/mm/uasm-mips.c

139

[insn_mfc0] = {M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},

arch/mips/mm/uasm-mips.c

140

[insn_mfhc0] = {M(cop0_op, mfhc0_op, 0, 0, 0, 0), RT | RD | SET},

arch/mips/mm/uasm-mips.c

147

[insn_mtc0] = {M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},

arch/mips/mm/uasm-mips.c

148

[insn_mthc0] = {M(cop0_op, mthc0_op, 0, 0, 0, 0), RT | RD | SET},

arch/mips/mm/uasm-mips.c

265

if (ip->fields & SET)

arch/mips/mm/uasm-mips.c

88

[insn_dmfc0] = {M(cop0_op, dmfc_op, 0, 0, 0, 0), RT | RD | SET},

arch/mips/mm/uasm-mips.c

91

[insn_dmtc0] = {M(cop0_op, dmtc_op, 0, 0, 0, 0), RT | RD | SET},

drivers/accel/ivpu/ivpu_hw_ip.c

1191

u32 val = REG_FLD(VPU_37XX_CPU_SS_DOORBELL_0, SET);

drivers/accel/ivpu/ivpu_hw_ip.c

1199

u32 val = REG_FLD(VPU_40XX_CPU_SS_DOORBELL_0, SET);

drivers/clk/imx/clk-pfd.c

103

writel_relaxed(frac << (pfd->idx * 8), pfd->reg + SET);

drivers/clk/imx/clk-pfd.c

49

writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + SET);

drivers/clk/mxs/clk-imx23.c

49

writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET);

drivers/clk/mxs/clk-imx23.c

70

writel_relaxed(30 << BP_FRAC_IOFRAC, FRAC + SET);

drivers/clk/mxs/clk-imx28.c

74

writel_relaxed(clkmux << BP_SAIF_CLKMUX, DIGCTRL + SET);

drivers/clk/mxs/clk-imx28.c

84

writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET);

drivers/clk/mxs/clk-imx28.c

87

writel_relaxed(1 << BP_ENET_DIV_TIME, ENET + SET);

drivers/clk/mxs/clk-pll.c

36

writel_relaxed(1 << pll->power, pll->base + SET);

drivers/clk/mxs/clk-pll.c

63

writel_relaxed(1 << 31, pll->base + SET);

drivers/clk/mxs/clk-ref.c

44

writel_relaxed(1 << ((ref->idx + 1) * 8 - 1), ref->reg + SET);

drivers/gpu/drm/imx/dcss/dcss-dev.h

21

#define dcss_set(v, c) writel((v), (c) + SET)

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c

196

cp_set (ctx, UNK01, SET);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c

202

cp_bra (ctx, UNK0B, SET, cp_prepare_exit);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c

207

cp_set (ctx, UNK1D, SET);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c

211

cp_set (ctx, UNK01, SET);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c

216

cp_set (ctx, UNK03, SET);

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.c

226

cp_set (ctx, UNK20, SET);

drivers/gpu/drm/sti/sti_awg_utils.c

138

ret |= awg_generate_instr((timing->trailing_pixels > 0) ? SET : RPLSET,

drivers/gpu/drm/sti/sti_awg_utils.c

148

ret |= awg_generate_instr(SET, val, 0, 0, fwparams);

drivers/gpu/drm/sti/sti_awg_utils.c

69

opcode = SET;

drivers/gpu/drm/sti/sti_awg_utils.c

97

case SET:

drivers/gpu/drm/xe/tests/xe_rtp_test.c

114

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

120

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

124

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(2)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

128

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(3)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

140

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

149

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

153

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(2)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

169

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

173

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

189

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

193

XE_RTP_ACTIONS(SET(REGULAR_REG2, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

209

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

250

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

255

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

271

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

292

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

297

XE_RTP_ACTIONS(SET(MCR_REG1, REG_BIT(1)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

302

XE_RTP_ACTIONS(SET(MASKED_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

75

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

79

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

95

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

99

XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))

drivers/gpu/drm/xe/xe_hw_engine.c

464

XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0), CS_PRIORITY_MEM_READ,

drivers/gpu/drm/xe/xe_tuning.c

103

XE_RTP_ACTIONS(SET(SAMPLER_MODE, INDIRECT_STATE_BASE_ADDR_OVERRIDE))

drivers/gpu/drm/xe/xe_tuning.c

108

XE_RTP_ACTIONS(SET(RT_CTRL, DIS_NULL_QUERY))

drivers/gpu/drm/xe/xe_tuning.c

129

XE_RTP_ACTIONS(SET(CHICKEN_RASTER_2, TBIMR_FAST_CLIP))

drivers/gpu/drm/xe/xe_tuning.c

24

XE_RTP_ACTIONS(SET(XEHP_L3SCQREG7, BLEND_FILL_CACHING_OPT_DIS))

drivers/gpu/drm/xe/xe_tuning.c

28

XE_RTP_ACTIONS(SET(XEHP_SQCM, EN_32B_ACCESS))

drivers/gpu/drm/xe/xe_tuning.c

47

SET(CCCHKNREG1, L3CMPCTRL))

drivers/gpu/drm/xe/xe_tuning.c

52

SET(XE2LPM_CCCHKNREG1, L3CMPCTRL))

drivers/gpu/drm/xe/xe_tuning.c

56

XE_RTP_ACTIONS(SET(L3SQCREG3, COMPPWOVERFETCHEN))

drivers/gpu/drm/xe/xe_tuning.c

60

XE_RTP_ACTIONS(SET(XE2LPM_L3SQCREG3, COMPPWOVERFETCHEN))

drivers/gpu/drm/xe/xe_tuning.c

65

XE_RTP_ACTIONS(SET(L3SQCREG2,

drivers/gpu/drm/xe/xe_tuning.c

71

XE_RTP_ACTIONS(SET(XE2LPM_L3SQCREG2,

drivers/gpu/drm/xe/xe_tuning.c

86

XE_RTP_ACTIONS(SET(SCRATCH3_LBCF, RWFLUSHALLEN))

drivers/gpu/drm/xe/xe_tuning.c

90

XE_RTP_ACTIONS(SET(XE2LPM_SCRATCH3_LBCF, RWFLUSHALLEN))

drivers/gpu/drm/xe/xe_wa.c

127

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F10(0), IECPUNIT_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

132

XE_RTP_ACTIONS(SET(DFR_RATIO_EN_AND_CHICKEN, DFR_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

143

XE_RTP_ACTIONS(SET(SUBSLICE_UNIT_LEVEL_CLKGATE2, CPSSUNIT_CLKGATE_DIS))

drivers/gpu/drm/xe/xe_wa.c

147

XE_RTP_ACTIONS(SET(UNSLICE_UNIT_LEVEL_CLKGATE2, VSUNIT_CLKGATE2_DIS))

drivers/gpu/drm/xe/xe_wa.c

154

XE_RTP_ACTIONS(SET(UNSLICE_UNIT_LEVEL_CLKGATE, CG3DDISCFEG_CLKGATE_DIS))

drivers/gpu/drm/xe/xe_wa.c

158

XE_RTP_ACTIONS(SET(SUBSLICE_UNIT_LEVEL_CLKGATE, DSS_ROUTER_CLKGATE_DIS))

drivers/gpu/drm/xe/xe_wa.c

166

XE_RTP_ACTIONS(SET(RENDER_MOD_CTRL, FORCE_MISS_FTLB),

drivers/gpu/drm/xe/xe_wa.c

167

SET(COMP_MOD_CTRL, FORCE_MISS_FTLB),

drivers/gpu/drm/xe/xe_wa.c

168

SET(XEHP_VDBX_MOD_CTRL, FORCE_MISS_FTLB),

drivers/gpu/drm/xe/xe_wa.c

169

SET(XEHP_VEBX_MOD_CTRL, FORCE_MISS_FTLB))

drivers/gpu/drm/xe/xe_wa.c

173

XE_RTP_ACTIONS(SET(XEHP_GAMCNTRL_CTRL,

drivers/gpu/drm/xe/xe_wa.c

182

XE_RTP_ACTIONS(SET(RENDER_MOD_CTRL, FORCE_MISS_FTLB),

drivers/gpu/drm/xe/xe_wa.c

183

SET(COMP_MOD_CTRL, FORCE_MISS_FTLB),

drivers/gpu/drm/xe/xe_wa.c

184

SET(XEHP_VDBX_MOD_CTRL, FORCE_MISS_FTLB),

drivers/gpu/drm/xe/xe_wa.c

185

SET(XEHP_VEBX_MOD_CTRL, FORCE_MISS_FTLB))

drivers/gpu/drm/xe/xe_wa.c

189

XE_RTP_ACTIONS(SET(XEHPC_LNCFMISCCFGREG0, XEHPC_OVRLSCCC))

drivers/gpu/drm/xe/xe_wa.c

200

XE_RTP_ACTIONS(SET(COMP_MOD_CTRL, FORCE_MISS_FTLB))

drivers/gpu/drm/xe/xe_wa.c

204

XE_RTP_ACTIONS(SET(SQCNT1, ENFORCE_RAR))

drivers/gpu/drm/xe/xe_wa.c

212

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

217

XE_RTP_ACTIONS(SET(XELPMP_SQCNT1, ENFORCE_RAR))

drivers/gpu/drm/xe/xe_wa.c

225

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F10(0), IECPUNIT_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

231

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

236

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F08(0), CG3DDISHRS_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

251

SET(LSC_CHICKEN_BIT_0_UDW, L3_128B_256B_WRT_DIS))

drivers/gpu/drm/xe/xe_wa.c

259

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

264

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F08(0), CG3DDISHRS_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

272

XE_RTP_ACTIONS(SET(UNSLCGCTL9454, LSCFE_CLKGATE_DIS))

drivers/gpu/drm/xe/xe_wa.c

280

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

286

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F10(0), IECPUNIT_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

292

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F10(0), IECPUNIT_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

298

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

304

XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F10(0), RAMDFTUNIT_CLKGATE_DIS)),

drivers/gpu/drm/xe/xe_wa.c

309

XE_RTP_ACTIONS(SET(GUC_INTR_CHICKEN, DISABLE_SIGNALING_ENGINES))

drivers/gpu/drm/xe/xe_wa.c

316

XE_RTP_ACTIONS(SET(FF_THREAD_MODE(RENDER_RING_BASE),

drivers/gpu/drm/xe/xe_wa.c

323

XE_RTP_ACTIONS(SET(ROW_CHICKEN2, PUSH_CONST_DEREF_HOLD_DIS))

drivers/gpu/drm/xe/xe_wa.c

329

XE_RTP_ACTIONS(SET(ROW_CHICKEN4, DISABLE_TDL_PUSH))

drivers/gpu/drm/xe/xe_wa.c

333

XE_RTP_ACTIONS(SET(ROW_CHICKEN2, DISABLE_EARLY_READ))

drivers/gpu/drm/xe/xe_wa.c

337

XE_RTP_ACTIONS(SET(CS_DEBUG_MODE1(RENDER_RING_BASE),

drivers/gpu/drm/xe/xe_wa.c

342

XE_RTP_ACTIONS(SET(SAMPLER_MODE, ENABLE_SMALLPL))

drivers/gpu/drm/xe/xe_wa.c

346

XE_RTP_ACTIONS(SET(FF_SLICE_CS_CHICKEN1(RENDER_RING_BASE),

drivers/gpu/drm/xe/xe_wa.c

354

XE_RTP_ACTIONS(SET(RING_PSMI_CTL(RENDER_RING_BASE),

drivers/gpu/drm/xe/xe_wa.c

363

XE_RTP_ACTIONS(SET(RING_PSMI_CTL(RENDER_RING_BASE),

drivers/gpu/drm/xe/xe_wa.c

372

XE_RTP_ACTIONS(SET(RING_PSMI_CTL(RENDER_RING_BASE),

drivers/gpu/drm/xe/xe_wa.c

381

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW,

drivers/gpu/drm/xe/xe_wa.c

386

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, DISABLE_D8_D16_COASLESCE))

drivers/gpu/drm/xe/xe_wa.c

390

XE_RTP_ACTIONS(SET(VFG_PREEMPTION_CHICKEN,

drivers/gpu/drm/xe/xe_wa.c

403

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, FORCE_1_SUB_MESSAGE_PER_FRAGMENT))

drivers/gpu/drm/xe/xe_wa.c

408

XE_RTP_ACTIONS(SET(ROW_CHICKEN4, XEHP_DIS_BBL_SYSPIPE))

drivers/gpu/drm/xe/xe_wa.c

413

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, UGM_FRAGMENT_THRESHOLD_TO_3))

drivers/gpu/drm/xe/xe_wa.c

418

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, DIS_CHAIN_2XSIMD8))

drivers/gpu/drm/xe/xe_wa.c

423

XE_RTP_ACTIONS(SET(CACHE_MODE_SS, ENABLE_PREFETCH_INTO_IC,

drivers/gpu/drm/xe/xe_wa.c

432

XE_RTP_ACTIONS(SET(SAMPLER_MODE, SC_DISABLE_POWER_OPTIMIZATION_EBB))

drivers/gpu/drm/xe/xe_wa.c

436

XE_RTP_ACTIONS(SET(ROW_CHICKEN2, DISABLE_READ_SUPPRESSION))

drivers/gpu/drm/xe/xe_wa.c

445

XE_RTP_ACTIONS(SET(XEHP_HDC_CHICKEN0, DIS_ATOMIC_CHAINING_TYPED_WRITES,

drivers/gpu/drm/xe/xe_wa.c

453

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, DISABLE_D8_D16_COASLESCE))

drivers/gpu/drm/xe/xe_wa.c

457

XE_RTP_ACTIONS(SET(ROW_CHICKEN4, XEHP_DIS_BBL_SYSPIPE))

drivers/gpu/drm/xe/xe_wa.c

462

XE_RTP_ACTIONS(SET(RING_HWSTAM(RENDER_RING_BASE), ~0))

drivers/gpu/drm/xe/xe_wa.c

467

XE_RTP_ACTIONS(SET(CACHE_MODE_SS, DISABLE_ECC))

drivers/gpu/drm/xe/xe_wa.c

475

XE_RTP_ACTIONS(SET(ROW_CHICKEN3, DIS_FIX_EOT1_FLUSH))

drivers/gpu/drm/xe/xe_wa.c

480

XE_RTP_ACTIONS(SET(XEHP_HDC_CHICKEN0, DIS_ATOMIC_CHAINING_TYPED_WRITES,

drivers/gpu/drm/xe/xe_wa.c

486

XE_RTP_ACTIONS(SET(ROW_CHICKEN2, DISABLE_TDL_SVHS_GATING))

drivers/gpu/drm/xe/xe_wa.c

494

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, SEQUENTIAL_ACCESS_UPGRADE_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

498

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, XE2_ALLOC_DPA_STARVE_FIX_DIS))

drivers/gpu/drm/xe/xe_wa.c

502

XE_RTP_ACTIONS(SET(ROW_CHICKEN3, XE2_EUPEND_CHK_FLUSH_DIS))

drivers/gpu/drm/xe/xe_wa.c

507

XE_RTP_ACTIONS(SET(ROW_CHICKEN4, DISABLE_TDL_PUSH))

drivers/gpu/drm/xe/xe_wa.c

511

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, ENABLE_SMP_LD_RENDER_SURFACE_CONTROL))

drivers/gpu/drm/xe/xe_wa.c

522

XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),

drivers/gpu/drm/xe/xe_wa.c

529

XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, SLM_WMTP_RESTORE))

drivers/gpu/drm/xe/xe_wa.c

533

XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

538

XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))

drivers/gpu/drm/xe/xe_wa.c

546

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, XE2_ALLOC_DPA_STARVE_FIX_DIS))

drivers/gpu/drm/xe/xe_wa.c

551

XE_RTP_ACTIONS(SET(ROW_CHICKEN, EARLY_EOT_DIS))

drivers/gpu/drm/xe/xe_wa.c

556

XE_RTP_ACTIONS(SET(ROW_CHICKEN3, XE2_EUPEND_CHK_FLUSH_DIS))

drivers/gpu/drm/xe/xe_wa.c

561

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, SEQUENTIAL_ACCESS_UPGRADE_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

566

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, ENABLE_SMP_LD_RENDER_SURFACE_CONTROL))

drivers/gpu/drm/xe/xe_wa.c

575

XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),

drivers/gpu/drm/xe/xe_wa.c

583

XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, WR_REQ_CHAINING_DIS))

drivers/gpu/drm/xe/xe_wa.c

587

XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

592

XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))

drivers/gpu/drm/xe/xe_wa.c

597

XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))

drivers/gpu/drm/xe/xe_wa.c

604

XE_RTP_ACTIONS(SET(TDL_CHICKEN, EUSTALL_PERF_SAMPLING_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

611

XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),

drivers/gpu/drm/xe/xe_wa.c

621

XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),

drivers/gpu/drm/xe/xe_wa.c

632

XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

637

XE_RTP_ACTIONS(SET(ROW_CHICKEN4, DISABLE_TDL_PUSH))

drivers/gpu/drm/xe/xe_wa.c

650

XE_RTP_ACTIONS(SET(TDL_CHICKEN, QID_WAIT_FOR_THREAD_NOT_RUN_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

656

XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))

drivers/gpu/drm/xe/xe_wa.c

661

XE_RTP_ACTIONS(SET(RING_PSMI_CTL(0), RC_SEMA_IDLE_MSG_DISABLE,

drivers/gpu/drm/xe/xe_wa.c

666

XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

673

XE_RTP_ACTIONS(SET(TDL_CHICKEN, EUSTALL_PERF_SAMPLING_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

694

XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN3,

drivers/gpu/drm/xe/xe_wa.c

705

XE_RTP_ACTIONS(SET(HIZ_CHICKEN, HZ_DEPTH_TEST_LE_GE_OPT_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

709

XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, DISABLE_TDC_LOAD_BALANCING_CALC))

drivers/gpu/drm/xe/xe_wa.c

721

XE_RTP_ACTIONS(SET(HIZ_CHICKEN,

drivers/gpu/drm/xe/xe_wa.c

729

XE_RTP_ACTIONS(SET(XEHP_SLICE_COMMON_ECO_CHICKEN1,

drivers/gpu/drm/xe/xe_wa.c

740

XE_RTP_ACTIONS(SET(XEHP_PSS_MODE2,

drivers/gpu/drm/xe/xe_wa.c

745

XE_RTP_ACTIONS(SET(CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

749

XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FD_END_COLLECT))

drivers/gpu/drm/xe/xe_wa.c

757

XE_RTP_ACTIONS(SET(BCS_SWCTRL(0),

drivers/gpu/drm/xe/xe_wa.c

766

XE_RTP_ACTIONS(SET(CACHE_MODE_1, MSAA_OPTIMIZATION_REDUC_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

770

XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FD_END_COLLECT))

drivers/gpu/drm/xe/xe_wa.c

777

XE_RTP_ACTIONS(SET(VF_SCRATCHPAD, XE2_VFG_TED_CREDIT_INTERFACE_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

781

XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FD_END_COLLECT))

drivers/gpu/drm/xe/xe_wa.c

785

XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FLSH_IGNORES_PSD))

drivers/gpu/drm/xe/xe_wa.c

789

XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))

drivers/gpu/drm/xe/xe_wa.c

794

XE_RTP_ACTIONS(SET(CHICKEN_RASTER_2, TBIMR_FAST_CLIP))

drivers/gpu/drm/xe/xe_wa.c

799

XE_RTP_ACTIONS(SET(WM_CHICKEN3, HIZ_PLANE_COMPRESSION_DIS))

drivers/gpu/drm/xe/xe_wa.c

803

XE_RTP_ACTIONS(SET(FF_MODE,

drivers/gpu/drm/xe/xe_wa.c

806

SET(VFLSKPD,

drivers/gpu/drm/xe/xe_wa.c

812

XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1, DIS_CLIP_NEGATIVE_BOUNDING_BOX))

drivers/gpu/drm/xe/xe_wa.c

818

XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1, DIS_SF_ROUND_NEAREST_EVEN))

drivers/gpu/drm/xe/xe_wa.c

822

XE_RTP_ACTIONS(SET(VF_SCRATCHPAD, XE2_VFG_TED_CREDIT_INTERFACE_DISABLE))

drivers/gpu/drm/xe/xe_wa.c

826

XE_RTP_ACTIONS(SET(WM_CHICKEN3, HIZ_PLANE_COMPRESSION_DIS))

drivers/gpu/drm/xe/xe_wa.c

830

XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FLSH_IGNORES_PSD))

drivers/gpu/drm/xe/xe_wa.c

834

XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FD_END_COLLECT))

drivers/gpu/drm/xe/xe_wa.c

838

XE_RTP_ACTIONS(SET(FF_MODE,

drivers/gpu/drm/xe/xe_wa.c

841

SET(VFLSKPD,

drivers/gpu/drm/xe/xe_wa.c

847

XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1, DIS_CLIP_NEGATIVE_BOUNDING_BOX))

drivers/gpu/drm/xe/xe_wa.c

851

XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))

drivers/gpu/drm/xe/xe_wa.c

855

XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1, DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))

drivers/gpu/drm/xe/xe_wa.c

862

XE_RTP_ACTIONS(SET(FF_MODE,

drivers/gpu/drm/xe/xe_wa.c

865

SET(VFLSKPD,

drivers/gpu/drm/xe/xe_wa.c

871

XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))

drivers/gpu/drm/xe/xe_wa.c

875

XE_RTP_ACTIONS(SET(XEHP_SLICE_COMMON_ECO_CHICKEN1, FAST_CLEAR_VALIGN_FIX))

drivers/gpu/drm/xe/xe_wa.c

880

XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1, DIS_CLIP_NEGATIVE_BOUNDING_BOX))

drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c

8473

#define MLXSW_SP_ROUTER_ALL_GOOD(SET, SFX) \

drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c

8474

((SET.good_unicast_ ## SFX) + \

drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c

8475

(SET.good_multicast_ ## SFX) + \

drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c

8476

(SET.good_broadcast_ ## SFX))

drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c

584

ret = mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),

drivers/net/wireless/mediatek/mt76/mt7915/mcu.c

2355

return mt76_mcu_send_msg(&dev->mt76, MCU_WA_PARAM_CMD(SET), &req,

drivers/net/wireless/mediatek/mt76/mt7915/mcu.c

2378

return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),

drivers/net/wireless/mediatek/mt76/mt7996/debugfs.c

370

return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET), MCU_WA_PARAM_PDMA_RX,

drivers/net/wireless/mediatek/mt76/mt7996/init.c

629

mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),

drivers/net/wireless/mediatek/mt76/mt7996/mcu.c

3354

return mt7996_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),

drivers/pinctrl/freescale/pinctrl-mxs.c

294

writel(1 << shift, reg + SET);

drivers/pinctrl/freescale/pinctrl-mxs.c

305

writel(1 << shift, reg + SET);

drivers/pwm/pwm-mxs.c

110

writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + SET);

include/video/gbe.h

91

SET((v), (f), GBE_##reg##_##field##_MSB, GBE_##reg##_##field##_LSB)

scripts/asn1_compiler.c

1048

element->compound = SET;

scripts/asn1_compiler.c

1419

case SET:

scripts/asn1_compiler.c

1476

case SET:

scripts/asn1_compiler.c

1586

case SET:

scripts/asn1_compiler.c

272

_(SET),

security/apparmor/include/label.h

191

#define label_for_each_not_in_set(I, SET, SUB, P) \

security/apparmor/include/label.h

193

((P) = __aa_label_next_not_in_set(&(I), (SET), (SUB))); \

tools/perf/builtin-script.c

3415

if (change == SET)

tools/perf/builtin-script.c

3420

if (change == SET)

tools/perf/builtin-script.c

3425

if (change != SET && change != DEFAULT)

tools/perf/builtin-script.c

3427

change = SET;

tools/perf/util/data-convert-bt.c

1481

SET(frequency, 1000000000);

tools/perf/util/data-convert-bt.c

1482

SET(offset, offset);

tools/perf/util/data-convert-bt.c

1483

SET(description, desc);

tools/perf/util/data-convert-bt.c

1484

SET(precision, 10);

tools/perf/util/data-convert-bt.c

1485

SET(is_absolute, 0);

tools/testing/selftests/bpf/progs/kprobe_multi.c

54

SET(kretprobe_test1_result, &bpf_fentry_test1, 8);

tools/testing/selftests/bpf/progs/kprobe_multi.c

55

SET(kretprobe_test2_result, &bpf_fentry_test2, 2);

tools/testing/selftests/bpf/progs/kprobe_multi.c

56

SET(kretprobe_test3_result, &bpf_fentry_test3, 7);

tools/testing/selftests/bpf/progs/kprobe_multi.c

57

SET(kretprobe_test4_result, &bpf_fentry_test4, 6);

tools/testing/selftests/bpf/progs/kprobe_multi.c

58

SET(kretprobe_test5_result, &bpf_fentry_test5, 5);

tools/testing/selftests/bpf/progs/kprobe_multi.c

59

SET(kretprobe_test6_result, &bpf_fentry_test6, 4);

tools/testing/selftests/bpf/progs/kprobe_multi.c

60

SET(kretprobe_test7_result, &bpf_fentry_test7, 3);

tools/testing/selftests/bpf/progs/kprobe_multi.c

61

SET(kretprobe_test8_result, &bpf_fentry_test8, 1);

tools/testing/selftests/bpf/progs/kprobe_multi.c

63

SET(kprobe_test1_result, &bpf_fentry_test1, 1);

tools/testing/selftests/bpf/progs/kprobe_multi.c

64

SET(kprobe_test2_result, &bpf_fentry_test2, 7);

tools/testing/selftests/bpf/progs/kprobe_multi.c

65

SET(kprobe_test3_result, &bpf_fentry_test3, 2);

tools/testing/selftests/bpf/progs/kprobe_multi.c

66

SET(kprobe_test4_result, &bpf_fentry_test4, 3);

tools/testing/selftests/bpf/progs/kprobe_multi.c

67

SET(kprobe_test5_result, &bpf_fentry_test5, 4);

tools/testing/selftests/bpf/progs/kprobe_multi.c

68

SET(kprobe_test6_result, &bpf_fentry_test6, 5);

tools/testing/selftests/bpf/progs/kprobe_multi.c

69

SET(kprobe_test7_result, &bpf_fentry_test7, 6);

tools/testing/selftests/bpf/progs/kprobe_multi.c

70

SET(kprobe_test8_result, &bpf_fentry_test8, 8);

tools/testing/selftests/bpf/progs/uprobe_multi.c

69

SET(uretprobe_multi_func_1_result, uprobe_multi_func_1_addr, 2);

tools/testing/selftests/bpf/progs/uprobe_multi.c

70

SET(uretprobe_multi_func_2_result, uprobe_multi_func_2_addr, 3);

tools/testing/selftests/bpf/progs/uprobe_multi.c

71

SET(uretprobe_multi_func_3_result, uprobe_multi_func_3_addr, 1);

tools/testing/selftests/bpf/progs/uprobe_multi.c

73

SET(uprobe_multi_func_1_result, uprobe_multi_func_1_addr, 3);

tools/testing/selftests/bpf/progs/uprobe_multi.c

74

SET(uprobe_multi_func_2_result, uprobe_multi_func_2_addr, 1);

tools/testing/selftests/bpf/progs/uprobe_multi.c

75

SET(uprobe_multi_func_3_result, uprobe_multi_func_3_addr, 2);