SDHCI_PRESENT_STATE
reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
return !(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
if (unlikely(reg == SDHCI_PRESENT_STATE)) {
CD_STABLE_TIMEOUT_US, false, host, SDHCI_PRESENT_STATE);
reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
if (unlikely(reg == SDHCI_PRESENT_STATE) &&
reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
if (spec_reg == SDHCI_PRESENT_STATE) {
return sdhci_readl(host, SDHCI_PRESENT_STATE);
if (sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)
return !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
scratch32 = sdhci_readl(host, SDHCI_PRESENT_STATE);
host, SDHCI_PRESENT_STATE)) {
100, UHS2_LANE_SYNC_TIMEOUT_150MS, true, host, SDHCI_PRESENT_STATE)) {
SDHCI_PRESENT_STATE)) {
if (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask)
present = sdhci_readl(host, SDHCI_PRESENT_STATE) &
if (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask)
return !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
is_readonly = !(sdhci_readl(host, SDHCI_PRESENT_STATE)
present_state = sdhci_readl(host, SDHCI_PRESENT_STATE);
u32 present = sdhci_readl(host, SDHCI_PRESENT_STATE) &
sdhci_readl(host, SDHCI_PRESENT_STATE));
while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
sdhci_readl(host, SDHCI_PRESENT_STATE),
!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {