arch/mips/pic32/pic32mzda/config.c

111

writel(-1, PIC32_CLR(pic32_conf_base + PIC32_RCON));

drivers/clk/microchip/clk-core.c

115

writel(PB_DIV_ENABLE, PIC32_CLR(pb->ctrl_reg));

drivers/clk/microchip/clk-core.c

267

writel(REFO_ON | REFO_OE, PIC32_CLR(refo->ctrl_reg));

drivers/clk/microchip/clk-core.c

525

writel(REFO_ON, PIC32_CLR(refo->ctrl_reg));

drivers/clk/microchip/clk-core.c

973

writel(sosc->enable_mask, PIC32_CLR(sosc->enable_reg));

drivers/irqchip/irq-pic32-evic.c

113

evic_base + PIC32_CLR(REG_IPC_OFFSET + reg * 0x10));

drivers/irqchip/irq-pic32-evic.c

151

iecclr = PIC32_CLR(REG_IEC_OFFSET + reg * 0x10);

drivers/irqchip/irq-pic32-evic.c

152

ifsclr = PIC32_CLR(REG_IFS_OFFSET + reg * 0x10);

drivers/irqchip/irq-pic32-evic.c

255

u32 ifsclr = PIC32_CLR(REG_IFS_OFFSET + (i * 0x10));

drivers/irqchip/irq-pic32-evic.c

67

writel(BIT(bit), evic_base + PIC32_CLR(REG_INTCON));

drivers/pinctrl/pinctrl-pic32.c

1807

writel(mask, bank->reg_base + PIC32_CLR(ANSEL_REG));

drivers/pinctrl/pinctrl-pic32.c

1839

writel(mask, bank->reg_base + PIC32_CLR(PORT_REG));

drivers/pinctrl/pinctrl-pic32.c

1851

writel(mask, bank->reg_base + PIC32_CLR(TRIS_REG));

drivers/pinctrl/pinctrl-pic32.c

1949

writel(mask, bank->reg_base + PIC32_CLR(ANSEL_REG));

drivers/pinctrl/pinctrl-pic32.c

2011

writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_CLR(CNCON_REG));

drivers/pinctrl/pinctrl-pic32.c

2043

writel(mask, bank->reg_base + PIC32_CLR(CNNE_REG));

drivers/pinctrl/pinctrl-pic32.c

2049

writel(mask, bank->reg_base + PIC32_CLR(CNEN_REG));

drivers/rtc/rtc-pic32.c

106

PIC32_CLR(PIC32_RTCALRM)));

drivers/rtc/rtc-pic32.c

122

writel(PIC32_RTCALRM_AMASK, base + PIC32_CLR(PIC32_RTCALRM));

drivers/rtc/rtc-pic32.c

273

writel(PIC32_RTCCON_ON, base + PIC32_CLR(PIC32_RTCCON));

drivers/rtc/rtc-pic32.c

278

writel(3 << 9, base + PIC32_CLR(PIC32_RTCCON));

drivers/tty/serial/pic32_uart.c

154

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE),

drivers/tty/serial/pic32_uart.c

211

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA),

drivers/tty/serial/pic32_uart.c

235

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA),

drivers/tty/serial/pic32_uart.c

251

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA),

drivers/tty/serial/pic32_uart.c

289

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA),

drivers/tty/serial/pic32_uart.c

444

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA),

drivers/tty/serial/pic32_uart.c

446

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE),

drivers/tty/serial/pic32_uart.c

543

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA),

drivers/tty/serial/pic32_uart.c

547

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA),

drivers/tty/serial/pic32_uart.c

615

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE),

drivers/tty/serial/pic32_uart.c

623

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE),

drivers/tty/serial/pic32_uart.c

628

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE),

drivers/tty/serial/pic32_uart.c

632

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE),

drivers/tty/serial/pic32_uart.c

641

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE),

drivers/tty/serial/pic32_uart.c

643

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE),

drivers/tty/serial/pic32_uart.c

647

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE),

drivers/tty/serial/pic32_uart.c

649

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE),

drivers/tty/serial/pic32_uart.c

651

pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE),

drivers/watchdog/pic32-dmt.c

117

writel(RESETCON_DMT_TIMEOUT, PIC32_CLR(rst_base));

drivers/watchdog/pic32-dmt.c

53

writel(DMT_ON, PIC32_CLR(dmt->regs + DMTCON_REG));

drivers/watchdog/pic32-wdt.c

119

writel(WDTCON_ON, PIC32_CLR(wdt->regs + WDTCON_REG));

drivers/watchdog/pic32-wdt.c

66

writel(RESETCON_WDT_TIMEOUT, PIC32_CLR(wdt->rst_base));