arch/powerpc/include/asm/processor.h

292

.fpexc_mode = MSR_FE0 | MSR_FE1, \

arch/powerpc/include/asm/processor.h

300

.fpexc_mode = MSR_FE0 | MSR_FE1, \

arch/powerpc/include/asm/processor.h

354

return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8);

arch/powerpc/include/asm/processor.h

359

return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1);

arch/powerpc/kernel/process.c

157

msr &= ~(MSR_FP|MSR_FE0|MSR_FE1);

arch/powerpc/kernel/process.c

2037

regs_set_return_msr(regs, (regs->msr & ~(MSR_FE0|MSR_FE1))

arch/powerpc/kernel/signal_32.c

536

regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1));

arch/powerpc/kernel/signal_32.c

617

regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1));

arch/powerpc/kernel/signal_64.c

387

regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX));

arch/powerpc/kernel/signal_64.c

506

regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX));

arch/powerpc/kvm/book3s_pr.c

238

smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE |

arch/powerpc/kvm/book3s_pr.c

241

smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_LE;

arch/powerpc/kvm/book3s_pr.c

585

to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1);