FLG_HDLC
test_and_clear_bit(FLG_HDLC, &bch->Flags);
test_and_set_bit(FLG_HDLC, &bch->Flags);
if (test_bit(FLG_HDLC, &bch->Flags))
if (dch || test_bit(FLG_HDLC, &bch->Flags)) {
if (bch && (!test_bit(FLG_HDLC, &bch->Flags)) &&
&& !test_bit(FLG_HDLC, &bch->Flags) && z2 == z1) {
if (bch && (!test_bit(FLG_HDLC, &bch->Flags)) && (!*txpending)
if (dch || test_bit(FLG_HDLC, &bch->Flags))
if (dch || test_bit(FLG_HDLC, &bch->Flags)) {
if (dch || test_bit(FLG_HDLC, &bch->Flags)) {
if ((dch || test_bit(FLG_HDLC, &bch->Flags)) && f1 != f2)
if (dch || test_bit(FLG_HDLC, &bch->Flags)) {
test_and_clear_bit(FLG_HDLC, &hc->chan[ch].bch->Flags);
test_and_set_bit(FLG_HDLC, &hc->chan[ch].bch->Flags);
test_and_clear_bit(FLG_HDLC, &bch->Flags);
test_and_set_bit(FLG_HDLC, &bch->Flags);
hdlc = test_bit(FLG_HDLC, &fifo->bch->Flags);
clear_bit(FLG_HDLC, &bch->Flags);
set_bit(FLG_HDLC, &bch->Flags);
hdlc = test_bit(FLG_HDLC, &fifo->bch->Flags);
test_and_clear_bit(FLG_HDLC, &hscx->bch.Flags);
test_and_set_bit(FLG_HDLC, &hscx->bch.Flags);
test_and_clear_bit(FLG_HDLC, &hscx->bch.Flags);
test_and_set_bit(FLG_HDLC, &hscx->bch.Flags);
test_and_clear_bit(FLG_HDLC, &hscx->bch.Flags);
test_and_set_bit(FLG_HDLC, &hscx->bch.Flags);
test_and_clear_bit(FLG_HDLC, &ch->bch.Flags);
test_and_set_bit(FLG_HDLC, &ch->bch.Flags);
test_and_clear_bit(FLG_HDLC, &bc->bch.Flags);
test_and_set_bit(FLG_HDLC, &bc->bch.Flags);
if (test_bit(FLG_HDLC, &bc->bch.Flags) && !fillempty) {
if (test_bit(FLG_HDLC, &bc->bch.Flags)) {
else if (test_bit(FLG_HDLC, &wch->bch.Flags))
test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
test_and_set_bit(FLG_HDLC, &ch->Flags);