arch/powerpc/platforms/44x/canyonlands.c

100

setbits32((vaddr + GPIO0_OSRH), 0x42000000);

arch/powerpc/platforms/44x/canyonlands.c

101

setbits32((vaddr + GPIO0_TSRH), 0x42000000);

arch/powerpc/platforms/44x/gpio.c

139

setbits32(&regs->tcr, GPIO_MASK(gpio));

arch/powerpc/platforms/44x/gpio.c

74

setbits32(&regs->or, GPIO_MASK(gpio));

arch/powerpc/platforms/512x/pdm360ng.c

37

setbits32(pdm360ng_gpio_base + 0xc, 0x40);

arch/powerpc/platforms/512x/pdm360ng.c

68

setbits32(pdm360ng_gpio_base + 0x18, 0x2000);

arch/powerpc/platforms/512x/pdm360ng.c

69

setbits32(pdm360ng_gpio_base + 0x10, 0x40);

arch/powerpc/platforms/52xx/mpc52xx_common.c

278

setbits32(&simple_gpio->simple_gpioe, sync | out);

arch/powerpc/platforms/52xx/mpc52xx_common.c

281

setbits32(&simple_gpio->simple_ddr, sync | out);

arch/powerpc/platforms/52xx/mpc52xx_gpt.c

143

setbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_IRQ_EN);

arch/powerpc/platforms/82xx/km82xx.c

154

setbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 10));

arch/powerpc/platforms/82xx/pq2.c

26

setbits32(&cpm2_immr->im_clkrst.car_rmr, RMR_CSRE);

arch/powerpc/platforms/83xx/km83xx.c

100

setbits32((base + 0xa8), 0x00003000);

arch/powerpc/platforms/83xx/km83xx.c

106

setbits32((base + 0xa8), 0x0c000000);

arch/powerpc/platforms/83xx/km83xx.c

112

setbits32((base + 0xac), 0x0000c000);

arch/powerpc/platforms/85xx/mpc85xx_mds.c

250

setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |

arch/powerpc/platforms/85xx/mpc85xx_pm_ops.c

63

setbits32(&guts->devdisr, mask);

arch/powerpc/platforms/85xx/mpc85xx_rdb.c

82

setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |

arch/powerpc/platforms/85xx/p1022_ds.c

413

setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16));

arch/powerpc/platforms/85xx/p1022_rdk.c

83

setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16));

arch/powerpc/platforms/85xx/t1042rdb_diu.c

117

setbits32(scfg + CCSR_SCFG_PIXCLKCR, PIXCLKCR_PXCKEN | (pxclk << 16));

arch/powerpc/platforms/85xx/twr_p102x.c

76

setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |

arch/powerpc/platforms/8xx/cpm1-ic.c

120

setbits32(&data->reg->cpic_cicr, CICR_IEN);

arch/powerpc/platforms/8xx/cpm1-ic.c

31

setbits32(&data->reg->cpic_cimr, (1 << cpm_vec));

arch/powerpc/platforms/8xx/cpm1.c

169

setbits32(&iop->dir, pin);

arch/powerpc/platforms/8xx/cpm1.c

174

setbits32(&iop->par, pin);

arch/powerpc/platforms/8xx/cpm1.c

187

setbits32(&iop->sor, pin);

arch/powerpc/platforms/8xx/cpm1.c

192

setbits32(&mpc8xx_immr->im_cpm.cp_peodr, pin);

arch/powerpc/platforms/8xx/cpm1.c

583

setbits32(&iop->dir, pin_mask);

arch/powerpc/platforms/8xx/m8xx_setup.c

165

setbits32(&mpc8xx_immr->im_clkrst.car_plprcr, 0x00000080);

arch/powerpc/platforms/8xx/m8xx_setup.c

75

setbits32(&mpc8xx_immr->im_clkrst.car_sccr, 0x02000000);

arch/powerpc/platforms/8xx/mpc885ads_setup.c

151

setbits32(&bcsr[1], BCSR1_RS232EN_2);

arch/powerpc/platforms/8xx/mpc885ads_setup.c

157

setbits32(bcsr5, BCSR5_MII1_RST);

arch/powerpc/platforms/8xx/mpc885ads_setup.c

163

setbits32(bcsr5, BCSR5_MII2_RST);

arch/powerpc/platforms/8xx/mpc885ads_setup.c

167

setbits32(bcsr5, BCSR5_MII2_EN);

arch/powerpc/platforms/8xx/mpc885ads_setup.c

173

setbits32(&bcsr[4], BCSR4_ETH10_RST);

arch/powerpc/platforms/8xx/mpc885ads_setup.c

175

setbits32(&bcsr[1], BCSR1_ETHEN);

arch/powerpc/platforms/embedded6xx/flipper-pic.c

79

setbits32(io_base + FLIPPER_IMR, 1 << irq);

arch/powerpc/platforms/embedded6xx/hlwd-pic.c

73

setbits32(io_base + HW_BROADWAY_IMR, 1 << irq);

arch/powerpc/platforms/embedded6xx/wii.c

121

setbits32(hw_gpio + HW_GPIO_DIR(1), HW_GPIO_SHUTDOWN);

arch/powerpc/platforms/embedded6xx/wii.c

124

setbits32(hw_gpio + HW_GPIO_OUT(1), HW_GPIO_SHUTDOWN);

arch/powerpc/sysdev/cpm2.c

326

setbits32(&iop[port].dir, pin);

arch/powerpc/sysdev/cpm2.c

331

setbits32(&iop[port].par, pin);

arch/powerpc/sysdev/cpm2.c

336

setbits32(&iop[port].sor, pin);

arch/powerpc/sysdev/cpm2.c

341

setbits32(&iop[port].odr, pin);

arch/powerpc/sysdev/cpm_common.c

160

setbits32(&iop->dir, pin_mask);

arch/powerpc/sysdev/fsl_lbc.c

192

setbits32(&lbc->ltesr, LTESR_CLEAR);

arch/powerpc/sysdev/fsl_pci.c

1224

setbits32(&pci->pex_pme_mes_ier,

arch/powerpc/sysdev/fsl_pci.c

1242

setbits32(&pci->pex_pmcr, PEX_PMCR_PTOMR);

arch/powerpc/sysdev/fsl_pci.c

1278

setbits32(&pci->pex_pmcr, PEX_PMCR_EXL2S);

arch/powerpc/sysdev/fsl_pmc.c

36

setbits32(&pmc_regs->pmcsr, PMCSR_SLP);

arch/powerpc/sysdev/fsl_rcpm.c

113

setbits32(&rcpm_v2_regs->tph10setr0, 1 << hw_cpu);

arch/powerpc/sysdev/fsl_rcpm.c

116

setbits32(&rcpm_v2_regs->pcph15setr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

119

setbits32(&rcpm_v2_regs->pcph20setr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

122

setbits32(&rcpm_v2_regs->pcph30setr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

195

setbits32(&rcpm_v2_regs->tph10clrr0, 1 << hw_cpu);

arch/powerpc/sysdev/fsl_rcpm.c

198

setbits32(&rcpm_v2_regs->pcph15clrr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

201

setbits32(&rcpm_v2_regs->pcph20clrr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

204

setbits32(&rcpm_v2_regs->pcph30clrr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

225

setbits32(pmcsr_reg, RCPM_POWMGTCSR_SLP);

arch/powerpc/sysdev/fsl_rcpm.c

252

setbits32(pmcsr_reg, RCPM_POWMGTCSR_P_LPM20_ST);

arch/powerpc/sysdev/fsl_rcpm.c

254

setbits32(pmcsr_reg, RCPM_POWMGTCSR_LPM20_RQ);

arch/powerpc/sysdev/fsl_rcpm.c

292

setbits32(tben_reg, mask);

arch/powerpc/sysdev/fsl_rcpm.c

32

setbits32(&rcpm_v1_regs->cpmimr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

33

setbits32(&rcpm_v1_regs->cpmcimr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

34

setbits32(&rcpm_v1_regs->cpmmcmr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

35

setbits32(&rcpm_v1_regs->cpmnmimr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

43

setbits32(&rcpm_v2_regs->tpmimr0, mask);

arch/powerpc/sysdev/fsl_rcpm.c

44

setbits32(&rcpm_v2_regs->tpmcimr0, mask);

arch/powerpc/sysdev/fsl_rcpm.c

45

setbits32(&rcpm_v2_regs->tpmmcmr0, mask);

arch/powerpc/sysdev/fsl_rcpm.c

46

setbits32(&rcpm_v2_regs->tpmnmimr0, mask);

arch/powerpc/sysdev/fsl_rcpm.c

74

setbits32(&rcpm_v1_regs->ippdexpcr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

82

setbits32(&rcpm_v2_regs->ippdexpcr[0], mask);

arch/powerpc/sysdev/fsl_rcpm.c

94

setbits32(&rcpm_v1_regs->cdozcr, mask);

arch/powerpc/sysdev/fsl_rcpm.c

97

setbits32(&rcpm_v1_regs->cnapcr, mask);

arch/powerpc/sysdev/fsl_rio.c

635

setbits32(priv->regs_win

arch/powerpc/sysdev/fsl_rio.c

638

setbits32(priv->regs_win

arch/powerpc/sysdev/fsl_rmu.c

1013

setbits32(&rmu->msg_regs->imr, RIO_MSG_IMR_MI);

arch/powerpc/sysdev/fsl_rmu.c

354

setbits32(&fsl_dbell->dbell_regs->dmr, DOORBELL_DMR_DI);

arch/powerpc/sysdev/fsl_rmu.c

907

setbits32(&rmu->msg_regs->imr, (get_bitmask_order(entries) - 2) << 12);

arch/powerpc/sysdev/fsl_rmu.c

910

setbits32(&rmu->msg_regs->imr, 0x1);

arch/powerpc/sysdev/mpic_timer.c

152

setbits32(priv->group_tcr, tcr);

arch/powerpc/sysdev/mpic_timer.c

267

setbits32(&priv->regs[handle->num].gtbcr, TIMER_STOP);

arch/powerpc/sysdev/mpic_timer.c

506

setbits32(priv->group_tcr, MPIC_TIMER_TCR_CLKDIV);

arch/powerpc/sysdev/mpic_timer.c

529

setbits32(priv->group_tcr, MPIC_TIMER_TCR_CLKDIV);

drivers/crypto/talitos.c

146

setbits32(priv->chan[ch].reg + TALITOS_CCCR_LO,

drivers/crypto/talitos.c

153

setbits32(priv->chan[ch].reg + TALITOS_CCCR,

drivers/crypto/talitos.c

167

setbits32(priv->chan[ch].reg + TALITOS_CCCR_LO, TALITOS_CCCR_LO_EAE |

drivers/crypto/talitos.c

171

setbits32(priv->chan[ch].reg + TALITOS_CCCR_LO,

drivers/crypto/talitos.c

176

setbits32(priv->chan[ch].reg + TALITOS_CCCR_LO,

drivers/crypto/talitos.c

189

setbits32(priv->reg + TALITOS_MCR, mcr);

drivers/crypto/talitos.c

197

setbits32(priv->reg + TALITOS_MCR, mcr);

drivers/crypto/talitos.c

243

setbits32(priv->reg_deu + TALITOS_EUICR, TALITOS1_DEUICR_KPE);

drivers/crypto/talitos.c

245

setbits32(priv->reg + TALITOS_IMR, TALITOS2_IMR_INIT);

drivers/crypto/talitos.c

246

setbits32(priv->reg + TALITOS_IMR_LO, TALITOS2_IMR_LO_INIT);

drivers/crypto/talitos.c

251

setbits32(priv->reg_mdeu + TALITOS_EUICR_LO,

drivers/crypto/talitos.c

451

setbits32(priv->reg + TALITOS_IMR, ch_done_mask); \

drivers/crypto/talitos.c

452

setbits32(priv->reg + TALITOS_IMR_LO, TALITOS2_IMR_LO_INIT); \

drivers/crypto/talitos.c

645

setbits32(priv->chan[ch].reg + TALITOS_CCCR,

drivers/crypto/talitos.c

647

setbits32(priv->chan[ch].reg + TALITOS_CCCR_LO, 0);

drivers/crypto/talitos.c

698

setbits32(priv->reg + TALITOS_IMR, ch_done_mask); \

drivers/crypto/talitos.c

789

setbits32(priv->reg_rngu + TALITOS_EURCR_LO, TALITOS_RNGURCR_LO_SR);

drivers/crypto/talitos.c

800

setbits32(priv->reg_rngu + TALITOS_EUDSR_LO, 0);

drivers/i2c/busses/i2c-mpc.c

319

setbits32(ctrl, 1 << (24 + idx * 2));

drivers/mtd/nand/raw/fsl_elbc_nand.c

825

setbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS);

drivers/net/ethernet/freescale/fs_enet/mii-fec.c

156

setbits32(&fec->fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);

drivers/net/ethernet/freescale/fs_enet/mii-fec.c

157

setbits32(&fec->fecp->fec_ecntrl, FEC_ECNTRL_PINMUX |

drivers/net/ethernet/freescale/ucc_geth.c

1103

setbits32(upsmr_register, automatic_flow_control_mode);

drivers/net/ethernet/freescale/ucc_geth.c

1124

setbits32(upsmr_register, UCC_GETH_UPSMR_HSE);

drivers/net/ethernet/freescale/ucc_geth.c

1160

setbits32(remoder_register, REMODER_RX_RMON_STATISTICS_ENABLE);

drivers/net/ethernet/freescale/ucc_geth.c

1865

setbits32(&uf_regs->upsmr, UCC_GETH_UPSMR_PRO);

drivers/net/ethernet/freescale/ucc_geth.c

2230

setbits32(&ug_regs->maccfg1, MACCFG1_ENABLE_RX | MACCFG1_ENABLE_TX);

drivers/net/ethernet/freescale/ucc_geth.c

3037

setbits32(ugeth->uccf->p_uccm, UCCE_RX_EVENTS | UCCE_TX_EVENTS);

drivers/net/ethernet/freescale/ucc_geth.c

3301

setbits32(ugeth->uccf->p_uccm, UCC_GETH_UCCE_MPD);

drivers/net/ethernet/freescale/ucc_geth.c

3302

setbits32(&ugeth->ug_regs->maccfg2, MACCFG2_MPE);

drivers/soc/fsl/qe/qe_ports_ic.c

33

setbits32(data->reg + CEPIMR, 1 << (31 - irqd_to_hwirq(d)));

drivers/soc/fsl/qe/qe_ports_ic.c

50

setbits32(data->reg + CEPICR, 1 << (31 - vec));

drivers/spi/spi-mpc512x-psc.c

178

setbits32(&fifo->txcmd,

drivers/tty/serial/cpm_uart.c

428

setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));

drivers/tty/serial/cpm_uart.c

811

setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);

drivers/video/fbdev/fsl-diu-fb.c

1366

setbits32(&data->diu_reg->gamma, 0); /* Force table reload */