drivers/accel/ivpu/ivpu_hw_reg_io.h

63

u32 reg_offset, u32 reg_mask, u32 exp_masked_val, u32 timeout_us,

drivers/accel/ivpu/ivpu_hw_reg_io.h

72

ret = read_poll_timeout(readl, reg_val, (reg_val & reg_mask) == exp_masked_val,

drivers/clk/samsung/clk-pll.c

74

unsigned int reg_mask)

drivers/clk/samsung/clk-pll.c

92

val & reg_mask, 0,

drivers/clk/ux500/clk-sysctrl.c

123

u8 *reg_mask,

drivers/clk/ux500/clk-sysctrl.c

150

clk->reg_mask[0] = reg_mask[0];

drivers/clk/ux500/clk-sysctrl.c

156

clk->reg_mask[i] = reg_mask[i];

drivers/clk/ux500/clk-sysctrl.c

182

u8 reg_mask,

drivers/clk/ux500/clk-sysctrl.c

191

&reg_sel, &reg_mask, &reg_bits, 0, enable_delay_us,

drivers/clk/ux500/clk-sysctrl.c

199

u8 reg_mask,

drivers/clk/ux500/clk-sysctrl.c

209

&reg_sel, &reg_mask, &reg_bits,

drivers/clk/ux500/clk-sysctrl.c

219

u8 *reg_mask,

drivers/clk/ux500/clk-sysctrl.c

224

reg_sel, reg_mask, reg_bits, 0, 0, flags,

drivers/clk/ux500/clk-sysctrl.c

27

u8 reg_mask[SYSCTRL_MAX_NUM_PARENTS];

drivers/clk/ux500/clk-sysctrl.c

40

ret = ab8500_sysctrl_write(clk->reg_sel[0], clk->reg_mask[0],

drivers/clk/ux500/clk-sysctrl.c

53

if (ab8500_sysctrl_clear(clk->reg_sel[0], clk->reg_mask[0]))

drivers/clk/ux500/clk-sysctrl.c

73

clk->reg_mask[old_index]);

drivers/clk/ux500/clk-sysctrl.c

80

clk->reg_mask[index],

drivers/clk/ux500/clk-sysctrl.c

85

clk->reg_mask[old_index],

drivers/clk/ux500/clk.h

72

u8 reg_mask,

drivers/clk/ux500/clk.h

81

u8 reg_mask,

drivers/clk/ux500/clk.h

92

u8 *reg_mask,

drivers/crypto/intel/qat/qat_common/qat_hal.c

1381

unsigned short reg_mask;

drivers/crypto/intel/qat/qat_common/qat_hal.c

1399

reg_mask = (unsigned short)~0x1f;

drivers/crypto/intel/qat/qat_common/qat_hal.c

1401

reg_mask = (unsigned short)~0xf;

drivers/crypto/intel/qat/qat_common/qat_hal.c

1403

if (reg_num & reg_mask)

drivers/gpio/gpio-htc-egpio.c

192

reg, (egpio->cached_values >> shift) & ei->reg_mask);

drivers/gpio/gpio-htc-egpio.c

199

egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);

drivers/gpio/gpio-htc-egpio.c

245

if (!((egpio->is_out >> shift) & ei->reg_mask))

drivers/gpio/gpio-htc-egpio.c

249

(egpio->cached_values >> shift) & ei->reg_mask,

drivers/gpio/gpio-htc-egpio.c

253

& ei->reg_mask, ei, reg);

drivers/gpio/gpio-htc-egpio.c

301

ei->reg_mask = (1 << pdata->reg_width) - 1;

drivers/gpio/gpio-htc-egpio.c

38

int reg_mask;

drivers/gpu/drm/amd/amdgpu/vi.c

1059

u32 reg_mask;

drivers/gpu/drm/amd/amdgpu/vi.c

1065

reg_mask = CG_ECLK_CNTL__ECLK_DIVIDER_MASK;

drivers/gpu/drm/amd/amdgpu/vi.c

1070

reg_mask = CG_ECLK_CNTL__ECLK_DIR_CNTL_EN_MASK | CG_ECLK_CNTL__ECLK_DIVIDER_MASK;

drivers/gpu/drm/amd/amdgpu/vi.c

1089

tmp &= ~reg_mask;

drivers/gpu/drm/imagination/pvr_device.h

626

u32 reg_mask, u64 timeout_usec)

drivers/gpu/drm/imagination/pvr_device.h

631

(value & reg_mask) == reg_value, 0, timeout_usec);

drivers/gpu/drm/imagination/pvr_device.h

649

u64 reg_mask, u64 timeout_usec)

drivers/gpu/drm/imagination/pvr_device.h

654

(value & reg_mask) == reg_value, 0, timeout_usec);

drivers/irqchip/irq-mmp.c

115

r = readl_relaxed(data->reg_mask) | (1 << hwirq);

drivers/irqchip/irq-mmp.c

116

writel_relaxed(r, data->reg_mask);

drivers/irqchip/irq-mmp.c

134

r = readl_relaxed(data->reg_mask) & ~(1 << hwirq);

drivers/irqchip/irq-mmp.c

135

writel_relaxed(r, data->reg_mask);

drivers/irqchip/irq-mmp.c

169

mask = readl_relaxed(data->reg_mask);

drivers/irqchip/irq-mmp.c

388

icu_data[i].reg_mask = mmp_icu_base + reg[2];

drivers/irqchip/irq-mmp.c

43

void __iomem *reg_mask;

drivers/irqchip/irq-mmp.c

86

r = readl_relaxed(data->reg_mask) | (1 << hwirq);

drivers/irqchip/irq-mmp.c

87

writel_relaxed(r, data->reg_mask);

drivers/media/i2c/mt9m111.c

225

unsigned int reg_mask;

drivers/media/i2c/mt9m111.c

258

.reg_mask = MT9M111_RM_PWR_MASK | MT9M111_RM_SKIP2_MASK,

drivers/media/i2c/mt9m111.c

267

.reg_mask = MT9M111_RM_PWR_MASK | MT9M111_RM_SKIP2_MASK,

drivers/media/i2c/mt9m111.c

277

.reg_mask = MT9M111_RM_PWR_MASK | MT9M111_RM_SKIP2_MASK,

drivers/media/i2c/mt9m111.c

939

mt9m111->current_mode->reg_mask);

drivers/memory/stm32-fmc2-ebi.c

1099

.reg_mask = FMC2_CFGR_CCLKEN,

drivers/memory/stm32-fmc2-ebi.c

1107

.reg_mask = FMC2_BCR_MUXEN,

drivers/memory/stm32-fmc2-ebi.c

1120

.reg_mask = FMC2_BCR_WAITPOL,

drivers/memory/stm32-fmc2-ebi.c

1127

.reg_mask = FMC2_BCR_WAITCFG,

drivers/memory/stm32-fmc2-ebi.c

1135

.reg_mask = FMC2_BCR_WAITEN,

drivers/memory/stm32-fmc2-ebi.c

1143

.reg_mask = FMC2_BCR_ASYNCWAIT,

drivers/memory/stm32-fmc2-ebi.c

231

u32 reg_mask;

drivers/memory/stm32-fmc2-ebi.c

505

regmap_update_bits(ebi->regmap, reg, prop->reg_mask,

drivers/memory/stm32-fmc2-ebi.c

506

setup ? prop->reg_mask : 0);

drivers/memory/stm32-fmc2-ebi.c

934

.reg_mask = FMC2_BCR1_CCLKEN,

drivers/memory/stm32-fmc2-ebi.c

942

.reg_mask = FMC2_BCR_MUXEN,

drivers/memory/stm32-fmc2-ebi.c

955

.reg_mask = FMC2_BCR_WAITPOL,

drivers/memory/stm32-fmc2-ebi.c

962

.reg_mask = FMC2_BCR_WAITCFG,

drivers/memory/stm32-fmc2-ebi.c

970

.reg_mask = FMC2_BCR_WAITEN,

drivers/memory/stm32-fmc2-ebi.c

978

.reg_mask = FMC2_BCR_ASYNCWAIT,

drivers/net/dsa/microchip/ksz_common.c

2843

ret = ksz_write8(dev, kirq->reg_mask, kirq->masked);

drivers/net/dsa/microchip/ksz_common.c

2947

girq->reg_mask = REG_SW_PORT_INT_MASK__1;

drivers/net/dsa/microchip/ksz_common.c

2962

pirq->reg_mask = dev->dev_ops->get_port_addr(p, REG_PORT_INT_MASK);

drivers/net/dsa/microchip/ksz_common.h

104

u16 reg_mask;

drivers/net/dsa/microchip/ksz_ptp.c

1062

ret = ksz_write16(dev, kirq->reg_mask, kirq->masked);

drivers/net/dsa/microchip/ksz_ptp.c

1144

ptpirq->reg_mask = ops->get_port_addr(p, REG_PTP_PORT_TX_INT_ENABLE__2);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

569

} reg_mask; /* Register mask (all valid bits) */

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

695

return bnx2x_blocks_parity_data[idx].reg_mask.e1;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

697

return bnx2x_blocks_parity_data[idx].reg_mask.e1h;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

699

return bnx2x_blocks_parity_data[idx].reg_mask.e2;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

701

return bnx2x_blocks_parity_data[idx].reg_mask.e3;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

741

u32 reg_mask = bnx2x_parity_reg_mask(bp, i);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

743

if (reg_mask) {

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

746

if (reg_val & reg_mask)

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

750

reg_val & reg_mask);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

774

u32 reg_mask = bnx2x_parity_reg_mask(bp, i);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

776

if (reg_mask)

drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h

778

bnx2x_blocks_parity_data[i].en_mask & reg_mask);

drivers/net/ethernet/stmicro/stmmac/common.h

613

unsigned int reg_mask; /* MII reg mask */

drivers/net/ethernet/stmicro/stmmac/common.h

653

u32 reg_mask;

drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c

372

mac->mii.reg_mask = 0x000007C0;

drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c

1067

mac->mii.reg_mask = GENMASK(8, 4);

drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c

502

mac->mii.reg_mask = 0x000007C0;

drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c

190

mac->mii.reg_mask = 0x000007C0;

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c

1036

mac->mii.reg_mask = GENMASK(20, 16);

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c

171

value &= ~route_possibilities[packet - 1].reg_mask;

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c

173

route_possibilities[packet - 1].reg_mask;

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

1557

mac->mii.reg_mask = GENMASK(15, 0);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

1600

mac->mii.reg_mask = GENMASK(15, 0);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

172

value &= ~dwxgmac2_route_possibilities[packet - 1].reg_mask;

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c

174

dwxgmac2_route_possibilities[packet - 1].reg_mask;

drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c

238

((gr << mii_regs->reg_shift) & mii_regs->reg_mask) |

drivers/net/ethernet/ti/cpsw_ale.c

772

int untag_mask, int reg_mask, int unreg_mask)

drivers/net/ethernet/ti/cpsw_ale.c

795

reg_mcast_members = (reg_mcast_members & ~port_mask) | reg_mask;

drivers/net/phy/nxp-tja11xx.c

302

u16 reg_mask, reg_val;

drivers/net/phy/nxp-tja11xx.c

315

reg_mask = MII_CFG1_AUTO_OP | MII_CFG1_LED_MODE_MASK |

drivers/net/phy/nxp-tja11xx.c

320

reg_mask |= MII_CFG1_INTERFACE_MODE_MASK;

drivers/net/phy/nxp-tja11xx.c

326

ret = phy_modify(phydev, MII_CFG1, reg_mask, reg_val);

drivers/net/phy/nxp-tja11xx.c

332

reg_mask = MII_CFG1_INTERFACE_MODE_MASK;

drivers/net/phy/nxp-tja11xx.c

338

ret = phy_modify(phydev, MII_CFG1, reg_mask, reg_val);

drivers/net/wireless/marvell/mwifiex/fw.h

2416

struct host_cmd_ds_mgmt_frame_reg reg_mask;

drivers/net/wireless/marvell/mwifiex/sta_cmd.c

2156

cmd_ptr->params.reg_mask.action = cpu_to_le16(cmd_action);

drivers/net/wireless/marvell/mwifiex/sta_cmd.c

2157

cmd_ptr->params.reg_mask.mask = cpu_to_le32(

drivers/net/wireless/realtek/rtw89/phy.c

4834

u32 reg_mask;

drivers/net/wireless/realtek/rtw89/phy.c

4837

reg_mask = xtal->sc_xo_mask;

drivers/net/wireless/realtek/rtw89/phy.c

4839

reg_mask = xtal->sc_xi_mask;

drivers/net/wireless/realtek/rtw89/phy.c

4841

return (u8)rtw89_read32_mask(rtwdev, xtal->xcap_reg, reg_mask);

drivers/net/wireless/realtek/rtw89/phy.c

4848

u32 reg_mask;

drivers/net/wireless/realtek/rtw89/phy.c

4851

reg_mask = xtal->sc_xo_mask;

drivers/net/wireless/realtek/rtw89/phy.c

4853

reg_mask = xtal->sc_xi_mask;

drivers/net/wireless/realtek/rtw89/phy.c

4855

rtw89_write32_mask(rtwdev, xtal->xcap_reg, reg_mask, val);

drivers/pci/controller/dwc/pcie-al.c

126

u8 reg_mask;

drivers/pci/controller/dwc/pcie-al.c

225

unsigned int busnr_reg = busnr & target_bus_cfg->reg_mask;

drivers/pci/controller/dwc/pcie-al.c

233

target_bus_cfg->reg_mask);

drivers/pci/controller/dwc/pcie-al.c

274

target_bus_cfg->reg_mask = ~target_bus_cfg->ecam_mask;

drivers/pci/controller/dwc/pcie-al.c

275

target_bus_cfg->reg_val = bus->start & target_bus_cfg->reg_mask;

drivers/pci/controller/dwc/pcie-al.c

278

target_bus_cfg->reg_mask);

drivers/pci/controller/plda/pcie-microchip-host.c

176

u32 reg_mask;

drivers/pci/controller/plda/pcie-microchip-host.c

324

return (reg & field.reg_mask) ? BIT(field.event_bit) : 0;

drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c

78

static inline int pll_lock_stat(u32 usb_reg, int reg_mask,

drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c

84

val, (val & reg_mask), 1,

drivers/pinctrl/bcm/pinctrl-bcm281xx.c

1567

static inline void bcm281xx_pin_update(u32 *reg_val, u32 *reg_mask,

drivers/pinctrl/bcm/pinctrl-bcm281xx.c

1573

*reg_mask |= param_mask;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

118

.reg_mask = 0, \

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

128

.reg_mask = _mask, \

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

138

.reg_mask = _mask, \

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

148

.reg_mask = _mask, \

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

159

.reg_mask = _mask, \

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

350

unsigned int mask = grp->reg_mask;

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c

64

u32 reg_mask;

drivers/pinctrl/samsung/pinctrl-exynos.c

117

unsigned long reg_mask;

drivers/pinctrl/samsung/pinctrl-exynos.c

133

reg_mask = bank->pctl_offset + bank->eint_mask_offset;

drivers/pinctrl/samsung/pinctrl-exynos.c

135

reg_mask = our_chip->eint_mask + bank->eint_offset;

drivers/pinctrl/samsung/pinctrl-exynos.c

145

mask = readl(bank->eint_base + reg_mask);

drivers/pinctrl/samsung/pinctrl-exynos.c

147

writel(mask, bank->eint_base + reg_mask);

drivers/pinctrl/samsung/pinctrl-exynos.c

63

unsigned long reg_mask;

drivers/pinctrl/samsung/pinctrl-exynos.c

68

reg_mask = bank->pctl_offset + bank->eint_mask_offset;

drivers/pinctrl/samsung/pinctrl-exynos.c

70

reg_mask = our_chip->eint_mask + bank->eint_offset;

drivers/pinctrl/samsung/pinctrl-exynos.c

80

mask = readl(bank->eint_base + reg_mask);

drivers/pinctrl/samsung/pinctrl-exynos.c

82

writel(mask, bank->eint_base + reg_mask);

drivers/pinctrl/ti/pinctrl-ti-iodelay.c

219

u32 reg_mask, reg_val, tmp_val;

drivers/pinctrl/ti/pinctrl-ti-iodelay.c

238

reg_mask = reg->signature_mask;

drivers/pinctrl/ti/pinctrl-ti-iodelay.c

241

reg_mask |= reg->binary_data_coarse_mask;

drivers/pinctrl/ti/pinctrl-ti-iodelay.c

250

reg_mask |= reg->binary_data_fine_mask;

drivers/pinctrl/ti/pinctrl-ti-iodelay.c

265

reg_mask |= reg->lock_mask;

drivers/pinctrl/ti/pinctrl-ti-iodelay.c

267

r = regmap_update_bits(iod->regmap, cfg->offset, reg_mask, reg_val);

drivers/pmdomain/qcom/cpr.c

463

u32 val, error_steps, reg_mask;

drivers/pmdomain/qcom/cpr.c

499

reg_mask = RBCPR_CTL_UP_THRESHOLD_MASK;

drivers/pmdomain/qcom/cpr.c

500

reg_mask <<= RBCPR_CTL_UP_THRESHOLD_SHIFT;

drivers/pmdomain/qcom/cpr.c

501

val = reg_mask;

drivers/pmdomain/qcom/cpr.c

502

cpr_ctl_modify(drv, reg_mask, val);

drivers/pmdomain/qcom/cpr.c

536

reg_mask = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;

drivers/pmdomain/qcom/cpr.c

539

cpr_ctl_modify(drv, reg_mask, val);

drivers/pmdomain/qcom/cpr.c

568

reg_mask = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;

drivers/pmdomain/qcom/cpr.c

572

reg_mask = RBCPR_CTL_UP_THRESHOLD_MASK;

drivers/pmdomain/qcom/cpr.c

573

reg_mask <<= RBCPR_CTL_UP_THRESHOLD_SHIFT;

drivers/pmdomain/qcom/cpr.c

578

cpr_ctl_modify(drv, reg_mask, val);

drivers/power/reset/atc260x-poweroff.c

105

reg_mask = restart ? ATC2609A_PMU_SYS_CTL0_RESTART_EN

drivers/power/reset/atc260x-poweroff.c

111

reg_mask, reg_val);

drivers/power/reset/atc260x-poweroff.c

25

uint reg_mask, reg_val;

drivers/power/reset/atc260x-poweroff.c

44

reg_mask = ATC2603C_PMU_SYS_CTL3_EN_S2 | ATC2603C_PMU_SYS_CTL3_EN_S3;

drivers/power/reset/atc260x-poweroff.c

46

ret = regmap_update_bits(pwrc->regmap, ATC2603C_PMU_SYS_CTL3, reg_mask,

drivers/power/reset/atc260x-poweroff.c

54

reg_mask = restart ? ATC2603C_PMU_SYS_CTL0_RESTART_EN

drivers/power/reset/atc260x-poweroff.c

60

reg_mask, reg_val);

drivers/power/reset/atc260x-poweroff.c

76

uint reg_mask, reg_val;

drivers/power/reset/atc260x-poweroff.c

95

reg_mask = ATC2609A_PMU_SYS_CTL3_EN_S2 | ATC2609A_PMU_SYS_CTL3_EN_S3;

drivers/power/reset/atc260x-poweroff.c

97

ret = regmap_update_bits(pwrc->regmap, ATC2609A_PMU_SYS_CTL3, reg_mask,

drivers/rtc/rtc-isl12022.c

396

unsigned int reg_mask, reg_val;

drivers/rtc/rtc-isl12022.c

409

reg_mask = ISL12022_INT_ARST | ISL12022_INT_IM | ISL12022_INT_FO_MASK;

drivers/rtc/rtc-isl12022.c

412

reg_mask, reg_val);

drivers/soc/mediatek/mtk-mmsys.h

88

#define MMSYS_ROUTE(from, to, reg_addr, reg_mask, selection) \

drivers/soc/mediatek/mtk-mmsys.h

89

{ DDP_COMPONENT_##from, DDP_COMPONENT_##to, reg_addr, reg_mask, \

drivers/soc/mediatek/mtk-mmsys.h

90

(__BUILD_BUG_ON_ZERO_MSG((reg_mask) == 0, "Invalid mask") + \

drivers/soc/mediatek/mtk-mmsys.h

91

__BUILD_BUG_ON_ZERO_MSG(~(reg_mask) & (selection), \

drivers/soc/mediatek/mtk-mmsys.h

93

#reg_mask) + \

drivers/spi/spi-apple.c

152

reg_mask(spi, APPLE_SPI_SHIFTCFG, APPLE_SPI_SHIFTCFG_OVERRIDE_CS, 0);

drivers/spi/spi-apple.c

153

reg_mask(spi, APPLE_SPI_PINCFG, APPLE_SPI_PINCFG_CS_IDLE_VAL, APPLE_SPI_PINCFG_KEEP_CS);

drivers/spi/spi-apple.c

183

reg_mask(spi, APPLE_SPI_CFG,

drivers/spi/spi-apple.c

193

reg_mask(spi, APPLE_SPI_PIN, APPLE_SPI_PIN_CS, is_high ? APPLE_SPI_PIN_CS : 0);

drivers/spi/spi-apple.c

205

reg_mask(spi, APPLE_SPI_SHIFTCFG, APPLE_SPI_SHIFTCFG_BITS,

drivers/tty/serial/8250/8250_aspeed_vuart.c

384

u32 reg_offset, u32 reg_mask)

drivers/tty/serial/8250/8250_aspeed_vuart.c

400

aspeed_vuart_set_sirq_polarity(vuart, (value & reg_mask) == 0);

drivers/usb/serial/f81534.c

1343

pins->pin[i].reg_addr, pins->pin[i].reg_mask,

drivers/usb/serial/f81534.c

1344

value & BIT(i) ? pins->pin[i].reg_mask : 0);

drivers/usb/serial/f81534.c

174

const u8 reg_mask;

drivers/video/fbdev/via/hw.c

968

int reg_mask;

drivers/video/fbdev/via/hw.c

977

reg_mask = 0;

drivers/video/fbdev/via/hw.c

986

reg_mask = reg_mask | (BIT0 << j);

drivers/video/fbdev/via/hw.c

993

viafb_write_reg_mask(cr_index, VIACR, data, reg_mask);

drivers/video/fbdev/via/hw.c

995

viafb_write_reg_mask(cr_index, VIASR, data, reg_mask);

include/sound/pcm_oss.h

72

unsigned int reg_mask;

kernel/bpf/verifier.c

4307

static void fmt_reg_mask(char *buf, ssize_t buf_sz, u32 reg_mask)

kernel/bpf/verifier.c

4315

bitmap_from_u64(mask, reg_mask);

sound/core/oss/pcm_oss.c

3145

pcm->oss.reg_mask |= 1;

sound/core/oss/pcm_oss.c

3150

pcm->oss.reg_mask |= 2;

sound/core/oss/pcm_oss.c

3162

if (pcm->oss.reg_mask & 1) {

sound/core/oss/pcm_oss.c

3163

pcm->oss.reg_mask &= ~1;

sound/core/oss/pcm_oss.c

3167

if (pcm->oss.reg_mask & 2) {

sound/core/oss/pcm_oss.c

3168

pcm->oss.reg_mask &= ~2;

tools/lib/bpf/gen_loader.c

884

__u32 reg_mask;

tools/lib/bpf/gen_loader.c

923

reg_mask = src_reg_mask(gen);

tools/lib/bpf/gen_loader.c

925

emit(gen, BPF_ALU32_IMM(BPF_AND, BPF_REG_9, reg_mask));

tools/perf/util/parse-regs-options.c

100

*mode |= reg_mask;

tools/perf/util/parse-regs-options.c

34

uint64_t reg_mask = 0;

tools/perf/util/parse-regs-options.c

47

reg_mask |= 1ULL << reg;

tools/perf/util/parse-regs-options.c

49

return reg_mask;

tools/perf/util/parse-regs-options.c

83

uint64_t reg_mask;

tools/perf/util/parse-regs-options.c

94

reg_mask = name_to_perf_reg_mask(s, mask);

tools/perf/util/parse-regs-options.c

95

if (reg_mask == 0) {