reg_config
struct regmap_config reg_config = sprdclk_regmap_config;
reg_config.max_register = resource_size(res) - reg_config.reg_stride;
®_config);
void __iomem *reg_config;
ch->reg_config = ch->base + FTDMAC020_CH_CFG;
ch->reg_config = ch->base + vd->config_offset;
val = readl(ch->reg_config);
val = readl(ch->reg_config);
writel(ccfg, phychan->reg_config);
val = readl(phychan->reg_config);
val = readl(phychan->reg_config);
val = readl(phychan->reg_config);
val = readl(phychan->reg_config);
writel(val | PL080_CONFIG_ENABLE, phychan->reg_config);
val = readl(ch->reg_config);
writel(val, ch->reg_config);
val = readl(ch->reg_config);
writel(val, ch->reg_config);
val = readl(ch->reg_config);
writel(val, ch->reg_config);
val = readl(ch->reg_config);
writel(val, ch->reg_config);
const struct regmap_config *reg_config;
reg_config = &hdmi_regmap_32bit_config;
reg_config = &hdmi_regmap_8bit_config;
hdmi->regm = devm_regmap_init_mmio(dev, hdmi->regs, reg_config);
struct rogue_fwif_reg_cfg_rec reg_config __aligned(8);
u32 reg_config;
(ina->reg_config & INA3221_CONFIG_CHx_EN(channel));
wait = ina3221_reg_to_interval_us(ina->reg_config);
regval = INA3221_CONFIG_AVG(ina->reg_config);
*val = ina3221_reg_to_interval_us(ina->reg_config);
ina->reg_config);
ina->reg_config);
tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) |
ina->reg_config = tmp;
tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val);
tmp = (ina->reg_config & ~tmp) |
ina->reg_config = tmp;
u16 config_old = ina->reg_config & mask;
tmp = (ina->reg_config & ~mask) | (config & mask);
ina->reg_config = tmp;
ina->reg_config = INA3221_CONFIG_DEFAULT;
ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS;
ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i);
ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);
ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config);
u32 reg_config;
.reg_config = (_reg_conf), \
sample_rate |= adc_analogure_clk.reg_config;
u32 reg_config;
if (st->reg_config & AXI_DAC_CONFIG_DDS_DISABLE)
if (st->reg_config & AXI_DAC_CONFIG_DDS_DISABLE)
ret = regmap_read(st->regmap, AXI_DAC_CONFIG_REG, &st->reg_config);
const struct reg_config *rcfg = shdw->rcfg;
const struct reg_config *rcfg = shdw->rcfg;
static const struct reg_config sama5d2_reg_config = {
static const struct reg_config sam9x60_reg_config = {
static const struct reg_config sama7g5_reg_config = {
const struct reg_config *rcfg;
struct as3722_regulator_config_data *reg_config;
reg_config = &as3722_regs->reg_config_data[id];
reg_config->reg_init = as3722_regulator_matches[id].init_data;
if (!reg_config->reg_init || !reg_node)
reg_config->ext_control = prop;
reg_config->enable_tracking =
struct as3722_regulator_config_data *reg_config;
reg_config = &as3722_regs->reg_config_data[id];
if (reg_config->ext_control)
if (reg_config->ext_control)
if (reg_config->enable_tracking) {
if (reg_config->ext_control)
if (reg_config->ext_control)
if (reg_config->ext_control)
if (reg_config->ext_control)
config.init_data = reg_config->reg_init;
if (reg_config->ext_control) {
reg_config->ext_control);
struct regulator_config reg_config = {};
reg_config.dev = dev;
reg_config.init_data = init_data;
reg_config.of_node = node;
reg_config.driver_data = vreg;
rdev = devm_regulator_register(dev, &vreg->rdesc, ®_config);
struct tps65086_regulator *regulators = tps->reg_config->config;
tps->reg_config = ®ulator_configs[selector_reg_config];
for (i = 0; i < tps->reg_config->num_elems; ++i) {
struct regulator_desc * const desc_ptr = &tps->reg_config->config[i].desc;
const struct regmap_config reg_config = {
.max_register = (resource_size(res) - reg_config.reg_stride),
return devm_regmap_init_mmio_clk(&pdev->dev, "pclk", base, ®_config);
struct knav_reg_config __iomem *reg_config;
writel_relaxed((u32)block->dma, &qmgr->reg_config->link_ram_base0);
&qmgr->reg_config->link_ram_size0);
&qmgr->reg_config->link_ram_size0);
writel_relaxed(block->dma, &qmgr->reg_config->link_ram_base1);
qmgr->reg_config =
IS_ERR(qmgr->reg_config) || IS_ERR(qmgr->reg_region) ||
if (!IS_ERR(qmgr->reg_config))
devm_iounmap(dev, qmgr->reg_config);
qmgr->reg_config, qmgr->reg_region,
u8 reg_config;
const struct tps65086_regulator_config *reg_config;
struct regmap_config *reg_config __free(kfree) = kmemdup(&rx_regmap_config,
sizeof(*reg_config),
if (!reg_config)
reg_config->reg_defaults = reg_defaults;
reg_config->num_reg_defaults = def_count;
rx->regmap = devm_regmap_init_mmio(dev, base, reg_config);
struct regmap_config *reg_config __free(kfree) = kmemdup(&wsa_regmap_config,
sizeof(*reg_config),
if (!reg_config)
reg_config->reg_defaults = reg_defaults;
reg_config->num_reg_defaults = def_count;
wsa->regmap = devm_regmap_init_mmio(dev, base, reg_config);