drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

235

data = RREG32_SOC15(VCN, 0, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

237

WREG32_SOC15(VCN, 0, regVCN_RB_ENABLE, data);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

250

data = RREG32_SOC15(VCN, 0, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/umsch_mm_v4_0.c

252

WREG32_SOC15(VCN, 0, regVCN_RB_ENABLE, data);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1100

tmp = RREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1102

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1111

tmp = RREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1113

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1290

tmp = RREG32_SOC15(VCN, i, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1292

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1301

tmp = RREG32_SOC15(VCN, i, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c

1303

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1335

tmp = RREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1337

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1343

tmp = RREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

1345

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

968

tmp = RREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

970

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

978

tmp = RREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

980

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1013

tmp = RREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1015

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1024

tmp = RREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1026

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1203

tmp = RREG32_SOC15(VCN, i, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1205

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1214

tmp = RREG32_SOC15(VCN, i, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1216

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c

1221

RREG32_SOC15(VCN, i, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

770

tmp = RREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

772

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

781

tmp = RREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

783

WREG32_SOC15(VCN, inst_idx, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

931

tmp = RREG32_SOC15(VCN, i, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

933

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

942

tmp = RREG32_SOC15(VCN, i, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c

944

WREG32_SOC15(VCN, i, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1101

tmp = RREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1103

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1112

tmp = RREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

1114

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

756

tmp = RREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

758

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

767

tmp = RREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE);

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c

769

WREG32_SOC15(VCN, vcn_inst, regVCN_RB_ENABLE, tmp);