Symbol: read_sysreg_s
arch/arm64/include/asm/arch_gicv3.h
114
return read_sysreg_s(SYS_ICC_SRE_EL1);
arch/arm64/include/asm/arch_gicv3.h
130
return read_sysreg_s(SYS_ICC_PMR_EL1);
arch/arm64/include/asm/arch_gicv3.h
140
return read_sysreg_s(SYS_ICC_RPR_EL1);
arch/arm64/include/asm/arch_gicv3.h
19
#define read_gicreg(r) read_sysreg_s(SYS_ ## r)
arch/arm64/include/asm/arch_gicv3.h
39
irqstat = read_sysreg_s(SYS_ICC_IAR1_EL1);
arch/arm64/include/asm/arch_gicv3.h
69
apr = read_sysreg_s(SYS_ICC_AP1R0_EL1);
arch/arm64/include/asm/arch_gicv3.h
71
irqstat = read_sysreg_s(SYS_ICC_IAR1_EL1);
arch/arm64/include/asm/arch_gicv3.h
76
if (likely(apr != read_sysreg_s(SYS_ICC_AP1R0_EL1)))
arch/arm64/include/asm/arch_gicv3.h
98
return read_sysreg_s(SYS_ICC_CTLR_EL1);
arch/arm64/include/asm/archrandom.h
128
unsigned long ftr = read_sysreg_s(SYS_ID_AA64ISAR0_EL1);
arch/arm64/include/asm/arm_dsu_pmu.h
119
return read_sysreg_s(CLUSTERPMCEID0_EL1);
arch/arm64/include/asm/arm_dsu_pmu.h
121
return read_sysreg_s(CLUSTERPMCEID1_EL1);
arch/arm64/include/asm/arm_dsu_pmu.h
35
return read_sysreg_s(CLUSTERPMCR_EL1);
arch/arm64/include/asm/arm_dsu_pmu.h
46
u32 val = read_sysreg_s(CLUSTERPMOVSCLR_EL1);
arch/arm64/include/asm/arm_dsu_pmu.h
62
return read_sysreg_s(CLUSTERPMXEVCNTR_EL1);
arch/arm64/include/asm/arm_dsu_pmu.h
81
return read_sysreg_s(CLUSTERPMCCNTR_EL1);
arch/arm64/include/asm/arm_pmuv3.h
137
return read_sysreg_s(SYS_PMICFILTR_EL0);
arch/arm64/include/asm/arm_pmuv3.h
97
return read_sysreg_s(SYS_PMICNTR_EL0);
arch/arm64/include/asm/cpufeature.h
1056
mmfr2 = read_sysreg_s(SYS_ID_AA64MMFR2_EL1);
arch/arm64/include/asm/cpufeature.h
651
pfr0 = read_sysreg_s(SYS_ID_AA64PFR0_EL1);
arch/arm64/include/asm/cpufeature.h
665
isar2 = read_sysreg_s(SYS_ID_AA64ISAR2_EL1);
arch/arm64/include/asm/cputype.h
256
#define read_cpuid(reg) read_sysreg_s(SYS_ ## reg)
arch/arm64/include/asm/daifflags.h
25
(read_sysreg_s(SYS_ICC_PMR_EL1) == (GIC_PRIO_IRQOFF |
arch/arm64/include/asm/daifflags.h
49
if (read_sysreg_s(SYS_ICC_PMR_EL1) != GIC_PRIO_IRQON)
arch/arm64/include/asm/fpsimd.h
224
u64 __zcr = read_sysreg_s((reg)); \
arch/arm64/include/asm/fpsimd.h
251
tmp = read_sysreg_s(SYS_ZCR_EL1) & ~ZCR_ELx_LEN_MASK;
arch/arm64/include/asm/fpsimd.h
257
tmp = read_sysreg_s(SYS_SMCR_EL1) & ~SMCR_ELx_LEN_MASK;
arch/arm64/include/asm/gcs.h
121
u64 gcspr = read_sysreg_s(SYS_GCSPR_EL0);
arch/arm64/include/asm/gcs.h
150
u64 gcspr = read_sysreg_s(SYS_GCSPR_EL0);
arch/arm64/include/asm/irqflags.h
33
u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
arch/arm64/include/asm/irqflags.h
62
u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
arch/arm64/include/asm/irqflags.h
87
return read_sysreg_s(SYS_ICC_PMR_EL1);
arch/arm64/include/asm/kvm_hyp.h
27
#define read_sysreg_el0(r) read_sysreg_s(r##_EL02)
arch/arm64/include/asm/kvm_hyp.h
29
#define read_sysreg_el1(r) read_sysreg_s(r##_EL12)
arch/arm64/include/asm/kvm_hyp.h
31
#define read_sysreg_el2(r) read_sysreg_s(r##_EL1)
arch/arm64/include/asm/kvm_ptrauth.h
108
__val = read_sysreg_s(SYS_ ## key ## KEYLO_EL1); \
arch/arm64/include/asm/kvm_ptrauth.h
110
__val = read_sysreg_s(SYS_ ## key ## KEYHI_EL1); \
arch/arm64/include/asm/mmu.h
100
u64 mmfr2 = read_sysreg_s(SYS_ID_AA64MMFR2_EL1);
arch/arm64/include/asm/pgtable.h
208
por = read_sysreg_s(SYS_POR_EL0);
arch/arm64/include/asm/sysreg.h
1101
#define gicr_insn(insn) read_sysreg_s(GICV5_OP_GICR_##insn)
arch/arm64/include/asm/sysreg.h
1227
u64 __scs_val = read_sysreg_s(sysreg); \
arch/arm64/kernel/cpufeature.c
1518
case r: val = read_sysreg_s(r); break;
arch/arm64/kernel/cpufeature.c
2358
res.a1 = read_sysreg_s(SYS_ICH_VTR_EL2);
arch/arm64/kernel/cpufeature.c
2498
return (read_sysreg_s(SYS_MPAM1_EL1) & MPAM1_EL1_MPAMEN);
arch/arm64/kernel/cpufeature.c
2527
return !!(read_sysreg_s(SYS_ICC_IDR0_EL1) & ICC_IDR0_EL1_GCIE_LEGACY);
arch/arm64/kernel/cpufeature.c
3408
mvfr1 = read_sysreg_s(SYS_MVFR1_EL1);
arch/arm64/kernel/fpsimd.c
1199
write_sysreg_s(read_sysreg_s(SYS_SMPRI_EL1) & ~SMPRI_EL1_PRIORITY_MASK,
arch/arm64/kernel/fpsimd.c
1220
write_sysreg_s(read_sysreg_s(SYS_SMCR_EL1) | SMCR_ELx_EZT0_MASK,
arch/arm64/kernel/fpsimd.c
1230
write_sysreg_s(read_sysreg_s(SYS_SMCR_EL1) | SMCR_ELx_FA64_MASK,
arch/arm64/kernel/fpsimd.c
457
*(last->fpmr) = read_sysreg_s(SYS_FPMR);
arch/arm64/kernel/fpsimd.c
478
*svcr = read_sysreg_s(SYS_SVCR);
arch/arm64/kernel/fpsimd.c
728
write_sysreg_s(read_sysreg_s(SYS_SCTLR_EL1) | SCTLR_EL1_EnFPM_MASK,
arch/arm64/kernel/mte.c
183
u64 tfsr_el1 = read_sysreg_s(SYS_TFSR_EL1);
arch/arm64/kernel/probes/uprobes.c
167
gcspr = read_sysreg_s(SYS_GCSPR_EL0);
arch/arm64/kernel/process.c
443
p->thread.por_el0 = read_sysreg_s(SYS_POR_EL0);
arch/arm64/kernel/process.c
470
p->thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);
arch/arm64/kernel/process.c
525
current->thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);
arch/arm64/kernel/process.c
583
current->thread.gcspr_el0 = read_sysreg_s(SYS_GCSPR_EL0);
arch/arm64/kernel/process.c
673
current->thread.por_el0 = read_sysreg_s(SYS_POR_EL0);
arch/arm64/kernel/proton-pack.c
963
mmfr1 = read_sysreg_s(SYS_ID_AA64MMFR1_EL1);
arch/arm64/kernel/ptrace.c
1488
current->thread.por_el0 = read_sysreg_s(SYS_POR_EL0);
arch/arm64/kernel/signal.c
1054
gcspr_el0 = read_sysreg_s(SYS_GCSPR_EL0);
arch/arm64/kernel/signal.c
1417
gcspr_el0 = read_sysreg_s(SYS_GCSPR_EL0);
arch/arm64/kernel/signal.c
508
u64 tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);
arch/arm64/kernel/signal.c
682
u64 gcspr = read_sysreg_s(SYS_GCSPR_EL0);
arch/arm64/kernel/signal.c
97
ua_state->por_el0 = read_sysreg_s(SYS_POR_EL0);
arch/arm64/kernel/topology.c
29
#define read_corecnt() read_sysreg_s(SYS_AMEVCNTR0_CORE_EL0)
arch/arm64/kernel/topology.c
30
#define read_constcnt() read_sysreg_s(SYS_AMEVCNTR0_CONST_EL0)
arch/arm64/kvm/at.c
585
config->por_el0 = read_sysreg_s(SYS_POR_EL0);
arch/arm64/kvm/at.c
626
host_pan = read_sysreg_s(SYS_PSTATE_PAN);
arch/arm64/kvm/config.c
291
(read_sysreg_s(SYS_SMIDR_EL1) & SMIDR_EL1_SMPS));
arch/arm64/kvm/config.c
301
(read_sysreg_s(SYS_PMSIDR_EL1) & PMSIDR_EL1_FDS));
arch/arm64/kvm/config.c
312
(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_EL1_MPAM));
arch/arm64/kvm/debug.c
102
!(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_EL1_P))
arch/arm64/kvm/debug.c
21
!(read_sysreg_s(SYS_PMBIDR_EL1) & PMBIDR_EL1_P);
arch/arm64/kvm/debug.c
285
if (read_sysreg_s(SYS_TRFCR_EL1) != trfcr_while_in_guest)
arch/arm64/kvm/fpsimd.c
42
WARN_ON_ONCE(system_supports_sme() && read_sysreg_s(SYS_SVCR));
arch/arm64/kvm/hyp/include/hyp/switch.h
198
u64 pfr0 = read_sysreg_s(SYS_ID_AA64PFR0_EL1);
arch/arm64/kvm/hyp/include/hyp/switch.h
206
ctxt_sys_reg(hctxt, reg) = read_sysreg_s(SYS_ ## reg); \
arch/arm64/kvm/hyp/include/hyp/switch.h
326
ctxt_sys_reg(hctxt, HCRX_EL2) = read_sysreg_s(SYS_HCRX_EL2);
arch/arm64/kvm/hyp/include/hyp/switch.h
538
*host_data_ptr(fpmr) = read_sysreg_s(SYS_FPMR);
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
166
ctxt_sys_reg(ctxt, TFSRE0_EL1) = read_sysreg_s(SYS_TFSRE0_EL1);
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
191
ctxt_sys_reg(ctxt, DISR_EL1) = read_sysreg_s(SYS_VDISR_EL2);
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
193
ctxt_sys_reg(ctxt, VDISR_EL2) = read_sysreg_s(SYS_VDISR_EL2);
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h
63
ctxt_sys_reg(ctxt, POR_EL0) = read_sysreg_s(SYS_POR_EL0);
arch/arm64/kvm/hyp/nvhe/debug-sr.c
29
reg = read_sysreg_s(SYS_PMBLIMITR_EL1);
arch/arm64/kvm/hyp/nvhe/debug-sr.c
63
return read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_EL1_E;
arch/arm64/kvm/hyp/nvhe/hyp-main.c
215
if (unlikely(system_supports_sme() && read_sysreg_s(SYS_SVCR))) {
arch/arm64/kvm/hyp/nvhe/hyp-main.c
85
__vcpu_assign_sys_reg(vcpu, FPMR, read_sysreg_s(SYS_FPMR));
arch/arm64/kvm/hyp/vhe/switch.c
169
offset = read_sysreg_s(SYS_CNTPOFF_EL2);
arch/arm64/kvm/hyp/vhe/switch.c
514
iss = ESR_ELx_ISS(read_sysreg_s(SYS_AFSR1_EL2));
arch/arm64/kvm/pauth.c
44
gkey.lo = read_sysreg_s(SYS_APGAKEYLO_EL1);
arch/arm64/kvm/pauth.c
45
gkey.hi = read_sysreg_s(SYS_APGAKEYHI_EL1);
arch/arm64/kvm/sys_regs.c
223
case SCTLR_EL1: val = read_sysreg_s(SYS_SCTLR_EL12); break;
arch/arm64/kvm/sys_regs.c
224
case CPACR_EL1: val = read_sysreg_s(SYS_CPACR_EL12); break;
arch/arm64/kvm/sys_regs.c
225
case TTBR0_EL1: val = read_sysreg_s(SYS_TTBR0_EL12); break;
arch/arm64/kvm/sys_regs.c
226
case TTBR1_EL1: val = read_sysreg_s(SYS_TTBR1_EL12); break;
arch/arm64/kvm/sys_regs.c
227
case TCR_EL1: val = read_sysreg_s(SYS_TCR_EL12); break;
arch/arm64/kvm/sys_regs.c
228
case TCR2_EL1: val = read_sysreg_s(SYS_TCR2_EL12); break;
arch/arm64/kvm/sys_regs.c
229
case PIR_EL1: val = read_sysreg_s(SYS_PIR_EL12); break;
arch/arm64/kvm/sys_regs.c
230
case PIRE0_EL1: val = read_sysreg_s(SYS_PIRE0_EL12); break;
arch/arm64/kvm/sys_regs.c
231
case POR_EL1: val = read_sysreg_s(SYS_POR_EL12); break;
arch/arm64/kvm/sys_regs.c
232
case ESR_EL1: val = read_sysreg_s(SYS_ESR_EL12); break;
arch/arm64/kvm/sys_regs.c
233
case AFSR0_EL1: val = read_sysreg_s(SYS_AFSR0_EL12); break;
arch/arm64/kvm/sys_regs.c
234
case AFSR1_EL1: val = read_sysreg_s(SYS_AFSR1_EL12); break;
arch/arm64/kvm/sys_regs.c
235
case FAR_EL1: val = read_sysreg_s(SYS_FAR_EL12); break;
arch/arm64/kvm/sys_regs.c
236
case MAIR_EL1: val = read_sysreg_s(SYS_MAIR_EL12); break;
arch/arm64/kvm/sys_regs.c
237
case VBAR_EL1: val = read_sysreg_s(SYS_VBAR_EL12); break;
arch/arm64/kvm/sys_regs.c
238
case CONTEXTIDR_EL1: val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break;
arch/arm64/kvm/sys_regs.c
239
case AMAIR_EL1: val = read_sysreg_s(SYS_AMAIR_EL12); break;
arch/arm64/kvm/sys_regs.c
240
case CNTKCTL_EL1: val = read_sysreg_s(SYS_CNTKCTL_EL12); break;
arch/arm64/kvm/sys_regs.c
241
case ELR_EL1: val = read_sysreg_s(SYS_ELR_EL12); break;
arch/arm64/kvm/sys_regs.c
242
case SPSR_EL1: val = read_sysreg_s(SYS_SPSR_EL12); break;
arch/arm64/kvm/sys_regs.c
243
case ZCR_EL1: val = read_sysreg_s(SYS_ZCR_EL12); break;
arch/arm64/kvm/sys_regs.c
244
case SCTLR2_EL1: val = read_sysreg_s(SYS_SCTLR2_EL12); break;
arch/arm64/kvm/sys_regs.c
245
case TPIDR_EL0: val = read_sysreg_s(SYS_TPIDR_EL0); break;
arch/arm64/kvm/sys_regs.c
246
case TPIDRRO_EL0: val = read_sysreg_s(SYS_TPIDRRO_EL0); break;
arch/arm64/kvm/sys_regs.c
247
case TPIDR_EL1: val = read_sysreg_s(SYS_TPIDR_EL1); break;
arch/arm64/kvm/sys_regs.c
249
case DACR32_EL2: val = read_sysreg_s(SYS_DACR32_EL2); break;
arch/arm64/kvm/sys_regs.c
250
case IFSR32_EL2: val = read_sysreg_s(SYS_IFSR32_EL2); break;
arch/arm64/kvm/sys_regs.c
251
case DBGVCR32_EL2: val = read_sysreg_s(SYS_DBGVCR32_EL2); break;
arch/arm64/kvm/vgic/vgic-v3-nested.c
313
__vcpu_assign_sys_reg(vcpu, ICH_VMCR_EL2, read_sysreg_s(SYS_ICH_VMCR_EL2));
arch/arm64/kvm/vgic/vgic-v3-nested.c
315
__vcpu_rmw_sys_reg(vcpu, ICH_HCR_EL2, |=, read_sysreg_s(SYS_ICH_HCR_EL2) & ICH_HCR_EL2_EOIcount);
arch/arm64/kvm/vgic/vgic-v3-nested.c
391
bool state = read_sysreg_s(SYS_ICH_MISR_EL2);
arch/arm64/kvm/vgic/vgic-v3.c
832
(read_sysreg_s(SYS_ICH_VTR_EL2) & ICH_VTR_EL2_SEIS));
arch/arm64/mm/gcs.c
53
tsk->thread.gcspr_el0 = read_sysreg_s(SYS_GCSPR_EL0);
arch/arm64/mm/mmu.c
2240
old_por = read_sysreg_s(SYS_POR_EL0);
drivers/edac/a72_edac.c
106
mesr->cpu_mesr = read_sysreg_s(SYS_CPUMERRSR_EL1);
drivers/edac/a72_edac.c
111
mesr->l2_mesr = read_sysreg_s(SYS_L2MERRSR_EL1);
drivers/hwtracing/coresight/coresight-etm4x-core.c
1218
u64 dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1);
drivers/hwtracing/coresight/coresight-etm4x-core.c
345
val = read_sysreg_s(HISI_HIP08_CORE_COMMIT_REG);
drivers/hwtracing/coresight/coresight-etm4x.h
287
read_sysreg_s(ETM4x_REG_NUM_TO_SYSREG((reg)))
drivers/hwtracing/coresight/coresight-self-hosted-trace.h
15
return read_sysreg_s(SYS_TRFCR_EL1);
drivers/hwtracing/coresight/coresight-trbe.c
1057
u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1);
drivers/hwtracing/coresight/coresight-trbe.c
1139
status = read_sysreg_s(SYS_TRBSR_EL1);
drivers/hwtracing/coresight/coresight-trbe.c
1321
trbidr = read_sysreg_s(SYS_TRBIDR_EL1);
drivers/hwtracing/coresight/coresight-trbe.c
237
u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1);
drivers/hwtracing/coresight/coresight-trbe.c
588
u64 trbsr = read_sysreg_s(SYS_TRBSR_EL1);
drivers/hwtracing/coresight/coresight-trbe.c
602
u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1);
drivers/hwtracing/coresight/coresight-trbe.c
838
status = read_sysreg_s(SYS_TRBSR_EL1);
drivers/hwtracing/coresight/coresight-trbe.h
106
return read_sysreg_s(SYS_TRBPTR_EL1);
drivers/hwtracing/coresight/coresight-trbe.h
117
u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1);
drivers/hwtracing/coresight/coresight-trbe.h
126
u64 trbbaser = read_sysreg_s(SYS_TRBBASER_EL1);
drivers/hwtracing/coresight/coresight-trbe.h
24
u64 aa64dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1);
drivers/hwtracing/coresight/coresight-trbe.h
33
u64 trblimitr = read_sysreg_s(SYS_TRBLIMITR_EL1);
drivers/hwtracing/coresight/coresight-trbe.h
58
u64 trbsr = read_sysreg_s(SYS_TRBSR_EL1);
drivers/irqchip/irq-apple-aic.c
412
(read_sysreg_s(SYS_ICH_HCR_EL2) & ICH_HCR_EL2_En) &&
drivers/irqchip/irq-apple-aic.c
413
read_sysreg_s(SYS_ICH_MISR_EL2) != 0) {
drivers/irqchip/irq-apple-aic.c
419
if (unlikely((read_sysreg_s(SYS_ICH_HCR_EL2) & ICH_HCR_EL2_En) &&
drivers/irqchip/irq-apple-aic.c
420
(val = read_sysreg_s(SYS_ICH_MISR_EL2)))) {
drivers/irqchip/irq-apple-aic.c
558
(read_sysreg_s(SYS_IMP_APL_IPI_SR_EL1) & IPI_SR_PENDING))
drivers/irqchip/irq-apple-aic.c
570
uint64_t enabled = read_sysreg_s(SYS_IMP_APL_VM_TMR_FIQ_ENA_EL2);
drivers/irqchip/irq-apple-aic.c
573
TIMER_FIRING(read_sysreg_s(SYS_CNTP_CTL_EL02)))
drivers/irqchip/irq-apple-aic.c
578
TIMER_FIRING(read_sysreg_s(SYS_CNTV_CTL_EL02)))
drivers/irqchip/irq-apple-aic.c
583
if ((read_sysreg_s(SYS_IMP_APL_PMCR0_EL1) & (PMCR0_IMODE | PMCR0_IACT)) ==
drivers/irqchip/irq-apple-aic.c
589
(FIELD_GET(UPMCR0_IMODE, read_sysreg_s(SYS_IMP_APL_UPMCR0_EL1)) == UPMCR0_IMODE_FIQ) &&
drivers/irqchip/irq-apple-aic.c
590
(read_sysreg_s(SYS_IMP_APL_UPMSR_EL1) & UPMSR_IACT)) {
drivers/irqchip/irq-gic-v5.c
1065
u64 icc_idr0 = read_sysreg_s(SYS_ICC_IDR0_EL1);
drivers/irqchip/irq-gic-v5.c
1083
u32 icc_idr0 = read_sysreg_s(SYS_ICC_IDR0_EL1);
drivers/irqchip/irq-gic-v5.c
300
return irq < 64 ? read_sysreg_s(SYS_ICC_PPI_SPENDR0_EL1) :
drivers/irqchip/irq-gic-v5.c
301
read_sysreg_s(SYS_ICC_PPI_SPENDR1_EL1);
drivers/irqchip/irq-gic-v5.c
303
return irq < 64 ? read_sysreg_s(SYS_ICC_PPI_SACTIVER0_EL1) :
drivers/irqchip/irq-gic-v5.c
304
read_sysreg_s(SYS_ICC_PPI_SACTIVER1_EL1);
drivers/irqchip/irq-gic-v5.c
306
return irq < 64 ? read_sysreg_s(SYS_ICC_PPI_HMR0_EL1) :
drivers/irqchip/irq-gic-v5.c
307
read_sysreg_s(SYS_ICC_PPI_HMR1_EL1);
drivers/irqchip/irq-gic-v5.c
379
icsr = read_sysreg_s(SYS_ICC_ICSR_EL1);
drivers/perf/apple_m1_cpu_pmu.c
229
case _idx: return read_sysreg_s(SYS_IMP_APL_PMC## _idx ##_EL1)
drivers/perf/apple_m1_cpu_pmu.c
289
val = read_sysreg_s(SYS_IMP_APL_PMCR0_EL1);
drivers/perf/apple_m1_cpu_pmu.c
324
val = read_sysreg_s(SYS_IMP_APL_PMCR0_EL1);
drivers/perf/apple_m1_cpu_pmu.c
451
overflow = read_sysreg_s(SYS_IMP_APL_PMSR_EL1);
drivers/perf/apple_m1_cpu_pmu.c
454
state = read_sysreg_s(SYS_IMP_APL_PMCR0_EL1);
drivers/perf/apple_m1_cpu_pmu.c
529
val = read_sysreg_s(SYS_IMP_APL_PMCR0_EL1);
drivers/perf/arm_brbe.c
121
return read_sysreg_s(SYS_BRBSRC_EL1(n))
drivers/perf/arm_brbe.c
129
return read_sysreg_s(SYS_BRBTGT_EL1(n))
drivers/perf/arm_brbe.c
137
return read_sysreg_s(SYS_BRBINF_EL1(n))
drivers/perf/arm_brbe.c
263
brbfcr = read_sysreg_s(SYS_BRBFCR_EL1);
drivers/perf/arm_brbe.c
477
u64 brbidr, aa64dfr0 = read_sysreg_s(SYS_ID_AA64DFR0_EL1);
drivers/perf/arm_brbe.c
484
brbidr = read_sysreg_s(SYS_BRBIDR0_EL1);
drivers/perf/arm_spe_pmu.c
1123
reg = read_sysreg_s(SYS_PMBIDR_EL1);
drivers/perf/arm_spe_pmu.c
1140
reg = read_sysreg_s(SYS_PMSIDR_EL1);
drivers/perf/arm_spe_pmu.c
1227
spe_pmu->pmsevfr_res0 = ~read_sysreg_s(SYS_PMSEVFR_EL1);
drivers/perf/arm_spe_pmu.c
654
offset = read_sysreg_s(SYS_PMBPTR_EL1) - (u64)buf->base;
drivers/perf/arm_spe_pmu.c
697
pmbsr = read_sysreg_s(SYS_PMBSR_EL1);
drivers/perf/arm_spe_pmu.c
739
read_sysreg_s(SYS_PMBPTR_EL1),
drivers/perf/arm_spe_pmu.c
740
read_sysreg_s(SYS_PMBLIMITR_EL1));
drivers/perf/arm_spe_pmu.c
959
local64_set(&hwc->period_left, read_sysreg_s(SYS_PMSICR_EL1));
drivers/soc/qcom/kryo-l2-accessors.c
52
val = read_sysreg_s(L2CPUSRDR_EL1);
tools/arch/arm64/include/asm/cputype.h
256
#define read_cpuid(reg) read_sysreg_s(SYS_ ## reg)
tools/arch/arm64/include/asm/sysreg.h
1173
u64 __scs_val = read_sysreg_s(sysreg); \
tools/testing/selftests/kvm/arm64/aarch32_id_regs.c
20
#define GUEST_ASSERT_REG_RAZ(reg) GUEST_ASSERT_EQ(read_sysreg_s(reg), 0)
tools/testing/selftests/kvm/arm64/at.c
22
write_sysreg_s(read_sysreg_s(SYS_##reg##_EL1), SYS_##reg##_EL12)
tools/testing/selftests/kvm/arm64/hello_el2.c
16
u64 mmfr0 = read_sysreg_s(SYS_ID_AA64MMFR0_EL1);
tools/testing/selftests/kvm/arm64/hello_el2.c
17
u64 mmfr1 = read_sysreg_s(SYS_ID_AA64MMFR1_EL1);
tools/testing/selftests/kvm/arm64/hello_el2.c
18
u64 mmfr4 = read_sysreg_s(SYS_ID_AA64MMFR4_EL1);
tools/testing/selftests/kvm/arm64/idreg-idst.c
21
val = read_sysreg_s(SYS_ ## r); \
tools/testing/selftests/kvm/arm64/no-vgic-v3.c
18
val = read_sysreg_s(SYS_ ## r); \
tools/testing/selftests/kvm/arm64/set_id_regs.c
240
#define GUEST_REG_SYNC(id) GUEST_SYNC_ARGS(0, id, read_sysreg_s(id), 0, 0);
tools/testing/selftests/kvm/arm64/vgic_irq.c
150
uint64_t reg = read_sysreg_s(SYS_ICC_AP1R0_EL1);
tools/testing/selftests/kvm/arm64/vgic_irq.c
883
GUEST_ASSERT(read_sysreg_s(SYS_ICC_IAR0_EL1) == IAR_SPURIOUS);
tools/testing/selftests/kvm/arm64/vgic_irq.c
890
intid = read_sysreg_s(SYS_ICC_IAR0_EL1);
tools/testing/selftests/kvm/lib/arm64/gic_v3.c
344
write_sysreg_s(read_sysreg_s(SYS_ICC_SRE_EL1) | ICC_SRE_EL1_SRE,
tools/testing/selftests/kvm/lib/arm64/gic_v3.c
96
uint64_t irqstat = read_sysreg_s(SYS_ICC_IAR1_EL1);