arch/x86/events/intel/core.c

5661

msr_set_bit(MSR_IA32_DEBUGCTLMSR,

arch/x86/include/asm/msr.h

255

int msr_set_bit(u32 msr, u8 bit);

arch/x86/kernel/amd_nb.c

285

msr_set_bit(MSR_AMD64_IC_CFG, 3);

arch/x86/kernel/amd_nb.c

286

msr_set_bit(MSR_AMD64_IC_CFG, 14);

arch/x86/kernel/cpu/amd.c

1006

msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT);

arch/x86/kernel/cpu/amd.c

1116

msr_set_bit(MSR_AMD64_DE_CFG,

arch/x86/kernel/cpu/amd.c

1141

msr_set_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT);

arch/x86/kernel/cpu/amd.c

1154

WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS) < 0);

arch/x86/kernel/cpu/amd.c

1161

msr_set_bit(MSR_EFER, _EFER_TCE);

arch/x86/kernel/cpu/amd.c

678

msr_set_bit(MSR_AMD64_LS_CFG, 15);

arch/x86/kernel/cpu/amd.c

726

msr_set_bit(MSR_K7_HWCR, 6);

arch/x86/kernel/cpu/amd.c

759

msr_set_bit(MSR_AMD64_MCx_MASK(4), 10);

arch/x86/kernel/cpu/amd.c

791

msr_set_bit(MSR_AMD64_DE_CFG, 31);

arch/x86/kernel/cpu/amd.c

910

msr_set_bit(MSR_ZEN2_SPECTRAL_CHICKEN, MSR_ZEN2_SPECTRAL_CHICKEN_BIT);

arch/x86/kernel/cpu/amd.c

967

msr_set_bit(MSR_AMD64_DE_CFG, MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT);

arch/x86/kernel/cpu/bugs.c

2248

msr_set_bit(MSR_EFER, _EFER_AUTOIBRS);

arch/x86/kernel/cpu/hygon.c

209

msr_set_bit(MSR_AMD64_DE_CFG,

arch/x86/kernel/cpu/intel.c

433

if (msr_set_bit(MSR_IA32_MISC_ENABLE,

arch/x86/kernel/cpu/resctrl/ctrlmondata.c

105

msr_set_bit(MSR_IA32_L3_QOS_EXT_CFG, SDCIAE_ENABLE_BIT);

arch/x86/kernel/cpu/resctrl/monitor.c

486

msr_set_bit(MSR_IA32_L3_QOS_EXT_CFG, ABMC_ENABLE_BIT);

arch/x86/kernel/cpu/topology_amd.c

166

if (msr_set_bit(MSR_AMD64_CPUID_EXT_FEAT,

arch/x86/kernel/process.c

358

msr_set_bit(MSR_K7_HWCR, MSR_K7_HWCR_CPUID_USER_DIS_BIT);

arch/x86/kvm/svm/svm.c

1413

msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN4_BP_CFG_BP_SPEC_REDUCE_BIT);

arch/x86/lib/msr.c

107

EXPORT_SYMBOL_FOR_KVM(msr_set_bit);