arch/arm/mach-rpc/irq.c

132

writeb(mask, base + CLR);

arch/arm64/net/bpf_jit.h

154

#define A64_STCLR(sf, Rn, Rs) A64_ST_OP(sf, Rn, Rs, CLR)

arch/arm64/net/bpf_jit.h

164

#define A64_LDCLRAL(sf, Rt, Rn, Rs) A64_LD_OP_AL(sf, Rt, Rn, Rs, CLR)

drivers/clk/imx/clk-pfd.c

102

writel_relaxed(0x3f << (pfd->idx * 8), pfd->reg + CLR);

drivers/clk/imx/clk-pfd.c

40

writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + CLR);

drivers/clk/mxs/clk-imx23.c

52

writel_relaxed(1 << BP_CLKSEQ_BYPASS_SAIF, CLKSEQ + CLR);

drivers/clk/mxs/clk-imx23.c

63

writel_relaxed(1 << BP_CLKSEQ_BYPASS_SSP, CLKSEQ + CLR);

drivers/clk/mxs/clk-imx23.c

69

writel_relaxed(0x3f << BP_FRAC_IOFRAC, FRAC + CLR);

drivers/clk/mxs/clk-imx28.c

110

writel_relaxed(0xf << BP_CLKSEQ_BYPASS_SSP0, CLKSEQ + CLR);

drivers/clk/mxs/clk-imx28.c

73

writel_relaxed(0x3 << BP_SAIF_CLKMUX, DIGCTRL + CLR);

drivers/clk/mxs/clk-imx28.c

90

writel_relaxed(0x3 << BP_CLKSEQ_BYPASS_SAIF0, CLKSEQ + CLR);

drivers/clk/mxs/clk-pll.c

47

writel_relaxed(1 << pll->power, pll->base + CLR);

drivers/clk/mxs/clk-pll.c

54

writel_relaxed(1 << 31, pll->base + CLR);

drivers/clk/mxs/clk-ref.c

35

writel_relaxed(1 << ((ref->idx + 1) * 8 - 1), ref->reg + CLR);

drivers/gpu/drm/imx/dcss/dcss-dev.h

22

#define dcss_clr(v, c) writel((v), (c) + CLR)

drivers/gpu/drm/xe/tests/xe_rtp_test.c

213

XE_RTP_ACTIONS(CLR(REGULAR_REG1, REG_BIT(1)))

drivers/gpu/drm/xe/tests/xe_rtp_test.c

276

XE_RTP_ACTIONS(CLR(REGULAR_REG1, REG_GENMASK(1, 0)))

drivers/gpu/drm/xe/xe_hw_engine.c

453

XE_RTP_ACTIONS(CLR(RING_PSMI_CTL(0),

drivers/gpu/drm/xe/xe_tuning.c

46

XE_RTP_ACTIONS(CLR(CCCHKNREG1, ENCOMPPERFFIX),

drivers/gpu/drm/xe/xe_tuning.c

51

XE_RTP_ACTIONS(CLR(XE2LPM_CCCHKNREG1, ENCOMPPERFFIX),

drivers/gpu/drm/xe/xe_tuning.c

98

XE_RTP_ACTIONS(CLR(XELP_GARBCNTL, XELP_BUS_HASH_CTL_BIT_EXC))

drivers/gpu/drm/xe/xe_wa.c

136

XE_RTP_ACTIONS(CLR(MISCCPCTL, DOP_CLOCK_GATE_RENDER_ENABLE))

drivers/gpu/drm/xe/xe_wa.c

162

XE_RTP_ACTIONS(CLR(SARB_CHICKEN1, COMP_CKN_IN))

drivers/gpu/drm/xe/xe_wa.c

196

XE_RTP_ACTIONS(CLR(MISCCPCTL, DOP_CLOCK_GATE_RENDER_ENABLE))

drivers/gpu/drm/xe/xe_wa.c

440

XE_RTP_ACTIONS(CLR(XEHP_HDC_CHICKEN0,

drivers/gpu/drm/xe/xe_wa.c

716

XE_RTP_ACTIONS(CLR(COMMON_SLICE_CHICKEN3,

drivers/pinctrl/freescale/pinctrl-mxs.c

296

writel(1 << shift, reg + CLR);

drivers/pinctrl/freescale/pinctrl-mxs.c

307

writel(1 << shift, reg + CLR);

drivers/pwm/pwm-mxs.c

71

writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR);

drivers/video/fbdev/imsttfb.c

1015

write_reg_le32(par->dc_regs, CLR, bgc);