hweight_long
total_mem_size += mem[i].size - subreg * hweight_long(mem[i].subreg);
nr_entries = BIT_ULL(hweight_long(mask));
for_each_set_bit(aff0, &target_cpus, hweight_long(ICC_SGI1R_TARGET_LIST_MASK)) {
if (hweight_long(flags) != 1)
if (hweight_long(hwc->config & ARCH_PERFMON_EVENTSEL_UMASK) <= 1)
if (hweight_long(hwc->config & ARCH_PERFMON_EVENTSEL_UMASK) <= 1)
x86_pmu.num_hybrid_pmus = hweight_long(pmus_mask);
if (hweight_long(features) > 1)
bits = hweight_long(paddr[i]);
cleared = hweight_long(*bm & ~mask);
cleared += hweight_long(*bm);
bits += hweight_long(p_addr[last_word]);
bits = hweight_long(*bm);
b->bm_set += hweight_long(word) - bits;
if (hweight_long(mask) != 1)
if (hweight_long(gdev->valid_mask) == num_masters) {
num_svc = hweight_long(mask);
nservices = hweight_long(mask);
ae_count = hweight_long(ae_mask);
ae_count = hweight_long(hw_data->ae_mask & ~hw_data->admin_ae_mask);
if (hweight_long(ae_mask) > fw_counters->ae_count)
unsigned long num_svc = hweight_long(mask);
if (hweight_long(hdr) % 2 == 0)
hweight_long(tdma->chan_mask));
weight = hweight_long(mask);
u32 temp = hweight_long((u32) ((sys_addr >> 16) & 0x1F)) & 1;
winbond_gpio_chip.ngpio = hweight_long(params.gpios) * 8;
if (!(*hwpipe) || (hweight_long(cur->caps & ~caps) <
hweight_long((*hwpipe)->caps & ~caps))) {
if (hweight_long(mask) != 3)
str_plural(hweight_long(awake_failed)), awake_failed);
str_plural(hweight_long(ack_fail)), ack_fail);
ec_data->nr_sensors = hweight_long(ec_data->board_info->sensors);
if (hweight_long(i & 0xf) != 1 || i > 8)
nb_activities = hweight_long(activities) + 1;
num_default_gids = hweight_long(roce_gid_type_mask);
cpu_vec = find_first_zero_bit(&reserved, hweight_long(ST0_IM));
if (cpu_vec == hweight_long(ST0_IM)) {
return hweight_long(fps_map[index] & mask);
if (hweight_long(core->dec_codecs) + hweight_long(core->enc_codecs) > MAX_CODEC_NUM)
sdr->num_hw_ch = hweight_long(sdr->hw_ch_mask);
len = 1 << hweight_long(lis3->odr_mask); /* # of possible values */
c = hweight_long(test_flash_data);
weight = hweight_long(d);
num_virtual_links += hweight_long(rule->port_mask);
cnt += hweight_long(cfg->aq_rxsc[i].rx_sa_idx_busy);
cnt = hweight_long(nic->macsec_cfg->txsc_idx_busy);
cnt += hweight_long(cfg->aq_txsc[i].tx_sa_idx_busy);
remaining_ports_count = hweight_long(port_map);
remaining_ports_count = hweight_long(port_map);
reused = hweight_long((*need_sync) ^ (*in_use));
if (hweight_long((unsigned long)wol) > 1) {
u8 num_useful_links = hweight_long(useful_links);
if (WARN_ONCE(hweight_long(fid1) + hweight_long(fid2) != 1,
n_matches = hweight_long(matched_profiles);
n_matches = hweight_long(matched_profiles);
chips = hweight_long(spi_present_mask);
"%ld GPIOs available\n", hweight_long(pctl->gpio_valid_mask));
num_caps = hweight_long(info->caps);
n = hweight_long(dev->accessible_regions);
ncfg = hweight_long(pc->configured);
return BIT_ULL(hweight_long(MSMON___LWD_VALUE));
return BIT_ULL(hweight_long(MSMON___L_VALUE));
return BIT_ULL(hweight_long(MSMON___VALUE));
if ((hweight_long(spi->mode &
(hweight_long(spi->mode &
count += hweight_long(*bitmap);
count += hweight_long(clu_bits & BITMAP_LAST_WORD_MASK(last_mask));
if (xdr_stream_encode_u32(xdr, hweight_long(mask)) != XDR_UNIT)
if (xdr_stream_encode_u32(xdr, hweight_long(mask)) != XDR_UNIT)
w += hweight_long(bmp[k]);
w += hweight_long(ul_to_cpu(((bitmap_ulong *)bitmap)[k]) &
return hweight_long(*dst & BITMAP_LAST_WORD_MASK(nbits));
return hweight_long(*src & BITMAP_LAST_WORD_MASK(nbits));
return hweight_long(*src1 & *src2 & BITMAP_LAST_WORD_MASK(nbits));
return hweight_long(*src1 & ~(*src2) & BITMAP_LAST_WORD_MASK(nbits));
w += hweight_long(FETCH); \
w += hweight_long((FETCH) & BITMAP_LAST_WORD_MASK(__bits)); \
w = hweight_long(tmp); \
num_labels = hweight_long(output->mpls.num_labels_mask);
mpls_label_count = hweight_long(key->mpls.num_labels_mask);
a = hweight_long(n_to_a);
n = hweight_long(a_to_n);
a = hweight_long(new_acks);
access_weight = hweight_long(all_existing_optional_access &
max_chs = hweight_long(spk_mask);
if (hweight_long(mclk_mask) != 1)
if (hweight_long((unsigned long) rx_mask) != 2
|| hweight_long((unsigned long) tx_mask) != 2)
if (hweight_long((unsigned long) tx_mask) != 1 ||
hweight_long((unsigned long) rx_mask) != 2) {
rx_slotnum = hweight_long(rx_mask);
tx_slotnum = hweight_long(tx_mask);
rx_slotnum = hweight_long(rx_mask);
tx_slotnum = hweight_long(tx_mask);
rx_slotnum = hweight_long(rx_mask);
rx_slotnum = hweight_long(rx_mask);
tx_slotnum = hweight_long(tx_mask);
if (!rx_mask || hweight_long(rx_mask) > 1 || ffs(rx_mask) > slots) {
if (tx_mask && (hweight_long(tx_mask) > 2 || fls(tx_mask) > slots)) {
if (!rx_mask || hweight_long(rx_mask) > 1 || fls(rx_mask) > slots) {
if (!rx_mask || hweight_long(tx_mask) > slots || hweight_long(rx_mask) > slots ||
adev->hw_cfg.dsp_cores = hweight_long(AVS_MAIN_CORE_MASK);
if (num_elems != (hweight_long(resource_mask) + 1)) {
cpu_count += hweight_long(tdms[i]);
return hweight_long(mach->mach_params.i2s_link_mask) == 1;
return !tdms || (hweight_long(tdms[port]) == 1);
if (hweight_long(mach_params->bt_link_mask) == 1) {
ssp_num = hweight_long(ssp_mask);
#define catpt_num_dram(cdev) (hweight_long((cdev)->spec->dram_mask))
#define catpt_num_iram(cdev) (hweight_long((cdev)->spec->iram_mask))
num_sd_lines = hweight_long(cfg->sd_line_mask);
step = hweight_long(ch_mask);
int channels = hweight_long(mask);
if (hweight_long(mach->mach_params.bt_link_mask) > 1) {
if (hweight_long(mach->mach_params.i2s_link_mask) > 1 &&
return hweight_long(*src & BITMAP_LAST_WORD_MASK(nbits));
w += hweight_long(bitmap[k]);
w += hweight_long(bitmap[k] & BITMAP_LAST_WORD_MASK(bits));
size_t sz = hweight_long(s1_regs->mask) * sizeof(u64);
size_t sz = hweight_long(s1_regs->mask) * sizeof(u64);