drivers/accel/habanalabs/common/device.c

2682

void hl_capture_razwi(struct hl_device *hdev, u64 addr, u16 *engine_id, u16 num_of_engines,

drivers/accel/habanalabs/common/device.c

2701

memcpy(&razwi_info->razwi.engine_id[0], &engine_id[0],

drivers/accel/habanalabs/common/device.c

2708

void hl_handle_razwi(struct hl_device *hdev, u64 addr, u16 *engine_id, u16 num_of_engines,

drivers/accel/habanalabs/common/device.c

2711

hl_capture_razwi(hdev, addr, engine_id, num_of_engines, flags);

drivers/accel/habanalabs/common/device.c

2789

pgf_info->page_fault.engine_id = eng_id;

drivers/accel/habanalabs/common/device.c

2850

void hl_capture_engine_err(struct hl_device *hdev, u16 engine_id, u16 error_count)

drivers/accel/habanalabs/common/device.c

2859

info->event.engine_id = engine_id;

drivers/accel/habanalabs/common/habanalabs.h

2556

u32 engine_id;

drivers/accel/habanalabs/common/habanalabs.h

2587

u32 engine_id, char **buf,

drivers/accel/habanalabs/common/habanalabs.h

3094

u32 engine_id;

drivers/accel/habanalabs/common/habanalabs.h

4121

void hl_capture_razwi(struct hl_device *hdev, u64 addr, u16 *engine_id, u16 num_of_engines,

drivers/accel/habanalabs/common/habanalabs.h

4123

void hl_handle_razwi(struct hl_device *hdev, u64 addr, u16 *engine_id, u16 num_of_engines,

drivers/accel/habanalabs/common/habanalabs.h

4130

void hl_capture_engine_err(struct hl_device *hdev, u16 engine_id, u16 error_count);

drivers/accel/habanalabs/common/habanalabs_ioctl.c

642

info.engine_id = hdev->captured_err_info.undef_opcode.engine_id;

drivers/accel/habanalabs/common/state_dump.c

167

u32 engine_id)

drivers/accel/habanalabs/common/state_dump.c

170

hl_sync_engine_to_string(engine_type), engine_id);

drivers/accel/habanalabs/common/state_dump.c

368

entry->engine_id);

drivers/accel/habanalabs/gaudi/gaudi.c

6906

undef_opcode->engine_id = gaudi_queue_id_to_engine_id[qid_base];

drivers/accel/habanalabs/gaudi/gaudi.c

7241

u16 engine_id[2], num_of_razwi_eng = 0;

drivers/accel/habanalabs/gaudi/gaudi.c

7250

engine_id[0] = HL_RAZWI_NA_ENG_ID;

drivers/accel/habanalabs/gaudi/gaudi.c

7251

engine_id[1] = HL_RAZWI_NA_ENG_ID;

drivers/accel/habanalabs/gaudi/gaudi.c

7258

gaudi_print_and_get_razwi_info(hdev, &engine_id[0], &engine_id[1], &is_read,

drivers/accel/habanalabs/gaudi/gaudi.c

7267

if (engine_id[0] != HL_RAZWI_NA_ENG_ID) {

drivers/accel/habanalabs/gaudi/gaudi.c

7268

if (engine_id[1] != HL_RAZWI_NA_ENG_ID)

drivers/accel/habanalabs/gaudi/gaudi.c

7275

hl_handle_razwi(hdev, razwi_addr, engine_id, num_of_razwi_eng,

drivers/accel/habanalabs/gaudi/gaudi.c

8832

enum hl_sync_engine_type engine_type, u32 engine_id)

drivers/accel/habanalabs/gaudi/gaudi.c

8849

entry->engine_id = engine_id;

drivers/accel/habanalabs/gaudi/gaudi.c

8985

enum hl_sync_engine_type engine_type, u32 engine_id, char **buf,

drivers/accel/habanalabs/gaudi/gaudi.c

9032

engine_name, engine_id,

drivers/accel/habanalabs/gaudi/gaudi.c

9034

fence_cnt, engine_name, engine_id, fence_id, i,

drivers/accel/habanalabs/gaudi/gaudi.c

9035

fence_rdata, engine_name, engine_id, fence_id, i,

drivers/accel/habanalabs/gaudi2/gaudi2.c

11794

u32 engine_id, char **buf, size_t *size, size_t *offset)

drivers/accel/habanalabs/gaudi2/gaudi2.c

5051

static int gaudi2_set_tpc_engine_mode(struct hl_device *hdev, u32 engine_id, u32 engine_command)

drivers/accel/habanalabs/gaudi2/gaudi2.c

5059

tpc_id = gaudi2_tpc_engine_id_to_tpc_id[engine_id];

drivers/accel/habanalabs/gaudi2/gaudi2.c

5078

static int gaudi2_set_mme_engine_mode(struct hl_device *hdev, u32 engine_id, u32 engine_command)

drivers/accel/habanalabs/gaudi2/gaudi2.c

5083

mme_id = gaudi2_mme_engine_id_to_mme_id[engine_id];

drivers/accel/habanalabs/gaudi2/gaudi2.c

5096

static int gaudi2_set_edma_engine_mode(struct hl_device *hdev, u32 engine_id, u32 engine_command)

drivers/accel/habanalabs/gaudi2/gaudi2.c

5104

edma_id = gaudi2_edma_engine_id_to_edma_id[engine_id];

drivers/accel/habanalabs/gaudi2/gaudi2.c

8261

static void handle_lower_qman_data_on_err(struct hl_device *hdev, u64 qman_base, u32 engine_id)

drivers/accel/habanalabs/gaudi2/gaudi2.c

8296

undef_opcode->engine_id = engine_id;

drivers/accel/habanalabs/gaudi2/gaudi2.c

9957

u32 intr_type, engine_id;

drivers/accel/habanalabs/gaudi2/gaudi2.c

9961

engine_id = le32_to_cpu(data->engine_id);

drivers/accel/habanalabs/gaudi2/gaudi2.c

9970

GAUDI2_ENG_ID_TO_STR(engine_id), intr_type, q->queue_index);

drivers/accel/habanalabs/goya/goya.c

5370

enum hl_sync_engine_type engine_type, u32 engine_id, char **buf,

drivers/accel/ivpu/ivpu_trace.h

33

__field(u32, engine_id)

drivers/accel/ivpu/ivpu_trace.h

38

__entry->engine_id = job->engine_idx;

drivers/accel/ivpu/ivpu_trace.h

43

__entry->engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

117

pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

193

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

197

engine_id, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

68

unsigned int engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

74

switch (engine_id) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

78

engine_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.h

26

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

129

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

133

engine_id, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

44

unsigned int engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

48

SOC15_REG_OFFSET(SDMA0, GET_INST(SDMA0, engine_id),

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c

54

pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

161

unsigned int engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

177

uint32_t retval = sdma_engine_reg_base[engine_id]

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

180

pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

443

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

447

engine_id, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

130

unsigned int engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

136

switch (engine_id) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

140

engine_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

163

pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

429

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

433

engine_id, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

126

unsigned int engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

132

switch (engine_id) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

148

pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

414

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

418

engine_id, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

137

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

141

engine_id, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

77

unsigned int engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

83

switch (engine_id) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

99

pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

102

pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

140

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

144

engine_id, queue_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

77

unsigned int engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12_1.c

82

uint32_t dev_inst = GET_INST(SDMA0, engine_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

295

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

298

uint32_t sdma_offset = engine_id * SDMA1_REGISTER_OFFSET +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

318

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

321

uint32_t sdma_offset = engine_id * SDMA1_REGISTER_OFFSET +

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

181

unsigned int engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

187

switch (engine_id) {

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

191

engine_id);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

206

pr_debug("RLC register offset for SDMA%d RLC%d: 0x%x\n", engine_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

454

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

458

engine_id, queue_id);

drivers/gpu/drm/amd/amdkfd/kfd_topology.h

66

uint32_t engine_id;

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

761

if (cntl->engine_id == ENGINE_ID_DACA) {

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

768

} else if (cntl->engine_id == ENGINE_ID_DACB) {

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

785

enum engine_id engine_id,

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

796

bp_params.engine_id = engine_id;

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

799

if (engine_id != ENGINE_ID_DACA &&

drivers/gpu/drm/amd/display/dc/bios/bios_parser.c

800

engine_id != ENGINE_ID_DACB)

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1662

switch (bp_params->engine_id) {

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1680

enum engine_id engine_id, uint8_t *out_encoder_id)

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1684

switch (engine_id) {

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1767

bp_params->engine_id,

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1792

bp_params->engine_id,

drivers/gpu/drm/amd/display/dc/bios/command_table.c

180

switch (cntl->engine_id) {

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1964

enum engine_id engine_id,

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1970

if (engine_id == ENGINE_ID_DACB)

drivers/gpu/drm/amd/display/dc/bios/command_table.c

1987

bp_params->engine_id,

drivers/gpu/drm/amd/display/dc/bios/command_table.c

2012

bp_params->engine_id,

drivers/gpu/drm/amd/display/dc/bios/command_table.c

241

params.acConfig.ucDigSel = (uint8_t)(cntl->engine_id);

drivers/gpu/drm/amd/display/dc/bios/command_table.c

287

params.acConfig.ucDigSel = (uint8_t)(cntl->engine_id);

drivers/gpu/drm/amd/display/dc/bios/command_table.c

328

params.ucDigId = (uint8_t)(cntl->engine_id);

drivers/gpu/drm/amd/display/dc/bios/command_table.c

521

if (ENGINE_ID_DIGB == cntl->engine_id)

drivers/gpu/drm/amd/display/dc/bios/command_table.c

660

if (ENGINE_ID_DIGB == cntl->engine_id)

drivers/gpu/drm/amd/display/dc/bios/command_table.c

786

if (ENGINE_ID_DIGB == cntl->engine_id)

drivers/gpu/drm/amd/display/dc/bios/command_table.c

835

cmd->dig_encoder_sel_to_atom(cntl->engine_id);

drivers/gpu/drm/amd/display/dc/bios/command_table.c

892

params.ucDigEncoderSel = cmd->dig_encoder_sel_to_atom(cntl->engine_id);

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

135

params.digid = (uint8_t)(cntl->engine_id);

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

284

ps.param.digfe_sel = cmd->dig_encoder_sel_to_atom(cntl->engine_id);

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

366

dig_v1_7.digfe_sel = cmd->dig_encoder_sel_to_atom(cntl->engine_id);

drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c

356

bool engine_bp_to_atom(enum engine_id id, uint32_t *atom_engine_id)

drivers/gpu/drm/amd/display/dc/bios/command_table_helper.h

68

bool engine_bp_to_atom(enum engine_id id, uint32_t *atom_engine_id);

drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h

40

bool (*engine_bp_to_atom)(enum engine_id engine_id,

drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h

57

uint8_t (*dig_encoder_sel_to_atom)(enum engine_id engine_id);

drivers/gpu/drm/amd/display/dc/bios/dce110/command_table_helper_dce110.c

95

static uint8_t dig_encoder_sel_to_atom(enum engine_id id)

drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper2_dce112.c

94

static uint8_t dig_encoder_sel_to_atom(enum engine_id id)

drivers/gpu/drm/amd/display/dc/bios/dce112/command_table_helper_dce112.c

92

static uint8_t dig_encoder_sel_to_atom(enum engine_id id)

drivers/gpu/drm/amd/display/dc/bios/dce60/command_table_helper_dce60.c

168

static uint8_t dig_encoder_sel_to_atom(enum engine_id id)

drivers/gpu/drm/amd/display/dc/bios/dce80/command_table_helper_dce80.c

168

static uint8_t dig_encoder_sel_to_atom(enum engine_id id)

drivers/gpu/drm/amd/display/dc/core/dc.c

362

(enum engine_id)(ENGINE_ID_DIGA + i));

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

125

enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

158

static enum engine_id find_first_avail_link_enc(

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

161

enum engine_id eng_id_requested)

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

163

enum engine_id eng_id = ENGINE_ID_UNKNOWN;

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

187

static bool is_avail_link_enc(struct dc_state *state, enum engine_id eng_id, struct dc_stream_state *stream)

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

264

state->res_ctx.link_enc_cfg_ctx.link_enc_avail[i] = (enum engine_id) i;

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

292

enum engine_id eng_id = ENGINE_ID_UNKNOWN, eng_id_req = ENGINE_ID_UNKNOWN;

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

440

enum engine_id eng_id = ENGINE_ID_UNKNOWN;

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

453

enum engine_id eng_id = link_enc->preferred_engine;

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

464

enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

483

enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

525

enum engine_id encs_assigned[MAX_LINK_ENCODERS];

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

598

bool link_enc_cfg_is_link_enc_avail(struct dc *dc, enum engine_id eng_id, struct dc_link *link)

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

70

enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c

90

enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3628

enum engine_id id,

drivers/gpu/drm/amd/display/dc/dc.h

1650

enum engine_id eng_id;

drivers/gpu/drm/amd/display/dc/dc.h

1651

enum engine_id dpia_preferred_eng_id;

drivers/gpu/drm/amd/display/dc/dc_bios_types.h

102

enum engine_id engine_id,

drivers/gpu/drm/amd/display/dc/dc_types.h

688

enum engine_id engineId;

drivers/gpu/drm/amd/display/dc/dce/dce_aux.h

281

uint32_t engine_id;

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

353

DC_I2C_DDC_SELECT, dce_i2c_hw->engine_id);

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

668

uint32_t engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

674

dce_i2c_hw->engine_id = engine_id;

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

691

uint32_t engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

698

engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

708

uint32_t engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

715

engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

725

uint32_t engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

732

engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

742

uint32_t engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c

749

engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h

294

uint32_t engine_id;

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h

308

uint32_t engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h

316

uint32_t engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h

324

uint32_t engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h

332

uint32_t engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.h

340

uint32_t engine_id,

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1033

cntl.engine_id = ENGINE_ID_UNKNOWN;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1149

cntl.engine_id = enc->preferred_engine;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1185

cntl.engine_id = enc->preferred_engine;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1239

cntl.engine_id = enc->preferred_engine;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1278

cntl.engine_id = ENGINE_ID_UNKNOWN;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1318

cntl.engine_id = enc->preferred_engine;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1357

cntl.engine_id = ENGINE_ID_UNKNOWN;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

146

encoder_control.engine_id = link_enc->base.analog_engine;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

1734

enum engine_id engine,

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

257

enum engine_id result;

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

596

enum engine_id engine)

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.h

297

enum engine_id engine,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

1563

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

1586

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

542

cntl.engine_id = enc110->base.id;

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

658

cntl.engine_id = enc110->base.id;

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c

683

cntl.engine_id = enc110->base.id;

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

711

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h

720

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

1037

cntl.engine_id = ENGINE_ID_UNKNOWN;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

1355

enum engine_id engine,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

427

enum engine_id engine)

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

454

enum engine_id result;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

840

cntl.engine_id = ENGINE_ID_UNKNOWN;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

941

cntl.engine_id = enc->preferred_engine;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.c

998

cntl.engine_id = enc->preferred_engine;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_link_encoder.h

636

enum engine_id engine,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

1613

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

490

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c

609

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h

632

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.c

647

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn20/dcn20_stream_encoder.h

94

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

539

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

586

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c

881

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h

281

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

405

enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.h

249

enum engine_id eng_id);

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

116

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

157

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c

488

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h

269

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

115

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

475

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c

74

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.h

191

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

102

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

502

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c

62

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h

279

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

115

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

74

cntl.engine_id = enc1->base.id;

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

776

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.h

197

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/dio/virtual/virtual_link_encoder.c

77

enum engine_id engine,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_link_encoder.c

525

cntl.engine_id = ENGINE_ID_UNKNOWN;

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.c

763

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_stream_encoder.h

237

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

1378

audio_output->engine_id = pipe_ctx->stream_res.stream_enc->id;

drivers/gpu/drm/amd/display/dc/inc/core_types.h

519

enum engine_id link_enc_avail[MAX_LINK_ENCODERS];

drivers/gpu/drm/amd/display/dc/inc/core_types.h

690

enum engine_id digfe_inst;

drivers/gpu/drm/amd/display/dc/inc/core_types.h

74

enum engine_id (*get_preferred_eng_id_dpia)(unsigned int dpia_index);

drivers/gpu/drm/amd/display/dc/inc/core_types.h

84

struct link_encoder *(*link_enc_create_minimal)(struct dc_context *ctx, enum engine_id eng_id);

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

152

enum engine_id engine,

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

201

enum engine_id eng_id;

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

248

enum engine_id preferred_engine;

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

52

enum engine_id analog_engine;

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

89

enum engine_id preferred_engine;

drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h

90

enum engine_id analog_engine;

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

116

enum engine_id id;

drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h

296

enum engine_id id;

drivers/gpu/drm/amd/display/dc/inc/link_enc_cfg.h

108

bool link_enc_cfg_is_link_enc_avail(struct dc *dc, enum engine_id eng_id, struct dc_link *link);

drivers/gpu/drm/amd/display/dc/inc/link_enc_cfg.h

84

enum engine_id eng_id);

drivers/gpu/drm/amd/display/dc/inc/link_enc_cfg.h

89

enum engine_id eng_id);

drivers/gpu/drm/amd/display/dc/inc/resource.h

86

enum engine_id eng_id, struct dc_context *ctx);

drivers/gpu/drm/amd/display/dc/inc/resource.h

89

enum engine_id eng_id, struct dc_context *ctx);

drivers/gpu/drm/amd/display/dc/link/link_detection.c

937

enum engine_id engine_id = link_enc->preferred_engine;

drivers/gpu/drm/amd/display/dc/link/link_detection.c

942

switch (engine_id) {

drivers/gpu/drm/amd/display/dc/link/link_detection.c

948

engine_id = ENGINE_ID_DACA;

drivers/gpu/drm/amd/display/dc/link/link_detection.c

954

bp_result = bios->funcs->dac_load_detection(bios, engine_id, device_type, enum_id);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

1912

enum engine_id eng_id;

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

227

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

2356

enum engine_id eng_id = pipe_ctx->stream_res.stream_enc->id;

drivers/gpu/drm/amd/display/dc/link/link_factory.c

443

static enum engine_id find_analog_engine(struct dc_link *link, struct graphics_object_id *enc)

drivers/gpu/drm/amd/display/dc/link/link_factory.c

469

static bool analog_engine_supported(const enum engine_id engine_id)

drivers/gpu/drm/amd/display/dc/link/link_factory.c

471

return engine_id == ENGINE_ID_DACA ||

drivers/gpu/drm/amd/display/dc/link/link_factory.c

472

engine_id == ENGINE_ID_DACB;

drivers/gpu/drm/amd/display/dc/link/link_factory.c

488

enum engine_id link_analog_engine;

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

485

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

979

enum engine_id preferred_engine = link->link_enc->preferred_engine;

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

529

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c

510

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c

769

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dce60/dce60_resource.c

602

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dce80/dce80_resource.c

608

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

846

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

1026

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

70

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

884

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

1165

static struct stream_encoder *dcn21_stream_encoder_create(enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

1040

static struct stream_encoder *dcn30_stream_encoder_create(enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1011

static struct stream_encoder *dcn301_stream_encoder_create(enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

422

static struct stream_encoder *dcn302_stream_encoder_create(enum engine_id eng_id, struct dc_context *ctx)

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

409

static struct stream_encoder *dcn303_stream_encoder_create(enum engine_id eng_id, struct dc_context *ctx)

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1144

struct dc_context *ctx, enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1248

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

1284

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1051

static const enum engine_id dpia_to_preferred_enc_id_table[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1058

static enum engine_id dcn314_get_preferred_eng_id_dpia(unsigned int dpia_index)

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1202

struct dc_context *ctx, enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1306

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1342

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1143

struct dc_context *ctx, enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1247

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

1285

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1136

struct dc_context *ctx, enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1242

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1279

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1232

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1276

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1213

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1257

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1152

struct dc_context *ctx, enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1296

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1340

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

931

static const enum engine_id dpia_to_preferred_enc_id_table[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

938

static enum engine_id dcn35_get_preferred_eng_id_dpia(unsigned int dpia_index)

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1132

struct dc_context *ctx, enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1276

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

1320

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

911

static const enum engine_id dpia_to_preferred_enc_id_table[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

918

static enum engine_id dcn351_get_preferred_eng_id_dpia(unsigned int dpia_index)

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1139

struct dc_context *ctx, enum engine_id eng_id)

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1283

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

1327

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

918

static const enum engine_id dpia_to_preferred_enc_id_table[] = {

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

925

static enum engine_id dcn36_get_preferred_eng_id_dpia(unsigned int dpia_index)

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1208

enum engine_id eng_id,

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1250

enum engine_id eng_id,

drivers/gpu/drm/amd/display/include/audio_types.h

104

enum engine_id engine_id;

drivers/gpu/drm/amd/display/include/bios_parser_types.h

113

enum engine_id engine_id;

drivers/gpu/drm/amd/display/include/bios_parser_types.h

124

enum engine_id engine_id;

drivers/gpu/drm/amd/display/include/bios_parser_types.h

136

enum engine_id engine_id;

drivers/gpu/drm/amd/display/include/bios_parser_types.h

144

enum engine_id engine_id;

drivers/gpu/drm/amd/display/include/bios_parser_types.h

152

enum engine_id hpo_engine_id; /* used for DCN3 */

drivers/gpu/drm/amd/display/include/bios_parser_types.h

166

enum engine_id engine_id;

drivers/gpu/drm/amd/display/include/grph_object_id.h

295

static inline enum engine_id dal_graphics_object_id_get_engine_id(

drivers/gpu/drm/amd/display/include/grph_object_id.h

299

return (enum engine_id) id.id;

drivers/gpu/drm/amd/include/kgd_kfd_interface.h

250

uint32_t engine_id, uint32_t queue_id,

drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h

112

u32 engine_id;

drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h

101

u32 engine_id;

drivers/gpu/drm/nouveau/nvkm/falcon/fw.c

354

fw->engine_id = meta[1];

drivers/gpu/drm/nouveau/nvkm/falcon/ga100.c

38

FLCN_DBG(falcon, "brom: %08x %08x", fw->engine_id, fw->ucode_id);

drivers/gpu/drm/nouveau/nvkm/falcon/ga100.c

41

if (fw->engine_id & 0x00000001) {

drivers/gpu/drm/nouveau/nvkm/falcon/ga100.c

44

if (fw->engine_id & 0x00000004) {

drivers/gpu/drm/nouveau/nvkm/falcon/ga100.c

47

if (fw->engine_id & 0x00000400) {

drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

118

nvkm_falcon_wr32(falcon, falcon->addr2 + 0x19c, fw->engine_id);

drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.c

108

.engine_id = lsfw->engine_id,

drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.c

119

hdr->hs_fmc_params.engid_mask = lsfw->engine_id;

drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c

234

lsfw->engine_id = meta[1];

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/fwsec.c

248

fw->engine_id = desc->EngineIdMask;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c

103

FLCN_DBG(falcon, "brom: %08x %08x", fw->engine_id, fw->ucode_id);

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c

106

if (fw->engine_id & 0x00000400) {

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c

84

fw->engine_id = meta[1];

drivers/gpu/drm/xe/xe_exec_queue.c

346

xe_assert(xe, !vm || (!!(vm->flags & XE_VM_FLAG_GSC) == !!(hwe->engine_id == XE_HW_ENGINE_GSCCS0)));

drivers/gpu/drm/xe/xe_hw_engine.c

1070

return engine_infos[hwe->engine_id].domain;

drivers/gpu/drm/xe/xe_hw_engine.c

527

hwe->engine_id = id;

drivers/gpu/drm/xe/xe_hw_engine_types.h

146

enum xe_hw_engine_id engine_id;

drivers/gpu/drm/xe/xe_lrc.c

2386

static int get_ctx_timestamp(struct xe_lrc *lrc, u32 engine_id, u64 *reg_ctx_ts)

drivers/gpu/drm/xe/xe_lrc.c

2388

u16 class = REG_FIELD_GET(ENGINE_CLASS_ID, engine_id);

drivers/gpu/drm/xe/xe_lrc.c

2389

u16 instance = REG_FIELD_GET(ENGINE_INSTANCE_ID, engine_id);

drivers/gpu/drm/xe/xe_lrc.c

2424

u32 engine_id;

drivers/gpu/drm/xe/xe_lrc.c

2434

engine_id = xe_lrc_engine_id(lrc);

drivers/gpu/drm/xe/xe_lrc.c

2435

if (!get_ctx_timestamp(lrc, engine_id, &reg_ts))

drivers/gpu/drm/xe/xe_lrc.c

828

DECL_MAP_ADDR_HELPERS(engine_id)

drivers/gpu/drm/xe/xe_oa.c

2556

else if (hwe->engine_id == XE_HW_ENGINE_GSCCS0)

drivers/gpu/drm/xe/xe_pxp_submit.c

375

xe_assert(xe, q->hwe->engine_id == XE_HW_ENGINE_GSCCS0);

drivers/gpu/drm/xe/xe_rtp.c

357

hwe->engine_id == __ffs(render_compute_mask);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h

4177

u8 engine_id;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c

2890

data->rules[idx].engine_id = o->engine_id;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c

4071

u8 engine_id, void *rdata, dma_addr_t rdata_mapping,

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c

4079

mcast_obj->engine_id = engine_id;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c

4561

data->rss_engine_id = o->engine_id;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c

4631

u8 cl_id, u32 cid, u8 func_id, u8 engine_id,

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c

4639

rss_obj->engine_id = engine_id;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h

1471

u8 engine_id, void *rdata, dma_addr_t rdata_mapping,

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h

1512

u8 cl_id, u32 cid, u8 func_id, u8 engine_id,

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h

588

u8 engine_id;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h

760

u8 engine_id;

include/linux/habanalabs/cpucp_if.h

356

__le32 engine_id;

include/uapi/drm/habanalabs_accel.h

1165

__u16 engine_id[HL_RAZWI_MAX_NUM_OF_ENGINES_PER_RTR];

include/uapi/drm/habanalabs_accel.h

1195

__u32 engine_id;

include/uapi/drm/habanalabs_accel.h

1241

__u16 engine_id;

include/uapi/drm/habanalabs_accel.h

1330

__u16 engine_id;