dma_set_coherent_mask
ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
dma_set_coherent_mask(&intel_private.pcidev->dev,
rc = dma_set_coherent_mask(dev, dma_mask);
dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
dma_set_coherent_mask(dev, DMA_BIT_MASK(32))) {
ret = dma_set_coherent_mask(i915->drm.dev, DMA_BIT_MASK(mask_size));
ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
dma_set_coherent_mask(ldev->dev, DMA_BIT_MASK(32));
r = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
err = dma_set_coherent_mask(xe->drm.dev, DMA_BIT_MASK(mask_size));
dma_set_coherent_mask(&thdev->dev, parent->coherent_dma_mask);
ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
dma_set_coherent_mask(dev,
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32));
&& !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
&& !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
&& !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
&& !dma_set_coherent_mask(&ioc->pcidev->dev, DMA_BIT_MASK(32))) {
dma_set_coherent_mask(&ioc->pcidev->dev,
ioc->dma_mask) && !dma_set_coherent_mask(&ioc->pcidev->dev,
DMA_BIT_MASK(64)) && !dma_set_coherent_mask(&ioc->pcidev->dev,
dma_set_coherent_mask(&child->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(nandc->dev, DMA_BIT_MASK(32));
err = dma_set_coherent_mask(&pdev->dev, PCI402_DMA_MASK);
err = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
dma_set_coherent_mask(priv->device,
dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32));
dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
err = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
rc = dma_set_coherent_mask(&pdev->dev, persist_dma_mask);
err = dma_set_coherent_mask(&pdev->dev,
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)))
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(56));
dma_set_coherent_mask(&pdev->dev, cmask) == 0) {
err = dma_set_coherent_mask(&pdev->dev, mask);
dma_set_coherent_mask(&pdev->dev, old_cmask);
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(28)) ||
if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)) ||
ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(&pdev->dev,
dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
(err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)))) {
if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
err = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
error = dma_set_coherent_mask(&dcdbas_pdev->dev, DMA_BIT_MASK(32));
if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)))
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(cdev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(&sch->dev, DMA_BIT_MASK(31));
ret = dma_set_coherent_mask(&cdev->dev, sch->dev.coherent_dma_mask);
retval = dma_set_coherent_mask(&aac->pdev->dev, dmamask);
retval = dma_set_coherent_mask(&aac->pdev->dev, dmamask);
error = dma_set_coherent_mask(&pdev->dev, dmamask);
if (dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(64)) ||
dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
(dma_set_coherent_mask(&pdev->dev, consistent_mask) &&
dma_set_coherent_mask(&pdev->dev, coherent_dma_mask))
rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
!dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
dma_set_coherent_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(priv->dev, DMA_BIT_MASK(32));
ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
dma_set_coherent_mask(pdev->dev, DMA_BIT_MASK(64));
dma_set_coherent_mask(pdev->dev, DMA_BIT_MASK(32));
if (dma_set_coherent_mask(hsotg->dev, DMA_BIT_MASK(32)) < 0)
retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
retval = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(31)) < 0)
dma_set_coherent_mask(&dev->core, dummy_mask);
dma_set_coherent_mask(&dev->core, dummy_mask);
dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
dma_set_coherent_mask(&pdev->dev,
dma_set_coherent_mask(&pci_dev->dev,
int dma_set_coherent_mask(struct device *dev, u64 mask);
dma_set_coherent_mask(dev, mask);
EXPORT_SYMBOL(dma_set_coherent_mask);
return dma_set_coherent_mask(dev, mask);
dma_set_coherent_mask(&dev->core, dummy_mask);