drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

10371

struct dc_plane_state *dc_plane;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

12665

struct dc_plane_state *dc_new_plane_state;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6502

struct dc_plane_state *dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6516

dc_plane_state->src_rect = scaling_info.src_rect;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6517

dc_plane_state->dst_rect = scaling_info.dst_rect;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6518

dc_plane_state->clip_rect = scaling_info.clip_rect;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6519

dc_plane_state->scaling_quality = scaling_info.scaling_quality;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6524

&dc_plane_state->address,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6529

dc_plane_state->format = plane_info.format;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6530

dc_plane_state->color_space = plane_info.color_space;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6531

dc_plane_state->format = plane_info.format;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6532

dc_plane_state->plane_size = plane_info.plane_size;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6533

dc_plane_state->rotation = plane_info.rotation;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6534

dc_plane_state->horizontal_mirror = plane_info.horizontal_mirror;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6535

dc_plane_state->stereo_format = plane_info.stereo_format;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6536

dc_plane_state->tiling_info = plane_info.tiling_info;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6537

dc_plane_state->visible = plane_info.visible;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6538

dc_plane_state->per_pixel_alpha = plane_info.per_pixel_alpha;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6539

dc_plane_state->pre_multiplied_alpha = plane_info.pre_multiplied_alpha;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6540

dc_plane_state->global_alpha = plane_info.global_alpha;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6541

dc_plane_state->global_alpha_value = plane_info.global_alpha_value;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6542

dc_plane_state->dcc = plane_info.dcc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6543

dc_plane_state->layer_index = plane_info.layer_index;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6544

dc_plane_state->flip_int_enabled = true;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

6552

dc_plane_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8365

struct dc_plane_state *dc_plane_state = NULL;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8371

dc_plane_state = dc_create_plane_state(dc);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8372

if (!dc_plane_state)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8380

dc_plane_state->src_rect.height = stream->src.height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8381

dc_plane_state->src_rect.width = stream->src.width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8382

dc_plane_state->dst_rect.height = stream->src.height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8383

dc_plane_state->dst_rect.width = stream->src.width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8384

dc_plane_state->clip_rect.height = stream->src.height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8385

dc_plane_state->clip_rect.width = stream->src.width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8386

dc_plane_state->plane_size.surface_pitch = ((stream->src.width + 255) / 256) * 256;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8387

dc_plane_state->plane_size.surface_size.height = stream->src.height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8388

dc_plane_state->plane_size.surface_size.width = stream->src.width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8389

dc_plane_state->plane_size.chroma_size.height = stream->src.height;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8390

dc_plane_state->plane_size.chroma_size.width = stream->src.width;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8391

dc_plane_state->format = SURFACE_PIXEL_FORMAT_GRPH_ARGB8888;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8392

dc_plane_state->tiling_info.gfx9.swizzle = DC_SW_UNKNOWN;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8393

dc_plane_state->rotation = ROTATION_ANGLE_0;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8394

dc_plane_state->is_tiling_rotated = false;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8395

dc_plane_state->tiling_info.gfx8.array_mode = DC_ARRAY_LINEAR_GENERAL;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8399

dc_result = dc_validate_plane(dc, dc_plane_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8407

dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8418

if (dc_plane_state)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

8419

dc_plane_state_release(dc_plane_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

9910

struct dc_plane_state *surface,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

1114

struct dc_plane_state *dc_plane_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

88

struct dc_plane_state;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

927

struct dc_plane_state *dc_state;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1377

struct dc_plane_state *dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1386

switch (dc_plane_state->format) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1401

dc_plane_state->in_transfer_func.type = TF_TYPE_DISTRIBUTED_POINTS;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1428

dc_plane_state->in_transfer_func.tf = tf;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1430

dc_plane_state->in_transfer_func.tf =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1433

r = __set_input_tf(caps, &dc_plane_state->in_transfer_func,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1442

dc_plane_state->in_transfer_func.type = TF_TYPE_PREDEFINED;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1443

dc_plane_state->in_transfer_func.tf = tf;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1447

&dc_plane_state->in_transfer_func,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1457

struct dc_plane_state *dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1481

dc_plane_state->in_transfer_func.tf = amdgpu_tf_to_dc_tf(tf);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1486

dc_plane_state->in_transfer_func.type =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1489

ret = __set_input_tf(color_caps, &dc_plane_state->in_transfer_func,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1494

dc_plane_state->in_transfer_func.type =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1498

&dc_plane_state->in_transfer_func, NULL, false))

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1505

__set_colorop_in_tf_1d_curve(struct dc_plane_state *dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1508

struct dc_transfer_func *tf = &dc_plane_state->in_transfer_func;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1534

struct dc_plane_state *dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1556

return __set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1561

struct dc_plane_state *dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1587

__drm_ctm_3x4_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1588

dc_plane_state->gamut_remap_matrix.enable_remap = true;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1589

dc_plane_state->input_csc_color_matrix.enable_adjustment = false;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1602

struct dc_plane_state *dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1623

dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(colorop_state->multiplier);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1631

struct dc_plane_state *dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1638

struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1739

struct dc_plane_state *dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1744

struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1772

ret = __set_colorop_3dlut(lut3d, lut3d_size, &dc_plane_state->lut3d_func);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1795

struct dc_plane_state *dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1802

struct dc_transfer_func *tf = &dc_plane_state->blend_tf;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1862

struct dc_plane_state *dc_plane_state)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1871

dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(dm_plane_state->hdr_mult);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1879

amdgpu_dm_atomic_lut3d(lut3d, lut3d_size, &dc_plane_state->lut3d_func);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1883

&dc_plane_state->in_shaper_func);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1898

blend_size, &dc_plane_state->blend_tf);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1912

struct dc_plane_state *dc_plane_state)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1924

ret = __set_dm_plane_colorop_degamma(plane_state, dc_plane_state, colorop);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1935

ret = __set_dm_plane_colorop_multiplier(plane_state, dc_plane_state, colorop);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1946

ret = __set_dm_plane_colorop_3x4_matrix(plane_state, dc_plane_state, colorop);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1958

ret = __set_dm_plane_colorop_shaper(plane_state, dc_plane_state, colorop);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1974

ret = __set_dm_plane_colorop_3dlut(plane_state, dc_plane_state, colorop);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

1986

ret = __set_dm_plane_colorop_blend(plane_state, dc_plane_state, colorop);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2013

struct dc_plane_state *dc_plane_state)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2028

if (dc_plane_state->ctx && dc_plane_state->ctx->dc)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2029

color_caps = &dc_plane_state->ctx->dc->caps.color;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2032

dc_plane_state->in_transfer_func.type = TF_TYPE_BYPASS;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2033

dc_plane_state->in_transfer_func.tf = TRANSFER_FUNCTION_LINEAR;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2038

ret = __set_dm_plane_degamma(plane_state, dc_plane_state, color_caps);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2065

ret = map_crtc_degamma_to_dc_plane(crtc, dc_plane_state, color_caps);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2084

__drm_ctm_3x4_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2086

dc_plane_state->gamut_remap_matrix.enable_remap = true;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2087

dc_plane_state->input_csc_color_matrix.enable_adjustment = false;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2090

dc_plane_state->gamut_remap_matrix.enable_remap = false;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2091

dc_plane_state->input_csc_color_matrix.enable_adjustment = false;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2094

if (!amdgpu_dm_plane_set_colorop_properties(plane_state, dc_plane_state))

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

2097

return amdgpu_dm_plane_set_color_properties(plane_state, dc_plane_state);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.h

114

int __set_colorop_in_tf_1d_curve(struct dc_plane_state *dc_plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.h

43

struct dc_plane_state;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1003

struct dc_plane_state *plane_state =

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1461

struct dc_plane_state *dc_plane_state;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1466

dc_plane_state = dm_plane_state->dc_state;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c

1468

dc_plane_force_dcc_and_tiling_disable(dc_plane_state, fb->modifier ? true : false);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_trace.h

385

TP_PROTO(int pipe_idx, const struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1445

struct dc_plane_state *dc_plane_state;

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1449

dc_plane_state = kunit_kzalloc(test, sizeof(*dc_plane_state), GFP_KERNEL);

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1450

KUNIT_ASSERT_NOT_NULL(test, dc_plane_state);

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1463

__set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state),

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1473

struct dc_plane_state *dc_plane_state;

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1477

dc_plane_state = kunit_kzalloc(test, sizeof(*dc_plane_state), GFP_KERNEL);

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1478

KUNIT_ASSERT_NOT_NULL(test, dc_plane_state);

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1491

__set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state),

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1501

struct dc_plane_state *dc_plane_state;

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1505

dc_plane_state = kunit_kzalloc(test, sizeof(*dc_plane_state), GFP_KERNEL);

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1506

KUNIT_ASSERT_NOT_NULL(test, dc_plane_state);

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1520

__set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state),

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1523

(int)dc_plane_state->in_transfer_func.type,

drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_color_test.c

1526

(int)dc_plane_state->in_transfer_func.tf,

drivers/gpu/drm/amd/display/dc/basics/dc_common.c

83

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/basics/dc_common.h

40

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/core/dc.c

1225

struct dc_plane_state *plane_state = NULL;

drivers/gpu/drm/amd/display/dc/core/dc.c

2091

struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/core/dc.c

2750

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/core/dc.c

3219

struct dc_plane_state *surface,

drivers/gpu/drm/amd/display/dc/core/dc.c

3731

struct dc_plane_state *new_planes[MAX_SURFACES] = {0};

drivers/gpu/drm/amd/display/dc/core/dc.c

3766

struct dc_plane_state *surface = srf_updates[i].surface;

drivers/gpu/drm/amd/display/dc/core/dc.c

4457

struct dc_plane_state *plane_state = srf_updates[i].surface;

drivers/gpu/drm/amd/display/dc/core/dc.c

4519

struct dc_plane_state *plane_state = srf_updates[i].surface;

drivers/gpu/drm/amd/display/dc/core/dc.c

4608

struct dc_plane_state *plane_state = srf_updates[i].surface;

drivers/gpu/drm/amd/display/dc/core/dc.c

4695

struct dc_plane_state *plane_state = srf_updates[i].surface;

drivers/gpu/drm/amd/display/dc/core/dc.c

4948

struct dc_plane_state *plane_state = srf_updates[i].surface;

drivers/gpu/drm/amd/display/dc/core/dc.c

5046

struct dc_plane_state *plane_state = srf_updates[i].surface;

drivers/gpu/drm/amd/display/dc/core/dc.c

5065

struct dc_plane_state *plane_state = srf_updates[i].surface;

drivers/gpu/drm/amd/display/dc/core/dc.c

7587

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1748

struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2326

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2346

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

740

struct dc_plane_state *plane = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1216

const struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1332

const struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

1521

const struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2089

int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

2613

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3222

struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3273

struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3324

struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3350

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

3679

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

5499

enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/core/dc_state.c

107

static bool dc_state_untrack_phantom_plane(struct dc_state *state, struct dc_plane_state *phantom_plane)

drivers/gpu/drm/amd/display/dc/core/dc_state.c

133

static bool dc_state_is_phantom_plane_tracked(struct dc_state *state, struct dc_plane_state *phantom_plane)

drivers/gpu/drm/amd/display/dc/core/dc_state.c

501

struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/core/dc_state.c

569

struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/core/dc_state.c

634

struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 };

drivers/gpu/drm/amd/display/dc/core/dc_state.c

662

struct dc_plane_state * const *plane_states,

drivers/gpu/drm/amd/display/dc/core/dc_state.c

784

struct dc_plane_state *dc_state_create_phantom_plane(const struct dc *dc,

drivers/gpu/drm/amd/display/dc/core/dc_state.c

786

struct dc_plane_state *main_plane)

drivers/gpu/drm/amd/display/dc/core/dc_state.c

789

struct dc_plane_state *phantom_plane = dc_create_plane_state(dc);

drivers/gpu/drm/amd/display/dc/core/dc_state.c

808

struct dc_plane_state *phantom_plane)

drivers/gpu/drm/amd/display/dc/core/dc_state.c

883

struct dc_plane_state *phantom_plane,

drivers/gpu/drm/amd/display/dc/core/dc_state.c

900

struct dc_plane_state *phantom_plane,

drivers/gpu/drm/amd/display/dc/core/dc_state.c

914

struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 };

drivers/gpu/drm/amd/display/dc/core/dc_state.c

945

struct dc_plane_state * const *phantom_planes,

drivers/gpu/drm/amd/display/dc/core/dc_state.c

97

struct dc_plane_state *phantom_plane)

drivers/gpu/drm/amd/display/dc/core/dc_state.c

980

struct dc_plane_state *phantom_planes[MAX_PHANTOM_PIPES];

drivers/gpu/drm/amd/display/dc/core/dc_state.c

989

memcpy(phantom_planes, state->phantom_planes, sizeof(struct dc_plane_state *) * MAX_PHANTOM_PIPES);

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

113

const struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

172

void dc_plane_state_retain(struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

179

struct dc_plane_state *plane_state = container_of(kref, struct dc_plane_state, refcount);

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

184

void dc_plane_state_release(struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

285

void dc_plane_force_dcc_and_tiling_disable(struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

310

void dc_plane_copy_config(struct dc_plane_state *dst, const struct dc_plane_state *src)

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

318

memcpy(dst, src, sizeof(struct dc_plane_state));

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

40

void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

58

void dc_plane_destruct(struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

69

uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

87

struct dc_plane_state *dc_create_plane_state(const struct dc *dc)

drivers/gpu/drm/amd/display/dc/core/dc_surface.c

89

struct dc_plane_state *plane_state = kvzalloc_obj(*plane_state,

drivers/gpu/drm/amd/display/dc/dc.h

1658

struct dc_plane_state plane_states[MAX_SURFACES];

drivers/gpu/drm/amd/display/dc/dc.h

1968

struct dc_plane_state *surface;

drivers/gpu/drm/amd/display/dc/dc.h

2063

struct dc_plane_state *plane_states[MAX_SURFACES];

drivers/gpu/drm/amd/display/dc/dc.h

2075

enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/dc.h

2117

struct dc_plane_state *dc_get_surface_for_mpcc(struct dc *dc,

drivers/gpu/drm/amd/display/dc/dc.h

2122

uint32_t dc_get_opp_for_plane(struct dc *dc, struct dc_plane_state *plane);

drivers/gpu/drm/amd/display/dc/dc.h

541

struct dc_plane_state;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1971

struct dc_plane_state *plane_state;

drivers/gpu/drm/amd/display/dc/dc_plane.h

39

struct dc_plane_state *dc_create_plane_state(const struct dc *dc);

drivers/gpu/drm/amd/display/dc/dc_plane.h

41

const struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/dc_plane.h

43

void dc_plane_state_retain(struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/dc_plane.h

44

void dc_plane_state_release(struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/dc_plane.h

46

void dc_plane_force_dcc_and_tiling_disable(struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/dc_plane.h

50

void dc_plane_copy_config(struct dc_plane_state *dst, const struct dc_plane_state *src);

drivers/gpu/drm/amd/display/dc/dc_plane_priv.h

31

void dc_plane_construct(struct dc_context *ctx, struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/dc_plane_priv.h

32

void dc_plane_destruct(struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/dc_plane_priv.h

33

uint8_t dc_plane_get_pipe_mask(struct dc_state *dc_state, const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

79

const struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/dc_state.h

53

struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/dc_state.h

59

struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/dc_state.h

70

struct dc_plane_state * const *plane_states,

drivers/gpu/drm/amd/display/dc/dc_state_priv.h

50

struct dc_plane_state *dc_state_create_phantom_plane(const struct dc *dc,

drivers/gpu/drm/amd/display/dc/dc_state_priv.h

52

struct dc_plane_state *main_plane);

drivers/gpu/drm/amd/display/dc/dc_state_priv.h

60

struct dc_plane_state *phantom_plane);

drivers/gpu/drm/amd/display/dc/dc_state_priv.h

74

struct dc_plane_state *phantom_plane,

drivers/gpu/drm/amd/display/dc/dc_state_priv.h

80

struct dc_plane_state *phantom_plane,

drivers/gpu/drm/amd/display/dc/dc_state_priv.h

92

struct dc_plane_state * const *phantom_planes,

drivers/gpu/drm/amd/display/dc/dc_stream.h

61

struct dc_plane_state *plane_states[MAX_SURFACES];

drivers/gpu/drm/amd/display/dc/dc_stream.h

75

struct dc_plane_state *writeback_source_plane;

drivers/gpu/drm/amd/display/dc/dc_types.h

46

struct dc_plane_state;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1598

struct dc_plane_state *pln = res_ctx->pipe_ctx[i].plane_state;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1122

struct dc_plane_state *plane;

drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c

1149

struct pipe_ctx *dpp_pipe, struct dc_plane_state *plane, int diff)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

455

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

490

const struct dc_plane_state *in,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

519

struct dml2_plane_parameters *plane, const struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

709

static bool dml21_wrapper_get_plane_id(const struct dc_state *context, unsigned int stream_id, const struct dc_plane_state *plane, unsigned int *plane_id)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.c

746

const struct dc_plane_state *plane, const struct dc_state *context)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.h

14

struct dc_plane_state;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_translation_helper.h

27

unsigned int map_plane_to_dml21_display_cfg(const struct dml2_context *dml_ctx, unsigned int stream_id, const struct dc_plane_state *plane, const struct dc_state *context);

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

100

struct dc_plane_state *dc_phantom_plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

279

static struct dc_plane_state *dml21_add_phantom_plane(struct dml2_context *dml_ctx,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

283

struct dc_plane_state *main_plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

287

struct dc_plane_state *phantom_plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

328

struct dc_plane_state *main_plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

36

bool dml21_get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane, unsigned int *plane_id)

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.c

97

struct dc_plane_state *dc_main_plane;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.h

10

struct dc_plane_state;

drivers/gpu/drm/amd/display/dc/dml2_0/dml21/dml21_utils.h

21

bool dml21_get_plane_id(const struct dc_state *state, const struct dc_plane_state *plane, unsigned int *plane_id);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

571

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

58

static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

653

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

715

const struct dc_plane_state *plane, const struct dc_plane_pipe_pool *pool, unsigned int stream_id, int plane_index)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

769

static void map_pipes_for_plane(struct dml2_context *ctx, struct dc_state *state, const struct dc_stream_state *stream, const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_dc_resource_mgmt.c

924

const struct dc_plane_state *plane)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

764

struct dc_plane_state *phantom_plane = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

765

struct dc_plane_state *prev_phantom_plane = NULL;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_mall_phantom.c

845

struct dc_plane_state *del_planes[MAX_SURFACES] = { 0 };

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1071

const struct dc_plane_state *in, struct dc_state *context,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1158

static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *context, const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

1182

static unsigned int map_plane_to_dml_display_cfg(const struct dml2_context *dml2, const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

922

static void populate_dml_surface_cfg_from_plane_state(enum dml_project_id dml2_project, struct dml_surface_cfg_st *out, unsigned int location, const struct dc_plane_state *in)

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_translation_helper.c

989

const struct dc_plane_state *in,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_utils.c

218

static bool get_plane_id(struct dml2_context *dml2, const struct dc_state *state, const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper.h

101

int (*get_dpp_pipes_for_plane)(const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper.h

120

struct dc_plane_state* (*create_phantom_plane)(const struct dc *dc,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper.h

122

struct dc_plane_state *main_plane);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper.h

127

bool (*add_phantom_plane)(const struct dc *dc, struct dc_stream_state *stream, struct dc_plane_state *plane_state, struct dc_state *context);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper.h

130

struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper.h

137

struct dc_plane_state *plane);

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper.h

38

struct dc_plane_state;

drivers/gpu/drm/amd/display/dc/dml2_0/dml2_wrapper.h

88

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.c

155

struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/hwss/dce100/dce100_hwseq.h

50

struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

258

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2848

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

2863

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

287

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c

3128

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dce60/dce60_hwseq.c

274

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2027

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2057

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2079

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

2908

static void dcn10_update_dpp(struct dpp *dpp, struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3035

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

3656

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c

4190

struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

218

struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

79

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1063

struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1083

struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1110

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1683

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2708

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

2737

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

34

struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

36

struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

46

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

140

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

62

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

236

struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

319

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c

973

struct dc_plane_state *plane = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

60

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.h

64

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

1459

struct dc_plane_state *phantom_plane = phantom_pipe->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

266

struct dc_plane_state *plane = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

484

struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c

531

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

51

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.h

55

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

1352

struct dc_plane_state *plane = NULL;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

3699

struct dc_plane_state *plane_state = pipe_ctx->plane_state;

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

653

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

40

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

386

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.c

894

const struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.h

16

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/dcn42/dcn42_hwseq.h

19

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1273

void (*clear_surface_dcc_and_tiling)(struct pipe_ctx *pipe_ctx, struct dc_plane_state *plane_state, bool clear_tiling);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1932

struct dc *dc, struct pipe_ctx *pipe_ctx, struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

94

struct dc_plane_state *plane_state;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

191

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

193

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

195

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

230

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer_private.h

93

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/inc/core_types.h

160

const struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/inc/core_types.h

174

struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/inc/core_types.h

459

struct dc_plane_state *plane_state;

drivers/gpu/drm/amd/display/dc/inc/core_types.h

632

struct dc_plane_state *phantom_planes[MAX_PHANTOM_PIPES];

drivers/gpu/drm/amd/display/dc/inc/resource.h

166

struct dc_plane_state *const *plane_state,

drivers/gpu/drm/amd/display/dc/inc/resource.h

324

struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/inc/resource.h

334

const struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/inc/resource.h

379

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/inc/resource.h

416

int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.c

966

enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps)

drivers/gpu/drm/amd/display/dc/resource/dce100/dce100_resource.h

42

enum dc_status dce100_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps);

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1045

static enum dc_status dce110_validate_plane(const struct dc_plane_state *plane_state,

drivers/gpu/drm/amd/display/dc/resource/dce110/dce110_resource.c

1069

struct dc_plane_state *plane =

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1180

static enum dc_status dcn10_validate_plane(const struct dc_plane_state *plane_state, struct dc_caps *caps)

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1211

struct dc_plane_state *plane =

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

1249

static enum dc_status dcn10_patch_unknown_plane_state(struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2253

enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.h

167

enum dc_status dcn20_patch_unknown_plane_state(struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

1387

static enum dc_status dcn21_patch_unknown_plane_state(struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1812

struct dc_plane_state *phantom_plane = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

1813

struct dc_plane_state *prev_phantom_plane = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource_helpers.c

320

struct dc_plane_state *current_plane = NULL;

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

1910

enum dc_status dcn35_patch_unknown_plane_state(struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.h

38

enum dc_status dcn35_patch_unknown_plane_state(struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1788

enum dc_status dcn401_patch_unknown_plane_state(struct dc_plane_state *plane_state)

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h

23

enum dc_status dcn401_patch_unknown_plane_state(struct dc_plane_state *plane_state);

drivers/gpu/drm/amd/display/modules/freesync/freesync.c

1146

const struct dc_plane_state *plane,

drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h

130

const struct dc_plane_state *plane,